XMC Peripheral Library for XMC4000 Family: XMC Peripheral Library

XMC Peripheral Library for XMC4000 Family 2.1.16
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XMC Peripheral Library

Table of Contents

  • Supported devices and toolchains
  • Overview
  • Coding Rules and Conventions
  • How to use the XMC Peripheral Library
    • Device Names
  • Directories and Files
  • XMC Lib examples
    • Keil MDK-ARM
    • IAR Embedded Workbench for ARM
    • DAVE
  • MISRA-C 2004 Compliance Exceptions
  • Test conditions
  • XMC Peripheral Library Licensing

The XMC Peripheral Library (XMC Lib) consists of low-level drivers for the XMC product family peripherals.
Built on top the Cortex Microcontroller Software Interface Standard (CMSIS) and MISRA-C 2004 compliant, it provides access to all peripheral features.

Supported devices and toolchains

The following 32-Bit Industrial Microcontrollers based on ARM Cortex-M4F are supported:

  • XMC4800 series
  • XMC4700 series
  • XMC4500 series
  • XMC4300 series
  • XMC4400 series
  • XMC4200 series
  • XMC4100 series

The following tool chains are supported:

  • GNU GCC for ARM (gcc) found in Atollic TrueSTUDIO, DAVE and Rowley CrossWorks.
  • Keil MDK-ARM Microcontroller Development Kit v5.x (armcc)
  • IAR Embedded Workbench for ARM v7.x(iccarm)
  • TASKING VX-toolset for ARM v5.(carm)

Overview

XMC Lib consists of routines and data structures which covers all peripheral functions.

It provides a peripheral register abstraction by a set of stateless APIs. It is possible to write a full application without a single peripheral register access.

It is built on top of Cortex Microcontroller Software Interface Standard (CMSIS).

Coding Rules and Conventions

This section describes the set of coding rules and conventions applied to the XMC Peripheral Library:

  • Strict C99 usage, in addtion unions and bitfields are used for more compact code and data section.
  • Use only standard data types
  • Use enumerations in favor of defines
  • Naming convention:
    • Variables use only lower case,underscore separated words.
    • Functions use CamelCase convention.
  • Non blocking APIs for better integration in event driven applications. Polling is supported aswell by API.
  • Runtime error checking can be enabled by user
  • XMC_ASSERT() used to check input parameters of functions, result of calculations, ... .
    Note
    Only enabled if XMC_ASSERT_ENABLE macro is defined
  • XMC_DEBUG() used to monitor status of application.
    Note
    Only enabled if XMC_DEBUG_ENABLE macro is defined
  • Each driver defines its own namespace: every function and type definition is prefixed by a unique identifier, i.e. XMC_VADC

XMC Peripheral Library follows an object oriented approach, where a instances of peripherals is treated as objects = attributes + functions.
Attributes are the peripheral data structures defined in device header file. These gets configured using configuration data structures using initialization functions.
Peripheral functions take a pointer to the peripheral data struct as the first argument.
XMC Peripheral Library uses naming conventions to bind the data struct and the functions that operate on i, i.e. XMC_PERI_DoSomething(XMC_PERI_t const *peri, ...);

Typically a driver contains the following functionality:

  1. Initialization function
    XMC_PERI_STATUS_t XMC_PERI_Init(XMC_PERI_t *const peri, const XMC_PERI_CONFIG_t const *config);
  2. Enable/disable peripheral functions
    void XMC_PERI_Enable(XMC_PERI_t *const peri);
    void XMC_PERI_Disable(XMC_PERI_t *const peri);
  3. Connectivity functions
    void XMC_PERI_SetInputSource(XMC_PERI_t *const peri, ...);
  4. Event handling functions
    void XMC_PERI_Enable(XMC_PERI_t const *peri);
    void XMC_PERI_Disable(XMC_PERI_t const *peri);
    void XMC_PERI_EnableEvent(XMC_PERI_t const *peri);
    void XMC_PERI_DisableEvent(XMC_PERI_t const *peri);
    void XMC_PERI_TriggerEvent(XMC_PERI_t const *peri);
    uint32_t XMC_PERI_GetEventStatus(XMC_PERI_t const *peri);
    void XMC_PERI_SetInterruptNode(XMC_PERI_t const *peri);
  5. Control functions
    void XMC_PERI_Start(XMC_PERI_t const *peri);
    void XMC_PERI_Stop(XMC_PERI_t const *peri);
    void XMC_PERI_Suspend(XMC_PERI_t const *peri);
    void XMC_PERI_Resume(XMC_PERI_t const *peri);
  6. Get/setters functions, run time API to obtain or modify state of peripheral
    void XMC_PERI_SetSomething(XMC_PERI_t const *peri, ...);
    uint32_t XMC_PERI_GetSomething(XMC_PERI_t const *peri);
  7. IRQ Handlers are provided which can be used optionally by the user to make easier the coding
    void XMC_PERI_IRQHandler(uint32_t sr_num);

A peripheral driver is structured as:

  • Common API valid for all the supported devices, i.e. xmc_gpio.h and xmc_gpio.c
  • Familiy specific extension API, i.e. xmc4_gpio.h and xmc4_gpio.c
  • Maps files to help user to configure connectivity, i.e. xmc4_gpio_map.h already has defined all the pins available depending on the target device selected.

If needed the family extension API implementation file, i.e. xmc4_gpio.c, can also overload common functionality to adapt it to target device. The peripheral driver abstracts the target device, helping the user in code proting to another family or device.

How to use the XMC Peripheral Library

The following steps are required:

  1. Include header file of required peripheral. No need to include device specific peripheral header files, this is done automatically using the information of the selected target device.
  2. Peripheral configuration and initialization.
  3. Connectivity configuration.
  4. Event/interrupt configuration.
  5. Start operation.
  6. IO configuration.
  7. Manage peripheral.
/* Include files */
#include <xmc_gpio.h>
#include <xmc_i2c.h>
...
int main(void)
{
/* Peripheral configuration and initialization. */
XMC_I2C_CH_CONFIG_t i2c_cfg;
i2c_cfg.baudrate = 400000U;
XMC_I2C_CH_Init(XMC_I2C0_CH0, &i2c_cfg);
/* Connectivity configuration. */
XMC_I2C_CH_SetInputSource(XMC_I2C0_CH0, XMC_I2C_CH_INPUT_SDA, USIC1_C0_DX0_P2_14);
XMC_I2C_CH_SetInputSource(XMC_I2C0_CH0, XMC_I2C_CH_INPUT_SCL, USIC1_C0_DX1_P5_8);
/* Event/interrupt configuration. */
XMC_I2C_CH_EnableEvent(XMC_I2C0_CH0, XMC_I2C_CH_EVENT_ARBITRATION_LOST);
NVIC_SetPriority(USIC0_0_IRQn, NVIC_GetPriorityGrouping(), 63, 0);
NVIC_EnableIRQ(USIC0_0_IRQn);
/* Start operation. */
XMC_I2C_CH_Start(XMC_I2C0_CH0);
/* IO configuration. */
XMC_GPIO_SetMode(P1_5, XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN | P1_5_AF_U0C0_DOUT0);
XMC_GPIO_SetMode(P1_1, XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN | P1_1_AF_U0C0_SCLKOUT);
...
/* Manage peripheral */
XMC_I2C_CH_MasterStart(XMC_I2C1_CH0, IO_EXPANDER_ADDRESS, XMC_I2C_CH_CMD_WRITE);
while((XMC_I2C_CH_GetStatusFlag(XMC_I2C1_CH0) & XMC_I2C_CH_STATUS_FLAG_ACK_RECEIVED) == 0U)
{
/* wait for ACK */
}
XMC_I2C_CH_ClearStatusFlag(XMC_I2C1_CH0, XMC_I2C_CH_STATUS_FLAG_ACK_RECEIVED);
...

Device Names

The selection of the target device is done through preprocessor macro, i.e. -DXMC4500_F144x1024 (refer to devices names below)

XMC4800 Series device names:

  • XMC4800_E196x2048
  • XMC4800_F144x2048
  • XMC4800_F100x2048
  • XMC4800_E196x1536
  • XMC4800_F144x1536
  • XMC4800_F100x1536
  • XMC4800_E196x1024
  • XMC4800_F144x1024
  • XMC4800_F100x1024

XMC4700 Series device names:

  • XMC4700_E196x2048
  • XMC4700_F144x2048
  • XMC4700_F100x2048
  • XMC4700_E196x1536
  • XMC4700_F144x1536
  • XMC4700_F100x1536

XMC4500 Series device names:

  • XMC4500_E144x1024
  • XMC4500_F144x1024
  • XMC4500_F100x1024
  • XMC4500_F144x768
  • XMC4500_F100x768
  • XMC4502_F100x768
  • XMC4504_F100x512
  • XMC4504_F144x512

XMC4400 Series device names:

  • XMC4400_F100x512
  • XMC4400_F64x512
  • XMC4400_F100x256
  • XMC4400_F64x256
  • XMC4402_F100x256
  • XMC4402_F64x256

XMC4300 Series device names:

  • XMC4300_F100x256

XMC4200 Series device names:

  • XMC4200_F64x256
  • XMC4200_Q48x256

XMC4100 Series device names:

  • XMC4100_F64x128
  • XMC4100_Q48x128
  • XMC4104_F64x128
  • XMC4104_Q48x128
  • XMC4104_F64x64
  • XMC4104_Q48x64
  • XMC4108_F64x64
  • XMC4108_Q48x64

Directories and Files

The following diagram shows the most important directories and files provided in the distribution.

* XMC_Peripheral_Library_vX.Y.Z\   - XMClib root directory
* |
* +-CMSIS\                         - The Cortex Microcontroller Software Interface Standard abstraction layer
* | +-index.html                   - Link to documentation
* | +-Include\                     - Hardware Abstraction Layer (HAL) for Cortex-M processor registers
* | +-Infineon\                    - Includes System View Description files (SVD), device header files, system and startup files
* | +-Lib\                         - Precompiled CMSIS DSP libraries for XMC4 (ARM Cortex M4F) and XMC1 (ARM Cortex M0) families
* |
* +-XMClib\                        - XMC Peripheral Library
* | +-XMC1_Peripheral_Library.chm  - XMC Peripheral Library documentation with XMC1 specific information
* | +-XMC4_Peripheral_Library.chm  - XMC Peripheral Library documentation with XMC4 specific information
* | |
* | +-doc\                         - XMC Peripheral Library documentation generated with Doxygen
* | | +-html\                      - Doxygen output folder
* | | +-xmc4lib.dox                - Doxygen configuration file to generate XMC4 Peripheral Library documentation
* | | +-xmc1lib.dox                - Doxygen configuration file to generate XMC1 Peripheral Library documentation
* | | +- . . .
* |
* | +-examples\                    - XMC Peripheral Library example
* | | +-XMC1200_series\            - Examples for XMC1200 series
* | | +-XMC1300_series\            - Examples for XMC1300 series
* | | +-XMC4400_series\            - Examples for XMC4400 series
* | | +-XMC4500_series\            - Examples for XMC4500 series
* | | | +-VADC\                    - Examples for VADC peripheral
* | | | | +-VADC_MEASUREMENT\      - VADC peripheral project
* | | | | | +-ARM\                 - Project file for Keil MDK-ARM V5.x
* | | | | | +-IAR\                 - Project file for IAR Embedded Workbench for ARM v7.x
* | | | | | +-main.c               - Application code
* | | | | | +-Readme.txt           - Readme file describing project
* | | | +- . . .
* |
* | +-inc\                         - XMC Peripheral Library API interface files
* | | +-xmc_vadc.h                 - VADC API description
* | | +- . . .
* |
* | +-src\                         - XMC Peripheral Library API implementation files
* | | +-xmc_vadc.c                 - VADC API implementation
* | | +- . . .
*

XMC Lib examples

The XMC Peripheral Library comes with set of examples covering the main features of each peripheral. All the examples are toolchain agnostic

Keil MDK-ARM

Keil MDK-ARM project files are included in the examples folder. The latest version of XMC1000 / XMC4000 CMSIS Pack have to be installed, since the project references to the XMC Peripheral Library distributed with the device pack.

IAR Embedded Workbench for ARM

IAR Embedded Workbench for ARM project files are included in the examples folder. The IAR projects reference to the XMC library files in the library folder of this zip file package. The projects will only compile if the relative path information is not changed.

DAVE

Projects for DAVE (version 3 and version 4) are provided via the DAVE example library: Help > Install DAVE APPs / Examples

MISRA-C 2004 Compliance Exceptions

CMSIS-CORE violates the following MISRA-C:2004 rules:

  • Required Rule 1.1, All code shall conform to ISO 9899:1990 Compiler extensions are beyond IFX control
  • Required Rule 1.4, The compiler/linker shall be checked to ensure that 31 character significance and case sensitivity are supported for external identifiers. and 5.1 : Variables can be named greater than 31 characters Long parameters names are defined for code readability.
  • Required Rule 5.1, Identifiers (internal and external) shall not rely on the significance of more than 31 characters. Long parameters names are defined for code readability.
  • Advisory Rule 5.7, No identifier name should be reused. This rule is untenable.
  • Advisory Rule 6.3, typedefs that indicate size and signedness should be used in place of the basic types Float data type used for signed-ness
  • Required Rule 8.5, object/function definition in header file. Violated since function definitions in header files are used for function inlining'.
  • Required Rule 11.2, Conversions shall not be performed between a pointer to object and any type other than an integral type, another pointer to object type, or a pointer to void It may be sometimes necessary to cast a pointer to an integer and sometimes casting amongst pointers is unavoidable.
  • Advisory Rule 11.3, A cast should not be performed between a pointer type and an integral type. It may be sometimes necessary to cast a pointer to an integer and sometimes casting amongst pointers is unavoidable.
  • Advisory Rule 16.7, A pointer parameter in a function prototype should be declared as pointer to const if the pointer is not used to modify the addressed object It is not mandatory to qualify all pointer arguments that are not going to be modified by callee function with a const attribute.
  • Required Rule 18.4, declaration of union type or object of union type: '{...}'. Violated since unions are used for effective representation of core registers.
  • Advisory Rule 19.4, Disallowed definition for macro. Violated since macros are used for assembler keywords.
  • Advisory Rule 19.7, Function-like macro defined. Violated since function-like macros are used to generate more efficient code.
  • Advisory Rule 20.2, Re-use of C90 identifier pattern. Violated since CMSIS macros begin with '__'. Since CMSIS is developed and verified with various compilers this approach is acceptable and avoids conflicts with user symbols.
  • Advisory Rule 19.1, Declaration before #include. Violated since Interrupt Number Definition Type (IRQn_Type) must be defined before including the core header file.

Test conditions

  • Libraries for the XMC4800 series are verified on all supported derivatives; fully functional test is applied with XMC4800-F144x2048.
  • Libraries for the XMC4500 series are verified on all supported derivatives; fully functional test is applied with XMC4500-F144x1024.
  • Libraries for the XMC4400 series are verified on all supported derivatives; fully functional test is applied with XMC4400-F100x512.
  • Libraries for the XMC4200 series are verified on all supported derivatives; fully functional test is applied with XMC4200-Q48x256.

Compilers used :

  • KEIL V5.10.0.2
  • IAR V6.50.6.4958
  • TASKING V5.1r1 patch
  • GCC compiler version ARM-GCC-49

XMC Peripheral Library Licensing

License Terms and Copyright Information

Copyright (c) 2015-2017, Infineon Technologies AG All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  • Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  • Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  • Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with Infineon Technologies AG (suppo.nosp@m.rt@i.nosp@m.nfine.nosp@m.on.c.nosp@m.om).

Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party.

Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com).

Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: $title

  • Modules
  • Files

Table of Contents

  • Version 2.1.16
    • COMMON
    • ETH_MAC
    • RTC
  • Version 2.1.14
    • CCU8
    • CCU4
    • ECAT
    • POSIF
    • EBU
    • SCU
  • Version 2.1.12
  • Version 2.1.10
    • ADC
    • DMA
    • ERU
    • LEDTS
    • SDMMC
    • USIC
  • Version 2.1.8
    • GENERAL
    • CAN
    • GPIO
    • I2C
    • I2S
    • SPI
    • UART
    • VADC
  • Version 2.1.6
    • FLASH
  • Version 2.1.4
    • ETH_PHY
  • Version 2.1.2
    • DSD
    • WDT
  • Version 2.0.0
    • HRPWM
    • USBD
  • Version 1.0.0

Version 2.1.16

COMMON

  • Added:
    • __RAM_FUNC macro

ETH_MAC

  • Changed:
    • XMC_ETH_MAC_InitPTP(), XMC_ETH_MAC_InitPTPEx(), XMC_ETH_MAC_GetPTPTime(), XMC_ETH_MAC_UpdatePTPTime(), XMC_ETH_MAC_SetPTPAlarm(), XMC_ETH_MAC_GetRxTimeStamp(), XMC_ETH_MAC_GetTxTimeStamp()
      Changed rollover mode of nanosecond counter from binary to digital mode, i.e 1ns resolution Fixed reference clock frequency for the time stamp update logic, i.e. use fSYS
  • Added:
    • XMC_ETH_MAC_TIMESTAMP_STATUS_t enum

RTC

  • Changed:
    • Changed XMC_RTC_EnableHibernationWakeUp() and XMC_RTC_DisableHibernationWakeUpcheck()
      Check SCU_MIRRSTS to ensure that no transfer over serial interface is pending to the RTC_CTR register

Version 2.1.14

CCU8

  • Changed:
    • XMC_CCU8_SLICE_SetPrescaler() changed div_val parameter to type XMC_CCU8_SLICE_PRESCALER_t

CCU4

  • Changed:
    • XMC_CCU4_SLICE_SetPrescaler() changed div_val parameter to type XMC_CCU4_SLICE_PRESCALER_t

ETH_MAC

  • Fixed:
    • XMC_ETH_MAC_GetRxTimeStamp() and XMC_ETH_MAC_GetTxTimeStamp() fixed returned nanoseconds value

ECAT

  • Changed:
    • XMC_ECAT_ReadPhy() and XMC_ECAT_WritePhy() to release the MII access and check that the master enables take over of MII management control

POSIF

  • Added:
    • Added posif connectivity map file

EBU

  • Changed:
    • XMC_EBU_AddressSelectEnable() makes sure arbitartion mode is active
    • XMC_EBU_Init() adds checks for the clock acknowledgment

SCU

  • Changed:
    • XMC_SCU_CLOCK_Init() ensure standby clock source is updated in the HIB domain before proceeding
    • XMC_SCU_CLOCK_EnableLowPowerOscillator() ensure the low power oscillator and associated watchdog is enabled before leaving the function
    • Documentation changes adding note on usage of XMC_SCU_GetMirrorStatus() to check if the update of HIB register contents is done

Version 2.1.12

ETH_MAC

  • Fixed:
    • XMC_ETH_MAC_InitPTP() fixed initialization
    • XMC_ETH_MAC_UpdatePTPTime(), XMC_ETH_MAC_SetPTPAlarm() fixed nanoseconds initialization
    • Ordering of PTP nanoseconds and seconds members in XMC_ETH_MAC_DMA_DESC_t structure
  • Changed:
    • XMC_ETH_MAC_Init() to disable PMT and timestamp interrupt events and MMC IPC receive interrupt event
    • XMC_ETH_MAC_GetTxTimeStamp() and XMC_ETH_MAC_GetRxTimeStamp() return the timestamp depending on status bit in descriptor
  • Added:
    • XMC_ETH_MAC_InitPTPEx(), extension to XMC_ETH_MAC_InitPTP() adding a new parameter to set the time
    • XMC_ETH_MAC_SetPTPTime() to set the system time
    • XMC_ETH_MAC_UpdateAddend() to directly write to the addend register
    • XMC_ETH_MAC_EnablePTPAlarm() and XMC_ETH_MAC_DisablePTPAlarm

Version 2.1.10

COMMON

  • Fixed:
    • Changed type of size in XMC_PRIOARRAY_t to fix compilation warnings
    • Fixed compilation warning in XMC_AssertHandler
  • Changed:
    • Remove the need to define XMC_USER_ASSERT_FUNCTION

ADC

  • Fixed:
    • Add missing support for XMC4700
    • Renamed XMC_CCU_41_ST2 to XMC_CCU_41_ST3
    • Fix assertion in XMC_VADC_GROUP_CheckSlaveReadiness() and XMC_VADC_GROUP_IgnoreSlaveReadiness() checking the slave_group parameter
  • Added:
    • New macros equivalent to th existing ones but with better naming.
      Note
      Old macros are kept for backward compatibility but they deprecated.
    • ECAT support for XMC48/43
    • new functions to remove channels from background request source, XMC_VADC_GLOBAL_BackgroundRemoveChannelFromSequence() and XMC_VADC_GLOBAL_BackgndRemoveMultipleChannels()

CCU4

  • Fixed:
    • XMC_CCU4_lAssertReset(), XMC_CCU4_lDeassertReset(), XMC_CCU4_lGateClock() and XMC_CCU4_lUngateClock() fix compilation warnings.

CCU8

  • Fixed:
    • XMC_CCU8_lAssertReset(), XMC_CCU8_lDeassertReset(), XMC_CCU8_lGateClock() and XMC_CCU8_lUngateClock() fix compilation warnings.

DMA

  • Fixed:
    • Fix documentation on maximum block size

ETH_MAC

  • Fixed:
    • XMC_ETH_MAC_SetPortControl() fixed compilation warning
    • XMC_ETH_MAC_Enable() and XMC_ETH_MAC_Disable(), fixed compilation warnings
  • Changed:
    • XMC_ETH_MAC_Init() to optimize access to bus

ERU

  • Fixed:
    • Remove incorrect ERU0_ETL1_INPUTB_P0_1 and replace it by ERU0_ETL1_INPUTB_SCU_HIB_SR1

LEDTS

  • Fixed:
    • XMC_LEDTS_InitGlobal() fixed compilation warnings

POSIF

  • Fixed:
    • XMC_POSIF_Enable() and XMC_POSIF_Disable() fixed compilation warnings

SDMMC

  • Added:
    • XMC_SDMMC_SetCardDetectionSource() and XMC_SDMMC_SetCardDetectionStatus() which are needed in case the pin SDCD (default) is not used as card detection

USIC

  • Added:
    • XMC_USIC_CH_SetShiftDirection() to allow selection of shift direction of the data words for transmision and reception
    • XMC_USIC_CH_GetCaptureTimerValue() and XMC_USIC_CH_SetFractionalDivider()

Version 2.1.8

GENERAL

  • Added:
    • Added USBH driver

CAN

  • Added:
    • XMC_CAN_IsPanelControlReady()
  • Changed:
    • XMC_CAN_AllocateMOtoNodeList() Wait for ready status of list controller
  • Fixed:
    • XMC_CAN_MO_Config() Solve issue with TX and RX interrupt node pointers being cleared.

CCU4

  • Added:
    • XMC_CCU4_SLICE_StopClearTimer()
  • Changed:
    • XMC_CCU4_SLICE_StopTimer(), XMC_CCU4_SLICE_ClearTimer() Avoid read write modify access

CCU8

  • Added:
    • XMC_CCU8_SLICE_StopClearTimer()
  • Changed:
    • XMC_CCU8_SLICE_StopTimer(), XMC_CCU4_SLICE_ClearTimer() Avoid read write modify access

GPIO

  • Added:
    • Added P2_0_AF_CAN_N0_TXD for XMC4300

ECAT

  • Added:
    • Macro map file added XMC_ECAT_PORT_CTRL_LATCHIN0_P9_0 and XMC_ECAT_PORT_CTRL_LATCHIN0_P9_1

ETH_MAC

  • Added:
    • XMC_ETH_MAC_GetTxBuffer(), XMC_ETH_MAC_GetRxBuffer()
    • XMC_ETH_MAC_SetTxBufferSize()
    • XMC_ETH_MAC_IsRxDescriptorOwnedByDma()
  • Changed:
    • XMC_ETH_MAC_ReturnTxDescriptor(), XMC_ETH_MAC_ReturnRxDescriptor() Update current descriptor pointer
    • XMC_ETH_MAC_Init() Disable MMC interrupt events

I2C

  • Added:
    • XMC_I2C_CH_EnableDataTransmission(), XMC_I2C_CH_DisableDataTransmission()

I2S

  • Added:
    • XMC_I2S_CH_EnableDataTransmission(), XMC_I2S_CH_DisableDataTransmission()
  • Changed:
    • XMC_I2S_CH_Init() Change default passive level to 0 Call XMC_I2S_CH_SetSystemWordLength() to set the system frame length equal to the frame length.
    • XMC_I2S_CH_SetBaudrate() Optional Master clock output signal generated with a fixed phase relation to SCLK

RTC

  • Added:
    • XMC_RTC_SetTimeStdFormat(), XMC_RTC_SetAlarmStdFormat()

SCU

  • Added:
    • XMC_SCU_CLOCK_IsLowPowerOscillatorStable(), XMC_SCU_CLOCK_IsHighPerformanceOscillatorStable()
    • XMC_SCU_POWER_WaitForInterrupt(), XMC_SCU_POWER_WaitForEvent()
    • XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput(), XMC_SCU_CLOCK_DisableLowPowerOscillatorGeneralPurposeInput(), XMC_SCU_CLOCK_GetLowPowerOscillatorGeneralPurposeInputStatus()
    • XMC_SCU_CLOCK_EnableHighPerformanceOscillatorGeneralPurposeInput(), XMC_SCU_CLOCK_DisableHighPerformanceOscillatorGeneralPurposeInput(), XMC_SCU_CLOCK_GetHighPerformanceOscillatorGeneralPurposeInputStatus()
    • XMC_SCU_HIB_IsWakeupEventDetected(), XMC_SCU_HIB_ClearWakeupEventDetectionStatus()
    • XMC_SCU_HIB_EnterHibernateStateEx()
    • Extended wakeup hibernate events using LPAC wakeup on events. Only available in XMC44, XMC42 and XMC41 series
    • Added LPAC APIs. Only available in XMC44, XMC42 and XMC41 series
  • Removed:
    • XMC_SCU_INTERRUPT_EVENT_OSCULSTAT_UPDATED, XMC_SCU_INTERRUPT_EVENT_HDSTAT_UPDATED

SDMMC

  • Fixed:
    • XMC_SDMMC_SetBusVoltage(), XMC_SDMMC_SetDataLineTimeout(), XMC_SDMMC_SDClockFreqSelect() Fixed wrong masking when accessing register
    • XMC_SDMMC_SetDataTransferMode() Avoid calling SetDateLineTimeout()

SPI

  • Added:
    • XMC_SPI_CH_EnableDataTransmission(), XMC_SPI_CH_DisableDataTransmission()

UART

  • Added:
    • XMC_UART_CH_EnableDataTransmission(), XMC_UART_CH_DisableDataTransmission()
  • Changed:
    • XMC_UART_CH_Init() Enable transfer status BUSY
    • XMC_UART_CH_Stop() Check for transfer status

USIC

  • Added:
    • Add missing USIC2_C1_DX0_P4_6,USIC1_C0_DX0_P1_14, USIC2_C0_DX0_P6_5, USIC2_C0_DX0_P9_4, USIC2_C1_DX1_P9_9, USIC2_C1_DX2_P9_8 for XMC47/48 BGA196
    • Add missing USIC2_C1_DX0_P4_6, USIC1_C0_DX0_P1_14 for XMC47/48 LQFP100
    • Add missing USIC2_C1_DX0_P4_6, USIC1_C0_DX0_P1_14, USIC2_C0_DX0_P6_5 for XMC47/48 LQFP144

VADC

  • Added:
    • XMC_VADC_SHS_FULL_SET_REG, XMC_VADC_RESULT_PRIORITY_AVAILABLE, XMC_VADC_SYNCTR_START_LOCATION
    • XMC_VADC_SHS_GAIN_LEVEL_t and XMC_VADC_SYNCTR_EVAL_t
    • XMC_VADC_GROUP_SetSyncSlaveReadySignal()
    • XMC_VADC_GROUP_ChannelGetAssertedEvents()
    • XMC_VADC_GROUP_GetAssertedResultEvents()
    • XMC_VADC_GROUP_SetResultRegPriority()
    • XMC_VADC_GROUP_SetSyncReadySignal()
    • XMC_VADC_GROUP_GetSyncReadySignal()
    • XMC_VADC_GROUP_GetResultRegPriority()
  • Fixed:
    • XMC_VADC_GROUP_CheckSlaveReadiness(), XMC_VADC_GROUP_IgnoreSlaveReadiness() Fixed the EVAL configuration

Version 2.1.6

SCU

  • Added:
    • XMC_SCU_POWER_EnableMonitor(), XMC_SCU_POWER_DisableMonitor()
    • XMC_SCU_POWER_GetEVRStatus(), XMC_SCU_POWER_GetEVR13Voltage(), XMC_SCU_POWER_GetEVR33Voltage()
    • XMC_SCU_HIB_SetPinMode()
    • XMC_SCU_HIB_GetHibernateControlStatus()
    • XMC_SCU_HIB_GetEventStatus(), XMC_SCU_HIB_ClearEventStatus()
    • XMC_SCU_HIB_TriggerEvent(), XMC_SCU_HIB_EnableEvent(), XMC_SCU_HIB_DisableEvent()
    • XMC_SCU_HIB_SetWakeupTriggerInput()
    • XMC_SCU_HIB_SetPinMode()
    • XMC_SCU_HIB_SetOutputPinLevel()
    • XMC_SCU_HIB_SetInput0()
    • XMC_SCU_HIB_EnterHibernateState()
  • Fixed:
    • XMC_SCU_ReadFromRetentionMemory() Fix functionality
    • XMC_SCU_CLOCK_ScaleMCLKFrequency() It solves issues with down clock frequency scaling *
    • XMC_SCU_CLOCK_Init() for XMC1400 It solves issues when trying to disable the OSCHP and use the XTAL pins as GPIO
  • Changed:
    • XMC_SCU_INTERRUPT_ClearEventStatus() Optimization of write only registers
    • XMC_SCU_TRAP_Trigger(), XMC_SCU_TRAP_ClearStatus() Optimization of write only registers
    • XMC_SCU_RESET_AssertPeripheralReset(), XMC_SCU_RESET_DeassertPeripheralReset() Optimization of write only registers
    • XMC_SCU_CLOCK_GatePeripheralClock(), XMC_SCU_CLOCK_UngatePeripheralClock() Optimization of write only registers
    • XMC_SCU_POWER_EnableUsb(), XMC_SCU_POWER_DisableUsb() Optimization of write only registers
    • XMC_SCU_HIB_EnableHibernateDomain(), XMC_SCU_HIB_DisableHibernateDomain() Optimization of write only registers
    • XMC_SCU_RESET_ClearDeviceResetReason() Optimization of write only registers

RTC

  • Changed:
    • XMC_RTC_ClearEvent() Optimization of write only registers

SDMMC

  • Changed:
    • XMC_SDMMC_ClearEvent() Optimization of write only registers
  • Added:
    • XMC_SDMMC_COMMAND_RESPONSE_t

ETH_MAC

  • Changed:
    • XMC_ETH_MAC_BUF_SIZE Change XMC_ETH_MAC_BUF_SIZE to 1524 to allow for Tagged MAC frame format
  • Fixed:
    • XMC_ETH_MAC_DisableEvent() Fixed functionality

ERU

  • Added:
    • XMC_ERU_ETL_GetEdgeDetection()

DMA

  • Fixed:
    • XMC_DMA_IRQHandler() Clear channel event status before processing the event handler. It corrects event losses if the DMA triggered in the event handler finished before returning from handler.
  • Changed:
    • XMC_DMA_CH_EnableEvent(), XMC_DMA_CH_DisableEvent() Optimization of write only registers
    • XMC_DMA_ClearOverrunStatus() Optimization of write only registers

CCU4

  • Changed:
    • XMC_CCU4_EnableShadowTransfer() Optimization of write only registers

CCU8

  • Fixed:
    • Use correct API implementation for XMC43, XMC47/48 devices
  • Changed:
    • XMC_CCU8_EnableShadowTransfer() Optimization of write only registers

EBU

  • Fixed:
    • XMC_EBU_BUS_READ_CONFIG_t: Added missing ebu_data_hold_cycles_for_read_accesses
    • XMC_EBU_BUS_WRITE_CONFIG_t Added missing ebu_device_addressing_mode and ebu_data_hold_cycles_for_write_accesses

POSIF

  • Changed:
    • XMC_POSIF_Start(), XMC_POSIF_Stop() Optimization of write only registers
    • XMC_POSIF_HSC_UpdateHallPattern(): Optimization of write only registers
    • XMC_POSIF_SetEvent(), XMC_POSIF_ClearEvent() Optimization of write only registers

USIC

  • Added:
    • XMC_USIC_CH_TXFIFO_PutDataHPCMode()
  • Changed:
    • XMC_USIC_CH_TriggerServiceRequest() Optimization of write only registers
    • XMC_USIC_CH_TXFIFO_Flush(), XMC_USIC_CH_RXFIFO_Flush() Optimization of write only registers
    • XMC_USIC_CH_TXFIFO_ClearEvent(), XMC_USIC_CH_RXFIFO_ClearEvent() Optimization of write only registers

SPI

  • Added:
    • XMC_SPI_CH_SetTransmitMode()

VADC

  • Fixed:
    • XMC_VADC_GLOBAL_SHS_IsConverterReady() Fixed functionality, check SHSCFG instead of STEPCFG
  • Changed:
    • XMC_VADC_GROUP_QueueClearReqSrcEvent() Optimization of write only registers
    • XMC_VADC_GROUP_ChannelClearEvent() Optimization of write only registers

FLASH

  • Fixed:
    • XMC_PREFETCH_EnableInstructionBuffer(), XMC_PREFETCH_DisableInstructionBuffer Fixed functionality
    • XMC_PREFETCH_InvalidateInstructionBuffer() Fixed functionality

GPIO

  • Fixed:
    • Map file SDMMC signals names EBU CS signal names
  • Added:
    • Map file P2_0_AF_CAN_N0_TXD for XMC44xx P1_9_AF_U0C0_SCLKOUT, P4_7_AF_U2C1_DOUT0, P6_6_AF_U2C0_DOUT0 for XMC47/48 BGA196

Version 2.1.4

GENERAL

  • Added:
    • Added EtherCAT driver
    • Added support for XMC4300 series

ETH_MAC

  • Fixed:
    • XMC_ETH_MAC_GetRxFrameSize return value in case of errors

ETH_PHY

  • Added:
    • XMC_ETH_PHY_ExitPowerDown(), XMC_ETH_PHY_Reset()

VADC

  • Fixed:
    • XMC_VADC_GLOBAL_TriggerEvent API fixed. OR operation removed.
    • XMC_VADC_GLOBAL_ClearEvent API fixed. Multiple events triggering on clearing the event is fixed.
    • Wrong MACRO name defined in xmc_vadc_map.h file corrected for XMC4200/4100 devices. XMC_VADC_G3_SAMPLE renamed to XMC_VADC_G1_SAMPLE

FLASH

  • Fixed:
    • Flash access time
    • Wait until operation is finished for the next functions:
      1. XMC_FLASH_InstallProtection
      2. XMC_FLASH_ConfirmProtection
      3. XMC_FLASH_ProgramPage
      4. XMC_FLASH_EraseSector
      5. XMC_FLASH_ErasePhysicalSector
      6. XMC_FLASH_EraseUCB

Fix XMC_FLASH_VerifyReadProtection and XMC_FLASH_VerifyWriteProtection

SDMMC

  • Added:
    • XMC_SDMMC_EnableDelayCmdDatLines(), XMC_SDMMC_DisableDelayCmdDatLines(), XMC_SDMMC_SetDelay(),
    • XMC_SDMMC_EnableHighSpeed(), XMC_SDMMC_DisableHighSpeed()

SPI

  • Added:
    • XMC_SPI_CH_EnableSlaveSelectCodedMode() and XMC_SPI_CH_DisableSlaveSelectCodedMode()

Version 2.1.2

GENERAL

  • Added:
    • Added I2S driver
    • Added support for XMC4700 and XMC4800 series

DSD

  • Added:
    • XMC_DSD_SetResultEventFlag(), XMC_DSD_ClearResultEventFlag(), XMC_DSD_SetAlarmEventFlag() and XMC_DSD_ClearAlarmEventFlag()

CCU4

  • Changed:
    • XMC_CCU4_EnableShadowTransfer() API is made as inline, to improve the speed
  • Added:
    • XMC_CCU4_SLICE_PRESCALER_t enum is added to set the prescaler divider
    • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_t, two more enum items are added to support external count direction settings
    • XMC_CCU4_SLICE_MULTI_IRQ_ID_t is added to support the XMC_CCU4_SLICE_EnableMultipleEvents() and XMC_CCU4_SLICE_DisableMultipleEvents() APIs
    • Map files added macros with peripheral names for readability

CCU8

  • Changed:
    • XMC_CCU8_EnableShadowTransfer() API is made as inline, to improve the speed
    • XMC_CCU8_SLICE_GetEvent() is made as inline
  • Added:
    • XMC_CCU8_SLICE_PRESCALER_t enum is added to set the prescaler divider
    • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t is added for all the devices except XMC45 devices, to set when the shadow transfer has to happen
    • XMC_CCU8_SOURCE_OUT0_t, XMC_CCU8_SOURCE_OUT1_t, XMC_CCU8_SOURCE_OUT2_t, XMC_CCU8_SOURCE_OUT3_t enums are added to map one of the ST to OUT0, OUT1, OUT3, OUT4 signals
    • In XMC_CCU8_SLICE_COMPARE_CONFIG_t structure, selector_out0, selector_out1, selector_out2, selector_out3 are added to support XMC14 devices
    • XMC_CCU8_SLICE_EnableCascadedShadowTransfer(), XMC_CCU8_SLICE_DisableCascadedShadowTransfer(),XMC_CCU8_SLICE_SetShadowTransferMode() API are supported for all the devices except XMC45
    • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t, two more enum items are added to support external count direction settings
    • XMC_CCU8_SLICE_SetTimerCompareMatchChannel1(), XMC_CCU8_SLICE_SetTimerCompareMatchChannel2() inline APIs are added to update the respective compare registers directly
    • XMC_CCU8_SLICE_MULTI_IRQ_ID_t is added to support the XMC_CCU8_SLICE_EnableMultipleEvents() and XMC_CCU8_SLICE_DisableMultipleEvents() APIs
    • Map files added macros with peripheral names for readability

I2C

  • Changed:
    • XMC_I2C_CH_SetInputSource() API for avoiding complete DXCR register overwriting
    • XMC_I2C_CH_EVENT_t enum for supporting XMC_I2C_CH_EnableEvent() and XMC_I2C_CH_DisableEvent() for supporting multiple events configuration
  • Added:
    • APIs for external input for BRG configuration:XMC_I2C_CH_ConfigExternalInputSignalToBRG()
    • APIs for enabling or disabling the ACK response to a 0x00 slave address: XMC_I2C_CH_EnableAcknowledgeAddress0() and XMC_I2C_CH_DisableAcknowledgeAddress0()
  • Fixed:
    • 10bit addressing

SPI

  • Changed:
    • XMC_SPI_CH_SetInputSource() for avoiding complete DXCR register overwriting
    • XMC_SPI_CH_EVENT_t enum for supporting XMC_SPI_CH_EnableEvent() and XMC_SPI_CH_DisableEvent() for supporting multiple events configuration
  • Added:
    • APIs for enabling/disabling delay compensation XMC_SPI_CH_DisableDelayCompensation() and XMC_SPI_CH_EnableDelayCompensation()
    • Added APIs for external input for BRG configuration:XMC_SPI_CH_ConfigExternalInputSignalToBRG()
    • API for configuring the receiving clock phase in the slave:XMC_SPI_CH_DataLatchedInTrailingEdge() and XMC_SPI_CH_DataLatchedInLeadingEdge()

UART

  • Changed:
    • XMC_UART_CH_SetInputSource() for avoiding complete DXCR register overwriting
    • XMC_UART_CH_EVENT_t enum for supporting XMC_UART_CH_EnableEvent() and XMC_UART_CH_DisableEvent() for supporting multiple events configuration

FLASH

  • Added:
    • XMC_FLASH_Reset
    • XMC_FLASH_ErasePhysicalSector
    • XMC_FLASH_EraseUCB
    • XMC_FLASH_ResumeProtection
    • XMC_FLASH_RepairPhysicalSector

WDT

  • Fixed:
    • XMC_WDT_SetDebugMode() API, Wrong register is being configured

VADC

  • Added:
    • XMC_VADC_GLOBAL_SetIndividualBoundary
    • XMC_VADC_GROUP_SetIndividualBoundary
    • XMC_VADC_GROUP_GetAlias
    • XMC_VADC_GROUP_GetInputClass
    • XMC_VADC_GROUP_ChannelSetIclass
    • XMC_VADC_GROUP_ChannelGetResultAlignment
    • XMC_VADC_GROUP_ChannelGetInputClass
    • XMC_VADC_GROUP_SetResultSubtractionValue

SCU

  • Added:
    • XMC_SCU_CLOCK_SetDeepSleepConfig(),XMC_SCU_CLOCK_SetSleepConfig()

CAN

  • Added:
    • XMC48/47 new signature for XMC_CAN_GetBaudrateClockFrequency(), XMC_CAN_Init(), XMC_CAN_SetBaudrateClockSource(), XMC_CAN_GetBaudrateClockSource()

Version 2.0.0

GENERAL

  • Removed:
    • version macros and declaration of GetDriverVersion()

CAN

  • Added:
    • XMC_CAN_NODE_ClearStatus()
    • XMC_CAN_MO_ReceiveData()
    • XMC_CAN_GATEWAY_InitDesObject()
    • XMC_CAN_NODE_Enable()
  • Changed:
    • XMC_CAN_MO_Config(). Changed signature.
  • Fixed:
    • XMC_CAN_TXFIFO_ConfigMOSlaveObject()

CCU4

  • Fixed:
    • XMC_CCU4_SLICE_StartConfig(). Assert condition.

CCU8

  • Added:
    • XMC_CCU8_SLICE_LoadSelector()
  • Fixed:
    • XMC_CCU8_SLICE_CHECK_INTERRUPT macro. Fixed the missing item for compare match down for channel 2

DMA

  • Added:
    • XMC_DMA_DisableRequestLine()
    • XMC_DMA_ClearRequestLine()
    • XMC_DMA_CH_ClearSourcePeripheralRequest()
    • XMC_DMA_CH_ClearDestinationPeripheralRequest()
  • Changed:
    • XMC_DMA_LLI_t structure. Members src_addr and dst_addr are now uint32_t.
    • XMC_DMA_CH_SetSourceAddress(). Changed type of addr parameter to uint32_t
    • XMC_DMA_CH_SetdestinationAddress(). Changed type of addr parameter to uint32_t

HRPWM

  • Added:
    • XMC_HRPWM_CSG_SelClampingInput()
    • XMC_HRPWM_SHADOW_TX_DAC_t
  • Fixed:
    • CSG trimming data assignment is corrected.
  • Removed:
    • XMC_HRPWM_SHADOW_TX_t. Gets renamed to XMC_HRPWM_SHADOW_TX_DAC_t

I2C

  • Added:
    • XMC_I2C_CH_TriggerServiceRequest()
    • XMC_I2C_CH_SelectInterruptNodePointer()
  • Fixed:
    • XMC_I2C_CH_Stop(). Check if transmission is going before setting the channel to idle.

LEDTS

  • Added:
    • XMC_LEDTS_SetActivePADNo()

POSIF

  • Changed:
    • XMC_POSIF_QD_GetDirection(). Fixed read direction

RTC

  • Changed:
    • XMC_RTC_Init(). Check RTC running condition.

SCU

  • Added:
    • For XMC11 series, XMC_SCU_SetRawTempLimits()
    • For XMC11 series, XMC_SCU_StartTempMeasurement()
    • For XMC11 series, XMC_SCU_StopTempMeasurement()
    • For XMC11 series, XMC_SCU_HighTemperature()
    • For XMC11 series, XMC_SCU_LowTemperature()
    • For XMC11 series, XMC_SCU_GetTemperature()
  • Changed:
    • XMC_SCU_INTERRUPT_SetEventHandler(). New implementation
    • XMC_SCU_IRQHandler(). New implementation

SPI

  • Added:
    • XMC_SPI_CH_SetSlaveSelectDelay()
    • XMC_SPI_CH_TriggerServiceRequest()
    • XMC_SPI_CH_SelectInterruptNodePointer()
    • XMC_SPI_CH_SetInterwordDelaySCLK()

UART

  • Added:
    • XMC_UART_CH_TriggerServiceRequest()
    • XMC_UART_CH_SelectInterruptNodePointer()
  • Fixed:
    • XMC_UART_CH_INPUT_t enum contents.
    • XMC_UART_CH_Stop(). Check if transmission is going before setting the channel to idle.

USBD

  • Fixed:
    • XMC_USBD_EndpointStall(). Fix issue on USB clear stall
    • XMC_USBD_EndpointConfigure(). Fix issue in EP0 configuration
    • XMC_USBD_Disable(). Gate the clock after programming the SCU registers
    • XMC_USBD_IRQHandler(). Removed the DAVE_CE check on SOF event

VADC

  • Added:
    • XMC_VADC_GLOBAL_SHS_Init()
    • XMC_VADC_GLOBAL_SHS_SetStepperSequence()
    • XMC_VADC_GLOBAL_SHS_IsConverterReady()
    • XMC_VADC_GLOBAL_SHS_DisableAcceleratedMode()
    • XMC_VADC_GLOBAL_SHS_SetGainFactor()
    • XMC_VADC_GLOBAL_SHS_SetMaxCalTime()
    • XMC_VADC_GLOBAL_SHS_EnableGainAndOffsetCalibrations()
    • XMC_VADC_GLOBAL_SHS_DisableGainAndOffsetCalibrations()
    • XMC_VADC_GLOBAL_SHS_GetOffsetCalibrationValue()
    • XMC_VADC_GLOBAL_SHS_SetOffsetCalibrationValue()
    • XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop()
    • XMC_VADC_GLOBAL_SHS_EnableSigmaDeltaLoop()
    • XMC_VADC_GLOBAL_SHS_DisableSigmaDeltaLoop()
    • XMC_VADC_GROUP_SetBoundaryEventInterruptNode()
    • XMC_VADC_GROUP_ScanSelectTriggerEdge()
    • XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge()
    • XMC_VADC_GROUP_QueueSelectTriggerEdge()
    • XMC_VADC_GROUP_QueueFlushEntries()
    • XMC_VADC_GROUP_ChannelSetBoundarySelection()
  • Changed:
    • XMC_VADC_GLOBAL_GetResult(). Remove unnecessary masking, return result as 16bit.
    • XMC_VADC_GROUP_GetResult(). Remove unnecessary masking, return result as 16bit.
  • Fixed:
    • XMC_VADC_GROUP_ExternalMuxControlInit().
    • XMC_VADC_GLOBAL_SHS_SetClockDivider(). Disable write protection of DIVS bitfield.
    • XMC_VADC_GROUP_ScanSetGatingMode(). Clear current gating before applying the new requested one.
    • XMC_VADC_GLOBAL_BackgroundSetGatingMode(). Clear current gating before applying the new requested one.
    • XMC_VADC_GROUP_QueueSetGatingMode(). Clear current gating before applying the new requested one.

Version 1.0.0

  • Initial version
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Modules

Modules
Here is a list of all modules:
[detail level 12]
▼ XMC Peripheral Library |
CAN | Controller Area Network Controller (CAN) driver for the XMC microcontroller family
CCU4 | Capture Compare Unit 4 (CCU4) low level driver for XMC family of microcontrollers
CCU8 | Capture Compare Unit 8 (CCU8) low level driver for XMC family of microcontrollers
DAC | Digital to Analog Converter (DAC) driver for XMC 4000 microcontroller family.
DMA | General purpose DMA (GPDMA) driver for the XMC4000 microcontroller family
DSD | Delta Sigma Demodulator (DSD) driver for the XMC4500, XMC4400 and XMC4800 microcontroller family
EBU | External Bus Unit (EBU) driver for the XMC45/XMC47/XMC48 microcontroller
ECAT | EtherCAT Low level driver for XMC4800/XMC4300 series
ERU | Event Request Unit (ERU) driver for the XMC microcontroller family
ETH_MAC | Ethernet Low level driver for XMC4000 microcontroller family
ETH_PHY | Ethernet PHY driver for XMC4000 microcontroller family
FCE | Flexible CRC Engine(FCE) driver for the XMC microcontroller family
FLASH | Flash driver for XMC microcontroller family
GPIO | General Purpose Input Output (GPIO) driver for the XMC microcontroller family
HRPWM | High Resolution PWM Unit (HRPWM) driver for the XMC microcontroller family.
I2C | Inter Integrated Circuit(IIC) driver for the XMC microcontroller family
I2S | (IIS) driver for the XMC microcontroller family
LEDTS | LED and Touch-Sense control(LEDTS) driver for the XMC controller family
POSIF | Position Interface Unit (POSIF) driver for the XMC microcontroller family
RTC | RTC driver for XMC microcontroller family
SCU | System Control Unit(SCU) driver for XMC microcontroller family
SDMMC | Secure Digital/Multi Media Card (SDMMC) driver for the XMC4500 microcontroller
SPI | Synchronous serial channel driver for SPI-like communication
UART | Universal Asynchronous Receiver/Transmitter (UART) driver for XMC microcontroller family
USBD | Universal Serial Bus Device (USBD) driver for the XMC4000 microcontroller family
USBH | Universal Serial Bus Host (USBH) driver for the XMC4000 microcontroller family
USIC | Universal Serial Interface Channel(USIC) driver for serial communication
VADC | Versatile Analog to Digital Converter (VADC) driver for XMC microcontroller family
WDT | Watchdog driver for the XMC microcontroller family
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC Peripheral Library

Modules
XMC Peripheral Library

Modules

CAN
CCU4
CCU8
DAC
DMA
DSD
EBU
ECAT
ERU
ETH_MAC
ETH_PHY
FCE
FLASH
GPIO
HRPWM
I2C
I2S
LEDTS
POSIF
RTC
SCU
SDMMC
SPI
UART
USBD
USBH
USIC
VADC
WDT

Detailed Description

Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: CAN

Data Structures | Macros | Typedefs | Enumerations | Functions
CAN
XMC Peripheral Library

Data Structures

struct | XMC_CAN_FIFO_CONFIG_t
struct | XMC_CAN_GATEWAY_CONFIG_t
struct | XMC_CAN_MO_t
struct | XMC_CAN_NODE_FRAME_COUNTER_t
struct | XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t

Macros

#define | CAN_MO_MOIPR_Msk (0x7U)
#define | CAN_NODE_NIPR_Msk (0x7UL)
#define | XMC_CAN_MO_MOAR_STDID_Msk ((0x000007FFUL) << XMC_CAN_MO_MOAR_STDID_Pos)
#define | XMC_CAN_MO_MOAR_STDID_Pos (18U)

Typedefs

typedef CAN_NODE_TypeDef | XMC_CAN_NODE_t
typedef CAN_GLOBAL_TypeDef | XMC_CAN_t

Enumerations

Functions

void | XMC_CAN_AllocateMOtoNodeList (XMC_CAN_t *const obj, const uint8_t node_num, const uint8_t mo_num)
void | XMC_CAN_Disable (XMC_CAN_t *const obj)
void | XMC_CAN_Enable (XMC_CAN_t *const obj)
void | XMC_CAN_EventTrigger (XMC_CAN_t *const obj, const XMC_CAN_NODE_INTERRUPT_TRIGGER_t service_requestr)
void | XMC_CAN_FIFO_DisableForeingRemoteRequest (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_DisableRemoteMonitoring (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_DisableSingleDataTransfer (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_EnableForeignRemoteRequest (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_EnableRemoteMonitoring (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_EnableSingleDataTransfer (const XMC_CAN_MO_t *const can_mo)
uint8_t | XMC_CAN_FIFO_GetCurrentMO (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_SetSELMO (const XMC_CAN_MO_t *const can_mo, const uint8_t select_pointer)
void | XMC_CAN_GATEWAY_InitDesObject (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_GATEWAY_InitSourceObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_GATEWAY_CONFIG_t can_gateway)
void | XMC_CAN_Init (XMC_CAN_t *const obj, uint32_t can_frequency)
bool | XMC_CAN_IsPanelControlReady (XMC_CAN_t *const obj)
void | XMC_CAN_MO_AcceptOnlyMatchingIDE (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_AcceptStandardAndExtendedID (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_Config (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_DataLengthCode (const XMC_CAN_MO_t *const can_mo, const uint8_t data_length_code)
void | XMC_CAN_MO_DisableEvent (const XMC_CAN_MO_t *const can_mo, const uint32_t event)
void | XMC_CAN_MO_DisableSingleTransmitTrial (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_EnableEvent (const XMC_CAN_MO_t *const can_mo, const uint32_t event)
void | XMC_CAN_MO_EnableSingleTransmitTrial (const XMC_CAN_MO_t *const can_mo)
uint32_t | XMC_CAN_MO_GetAcceptanceMask (const XMC_CAN_MO_t *const can_mo)
uint8_t | XMC_CAN_MO_GetDataLengthCode (const XMC_CAN_MO_t *const can_mo)
uint32_t | XMC_CAN_MO_GetIdentifier (const XMC_CAN_MO_t *const can_mo)
uint32_t | XMC_CAN_MO_GetStatus (const XMC_CAN_MO_t *const can_mo)
XMC_CAN_STATUS_t | XMC_CAN_MO_Receive (XMC_CAN_MO_t *can_mo)
XMC_CAN_STATUS_t | XMC_CAN_MO_ReceiveData (XMC_CAN_MO_t *can_mo)
void | XMC_CAN_MO_ResetStatus (const XMC_CAN_MO_t *const can_mo, const uint32_t mask)
void | XMC_CAN_MO_SetAcceptanceMask (XMC_CAN_MO_t *const can_mo, const uint32_t can_id_mask)
void | XMC_CAN_MO_SetDataLengthCode (XMC_CAN_MO_t *const can_mo, const uint8_t data_length_code)
void | XMC_CAN_MO_SetEventNodePointer (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_MO_POINTER_EVENT_t can_mo_ptr_int, const uint32_t service_request)
void | XMC_CAN_MO_SetExtendedID (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_SetIdentifier (XMC_CAN_MO_t *const can_mo, const uint32_t can_identifier)
void | XMC_CAN_MO_SetStandardID (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_SetStatus (const XMC_CAN_MO_t *const can_mo, const uint32_t mask)
XMC_CAN_STATUS_t | XMC_CAN_MO_Transmit (const XMC_CAN_MO_t *const can_mo)
XMC_CAN_STATUS_t | XMC_CAN_MO_UpdateData (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_NODE_ClearStatus (XMC_CAN_NODE_t *const can_node, XMC_CAN_NODE_STATUS_t can_node_status)
void | XMC_CAN_NODE_Disable (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_DisableConfigurationChange (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_DisableEvent (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_EVENT_t event)
void | XMC_CAN_NODE_DisableLoopBack (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_Enable (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_EnableConfigurationChange (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_EnableEvent (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_EVENT_t event)
void | XMC_CAN_NODE_EnableLoopBack (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_EnableSuspend (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_FrameCounterConfigure (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_FRAME_COUNTER_t *const can_node_init)
uint16_t | XMC_CAN_NODE_GetCANFrameCounter (XMC_CAN_NODE_t *const can_node)
uint8_t | XMC_CAN_NODE_GetErrorWarningLevel (XMC_CAN_NODE_t *const can_node)
XMC_CAN_NODE_LAST_ERROR_DIR_t | XMC_CAN_NODE_GetLastErrTransferDir (XMC_CAN_NODE_t *const node)
XMC_CAN_NODE_LAST_ERROR_INC_t | XMC_CAN_NODE_GetLastErrTransferInc (XMC_CAN_NODE_t *const node)
uint8_t | XMC_CAN_NODE_GetReceiveErrorCounter (XMC_CAN_NODE_t *const can_node)
uint32_t | XMC_CAN_NODE_GetStatus (XMC_CAN_NODE_t *const can_node)
uint8_t | XMC_CAN_NODE_GetTransmitErrorCounter (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_NominalBitTimeConfigure (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t *const can_bit_time)
void | XMC_CAN_NODE_ReSetAnalyzerMode (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_ResetInitBit (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_SetAnalyzerMode (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_SetErrorWarningLevel (XMC_CAN_NODE_t *const can_node, uint8_t error_warning_level)
void | XMC_CAN_NODE_SetEventNodePointer (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_POINTER_EVENT_t ptr_event, const uint32_t service_request)
void | XMC_CAN_NODE_SetInitBit (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_SetReceiveErrorCounter (XMC_CAN_NODE_t *const can_node, uint8_t can_rec)
void | XMC_CAN_NODE_SetReceiveInput (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_RECEIVE_INPUT_t input)
void | XMC_CAN_NODE_SetTransmitErrorCounter (XMC_CAN_NODE_t *const can_node, uint8_t can_tec)
void | XMC_CAN_PanelControl (XMC_CAN_t *const obj, const XMC_CAN_PANCMD_t pancmd, const uint8_t arg1, const uint8_t arg2)
void | XMC_CAN_RXFIFO_ConfigMOBaseObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_FIFO_CONFIG_t can_fifo)
void | XMC_CAN_RXFIFO_ConfigMOSlaveObject (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_TXFIFO_ConfigMOBaseObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_FIFO_CONFIG_t can_fifo)
void | XMC_CAN_TXFIFO_ConfigMOSlaveObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_FIFO_CONFIG_t can_fifo)
XMC_CAN_STATUS_t | XMC_CAN_TXFIFO_Transmit (const XMC_CAN_MO_t *const can_mo)

Detailed Description

CAN driver provides transfer of CAN frames in accordance with CAN specificetion V2.0 B (active). Each CAN node can receive and transmit standard frames with 11-bit identifiers as well as extended frames with 29-bit identifiers. All CAN nodes share a common set of message objects. Each message object can be individually allocated to one of the CAN nodes. Besides serving as a storage container for incoming and outgoing frames, message objects can be combined to build gateways between the CAN nodes or to setup a FIFO buffer. The CAN module provides Analyzer mode,Loop-back mode and bit timming for node analysis.

The driver is divided into five sections:

CAN Global features:
  1. Allows to configure module frequency using function XMC_CAN_Init().
  2. Allows to configure Module interrupt using configuration structure XMC_CAN_NODE_INTERRUPT_TRIGGER_t and function XMC_CAN_EventTrigger().
CAN_NODE features:
  1. Allows to set baud rate by configuration structure XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t and Baudrate Configuration function XMC_CAN_NODE_NominalBitTimeConfigure().
  2. Allows to configure loop-back mode using fuction XMC_CAN_NODE_EnableLoopBack().
  3. Allows to configure CAN Node analyzer using function XMC_CAN_NODE_SetAnalyzerMode().
  4. Allows CAN node events enable/ disable by enum structure XMC_CAN_NODE_EVENT_t and functions XMC_CAN_NODE_EnableEvent() and XMC_CAN_NODE_DisableEvent().
  5. Provides bit timming analysis, configuration structure XMC_CAN_NODE_FRAME_COUNTER_t and function XMC_CAN_NODE_FrameCounterConfigure().
CAN_MO features:
  1. Allows message object initialization by configuration structure XMC_CAN_MO_t and function XMC_CAN_MO_Config().
  2. Allows transfer of message objects using functions XMC_CAN_MO_Transmit() and XMC_CAN_MO_Receive().
  3. Allows to configure Single Data Transfer and Single Transmit Trial using functions XMC_CAN_MO_EnableSingleTransmitTrial() and XMC_CAN_MO_EnableSingleTransmitTrial().
  4. Allows to configure MO events using function XMC_CAN_MO_EnableEvent().
CAN_FIFO features:
  1. Allows message object FIFO structure by configuration structure XMC_CAN_FIFO_CONFIG_t and functions XMC_CAN_TXFIFO_ConfigMOBaseObject() , XMC_CAN_RXFIFO_ConfigMOBaseObject() and XMC_CAN_TXFIFO_Transmit().
CAN_GATEWAY features:
  1. Provides Gateway mode, configuration structure XMC_CAN_GATEWAY_CONFIG_t and function XMC_CAN_GATEWAY_InitSourceObject().

Macro Definition Documentation

#define CAN_MO_MOIPR_Msk (0x7U)

Message Object event mask

#define CAN_NODE_NIPR_Msk (0x7UL)

Node event mask

#define XMC_CAN_MO_MOAR_STDID_Msk ((0x000007FFUL) << XMC_CAN_MO_MOAR_STDID_Pos)

Standard Identifier bitMask

#define XMC_CAN_MO_MOAR_STDID_Pos (18U)

Standard Identifier bitposition

Typedef Documentation

typedef CAN_NODE_TypeDef XMC_CAN_NODE_t

Defines Node Runtime structure.pointer to the Node CAN register

typedef CAN_GLOBAL_TypeDef XMC_CAN_t

Defines CAN Global Initialization structure

Enumeration Type Documentation

enum XMC_CAN_ARBITRATION_MODE_t

Defines arbitration mode for transmit acceptance filtering. Use type XMC_CAN_ARBITRATION_MODE_t for this enum.

Enumerator
XMC_CAN_ARBITRATION_MODE_ORDER_BASED_PRIO_1 | Transmit acceptance based in the order(prio)
XMC_CAN_ARBITRATION_MODE_IDE_DIR_BASED_PRIO_2 | Transmit acceptance filtering is based on the CAN identifier
XMC_CAN_ARBITRATION_MODE_ORDER_BASED_PRIO_3 | Transmit acceptance based in the order
enum XMC_CAN_CANCLKSRC_t

Defines the Clock source used for the MCAN peripheral.

Note
Only available for XMC1400, XMC4800 and XMC4700 series
enum XMC_CAN_DM_t

Defines the Divider Modes. Use type XMC_CAN_DM_t for this enum.

Enumerator
XMC_CAN_DM_NORMAL | Normal divider mode
XMC_CAN_DM_FRACTIONAL | Fractional divider mode
XMC_CAN_DM_OFF | Divider Mode in off-state
enum XMC_CAN_FRAME_COUNT_MODE_t

Defines the operation mode of the frame counter. Use type XMC_CAN_FRAME_COUNT_MODE_t for this enum.

Enumerator
XMC_CAN_FRAME_COUNT_MODE | Frame Count Mode
XMC_CAN_FRAME_COUNT_MODE_TIME_STAMP | The frame counter is incremented with the beginning of a new bit time
XMC_CAN_FRAME_COUNT_MODE_BIT_TIMING | Used for baud rate detection and analysis of the bit timing
enum XMC_CAN_FRAME_TYPE_t

Defines Data frame types. Use type XMC_CAN_FRAME_TYPE_t for this enum.

Enumerator
XMC_CAN_FRAME_TYPE_STANDARD_11BITS | Standard type identifier
XMC_CAN_FRAME_TYPE_EXTENDED_29BITS | Extended type identifier
enum XMC_CAN_LOOKBACKMODE_t

Defines loop Back Mode, to enable/disable an in-system test of the MultiCAN module . Use type XMC_CAN_LOOKBACKMODE_t for this enum.

Enumerator
XMC_CAN_LOOKBACKMODE_ENABLED | Each CAN node can be connected to the internal CAN bus
XMC_CAN_LOOKBACKMODE_DISABLED | Each CAN node can be connected to the external CAN bus
enum XMC_CAN_MO_EVENT_t

Defines mask value for CAN Message Object event type. Use type XMC_CAN_MO_EVENT_t for this enum.

Enumerator
XMC_CAN_MO_EVENT_TRANSMIT | Message Object transmit event
XMC_CAN_MO_EVENT_RECEIVE | Message Object receive event
XMC_CAN_MO_EVENT_OVERFLOW | Message Object overflow event
enum XMC_CAN_MO_POINTER_EVENT_t

Defines CAN Message Object event node pointer position. Use type XMC_CAN_MO_POINTER_EVENT_t for this enum.

Enumerator
XMC_CAN_MO_POINTER_EVENT_TRANSMIT | Transmit Event node pointer
XMC_CAN_MO_POINTER_EVENT_RECEIVE | Receive Event node pointer
enum XMC_CAN_MO_RESET_STATUS_t

Defines mask value for CAN Message Object reset status. Use type XMC_CAN_MO_RESET_STATUS_t for this enum.

Enumerator
XMC_CAN_MO_RESET_STATUS_RX_PENDING | Reset receive pending
XMC_CAN_MO_RESET_STATUS_TX_PENDING | Reset transmit pending
XMC_CAN_MO_RESET_STATUS_RX_UPDATING | Reset receive updating
XMC_CAN_MO_RESET_STATUS_NEW_DATA | Reset new data
XMC_CAN_MO_RESET_STATUS_MESSAGE_LOST | Reset message lost
XMC_CAN_MO_RESET_STATUS_MESSAGE_VALID | Reset message valid
XMC_CAN_MO_RESET_STATUS_RX_TX_SELECTED | Reset transmit/receive selected
XMC_CAN_MO_RESET_STATUS_RX_ENABLE | Reset receive enable
XMC_CAN_MO_RESET_STATUS_TX_REQUEST | Reset transmit request
XMC_CAN_MO_RESET_STATUS_TX_ENABLE0 | Reset transmit enable 0
XMC_CAN_MO_RESET_STATUS_TX_ENABLE1 | Reset transmit enable 1
XMC_CAN_MO_RESET_STATUS_MESSAGE_DIRECTION | Reset message direction
enum XMC_CAN_MO_SET_STATUS_t

Defines mask value for CAN Message Object set status. Use type XMC_CAN_MO_SET_STATUS_t for this enum.

Enumerator
XMC_CAN_MO_SET_STATUS_RX_PENDING | Set receive pending
XMC_CAN_MO_SET_STATUS_TX_PENDING | Set transmit pending
XMC_CAN_MO_SET_STATUS_RX_UPDATING | Set receive updating
XMC_CAN_MO_SET_STATUS_NEW_DATA | Set new data
XMC_CAN_MO_SET_STATUS_MESSAGE_LOST | Set message lost
XMC_CAN_MO_SET_STATUS_MESSAGE_VALID | Set message valid
XMC_CAN_MO_SET_STATUS_RX_TX_SELECTED | Set transmit/receive selected
XMC_CAN_MO_SET_STATUS_RX_ENABLE | Set receive enable
XMC_CAN_MO_SET_STATUS_TX_REQUEST | Set transmit request
XMC_CAN_MO_SET_STATUS_TX_ENABLE0 | Set transmit enable 0
XMC_CAN_MO_SET_STATUS_TX_ENABLE1 | Set transmit enable 1
XMC_CAN_MO_SET_STATUS_MESSAGE_DIRECTION | Set message direction
enum XMC_CAN_MO_STATUS_t

Defines mask value for CAN Message Object status. Use type XMC_CAN_MO_STATUS_t for this enum.

Enumerator
XMC_CAN_MO_STATUS_RX_PENDING | Defines message has been successfully received or not received
XMC_CAN_MO_STATUS_TX_PENDING | Defines message has been successfully transmitted or not transmitted
XMC_CAN_MO_STATUS_RX_UPDATING | Defines Message identifier, DLC, and data of the message object are currently updated or not updated
XMC_CAN_MO_STATUS_NEW_DATA | Defines no update of the message object since last flag reset or Message object has been updated
XMC_CAN_MO_STATUS_MESSAGE_LOST | CAN message is lost because NEWDAT has become set again when it has already been set or No CAN message is lost
XMC_CAN_MO_STATUS_MESSAGE_VALID | Message valid
XMC_CAN_MO_STATUS_RX_TX_SELECTED | Transmit/Receive selected
XMC_CAN_MO_STATUS_RX_ENABLE | Receive enable
XMC_CAN_MO_STATUS_TX_REQUEST | Transmit request
XMC_CAN_MO_STATUS_TX_ENABLE0 | Transmit enable 0
XMC_CAN_MO_STATUS_TX_ENABLE1 | Transmit enable 1
XMC_CAN_MO_STATUS_MESSAGE_DIRECTION | Message direction
XMC_CAN_MO_STATUS_LIST | List allocation
XMC_CAN_MO_STATUS_POINTER_TO_PREVIOUS_MO | Pointer to previous Message Object
XMC_CAN_MO_STATUS_POINTER_TO_NEXT_MO | Pointer to next Message Object
enum XMC_CAN_MO_TYPE_t

Defines Message Object direction. Use type XMC_CAN_MO_TYPE_t for this enum.

Enumerator
XMC_CAN_MO_TYPE_RECMSGOBJ | Receive Message Object selected
XMC_CAN_MO_TYPE_TRANSMSGOBJ | Transmit Message Object selected
enum XMC_CAN_NODE_CONTROL_t

Defines mask value for CAN Node control like initialization, node disable and analyzer mode . Use type XMC_CAN_NODE_CONTROL_t for this enum.

Enumerator
XMC_CAN_NODE_CONTROL_NODE_INIT | Node initialization
XMC_CAN_NODE_CONTROL_TX_INT_ENABLE | Transfer event enable
XMC_CAN_NODE_CONTROL_LEC_INT_ENABLE | LEC Indicated Error Event Enable
XMC_CAN_NODE_CONTROL_ALERT_INT_ENABLE | Alert Event Enable
XMC_CAN_NODE_CONTROL_CAN_DISABLE | CAN disable
XMC_CAN_NODE_CONTROL_CONF_CHANGE_ENABLE | Configuration change enable
XMC_CAN_NODE_CONTROL_CAN_ANALYZER_NODEDE | CAN Analyzer mode
XMC_CAN_NODE_CONTROL_SUSPENDED_ENABLE | Suspend Enable
enum XMC_CAN_NODE_EVENT_t

Defines mask value for CAN Node events. Use type XMC_CAN_NODE_EVENT_t for this enum.

Enumerator
XMC_CAN_NODE_EVENT_TX_INT | Node Transfer OK Event
XMC_CAN_NODE_EVENT_ALERT | Node Alert Event
XMC_CAN_NODE_EVENT_LEC | Last Error code Event
XMC_CAN_NODE_EVENT_CFCIE | CAN Frame Count Event
enum XMC_CAN_NODE_INTERRUPT_TRIGGER_t

Defines interrupt request on interrupt output line INT_O[n]. Use type XMC_CAN_NODE_INTERRUPT_TRIGGER_t for this enum.

enum XMC_CAN_NODE_LAST_ERROR_DIR_t

Defines last error transfer direction. Use type XMC_CAN_NODE_LAST_ERROR_DIR_t for this enum.

Enumerator
XMC_CAN_NODE_LAST_ERROR_DIR_WHILE_NODE_RECEPCION | The last error occurred while the CAN node x was receiver
XMC_CAN_NODE_LAST_ERROR_DIR_WHILE_NODE_TRANSMISSION | The last error occurred while the CAN node x was transmitter
enum XMC_CAN_NODE_LAST_ERROR_INC_t

Defines last error increment. Use type XMC_CAN_NODE_LAST_ERROR_INC_t for this enum.

Enumerator
XMC_CAN_NODE_LAST_ERROR_INC_1 | The last error led to an error counter increment of 1.
XMC_CAN_NODE_LAST_ERROR_INC_8 | The last error led to an error counter increment of 8.
enum XMC_CAN_NODE_POINTER_EVENT_t

Defines mask value for CAN node pointer events position. Use type XMC_CAN_NODE_POINTER_EVENT_t for this enum.

Enumerator
XMC_CAN_NODE_POINTER_EVENT_ALERT | Node Alert Event node pointer
XMC_CAN_NODE_POINTER_EVENT_LEC | Last Error code Event node pointer
XMC_CAN_NODE_POINTER_EVENT_TRANSFER_OK | Transmit Event node pointer
XMC_CAN_NODE_POINTER_EVENT_FRAME_COUNTER | CAN Frame Count Event node pointer
enum XMC_CAN_NODE_RECEIVE_INPUT_t

Defines the possible receive inputs. Use type XMC_CAN_NODE_RECEIVE_INPUT_t for this enum.

Enumerator
XMC_CAN_NODE_RECEIVE_INPUT_RXDCA | CAN Receive Input A
XMC_CAN_NODE_RECEIVE_INPUT_RXDCB | CAN Receive Input B
XMC_CAN_NODE_RECEIVE_INPUT_RXDCC | CAN Receive Input C
XMC_CAN_NODE_RECEIVE_INPUT_RXDCD | CAN Receive Input D
XMC_CAN_NODE_RECEIVE_INPUT_RXDCE | CAN Receive Input E
XMC_CAN_NODE_RECEIVE_INPUT_RXDCF | CAN Receive Input F
XMC_CAN_NODE_RECEIVE_INPUT_RXDCG | CAN Receive Input G
XMC_CAN_NODE_RECEIVE_INPUT_RXDCH | CAN Receive Input H
enum XMC_CAN_NODE_STATUS_t

Defines mask value for CAN Node status. Use type XMC_CAN_NODE_STATUS_t for this enum.

Enumerator
XMC_CAN_NODE_STATUS_LAST_ERROR_CODE | Last Error Code
XMC_CAN_NODE_STATUS_TX_OK | Message transmitted successfully
XMC_CAN_NODE_STATUS_RX_OK | Message received successfully
XMC_CAN_NODE_STATUS_ALERT_WARNING | Alert warning
XMC_CAN_NODE_STATUS_ERROR_WARNING_STATUS | Error warning status
XMC_CAN_NODE_STATUS_BUS_OFF | Bus-off status
XMC_CAN_NODE_STATUS_LIST_LENGTH_ERROR | List length error
XMC_CAN_NODE_STATUS_LIST_OBJECT_ERROR | List object error
XMC_CAN_NODE_STATUS_SUSPENDED_ACK | Suspend Acknowledge
enum XMC_CAN_PANCMD_t

Defines CAN module Panel Commands . Use type XMC_CAN_PANCMD_t for this enum.

Enumerator
XMC_CAN_PANCMD_INIT_LIST | Command to initialize a list
XMC_CAN_PANCMD_STATIC_ALLOCATE | Command to activate static allocation
XMC_CAN_PANCMD_DYNAMIC_ALLOCATE | Command to activate dynamic allocation
XMC_CAN_PANCMD_STATIC_INSERT_BEFORE | Remove a message object from the list and insert it before a given object.
XMC_CAN_PANCMD_DYNAMIC_INSERT_BEFORE | Command to activate dynamic allocation
XMC_CAN_PANCMD_STATIC_INSERT_BEHIND | Command to activate dynamic allocation
XMC_CAN_PANCMD_DYNAMIC_INSERT_BEHIND | Command to activate dynamic allocation
enum XMC_CAN_STATUS_t

Defines the status of CAN, to verify the CAN related API calls. Use type XMC_CAN_STATUS_t for this enum.

Enumerator
XMC_CAN_STATUS_SUCCESS | Driver accepted application request
XMC_CAN_STATUS_ERROR | Returned when unknown error occurred
XMC_CAN_STATUS_BUSY | Driver is busy and can not handle request
XMC_CAN_STATUS_MO_NOT_ACCEPTABLE | Message object type not allowed
XMC_CAN_STATUS_MO_DISABLED | Returned if Message object is disabled

Function Documentation

void XMC_CAN_AllocateMOtoNodeList | ( | XMC_CAN_t *const | obj,
 |  | const uint8_t | node_num,
 |  | const uint8_t | mo_num
 | ) |  |
Parameters
obj | Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
node_num | CAN node number,Range : 0-2
mo_num | CAN Message Object number,Range : 0-63
Returns
None
Description:
Allocates Message Object from free list to node list. Each node_num is linked to one unique list of message objects. A CAN node performs message transfer only with the mo_num message objects that are allocated to the list of the CAN node. It configures PANCTR register.
Related APIs:
None
void XMC_CAN_Disable ( XMC_CAN_t *const obj )
Parameters
obj Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
Returns
None
Description:
Disables CAN module. In disabled state, no registers of CAN module can be read or written except the CAN_CLC register.
Related APIs:
XMC_CAN_Enable()

void XMC_CAN_Enable ( XMC_CAN_t *const obj )
Parameters
obj Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
Returns
None
Description:
Enables CAN module and initializes all CAN registers to reset values. It is required to re-configure desired CAN nodes, before any data transfer. It configures CAN_CLC.DISR bit.
Related APIs:
XMC_CAN_Disable()

void XMC_CAN_EventTrigger | ( | XMC_CAN_t *const | obj,
 |  | const XMC_CAN_NODE_INTERRUPT_TRIGGER_t | service_requestr
 | ) |  |
Parameters
obj | Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
service_requestr | Interrupt trigger number selection. Refer XMC_CAN_NODE_INTERRUPT_TRIGGER_t for valid values. Multiple interrupt trigger events can be ORed.
Returns
None
Description:
Configures multiple interrupt requests with a single write operation. service_requestr represents single interrupt request or multiple.It configures MITR register.
Related APIs:
None
void XMC_CAN_FIFO_DisableForeingRemoteRequest ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configuration allows to disable the FIFO Foreign Remote Request. TXRQ of message object n is set on reception of a matching Remote Frame. It configures MOFCR.FRREN register.
Related API's:
XMC_CAN_FIFO_EnableForeignRemoteRequest()

void XMC_CAN_FIFO_DisableRemoteMonitoring ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configuration allows to disable the FIFO Remote Monitoring. This Specifies Identifier, Identifier Extension bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. It configures MOFCR.RMM bit.
Related API's:
XMC_CAN_FIFO_EnableRemoteMonitoring()

Note:
Remote monitoring(RMM) applies only to transmit objects and has no effect on receive objects.
void XMC_CAN_FIFO_DisableSingleDataTransfer ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configuration allows to disable the Single Data Transfer of the FIFO Message Object, with this configuration bit MSGVAL is not affected. It configures MOFCR.SDT bit.
Related API's:
XMC_CAN_FIFO_EnableSingleDataTransfer()
void XMC_CAN_FIFO_EnableForeignRemoteRequest ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configuration allows to enable the FIFO Foreign Remote Request. This Specifies TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. It configures MOFCR.FRREN register.
Related API's:
XMC_CAN_FIFO_DisableForeingRemoteRequest()

void XMC_CAN_FIFO_EnableRemoteMonitoring ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configuration allows to enable the FIFO Remote Monitoring. This Specifies identifier, IDE(Identifier Extension) bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. It configures MOFCR.RMM bit.
Related API's:
XMC_CAN_FIFO_DisableRemoteMonitoring()

Note:
Remote monitoring(RMM) applies only to transmit objects and has no effect on receive objects.
void XMC_CAN_FIFO_EnableSingleDataTransfer ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configuration allows to enable the Single Data Transfer of the FIFO Message Object. If SDT = 1 and message object n is not a FIFO base object, then MSGVAL is reset when this object has taken part in a successful data transfer (receive or transmit). If SDT = 1 and message object n is a FIFO base object, then MSGVAL is reset when the pointer to the current object CUR reaches the value of SEL in the FIFO/Gateway Pointer Register. It configures MOFCR.SDT bit.
Related API's:
XMC_CAN_FIFO_DisableSingleDataTransfer()
uint8_t XMC_CAN_FIFO_GetCurrentMO ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
uint8_t Current Message Object Number. Range:0-63
Description:
Returns the current FIFO Message Object,points to the actual target object within a FIFO/Gateway structure.
Related API's:
None
void XMC_CAN_FIFO_SetSELMO | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const uint8_t | select_pointer
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
select_pointer | Selected Message Object number. Range:0-63
Returns
None
Description:
Set Object Select Pointer. If the current pointer CUR of FIFO base object becomes equal select_pointer, a FIFO overflow interrupt request is generated. Used for FIFO monitoring purpose.
Related API's:
None
void XMC_CAN_GATEWAY_InitDesObject ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configures the Gateway destination object. The Gateway Mode can_gateway makes it possible to establish an automatic information transfer between two independent CAN buses without CPU interaction. Please refer reference manual GatewayMode for more info.
Related API's:
None
void XMC_CAN_GATEWAY_InitSourceObject | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const XMC_CAN_GATEWAY_CONFIG_t | can_gateway
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_gateway | CAN gateway configuration data structure. Refer XMC_CAN_GATEWAY_CONFIG_t data structure for details.
Returns
None
Description:
Configures the Gateway source object. The Gateway Mode can_gateway makes it possible to establish an automatic information transfer between two independent CAN buses without CPU interaction. Please refer reference manual GatewayMode for more info.
Related API's:
None
void XMC_CAN_Init | ( | XMC_CAN_t *const | obj,
 |  | uint32_t | can_frequency
 | ) |  |
Parameters
obj | Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
can_frequency | CAN module frequency(fCAN). Range : 5MHz to 120MHz
Returns
None
Description:
Configures clock rate of the module timer clock fCAN. Altering CAN module can_frequency shall affects baud rate, call XMC_CAN_NODE_NominalBitTimeConfigure() to configure baud rate for current CAN frequency.It configures FDR register.
Related APIs:
XMC_CAN_NODE_NominalBitTimeConfigure()

bool XMC_CAN_IsPanelControlReady ( XMC_CAN_t *const obj )
Parameters
obj Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
Returns
Ready status of list controller
Description:
Returns ready status of the list controller
Related APIs:
XMC_CAN_PanelControl()
void XMC_CAN_MO_AcceptOnlyMatchingIDE ( XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Message object receives frames only with matching IDE bit.
Related API's:
XMC_CAN_MO_AcceptStandardAndExtendedID()
void XMC_CAN_MO_AcceptStandardAndExtendedID ( XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Message object accepts the reception of both, standard and extended frames.
Related API's:
XMC_CAN_MO_AcceptOnlyMatchingIDE()
void XMC_CAN_MO_Config ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Initializes CAN message object. Initialization includes configuring Message Object identifier type, Message Object identifier value, Message Object type, and transfer requests. It configures FDR register.
Related APIs:
None
void XMC_CAN_MO_DataLengthCode | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const uint8_t | data_length_code
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
data_length_code | transfer data length. Range:0-8
Returns
None
Description:
Configures CAN Message Object Data Length Code. It configures MOFCR register.
Related API's:
None
void XMC_CAN_MO_DisableEvent | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const uint32_t | event
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
event | CAN node Message Object event selection. Refer XMC_CAN_MO_EVENT_t for details.
Returns
None
Description:
Disable CAN Message Object events. event can be ORed multiple Message Object events. It configures MOFCR register.
Related API's:
XMC_CAN_MO_EnableEvent()
void XMC_CAN_MO_DisableSingleTransmitTrial ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Disable the single transmit trial(STT). In STT,TXRQ is cleared on transmission start of message object n. Thus, no transmission retry is performed in case of transmission failure. It configures MOFCR.STT bit.
Related API's:
XMC_CAN_MO_EnableSingleTransmitTrial()
void XMC_CAN_MO_EnableEvent | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const uint32_t | event
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
event | CAN node Message Object event selection. Refer XMC_CAN_MO_EVENT_t for details.
Returns
None
Description:
Enable CAN Message Object events. event can be ORed multiple Message Object events. It configures MOFCR register.
Related API's:
XMC_CAN_MO_DisableEvent()
void XMC_CAN_MO_EnableSingleTransmitTrial ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Enable the single transmit trial(STT). In STT,TXRQ is cleared on transmission start of message object n. Thus, no transmission retry is performed in case of transmission failure. It configures MOFCR.STT bit.
Related API's:
XMC_CAN_MO_DisableSingleTransmitTrial()
uint32_t XMC_CAN_MO_GetAcceptanceMask ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
Acceptance mask
Description:
Gets the acceptance mask for the CAN MO.
Related API's:
XMC_CAN_MO_SetAcceptanceMask()
uint8_t XMC_CAN_MO_GetDataLengthCode ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
Data length code
Description:
Gets the Data Length Code.
Related API's:
XMC_CAN_MO_SetDataLengthCode()
uint32_t XMC_CAN_MO_GetIdentifier ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
CAN MO identifier
Description:
Gets the Identifier of the MO
Related API's:
XMC_CAN_MO_SetIdentifier()
uint32_t XMC_CAN_MO_GetStatus ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
uint32_t Current Message Object status.
Description:
Returns Message Object status, that indicates message object transfer status and message object list status information such as the number of the current message object predecessor and successor message object, as well as the list number to which the message object is assigned.
Related API's:
None
XMC_CAN_STATUS_t XMC_CAN_MO_Receive ( XMC_CAN_MO_t * can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
XMC_CAN_STATUS_t CAN Node status. Refer XMC_CAN_STATUS_t structure for details.
Description:
Reads the Message Object data bytes, into message pointer passed as input parameter can_mo. can_data[0] of can_mo holds lower 4 bytes, can_data[1] of can_mo holds higher 4 bytes.
Related API's:
None
XMC_CAN_STATUS_t XMC_CAN_MO_ReceiveData ( XMC_CAN_MO_t * can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
XMC_CAN_STATUS_t CAN Node status. Refer XMC_CAN_STATUS_t structure for details.
Description:
Reads the Message Object data bytes, into message pointer passed as input parameter can_mo. can_data[0] of can_mo holds lower 4 bytes, can_data[1] of can_mo holds higher 4 bytes.
Related API's:
None
void XMC_CAN_MO_ResetStatus | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const uint32_t | mask
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
mask | Message Object set status selection. Refer XMC_CAN_MO_RESET_STATUS_t for details. Multiple enums can be ORed.
Returns
None
Description:
Clears Message Object interrupt events. It configures MOCTR register.
Related API's:
None
void XMC_CAN_MO_SetAcceptanceMask | ( | XMC_CAN_MO_t *const | can_mo,
 |  | const uint32_t | can_id_mask
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_id_mask | CAN MO acceptance mask.
Returns
None
Description:
Sets the acceptance mask of the MO
Related API's:
XMC_CAN_MO_GetAcceptanceMask()
void XMC_CAN_MO_SetDataLengthCode | ( | XMC_CAN_MO_t *const | can_mo,
 |  | const uint8_t | data_length_code
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
data_length_code | transfer data length. Range:0-8
Returns
None
Description:
Configures CAN Message Object Data Length Code. It configures MOFCR register.
Related API's:
XMC_CAN_MO_GetDataLengthCode()
void XMC_CAN_MO_SetEventNodePointer | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const XMC_CAN_MO_POINTER_EVENT_t | can_mo_ptr_int,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_mo_ptr_int | Message Object event node pointer selection. Refer XMC_CAN_MO_POINTER_EVENT_t structure for valid values.
service_request | interrupt output line of multiCAN module.
Returns
None
Description:
Configures Message Object event node pointer with service_request number. It configures MOIPR register.
Related API's:
None

< Message Object event mask

void XMC_CAN_MO_SetExtendedID ( XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Message object handles extended frames with 29-bit identifier.
Related API's:
XMC_CAN_MO_SetStandardID()
Note:
After setting the identifier type user has to set the identifier value by using XMC_CAN_MO_SetIdentifier() API.
void XMC_CAN_MO_SetIdentifier | ( | XMC_CAN_MO_t *const | can_mo,
 |  | const uint32_t | can_identifier
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_identifier | Identifier.
Returns
None
Description:
Configures CAN Message Object Identifier. It configures MOAR register.
Related API's:
XMC_CAN_MO_GetIdentifier()
void XMC_CAN_MO_SetStandardID ( XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Message object handles standard frames with 11-bit identifier.
Related API's:
XMC_CAN_MO_SetExtendedID()
Note:
After setting the identifier type user has to set the identifier value by using XMC_CAN_MO_SetIdentifier() API.
void XMC_CAN_MO_SetStatus | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const uint32_t | mask
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
mask | Message Object set status selection. Refer XMC_CAN_MO_SET_STATUS_t for details. Multiple enums can be ORed.
Returns
None
Description:
Configures Message Object set Status. It configures MOCTR register.
Related API's:
XMC_CAN_MO_ResetStatus()

XMC_CAN_STATUS_t XMC_CAN_MO_Transmit ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
XMC_CAN_STATUS_t CAN Node status. Refer XMC_CAN_STATUS_t structure for details.
Description:
Configures transmit request for sending data frame. It configures MOCTR register. Data shall be updated using XMC_CAN_MO_UpdateData() before calling this API.
Related API's:
XMC_CAN_MO_UpdateData()

XMC_CAN_STATUS_t XMC_CAN_MO_UpdateData ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
XMC_CAN_STATUS_t CAN Node status. Refer XMC_CAN_STATUS_t structure for details.
None
Description:
Configures Data to be transmitted and data length code.
Related API's:
XMC_CAN_MO_Config()

void XMC_CAN_NODE_ClearStatus | ( | XMC_CAN_NODE_t *const | can_node,
 |  | XMC_CAN_NODE_STATUS_t | can_node_status
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
can_node_status | Status to clear.Refer XMC_CAN_NODE_STATUS_t for valid values.
Returns
None
Description:
Clear errors status as well as successfully transferred CAN frames status.
Related APIs:
XMC_CAN_NODE_GetStatus()
void XMC_CAN_NODE_Disable ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Disable the CAN node, terminates participation in CAN traffic. It configures NCR.CANDIS bit.
Related API's:
None
void XMC_CAN_NODE_DisableConfigurationChange ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Forbid to change the configuration of the CAN node. It configures NCRx.CCE bit.
Related API's:
XMC_CAN_NODE_EnableConfigurationChange()
void XMC_CAN_NODE_DisableEvent | ( | XMC_CAN_NODE_t *const | can_node,
 |  | const XMC_CAN_NODE_EVENT_t | event
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
event | CAN node event mask value. Refer XMC_CAN_NODE_EVENT_t structure for valid values. multiple events can be ORed.
Returns
None
Description:
Disable CAN Node events. It configures NFCR register.
Related APIs:
XMC_CAN_NODE_EnableEvent()
void XMC_CAN_NODE_DisableLoopBack ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Disable Node Loop-Back Mode, disables internal (virtual) loop-back CAN bus. This API Configures NPCRx register. Call XMC_CAN_NODE_EnableConfigurationChange() API before NPCRx configuration, same way XMC_CAN_NODE_DisableConfigurationChange() API after NPCRx configuration.
Related APIs:]
XMC_CAN_NODE_EnableLoopBack()
Note:
NPCRx can be written only if bit NCRx.CCE is set.
void XMC_CAN_NODE_Enable ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Enable the CAN node, starts the participation in CAN traffic. It configures NCR.CANDIS and the NCR.INIT bits.
Related API's:
None
void XMC_CAN_NODE_EnableConfigurationChange ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Allow to change the configuration of the CAN node, like bit timing, CAN bus transmit/receive ports and error counters read. It configures NCRx.CCE bit.
Related APIs:
XMC_CAN_NODE_DisableConfigurationChange()
void XMC_CAN_NODE_EnableEvent | ( | XMC_CAN_NODE_t *const | can_node,
 |  | const XMC_CAN_NODE_EVENT_t | event
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
event | CAN node event mask value. Refer XMC_CAN_NODE_EVENT_t structure for valid values. multiple events can be ORed.
Returns
None
Description:
Enable CAN Node events. It configures NFCR register.
Related APIs:
XMC_CAN_NODE_DisableEvent()
void XMC_CAN_NODE_EnableLoopBack ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Enable Node can_node in Loop-Back Mode. A Node is connected to an internal (virtual) loop-back CAN bus. All CAN nodes which are in Loop- Back Mode are connected to this virtual CAN bus so that they can communicate with each other internally. The external transmit line is forced recessive in Loop-Back Mode. This API Configures NPCRx register. call XMC_CAN_NODE_EnableConfigurationChange() API before NPCRx configuration, same way XMC_CAN_NODE_DisableConfigurationChange() API after NPCRx configuration configuration.
Related APIs:]
XMC_CAN_NODE_DisableLoopBack().
Note:
NPCRx can be written only if bit NCRx.CCE is set.
void XMC_CAN_NODE_EnableSuspend ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Trigger the suspension of the CAN node. An OCDS(on chip debug support) suspend trigger disables the CAN node: As soon as the CAN node becomes bus-idle or bus-off, bit INIT is internally forced to 1 to disable the CAN node. The actual value of bit INIT remains unchanged. It configures NCR.SUSEN bit
Related API's:
None
Note:
Bit SUSEN is reset via OCDS(on chip debug support) Reset.
void XMC_CAN_NODE_FrameCounterConfigure | ( | XMC_CAN_NODE_t *const | can_node,
 |  | const XMC_CAN_NODE_FRAME_COUNTER_t *const | can_node_init
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
can_node_init | frame counter mode selection. Refer XMC_CAN_NODE_FRAME_COUNTER_t for valid values.
Returns
None
Description:
Configures frame counter functions. Each CAN can_node is equipped with a frame counter that counts transmitted/received CAN frames or obtains information about the time when a frame has been started to transmit or be received by the CAN node. It configures NFCR register.
Related API's:
None
uint16_t XMC_CAN_NODE_GetCANFrameCounter ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
uint16_t current value of the CAN frame counter. Range :0-65535
Description:
Returns the frame counter value can_node of the CAN node. In Frame Count Mode (CFMOD = 00B), this API returns the frame count value. In Time Stamp Mode (CFMOD = 01B), this API returns the captured bit time count value, captured with the start of a new frame. In all Bit Timing Analysis Modes (CFMOD = 10B), this API always returns the number of fCLC clock cycles (measurement result) minus 1.
Related API's:
None
uint8_t XMC_CAN_NODE_GetErrorWarningLevel ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
uint8_t Error Warning Level. Range :0 - 255
Description:
Returns error warning level. This determines the threshold value (warning level, default 96) to be reached in order to set the corresponding error warning bit EWRN. It reads NECNT register.
Related APIs:
XMC_CAN_NODE_SetErrorWarningLevel()

XMC_CAN_NODE_LAST_ERROR_DIR_t XMC_CAN_NODE_GetLastErrTransferDir ( XMC_CAN_NODE_t *const node )
Parameters
node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
XMC_CAN_NODE_LAST_ERROR_DIR_t Last error transfer direction. Refer XMC_CAN_NODE_LAST_ERROR_DIR_t.
Description:
Returns NODE Last Error occurred during Transmit/receive direction. It returns value of NFCR register.
Related APIs:
XMC_CAN_NODE_GetLastErrTransferInc()

XMC_CAN_NODE_LAST_ERROR_INC_t XMC_CAN_NODE_GetLastErrTransferInc ( XMC_CAN_NODE_t *const node )
Parameters
node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
XMC_CAN_NODE_LAST_ERROR_INC_t Last error transfer increment. Refer XMC_CAN_NODE_LAST_ERROR_INC_t.
Description:
Returns NODE Last Error Transfer Increment. It returns value of NFCR register.
Related APIs:
XMC_CAN_NODE_GetLastErrTransferDir()

uint8_t XMC_CAN_NODE_GetReceiveErrorCounter ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
uint8_t receive error counter value.
Description:
Returns Receive Error Counter value. It reads NECNT register.
Related APIs:
XMC_CAN_NODE_SetReceiveErrorCounter()
uint32_t XMC_CAN_NODE_GetStatus ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
uint32_t Current status of the node.
Description:
Returns errors status as well as successfully transferred CAN frames status.
Related APIs:
XMC_CAN_NODE_ClearStatus()
uint8_t XMC_CAN_NODE_GetTransmitErrorCounter ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
uint8_t transmit error counter value. Range :0 - 255
Description:
Returns Transmit Error Counter value. If the Bitstream Processor detects an error while a transmit operation is running, the Transmit Error Counter is incremented by 8. An increment of 1 is used when the error condition was reported by an external CAN node via an Error Frame generation. It reads NECNT register.
Related APIs:
XMC_CAN_NODE_SetTransmitErrorCounter()
Note:
NECNTx can be written only if bit NCRx.CCE is set.
void XMC_CAN_NODE_NominalBitTimeConfigure | ( | XMC_CAN_NODE_t *const | can_node,
 |  | const XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t *const | can_bit_time
 | ) |  |
Parameters
can_node | Pointer pointing to CAN_NODE Structure. Defines CAN_NODE registers. Range :CAN_NODE0-CAN_NODE2
can_bit_time | Nominal bit time configuration data structure. Refer XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t for details.
Returns
None
Description:
Configures CAN node Baudrate. can_bit_time specifies required baudrate for a specified can_node. It configures NBTR register.
Related APIs:
None
void XMC_CAN_NODE_ReSetAnalyzerMode ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Reset the Analyzer mode. CAN node is no more in Analyzer Mode. Please refer XMC_CAN_NODE_SetAnalyzerMode(). It configures NCR.CALM bit. XMC_CAN_NODE_SetInitBit() should be called before set / reset AnalyzerMode.
Related API's:
XMC_CAN_NODE_SetAnalyzerMode()
void XMC_CAN_NODE_ResetInitBit ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Enable CAN node participation in CAN traffic. Bit INIT is automatically set when the CAN node enters the bus-off state. It configures NCR.INIT bit.
Related API's:
XMC_CAN_NODE_SetInitBit()
void XMC_CAN_NODE_SetAnalyzerMode ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Configure CAN node in Analyzer Mode. This means that messages may be received, but not transmitted. No acknowledge is sent on the CAN bus upon frame reception. Active-error flags are sent recessive instead of dominant. The transmit line is continuously held at recessive (1) level. XMC_CAN_NODE_SetInitBit() should be called before set / reset AnalyzerMode. It configures NCR.CALM bit.
Related API's:
XMC_CAN_NODE_ReSetAnalyzerMode()
void XMC_CAN_NODE_SetErrorWarningLevel | ( | XMC_CAN_NODE_t *const | can_node,
 |  | uint8_t | error_warning_level
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
error_warning_level | Error Warning level value. Range :0-255.
Returns
None
Description:
Configures error warning level in order to set the corresponding error warning bit EWRN. It configures error_warning_level into NECNT register. Before this configuration call XMC_CAN_NODE_EnableConfigurationChange() API.
Related APIs:
XMC_CAN_NODE_GetErrorWarningLevel()

Note:
NECNTx can be written only if bit NCRx.CCE is set.
void XMC_CAN_NODE_SetEventNodePointer | ( | XMC_CAN_NODE_t *const | can_node,
 |  | const XMC_CAN_NODE_POINTER_EVENT_t | ptr_event,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
can_node | Pointer pointing to CAN_NODE Structure. Defines CAN_NODE registers.
ptr_event | CAN_NODE interrupt pointer position. Refer XMC_CAN_NODE_POINTER_EVENT_t structure for valid values.
service_request | Interrupt service request number. Range : 0-7
Returns
None
Description:
Configures node interrupt pointer service_request for CAN Node events ptr_event. It configures NIPR register.
Related APIs:
None

< Node event mask

void XMC_CAN_NODE_SetInitBit ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Disable CAN node participation in CAN traffic. Bit INIT is automatically set when the CAN node enters the bus-off state. It configures NCR.INIT bit.
Related API's:
XMC_CAN_NODE_ResetInitBit()
void XMC_CAN_NODE_SetReceiveErrorCounter | ( | XMC_CAN_NODE_t *const | can_node,
 |  | uint8_t | can_rec
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
can_rec | receive error counter value. Range :0-255
Returns
None
Description:
Configures Receive Error Counter. It configures can_rec into NECNT register. Before this configuration call XMC_CAN_NODE_EnableConfigurationChange() API.
Related APIs:
XMC_CAN_NODE_GetReceiveErrorCounter()

Note:
NECNTx can be written only if bit NCRx.CCE is set.
void XMC_CAN_NODE_SetReceiveInput | ( | XMC_CAN_NODE_t *const | can_node,
 |  | const XMC_CAN_NODE_RECEIVE_INPUT_t | input
 | ) |  |
Parameters
can_node | Pointer pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
input | CAN receive input selection. Refer XMC_CAN_NODE_RECEIVE_INPUT_t for details.
Returns
None
Description:
input specifies CAN input receive pin. This API Configures NPCRx register,it is required to call XMC_CAN_NODE_EnableConfigurationChange(), before configuring NPCRx register, call XMC_CAN_NODE_DisableConfigurationChange() API after configuring NPCRx register. CAN input receive pins which falls under analog port pins should call XMC_GPIO_EnableDigitalInput(),to enable digital pad.
Related APIs:
None
Note:
NPCRx can be written only if bit NCRx.CCE is set.
void XMC_CAN_NODE_SetTransmitErrorCounter | ( | XMC_CAN_NODE_t *const | can_node,
 |  | uint8_t | can_tec
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
can_tec | transmit error counter value. Range :0-255
Returns
None
Description:
Configures Transmit error counter. It configures can_tec into NECNT register. Before this configuration call XMC_CAN_NODE_EnableConfigurationChange() API.
Related APIs:
XMC_CAN_NODE_GetTransmitErrorCounter()

Note:
NECNTx can be written only if bit NCRx.CCE is set.
void XMC_CAN_PanelControl | ( | XMC_CAN_t *const | obj,
 |  | const XMC_CAN_PANCMD_t | pancmd,
 |  | const uint8_t | arg1,
 |  | const uint8_t | arg2
 | ) |  |
Parameters
obj | Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
pancmd | panal command selection. Refer XMC_CAN_PANCMD_t for valid values.
arg1 | Panel Argument 1,Range : 0-2
arg2 | Panel Argument 2, Range : 0-63
Returns
None
Description:
Configures the panel command and panel arguments. A panel operation consists of a command code (PANCMD) and up to two panel arguments (PANAR1, PANAR2). Commands that have a return value deliver it to the PANAR1 bit field. Commands that return an error flag deliver it to bit 31 of the Panel Control Register, this means bit 7 of PANAR2. arg1 represents panel argument PANAR1,arg2 represents panel argument PANAR2 and pancmd represents command code. It configures PANCTR register.
Related APIs:
None
void XMC_CAN_RXFIFO_ConfigMOBaseObject | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const XMC_CAN_FIFO_CONFIG_t | can_fifo
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_fifo | CAN FIFO configuration data structure. Refer XMC_CAN_FIFO_CONFIG_t data structure for details.
Returns
None
Description:
Configures the base object of receive FIFO.
Related API's:
None
void XMC_CAN_RXFIFO_ConfigMOSlaveObject ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configures the slave Object of receive FIFO. It configures MOCTR.RESRXEN bit.
Related API's:
None
void XMC_CAN_TXFIFO_ConfigMOBaseObject | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const XMC_CAN_FIFO_CONFIG_t | can_fifo
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_fifo | CAN FIFO configuration data structure. Refer XMC_CAN_FIFO_CONFIG_t data structure for details.
Returns
None
Description:
Configures the transmit FIFO. A FIFO consists of one base object and n slave objects. Please refer reference manual Transmit FIFO for more info.
Related API's:
None.
void XMC_CAN_TXFIFO_ConfigMOSlaveObject | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const XMC_CAN_FIFO_CONFIG_t | can_fifo
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_fifo | CAN FIFO configuration data structure. Refer XMC_CAN_FIFO_CONFIG_t data structure for details.
Returns
None
Description:
Configures the slave object of transmit FIFO.
Related API's:
None
XMC_CAN_STATUS_t XMC_CAN_TXFIFO_Transmit ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
XMC_CAN_STATUS_t CAN Node status. Refer XMC_CAN_STATUS_t structure for details.
Description:
To transmit Message Object from the FIFO. Prior to this CAN node Message Object FIFO structure shall be made using XMC_CAN_TXFIFO_ConfigMOBaseObject(), XMC_CAN_TXFIFO_ConfigMOSlaveObject(),XMC_CAN_RXFIFO_ConfigMOBaseObject() API's. Please refer reference manual MessageObject FIFOStructure for more info.
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_CAN_FIFO_CONFIG_t Struct Reference

Data Fields
XMC_CAN_FIFO_CONFIG_t Struct Reference
XMC Peripheral Library » CAN

#include <xmc_can.h>

Data Fields

uint8_t | fifo_base
uint8_t | fifo_bottom
uint8_t | fifo_top

Detailed Description

Defines base, top and bottom of CAN Message Object FIFO Structure. Use type XMC_CAN_FIFO_CONFIG_t for this structure. A FIFO consists of one base object and n slave objects.

Field Documentation

uint8_t fifo_base

points to the actual target object(Base object) within a FIFO/Gateway structure. Range :0-63

uint8_t fifo_bottom

points to the first element(slave object) in a FIFO structure.Range :0-63

uint8_t fifo_top

points to the last element(slave object) in a FIFO structure. Range :0-63

The documentation for this struct was generated from the following file:
  • xmc_can.h
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_CAN_GATEWAY_CONFIG_t Struct Reference

Data Fields
XMC_CAN_GATEWAY_CONFIG_t Struct Reference
XMC Peripheral Library » CAN

#include <xmc_can.h>

Data Fields

uint8_t | gateway_base
uint8_t | gateway_bottom
bool | gateway_data_copy
bool | gateway_data_frame_send
bool | gateway_data_length_code_copy
bool | gateway_identifier_copy
uint8_t | gateway_top

Detailed Description

Defines CAN Gateway FIFO structure and provides additional options for gateway destination object. Use type XMC_CAN_GATEWAY_CONFIG_t for this structure.

Field Documentation

uint8_t gateway_base

points to the actual target object within a FIFO/Gateway structure. Range :0-63

uint8_t gateway_bottom

points to the first element(gateway destination object) in a FIFO structure. Range :0-63

bool gateway_data_copy

Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination.

bool gateway_data_frame_send

TXRQ updated in the gateway destination object after the internal transfer from the gateway source to the gateway destination object

bool gateway_data_length_code_copy

Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object

bool gateway_identifier_copy

The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object.

uint8_t gateway_top

points to the last element(gateway destination object) in a FIFO structure. Range :0-63

The documentation for this struct was generated from the following file:
  • xmc_can.h
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_CAN_MO_t Struct Reference

Data Fields
XMC_CAN_MO_t Struct Reference
XMC Peripheral Library » CAN

#include <xmc_can.h>

Data Fields

uint8_t | can_data_length
CAN_MO_TypeDef * | can_mo_ptr
XMC_CAN_MO_TYPE_t can_mo_type
uint32_t | can_data [2]
uint8_t | can_data_byte [8]
uint16_t | can_data_word [4]
uint32_t | can_id_mask:29
uint32_t | can_id_mode:1
uint32_t | can_ide_mask:1
uint32_t | can_identifier:29
uint32_t | can_priority:2

Detailed Description

Defines CAN Message Object runtime elements. Use type XMC_CAN_MO_t for this structure.

Field Documentation

uint32_t can_data[2]

can_data[0] lower 4 bytes of the data. can_data[1], higher 4 bytes of the data

uint8_t can_data_byte[8]

Each position of the array represents a data byte

uint8_t can_data_length

Message data length, Range:0-8

uint16_t can_data_word[4]

Each position of the array represents a 16 bits data word

uint32_t can_id_mask

CAN Identifier of Message Object

uint32_t can_id_mode

Standard/Extended identifier support

uint32_t can_ide_mask

Identifier Extension Bit of Message Object

uint32_t can_identifier

standard (11 bit)/Extended (29 bit) message identifier

CAN_MO_TypeDef* can_mo_ptr

Pointer to the Message Object CAN register

XMC_CAN_MO_TYPE_t can_mo_type

Message Type

uint32_t can_priority

Arbitration Mode/Priority

The documentation for this struct was generated from the following file:
  • xmc_can.h
Generated on Mon Aug 7 2017 11:33:58 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_CAN_NODE_FRAME_COUNTER_t Struct Reference

XMC_CAN_NODE_FRAME_COUNTER_t Struct Reference
XMC Peripheral Library » CAN

#include <xmc_can.h>

Detailed Description

Defines frame counter configuration. Use type XMC_CAN_NODE_FRAME_COUNTER_t for this structure. It provides configuration of frame counter that counts transmitted/received CAN frames or obtains information about the time when a frame has been started to transmit or be received by the CAN node.

Field Documentation

uint32_t can_frame_count_mode

Determines the operation mode of the frame counter

uint32_t can_frame_count_selection

Defines function of the frame counter

The documentation for this struct was generated from the following file:
  • xmc_can.h


XMC Peripheral Library for XMC4000 Family: XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t Struct Reference

Data Fields
XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t Struct Reference
XMC Peripheral Library » CAN

#include <xmc_can.h>

Data Fields

uint32_t | baudrate
uint32_t | can_frequency
uint16_t | sample_point
uint16_t | sjw

Detailed Description

Defines CAN node Nominal Bit Time. Use type XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t for this structure.

Field Documentation

uint32_t baudrate

Specifies the node baud rate. Unit: baud baudrate shall be range of 100Kbps to 1000Kbps

uint32_t can_frequency

Frequency of the CAN module(fCAN). can_frequency shall be range of 5MHz to 120MHz

uint16_t sample_point

Sample point is used to compensate mismatch between transmitter and receiver clock phases detected in the synchronization segment. Sample point. Range = [0, 10000] with respect [0%, 100%] of the total bit time.

uint16_t sjw

(Re) Synchronization Jump Width. Range:0-3

The documentation for this struct was generated from the following file:
  • xmc_can.h


XMC Peripheral Library for XMC4000 Family: CCU4

Data Structures | Typedefs | Enumerations | Functions
CCU4
XMC Peripheral Library

Data Structures

struct | XMC_CCU4_SLICE_CAPTURE_CONFIG_t
struct | XMC_CCU4_SLICE_COMPARE_CONFIG_t
struct | XMC_CCU4_SLICE_EVENT_CONFIG_t

Typedefs

typedef CCU4_GLOBAL_TypeDef | XMC_CCU4_MODULE_t
typedef uint8_t | XMC_CCU4_SLICE_INPUT_t
typedef CCU4_CC4_TypeDef | XMC_CCU4_SLICE_t

Enumerations

Functions

void | XMC_CCU4_DisableClock (XMC_CCU4_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU4_DisableModule (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_EnableClock (XMC_CCU4_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU4_EnableModule (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_EnableMultipleClocks (XMC_CCU4_MODULE_t *const module, const uint8_t clock_mask)
void | XMC_CCU4_EnableShadowTransfer (XMC_CCU4_MODULE_t *const module, const uint32_t shadow_transfer_msk)
void | XMC_CCU4_Init (XMC_CCU4_MODULE_t *const module, const XMC_CCU4_SLICE_MCMS_ACTION_t mcs_action)
bool | XMC_CCU4_IsPrescalerRunning (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_SetModuleClock (XMC_CCU4_MODULE_t *const module, const XMC_CCU4_CLOCK_t clock)
void | XMC_CCU4_SetMultiChannelShadowTransferMode (XMC_CCU4_MODULE_t *const module, const uint32_t slice_mode_msk)
void | XMC_CCU4_SLICE_Capture0Config (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_Capture1Config (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_CaptureInit (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_CAPTURE_CONFIG_t *const capture_init)
void | XMC_CCU4_SLICE_ClearEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_ClearTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_CompareInit (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_COMPARE_CONFIG_t *const compare_init)
void | XMC_CCU4_SLICE_ConfigureEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_EVENT_CONFIG_t *const config)
void | XMC_CCU4_SLICE_ConfigureStatusBitOverrideEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_CONFIG_t *const ev1_config, const XMC_CCU4_SLICE_EVENT_CONFIG_t *const ev2_config)
void | XMC_CCU4_SLICE_CountConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_DirectionConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_DisableAutomaticShadowTransferRequest (XMC_CCU4_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU4_SLICE_DisableCascadedShadowTransfer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableDithering (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_DisableFloatingPrescaler (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableMultiChannelMode (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableMultipleEvents (XMC_CCU4_SLICE_t *const slice, const uint16_t mask)
void | XMC_CCU4_SLICE_DisableTrap (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableAutomaticShadowTransferRequest (XMC_CCU4_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU4_SLICE_EnableCascadedShadowTransfer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableDithering (XMC_CCU4_SLICE_t *const slice, const bool period_dither, const bool duty_dither, const uint8_t spread)
void | XMC_CCU4_SLICE_EnableEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_EnableFloatingPrescaler (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableMultiChannelMode (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableMultipleEvents (XMC_CCU4_SLICE_t *const slice, const uint16_t intr_mask)
void | XMC_CCU4_SLICE_EnableTrap (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_GateConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
uint32_t | XMC_CCU4_SLICE_GetCapturedValueFromFifo (const XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_CAP_REG_SET_t set)
uint32_t | XMC_CCU4_SLICE_GetCaptureRegisterValue (const XMC_CCU4_SLICE_t *const slice, const uint8_t reg_num)
XMC_CCU4_SLICE_TIMER_COUNT_DIR_t | XMC_CCU4_SLICE_GetCountingDir (const XMC_CCU4_SLICE_t *const slice)
bool | XMC_CCU4_SLICE_GetEvent (const XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
XMC_CCU4_STATUS_t | XMC_CCU4_SLICE_GetLastCapturedTimerValue (const XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_CAP_REG_SET_t set, uint32_t *val_ptr)
XMC_CCU4_SLICE_MODE_t | XMC_CCU4_SLICE_GetSliceMode (const XMC_CCU4_SLICE_t *const slice)
uint16_t | XMC_CCU4_SLICE_GetTimerCompareMatch (const XMC_CCU4_SLICE_t *const slice)
XMC_CCU4_SLICE_TIMER_COUNT_MODE_t | XMC_CCU4_SLICE_GetTimerCountingMode (const XMC_CCU4_SLICE_t *const slice)
uint16_t | XMC_CCU4_SLICE_GetTimerPeriodMatch (const XMC_CCU4_SLICE_t *const slice)
XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t | XMC_CCU4_SLICE_GetTimerRepeatMode (const XMC_CCU4_SLICE_t *const slice)
uint16_t | XMC_CCU4_SLICE_GetTimerValue (const XMC_CCU4_SLICE_t *const slice)
bool | XMC_CCU4_SLICE_IsExtendedCapReadEnabled (const XMC_CCU4_SLICE_t *const slice)
bool | XMC_CCU4_SLICE_IsTimerRunning (const XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_LoadConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_ModulationConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_MODULATION_MODE_t mod_mode, const bool synch_with_pwm)
void | XMC_CCU4_SLICE_SetDitherCompareValue (XMC_CCU4_SLICE_t *const slice, const uint8_t comp_val)
void | XMC_CCU4_SLICE_SetEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue (XMC_CCU4_SLICE_t *const slice, const uint8_t cmp_val)
void | XMC_CCU4_SLICE_SetInput (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_INPUT_t input)
void | XMC_CCU4_SLICE_SetInterruptNode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event, const XMC_CCU4_SLICE_SR_ID_t sr)
void | XMC_CCU4_SLICE_SetPassiveLevel (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t level)
void | XMC_CCU4_SLICE_SetPrescaler (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_PRESCALER_t div_val)
void | XMC_CCU4_SLICE_SetShadowTransferMode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t shadow_transfer_mode)
void | XMC_CCU4_SLICE_SetTimerCompareMatch (XMC_CCU4_SLICE_t *const slice, const uint16_t compare_val)
void | XMC_CCU4_SLICE_SetTimerCountingMode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_TIMER_COUNT_MODE_t mode)
void | XMC_CCU4_SLICE_SetTimerPeriodMatch (XMC_CCU4_SLICE_t *const slice, const uint16_t period_val)
void | XMC_CCU4_SLICE_SetTimerRepeatMode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t mode)
void | XMC_CCU4_SLICE_SetTimerValue (XMC_CCU4_SLICE_t *const slice, const uint16_t timer_val)
void | XMC_CCU4_SLICE_StartConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_START_MODE_t start_mode)
void | XMC_CCU4_SLICE_StartTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_StatusBitOverrideConfig (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_StopClearTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_StopConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_END_MODE_t end_mode)
void | XMC_CCU4_SLICE_StopTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_TrapConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_TRAP_EXIT_MODE_t exit_mode, bool synch_with_pwm)
void | XMC_CCU4_SLICE_WriteCoherentlyWithPWMCycle (XMC_CCU4_SLICE_t *const slice, const uint32_t coherent_write)
void | XMC_CCU4_SLICE_WriteImmediateAfterShadowTransfer (XMC_CCU4_SLICE_t *const slice, const uint32_t immediate_write)
void | XMC_CCU4_StartPrescaler (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_StopPrescaler (XMC_CCU4_MODULE_t *const module)

Detailed Description

The CCU4 peripheral is a major component for systems that need general purpose timers for signal monitoring/conditioning and Pulse Width Modulation (PWM) signal generation. Power electronic control systems like switched mode power supplies or interruptible power supplies, can easily be implemented with the functions inside the CCU4 peripheral.
Each CCU4 module is comprised of four identical 16 bit Capture/Compare Timer slices, CC4y (where y = [0..4]). Each timer slice can work in compare mode or in capture mode.

APIs provided in this file cover the following functional blocks of CCU4:
– Timer configuration, Capture configuration, Function/Event configuration, Interrupt configuration

Note:
  1. SLICE (APIs prefixed with e.g. XMC_CCU4_SLICE_)
  2. Module (APIs are not having any prefix e.g. XMC_CCU4_)
Timer(Compare mode) configuration:
This section of the LLD provides the configuration structure XMC_CCU4_SLICE_COMPARE_CONFIG_t and the initialization function XMC_CCU4_SLICE_CompareInit().

It can be used to:

  1. Start and Stop the timer. (XMC_CCU4_SLICE_StartTimer(), XMC_CCU4_SLICE_StopTimer())
  2. Update the period, compare, Dither, Prescaler and Passive values. (XMC_CCU4_SLICE_SetTimerPeriodMatch(), XMC_CCU4_SLICE_SetTimerCompareMatch(), XMC_CCU4_SLICE_SetPrescaler(), XMC_CCU4_SLICE_SetDitherCompareValue(), XMC_CCU4_SLICE_SetPassiveLevel())
  3. Enable the slices to support multichannel mode. (XMC_CCU4_SLICE_EnableMultiChannelMode())
Capture configuration:
This section of the LLD provides the configuration structure XMC_CCU4_SLICE_CAPTURE_CONFIG_t and the initialization function XMC_CCU4_SLICE_CaptureInit().

It can be used to:

  1. Configure the capture functionality. (XMC_CCU4_SLICE_Capture0Config(), XMC_CCU4_SLICE_Capture1Config())
  2. Read the captured values along with the status, which indicate the value is latest or not. (XMC_CCU4_SLICE_GetCaptureRegisterValue())
Function/Event configuration:
This section of the LLD provides the configuration structure XMC_CCU4_SLICE_EVENT_CONFIG_t.
It can be used to:
  1. Enable and Disable the events. (XMC_CCU4_SLICE_EnableEvent(), XMC_CCU4_SLICE_DisableEvent())
  2. Configure to start and stop the timer on external events.(XMC_CCU4_SLICE_StartConfig(), XMC_CCU4_SLICE_StopConfig())
  3. Modulation, external load and Gating of the timer output.(XMC_CCU4_SLICE_ModulationConfig(), XMC_CCU4_SLICE_LoadConfig(), XMC_CCU4_SLICE_GateConfig())
  4. Control the count direction of the timer based on the external event. (XMC_CCU4_SLICE_DirectionConfig())
  5. Count the external events.(XMC_CCU4_SLICE_CountConfig())
  6. External Trap. Which can be used as protective feature.(XMC_CCU4_SLICE_EnableTrap(), XMC_CCU4_SLICE_DisableTrap(), XMC_CCU4_SLICE_TrapConfig())
Interrupt configuration:
This section of the LLD provides the function to configure the interrupt node to each event (XMC_CCU4_SLICE_SetInterruptNode())

Typedef Documentation

typedef CCU4_GLOBAL_TypeDef XMC_CCU4_MODULE_t

Typedef for CCU4 Global data structure

typedef uint8_t XMC_CCU4_SLICE_INPUT_t

External Event Input list. This list depicts the possible input connections to the CCU4 slice. Interconnects are specific to each device.

typedef CCU4_CC4_TypeDef XMC_CCU4_SLICE_t

Typedef for CCU4 Slice data structure

Enumeration Type Documentation

enum XMC_CCU4_CLOCK_t

CCU4 module clock

Enumerator
XMC_CCU4_CLOCK_SCU | Select the fCCU as the clock
XMC_CCU4_CLOCK_EXTERNAL_A | External clock-A
XMC_CCU4_CLOCK_EXTERNAL_B | External clock-B
XMC_CCU4_CLOCK_EXTERNAL_C | External clock-C
enum XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_t

CCU4 set the shadow transfer type for multichannel mode

Enumerator
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE0 | Shadow transfer through software only for slice 0
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE0 | Shadow transfer through software and hardware for slice 0
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE1 | Shadow transfer through software only for slice 1
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE1 | Shadow transfer through software and hardware for slice 1
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE2 | Shadow transfer through software only for slice 2
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE2 | Shadow transfer through software and hardware for slice 2
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE3 | Shadow transfer through software only for slice 3
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE3 | Shadow transfer through software and hardware for slice 3
enum XMC_CCU4_SHADOW_TRANSFER_t

Slice shadow transfer options.

Enumerator
XMC_CCU4_SHADOW_TRANSFER_SLICE_0 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-0
XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_0 | Transfer Dither compare shadow register value to actual register for SLICE-0
XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_0 | Transfer Prescaler shadow register value to actual register for SLICE-0
XMC_CCU4_SHADOW_TRANSFER_SLICE_1 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-1
XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_1 | Transfer Dither compare shadow register value to actual registers for SLICE-1
XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_1 | Transfer Prescaler shadow register value to actual register for SLICE-1
XMC_CCU4_SHADOW_TRANSFER_SLICE_2 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-2
XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_2 | Transfer Dither compare shadow register value to actual register for SLICE-2
XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_2 | Transfer Prescaler shadow register value to actual register for SLICE-2
XMC_CCU4_SHADOW_TRANSFER_SLICE_3 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-3
XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_3 | Transfer Dither compare shadow register value to actual register for SLICE-3
XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_3 | Transfer Prescaler shadow register value to actual register for SLICE-3
enum XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t

Automatic Shadow Transfer request when writing into shadow register

Note
Only available for XMC1400 series
Enumerator
XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PERIOD_SHADOW | Automatic Shadow Transfer request when writing into Period Shadow Register
XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_COMPARE_SHADOW | Automatic Shadow transfer request when writing into Compare Shadow Register
XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PASSIVE_LEVEL | Automatic Shadow transfer request when writing into Passive Level Register
XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_DITHER_SHADOW | Automatic Shadow transfer request when writing into Dither Shadow Register
XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_FLOATING_PRESCALER_SHADOW | Automatic Shadow transfer request when writing into Floating Prescaler Shadow register
enum XMC_CCU4_SLICE_CAP_REG_SET_t

Capture mode register sets

Enumerator
XMC_CCU4_SLICE_CAP_REG_SET_LOW | Capture register-0, Capture register-1 used
XMC_CCU4_SLICE_CAP_REG_SET_HIGH | Capture register-2, Capture register-3 used
enum XMC_CCU4_SLICE_END_MODE_t

Actions that can be performed upon detection of an external Timer STOP event

Enumerator
XMC_CCU4_SLICE_END_MODE_TIMER_STOP | Stops the timer, without clearing TIMER register
XMC_CCU4_SLICE_END_MODE_TIMER_CLEAR | Without stopping timer, clears the TIMER register
XMC_CCU4_SLICE_END_MODE_TIMER_STOP_CLEAR | Stops the timer and clears the TIMER register
enum XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_t

External Event trigger criteria - Edge sensitivity

Enumerator
XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_NONE | None
XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE | Rising Edge of the input signal generates event trigger
XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE | Falling Edge of the input signal generates event trigger
XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE | Both Rising and Falling edges cause an event trigger
enum XMC_CCU4_SLICE_EVENT_FILTER_t

Low pass filter Configuration. The External Event input should be stable for a selected number of clock cycles.

Enumerator
XMC_CCU4_SLICE_EVENT_FILTER_DISABLED | No Low Pass Filter
XMC_CCU4_SLICE_EVENT_FILTER_3_CYCLES | 3 clock cycles
XMC_CCU4_SLICE_EVENT_FILTER_5_CYCLES | 5 clock cycles
XMC_CCU4_SLICE_EVENT_FILTER_7_CYCLES | 7 clock cycles
enum XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_t

External Event trigger criteria - Level sensitivity

Enumerator
XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH | Level sensitive functions react to a high signal level
XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW | Level sensitive functions react to a low signal level
XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_LOW | Timer counts up, during Low state of the control signal
XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_HIGH | Timer counts up, during High state of the control signal
enum XMC_CCU4_SLICE_EVENT_t

External Event list

Enumerator
XMC_CCU4_SLICE_EVENT_NONE | None
XMC_CCU4_SLICE_EVENT_0 | Event-0
XMC_CCU4_SLICE_EVENT_1 | Event-1
XMC_CCU4_SLICE_EVENT_2 | Event-2
enum XMC_CCU4_SLICE_FUNCTION_t

External Function list

Enumerator
XMC_CCU4_SLICE_FUNCTION_START | Start function
XMC_CCU4_SLICE_FUNCTION_STOP | Stop function
XMC_CCU4_SLICE_FUNCTION_CAPTURE_EVENT0 | Capture Event-0 function, CCycapt0 signal is used for event generation
XMC_CCU4_SLICE_FUNCTION_CAPTURE_EVENT1 | Capture Event-1 function, CCycapt1 signal is used for event generation
XMC_CCU4_SLICE_FUNCTION_GATING | Gating function
XMC_CCU4_SLICE_FUNCTION_DIRECTION | Direction function
XMC_CCU4_SLICE_FUNCTION_LOAD | Load function
XMC_CCU4_SLICE_FUNCTION_COUNT | Counting function
XMC_CCU4_SLICE_FUNCTION_OVERRIDE | Override function
XMC_CCU4_SLICE_FUNCTION_MODULATION | Modulation function
XMC_CCU4_SLICE_FUNCTION_TRAP | Trap function
enum XMC_CCU4_SLICE_IRQ_ID_t

Available Interrupt Event Ids

Enumerator
XMC_CCU4_SLICE_IRQ_ID_PERIOD_MATCH | Period match counting up
XMC_CCU4_SLICE_IRQ_ID_ONE_MATCH | Period match -> One match counting down
XMC_CCU4_SLICE_IRQ_ID_COMPARE_MATCH_UP | Compare match counting up
XMC_CCU4_SLICE_IRQ_ID_COMPARE_MATCH_DOWN | Compare match counting down
XMC_CCU4_SLICE_IRQ_ID_EVENT0 | Event-0 occurrence
XMC_CCU4_SLICE_IRQ_ID_EVENT1 | Event-1 occurrence
XMC_CCU4_SLICE_IRQ_ID_EVENT2 | Event-2 occurrence
XMC_CCU4_SLICE_IRQ_ID_TRAP | Trap occurrence
enum XMC_CCU4_SLICE_MASK_t

Used to create Mask needed for Multi-channel Shadow transfer enable/disable

Enumerator
XMC_CCU4_SLICE_MASK_SLICE_0 | SLICE-0
XMC_CCU4_SLICE_MASK_SLICE_1 | SLICE-1
XMC_CCU4_SLICE_MASK_SLICE_2 | SLICE-2
XMC_CCU4_SLICE_MASK_SLICE_3 | SLICE-3
enum XMC_CCU4_SLICE_MCMS_ACTION_t

Multi Channel Shadow transfer request configuration options

Enumerator
XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR | Transfer Compare and Period Shadow register values to the actual registers upon MCS xfer request
XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP | Transfer Compare, Period and Prescaler Compare Shadow register values to the actual registers upon MCS xfer request
XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT | Transfer Compare, Period ,Prescaler Compare and Dither Compare register values to the actual registers upon MCS xfer request
enum XMC_CCU4_SLICE_MODE_t

Operational modes of CCU4 slice

Enumerator
XMC_CCU4_SLICE_MODE_COMPARE | slice(CC4y) operates in Compare Mode
XMC_CCU4_SLICE_MODE_CAPTURE | slice(CC4y) operates in Capture Mode
enum XMC_CCU4_SLICE_MODULATION_MODE_t

Modulation of timer output signals

Enumerator
XMC_CCU4_SLICE_MODULATION_MODE_CLEAR_ST_OUT | Clear ST and OUT signals
XMC_CCU4_SLICE_MODULATION_MODE_CLEAR_OUT | Clear only the OUT signal
enum XMC_CCU4_SLICE_MULTI_IRQ_ID_t

Available Interrupt Event Ids, which is added to support multi event APIs

Enumerator
XMC_CCU4_SLICE_MULTI_IRQ_ID_PERIOD_MATCH | Period match counting up
XMC_CCU4_SLICE_MULTI_IRQ_ID_ONE_MATCH | Period match -> One match counting down
XMC_CCU4_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP | Compare match counting up
XMC_CCU4_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN | Compare match counting down
XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT0 | Event-0 occurrence
XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT1 | Event-1 occurrence
XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT2 | Event-2 occurrence
enum XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t

Timer output passive level

Enumerator
XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_LOW | Passive level = Low
XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH | Passive level = High
enum XMC_CCU4_SLICE_PRESCALER_MODE_t

Prescaler mode

Enumerator
XMC_CCU4_SLICE_PRESCALER_MODE_NORMAL | Fixed division of module clock
XMC_CCU4_SLICE_PRESCALER_MODE_FLOAT | Floating divider.
enum XMC_CCU4_SLICE_PRESCALER_t

Timer clock Divider

Enumerator
XMC_CCU4_SLICE_PRESCALER_1 | Slice Clock = fccu4
XMC_CCU4_SLICE_PRESCALER_2 | Slice Clock = fccu4/2
XMC_CCU4_SLICE_PRESCALER_4 | Slice Clock = fccu4/4
XMC_CCU4_SLICE_PRESCALER_8 | Slice Clock = fccu4/8
XMC_CCU4_SLICE_PRESCALER_16 | Slice Clock = fccu4/16
XMC_CCU4_SLICE_PRESCALER_32 | Slice Clock = fccu4/32
XMC_CCU4_SLICE_PRESCALER_64 | Slice Clock = fccu4/64
XMC_CCU4_SLICE_PRESCALER_128 | Slice Clock = fccu4/128
XMC_CCU4_SLICE_PRESCALER_256 | Slice Clock = fccu4/256
XMC_CCU4_SLICE_PRESCALER_512 | Slice Clock = fccu4/512
XMC_CCU4_SLICE_PRESCALER_1024 | Slice Clock = fccu4/1024
XMC_CCU4_SLICE_PRESCALER_2048 | Slice Clock = fccu4/2048
XMC_CCU4_SLICE_PRESCALER_4096 | Slice Clock = fccu4/4096
XMC_CCU4_SLICE_PRESCALER_8192 | Slice Clock = fccu4/8192
XMC_CCU4_SLICE_PRESCALER_16384 | Slice Clock = fccu4/16384
XMC_CCU4_SLICE_PRESCALER_32768 | Slice Clock = fccu4/32768
enum XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t

Slice shadow transfer mode options.

Note
Only available for XMC1400 series
Enumerator
XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_IN_PERIOD_MATCH_AND_ONE_MATCH | Shadow transfer is done in Period Match and One match.
XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_PERIOD_MATCH | Shadow transfer is done only in Period Match.
XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_ONE_MATCH | Shadow transfer is done only in One Match.
enum XMC_CCU4_SLICE_SR_ID_t

Service Request Lines for CCU4. Event are mapped to these SR lines and these are used to generate the interrupt.

Enumerator
XMC_CCU4_SLICE_SR_ID_0 | Service Request Line-0 selected
XMC_CCU4_SLICE_SR_ID_1 | Service Request Line-1 selected
XMC_CCU4_SLICE_SR_ID_2 | Service Request Line-2 selected
XMC_CCU4_SLICE_SR_ID_3 | Service Request Line-3 selected
enum XMC_CCU4_SLICE_START_MODE_t

Actions that can be performed upon detection of an external Timer START event

Enumerator
XMC_CCU4_SLICE_START_MODE_TIMER_START | Start the timer from the current count of TIMER register
XMC_CCU4_SLICE_START_MODE_TIMER_START_CLEAR | Clears the TIMER register and start the timer
enum XMC_CCU4_SLICE_TIMER_CLEAR_MODE_t

Timer clear on capture

Enumerator
XMC_CCU4_SLICE_TIMER_CLEAR_MODE_NEVER | Never clear the timer on any capture event
XMC_CCU4_SLICE_TIMER_CLEAR_MODE_CAP_HIGH | Clear only when timer value has been captured in C3V and C2V
XMC_CCU4_SLICE_TIMER_CLEAR_MODE_CAP_LOW | Clear only when timer value has been captured in C1V and C0V
XMC_CCU4_SLICE_TIMER_CLEAR_MODE_ALWAYS | Always clear the timer upon detection of any capture event
enum XMC_CCU4_SLICE_TIMER_COUNT_DIR_t

Timer counting direction for the CCU4 slice

Enumerator
XMC_CCU4_SLICE_TIMER_COUNT_DIR_UP | Counting up
XMC_CCU4_SLICE_TIMER_COUNT_DIR_DOWN | Counting down
enum XMC_CCU4_SLICE_TIMER_COUNT_MODE_t

Timer counting modes for the slice

Enumerator
XMC_CCU4_SLICE_TIMER_COUNT_MODE_EA | Edge Aligned Mode
XMC_CCU4_SLICE_TIMER_COUNT_MODE_CA | Center Aligned Mode
enum XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t

Timer repetition mode for the slice

Enumerator
XMC_CCU4_SLICE_TIMER_REPEAT_MODE_REPEAT | Repetitive mode: continuous mode of operation
XMC_CCU4_SLICE_TIMER_REPEAT_MODE_SINGLE | Single shot mode: Once a Period match/One match occurs timer goes to idle state
enum XMC_CCU4_SLICE_TRAP_EXIT_MODE_t

Trap exit mode

Enumerator
XMC_CCU4_SLICE_TRAP_EXIT_MODE_AUTOMATIC | Clear trap state as soon as the trap signal is de-asserted
XMC_CCU4_SLICE_TRAP_EXIT_MODE_SW | Clear only when acknowledged by software
enum XMC_CCU4_SLICE_WRITE_INTO_t

Immediate write into configuration register

Note
Only available for XMC1400 series
Enumerator
XMC_CCU4_SLICE_WRITE_INTO_PERIOD_CONFIGURATION | Immediate or Coherent Write into Period Configuration
XMC_CCU4_SLICE_WRITE_INTO_COMPARE_CONFIGURATION | Immediate or Coherent Write into Compare Configuration
XMC_CCU4_SLICE_WRITE_INTO_PASSIVE_LEVEL_CONFIGURATION | Immediate or Coherent Write into Passive Level Configuration
XMC_CCU4_SLICE_WRITE_INTO_DITHER_VALUE_CONFIGURATION | Immediate or Coherent Write into Dither Value Configuration
XMC_CCU4_SLICE_WRITE_INTO_FLOATING_PRESCALER_VALUE_CONFIGURATION | Immediate or Coherent Write into Floating Prescaler Value Configuration
enum XMC_CCU4_STATUS_t

Return Value of an API

Enumerator
XMC_CCU4_STATUS_OK | API fulfils request
XMC_CCU4_STATUS_ERROR | API cannot fulfil the request
XMC_CCU4_STATUS_RUNNING | The timer slice is currently running
XMC_CCU4_STATUS_IDLE | The timer slice is currently idle

Function Documentation

void XMC_CCU4_DisableClock | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const uint8_t | slice_number
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
slice_number | Slice for which the clock should be disabled. Range: [0x0 to 0x3]
Returns

None
Description:
Disables the slice timer clock, by configuring GIDLS.SS0I, GIDLS.SSS1I, GIDLS.SSS2I, GIDLS.SSS3I bits according to the selected slice_number .

It is possible to disable clock at slice level using the module pointer. slice_number is used to disable the clock to a given slice of the module. Directly accessed Register is GIDLS.
Related APIs:
XMC_CCU4_EnableClock()
XMC_CCU4_EnableMultipleClocks()
XMC_CCU4_StartPrescaler()
XMC_CCU4_StopPrescaler().
void XMC_CCU4_DisableModule ( XMC_CCU4_MODULE_t *const module )
Parameters
module Constant pointer to CCU4 module
Returns

None
Description:
Brings the CCU4 module to reset state and enables gating of the clock signal(if applicable depending on the device being selected).

Invoke this API when a CCU4 module needs to be disabled completely. Any operation on the CCU4 module will have no effect after this API is called.
Related APIs:
XMC_CCU4_EnableModule()
XMC_CCU4_DisableModule().
void XMC_CCU4_EnableClock | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const uint8_t | slice_number
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
slice_number | Slice for which the clock should be Enabled. Range: [0x0 to 0x3]
Returns

None
Description:
Enables the slice timer clock, by configuring GIDLC.CS0I, GIDLC.CS1I, GIDLC.CS2I, GIDLC.CS3I bits according to the selected slice_number.

It is possible to enable/disable clock at slice level. This uses the slice_number to indicate the slice whose clock needs to be enabled.
Related APIs:
XMC_CCU4_DisableClock()
XMC_CCU4_EnableMultipleClocks()
XMC_CCU4_StartPrescaler()
XMC_CCU4_StopPrescaler().
void XMC_CCU4_EnableModule ( XMC_CCU4_MODULE_t *const module )
Parameters
module Constant pointer to CCU4 module
Returns

None
Description:
Enables the CCU4 module and brings it to active state.

Also disables the gating of the clock signal (if applicable depending on the device being selected). Invoke this API before any operations are done on the CCU4 module. Invoked from XMC_CCU4_Init().
Related APIs:
XMC_CCU4_SetModuleClock()
XMC_CCU4_DisableModule()
XMC_CCU4_StartPrescaler().
void XMC_CCU4_EnableMultipleClocks | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const uint8_t | clock_mask
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
clock_mask | Slices whose clocks are to be enabled simultaneously. Bit location 0/1/2/3 represents slice-0/1/2/3 respectively. Range: [0x1 to 0xF]
Returns

None
Description:
Enables clocks of multiple slices at a time, by configuring GIDLC.CS0I, GIDLC.CS1I, GIDLC.CS2I, GIDLC.CS3I bits.

Takes an input clock_mask, which determines the slices that would receive the clock. Bring them out of the idle state simultaneously.
Related APIs:
XMC_CCU4_EnableClock()
XMC_CCU4_DisableClock().
void XMC_CCU4_EnableShadowTransfer | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const uint32_t | shadow_transfer_msk
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
shadow_transfer_msk | Shadow transfer request mask for various transfers. Use XMC_CCU4_SHADOW_TRANSFER_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Requests of shadow transfer for Period, Compare, Passive level, dither and prescaler, by configuring the GCSS register.

The transfer from the shadow registers to the actual registers is done in the immediate next occurrence of the shadow transfer trigger after the API is called.

Any call to XMC_CCU4_SLICE_SetTimerPeriodMatch()
XMC_CCU4_SLICE_SetTimerCompareMatch()
XMC_CCU4_SLICE_SetPrescaler()
XMC_CCU4_SLICE_CompareInit()
XMC_CCU4_SLICE_CaptureInit(). must be succeeded by this API. Directly accessed Register is GCSS.

Related APIs:
None.
void XMC_CCU4_Init | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const XMC_CCU4_SLICE_MCMS_ACTION_t | mcs_action
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
mcs_action | multi-channel shadow transfer request configuration
Returns

None
Description:
Initialization of global register GCTRL.

As part of module initialization, behaviour of the module upon detection Multi-Channel Mode trigger is configured. Will also invoke the XMC_CCU4_EnableModule(). The API call would bring up the required CCU4 module and also initialize the module for the required multi-channel shadow transfer.
Related APIs:
XMC_CCU4_SLICE_CompareInit()
XMC_CCU4_SLICE_CaptureInit().
bool XMC_CCU4_IsPrescalerRunning ( XMC_CCU4_MODULE_t *const module )
Parameters
module Constant pointer to CCU4 module
Returns

None
Description:
Returns the state of the prescaler, by reading GSTAT.PRB bit.

This will return true if the prescaler is running. If clock is being supplied to the slices of the module then returns as true.
Related APIs:
XMC_CCU4_StartPrescaler()
XMC_CCU4_StopPrescaler()
XMC_CCU4_EnableClock()
XMC_CCU4_DisableClock().
void XMC_CCU4_SetModuleClock | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const XMC_CCU4_CLOCK_t | clock
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
clock | Choice of input clock to the module
Returns

None
Description:
Selects the Module Clock by configuring GCTRL.PCIS bits.

There are 3 potential clock sources. This API helps to select the required clock source. Call to this API is valid after the XMC_CCU4_Init().
Related APIs:
None.
void XMC_CCU4_SetMultiChannelShadowTransferMode | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const uint32_t | slice_mode_msk
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
slice_mode_msk | Slices for which the configuration has to be applied. Use XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Enables the Multi-channel shadow transfer request trigger signal either by software or hardware by configuring GCTRL.MSE0, GCTRL.MSE1, GCTRL.MSE2, and GCTRL.MSE3 based on the mask.

The shadow transfer would take place either if it was requested by software or by the CCU4x.MCSS input.
Related APIs:
None.
void XMC_CCU4_SLICE_Capture0Config | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the Capture-0 Function
Returns

None
Description:
Configures the Capture-0 Function of the slice, by configuring CC4yCMC.CAP0S bit.

Capture function is mapped with one of the 3 events. A CCU4 slice can be configured into capture-0 mode with the selected event. In this mode the CCU4 will capture the timer value into CC4yC0V and CC4yC1V.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_Capture1Config | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the Capture-1 Function
Returns

None
Description:
Configures the Capture-1 Function of the slice, by configuring CC4yCMC.CAP1S bit.

Capture function is mapped with one of the 3 events. A CCU4 slice can be configured into capture-1 mode with the selected event. In this mode the CCU4 will capture the timer value into CC4yC2V and CC4yC3V.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_CaptureInit | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_CAPTURE_CONFIG_t *const | capture_init
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
capture_init | Pointer to slice configuration structure
Returns

None
Description:
Initialization of a CC4 slice to capture mode, by configuring CC4yTC, CC4yCMC, CC4yPSC,CC4yFPCS registers.

CC4 slice is configured with Capture configurations in this routine.After initialization user has to explicitly enable the shadow transfer for the required values by calling XMC_CCU4_EnableShadowTransfer() with appropriate mask.
Related APIs:
XMC_CCU4_SLICE_Capture0Config()
XMC_CCU4_SLICE_Capture1Config().
void XMC_CCU4_SLICE_ClearEvent | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Asserted event which must be acknowledged.
Returns

None
Description:
Acknowledges an asserted event, by setting CC4ySWR with respective event flag.

Related APIs:
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_SetEvent()
XMC_CCU4_SLICE_GetEvent().
void XMC_CCU4_SLICE_ClearTimer ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Resets the timer count to zero, by setting CC4yTCCLR.TCC bit.

A timer which has been stopped can still retain the last counted value. After invoking this API the timer value will be cleared.
Related APIs:
XMC_CCU4_SLICE_StartTimer().
void XMC_CCU4_SLICE_CompareInit | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_COMPARE_CONFIG_t *const | compare_init
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
compare_init | Pointer to slice configuration structure
Returns

None
Description:
Initialization of a CC4 slice to compare mode, by configuring CC4yTC, CC4yCMC, CC4yPSC, CC4yDITH, CC4yPSL, CC4yFPCS, CC4yCHC registers.

CC4 slice is configured with Timer configurations in this routine. After initialization user has to explicitly enable the shadow transfer for the required values by calling XMC_CCU4_EnableShadowTransfer() with appropriate mask.
Related APIs:
None.
void XMC_CCU4_SLICE_ConfigureEvent | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event,
 |  | const XMC_CCU4_SLICE_EVENT_CONFIG_t *const | config
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | The External Event which needs to be configured.
config | Pointer to event configuration data.
Returns

None
Description:
Configures an External Event of the slice, by updating CC4yINS register .

Details such as the input mapped to the event, event detection criteria and low pass filter options are programmed by this routine. The Event config will configure the input selection, the edge selection, the level selection and the Low pass filter for the event.
Related APIs:
XMC_CCU4_SLICE_StartConfig()
XMC_CCU4_SLICE_StopConfig()
XMC_CCU4_SLICE_LoadConfig()
XMC_CCU4_SLICE_ModulationConfig()
XMC_CCU4_SLICE_CountConfig()
XMC_CCU4_SLICE_GateConfig()
XMC_CCU4_SLICE_Capture0Config()
XMC_CCU4_SLICE_Capture1Config()
XMC_CCU4_SLICE_DirectionConfig()
XMC_CCU4_SLICE_StatusBitOverrideConfig()
XMC_CCU4_SLICE_TrapConfig().
void XMC_CCU4_SLICE_ConfigureStatusBitOverrideEvent | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_CONFIG_t *const | ev1_config,
 |  | const XMC_CCU4_SLICE_EVENT_CONFIG_t *const | ev2_config
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
ev1_config | Pointer to event 1 configuration data
ev2_config | Pointer to event 2 configuration data
Returns

None
Description:
Map Status bit override function with an Event1 & Event 2 of the slice and configure CC4yINS register.

Details such as the input mapped to the event, event detection criteria and Low Pass filter options are programmed by this routine for the events 1 & 2. Event-1 input would be the trigger to override the value. Event-2 input would be the override value.
Related APIs:
XMC_CCU4_SLICE_StatusBitOverrideConfig().
void XMC_CCU4_SLICE_CountConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External Count Function
Returns

None
Description:
Configures the Count Function of the slice, by configuring CC4yCMC.CNTS bit.

Count function is mapped with one of the 3 events. CCU4 slice can take an external signal to act as the counting event. The CCU4 slice would count the edges present on the event selected.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_DirectionConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External Count Direction Function
Returns

None
Description:
Configures the Count Direction of the slice, by configuring CC4yCMC.UDS bit.

Count direction function is mapped with one of the 3 events. A slice can be configured to change the CC4yTIMER count direction depending on an external signal.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_DisableAutomaticShadowTransferRequest | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint32_t | automatic_shadow_transfer
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
automatic_shadow_transfer | specify upon which register update, automatic shadow transfer request should not be generated Use :: XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configure on which shadow register update, automatic shadow transfer request generation has to be disabled. By clearing ASPC, ASCC1, ASCC2, ASLC, ASDC, ASFC bits in STC register.

This disables the generation of automatic shadow transfer request for the specified register update.
Note:
Related APIs:
XMC_CCU4_SLICE_EnableAutomaticShadowTransferRequest().
Note
Only available for XMC1400 series
void XMC_CCU4_SLICE_DisableCascadedShadowTransfer ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Disables the cascaded the shadow transfer operation, by clearing CSE bit in STC register.

If in any slice the cascaded mode disabled, other slices from there onwards does not update the values in cascaded mode.
Related APIs:
XMC_CCU4_SLICE_EnableCascadedShadowTransfer()
.
Note
Only available for XMC1400 series
void XMC_CCU4_SLICE_DisableDithering ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Disables dithering of PWM frequency and duty cycle, by clearing CC4yTC.DITHE bits.

This disables the Dither mode that was set in XMC_CCU4_SLICE_EnableDithering(). This API will not clear the dither compare value.
Related APIs:
XMC_CCU4_SLICE_EnableDithering().
void XMC_CCU4_SLICE_DisableEvent | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Event whose assertion can potentially lead to an interrupt
Returns

None
Description:
Disables the generation of an interrupt pulse for the event, by clearing CC4yINTE register.

Prevents the event from being asserted
Related APIs:
XMC_CCU4_SLICE_SetInterruptNode()
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_EnableMultipleEvents()
XMC_CCU4_SLICE_DisableMultipleEvents().
void XMC_CCU4_SLICE_DisableFloatingPrescaler ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Disables the floating prescaler, by clearing CC4yTC.FPE bit.

This would return the prescaler to the normal mode. The prescaler that would be applied is the value present in CC4yPSC.
Related APIs:
XMC_CCU4_SLICE_EnableFloatingPrescaler().
void XMC_CCU4_SLICE_DisableMultiChannelMode ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Disables the multichannel mode, by clearing CC4yTC.MCME bit.

This would return the slices to the normal operation mode.
Related APIs:
XMC_CCU4_SLICE_EnableMultiChannelMode().
void XMC_CCU4_SLICE_DisableMultipleEvents | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint16_t | mask
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
mask | Event mask such that multiple events can be enabled. Use XMC_CCU4_SLICE_MULTI_IRQ_ID_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Disables the generation of an interrupt pulse for the required events, by clearing CC4yINTE register.

Prevents selected events of the slice from being asserted.
Related APIs:
XMC_CCU4_SLICE_SetInterruptNode()
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_EnableMultipleEvents()
XMC_CCU4_SLICE_DisableEvent().
void XMC_CCU4_SLICE_DisableTrap ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Disables the trap feature, by clearing CC4yTC.TRAPE0, CC4yTC.TRAPE1, CC4yTC.TRAPE2 and CC4yTC.TRAPE3 bit based on the out_mask.

.

This API will revert the changes done by XMC_CCU4_SLICE_EnableTrap(). This Ensures that the TRAP function has no effect on the output of the CCU4 slice.
Related APIs:
XMC_CCU4_SLICE_EnableTrap().
void XMC_CCU4_SLICE_EnableAutomaticShadowTransferRequest | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint32_t | automatic_shadow_transfer
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
automatic_shadow_transfer | specify upon which register update, automatic shadow transfer request is generated Use :: XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configure on which shadow register update, automatic shadow transfer request generation has to be enabled. By setting ASPC, ASCC1, ASCC2, ASLC, ASDC, ASFC bits in STC register.

By updating the configured shadow register, the shadow transfer request is generated to update all the shadow registers.
Note:
Related APIs:
XMC_CCU4_SLICE_DisableAutomaticShadowTransferRequest().
Note
Only available for XMC1400 series
void XMC_CCU4_SLICE_EnableCascadedShadowTransfer ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Cascades the shadow transfer operation throughout the CCU4 timer slices, by setting CSE bit in STC register.

The shadow transfer enable bits needs to be set in all timer slices, that are being used in the cascaded architecture, at the same time. The shadow transfer enable bits, also need to be set for all slices even if the shadow values of some slices were not updated. It is possible to to cascade with the adjacent slices only. CC40 slice is a master to start the operation.
Note:
XMC_CCU4_EnableShadowTransfer() must be called to enable the shadow transfer of the all the slices, which needs to be cascaded.
Related APIs:
XMC_CCU4_EnableShadowTransfer(), XMC_CCU4_SLICE_DisableCascadedShadowTransfer()
.
Note
Only available for XMC1400 series
void XMC_CCU4_SLICE_EnableDithering | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const bool | period_dither,
 |  | const bool | duty_dither,
 |  | const uint8_t | spread
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
period_dither | Boolean instruction on dithering of period match
duty_dither | Boolean instruction on dithering of compare match
spread | Dither compare value
Returns

None
Description:
Enables dithering of PWM frequency and duty cycle, by configuring CC4yTC.DITHE and CC4yDITS bits.

Some control loops are slow in updating PWM frequency and duty cycle. In such a case, a Bresenham style dithering can help reduce long term errors. Dithering can be applied to period and duty individually, this can be selected using the parameter period_dither and duty_dither. The spread would provide the dither compare value. If the dither counter value is less than this spread then the period/compare values would be dithered according to the dither mode selected. This API would invoke XMC_CCU4_SLICE_SetDitherCompareValue().
Note:
After this API call, XMC_CCU4_EnableShadowTransfer() has to be called with appropriate mask to transfer the dither value.
Related APIs:
XMC_CCU4_SLICE_DisableDithering().
void XMC_CCU4_SLICE_EnableEvent | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Event whose assertion can potentially lead to an interrupt
Returns

None
Description:
Enables the generation of an interrupt pulse for the event, by configuring CC4yINTE register.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API merely enables the event. Binding with SR is performed by another API.
Related APIs:
XMC_CCU4_SLICE_SetInterruptNode()
XMC_CCU4_SLICE_EnableMultipleEvents()
XMC_CCU4_SLICE_DisableEvent()
XMC_CCU4_SLICE_DisableMultipleEvents().
void XMC_CCU4_SLICE_EnableFloatingPrescaler ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Enables the floating prescaler, by setting CC4yTC.FPE bit.

The prescaler divider starts with an initial value and increments upon every period match. It keeps incrementing until a ceiling (prescaler compare value) is hit and thereafter rolls back to the original prescaler divider value.
It is necessary to have programmed an initial divider value and a compare value before the feature is enabled.
Related APIs:
XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue()
XMC_CCU4_SLICE_DisableFloatingPrescaler()
XMC_CCU4_SLICE_SetPrescaler().
void XMC_CCU4_SLICE_EnableMultiChannelMode ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Enables the multichannel mode, by setting CC4yTC.MCME bit.

The output state of the Timer slices can be controlled in parallel by a single input signal. A particularly useful feature in motor control applications where the PWM output of multiple slices of a module can be gated and ungated by multi-channel gating inputs connected to the slices. A peripheral like POSIF connected to the motor knows exactly which of the power drive switches are to be turned on and off at any instant. It can thus through a gating bus (known as multi-channel inputs) control which of the slices output stays gated/ungated.
Related APIs:
XMC_CCU4_SLICE_DisableMultiChannelMode()
XMC_CCU4_SetMultiChannelShadowTransferMode().
void XMC_CCU4_SLICE_EnableMultipleEvents | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint16_t | intr_mask
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
intr_mask | Event mask such that multiple events can be enabled. Use XMC_CCU4_SLICE_MULTI_IRQ_ID_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Enables the generation of an interrupt pulse for the required events, by configuring CC4yINTE register.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API merely enables the events. Binding with SR is performed by another API.
Related APIs:
XMC_CCU4_SLICE_SetInterruptNode()
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_DisableEvent()
XMC_CCU4_SLICE_DisableMultipleEvents().
void XMC_CCU4_SLICE_EnableTrap ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Enables the trap feature, by setting CC4yTC.TRAPE0, CC4yTC.TRAPE1, CC4yTC.TRAPE2 and CC4yTC.TRAPE3 bit based on the out_mask.

A particularly useful feature where the PWM output can be forced inactive upon detection of a trap. The trap signal can be the output of a sensing element which has just detected an abnormal electrical condition.
Related APIs:
XMC_CCU4_SLICE_TrapConfig()
XMC_CCU4_SLICE_DisableTrap()
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_GateConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External Gating Function
Returns

None
Description:
Configures the Gating Function of the slice, by configuring CC4yCMC.GATES bit.

Gating function is mapped with one of the 3 events. A CCU4 slice can use an input signal that would operate as counter gating. If the configured Active level is detected the counter will gate all the pulses.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
uint32_t XMC_CCU4_SLICE_GetCapturedValueFromFifo | ( | const XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_CAP_REG_SET_t | set
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
set | The capture register set from which the captured value is to be retrieved
Returns

uint32_t Returns the value captured in the slice_number Range: [0x0 to 0xFFFF]
Description:
Read captured value from FIFO(CC4yECRD0 and CC4yECRD1).

This is applicable only in the Capture mode of operation. The signal whose timing characteristics are to be measured must be mapped to an event which in turn must be mapped to the capture function. Based on the capture criteria, the instant timer values are captured into capture registers. Timing characteristics of the input signal may then be derived/inferred from the captured values.
Related APIs:
XMC_CCU4_SLICE_IsExtendedCapReadEnabled().
Note
Defined for XMC4800, XMC4700, XMC4500, XMC4400, XMC4200, XMC4100 devices only. For other devices use XMC_CCU4_GetCapturedValueFromFifo() API
uint32_t XMC_CCU4_SLICE_GetCaptureRegisterValue | ( | const XMC_CCU4_SLICE_t *const | slice,
 |  | const uint8_t | reg_num
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
reg_num | The capture register from which the captured value is to be retrieved Range: [0,3]
Returns

uint32_t Returns the Capture register value. Range: [0 to 0x1FFFFF]
Description:
Retrieves timer value which has been captured in the Capture registers, by reading CC4yCV[reg_num] register.

The signal whose timing characteristics are to be measured must be mapped to an event which in turn must be mapped to the capture function. Based on the capture criteria, the timer values are captured into capture registers. Timing characteristics of the input signal may then be derived/inferred from the captured values. The full flag will help to find out if there is a new captured value present.
Related APIs:
XMC_CCU4_SLICE_GetLastCapturedTimerValue().
XMC_CCU4_SLICE_TIMER_COUNT_DIR_t XMC_CCU4_SLICE_GetCountingDir ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

XMC_CCU4_SLICE_TIMER_COUNT_DIR_t returns the direction in which the timer is counting.
Description:
Returns the timer counting direction, by reading CC4yTCST.CDIR bit.

This API will return the direction in which the timer is currently incrementing(XMC_CCU4_SLICE_TIMER_COUNT_DIR_UP) or decrementing (XMC_CCU4_SLICE_TIMER_COUNT_DIR_DOWN).
Related APIs:
None.
bool XMC_CCU4_SLICE_GetEvent | ( | const XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Event to be evaluated for assertion
Returns

bool Returns true if event is set else false is returned.
Description:
Evaluates if a given event is asserted or not, by reading CC4yINTS register.

Return true if the event is asserted. For a event to be asserted it has to be first enabled. Only if that event is enabled the call to this API is valid. If the Event is enabled and has not yet occurred then a false is returned.
Related APIs:
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_SetEvent().
XMC_CCU4_STATUS_t XMC_CCU4_SLICE_GetLastCapturedTimerValue | ( | const XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_CAP_REG_SET_t | set,
 |  | uint32_t * | val_ptr
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
set | The capture register set, which must be evaluated
val_ptr | Out Parameter of the API.Stores the captured timer value into this out parameter.
Returns

XMC_CCU4_STATUS_t Returns XMC_CCU4_STATUS_OK if there was new value present in the capture registers. returns XMC_CCU4_STATUS_ERROR if there was no new value present in the capture registers.
Description:
Retrieves the latest captured timer value, by reading CC4yCV registers.

Retrieve the timer value last stored by the slice. When separate capture events are used, users must specify the capture set to evaluate. If single capture event mode is used, all 4 capture registers are evaluated.
The lowest register is evaluated first followed by the next higher ordered register and this continues until all capture registers have been evaluated.
Related APIs:
XMC_CCU4_SLICE_GetCaptureRegisterValue().
XMC_CCU4_SLICE_MODE_t XMC_CCU4_SLICE_GetSliceMode ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

XMC_CCU4_SLICE_MODE_t returns XMC_CCU4_SLICE_MODE_COMPARE if the slice is operating in compare mode returns XMC_CCU4_SLICE_MODE_CAPTURE if the slice is operating in capture mode
Description:
Retrieves the current mode of operation in the slice (either Capture mode or Compare mode), by reading CC4yTC.CMOD bit.

Ensure that before invoking this API the CCU4 slice should be configured otherwise the output of this API is invalid.
Related APIs:
None.
uint16_t XMC_CCU4_SLICE_GetTimerCompareMatch ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

uint16_t returns the current timer compare value Range: [0x0 to 0xFFFF]
Description:
Retrieves the timer compare value currently effective, by reading CC4yCRS register.

If the timer is active then the value being returned is currently being for the PWM duty cycle( timer compare value).
Note:
The XMC_CCU4_SLICE_SetTimerCompareMatch() would set the new compare value to a shadow register. This would only transfer the new values into the actual compare register if the shadow transfer request is enabled and if a period match occurs. Hence a consecutive call to XMC_CCU4_SLICE_GetTimerCompareMatch() would not reflect the new values until the shadow transfer completes. Directly accessed Register is CC4yCR.
Related APIs:
XMC_CCU4_SLICE_SetTimerCompareMatch().
XMC_CCU4_SLICE_TIMER_COUNT_MODE_t XMC_CCU4_SLICE_GetTimerCountingMode ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

XMC_CCU4_SLICE_TIMER_COUNT_MODE_t returns XMC_CCU4_SLICE_TIMER_COUNT_MODE_EA if edge aligned mode is selected returns XMC_CCU4_SLICE_TIMER_COUNT_MODE_CA if center aligned mode is selected
Description:
Retrieves timer counting mode either Edge aligned or Center Aligned, by reading CC4yTC.TCM bit.

Related APIs:
XMC_CCU4_SLICE_SetTimerCountingMode().
uint16_t XMC_CCU4_SLICE_GetTimerPeriodMatch ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

uint16_t returns the current timer period value Range: [0x0 to 0xFFFF]
Description:
Retrieves the timer period value currently effective, by reading CC4yPR register.

If the timer is active then the value being returned is currently being used for the PWM period.
Note:
The XMC_CCU4_SLICE_SetTimerPeriodMatch() would set the new period value to a shadow register. This would only transfer the new values into the actual period register if the shadow transfer request is enabled and if a period match occurs. Hence a consecutive call to XMC_CCU4_SLICE_GetTimerPeriodMatch() would not reflect the new values until the shadow transfer completes.
Related APIs:
XMC_CCU4_SLICE_SetTimerPeriodMatch().
XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t XMC_CCU4_SLICE_GetTimerRepeatMode ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t returns XMC_CCU4_SLICE_TIMER_REPEAT_MODE_REPEAT if continuous mode is selected returns XMC_CCU4_SLICE_TIMER_REPEAT_MODE_SINGLE if single shot mode is selected
Description:
Retrieves the Timer repeat mode, either Single shot mode or continuous mode, by reading CC4yTC.TSSM bit.

The timer will count up to the terminal count as specified in the period register and stops immediately if the repeat mode has been set to single shot mode. In the continuous mode of operation, the timer starts counting all over again after reaching the terminal count.
Related APIs:
XMC_CCU4_SLICE_SetTimerRepeatMode().
uint16_t XMC_CCU4_SLICE_GetTimerValue ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

uint16_t returns the current timer value Range: [0x0 to 0xFFFF]
Description:
Retrieves the latest timer value, from CC4yTIMER register.

Related APIs:
XMC_CCU4_SLICE_SetTimerValue().
bool XMC_CCU4_SLICE_IsExtendedCapReadEnabled ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

bool would return true if the extended capture read back mode is enabled
Description:
Checks if Extended capture mode read is enabled for particular slice or not, by reading CC4yTC.ECM bit.

In this mode the there is only one associated read address for all the capture registers. Individual capture registers can still be accessed in this mode.
Related APIs:
XMC_CCU4_GetCapturedValueFromFifo().
bool XMC_CCU4_SLICE_IsTimerRunning ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

bool returns true if the Timer is running else it returns false.
Description:
Returns the state of the timer (Either Running or stopped(idle)), by reading CC4yTCST.TRB bit.
Related APIs:
XMC_CCU4_SLICE_StartTimer()
XMC_CCU4_SLICE_StopTimer().
void XMC_CCU4_SLICE_LoadConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External load Function
Returns

None
Description:
Configures the Load Function for the slice, by configuring CC4yCMC.LDS bit.

Load function is mapped with one of the 3 events. Up on occurrence of the event,
if CC4yTCST.CDIR set to 0,CC4yTIMER register is reloaded with the value from compare register
if CC4yTCST.CDIR set to 1,CC4yTIMER register is reloaded with the value from period register
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_ModulationConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event,
 |  | const XMC_CCU4_SLICE_MODULATION_MODE_t | mod_mode,
 |  | const bool | synch_with_pwm
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External Modulation Function
mod_mode | Desired Modulation mode
synch_with_pwm | Option to synchronize modulation with PWM start Pass true if the modulation needs to be synchronized with PWM signal.
Returns

None
Description:
Configures the Output Modulation Function of the slice, by configuring CCeyCMC.MOS, CC4yTC.EMT and CC4yTC.EMS bits.

Modulation function is mapped with one of the 3 events. The output signal of the CCU can be modulated according to a external input. Additionally, the behaviour of the slice upon activation of the modulation function is configured as well.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_SetDitherCompareValue | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint8_t | comp_val
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
comp_val | Dither compare value Range: [0x0 to 0xF]
Returns

None
Description:
Sets the dither spread/compare value, by setting CC4yDITS.DCVS bits.

This value is the cornerstone of PWM dithering feature. Dithering is applied/done when the value in the dithering counter is less than this compare/spread value. For all dithering counter values greater than the spread value, there is no dithering. After setting the value XMC_CCU4_EnableShadowTransfer() has to be called with appropriate mask.
Related APIs:
XMC_CCU4_SLICE_EnableDithering().
void XMC_CCU4_SLICE_SetEvent | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Event whose assertion can potentially lead to an interrupt
Returns

None
Description:
Manually asserts the requested event, by setting CC4ySWS register.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API manually asserts the requested event.
Related APIs:
XMC_CCU4_SLICE_SetInterruptNode()
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_EnableMultipleEvents().
void XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint8_t | cmp_val
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
cmp_val | Prescaler divider compare value Range: [0x0 to 0xF]
Returns

None
Description:
Programs the slice specific prescaler divider compare value, by configuring CC4yFPCS register.

The compare value is applicable only in floating mode of operation. The prescaler divider starts with an initial value and increments to the compare value steadily upon every period match. Once prescaler divider equals the prescaler divider compare value, the value in the former resets back to the PVAL (from FPC). After setting the value, XMC_CCU4_EnableShadowTransfer() has to be called with appropriate mask.
Related APIs:
XMC_CCU4_SLICE_SetPrescaler().
void XMC_CCU4_SLICE_SetInput | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event,
 |  | const XMC_CCU4_SLICE_INPUT_t | input
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | The External Event which needs to be configured.
input | One of the 16 inputs meant to be mapped to the desired event
Returns

None
Description:
Selects an input for an external event, by configuring CC4yINS register.

It is possible to select one of the possible 16 input signals for a given Event. This configures the CC4yINS.EVxIS for the selected event.
Related APIs:
XMC_CCU4_SLICE_StartConfig()
XMC_CCU4_SLICE_StopConfig()
XMC_CCU4_SLICE_LoadConfig()
XMC_CCU4_SLICE_ModulationConfig()
XMC_CCU4_SLICE_CountConfig()
XMC_CCU4_SLICE_GateConfig()
XMC_CCU4_SLICE_Capture0Config()
XMC_CCU4_SLICE_Capture1Config()
XMC_CCU4_SLICE_DirectionConfig()
XMC_CCU4_SLICE_StatusBitOverrideConfig()
XMC_CCU4_SLICE_TrapConfig().
void XMC_CCU4_SLICE_SetInterruptNode | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_IRQ_ID_t | event,
 |  | const XMC_CCU4_SLICE_SR_ID_t | sr
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Event which must be bound to a service request line
sr | The Service request line which is bound to the event
Returns

None
Description:
Binds requested event to a service request line, by configuring CC4ySRS register with respective event.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API binds the requested event with the requested service request line(sr).
Related APIs:
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_SetEvent().
void XMC_CCU4_SLICE_SetPassiveLevel | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t | level
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
level | Slice output passive level
Returns

None
Description:
Configures the passive level for the slice output, by setting CC4yPSL register.

Defines the passive level for the timer slice output pin. Selects either level high is passive or level low is passive. This is the level of the output before the compare match is value changes it.
Related APIs:
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_SetEvent().
void XMC_CCU4_SLICE_SetPrescaler | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_PRESCALER_t | div_val
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
div_val | Prescaler divider value. Accepts enum :: XMC_CCU4_SLICE_PRESCALER_t Range: [0x0 to 0xF]
Returns

None
Description:
Programs the slice specific prescaler divider, by configuring the CC4yPSC and CC4yFPC registers.

The prescaler divider may only be programmed after the prescaler run bit has been cleared by calling XMC_CCU4_StopPrescaler().
Related APIs:
XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue().
void XMC_CCU4_SLICE_SetShadowTransferMode | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t | shadow_transfer_mode
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
shadow_transfer_mode | mode to be configured Use :: XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t enum items for mode
Returns

None
Description:
Configures when the shadow transfer has to occur, by setting STM bit in STC register.

After requesting for shadow transfer mode using XMC_CCU4_EnableShadowTransfer(), actual transfer occurs based on the selection done using this API (i.e. on period and One match, on Period match only, on One match only).
Note:
This is effective when the timer is configured in centre aligned mode.
Related APIs:
XMC_CCU4_EnableShadowTransfer()
Note
Only available for XMC1400 series
void XMC_CCU4_SLICE_SetTimerCompareMatch | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint16_t | compare_val
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
compare_val | Timer compare value
Returns

None
Description:
Programs the timer compare value, by writing CC4yCRS register.

The PWM duty cycle is determined by this value. The compare value is written to a shadow register. Explicitly enable the shadow transfer for the the period/compare value by calling XMC_CCU4_EnableShadowTransfer() with appropriate mask.If shadow transfer is enabled and the timer is running, a period match transfers the value from the shadow register to the actual compare register.
Related APIs:
XMC_CCU4_SLICE_GetTimerPeriodMatch().
void XMC_CCU4_SLICE_SetTimerCountingMode | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_TIMER_COUNT_MODE_t | mode
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
mode | Desired counting mode (Either Edge Aligned or Center Aligned)
Returns

None
Description:
Configures the timer counting mode either Edge Aligned or Center Aligned, by configuring CC4yTC.TCM bit.

In the edge aligned mode, the timer counts from 0 to the terminal count. Once the timer count has reached a preset compare value, the timer status output asserts itself. It will now deassert only after the timer count reaches the terminal count.
In the center aligned mode, the timer first counts from 0 to the terminal count and then back to 0. During this upward and downward counting, the timer status output stays asserted as long as the timer value is greater than the compare value.
Related APIs:
XMC_CCU4_SLICE_GetTimerCountingMode().
void XMC_CCU4_SLICE_SetTimerPeriodMatch | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint16_t | period_val
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
period_val | Timer period value Range: [0x0 to 0xFFFF]
Returns

None
Description:
Programs the timer period, by writing CC4yPRS register.

The frequency of counting/ PWM frequency is determined by this value. The period value is written to a shadow register. Explicitly enable the shadow transfer for the the period value by calling XMC_CCU4_EnableShadowTransfer() with appropriate mask. If shadow transfer is enabled and the timer is running, a period match transfers the value from the shadow register to the actual period register.
Related APIs:
XMC_CCU4_SLICE_GetTimerPeriodMatch().
void XMC_CCU4_SLICE_SetTimerRepeatMode | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t | mode
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
mode | Desired repetition mode (Either single shot or Continuous)
Returns

None
Description:
Configures the Timer to either Single shot mode or continuous mode, by configuring CC4yTC.TSSM bit.

The timer will count up to the terminal count as specified in the period register and stops immediately if the repeat mode has been set to single shot. In the continuous mode of operation, the timer starts counting all over again after reaching the terminal count.
Related APIs:
XMC_CCU4_SLICE_GetTimerRepeatMode().
void XMC_CCU4_SLICE_SetTimerValue | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint16_t | timer_val
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
timer_val | The new timer value that has to be loaded into the TIMER register. Range: [0x0 to 0xFFFF]
Returns

None
Description:
Loads a new timer value, by setting CC4yTIMER register.

Note:
Request to load is ignored if the timer is running.
Related APIs:
XMC_CCU4_SLICE_GetTimerValue().
void XMC_CCU4_SLICE_StartConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event,
 |  | const XMC_CCU4_SLICE_START_MODE_t | start_mode
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External Start Function
start_mode | Behavior of slice when the start function is activated
Returns

None
Description:
Configures the Start Function of the slice, by configuring CC4yCMC.ENDS and CC4yTC.ENDM bits.

Start function is mapped with one of the 3 events. An external signal can control when a CC4 timer should start. Additionally, the behaviour of the slice upon activation of the start function is configured as well.
Related APIs:
XMC_CCU4_SLICE_StopConfig()
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_StartTimer ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Starts the timer counting operation, by setting CC4yTCSET.TRBS bit.

It is necessary to have configured the CC4 slice before starting its timer. Before the Timer is started ensure that the clock is provided to the slice.
Related APIs:
XMC_CCU4_SLICE_StopTimer().
void XMC_CCU4_SLICE_StatusBitOverrideConfig ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Configures the status bit override Function of the slice, by configuring CC4yCMC.OFS bit.

Status bit override function is mapped with one of the 3 events. A slice can be configured to change the output of the timer's CC4yST signal depending on an external signal.
Related APIs:
XMC_CCU4_SLICE_ConfigureStatusBitOverrideEvent().
void XMC_CCU4_SLICE_StopClearTimer ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Stops and resets the timer count to zero, by setting CC4yTCCLR.TCC and CC4yTCCLR.TRBC bit.

Related APIs:
XMC_CCU4_SLICE_StartTimer().
void XMC_CCU4_SLICE_StopConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event,
 |  | const XMC_CCU4_SLICE_END_MODE_t | end_mode
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External Stop Function
end_mode | Behavior of slice when the stop function is activated
Returns

None
Description:
Configures the Stop function for the slice, by configuring CC4yCMC.STRTS and CC4yTC.STRM bits.

Stop function is mapped with one of the 3 events. An external signal can control when a CCU4 timer should stop. Additionally, the behaviour of the slice upon activation of the stop function is configured as well.
Related APIs:
XMC_CCU4_SLICE_StartConfig()
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_StopTimer ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Stops the Timer.

Timer counting operation can be stopped by invoking this API, by setting CC4yTCCLR.TRBC bit.
Related APIs:
XMC_CCU4_SLICE_StartTimer().
void XMC_CCU4_SLICE_TrapConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_TRAP_EXIT_MODE_t | exit_mode,
 |  | bool | synch_with_pwm
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
exit_mode | How should a previously logged trap state be exited?
synch_with_pwm | Should exit of trap state be synchronized with PWM cycle start?
Returns

None
Description:
Configures the Trap Function of the slice, by configuring CC4yCMC.TS, CC4yTC.TRPSE, and CC4yTC.TRPSW bits.

Trap function is mapped with Event-2. Criteria for exiting the trap state is configured. This trap function allows PWM outputs to react on the state of an input pin. Thus PWM output can be forced to inactive state upon detection of a trap. It is also possible to synchronize the trap function with the PWM signal using the synch_with_pwm.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_WriteCoherentlyWithPWMCycle | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint32_t | coherent_write
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
coherent_write | specifies for what fields this mode has to be applied Use :: XMC_CCU4_SLICE_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configures the specified fields shadow value to be updated in synchronous with PWM after shadow transfer request, by clearing IRPC, IRCC1, IRCC2, IRLC, IRDC, IRFC bits in STC register.

When coherent shadow is enabled, after calling XMC_CCU4_EnableShadowTransfer(), the value which are written in the respective shadow registers get updated according the configuration done using XMC_CCU4_SLICE_SetShadowTransferMode() API.
Note:
Related APIs:
XMC_CCU4_EnableShadowTransfer(), XMC_CCU4_SLICE_SetShadowTransferMode()
Note
Only available for XMC1400 series
void XMC_CCU4_SLICE_WriteImmediateAfterShadowTransfer | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint32_t | immediate_write
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
immediate_write | specifies for what fields this mode has to be applied Use :: XMC_CCU4_SLICE_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configures the specified fields shadow value to be updated immediately after shadow transfer request, by setting IRPC, IRCC1, IRCC2, IRLC, IRDC, IRFC bits in STC register.

When immediate shadow is enabled, by calling XMC_CCU4_EnableShadowTransfer() the value which are written in the shadow registers get updated to the actual registers immediately.
Note:
Related APIs:
XMC_CCU4_EnableShadowTransfer()
Note
Only available for XMC1400 series
void XMC_CCU4_StartPrescaler ( XMC_CCU4_MODULE_t *const module )
Parameters
module Constant pointer to CCU4 module
Returns

None
Description:
Starts the prescaler and restores clocks to the timer slices, by setting GIDLC.SPRB bit.

Once the input to the prescaler has been chosen and the prescaler divider of all slices programmed, the prescaler itself may be started. Invoke this API after XMC_CCU4_Init() (Mandatory to fully initialize the module).Directly accessed register is GIDLC.
Related APIs:
XMC_CCU4_Init()
XMC_CCU4_EnableClock()
XMC_CCU4_DisableClock()
XMC_CCU4_StartPrescaler()
XMC_CCU4_StopPrescaler().
void XMC_CCU4_StopPrescaler ( XMC_CCU4_MODULE_t *const module )
Parameters
module Constant pointer to CCU4 module
Returns

None
Description:
Stops the prescaler and blocks clocks to the timer slices, by setting GIDLS.CPRB bit.

Opposite of the StartPrescaler routine. Clears the run bit of the prescaler. Ensures that the module clock is not supplied to the slices of the module.Registers directly accessed is GIDLS.
Related APIs:
XMC_CCU4_EnableClock()
XMC_CCU4_DisableClock()
XMC_CCU4_StartPrescaler()
XMC_CCU4_StopPrescaler().
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_CCU4_SLICE_CAPTURE_CONFIG_t Struct Reference

Data Fields
XMC_CCU4_SLICE_CAPTURE_CONFIG_t Struct Reference
XMC Peripheral Library » CCU4

#include <xmc_ccu4.h>

Data Fields

uint32_t | float_limit: 4
uint32_t | prescaler_initval: 4
uint32_t | timer_concatenation: 1
uint32_t | fifo_enable: 1
uint32_t | ignore_full_flag: 1
uint32_t | prescaler_mode: 1
uint32_t | same_event: 1
uint32_t | timer_clear_mode: 2

Detailed Description

Configuration data structure for CCU4 slice. Specifically configures the CCU4 slice to capture mode operation. This excludes event and function configuration.

Field Documentation

uint32_t fifo_enable

Should the capture registers be setup as a FIFO?(Extended capture mode)

uint32_t float_limit

The max value which the prescaler divider can increment to

uint32_t ignore_full_flag

Should updates to capture registers follow full flag rules?

uint32_t prescaler_initval

Prescaler divider value

uint32_t prescaler_mode

Normal or floating prescaler Accepts enum :: XMC_CCU4_SLICE_PRESCALER_MODE_t

uint32_t same_event

Should the capture event for C1V/C0V and C3V/C2V be same capture edge?

uint32_t timer_clear_mode

How should the timer register be cleared upon detection of capture event? Accepts enum XMC_CCU4_SLICE_TIMER_CLEAR_MODE_t

uint32_t timer_concatenation

Enables the concatenation of the timer

The documentation for this struct was generated from the following file:
  • xmc_ccu4.h


XMC Peripheral Library for XMC4000 Family: XMC_CCU4_SLICE_COMPARE_CONFIG_t Struct Reference

Data Fields
XMC_CCU4_SLICE_COMPARE_CONFIG_t Struct Reference
XMC Peripheral Library » CCU4

#include <xmc_ccu4.h>

Data Fields

uint32_t | dither_limit: 4
uint32_t | float_limit: 4
uint32_t | passive_level: 1
uint32_t | prescaler_initval: 4
uint32_t | timer_concatenation: 1
uint32_t | dither_duty_cycle: 1
uint32_t | dither_timer_period: 1
uint32_t | mcm_enable: 1
uint32_t | monoshot: 1
uint32_t | prescaler_mode: 1
uint32_t | shadow_xfer_clear: 1
uint32_t | timer_mode: 1

Detailed Description

Configuration data structure for CCU4 slice. Specifically configures the CCU4 slice to compare mode operation. This excludes event and function configuration.

Field Documentation

uint32_t dither_duty_cycle

Can the compare match of the timer dither?

uint32_t dither_limit

The value that determines the spreading of dithering

uint32_t dither_timer_period

Can the period of the timer dither?

uint32_t float_limit

The max value which the prescaler divider can increment to

uint32_t mcm_enable

Multi-Channel mode enable?

uint32_t monoshot

Single shot or Continuous mode . Accepts enum :: XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t

uint32_t passive_level

Configuration of ST and OUT passive levels. Accepts enum :: XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t

uint32_t prescaler_initval

Initial prescaler divider value Accepts enum :: XMC_CCU4_SLICE_PRESCALER_t

uint32_t prescaler_mode

Normal or floating prescaler mode. Accepts enum :: XMC_CCU4_SLICE_PRESCALER_MODE_t

uint32_t shadow_xfer_clear

Should PR and CR shadow xfer happen when timer is cleared?

uint32_t timer_concatenation

Enables the concatenation of the timer if true.

uint32_t timer_mode

Edge aligned or Centre Aligned. Accepts enum XMC_CCU4_SLICE_TIMER_COUNT_MODE_t

The documentation for this struct was generated from the following file:
  • xmc_ccu4.h


XMC Peripheral Library for XMC4000 Family: XMC_CCU4_SLICE_EVENT_CONFIG_t Struct Reference

Data Fields
XMC_CCU4_SLICE_EVENT_CONFIG_t Struct Reference
XMC Peripheral Library » CCU4

#include <xmc_ccu4.h>

Data Fields

XMC_CCU4_SLICE_EVENT_FILTER_t duration
XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_t edge
XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_t level
XMC_CCU4_SLICE_INPUT_t mapped_input

Detailed Description

Configuration data structure of an External Event(Event-0/1/2). Needed to configure the various aspects of an External Event. This structure will not connect the external event with an external function.

Field Documentation

XMC_CCU4_SLICE_EVENT_FILTER_t duration

Low Pass filter duration in terms of fCCU clock cycles

XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_t edge

Select the event edge of the input signal. This is needed for an edge sensitive External function.

XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_t level

Select the event level of the input signal. This is needed for an level sensitive External function.

XMC_CCU4_SLICE_INPUT_t mapped_input

Required input signal for the Event

The documentation for this struct was generated from the following file:
  • xmc_ccu4.h


XMC Peripheral Library for XMC4000 Family: CCU8

Data Structures | Typedefs | Enumerations | Functions
CCU8
XMC Peripheral Library

Data Structures

struct | XMC_CCU8_SLICE_CAPTURE_CONFIG_t
struct | XMC_CCU8_SLICE_COMPARE_CONFIG_t
struct | XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t
struct | XMC_CCU8_SLICE_EVENT_CONFIG_t

Typedefs

typedef CCU8_GLOBAL_TypeDef | XMC_CCU8_MODULE_t
typedef uint8_t | XMC_CCU8_SLICE_INPUT_t
typedef CCU8_CC8_TypeDef | XMC_CCU8_SLICE_t

Enumerations

Functions

void | XMC_CCU8_DisableClock (XMC_CCU8_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU8_DisableModule (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_EnableClock (XMC_CCU8_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU8_EnableModule (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_EnableMultipleClocks (XMC_CCU8_MODULE_t *const module, const uint8_t clock_mask)
void | XMC_CCU8_EnableShadowTransfer (XMC_CCU8_MODULE_t *const module, const uint32_t shadow_transfer_msk)
void | XMC_CCU8_Init (XMC_CCU8_MODULE_t *const module, const XMC_CCU8_SLICE_MCMS_ACTION_t mcs_action)
bool | XMC_CCU8_IsPrescalerRunning (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_SetModuleClock (XMC_CCU8_MODULE_t *const module, const XMC_CCU8_CLOCK_t clock)
void | XMC_CCU8_SetMultiChannelShadowTransferMode (XMC_CCU8_MODULE_t *const module, const uint32_t slice_mode_msk)
void | XMC_CCU8_SLICE_Capture0Config (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_Capture1Config (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_CaptureInit (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_CAPTURE_CONFIG_t *const capture_init)
void | XMC_CCU8_SLICE_ClearEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_ClearTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_CompareInit (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CONFIG_t *const compare_init)
void | XMC_CCU8_SLICE_ConfigureDeadTime (XMC_CCU8_SLICE_t *const slice, const uint8_t mask)
void | XMC_CCU8_SLICE_ConfigureEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_EVENT_CONFIG_t *config)
void | XMC_CCU8_SLICE_ConfigureStatusBitOutput (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_STATUS_t channel)
void | XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_CONFIG_t *const ev1_config, const XMC_CCU8_SLICE_EVENT_CONFIG_t *const ev2_config)
void | XMC_CCU8_SLICE_CountConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_DeadTimeInit (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t *const config)
void | XMC_CCU8_SLICE_DirectionConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest (XMC_CCU8_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU8_SLICE_DisableCascadedShadowTransfer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_DisableDithering (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_DisableEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_DisableFloatingPrescaler (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_DisableMultiChannelMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
void | XMC_CCU8_SLICE_DisableMultipleEvents (XMC_CCU8_SLICE_t *const slice, const uint16_t mask)
void | XMC_CCU8_SLICE_DisableTrap (XMC_CCU8_SLICE_t *const slice, const uint32_t out_mask)
void | XMC_CCU8_SLICE_EnableAsymmetricCompareMode (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest (XMC_CCU8_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU8_SLICE_EnableCascadedShadowTransfer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableDithering (XMC_CCU8_SLICE_t *const slice, const bool period_dither, const bool duty_dither, const uint8_t spread)
void | XMC_CCU8_SLICE_EnableEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_EnableFloatingPrescaler (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableMultiChannelMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
void | XMC_CCU8_SLICE_EnableMultipleEvents (XMC_CCU8_SLICE_t *const slice, const uint16_t mask)
void | XMC_CCU8_SLICE_EnableSymmetricCompareMode (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableTrap (XMC_CCU8_SLICE_t *const slice, const uint32_t out_mask)
void | XMC_CCU8_SLICE_GateConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
uint32_t | XMC_CCU8_SLICE_GetCapturedValueFromFifo (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_CAP_REG_SET_t set)
uint32_t | XMC_CCU8_SLICE_GetCaptureRegisterValue (const XMC_CCU8_SLICE_t *const slice, const uint8_t reg_num)
XMC_CCU8_SLICE_TIMER_COUNT_DIR_t | XMC_CCU8_SLICE_GetCountingDir (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_GetEvent (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
XMC_CCU8_STATUS_t | XMC_CCU8_SLICE_GetLastCapturedTimerValue (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_CAP_REG_SET_t set, uint32_t *val_ptr)
XMC_CCU8_SLICE_MODE_t | XMC_CCU8_SLICE_GetSliceMode (const XMC_CCU8_SLICE_t *const slice)
uint16_t | XMC_CCU8_SLICE_GetTimerCompareMatch (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel)
XMC_CCU8_SLICE_TIMER_COUNT_MODE_t | XMC_CCU8_SLICE_GetTimerCountingMode (const XMC_CCU8_SLICE_t *const slice)
uint16_t | XMC_CCU8_SLICE_GetTimerPeriodMatch (const XMC_CCU8_SLICE_t *const slice)
XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t | XMC_CCU8_SLICE_GetTimerRepeatMode (const XMC_CCU8_SLICE_t *const slice)
uint16_t | XMC_CCU8_SLICE_GetTimerValue (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsDeadTimeCntr1Running (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsDeadTimeCntr2Running (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsExtendedCapReadEnabled (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsTimerRunning (const XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_LoadConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_LoadSelector (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
void | XMC_CCU8_SLICE_ModulationConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_MODULATION_MODE_t mod_mode, const XMC_CCU8_SLICE_MODULATION_CHANNEL_t channel, const bool synch_with_pwm)
void | XMC_CCU8_SLICE_SetDeadTimePrescaler (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_DTC_DIV_t div_val)
void | XMC_CCU8_SLICE_SetDeadTimeValue (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel, const uint8_t rise_value, const uint8_t fall_value)
void | XMC_CCU8_SLICE_SetDitherCompareValue (XMC_CCU8_SLICE_t *const slice, const uint8_t comp_val)
void | XMC_CCU8_SLICE_SetEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue (XMC_CCU8_SLICE_t *const slice, const uint8_t cmp_val)
void | XMC_CCU8_SLICE_SetInput (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_INPUT_t input)
void | XMC_CCU8_SLICE_SetInterruptNode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event, const XMC_CCU8_SLICE_SR_ID_t sr)
void | XMC_CCU8_SLICE_SetOutPath (XMC_CCU8_SLICE_t *const slice, const uint32_t out_path_msk)
void | XMC_CCU8_SLICE_SetPassiveLevel (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_OUTPUT_t out, const XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t level)
void | XMC_CCU8_SLICE_SetPrescaler (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_PRESCALER_t div_val)
void | XMC_CCU8_SLICE_SetShadowTransferMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t shadow_transfer_mode)
void | XMC_CCU8_SLICE_SetTimerCompareMatch (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel, const uint16_t compare_val)
void | XMC_CCU8_SLICE_SetTimerCompareMatchChannel1 (XMC_CCU8_SLICE_t *const slice, const uint16_t compare_val)
void | XMC_CCU8_SLICE_SetTimerCompareMatchChannel2 (XMC_CCU8_SLICE_t *const slice, const uint16_t compare_val)
void | XMC_CCU8_SLICE_SetTimerCountingMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TIMER_COUNT_MODE_t mode)
void | XMC_CCU8_SLICE_SetTimerPeriodMatch (XMC_CCU8_SLICE_t *const slice, const uint16_t period_val)
void | XMC_CCU8_SLICE_SetTimerRepeatMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t mode)
void | XMC_CCU8_SLICE_SetTimerValue (XMC_CCU8_SLICE_t *const slice, const uint16_t timer_val)
void | XMC_CCU8_SLICE_StartConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_START_MODE_t start_mode)
void | XMC_CCU8_SLICE_StartTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_StatusBitOverrideConfig (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_StopClearTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_StopConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_END_MODE_t end_mode)
void | XMC_CCU8_SLICE_StopTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_TrapConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TRAP_EXIT_MODE_t exit_mode, bool synch_with_pwm)
void | XMC_CCU8_SLICE_WriteCoherentlyWithPWMCycle (XMC_CCU8_SLICE_t *const slice, const uint32_t coherent_write)
void | XMC_CCU8_SLICE_WriteImmediateAfterShadowTransfer (XMC_CCU8_SLICE_t *const slice, const uint32_t immediate_write)
void | XMC_CCU8_StartPrescaler (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_StopPrescaler (XMC_CCU8_MODULE_t *const module)

Detailed Description

The CCU8 peripheral functions play a major role in applications that need complex Pulse Width Modulation (PWM) signal generation, with complementary high side and low side switches, multi phase control. These functions in conjunction with a very flexible and programmable signal conditioning scheme, make the CCU8 the must have peripheral for state of the art motor control, multi phase and multi level power electronics systems.
Each CCU8 module is comprised of four identical 16 bit Capture/Compare Timer slices, CC8y (where y = [0..4]). Each timer slice can work in compare mode or in capture mode.

APIs provided in this file cover the following functional blocks of CCU8: – Timer configuration, Capture configuration, Function/Event configuration, Interrupt configuration

Note:
  1. SLICE (APIs prefixed with e.g. XMC_CCU8_SLICE_)
  2. Module (APIs are not having any prefix e.g. XMC_CCU8_)
Timer(Compare mode) configuration:
This section of the LLD provides the configuration structure XMC_CCU8_SLICE_COMPARE_CONFIG_t, XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t and the initialization functions XMC_CCU8_SLICE_CompareInit(), XMC_CCU8_SLICE_DeadTimeInit().

It can be used to:

  1. Start and Stop the timer. (XMC_CCU8_SLICE_StartTimer(), XMC_CCU8_SLICE_StopTimer())
  2. Update the period, compare, Dither, Prescaler and Passive values. (XMC_CCU8_SLICE_SetTimerPeriodMatch(), XMC_CCU8_SLICE_SetTimerCompareMatch(), XMC_CCU8_SLICE_SetPrescaler(), XMC_CCU8_SLICE_SetDitherCompareValue(), XMC_CCU8_SLICE_SetPassiveLevel())
  3. Configure the dead time.(XMC_CCU8_SLICE_SetDeadTimeValue(), XMC_CCU8_SLICE_SetDeadTimePrescaler())
  4. Enable the slices to support multichannel mode. (XMC_CCU8_SLICE_EnableMultiChannelMode())
Capture configuration:
This section of the LLD provides the configuration structure XMC_CCU8_SLICE_CAPTURE_CONFIG_t and the initialization function XMC_CCU8_SLICE_CaptureInit().

It can be used to:

  1. Configure the capture functionality. (XMC_CCU8_SLICE_Capture0Config(), XMC_CCU8_SLICE_Capture1Config())
  2. Read the captured values along with the status, which indicate the value is latest or not. (XMC_CCU8_SLICE_GetCaptureRegisterValue())
Function/Event configuration:
This section of the LLD provides the configuration structure XMC_CCU8_SLICE_EVENT_CONFIG_t.

It can be used to:

  1. Enable and Disable the events. (XMC_CCU8_SLICE_EnableEvent(), XMC_CCU8_SLICE_DisableEvent())
  2. Configure to start and stop the timer on external events.(XMC_CCU8_SLICE_StartConfig(), XMC_CCU8_SLICE_StopConfig())
  3. Modulation, external load and Gating of the timer output.(XMC_CCU8_SLICE_ModulationConfig(), XMC_CCU8_SLICE_LoadConfig(), XMC_CCU8_SLICE_GateConfig())
  4. Control the count direction of the timer based on the external event. (XMC_CCU8_SLICE_DirectionConfig())
  5. Count the external events.(XMC_CCU8_SLICE_CountConfig())
  6. External Trap. Which can be used as protective feature.(XMC_CCU8_SLICE_EnableTrap(), XMC_CCU8_SLICE_DisableTrap(), XMC_CCU8_SLICE_TrapConfig())
Interrupt configuration:
This section of the LLD provides the function to configure the interrupt node to each event (XMC_CCU8_SLICE_SetInterruptNode())

Typedef Documentation

typedef CCU8_GLOBAL_TypeDef XMC_CCU8_MODULE_t

Typedef for CCU8 Global data structure

typedef uint8_t XMC_CCU8_SLICE_INPUT_t

External Event Input list. This list depicts the possible input connections to the CCU8 slice. Interconnects are specific to each device.

typedef CCU8_CC8_TypeDef XMC_CCU8_SLICE_t

Typedef for CCU8 Slice data structure

Enumeration Type Documentation

enum XMC_CCU8_CLOCK_t

CCU8 module clock

Enumerator
XMC_CCU8_CLOCK_SCU | Select the fCCU as the clock
XMC_CCU8_CLOCK_EXTERNAL_A | External clock-A
XMC_CCU8_CLOCK_EXTERNAL_B | External clock-B
XMC_CCU8_CLOCK_EXTERNAL_C | External clock-C
enum XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_t

CCU8 set the shadow transfer type for multichannel mode

Enumerator
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE0 | Shadow transfer through software only for slice 0
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE0 | Shadow transfer through software and hardware for slice 0
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE1 | Shadow transfer through software only for slice 1
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE1 | Shadow transfer through software and hardware for slice 1
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE2 | Shadow transfer through software only for slice 2
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE2 | Shadow transfer through software and hardware for slice 2
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE3 | Shadow transfer through software only for slice 3
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE3 | Shadow transfer through software and hardware for slice 3
enum XMC_CCU8_OUT_PATH_t

Output selector for CCU8x.OUT0-3

Enumerator
XMC_CCU8_OUT_PATH_OUT0_ST1 | CCU8yST1 signal path is connected the CCU8x.OUT0
XMC_CCU8_OUT_PATH_OUT0_INV_ST1 | Inverted CCU8yST1 signal path is connected the CCU8x.OUT0
XMC_CCU8_OUT_PATH_OUT1_ST1 | CCU8yST1 signal path is connected the CCU8x.OUT1
XMC_CCU8_OUT_PATH_OUT1_INV_ST1 | Inverted CCU8yST1 signal path is connected the CCU8x.OUT1
XMC_CCU8_OUT_PATH_OUT2_ST2 | CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_OUT_PATH_OUT2_INV_ST2 | Inverted CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_OUT_PATH_OUT3_ST2 | CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_OUT_PATH_OUT3_INV_ST1 | Inverted CCU8yST2 signal path is connected the CCU8x.OUT3
enum XMC_CCU8_SHADOW_TRANSFER_t

Slice shadow transfer options.

Enumerator
XMC_CCU8_SHADOW_TRANSFER_SLICE_0 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-0
XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_0 | Transfer Dither compare shadow register value to actual register for SLICE-0
XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_0 | Transfer Prescaler shadow register value to actual register for SLICE-0
XMC_CCU8_SHADOW_TRANSFER_SLICE_1 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-1
XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_1 | Transfer Dither compare shadow register value to actual registers for SLICE-1
XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_1 | Transfer Prescaler shadow register value to actual register for SLICE-1
XMC_CCU8_SHADOW_TRANSFER_SLICE_2 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-2
XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_2 | Transfer Dither compare shadow register value to actual register for SLICE-2
XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_2 | Transfer Prescaler shadow register value to actual register for SLICE-2
XMC_CCU8_SHADOW_TRANSFER_SLICE_3 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-3
XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_3 | Transfer Dither compare shadow register value to actual register for SLICE-3
XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_3 | Transfer Prescaler shadow register value to actual register for SLICE-3
enum XMC_CCU8_SLICE_CAP_REG_SET_t

Capture mode register sets

Enumerator
XMC_CCU8_SLICE_CAP_REG_SET_LOW | Capture register-0, Capture register-1 used
XMC_CCU8_SLICE_CAP_REG_SET_HIGH | Capture register-0, Capture register-1 used
enum XMC_CCU8_SLICE_COMPARE_CHANNEL_t

Compare Channel selection

Enumerator
XMC_CCU8_SLICE_COMPARE_CHANNEL_1 | Compare Channel-1
XMC_CCU8_SLICE_COMPARE_CHANNEL_2 | Compare Channel-2
enum XMC_CCU8_SLICE_DTC_DIV_t

Dead Time Generator Clock Divider

Enumerator
XMC_CCU8_SLICE_DTC_DIV_1 | DTC clock = Slice Clock
XMC_CCU8_SLICE_DTC_DIV_2 | DTC clock = Slice Clock/2
XMC_CCU8_SLICE_DTC_DIV_4 | DTC clock = Slice Clock/4
XMC_CCU8_SLICE_DTC_DIV_8 | DTC clock = Slice Clock/8
enum XMC_CCU8_SLICE_END_MODE_t

Actions that can be performed upon detection of an external Timer STOP event

Enumerator
XMC_CCU8_SLICE_END_MODE_TIMER_STOP | Stops the timer, without clearing TIMER register
XMC_CCU8_SLICE_END_MODE_TIMER_CLEAR | Without stopping timer, clears the TIMER register
XMC_CCU8_SLICE_END_MODE_TIMER_STOP_CLEAR | Stops the timer and clears the TIMER register
enum XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_t

External Event trigger criteria - Edge sensitivity

Enumerator
XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_NONE | None
XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE | Rising Edge of the input signal generates event trigger
XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE | Falling Edge of the input signal generates event trigger
XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE | Both Rising and Falling edges cause an event trigger
enum XMC_CCU8_SLICE_EVENT_FILTER_t

Low pass filter Configuration. The External Event input should be stable for a selected number of clock cycles.

Enumerator
XMC_CCU8_SLICE_EVENT_FILTER_DISABLED | No Low Pass Filtering is applied
XMC_CCU8_SLICE_EVENT_FILTER_3_CYCLES | Input should be stable for 3 clock cycles
XMC_CCU8_SLICE_EVENT_FILTER_5_CYCLES | Input should be stable for 5 clock cycles
XMC_CCU8_SLICE_EVENT_FILTER_7_CYCLES | Input should be stable for 7 clock cycles
enum XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t

External Event trigger criteria - Level sensitivity

Enumerator
XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH | Level sensitive functions react to a high signal level
XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW | Level sensitive functions react to a low signal level
XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_LOW | Timer counts up, during Low state of the control signal
XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_HIGH | Timer counts up, during High state of the control signal
enum XMC_CCU8_SLICE_EVENT_t

External Event list

Enumerator
XMC_CCU8_SLICE_EVENT_NONE | None
XMC_CCU8_SLICE_EVENT_0 | Event-0
XMC_CCU8_SLICE_EVENT_1 | Event-1
XMC_CCU8_SLICE_EVENT_2 | Event-2
enum XMC_CCU8_SLICE_FUNCTION_t

External Function list

Enumerator
XMC_CCU8_SLICE_FUNCTION_START | Start function
XMC_CCU8_SLICE_FUNCTION_STOP | Stop function
XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT0 | Capture Event-0 function, CCycapt0 signal is used for event generation
XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT1 | Capture Event-1 function, CCycapt1 signal is used for event generation
XMC_CCU8_SLICE_FUNCTION_GATING | Gating function
XMC_CCU8_SLICE_FUNCTION_DIRECTION | Direction function
XMC_CCU8_SLICE_FUNCTION_LOAD | Load function
XMC_CCU8_SLICE_FUNCTION_COUNT | Counting function
XMC_CCU8_SLICE_FUNCTION_OVERRIDE | Override function
XMC_CCU8_SLICE_FUNCTION_MODULATION | Modulation function
XMC_CCU8_SLICE_FUNCTION_TRAP | Trap function
enum XMC_CCU8_SLICE_IRQ_ID_t

Available Interrupt Event Ids

Enumerator
XMC_CCU8_SLICE_IRQ_ID_PERIOD_MATCH | Period match counting up
XMC_CCU8_SLICE_IRQ_ID_ONE_MATCH | One match counting down
XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_1 | Compare match counting up for channel 1
XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 | Compare match counting down for channel 1
XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_2 | Compare match counting up for channel 2
XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 | Compare match counting down for channel 2
XMC_CCU8_SLICE_IRQ_ID_EVENT0 | Event-0 occurrence
XMC_CCU8_SLICE_IRQ_ID_EVENT1 | Event-1 occurrence
XMC_CCU8_SLICE_IRQ_ID_EVENT2 | Event-2 occurrence
XMC_CCU8_SLICE_IRQ_ID_TRAP | Trap occurrence
enum XMC_CCU8_SLICE_MASK_t

CCU8 slice mask which can be used for the APIs as input where multi slice support is available

Enumerator
XMC_CCU8_SLICE_MASK_SLICE_0 | SLICE-0
XMC_CCU8_SLICE_MASK_SLICE_1 | SLICE-1
XMC_CCU8_SLICE_MASK_SLICE_2 | SLICE-2
XMC_CCU8_SLICE_MASK_SLICE_3 | SLICE-3
enum XMC_CCU8_SLICE_MCMS_ACTION_t

Multi Channel Shadow transfer request configuration options

Enumerator
XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR | Transfer Compare and Period Shadow register values to the actual registers upon MCS xfer request
XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP | Transfer Compare, Period and Prescaler Compare Shadow register values to the actual registers upon MCS xfer request
XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT | Transfer Compare, Period ,Prescaler Compare and Dither Compare register values to the actual registers upon MCS xfer request
enum XMC_CCU8_SLICE_MODE_t

Operational modes of CCU8 slice

Enumerator
XMC_CCU8_SLICE_MODE_COMPARE | slice(CC8y) operates in Compare Mode
XMC_CCU8_SLICE_MODE_CAPTURE | slice(CC8y) operates in Capture Mode
enum XMC_CCU8_SLICE_MODULATION_CHANNEL_t

Compare channel for which modulation has to be applied

Enumerator
XMC_CCU8_SLICE_MODULATION_CHANNEL_NONE | No modulation
XMC_CCU8_SLICE_MODULATION_CHANNEL_1 | Modulation for Compare Channel-1
XMC_CCU8_SLICE_MODULATION_CHANNEL_2 | Modulation for Compare Channel-2
XMC_CCU8_SLICE_MODULATION_CHANNEL_1_AND_2 | Modulation for Compare Channel-1 and Compare Channel-2
enum XMC_CCU8_SLICE_MODULATION_MODE_t

Modulation of timer output signals

Enumerator
XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_ST_OUT | Clear ST and OUT signals
XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_OUT | Clear only the OUT signal
enum XMC_CCU8_SLICE_MULTI_IRQ_ID_t

Available Interrupt Event Ids, which is added to support multi event APIs

Enumerator
XMC_CCU8_SLICE_MULTI_IRQ_ID_PERIOD_MATCH | Period match counting up
XMC_CCU8_SLICE_MULTI_IRQ_ID_ONE_MATCH | One match counting down
XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_1 | Compare match counting up for channel 1
XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 | Compare match counting down for channel 1
XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_2 | Compare match counting up for channel 2
XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 | Compare match counting down for channel 2
XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT0 | Event-0 occurrence
XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT1 | Event-1 occurrence
XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT2 | Event-2 occurrence
enum XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t

Timer output passive level

Enumerator
XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_LOW | Passive level = Low
XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH | Passive level = High
enum XMC_CCU8_SLICE_OUTPUT_t

Slice Output selection

Enumerator
XMC_CCU8_SLICE_OUTPUT_0 | Slice Output-0
XMC_CCU8_SLICE_OUTPUT_1 | Slice Output-1
XMC_CCU8_SLICE_OUTPUT_2 | Slice Output-2
XMC_CCU8_SLICE_OUTPUT_3 | Slice Output-3
enum XMC_CCU8_SLICE_PRESCALER_MODE_t

Prescaler mode

Enumerator
XMC_CCU8_SLICE_PRESCALER_MODE_NORMAL | Fixed division of module clock
XMC_CCU8_SLICE_PRESCALER_MODE_FLOAT | Floating divider
enum XMC_CCU8_SLICE_PRESCALER_t

Timer clock Divider

Enumerator
XMC_CCU8_SLICE_PRESCALER_1 | Slice Clock = fccu8
XMC_CCU8_SLICE_PRESCALER_2 | Slice Clock = fccu8/2
XMC_CCU8_SLICE_PRESCALER_4 | Slice Clock = fccu8/4
XMC_CCU8_SLICE_PRESCALER_8 | Slice Clock = fccu8/8
XMC_CCU8_SLICE_PRESCALER_16 | Slice Clock = fccu8/16
XMC_CCU8_SLICE_PRESCALER_32 | Slice Clock = fccu8/32
XMC_CCU8_SLICE_PRESCALER_64 | Slice Clock = fccu8/64
XMC_CCU8_SLICE_PRESCALER_128 | Slice Clock = fccu8/128
XMC_CCU8_SLICE_PRESCALER_256 | Slice Clock = fccu8/256
XMC_CCU8_SLICE_PRESCALER_512 | Slice Clock = fccu8/512
XMC_CCU8_SLICE_PRESCALER_1024 | Slice Clock = fccu8/1024
XMC_CCU8_SLICE_PRESCALER_2048 | Slice Clock = fccu8/2048
XMC_CCU8_SLICE_PRESCALER_4096 | Slice Clock = fccu8/4096
XMC_CCU8_SLICE_PRESCALER_8192 | Slice Clock = fccu8/8192
XMC_CCU8_SLICE_PRESCALER_16384 | Slice Clock = fccu8/16384
XMC_CCU8_SLICE_PRESCALER_32768 | Slice Clock = fccu8/32768
enum XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t

Slice shadow transfer mode options.

Note
Not available for XMC4500 series
Enumerator
XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_IN_PERIOD_MATCH_AND_ONE_MATCH | Shadow transfer is done in Period Match and One match.
XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_PERIOD_MATCH | Shadow transfer is done only in Period Match.
XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_ONE_MATCH | Shadow transfer is done only in One Match.
enum XMC_CCU8_SLICE_SR_ID_t

Service Request Lines for CCU8. Event are mapped to these SR lines and these are used to generate the interrupt.

Enumerator
XMC_CCU8_SLICE_SR_ID_0 | Service Request Line-0 selected
XMC_CCU8_SLICE_SR_ID_1 | Service Request Line-1 selected
XMC_CCU8_SLICE_SR_ID_2 | Service Request Line-2 selected
XMC_CCU8_SLICE_SR_ID_3 | Service Request Line-3 selected
enum XMC_CCU8_SLICE_START_MODE_t

Actions that can be performed upon detection of an external Timer START event

Enumerator
XMC_CCU8_SLICE_START_MODE_TIMER_START | Start the timer from the current count of TIMER register
XMC_CCU8_SLICE_START_MODE_TIMER_START_CLEAR | Clears the TIMER register and start the timer
enum XMC_CCU8_SLICE_STATUS_t

The compare channel output which is routed to the slice output signal(STy).

Enumerator
XMC_CCU8_SLICE_STATUS_CHANNEL_1

Channel-1 status connected to Slice Status

XMC_CCU8_SLICE_STATUS_CHANNEL_2

Channel-2 status connected to Slice Status

XMC_CCU8_SLICE_STATUS_CHANNEL_1_AND_2

Wired AND of Channel-1 and Channel-2 status connected to Slice status

XMC_CCU8_SLICE_STATUS_CHANNEL_1_OR_2

Wired OR of Channel-1 and Channel-2 status connected to Slice status.

Note
Only available for XMC1300 and XMC1400 series
enum XMC_CCU8_SLICE_TIMER_CLEAR_MODE_t

Timer clear on capture

Enumerator
XMC_CCU8_SLICE_TIMER_CLEAR_MODE_NEVER | Never clear the timer on any capture event
XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_HIGH | Clear only when timer value has been captured in C3V and C2V
XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_LOW | Clear only when timer value has been captured in C1V and C0V
XMC_CCU8_SLICE_TIMER_CLEAR_MODE_ALWAYS | Always clear the timer upon detection of any capture event
enum XMC_CCU8_SLICE_TIMER_COUNT_DIR_t

Timer counting direction for the CCU8 slice

Enumerator
XMC_CCU8_SLICE_TIMER_COUNT_DIR_UP | Counting up
XMC_CCU8_SLICE_TIMER_COUNT_DIR_DOWN | Counting down
enum XMC_CCU8_SLICE_TIMER_COUNT_MODE_t

Timer counting modes for the slice

Enumerator
XMC_CCU8_SLICE_TIMER_COUNT_MODE_EA | Edge Aligned Mode
XMC_CCU8_SLICE_TIMER_COUNT_MODE_CA | Centre Aligned Mode
enum XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t

Timer repetition mode for the slice

Enumerator
XMC_CCU8_SLICE_TIMER_REPEAT_MODE_REPEAT | Repetitive mode: continuous mode of operation
XMC_CCU8_SLICE_TIMER_REPEAT_MODE_SINGLE | Single shot mode: Once a Period match/One match occurs timer goes to idle state
enum XMC_CCU8_SLICE_TRAP_EXIT_MODE_t

Trap exit mode

Enumerator
XMC_CCU8_SLICE_TRAP_EXIT_MODE_AUTOMATIC | Clear trap state as soon as the trap signal is de-asserted
XMC_CCU8_SLICE_TRAP_EXIT_MODE_SW | Clear only when acknowledged by software
enum XMC_CCU8_SOURCE_OUT0_t

Output sources for OUTy0 signal

Note
Only available for XMC1400 series
Enumerator
XMC_CCU8_SOURCE_OUT0_ST1 | CCU8yST1 signal path is connected the CCU8x.OUT0
XMC_CCU8_SOURCE_OUT0_INV_ST1 | Inverted CCU8yST1 signal path is connected the CCU8x.OUT0
XMC_CCU8_SOURCE_OUT0_ST2 | CCU8yST2 signal path is connected the CCU8x.OUT0
XMC_CCU8_SOURCE_OUT0_INV_ST2 | Inverted CCU8yST2 signal path is connected the CCU8x.OUT0
enum XMC_CCU8_SOURCE_OUT1_t

Output sources for OUTy1 signal

Note
Only available for XMC1400 series
Enumerator
XMC_CCU8_SOURCE_OUT1_ST1 | CCU8yST1 signal path is connected the CCU8x.OUT1
XMC_CCU8_SOURCE_OUT1_INV_ST1 | Inverted CCU8yST1 signal path is connected the CCU8x.OUT1
XMC_CCU8_SOURCE_OUT1_ST2 | CCU8yST2 signal path is connected the CCU8x.OUT1
XMC_CCU8_SOURCE_OUT1_INV_ST2 | Inverted CCU8yST2 signal path is connected the CCU8x.OUT1
enum XMC_CCU8_SOURCE_OUT2_t

Output sources for OUTy2 signal

Note
Only available for XMC1400 series
Enumerator
XMC_CCU8_SOURCE_OUT2_ST2 | CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_SOURCE_OUT2_INV_ST2 | Inverted CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_SOURCE_OUT2_ST1 | CCU8yST1 signal path is connected the CCU8x.OUT2
XMC_CCU8_SOURCE_OUT2_INV_ST1 | Inverted CCU8yST1 signal path is connected the CCU8x.OUT2
enum XMC_CCU8_SOURCE_OUT3_t

Output sources for OUTy3 signal

Note
Only available for XMC1400 series
Enumerator
XMC_CCU8_SOURCE_OUT3_ST2 | CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_SOURCE_OUT3_INV_ST2 | Inverted CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_SOURCE_OUT3_ST1 | CCU8yST1 signal path is connected the CCU8x.OUT2
XMC_CCU8_SOURCE_OUT3_INV_ST1 | Inverted CCU8yST1 signal path is connected the CCU8x.OUT2
enum XMC_CCU8_STATUS_t

Return Value of an API

Enumerator
XMC_CCU8_STATUS_OK | API fulfils request
XMC_CCU8_STATUS_ERROR | API cannot fulfil request
XMC_CCU8_STATUS_RUNNING | The timer slice is currently running
XMC_CCU8_STATUS_IDLE | The timer slice is currently idle

Function Documentation

void XMC_CCU8_DisableClock | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const uint8_t | slice_number
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
slice_number | Slice for which the clock should be disabled. Range: [0x0 to 0x3]
Returns

None
Description:
Disables the slice timer clock, by configuring GIDLS.SS0I, GIDLS.SSS1I, GIDLS.SSS2I, GIDLS.SSS3I bits according to the selected slice_number .

It is possible to disable clock at slice level using the module pointer. slice_number is used to disable the clock to a given slice of the module.
Related APIs:
XMC_CCU8_EnableClock()
XMC_CCU8_EnableMultipleClocks()
XMC_CCU8_StartPrescaler()
XMC_CCU8_StopPrescaler().
void XMC_CCU8_DisableModule ( XMC_CCU8_MODULE_t *const module )
Parameters
module Constant pointer to CCU8 module
Returns

None
Description:
Brings the CCU8 module to reset state and enables gating of the clock signal(if applicable depending on the device being selected).

Invoke this API when a CCU8 module needs to be disabled completely. Any operation on the CCU8 module will have no effect after this API is called.
Related APIs:
XMC_CCU8_EnableModule()
XMC_CCU8_DisableModule().
void XMC_CCU8_EnableClock | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const uint8_t | slice_number
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
slice_number | Slice for which the clock should be Enabled. Range: [0x0 to 0x3]
Returns

None
Description:
Enables the slice timer clock, by configuring GIDLC.CS0I, GIDLC.CS1I, GIDLC.CS2I, GIDLC.CS3I bits according to the selected slice_number.

It is possible to enable/disable clock at slice level. This uses the slice_number to indicate the slice whose clock needs to be enabled. Directly accessed register is GIDLC.
Related APIs:
XMC_CCU8_DisableClock()
XMC_CCU8_EnableMultipleClocks()
XMC_CCU8_StartPrescaler()
XMC_CCU8_StopPrescaler().
void XMC_CCU8_EnableModule ( XMC_CCU8_MODULE_t *const module )
Parameters
module Constant pointer to CCU8 module
Returns

None
Description:
Enables the CCU8 module and brings it to active state.

Also disables the gating of the clock signal (if applicable depending on the device being selected). Invoke this API before any operations are done on the CCU8 module. Invoked from XMC_CCU8_Init().
Related APIs:
XMC_CCU8_SetModuleClock()
XMC_CCU8_DisableModule()
XMC_CCU8_StartPrescaler().
void XMC_CCU8_EnableMultipleClocks | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const uint8_t | clock_mask
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
clock_mask | Slices whose clocks are to be enabled simultaneously. Bit location 0/1/2/3 represents slice-0/1/2/3 respectively. Range: [0x1 to 0xF]
Returns

None
Description:
Enables clocks of multiple slices at a time, by configuring GIDLC.CS0I, GIDLC.CS1I, GIDLC.CS2I, GIDLC.CS3I bits.

Takes an input clock_mask, which determines the slices that would receive the clock. Bring them out of the idle state simultaneously.
Related APIs:
XMC_CCU8_EnableClock()
XMC_CCU8_DisableClock().
void XMC_CCU8_EnableShadowTransfer | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const uint32_t | shadow_transfer_msk
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
shadow_transfer_msk | Shadow transfer request mask for various transfers. Use XMC_CCU8_SHADOW_TRANSFER_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Requests of shadow transfer for Period, Compare, Passive level, dither and prescaler, by configuring the GCSS register.

The transfer from the shadow registers to the actual registers is done in the immediate next occurrence of the shadow transfer trigger after the API is called.

Any call to XMC_CCU8_SLICE_SetTimerPeriodMatch()
XMC_CCU8_SLICE_SetTimerCompareMatch()
XMC_XMC_CCU8_SLICE_SetPrescaler()
XMC_CCU8_SLICE_CompareInit()
XMC_CCU8_SLICE_CaptureInit(). must be succeeded by this API.

Related APIs:
None.
void XMC_CCU8_Init | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const XMC_CCU8_SLICE_MCMS_ACTION_t | mcs_action
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
mcs_action | multi-channel shadow transfer request configuration
Returns

None
Description:
Initialization of global register GCTRL.

As part of module initialization, behaviour of the module upon detection Multi-Channel Mode trigger is configured. Will also invoke the XMC_CCU8_EnableModule(). The API call would bring up the required CCU8 module and also initialize the module for the required multi-channel shadow transfer.
Related APIs:
XMC_CCU8_SLICE_CompareInit()
XMC_CCU8_SLICE_CaptureInit().
bool XMC_CCU8_IsPrescalerRunning ( XMC_CCU8_MODULE_t *const module )
Parameters
module Constant pointer to CCU8 module
Returns

None
Description:
Returns the state of the prescaler, by reading GSTAT.PRB bit.

If clock is being supplied to the slices of the module then returns as true.
Related APIs:
XMC_CCU8_StartPrescaler()
XMC_CCU8_StopPrescaler()
XMC_CCU8_EnableClock()
XMC_CCU8_DisableClock().
void XMC_CCU8_SetModuleClock | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const XMC_CCU8_CLOCK_t | clock
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
clock | Choice of input clock to the module
Returns

None
Description:
Selects the Module Clock by configuring GCTRL.PCIS bits.

There are 3 potential clock sources. This API helps to select the required clock source. Call to this API is valid after the XMC_CCU8_Init().
Related APIs:
None.
void XMC_CCU8_SetMultiChannelShadowTransferMode | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const uint32_t | slice_mode_msk
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
slice_mode_msk | Slices for which the configuration has to be applied. Use XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Enables the Multi-channel shadow transfer request trigger signal either by software or hardware by configuring GCTRL.MSE0, GCTRL.MSE1, GCTRL.MSE2, and GCTRL.MSE3 based on the mask.

The shadow transfer would take place either if it was requested by software or by the CCU8x.MCSS input.
Related APIs:
None.
void XMC_CCU8_SLICE_Capture0Config | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the Capture-0 Function
Returns

None
Description:
Configures the Capture-0 Function of the slice, by configuring CC8yCMC.CAP0S bit.

Capture function is mapped with one of the 3 events. A CCU8 slice can be configured into capture-0 mode with the selected event. In this mode the CCU8 will capture the timer value into CC8yC0V and CC8yC1V.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_Capture1Config | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the Capture-1 Function
Returns

None
Description:
Configures the Capture-1 Function of the slice, by configuring CC8yCMC.CAP1S bit.

Capture function is mapped with one of the 3 events. A CCU8 slice can be configured into capture-1 mode with the selected event. In this mode the CCU8 will capture the timer value into CC8yC2V and CC8yC3V.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_CaptureInit | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_CAPTURE_CONFIG_t *const | capture_init
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
capture_init | Pointer to slice configuration structure
Returns

None
Description:
Initialization of a CC8 slice to capture mode, by configuring CC8yTC, CC8yCMC, CC8yPSC,CC8yFPCS registers.

CC8 slice is configured with Capture configurations in this routine. Timer is stopped before initialization by calling XMC_CCU8_SLICE_StopTimer(). After initialization user has to explicitly enable the shadow transfer for the required values by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask.
Related APIs:
XMC_CCU8_SLICE_Capture0Config()
XMC_CCU8_SLICE_Capture1Config().
void XMC_CCU8_SLICE_ClearEvent | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Asserted event which must be acknowledged.
Returns

None
Description:
Acknowledges an asserted event, by setting CC8ySWR with respective event flag.

Related APIs:
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_SetEvent()
XMC_CCU8_SLICE_GetEvent().
void XMC_CCU8_SLICE_ClearTimer ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Resets the timer count to zero, by setting CC8yTCCLR.TCC bit.

A timer which has been stopped can still retain the last counted value. After invoking this API the timer value will be cleared.
Related APIs:
XMC_CCU8_SLICE_StartTimer().
void XMC_CCU8_SLICE_CompareInit | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CONFIG_t *const | compare_init
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
compare_init | Pointer to slice configuration structure
Returns

None
Description:
Initialization of a CC8 slice to compare mode, by configuring CC8yTC, CC8yCMC, CC8yPSC, CC8yDITH, CC8yPSL, CC8yFPCS, CC8yCHC registers.

CC8 slice is configured with Timer configurations in this routine. Timer is stopped before initialization by calling XMC_CCU8_SLICE_StopTimer(). After initialization user has to explicitly enable the shadow transfer for the required values by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask.
Related APIs:
None.
void XMC_CCU8_SLICE_ConfigureDeadTime | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint8_t | mask
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
mask | The Dead Time configuration mask. Do a bitwise OR operation on the following values depending on the need. Value 0x1: Dead Time Enable for Compare Channel 1 Value 0x2: Dead Time Enable for Compare Channel 2 Value 0x4: Dead Time Enable for CC8yST1 path is enabled. Value 0x8: Dead Time Enable for Inverted CC8yST1 path is enabled. Value 0x10: Dead Time Enable for CC8yST2 path is enabled. Value 0x20: Dead Time Enable for Inverted CC8yST2 path is enabled. Range: [0x0 to 0x3F]
Description:
Activates or deactivates dead time for compare channel and ST path, by configuring CC8y.DC1R, CC8y.DC1R and CC8y.DTC registers.

Use the provided masks to enable/disable the dead time for the compare channels and the ST signals. It is possible to deactivate the dead time for all the options by passing a 0x0 as the mask. Details such as the choice of dead time for channel1, channel2, ST1, Inverted ST1, ST2, Inverted ST2, are programmed by this routine.
Related APIs:
XMC_CCU8_SLICE_DeadTimeInit()
XMC_CCU8_SLICE_SetDeadTimeValue()
XMC_CCU8_SLICE_SetDeadTimePrescaler()
XMC_CCU8_SLICE_IsDeadTimeCntr1Running()
XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
void XMC_CCU8_SLICE_ConfigureEvent | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event,
 |  | const XMC_CCU8_SLICE_EVENT_CONFIG_t * | config
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | The External Event which needs to be configured.
config | Pointer to event configuration data.
Returns

None
Description:
Configures an External Event of the slice, by updating CC8yINS register .

Details such as the input mapped to the event, event detection criteria and low pass filter options are programmed by this routine. The Event config will configure the input selection, the edge selection, the level selection and the Low pass filter for the event.
Related APIs:
XMC_CCU8_SLICE_StartConfig()
XMC_CCU8_SLICE_StopConfig()
XMC_CCU8_SLICE_LoadConfig()
XMC_CCU8_SLICE_ModulationConfig()
XMC_CCU8_SLICE_CountConfig()
XMC_CCU8_SLICE_GateConfig()
XMC_CCU8_SLICE_Capture0Config()
XMC_CCU8_SLICE_Capture1Config()
XMC_CCU8_SLICE_DirectionConfig()
XMC_CCU8_SLICE_StatusBitOverrideConfig()
XMC_CCU8_SLICE_TrapConfig().
void XMC_CCU8_SLICE_ConfigureStatusBitOutput | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_STATUS_t | channel
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
channel | which channel status has to be give as out
Returns

None
Description:
Configures status ST1, ST2 mapping to STy, by configuring CC8yTC.STOS bits.

This routine defines the output STy as a function of ST1 or ST2 or both ST1 & ST2. It is possible to make the CCU8x.STy signal to reflect the CC8y.ST1/CC8y.ST2 or a function of the 2 signals.
Related APIs:
None.
void XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_CONFIG_t *const | ev1_config,
 |  | const XMC_CCU8_SLICE_EVENT_CONFIG_t *const | ev2_config
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
ev1_config | Pointer to event 1 configuration data
ev2_config | Pointer to event 2 configuration data
Returns

None
Description:
Map Status bit override function with an Event1 & Event 2 of the slice and configure CC8yINS register.

Details such as the input mapped to the event, event detection criteria and Low Pass filter options are programmed by this routine for the events 1 & 2. Event-1 input would be the trigger to override the value. Event-2 input would be the override value.
Related APIs:
XMC_CCU8_SLICE_StatusBitOverrideConfig().
void XMC_CCU8_SLICE_CountConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External Count Function
Returns

None
Description:
Configures the Count Function of the slice, by configuring CC8yCMC.CNTS bit.

Count function is mapped with one of the 3 events. CCU8 slice can take an external signal to act as the counting event. The CCU8 slice would count the edges present on the event selected.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_DeadTimeInit | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t *const | config
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
config | Pointer to dead time configuration data
Returns

None
Description:
Initializes Dead time configuration for the slice outputs, by configuring CC8yDC1R, CC8yDC2R, CC8yDTC registers.

This routine programs dead time delays (rising & falling) and dead time clock prescaler. Details such as the choice of dead time for channel1, channel2, ST1, Inverted ST1, ST2, Inverted ST2, are also programmed by this routine.
Related APIs:
XMC_CCU8_SLICE_ConfigureDeadTime()
XMC_CCU8_SLICE_SetDeadTimeValue()
XMC_CCU8_SLICE_SetDeadTimePrescaler()
XMC_CCU8_SLICE_IsDeadTimeCntr1Running()
XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
void XMC_CCU8_SLICE_DirectionConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External Count Direction Function
Returns

None
Description:
Configures the Count Direction of the slice, by configuring CC8yCMC.UDS bit.

Count direction function is mapped with one of the 3 events. A slice can be configured to change the CC8yTIMER count direction depending on an external signal.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | automatic_shadow_transfer
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
automatic_shadow_transfer | specify upon which register update, automatic shadow transfer request should not be generated Use :: XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configure on which shadow register update, automatic shadow transfer request generation has to be disabled. By clearing ASPC, ASCC1, ASCC2, ASLC, ASDC, ASFC bits in STC register.

This disables the generation of automatic shadow transfer request for the specified register update.
Note:
Related APIs:
XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest().
Note
Only available for XMC1400 series
void XMC_CCU8_SLICE_DisableCascadedShadowTransfer ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Disables the cascaded the shadow transfer operation, by clearing CSE bit in STC register.

If in any slice the cascaded mode disabled, other slices from there onwards does not update the values in cascaded mode.
Related APIs:
XMC_CCU8_SLICE_EnableCascadedShadowTransfer()
.
Note
Not available for XMC4500 series
void XMC_CCU8_SLICE_DisableDithering ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Disables dithering of PWM frequency and duty cycle, by clearing CC8yTC.DITHE bits.

This disables the Dither mode that was set in XMC_CCU8_SLICE_EnableDithering(). This API will not clear the dither compare value.
Related APIs:
XMC_CCU8_SLICE_EnableDithering().
void XMC_CCU8_SLICE_DisableEvent | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Event whose assertion can potentially lead to an interrupt
Returns

None
Description:
Disables the generation of an interrupt pulse for the event, by clearing CC8yINTE register.

Prevents the event from being asserted.
Related APIs:
XMC_CCU8_SLICE_SetInterruptNode()
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_EnableMultipleEvents()
XMC_CCU8_SLICE_DisableMultipleEvents().
void XMC_CCU8_SLICE_DisableFloatingPrescaler ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Disables the floating prescaler, by clearing CC8yTC.FPE bit.

This would return the prescaler to the normal mode. The prescaler that would be applied is the value present in CC8yPSC.
Related APIs:
XMC_CCU8_SLICE_EnableFloatingPrescaler().
void XMC_CCU8_SLICE_DisableMultiChannelMode | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CHANNEL_t | ch_num
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
ch_num | Compare channel for which the multi-channel mode needs to be disabled.
Returns

None
Description:
Disables the multichannel mode, by clearing CC8yTC.MCME1 or CC8yTC.MCME1 bits based on the ch_num.

Returns the slices to the normal operation mode. This takes the slice number as input and configures the multi channel mode for it.
Related APIs:
XMC_CCU8_SLICE_EnableMultiChannelMode().
void XMC_CCU8_SLICE_DisableMultipleEvents | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint16_t | mask
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
mask | Event mask such that multiple events can be enabled. Use XMC_CCU8_SLICE_MULTI_IRQ_ID_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Disables the generation of an interrupt pulse for the required events, by clearing CC8yINTE register.

Prevents selected events of the slice from being asserted.
Related APIs:
XMC_CCU8_SLICE_SetInterruptNode()
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_EnableMultipleEvents()
XMC_CCU8_SLICE_DisableEvent().
void XMC_CCU8_SLICE_DisableTrap | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | out_mask
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
out_mask | Output signals for which the Trap function needs to be deactivated. Use XMC_CCU8_SLICE_OUTPUT_t enum items to create a mask of choice, using a bit wise OR operation. Range: [0x1 to 0xF]
Returns

None
Description:
Disables the trap feature, by clearing CC8yTC.TRAPE0, CC8yTC.TRAPE1, CC8yTC.TRAPE2 and CC8yTC.TRAPE3 bit based on the out_mask.

.

This API will revert the changes done by XMC_CCU8_SLICE_EnableTrap(). This Ensures that the TRAP function has no effect on the output of the CCU8 slice.
Related APIs:
XMC_CCU8_SLICE_EnableTrap().
void XMC_CCU8_SLICE_EnableAsymmetricCompareMode ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Configures the slice to generate PWM in asymmetric compare mode, by setting CC8yCHC.ASE bit.

In asymmetric compare mode, the compare channels 1 & 2 are grouped to generate the PWM.This would generate an inverted PWM at OUT0 & OUT1. In Edge Aligned mode (counting up), the Status bit is set when a compare match of Compare channel-1 occurs and cleared when a compare match event of Compare channel-2 occurs.
In Center Aligned mode, the status bit is set when a compare match event of Compare channel-1 occurs while counting up and cleared when a compare match event of Compare channel-2 occurs while counting down.
Note:
External count direction function is enabled then the asymmetric mode of operation is not possible.
Related APIs:
XMC_CCU8_SLICE_EnableSymmetricCompareMode()
void XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | automatic_shadow_transfer
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
automatic_shadow_transfer | specify upon which register update, automatic shadow transfer request is generated Use :: XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configure on which shadow register update, automatic shadow transfer request generation has to be enabled. By setting ASPC, ASCC1, ASCC2, ASLC, ASDC, ASFC bits in STC register.

By updating the configured shadow register, the shadow transfer request is generated to update all the shadow registers.
Note:
Related APIs:
XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest().
Note
Only available for XMC1400 series
void XMC_CCU8_SLICE_EnableCascadedShadowTransfer ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Cascades the shadow transfer operation throughout the CCU8 timer slices, by setting CSE bit in STC register.

The shadow transfer enable bits needs to be set in all timer slices, that are being used in the cascaded architecture, at the same time. The shadow transfer enable bits, also need to be set for all slices even if the shadow values of some slices were not updated. It is possible to to cascade with the adjacent slices only. CC80 slice is a master to start the operation.
Note:
XMC_CCU8_EnableShadowTransfer() must be called to enable the shadow transfer of the all the slices, which needs to be cascaded.
Related APIs:
XMC_CCU8_EnableShadowTransfer(), XMC_CCU8_SLICE_DisableCascadedShadowTransfer()
.
Note
Not available for XMC4500 series
void XMC_CCU8_SLICE_EnableDithering | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const bool | period_dither,
 |  | const bool | duty_dither,
 |  | const uint8_t | spread
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
period_dither | Boolean instruction on dithering of period match
duty_dither | Boolean instruction on dithering of compare match
spread | Dither compare value
Returns

None
Description:
Enables dithering of PWM frequency and duty cycle, by configuring CC8yTC.DITHE and CC8yDITS bits.

Some control loops are slow in updating PWM frequency and duty cycle. In such a case, a Bresenham style dithering can help reduce long term errors. Dithering can be applied to period and duty individually, this can be selected using the parameter period_dither and duty_dither. The spread would provide the dither compare value. If the dither counter value is less than this spread then the period/compare values would be dithered according to the dither mode selected. This API would invoke XMC_CCU8_SLICE_SetDitherCompareValue().
Note:
After this API call, XMC_CCU8_EnableShadowTransfer() has to be called with appropriate mask to transfer the dither value.
Related APIs:
XMC_CCU8_SLICE_DisableDithering().
void XMC_CCU8_SLICE_EnableEvent | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Event whose assertion can potentially lead to an interrupt
Returns

None
Description:
Enables the generation of an interrupt pulse for the event, by configuring CC8yINTE register.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API merely enables the event. Binding with SR is performed by another API.
Related APIs:
XMC_CCU8_SLICE_SetInterruptNode()
XMC_CCU8_SLICE_EnableMultipleEvents()
XMC_CCU8_SLICE_DisableEvent()
XMC_CCU8_SLICE_DisableMultipleEvents().
void XMC_CCU8_SLICE_EnableFloatingPrescaler ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Enables the floating prescaler, by setting CC8yTC.FPE bit.

The prescaler divider starts with an initial value and increments upon every period match. It keeps incrementing until a ceiling (prescaler compare value) is hit and thereafter rolls back to the original prescaler divider value.
It is necessary to have programmed an initial divider value and a compare value before the feature is enabled.
Related APIs:
XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue()
XMC_CCU8_SLICE_DisableFloatingPrescaler()
XMC_XMC_CCU8_SLICE_SetPrescaler().
void XMC_CCU8_SLICE_EnableMultiChannelMode | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CHANNEL_t | ch_num
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
ch_num | Compare channel for which the multi-channel mode is needed.
Returns

None
Description:
Enables the multichannel mode, by setting CC8yTC.MCME1 or CC8yTC.MCME1 bits based on the ch_num.

The output state of the Timer slices can be controlled in parallel by a single input signal. A particularly useful feature in motor control applications where the PWM output of multiple slices of a module can be gated and ungated by multi-channel gating inputs connected to the slices. A peripheral like POSIF connected to the motor knows exactly which of the power drive switches are to be turned on and off at any instant. It can thus through a gating bus (known as multi-channel inputs) control which of the slices output stays gated/ungated.
Related APIs:
XMC_CCU8_SLICE_DisableMultiChannelMode()
XMC_CCU8_SetMultiChannelShadowTransferMode().
void XMC_CCU8_SLICE_EnableMultipleEvents | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint16_t | mask
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
mask | Event mask such that multiple events can be enabled. Use XMC_CCU8_SLICE_MULTI_IRQ_ID_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Enables the generation of an interrupt pulse for the required events, by configuring CC8yINTE register.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API merely enables the events. Binding with SR is performed by another API.
Related APIs:
XMC_CCU8_SLICE_SetInterruptNode()
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_DisableEvent()
XMC_CCU8_SLICE_DisableMultipleEvents().
void XMC_CCU8_SLICE_EnableSymmetricCompareMode ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Configures the slice to generate PWM in symmetric(standard) compare mode, by clearing CC8yCHC.ASE bit.

In symmetric compare mode, the compare channels 1 & 2 are independent of each other & each channel generates the PWM & inverted PWM at OUT0, OUT1, OUT2 & OUT3.
Related APIs:
XMC_CCU8_SLICE_EnableAsymmetricCompareMode().
void XMC_CCU8_SLICE_EnableTrap | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | out_mask
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
out_mask | Output signals for which the Trap function needs to be activated. Use XMC_CCU8_SLICE_OUTPUT_t enum items to create a mask of choice, using a bit wise OR operation Range: [0x1 to 0xF]
Returns

None
Description:
Enables the trap feature, by setting CC8yTC.TRAPE0, CC8yTC.TRAPE1, CC8yTC.TRAPE2 and CC8yTC.TRAPE3 bit based on the out_mask.

A particularly useful feature where the PWM output can be forced inactive upon detection of a trap. The trap signal can be the output of a sensing element which has just detected an abnormal electrical condition.
Related APIs:
XMC_CCU8_SLICE_TrapConfig()
XMC_CCU8_SLICE_DisableTrap()
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_GateConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External Gating Function
Returns

None
Description:
Configures the Gating Function of the slice, by configuring CC8yCMC.GATES bit.

Gating function is mapped with one of the 3 events. A CCU8 slice can use an input signal that would operate as counter gating. If the configured Active level is detected the counter will gate all the pulses.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
uint32_t XMC_CCU8_SLICE_GetCapturedValueFromFifo | ( | const XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_CAP_REG_SET_t | set
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
set | The capture register set from which the captured value is to be retrieved
Returns

uint32_t Returns the value captured in the slice_number Range: [0x0 to 0xFFFF]
Description:
Read captured value from FIFO(CC8yECRD0 and CC8yECRD1).

This is applicable only in the Capture mode of operation. The signal whose timing characteristics are to be measured must be mapped to an event which in turn must be mapped to the capture function. Based on the capture criteria, the instant timer values are captured into capture registers. Timing characteristics of the input signal may then be derived/inferred from the captured values.
Related APIs:
XMC_CCU8_SLICE_IsExtendedCapReadEnabled().
Note
Defined for XMC4800, XMC4700, XMC4500, XMC4400, XMC4200, XMC4100 devices only. For other devices use XMC_CCU8_GetCapturedValueFromFifo() API
uint32_t XMC_CCU8_SLICE_GetCaptureRegisterValue | ( | const XMC_CCU8_SLICE_t *const | slice,
 |  | const uint8_t | reg_num
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
reg_num | The capture register from which the captured value is to be retrieved Range: [0,3]
Returns

uint32_t Returns the Capture register value. Range: [0 to 0x1FFFFF]
Description:
Retrieves timer value which has been captured in the Capture registers, by reading CC8yCV[reg_num] register.

The signal whose timing characteristics are to be measured must be mapped to an event which in turn must be mapped to the capture function. Based on the capture criteria, the timer values are captured into capture registers. Timing characteristics of the input signal may then be derived/inferred from the captured values. The full flag will help to find out if there is a new captured value present.
Related APIs:
XMC_CCU8_SLICE_GetLastCapturedTimerValue().
XMC_CCU8_SLICE_TIMER_COUNT_DIR_t XMC_CCU8_SLICE_GetCountingDir ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

XMC_CCU8_SLICE_TIMER_COUNT_DIR_t returns the direction in which the timer is counting.
Description:
Returns the timer counting direction, by reading CC8yTCST.CDIR bit.

This API will return the direction in which the timer is currently incrementing(XMC_CCU8_SLICE_TIMER_COUNT_DIR_UP) or decrementing (XMC_CCU8_SLICE_TIMER_COUNT_DIR_DOWN).
Related APIs:
None.
bool XMC_CCU8_SLICE_GetEvent | ( | const XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Event to be evaluated for assertion
Returns

bool Returns true if event is set else false is returned.
Description:
Evaluates if a given event is asserted or not, by reading CC8yINTS register.

Return true if the event is asserted. For a event to be asserted it has to be first enabled. Only if that event is enabled the call to this API is valid. If the Event is enabled and has not yet occurred then a false is returned.
Related APIs:
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_SetEvent().
XMC_CCU8_STATUS_t XMC_CCU8_SLICE_GetLastCapturedTimerValue | ( | const XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_CAP_REG_SET_t | set,
 |  | uint32_t * | val_ptr
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
set | The capture register set, which must be evaluated
val_ptr | Out Parameter of the API.Stores the captured timer value into this out parameter.
Returns

XMC_CCU8_STATUS_t Returns XMC_CCU8_STATUS_OK if there was new value present in the capture registers. returns XMC_CCU8_STATUS_ERROR if there was no new value present in the capture registers.
Description:
Retrieves the latest captured timer value, by reading CC8yCV registers.

Retrieve the timer value last stored by the slice. When separate capture events are used, users must specify the capture set to evaluate. If single capture event mode is used, all 8 capture registers are evaluated.
The lowest register is evaluated first followed by the next higher ordered register and this continues until all capture registers have been evaluated.
Related APIs:
XMC_CCU8_SLICE_GetCaptureregisterValue().
XMC_CCU8_SLICE_MODE_t XMC_CCU8_SLICE_GetSliceMode ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

XMC_CCU8_SLICE_MODE_t returns XMC_CCU8_SLICE_MODE_COMPARE if the slice is operating in compare mode returns XMC_CCU8_SLICE_MODE_CAPTURE if the slice is operating in capture mode
Description:
Retrieves the current mode of operation in the slice (either Capture mode or Compare mode), by reading CC8yTC.CMOD bit.

Ensure that before invoking this API the CCU8 slice should be configured otherwise the output of this API is invalid.
Related APIs:
None.
uint16_t XMC_CCU8_SLICE_GetTimerCompareMatch | ( | const XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CHANNEL_t | channel
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
channel | Select the compare channel to retrieve from.
Returns

uint16_t returns the current timer compare value Range: [0x0 to 0xFFFF]
Description:
Retrieves the timer compare value currently effective, by reading CC8yCR1S and CC8yCR2S registers.

If the timer is active then the value being returned is currently being for the PWM duty cycle( timer compare value).
Note:
The XMC_CCU8_SLICE_SetTimerCompareMatch() would set the new compare value to a shadow register. This would only transfer the new values into the actual compare register if the shadow transfer request is enabled and if a period match occurs. Hence a consecutive call to XMC_CCU8_SLICE_GetTimerCompareMatch() would not reflect the new values until the shadow transfer completes.
Related APIs:
XMC_CCU8_SLICE_SetTimerCompareMatch().
XMC_CCU8_SLICE_TIMER_COUNT_MODE_t XMC_CCU8_SLICE_GetTimerCountingMode ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

XMC_CCU8_SLICE_TIMER_COUNT_MODE_t returns XMC_CCU8_SLICE_TIMER_COUNT_MODE_EA if edge aligned mode is selected returns XMC_CCU8_SLICE_TIMER_COUNT_MODE_CA if center aligned mode is selected
Description:
Retrieves timer counting mode either Edge aligned or Center Aligned, by reading CC8yTC.TCM bit.

Related APIs:
XMC_CCU8_SLICE_SetTimerCountingMode().
uint16_t XMC_CCU8_SLICE_GetTimerPeriodMatch ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

uint16_t returns the current timer period value Range: [0x0 to 0xFFFF]
Description:
Retrieves the timer period value currently effective, by reading CC8yPR register.

If the timer is active then the value being returned is currently being used for the PWM period.
Note:
The XMC_CCU8_SLICE_SetTimerPeriodMatch() would set the new period value to a shadow register. This would only transfer the new values into the actual period register if the shadow transfer request is enabled and if a period match occurs. Hence a consecutive call to XMC_CCU8_SLICE_GetTimerPeriodMatch() would not reflect the new values until the shadow transfer completes.
Related APIs:
XMC_CCU8_SLICE_SetTimerPeriodMatch().
XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t XMC_CCU8_SLICE_GetTimerRepeatMode ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t returns XMC_CCU8_SLICE_TIMER_REPEAT_MODE_REPEAT if continuous mode is selected returns XMC_CCU8_SLICE_TIMER_REPEAT_MODE_SINGLE if single shot mode is selected
Description:
Retrieves the Timer repeat mode, either Single shot mode or continuous mode, by reading CC8yTC.TSSM bit.

The timer will count upto the terminal count as specified in the period register and stops immediately if the repeat mode has been set to single shot mode. In the continuous mode of operation, the timer starts counting all over again after reaching the terminal count.
Related APIs:
XMC_CCU8_SLICE_SetTimerRepeatMode().
uint16_t XMC_CCU8_SLICE_GetTimerValue ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

uint16_t returns the current timer value Range: [0x0 to 0xFFFF]
Description:
Retrieves the latest timer value, from CC8yTIMER register.

Related APIs:
XMC_CCU8_SLICE_SetTimerValue().
bool XMC_CCU8_SLICE_IsDeadTimeCntr1Running ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Pointer to an instance of CC8 slice
Returns

bool returns true if the dead time counter of Compare channel-1 is running else it returns false.
Description:
Returns the state of the Dead time counter 1 (Either Running or stopped(idle)), by reading CC8yTCST.DTR1 bit. This returns the state of the dead time counter which is linked to Compare channel-1.
Related APIs:
XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
bool XMC_CCU8_SLICE_IsDeadTimeCntr2Running ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Pointer to an instance of CC8 slice
Returns

bool returns true if the dead time counter of Compare channel-2 is running else it returns false.
Description:
Returns the state of the Dead time counter 2 (Either Running or stopped(idle)), by reading CC8yTCST.DTR2 bit. This returns the state of the dead time counter which is linked to Compare channel-2.
Related APIs:
XMC_CCU8_SLICE_IsDeadTimeCntr1Running().
bool XMC_CCU8_SLICE_IsExtendedCapReadEnabled ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

bool would return true if the extended capture read back mode is enabled
Description:
Checks if Extended capture mode read is enabled for particular slice or not, by reading CC8yTC.ECM bit.

In this mode the there is only one associated read address for all the capture registers. Individual capture registers can still be accessed in this mode.
Related APIs:
XMC_CCU8_GetCapturedValueFromFifo().
bool XMC_CCU8_SLICE_IsTimerRunning ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

bool returns true if the Timer is running else it returns false.
Description:
Returns the state of the timer (Either Running or stopped(idle)), by reading CC8yTCST.TRB bit.
Related APIs:
XMC_CCU8_SLICE_StartTimer()
XMC_CCU8_SLICE_StopTimer().
void XMC_CCU8_SLICE_LoadConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External load Function
Returns

None
Description:
Configures the Load Function for the slice, by configuring CC8yCMC.LDS bit.

Load function is mapped with one of the 3 events. Up on occurrence of the event,
if CC8yTCST.CDIR set to 0,CC8yTIMER register is reloaded with the value from compare channel 1 or compare channel 2
if CC8yTCST.CDIR set to 1,CC8yTIMER register is reloaded with the value from period register
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_LoadSelector | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CHANNEL_t | ch_num
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
ch_num | Select which compare channel value has to be loaded to the Timer register during external load event.
Returns

None
Description:
Up on occurrence of the external load event, if CC8yTCST.CDIR set to 0, CC8yTIMER register can be reloaded
with the value from compare channel 1 or compare channel 2
If CC8yTC.TLS is 0, compare channel 1 value is loaded to the CC8yTIMER register
If CC8yTC.TLS is 1, compare channel 2 value is loaded to the CC8yTIMER register
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_ModulationConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event,
 |  | const XMC_CCU8_SLICE_MODULATION_MODE_t | mod_mode,
 |  | const XMC_CCU8_SLICE_MODULATION_CHANNEL_t | channel,
 |  | const bool | synch_with_pwm
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External Modulation Function
mod_mode | Desired Modulation mode
channel | Specify the channel(s) on which the modulation should be applied.
synch_with_pwm | Option to synchronize modulation with PWM start Pass true if the modulation needs to be synchronized with PWM signal.
Returns

None
Description:
Configures the Output Modulation Function of the slice, by configuring CC8yCMC.MOS, CC8yTC.EMT and CC8yTC.EMS bits.

Modulation function is mapped with one of the 3 events. The output signal of the CCU can be modulated according to a external input. Additionally, the behaviour of the slice upon activation of the modulation function is configured as well.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_SetDeadTimePrescaler | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_DTC_DIV_t | div_val
 | ) |  |
Parameters
slice | Pointer to an instance of CC8 slice
div_val | Prescaler divider value
Returns

None
Description:
Configures clock division factor for dead time generator, by configuring CC8yDTC.DTCC bit. The Clock divider works on the timer clock. It is possible to scale the timer clock for the dead time generator by a factor of 1/2/4/8. This selection is passed as an argument to the API.
Related APIs:
XMC_CCU8_SLICE_DeadTimeInit()
XMC_CCU8_SLICE_SetDeadTimeValue()
XMC_CCU8_SLICE_ConfigureDeadTime()
XMC_CCU8_SLICE_IsDeadTimeCntr1Running()
XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
void XMC_CCU8_SLICE_SetDeadTimeValue | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CHANNEL_t | channel,
 |  | const uint8_t | rise_value,
 |  | const uint8_t | fall_value
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
channel | Compare channel number
rise_value | Programs rising edge delay Range: [0x0 to 0xFF]
fall_value | Programs falling edge delay Range: [0x0 to 0xFF]
Returns

None
Description:
Configures the dead time for rising and falling edges, by updating CC8y.DC1R, CC8y.DC1R registers.

This API will Configure the delay that is need either when the value changes from 0 to 1 (rising edge) or value changes from 1 to 0(falling edge). Directly accessed registers are CC8yDC1R, CC8yDC2R.
Related APIs:
XMC_CCU8_SLICE_DeadTimeInit()
XMC_CCU8_SLICE_SetDeadTimeValue()
XMC_CCU8_SLICE_ConfigureDeadTime()
XMC_CCU8_SLICE_IsDeadTimeCntr1Running()
XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
void XMC_CCU8_SLICE_SetDitherCompareValue | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint8_t | comp_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
comp_val | Dither compare value Range: [0x0 to 0xF]
Returns

None
Description:
Sets the dither spread/compare value, by setting CC8yDITS.DCVS bits.

This value is the cornerstone of PWM dithering feature. Dithering is applied/done when the value in the dithering counter is less than this compare/spread value. For all dithering counter values greater than the spread value, there is no dithering. After setting the value XMC_CCU8_EnableShadowTransfer() has to be called with appropriate mask.
Related APIs:
XMC_CCU8_SLICE_EnableDithering().
void XMC_CCU8_SLICE_SetEvent | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Event whose assertion can potentially lead to an interrupt
Returns

None
Description:
Manually asserts the requested event, by setting CC8ySWS register.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API manually asserts the requested event.
Related APIs:
XMC_CCU8_SLICE_SetInterruptNode()
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_EnableMultipleEvents().
void XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint8_t | cmp_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
cmp_val | Prescaler divider compare value Range: [0x0 to 0xF]
Returns

None
Description:
Programs the slice specific prescaler divider compare value, by configuring CC8yFPCS register.

The compare value is applicable only in floating mode of operation. The prescaler divider starts with an initial value and increments to the compare value steadily upon every period match. Once prescaler divider equals the prescaler divider compare value, the value in the former resets back to the PVAL (from FPC). After setting the value, XMC_CCU8_EnableShadowTransfer() has to be called with appropriate mask.
Related APIs:
XMC_CCU8_SLICE_SetPrescaler().
void XMC_CCU8_SLICE_SetInput | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event,
 |  | const XMC_CCU8_SLICE_INPUT_t | input
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | The External Event which needs to be configured.
input | One of the 16 inputs meant to be mapped to the desired event
Returns

None
Description:
Selects an input for an external event, by configuring CC8yINS register.

It is possible to select one of the possible 16 input signals for a given Event. This configures the CC8yINS.EVxIS for the selected event.
Related APIs:
XMC_CCU8_SLICE_StartConfig()
XMC_CCU8_SLICE_StopConfig()
XMC_CCU8_SLICE_LoadConfig()
XMC_CCU8_SLICE_ModulationConfig()
XMC_CCU8_SLICE_CountConfig()
XMC_CCU8_SLICE_GateConfig()
XMC_CCU8_SLICE_Capture0Config()
XMC_CCU8_SLICE_Capture1Config()
XMC_CCU8_SLICE_DirectionConfig()
XMC_CCU8_SLICE_StatusBitOverrideConfig()
XMC_CCU8_SLICE_TrapConfig().
void XMC_CCU8_SLICE_SetInterruptNode | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_IRQ_ID_t | event,
 |  | const XMC_CCU8_SLICE_SR_ID_t | sr
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Event which must be bound to a service request line
sr | The Service request line which is bound to the event
Returns

None
Description:
Binds requested event to a service request line, by configuring CC8ySRS register with respective event.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API binds the requested event with the requested service request line(sr).
Related APIs:
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_SetEvent().
void XMC_CCU8_SLICE_SetOutPath | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | out_path_msk
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
out_path_msk | configuration for output path selection. combination of XMC_CCU8_OUT_PATH_t enum items can be used to create a mask.
Returns

None
Description:
Configure the out the path of the two compare channels with specified ST signal, by configuring the ^ CC8yCHC register.

For the two compare channels it is possible to select either direct ST signal or inverted ST signal. out_path_msk is used to set the required out put path.
Related APIs:
None
void XMC_CCU8_SLICE_SetPassiveLevel | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_OUTPUT_t | out,
 |  | const XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t | level
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
out | Output signal for which the passive level needs to be set.
level | Output passive level for the out signal
Returns

None
Description:
Configures the passive level for the slice output, by setting CC8yPSL register.

Defines the passive level for the timer slice output pin. Selects either level high is passive or level low is passive. This is the level of the output before the compare match is value changes it.
Related APIs:
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_SetEvent().
void XMC_CCU8_SLICE_SetPrescaler | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_PRESCALER_t | div_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
div_val | Prescaler divider value. Accepts enum :: XMC_CCU8_SLICE_PRESCALER_t Range: [0x0 to 0xF]
Returns

None
Description:
Programs the slice specific prescaler divider, by configuring the CC8yPSC and CC8yFPC registers.

The prescaler divider may only be programmed after the prescaler run bit has been cleared by calling XMC_CCU8_StopPrescaler().
Related APIs:
XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue().
void XMC_CCU8_SLICE_SetShadowTransferMode | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t | shadow_transfer_mode
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
shadow_transfer_mode | mode to be configured Use :: XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t enum items for mode
Returns

None
Description:
Configures when the shadow transfer has to occur, by setting STM bit in STC register.

After requesting for shadow transfer mode using XMC_CCU8_EnableShadowTransfer(), actual transfer occurs based on the selection done using this API (i.e. on period and One match, on Period match only, on One match only).
Note:
This is effective when the timer is configured in centre aligned mode.
Related APIs:
XMC_CCU8_EnableShadowTransfer()
Note
Not available for XMC4500 series
void XMC_CCU8_SLICE_SetTimerCompareMatch | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CHANNEL_t | channel,
 |  | const uint16_t | compare_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
channel | Select the compare channel to which the compare_val has to programmed.
compare_val | Timer compare value
Returns

None
Description:
Programs the timer compare value, by writing CC8yCR1S and CC8yCR2S registers.

The PWM duty cycle is determined by this value.

The compare value is written to a shadow register. Explicitly enable the shadow transfer for the the period/compare value by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask.If shadow transfer is enabled and the timer is running, a period match transfers the value from the shadow register to the actual compare register.
Related APIs:
XMC_CCU8_EnableShadowTransfer().
void XMC_CCU8_SLICE_SetTimerCompareMatchChannel1 | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint16_t | compare_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
compare_val | Timer compare value
Returns

None
Description:
Programs the timer compare1 value, by writing CC8yCR1S register.

The PWM duty cycle is determined by this value.

The compare value is written to a shadow register. Explicitly enable the shadow transfer for the the period/compare value by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask. If shadow transfer is enabled and the timer is running, a period match transfers the value from the shadow register to the actual compare register.
Related APIs:
XMC_CCU8_EnableShadowTransfer().
void XMC_CCU8_SLICE_SetTimerCompareMatchChannel2 | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint16_t | compare_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
compare_val | Timer compare value
Returns

None
Description:
Programs the timer compare2 value, by writing CC8yCR2S register.

The PWM duty cycle is determined by this value.

The compare value is written to a shadow register. Explicitly enable the shadow transfer for the the period/compare value by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask. If shadow transfer is enabled and the timer is running, a period match transfers the value from the shadow register to the actual compare register.
Related APIs:
XMC_CCU8_EnableShadowTransfer().
void XMC_CCU8_SLICE_SetTimerCountingMode | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_TIMER_COUNT_MODE_t | mode
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
mode | Desired counting mode (Either Edge Aligned or Center Aligned)
Returns

None
Description:
Configures the timer counting mode either Edge Aligned or Center Aligned, by configuring CC8yTC.TCM bit.

In the edge aligned mode, the timer counts from 0 to the terminal count. Once the timer count has reached a preset compare value, the timer status output asserts itself. It will now deassert only after the timer count reaches the terminal count.
In the center aligned mode, the timer first counts from 0 to the terminal count and then back to 0. During this upward and downward counting, the timer status output stays asserted as long as the timer value is greater than the compare value.
Related APIs:
XMC_CCU8_SLICE_GetTimerCountingMode().
void XMC_CCU8_SLICE_SetTimerPeriodMatch | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint16_t | period_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
period_val | Timer period value Range: [0x0 to 0xFFFF]
Returns

None
Description:
Programs the timer period, by writing CC8yPRS register.

The frequency of counting/ PWM frequency is determined by this value. The period value is written to a shadow register. Explicitly enable the shadow transfer for the the period value by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask. If shadow transfer is enabled and the timer is running, a period match transfers the value from the shadow register to the actual period register.
Related APIs:
XMC_CCU8_SLICE_GetTimerPeriodMatch().
void XMC_CCU8_SLICE_SetTimerRepeatMode | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t | mode
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
mode | Desired repetition mode (Either single shot or Continuous)
Returns

None
Description:
Configures the Timer to either Single shot mode or continuous mode, by configuring CC8yTC.TSSM bit.

The timer will count up to the terminal count as specified in the period register and stops immediately if the repeat mode has been set to single shot. In the continuous mode of operation, the timer starts counting all over again after reaching the terminal count.
Related APIs:
XMC_CCU8_SLICE_GetTimerRepeatMode().
void XMC_CCU8_SLICE_SetTimerValue | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint16_t | timer_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
timer_val | The new timer value that has to be loaded into the TIMER register. Range: [0x0 to 0xFFFF]
Returns

None
Description:
Loads a new timer value, by setting CC8yTIMER register.

Note:
Request to load is ignored if the timer is running.
Related APIs:
XMC_CCU8_SLICE_GetTimerValue().
void XMC_CCU8_SLICE_StartConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event,
 |  | const XMC_CCU8_SLICE_START_MODE_t | start_mode
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External Start Function
start_mode | Behaviour of slice when the start function is activated
Returns

None
Description:
Configures the Start Function of the slice, by configuring CC8yCMC.ENDS and CC8yTC.ENDM bits.

Start function is mapped with one of the 3 events. An external signal can control when a CC8 timer should start. Additionally, the behaviour of the slice upon activation of the start function is configured as well.
Related APIs:
XMC_CCU8_SLICE_StopConfig()
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_StartTimer ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Starts the timer counting operation, by setting CC8yTCSET.TRBS bit.

It is necessary to have configured the CC8 slice before starting its timer. Before the Timer is started ensure that the clock is provided to the slice.
Related APIs:
XMC_CCU8_SLICE_StopTimer().
void XMC_CCU8_SLICE_StatusBitOverrideConfig ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Configures the status bit override Function of the slice, by configuring CC8yCMC.OFS bit.

Status bit override function is mapped with one of the 3 events. A slice can be configured to change the output of the timer's CC8yST1 signal depending on an external signal.
Related APIs:
XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent().
void XMC_CCU8_SLICE_StopClearTimer ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Stops and resets the timer count to zero, by setting CC8yTCCLR.TCC and CC8yTCCLR.TRBC bit.

Related APIs:
XMC_CCU8_SLICE_StartTimer().
void XMC_CCU8_SLICE_StopConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event,
 |  | const XMC_CCU8_SLICE_END_MODE_t | end_mode
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External Stop Function
end_mode | Behaviour of slice when the stop function is activated
Returns

None
Description:
Configures the Stop function for the slice, by configuring CC8yCMC.STRTS and CC8yTC.STRM bits.

Stop function is mapped with one of the 3 events. An external signal can control when a CCU8 timer should stop. Additionally, the behaviour of the slice upon activation of the stop function is configured as well.
Related APIs:
XMC_CCU8_SLICE_StartConfig()
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_StopTimer ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Stops the Timer.

Timer counting operation can be stopped by invoking this API, by setting CC8yTCCLR.TRBC bit.
Related APIs:
XMC_CCU8_SLICE_StartTimer().
void XMC_CCU8_SLICE_TrapConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_TRAP_EXIT_MODE_t | exit_mode,
 |  | bool | synch_with_pwm
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
exit_mode | How should a previously logged trap state be exited?
synch_with_pwm | Should exit of trap state be synchronized with PWM cycle start?
Returns

None
Description:
Configures the Trap Function of the slice, by configuring CC8yCMC.TS, CC8yTC.TRPSE, and CC8yTC.TRPSW bits.

Trap function is mapped with Event-2. Criteria for exiting the trap state is configured. This trap function allows PWM outputs to react on the state of an input pin. Thus PWM output can be forced to inactive state upon detection of a trap. It is also possible to synchronize the trap function with the PWM signal using the synch_with_pwm.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_WriteCoherentlyWithPWMCycle | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | coherent_write
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
coherent_write | specifies for what fields this mode has to be applied Use :: XMC_CCU8_SLICE_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configures the specified fields shadow value to be updated in synchronous with PWM after shadow transfer request, by clearing IRPC, IRCC1, IRCC2, IRLC, IRDC, IRFC bits in STC register.

When coherent shadow is enabled, after calling XMC_CCU8_EnableShadowTransfer(), the value which are written in the respective shadow registers get updated according the configuration done using XMC_CCU8_SLICE_SetShadowTransferMode() API.
Note:
Related APIs:
XMC_CCU8_EnableShadowTransfer(), XMC_CCU8_SLICE_SetShadowTransferMode()
Note
Only available for XMC1400 series
void XMC_CCU8_SLICE_WriteImmediateAfterShadowTransfer | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | immediate_write
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
immediate_write | specifies for what fields this mode has to be applied Use :: XMC_CCU8_SLICE_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configures the specified fields shadow value to be updated immediately after shadow transfer request, by setting IRPC, IRCC1, IRCC2, IRLC, IRDC, IRFC bits in STC register.

When immediate shadow is enabled, by calling XMC_CCU8_EnableShadowTransfer() the value which are written in the shadow registers get updated to the actual registers immediately.
Note:
Related APIs:
XMC_CCU8_EnableShadowTransfer()
Note
Only available for XMC1400 series
void XMC_CCU8_StartPrescaler ( XMC_CCU8_MODULE_t *const module )
Parameters
module Constant pointer to CCU8 module
Returns

None
Description:
Starts the prescaler and restores clocks to the timer slices, by setting GIDLC.SPRB bit.

Once the input to the prescaler has been chosen and the prescaler divider of all slices programmed, the prescaler itself may be started. Invoke this API after XMC_CCU8_Init() (Mandatory to fully initialize the module).
Related APIs:
XMC_CCU8_Init()
XMC_CCU8_EnableClock()
XMC_CCU8_DisableClock()
XMC_CCU8_StartPrescaler()
XMC_CCU8_StopPrescaler().
void XMC_CCU8_StopPrescaler ( XMC_CCU8_MODULE_t *const module )
Parameters
module Constant pointer to CCU8 module
Returns

None
Description:
Stops the prescaler and blocks clocks to the timer slices, by setting GIDLS.CPRB bit.

Clears the run bit of the prescaler. Ensures that the module clock is not supplied to the slices of the module.
Related APIs:
XMC_CCU8_EnableClock()
XMC_CCU8_DisableClock()
XMC_CCU8_StartPrescaler()
XMC_CCU8_StopPrescaler().
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_CCU8_SLICE_CAPTURE_CONFIG_t Struct Reference

Data Fields
XMC_CCU8_SLICE_CAPTURE_CONFIG_t Struct Reference
XMC Peripheral Library » CCU8

#include <xmc_ccu8.h>

Data Fields

uint32_t | float_limit: 4
uint32_t | prescaler_initval: 4
uint32_t | timer_concatenation: 1
uint32_t | fifo_enable: 1
uint32_t | ignore_full_flag: 1
uint32_t | prescaler_mode: 1
uint32_t | same_event: 1
uint32_t | timer_clear_mode: 2

Detailed Description

Configuration data structure for CCU8 slice. Specifically configures the CCU8 slice to capture mode operation. This excludes event and function configuration.

Field Documentation

uint32_t fifo_enable

Should the capture registers be setup as a FIFO?(Extended capture mode)

uint32_t float_limit

The max value which the prescaler divider can increment to

uint32_t ignore_full_flag

Should updates to capture registers follow full flag rules?

uint32_t prescaler_initval

Prescaler divider value

uint32_t prescaler_mode

Normal or floating prescaler Accepts enum :: XMC_CCU8_SLICE_PRESCALER_MODE_t

uint32_t same_event

Should the capture event for C1V/C0V and C3V/C2V be same capture edge?

uint32_t timer_clear_mode

How should the timer register be cleared upon detection of capture event? Accepts enum XMC_CCU8_SLICE_TIMER_CLEAR_MODE_t

uint32_t timer_concatenation

Enables the concatenation of the timer

The documentation for this struct was generated from the following file:
  • xmc_ccu8.h


XMC Peripheral Library for XMC4000 Family: XMC_CCU8_SLICE_COMPARE_CONFIG_t Struct Reference

Data Fields
XMC_CCU8_SLICE_COMPARE_CONFIG_t Struct Reference
XMC Peripheral Library » CCU8

#include <xmc_ccu8.h>

Data Fields

uint32_t | dither_limit: 4
uint32_t | float_limit: 4
uint32_t | prescaler_initval: 4
uint32_t | timer_concatenation: 1
uint32_t | asymmetric_pwm: 1
uint32_t | dither_duty_cycle: 1
uint32_t | dither_timer_period: 1
uint32_t | invert_out0: 1
uint32_t | invert_out1: 1
uint32_t | invert_out2: 1
uint32_t | invert_out3: 1
uint32_t | mcm_ch1_enable: 1
uint32_t | mcm_ch2_enable: 1
uint32_t | monoshot: 1
uint32_t | passive_level_out0: 1
uint32_t | passive_level_out1: 1
uint32_t | passive_level_out2: 1
uint32_t | passive_level_out3: 1
uint32_t | prescaler_mode: 1
uint32_t | shadow_xfer_clear: 1
uint32_t | slice_status: 2
uint32_t | timer_mode: 1

Detailed Description

Configuration data structure for CCU8 slice. Specifically configures the CCU8 slice to compare mode operation. This excludes event and function configuration.

Field Documentation

uint32_t asymmetric_pwm

Should the PWM be a function of the 2 compare channels rather than period value?

uint32_t dither_duty_cycle

Can the compare match of the timer dither?

uint32_t dither_limit

The value that determines the spreading of dithering Range : [0 to 15]

uint32_t dither_timer_period

Can the period of the timer dither?

uint32_t float_limit

The max value which the prescaler divider can increment to. Range : [0 to 15]

uint32_t invert_out0

Should inverted ST of Channel-1 be connected to OUT0?

uint32_t invert_out1

Should inverted ST of Channel-1 be connected to OUT1?

uint32_t invert_out2

Should inverted ST of Channel-2 be connected to OUT2?

uint32_t invert_out3

Should inverted ST of Channel-2 be connected to OUT3?

uint32_t mcm_ch1_enable

Multi-Channel mode for compare channel 1 enable?

uint32_t mcm_ch2_enable

Multi-Channel mode for compare channel 2 enable?

uint32_t monoshot

Single shot or Continuous mode . Accepts enum :: XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t

uint32_t passive_level_out0

ST and OUT passive levels Configuration for OUT0. Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t

uint32_t passive_level_out1

ST and OUT passive levels Configuration for OUT1. Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t

uint32_t passive_level_out2

ST and OUT passive levels Configuration for OUT2. Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t

uint32_t passive_level_out3

ST and OUT passive levels Configuration for OUT3. Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t

uint32_t prescaler_initval

Initial prescaler divider value Accepts enum :: XMC_CCU8_SLICE_PRESCALER_t

uint32_t prescaler_mode

Normal or floating prescaler mode. Accepts enum :: XMC_CCU8_SLICE_PRESCALER_MODE_t

uint32_t shadow_xfer_clear

Should PR and CR shadow xfer happen when timer is cleared?

uint32_t slice_status

Which of the two channels drives the slice status output. Accepts enum :: XMC_CCU8_SLICE_STATUS_t

uint32_t timer_concatenation

Enables the concatenation of the timer if true

uint32_t timer_mode

Edge aligned or Centre Aligned. Accepts enum :: XMC_CCU8_SLICE_TIMER_COUNT_MODE_t

The documentation for this struct was generated from the following file:
  • xmc_ccu8.h


XMC Peripheral Library for XMC4000 Family: XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t Struct Reference

XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t Struct Reference
XMC Peripheral Library » CCU8

#include <xmc_ccu8.h>

Detailed Description

Dead Time configuration

Field Documentation

uint32_t channel1_inv_st_path

Should dead time be applied to inverse ST output of Compare Channel-1?

uint32_t channel1_st_falling_edge_counter

Contains the delay value that is applied to the falling edge for compare channel-1. Range: [0x0 to 0xFF]

uint32_t channel1_st_path

Should dead time be applied to ST output of Compare Channel-1?

uint32_t channel1_st_rising_edge_counter

Contains the delay value that is applied to the rising edge for compare channel-1. Range: [0x0 to 0xFF]

uint32_t channel2_inv_st_path

Should dead time be applied to inverse ST output of Compare Channel-2?

uint32_t channel2_st_falling_edge_counter

Contains the delay value that is applied to the falling edge for compare channel-2. Range: [0x0 to 0xFF]

uint32_t channel2_st_path

Should dead time be applied to ST output of Compare Channel-2?

uint32_t channel2_st_rising_edge_counter

Contains the delay value that is applied to the rising edge for compare channel-2. Range: [0x0 to 0xFF]

uint32_t div

Dead time prescaler divider value. Accepts enum XMC_CCU8_SLICE_DTC_DIV_t

uint32_t enable_dead_time_channel1

Enable dead time for Compare Channel-1

uint32_t enable_dead_time_channel2

Enable dead time for Compare Channel-2

The documentation for this struct was generated from the following file:
  • xmc_ccu8.h


XMC Peripheral Library for XMC4000 Family: XMC_CCU8_SLICE_EVENT_CONFIG_t Struct Reference

Data Fields
XMC_CCU8_SLICE_EVENT_CONFIG_t Struct Reference
XMC Peripheral Library » CCU8

#include <xmc_ccu8.h>

Data Fields

XMC_CCU8_SLICE_EVENT_FILTER_t duration
XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_t edge
XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t level
XMC_CCU8_SLICE_INPUT_t mapped_input

Detailed Description

Configuration data structure of an External Event(Event-0/1/2). Needed to configure the various aspects of an External Event. This structure will not connect the external event with an external function.

Field Documentation

XMC_CCU8_SLICE_EVENT_FILTER_t duration

Low Pass filter duration in terms of fCCU clock cycles.

XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_t edge

Select the event edge of the input signal. This is needed for an edge sensitive External function.

XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t level

Select the event level of the input signal. This is needed for an level sensitive External function.

XMC_CCU8_SLICE_INPUT_t mapped_input

Required input signal for the Event.

The documentation for this struct was generated from the following file:
  • xmc_ccu8.h


XMC Peripheral Library for XMC4000 Family: DAC

Data Structures | Macros | Enumerations | Functions
DAC
XMC Peripheral Library

Data Structures

struct | XMC_DAC_CH_CONFIG_t
struct | XMC_DAC_t

Macros

#define | XMC_DAC0 ((XMC_DAC_t *)DAC_BASE)
#define | XMC_DAC_NO_CHANNELS (2U)
#define | XMC_DAC_PATTERN_RECTANGLE {31U, 31U, 31U, 31U, 31U, 31U, 31U, 31U, 31U}
#define | XMC_DAC_PATTERN_SINE {0U, 6U, 12U, 17U, 22U, 26U, 29U, 30U, 31U}
#define | XMC_DAC_PATTERN_TRIANGLE {0U, 4U, 8U, 12U, 16U, 19U, 23U, 27U, 31U}
#define | XMC_DAC_SAMPLES_PER_PERIOD (32U)

Enumerations

Functions

void | XMC_DAC_CH_DisableEvent (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_DisableOutput (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_DisableOutputNegation (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_DisablePatternSignOutput (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_EnableEvent (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_EnableOutput (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_EnableOutputNegation (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_EnablePatternSignOutput (XMC_DAC_t *const dac, const uint8_t channel)
XMC_DAC_CH_OUTPUT_SCALE_t | XMC_DAC_CH_GetOutputScale (XMC_DAC_t *const dac, const uint8_t channel)
uint16_t | XMC_DAC_CH_GetRampStart (XMC_DAC_t *const dac, const uint8_t channel)
uint16_t | XMC_DAC_CH_GetRampStop (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_Init (XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_CONFIG_t *const config)
bool | XMC_DAC_CH_IsFifoEmpty (const XMC_DAC_t *const dac, const uint8_t channel)
bool | XMC_DAC_CH_IsFifoFull (const XMC_DAC_t *const dac, const uint8_t channel)
bool | XMC_DAC_CH_IsOutputEnabled (const XMC_DAC_t *const dac, const uint8_t channel)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_SetFrequency (XMC_DAC_t *const dac, const uint8_t channel, const uint32_t frequency)
void | XMC_DAC_CH_SetMode (XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_MODE_t mode)
void | XMC_DAC_CH_SetOutputOffset (XMC_DAC_t *const dac, const uint8_t channel, const uint8_t offset)
void | XMC_DAC_CH_SetOutputScale (XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_OUTPUT_SCALE_t scale)
void | XMC_DAC_CH_SetPattern (XMC_DAC_t *const dac, const uint8_t channel, const uint8_t *const pattern)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_SetPatternFrequency (XMC_DAC_t *const dac, const uint8_t channel, const uint32_t frequency)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_SetRampFrequency (XMC_DAC_t *const dac, const uint8_t channel, const uint32_t frequency)
void | XMC_DAC_CH_SetRampStart (XMC_DAC_t *const dac, const uint8_t channel, const uint16_t start)
void | XMC_DAC_CH_SetRampStop (XMC_DAC_t *const dac, const uint8_t channel, const uint16_t stop)
void | XMC_DAC_CH_SetSignedDataType (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_SetTrigger (XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_TRIGGER_t trigger)
void | XMC_DAC_CH_SetUnsignedDataType (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_SoftwareTrigger (XMC_DAC_t *const dac, const uint8_t channel)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_StartDataMode (XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_TRIGGER_t trigger, const uint32_t frequency)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_StartNoiseMode (XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_TRIGGER_t trigger, const uint32_t frequency)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_StartPatternMode (XMC_DAC_t *const dac, const uint8_t channel, const uint8_t *const pattern, const XMC_DAC_CH_PATTERN_SIGN_OUTPUT_t sign_output, const XMC_DAC_CH_TRIGGER_t trigger, const uint32_t frequency)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_StartRampMode (XMC_DAC_t *const dac, const uint8_t channel, const uint16_t start, const uint16_t stop, const XMC_DAC_CH_TRIGGER_t trigger, const uint32_t frequency)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_StartSingleValueMode (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_Write (XMC_DAC_t *const dac, const uint8_t channel, const uint16_t data)
void | XMC_DAC_Disable (XMC_DAC_t *const dac)
void | XMC_DAC_DisableSimultaneousDataMode (XMC_DAC_t *const dac)
void | XMC_DAC_Enable (XMC_DAC_t *const dac)
void | XMC_DAC_EnableSimultaneousDataMode (XMC_DAC_t *const dac)
bool | XMC_DAC_IsEnabled (const XMC_DAC_t *const dac)
void | XMC_DAC_SimultaneousWrite (XMC_DAC_t *const dac, const uint16_t data0, const uint16_t data1)

Detailed Description

DAC driver uses DAC peripheral to convert digital value to analog value. XMC4000 microcontroller family has two DAC channels of 12-bit resolution and maximum conversion rate of 2MHz with full accuracy and 5MHz with reduced accuracy. It consists of inbuilt pattern generator, ramp generator and noise generator modes. Additionally, waveforms can be generated by configuring data registers in single value mode and in data mode. It has DMA handling capability to generate custom waveforms in data mode without CPU intervention.

DAC driver features:

  1. Configuration structure XMC_DAC_CH_CONFIG_t and initialization function XMC_DAC_CH_Init() to initialize DAC and configure channel settings
  2. Pattern Generator Mode:
    • DAC is configured in pattern generator mode using XMC_DAC_CH_StartPatternMode()
    • XMC_DAC_CH_SetPattern() is used to set the waveform pattern values in pattern register for one quarter
    • Allows to change the trigger frequency using XMC_DAC_CH_SetPatternFrequency()
  3. Single Value Mode:
    • DAC is configured in single value mode using XMC_DAC_CH_StartSingleValueMode()
    • Allows to change the trigger frequency using XMC_DAC_CH_SetFrequency()
  4. Data Mode:
    • DAC is configured in data mode using XMC_DAC_CH_StartDataMode()
    • Allows to change the trigger frequency using XMC_DAC_CH_SetFrequency()
  5. Ramp Mode:
    • DAC is configured in ramp generator mode using XMC_DAC_CH_StartRampMode()
    • Allows to change the trigger frequency using XMC_DAC_CH_SetRampFrequency()
    • Allows to set the start and stop values of the ramp using XMC_DAC_CH_SetRampStart() and XMC_DAC_CH_SetRampStop()
  6. Noise Mode:
    • DAC is configured in noise mode using XMC_DAC_CH_StartNoiseMode()
    • Allows to change the trigger frequency using XMC_DAC_CH_SetFrequency()
  7. Allows to change the scale, offset dynamically using XMC_DAC_CH_SetOutputScale() and XMC_DAC_CH_SetOutputOffset() respectively
  8. Allows to select one of the eight possible trigger sources using XMC_DAC_CH_SetTrigger()
  9. 2 DAC channels can be used in synchronization in single value mode and data mode to generate two analog outputs in sync. XMC_DAC_EnableSimultaneousDataMode()

Macro Definition Documentation

#define XMC_DAC0 ((XMC_DAC_t *)DAC_BASE)

DAC module register base

#define XMC_DAC_NO_CHANNELS (2U)

DAC maximum channels

#define XMC_DAC_PATTERN_RECTANGLE {31U, 31U, 31U, 31U, 31U, 31U, 31U, 31U, 31U}

First quarter Rectangle waveform samples

#define XMC_DAC_PATTERN_SINE {0U, 6U, 12U, 17U, 22U, 26U, 29U, 30U, 31U}

First quarter Sine waveform samples

#define XMC_DAC_PATTERN_TRIANGLE {0U, 4U, 8U, 12U, 16U, 19U, 23U, 27U, 31U}

First quarter Triangle waveform samples

#define XMC_DAC_SAMPLES_PER_PERIOD (32U)

DAC samples per period in pattern mode

Enumeration Type Documentation

enum XMC_DAC_CH_DATA_TYPE_t

Data type of the input data

Enumerator
XMC_DAC_CH_DATA_TYPE_UNSIGNED | input data is unsigned
XMC_DAC_CH_DATA_TYPE_SIGNED | input data is signed
enum XMC_DAC_CH_MODE_t

Operating modes of DAC

Enumerator
XMC_DAC_CH_MODE_IDLE | DAC is disabled
XMC_DAC_CH_MODE_SINGLE | Single value mode - single data value is updated and maintained
XMC_DAC_CH_MODE_DATA | Data mode - continuous data processing
XMC_DAC_CH_MODE_PATTERN | Pattern mode - inbuilt pattern waveform generation - Sine, Triangle, Rectangle
XMC_DAC_CH_MODE_NOISE | Noise mode - pseudo-random noise generation
XMC_DAC_CH_MODE_RAMP | Ramp mode - ramp generation
enum XMC_DAC_CH_OUTPUT_NEGATION_t

Negation of input data (applicable only for XMC44 device)

Enumerator
XMC_DAC_CH_OUTPUT_NEGATION_DISABLED | XMC_DAC_CH_OUTPUT_NEGATION_DISABLED
XMC_DAC_CH_OUTPUT_NEGATION_ENABLED | XMC_DAC_CH_OUTPUT_NEGATION_ENABLED
enum XMC_DAC_CH_OUTPUT_SCALE_t

Scaling of the input data

Enumerator
XMC_DAC_CH_OUTPUT_SCALE_NONE | No scaling
XMC_DAC_CH_OUTPUT_SCALE_MUL_2 | multiplied by 2
XMC_DAC_CH_OUTPUT_SCALE_MUL_4 | multiplied by 4
XMC_DAC_CH_OUTPUT_SCALE_MUL_8 | multiplied by 8
XMC_DAC_CH_OUTPUT_SCALE_MUL_16 | multiplied by 16
XMC_DAC_CH_OUTPUT_SCALE_MUL_32 | multiplied by 32
XMC_DAC_CH_OUTPUT_SCALE_MUL_64 | multiplied by 64
XMC_DAC_CH_OUTPUT_SCALE_MUL_128 | multiplied by 128
XMC_DAC_CH_OUTPUT_SCALE_DIV_2 | divided by 2
XMC_DAC_CH_OUTPUT_SCALE_DIV_4 | divided by 4
XMC_DAC_CH_OUTPUT_SCALE_DIV_8 | divided by 8
XMC_DAC_CH_OUTPUT_SCALE_DIV_16 | divided by 16
XMC_DAC_CH_OUTPUT_SCALE_DIV_32 | divided by 32
XMC_DAC_CH_OUTPUT_SCALE_DIV_64 | divided by 64
XMC_DAC_CH_OUTPUT_SCALE_DIV_128 | divided by 128
enum XMC_DAC_CH_PATTERN_SIGN_OUTPUT_t

Output sign signal for the Pattern Generation Mode

Enumerator
XMC_DAC_CH_PATTERN_SIGN_OUTPUT_DISABLED | Sign output signal generation is disabled
XMC_DAC_CH_PATTERN_SIGN_OUTPUT_ENABLED | Sign output signal generation is enabled
enum XMC_DAC_CH_STATUS_t

Return types of the API's

Enumerator
XMC_DAC_CH_STATUS_OK | Status is ok, no error detected
XMC_DAC_CH_STATUS_ERROR | Error detected
XMC_DAC_CH_STATUS_BUSY | DAC is busy
XMC_DAC_CH_STATUS_ERROR_FREQ2LOW | Frequency can't be configured. Frequency is to low.
XMC_DAC_CH_STATUS_ERROR_FREQ2HIGH | Frequency can't be configured. Frequency is to high.
enum XMC_DAC_CH_TRIGGER_t

Trigger sources for the data update

Enumerator
XMC_DAC_CH_TRIGGER_INTERNAL | Internal trigger as per frequency divider value
XMC_DAC_CH_TRIGGER_EXTERNAL_CCU80_SR1 | External trigger from CCU80 Interrupt SR1
XMC_DAC_CH_TRIGGER_EXTERNAL_CCU40_SR1 | External trigger from CCU40 Interrupt SR1
XMC_DAC_CH_TRIGGER_EXTERNAL_CCU41_SR1 | External trigger from CCU41 Interrupt SR1
XMC_DAC_CH_TRIGGER_EXTERNAL_P2_9 | External trigger from pin 2.9
XMC_DAC_CH_TRIGGER_EXTERNAL_P2_8 | External trigger from pin 2.8
XMC_DAC_CH_TRIGGER_EXTERNAL_U0C0_DX1INS | External trigger from USIC-0 DX1 Input Signal
XMC_DAC_CH_TRIGGER_EXTERNAL_U1C0_DX1INS | External trigger from USIC-1 DX1 Input Signal
XMC_DAC_CH_TRIGGER_SOFTWARE | Software trigger

Function Documentation

void XMC_DAC_CH_DisableEvent | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
None
Description:
Disables service request by clearing SREN bit of DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1).
Related APIs:
XMC_DAC_CH_EnableEvent()

void XMC_DAC_CH_DisableOutput | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
None
Description:
Channel channel output is disabled by clearing the ANAEN bit of DAC0CFG1 register (for channel 0) / DAC1CFG1 register (for channel 1).
A call to this API stops driving the converted digital input to its output.
Related APIs:
XMC_DAC_CH_EnableOutput(), XMC_DAC_CH_IsOutputEnabled()

void XMC_DAC_CH_DisableOutputNegation | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Description:
Disables output negation.
Negation is disabled by clearing NEGATE bit of DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1).
Note:
Negation feature is not applicable for XMC45 devices. Calling this API in XMC45 devices doesn't have any effect.
Related APIs:
XMC_DAC_CH_EnableOutputNegation()

void XMC_DAC_CH_DisablePatternSignOutput | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
None
Description:
Disables output sign information for Pattern Mode.
Sign output is disabled by clearing SIGNEN bit of DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1).
Note:
Call this API if the channel is set to Pattern mode.
Related APIs:
XMC_DAC_CH_StartPatternMode(), XMC_DAC_CH_EnablePatternSignOutput()

void XMC_DAC_CH_EnableEvent | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
None
Description:
Enables service request by setting SREN bit of DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1). Trigger signal is generated upon conversion of each data.
Note:
The service request signal can be connected to NVIC, DMA.
Related APIs:
XMC_DAC_CH_DisableEvent()

void XMC_DAC_CH_EnableOutput | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
None
Description:
Channel channel output is enabled by setting the ANAEN bit of DAC0CFG1 register (for channel 0) / DAC1CFG1 register (for channel 1).
Note:
tSTARTUP time for DAC analog output starts after the ANAEN bit is set to one. After the expiry of the startup time the default value is driven to DAC output and a new value can be written.
Related APIs:
XMC_DAC_CH_DisableOutput(), XMC_DAC_CH_IsOutputEnabled()

void XMC_DAC_CH_EnableOutputNegation | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Description:
Enables output negation.
By negating the DAC value is converted to its two's complement values. Can be used in Ramp mode to generate negative ramp. Negation in enabled by setting NEGATE bit of DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1).
Note:
Negation feature is not applicable for XMC45 devices. Calling this API in XMC45 devices doesn't have any effect.
Related APIs:
XMC_DAC_CH_DisableOutputNegation(), XMC_DAC_CH_StartRampMode()

void XMC_DAC_CH_EnablePatternSignOutput | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
None
Description:
Enables the output sign information for Pattern Mode.
Sign output is enabled by setting SIGNEN bit of DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1).
Note:
Call this API if the channel is set to Pattern mode.
Related APIs:
XMC_DAC_CH_StartPatternMode(), XMC_DAC_CH_DisablePatternSignOutput()

XMC_DAC_CH_OUTPUT_SCALE_t XMC_DAC_CH_GetOutputScale | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
XMC_DAC_CH_OUTPUT_SCALE_t
Description:
Returns scaling information for the data. The input data could be either up-scaled (multiplied), down-scaled (divided) or without scaling (as is).
Scaling factor is determined by reading bit-fields MULDIV and SCALE of DAC0CFG1 register (for channel 0) / DAC1CFG1 register (for channel 1).
Related APIs:
XMC_DAC_CH_SetOutputScale()

uint16_t XMC_DAC_CH_GetRampStart | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
uint16_t
Description:
Gets the ramp start value by reading DATA0 bit-field of DAC0DATA register (for channel 0) / DATA1 bit-field of DAC1DATA register (for channel 1). If the ramp counter reaches its stop value, it restarts from the start value with the next trigger pulse.
Note:
Call this API if the channel is set to Ramp mode.
Related APIs:
XMC_DAC_CH_SetRampStart(), XMC_DAC_CH_StartRampMode(), XMC_DAC_CH_GetRampStop(), XMC_DAC_CH_SetRampStop()

uint16_t XMC_DAC_CH_GetRampStop | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
uint16_t
Description:
Gets the ramp stop value by reading DATA0 bit-field of DAC01DATA register (for channel 0) / DATA1 bit-field of DAC01DATA register (for channel 1). If the ramp counter reaches its stop value, it restarts from the start value with the next trigger pulse.
Note:
Call this API if the channel is set to Ramp mode.
Related APIs:
XMC_DAC_CH_SetRampStop(), XMC_DAC_CH_StartRampMode(), XMC_DAC_CH_GetRampStart()

void XMC_DAC_CH_Init | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const XMC_DAC_CH_CONFIG_t *const | config
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
config | Pointer to the DAC channel configuration structure
Returns
None
Description:
Initialises and configures the DAC channel with the configuration date pointed by config.
DAC channel is initialised by configuring the registers DAC0CFG0 and DAC0CFG1 registers (for channel 0) / DAC1CFG0 and DAC1CFG1 registers (for channel 1). It enables the channel output by calling XMC_DAC_CH_EnableOutput().
bool XMC_DAC_CH_IsFifoEmpty | ( | const XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
bool
true - if FIFO is empty
false - if FIFO is not empty
Description:
Returns FIFO status.
FIFIO empty status is determined by reading FIFOEMP bit of DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1).
Related APIs:
XMC_DAC_CH_IsFifoFull()

bool XMC_DAC_CH_IsFifoFull | ( | const XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
bool
true - if FIFO is full
false - if FIFO is not full
Description:
Returns FIFO status.
FIFIO full status is determined by reading FIFOFUL bit of DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1).
Related APIs:
XMC_DAC_CH_IsFifoEmpty()

bool XMC_DAC_CH_IsOutputEnabled | ( | const XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
bool
true - if analog output is enabled
false - if analog output is disabled
Description:
Returns the status of DAC analog output.
Channel channel output enabled or disabled is determined by reading the ANAEN bit of DAC0CFG1 register (for channel 0) / DAC1CFG1 register (for channel 1).
Related APIs:
XMC_DAC_CH_EnableOutput(), XMC_DAC_CH_DisableOutput()

XMC_DAC_CH_STATUS_t XMC_DAC_CH_SetFrequency | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const uint32_t | frequency
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
frequency | Waveform frequency in [Hz]
Returns
XMC_DAC_CH_STATUS_t
Description:
Sets the frequency of DAC channel.
The value frequency acts as clock divider. The smallest frequency divider value is 16. A valid frequency value should be within the range XMC_DAC_MIN_FREQ_DIVIDER to XMC_DAC_MAX_FREQ_DIVIDER. A value outside this range is considered as in valid and API returns error. Frequency frequency is configured by setting FREQ bit-field of DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1).
Note:
Call this API only for Single value mode, Data mode and Noise mode. Call XMC_DAC_CH_SetRampFrequency() in case of Ramp mode and XMC_DAC_CH_SetPatternFrequency() in case of Pattern mode.
Related APIs:
XMC_DAC_CH_SetRampFrequency(), XMC_DAC_CH_SetPatternFrequency()

void XMC_DAC_CH_SetMode | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const XMC_DAC_CH_MODE_t | mode
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
mode | DAC operation mode
Returns
None
Description:
Sets the operating mode for the channel by setting the MODE bit-field of DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1). Different modes of DAC operation are defined by enum XMC_DAC_CH_MODE_t.
void XMC_DAC_CH_SetOutputOffset | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const uint8_t | offset
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
offset
Returns
None
Description:
Sets the offset value.
Offset range:0 - 255
interpreted as : -128 to 127 (twos complement) in signed mode and 0 to 255 in unsigned mode.
Note:
Scaling can be applied to the output data after adding the offset value.
Channel channel offset value is loaded to the bit-field DAC0CFG1 register (for channel 0) / DAC1CFG1 register (for channel 1).
Related APIs:
XMC_DAC_CH_SetOutputScale()

void XMC_DAC_CH_SetOutputScale | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const XMC_DAC_CH_OUTPUT_SCALE_t | scale
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
scale | Input data scaling
Returns
None
Description:
Data of the channel is scaled.
The data can either be scaled up-scaled (multiplied), down-scaled (divided) or no scaling (as is) based on the value of scale. Scaling is configured by setting bit-fields MULDIV and SCALE of DAC0CFG1 register (for channel 0) / DAC1CFG1 register (for channel 1).
Related APIs:
XMC_DAC_CH_GetOutputScale()

void XMC_DAC_CH_SetPattern | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const uint8_t *const | pattern
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
pattern | Pointer to the data table
Returns
None
Description:
The data for the Pattern mode is written to the DAC0PATL and DAC0PATH registers. The API is called by XMC_DAC_CH_StartPatternMode().
Note:
Call this API if the channel is set to Pattern mode.
Related APIs:
XMC_DAC_CH_EnablePatternSignOutput(), XMC_DAC_CH_DisablePatternSignOutput()

XMC_DAC_CH_STATUS_t XMC_DAC_CH_SetPatternFrequency | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const uint32_t | frequency
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
frequency | in [Hz]
Returns
XMC_DAC_CH_STATUS_t
Description:
Sets the frequency of DAC channel by calling XMC_DAC_CH_SetFrequency().
For the Pattern mode, the frequency of operation depends on the total number of sample points XMC_DAC_SAMPLES_PER_PERIOD. Frequency frequency is multiplied by the total number of sample points, so that each trigger instance converts all the sample points of the pattern.
Note:
Call this API only if the channel is set to Pattern mode.
Related APIs:
XMC_DAC_CH_StartPatternMode()

< DAC samples per period in pattern mode

XMC_DAC_CH_STATUS_t XMC_DAC_CH_SetRampFrequency | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const uint32_t | frequency
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
frequency | [Hz]
Returns
XMC_DAC_CH_STATUS_t
Description:
Sets the frequency of DAC channel by calling XMC_DAC_CH_SetFrequency().
For the Ramp mode, the frequency of operation depends on the total number of sample points (stop - start). Frequency frequency is multiplied by the total number of sample points, so that each trigger instance converts all the sample points of ramp.
Note:
Call this API only if the channel is set to Ramp mode.
Related APIs:
XMC_DAC_CH_StartRampMode()

void XMC_DAC_CH_SetRampStart | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const uint16_t | start
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
start | Ramp start point [0-4095]
Returns
None
Description:
Sets the ramp start value by writing to the register DAC0DATA (for channel 0) or DAC1DATA (for channel 1). If the ramp counter reaches its stop value, it restarts from the start value with the next trigger pulse. Ensure start value is lower than the stop value.
Note:
Call this API if the channel is set to Ramp mode. Start value is a 12 bit data.
Related APIs:
XMC_DAC_CH_GetRampStart(), XMC_DAC_CH_GetRampStop(), XMC_DAC_CH_SetRampStop()

void XMC_DAC_CH_SetRampStop | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const uint16_t | stop
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
stop | Ramp stop point [0-4095]
Returns
None
Description:
Sets the ramp stop value by writing to the bit-field DATA0 (for channel 0) or DATA1 (for channel 1) of DAC01DATA register. If the ramp counter reaches its stop value, it restarts from the start value with the next trigger pulse. Ensure stop value is higher than the start value.
Note:
Call this API if the channel is set to Ramp mode. Stop value is a 12 bit data.
Related APIs:
XMC_DAC_CH_GetRampStop(), XMC_DAC_CH_SetRampStart()

void XMC_DAC_CH_SetSignedDataType | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
None
Description:
Sets the channel's data to signed type by setting SIGN bit of DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1). The data for the conversion would then be treated as signed data type.
Note:
Offset and scaling can be applied to the data by calling XMC_DAC_CH_SetOutputOffset(), XMC_DAC_CH_SetOutputScale().
Related APIs:
XMC_DAC_CH_SetUnsignedDataType()

void XMC_DAC_CH_SetTrigger | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const XMC_DAC_CH_TRIGGER_t | trigger
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
trigger | Trigger source
Returns
None
Description:
Selects the trigger source for the channel by configuring the bits TRIGSEL & TRIGMOD of CFG register.
Channel channel trigger source is selected by TRIGSEL bit-field of DAC0CFG1 register (for channel 0) / DAC1CFG1 register(for channel 1).
void XMC_DAC_CH_SetUnsignedDataType | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
None
Description:
Sets the channel's data to unsigned type by clearing SIGN bit of DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1). The data for the conversion would then be treated as unsigned data type.
Note:
Offset and scaling can be applied to the data by calling XMC_DAC_CH_SetOutputOffset(), XMC_DAC_CH_SetOutputScale().
Related APIs:
XMC_DAC_CH_SetSignedDataType()

void XMC_DAC_CH_SoftwareTrigger | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
None
Description:
A call to this API generates a trigger pulse by setting SWTRIG bit of DAC0CFG1 register (for channel 0) / DAC1CFG1 register (for channel 1), provided the TRIGMOD bit of CFG register is set to XMC_DAC_CH_TRIGGER_SOFTWARE.
Note:
If the channel is set to simultaneous data mode, SWTRIG bit of channel 1 is not valid. Only SWTRIG bit of channel 0 is used for channel 1.
Related APIs:
XMC_DAC_CH_SetTrigger(), XMC_DAC_CH_EnableEvent()

XMC_DAC_CH_STATUS_t XMC_DAC_CH_StartDataMode | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const XMC_DAC_CH_TRIGGER_t | trigger,
 |  | const uint32_t | frequency
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
trigger | Data points update trigger
frequency | Waveform frequency [Hz]
Returns
XMC_DAC_CH_STATUS_t status
Description:
Sets the channel to Data mode. Trigger and frequency are configured.
Note:
Call XMC_DAC_CH_Write() API to write the data. Call XMC_DAC_EnableSimultaneousDataMode() to switch to Simultaneous data mode.
Related APIs:
XMC_DAC_CH_Init(), XMC_DAC_CH_Write(), XMC_DAC_EnableSimultaneousDataMode()

XMC_DAC_CH_STATUS_t XMC_DAC_CH_StartNoiseMode | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const XMC_DAC_CH_TRIGGER_t | trigger,
 |  | const uint32_t | frequency
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
trigger | Data points update trigger
frequency | Waveform frequency in [Hz]
Returns
XMC_DAC_CH_STATUS_t status
Description:
Sets the channel to Noise mode. Trigger and frequency are configured. On a trigger the DAC starts converting and drives to channel output.
Related APIs:
XMC_DAC_CH_Init()

XMC_DAC_CH_STATUS_t XMC_DAC_CH_StartPatternMode | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const uint8_t *const | pattern,
 |  | const XMC_DAC_CH_PATTERN_SIGN_OUTPUT_t | sign_output,
 |  | const XMC_DAC_CH_TRIGGER_t | trigger,
 |  | const uint32_t | frequency
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
pattern | Data table of a pattern
sign_output | Sign information of the waveform
trigger | Data points update trigger
frequency | Waveform frequency in [Hz]
Returns
XMC_DAC_CH_STATUS_t status
Description:
Sets the channel to Pattern mode. Trigger, frequency, sign output and data are configured. On a trigger, the pattern values are converted and driven to channel output.
Related APIs:
XMC_DAC_CH_Init(), XMC_DAC_CH_DisablePatternSignOutput()

XMC_DAC_CH_STATUS_t XMC_DAC_CH_StartRampMode | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const uint16_t | start,
 |  | const uint16_t | stop,
 |  | const XMC_DAC_CH_TRIGGER_t | trigger,
 |  | const uint32_t | frequency
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
start | Start point of the ramp [0-4095]
stop | Stop point of the ramp [0-4095]
trigger | Data points update trigger
frequency | Ramp frequency in [Hz]
Returns
XMC_DAC_CH_STATUS_t status
Description:
Sets the channel to Ramp mode. Trigger, frequency, start and stop values are configured. On a trigger ramp values are converted and driven to channel output. Start and stop have the range of [0-4095]. Stop should be equal or greater than start.
Note:
If the ramp counter reaches its stop value, it restarts from the start value with the next trigger pulse.
Related APIs:
XMC_DAC_CH_Init(), XMC_DAC_CH_GetRampStart(), XMC_DAC_CH_GetRampStop()

XMC_DAC_CH_STATUS_t XMC_DAC_CH_StartSingleValueMode | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
Returns
None
Description:
Sets the channel to Single Value Mode by calling XMC_DAC_CH_SetMode().
Note:
Call XMC_DAC_CH_Write() API to write the data.
Related APIs:
XMC_DAC_CH_Write()

void XMC_DAC_CH_Write | ( | XMC_DAC_t *const | dac,
 |  | const uint8_t | channel,
 |  | const uint16_t | data
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
channel | DAC channel number
data | Data to be written [0-4095]
Returns
None
Description:
Writes the data to the channel's DATA register.
The data is then converted and driven to the output. If the trigger is set, On a trigger event the data in DATA register is converted and driven to channel output. Data data is written to the channel by loading data to DATA0 bit-field of DAC0DATA (for channel 0) / DATA1 bit-field of DAC1DATA register (for channel 1). data has the range of [0-4095].
Note:
The API can be used for Single Value Mode, Data Mode (Individual) & Ramp Mode. Call XMC_DAC_CH_EnableOutput() API to enable analog output.
Related APIs:
XMC_DAC_CH_StartSingleValueMode(), XMC_DAC_CH_StartDataMode(), XMC_DAC_CH_StartRampMode()

void XMC_DAC_Disable ( XMC_DAC_t *const dac )
Parameters
dac Pointer to an instance of DAC module
Returns
None
Description:
Disables DAC clock and resets DAC.
DAC clock is disabled by setting DAC bit of CGATSET1 register. DAC is reset by setting DACRS bit of PRSET1 register.
Related APIs:
XMC_DAC_IsEnabled(), XMC_DAC_Enable()

void XMC_DAC_DisableSimultaneousDataMode ( XMC_DAC_t *const dac )
Parameters
dac Pointer to an instance of DAC module
Returns
None
Description:
DAC switches to independent data mode from simultaneous Data mode.
Independent data mode is the default data mode. Simultaneous data mode is disabled by clearing DATMOD bit of DAC0CFG1 register.
Related APIs:
XMC_DAC_CH_StartDataMode(), XMC_DAC_EnableSimultaneousDataMode()

void XMC_DAC_Enable ( XMC_DAC_t *const dac )
Parameters
dac Pointer to an instance of DAC module
Returns
None
Description:
Enables DAC clock and releases DAC reset.
Enabling DAC is the first step of DAC initialisation. This API is called by XMC_DAC_CH_Init(). DAC clock is enabled by setting DAC bit of CGATCLR1 register. DAC reset is released by setting DACRS bit of PRCLR1 register.
Related APIs:
XMC_DAC_IsEnabled(), XMC_DAC_Disable(), XMC_DAC_CH_Init()

void XMC_DAC_EnableSimultaneousDataMode ( XMC_DAC_t *const dac )
Parameters
dac Pointer to an instance of DAC module
Returns
None
Description:
DAC switches to Simultaneous data mode from Independent data mode.
Independent data mode is the default data mode. Simultaneous data mode is enabled by setting DATMOD bit of DAC0CFG1 register.
Note:
Set channel 0 and channel 1 to Data mode before calling this API.
Related APIs:
XMC_DAC_CH_StartSingleValueMode(), XMC_DAC_CH_StartDataMode(), XMC_DAC_SimultaneousWrite(), XMC_DAC_DisableSimultaneousDataMode()

bool XMC_DAC_IsEnabled ( const XMC_DAC_t *const dac )
Parameters
dac Pointer to an instance of DAC module
Returns
bool
true - if DAC is enabled
false - if DAC is disabled
Description:
Returns the state of the DAC.
DAC enabled status is determined by referring to DACRS bit of PRSTAT1 register.
Related APIs:
XMC_DAC_Enable(), XMC_DAC_Disable()

void XMC_DAC_SimultaneousWrite | ( | XMC_DAC_t *const | dac,
 |  | const uint16_t | data0,
 |  | const uint16_t | data1
 | ) |  |
Parameters
dac | Pointer to an instance of DAC module
data0 | Data for DAC channel 0 [0-4095]
data1 | Data for DAC channel 1 [0-4095]
Returns
None
Description:
The data (data0 & data1) to be converted by channel 0 & channel 1 are updated to DATA1 bit-fields of DAC01DATA register. data0 and data1 have the range of [0-4095].
Note:
Channel 0 and Channel 1 should be set to simultaneous data mode before calling this API.
Related APIs:
XMC_DAC_EnableSimultaneousDataMode()

Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_DAC_CH_CONFIG_t Struct Reference

XMC_DAC_CH_CONFIG_t Struct Reference
XMC Peripheral Library » DAC

#include <xmc_dac.h>

Detailed Description

Channel related configuration

Field Documentation

uint32_t __pad0__

Not used bits

uint32_t __pad1__

Not used bits

uint32_t data_type

input data type - unsigned / signed

uint32_t output_negation

Negation of the output waveform enabled/disabled

uint32_t output_offset

offset value

uint32_t output_scale

Scale value of type XMC_DAC_CH_OUTPUT_SCALE_t. It includes scaling + mul/div bit

The documentation for this struct was generated from the following file:
  • xmc_dac.h


XMC Peripheral Library for XMC4000 Family: XMC_DAC_t Struct Reference

XMC_DAC_t Struct Reference
XMC Peripheral Library » DAC

#include <xmc_dac.h>

Detailed Description

DAC peripheral registers configuration.

The documentation for this struct was generated from the following file:
  • xmc_dac.h


XMC Peripheral Library for XMC4000 Family: DMA

Data Structures | Macros | Typedefs | Enumerations | Functions
DMA
XMC Peripheral Library

Data Structures

struct | GPDMA_CH_t
struct | XMC_DMA_CH_CONFIG_t
struct | XMC_DMA_LLI_t
struct | XMC_DMA_t

Macros

#define | XMC_DMA0 ((XMC_DMA_t *)GPDMA0_CH0_BASE)
#define | XMC_DMA1 ((XMC_DMA_t *)GPDMA1_CH0_BASE)

Typedefs

typedef void(* | XMC_DMA_CH_EVENT_HANDLER_t) (XMC_DMA_CH_EVENT_t event)
typedef XMC_DMA_LLI_t ** | XMC_DMA_LIST_t

Enumerations

Functions

void | XMC_DMA_CH_ClearDestinationPeripheralRequest (XMC_DMA_t *const dma, uint8_t channel)
void | XMC_DMA_CH_ClearEventStatus (XMC_DMA_t *const dma, const uint8_t channel, const uint32_t event)
void | XMC_DMA_CH_ClearSourcePeripheralRequest (XMC_DMA_t *const dma, uint8_t channel)
void | XMC_DMA_CH_Disable (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_DisableDestinationAddressReload (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_DisableDestinationScatter (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_DisableEvent (XMC_DMA_t *const dma, const uint8_t channel, const uint32_t event)
void | XMC_DMA_CH_DisableSourceAddressReload (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_DisableSourceGather (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_Enable (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_EnableDestinationAddressReload (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_EnableDestinationScatter (XMC_DMA_t *const dma, const uint8_t channel, uint32_t interval, uint16_t count)
void | XMC_DMA_CH_EnableEvent (XMC_DMA_t *const dma, const uint8_t channel, const uint32_t event)
void | XMC_DMA_CH_EnableSourceAddressReload (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_EnableSourceGather (XMC_DMA_t *const dma, const uint8_t channel, uint32_t interval, uint16_t count)
uint32_t | XMC_DMA_CH_GetEventStatus (XMC_DMA_t *const dma, const uint8_t channel)
XMC_DMA_CH_STATUS_t | XMC_DMA_CH_Init (XMC_DMA_t *const dma, const uint8_t channel, const XMC_DMA_CH_CONFIG_t *const config)
bool | XMC_DMA_CH_IsEnabled (XMC_DMA_t *const dma, const uint8_t channel)
bool | XMC_DMA_CH_IsSuspended (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_RequestLastMultiblockTransfer (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_Resume (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_SetBlockSize (XMC_DMA_t *const dma, const uint8_t channel, uint32_t block_size)
void | XMC_DMA_CH_SetDestinationAddress (XMC_DMA_t *const dma, const uint8_t channel, uint32_t addr)
void | XMC_DMA_CH_SetEventHandler (XMC_DMA_t *const dma, const uint8_t channel, XMC_DMA_CH_EVENT_HANDLER_t event_handler)
void | XMC_DMA_CH_SetLinkedListPointer (XMC_DMA_t *const dma, const uint8_t channel, XMC_DMA_LLI_t *ll_ptr)
void | XMC_DMA_CH_SetSourceAddress (XMC_DMA_t *const dma, const uint8_t channel, uint32_t addr)
void | XMC_DMA_CH_Suspend (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_TriggerDestinationRequest (XMC_DMA_t *const dma, const uint8_t channel, const XMC_DMA_CH_TRANSACTION_TYPE_t type, bool last)
void | XMC_DMA_CH_TriggerSourceRequest (XMC_DMA_t *const dma, const uint8_t channel, const XMC_DMA_CH_TRANSACTION_TYPE_t type, bool last)
void | XMC_DMA_ClearOverrunStatus (XMC_DMA_t *const dma, const uint8_t line)
void | XMC_DMA_ClearRequestLine (XMC_DMA_t *const dma, uint8_t line)
void | XMC_DMA_Disable (XMC_DMA_t *const dma)
void | XMC_DMA_DisableRequestLine (XMC_DMA_t *const dma, uint8_t line)
void | XMC_DMA_Enable (XMC_DMA_t *const dma)
void | XMC_DMA_EnableRequestLine (XMC_DMA_t *const dma, uint8_t line, uint8_t peripheral)
uint32_t | XMC_DMA_GetChannelsBlockCompleteStatus (XMC_DMA_t *const dma)
uint32_t | XMC_DMA_GetChannelsDestinationTransactionCompleteStatus (XMC_DMA_t *const dma)
uint32_t | XMC_DMA_GetChannelsErrorStatus (XMC_DMA_t *const dma)
uint32_t | XMC_DMA_GetChannelsSourceTransactionCompleteStatus (XMC_DMA_t *const dma)
uint32_t | XMC_DMA_GetChannelsTransferCompleteStatus (XMC_DMA_t *const dma)
uint32_t | XMC_DMA_GetEventStatus (XMC_DMA_t *const dma)
bool | XMC_DMA_GetOverrunStatus (XMC_DMA_t *const dma, const uint8_t line)
void | XMC_DMA_Init (XMC_DMA_t *const dma)
void | XMC_DMA_IRQHandler (XMC_DMA_t *const dma)
bool | XMC_DMA_IsEnabled (const XMC_DMA_t *const dma)

Detailed Description

The GPDMA is a highly configurable DMA controller that allows high-speed data transfers between peripherals and memories. Complex data transfers can be done with minimal intervention of the processor, making CPU available for other operations.

GPDMA provides extensive support for XMC microcontroller peripherals like A/D, D/A converters and timers. Data transfers through communication interfaces (USIC) using the GPDMA increase efficiency and parallelism for real-time applications.

The DMA low level driver provides functions to configure and initialize the GPDMA hardware peripheral.

Macro Definition Documentation

#define XMC_DMA0 ((XMC_DMA_t *)GPDMA0_CH0_BASE)

DMA module 0

#define XMC_DMA1 ((XMC_DMA_t *)GPDMA1_CH0_BASE)

DMA module 1, only available in XMC45xx series

Typedef Documentation

typedef void(* XMC_DMA_CH_EVENT_HANDLER_t) (XMC_DMA_CH_EVENT_t event)

DMA channel event handler

typedef XMC_DMA_LLI_t** XMC_DMA_LIST_t

Type definition for a linked list pointer

Enumeration Type Documentation

enum XMC_DMA_CH_ADDRESS_COUNT_MODE_t

DMA address count mode

Enumerator
XMC_DMA_CH_ADDRESS_COUNT_MODE_INCREMENT | Address count mode: increment
XMC_DMA_CH_ADDRESS_COUNT_MODE_DECREMENT | Address count mode: decrement
XMC_DMA_CH_ADDRESS_COUNT_MODE_NO_CHANGE | Address count mode: no change
enum XMC_DMA_CH_BURST_LENGTH_t

Valid burst length values

Enumerator
XMC_DMA_CH_BURST_LENGTH_1 | Burst length: 1 word
XMC_DMA_CH_BURST_LENGTH_4 | Burst length: 4 words
XMC_DMA_CH_BURST_LENGTH_8 | Burst length: 8 words
enum XMC_DMA_CH_DST_HANDSHAKING_t

Destination handshake interface

Enumerator
XMC_DMA_CH_DST_HANDSHAKING_HARDWARE | Destination: hardware handshake
XMC_DMA_CH_DST_HANDSHAKING_SOFTWARE | Destination: software handshake
enum XMC_DMA_CH_EVENT_t

DMA events

Enumerator
XMC_DMA_CH_EVENT_TRANSFER_COMPLETE | Transfer complete event
XMC_DMA_CH_EVENT_BLOCK_TRANSFER_COMPLETE | Block transfer complete event
XMC_DMA_CH_EVENT_SRC_TRANSACTION_COMPLETE | Source transaction complete event
XMC_DMA_CH_EVENT_DST_TRANSACTION_COMPLETE | Destination transaction complete event
XMC_DMA_CH_EVENT_ERROR | DMA error event
enum XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_t

DMA hardware handshaking interface Hardware handshaking available only if DMA is flow controller

Enumerator
XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_0 | Hardware handshaking interface 0
XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_1 | Hardware handshaking interface 1
XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_2 | Hardware handshaking interface 2
XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_3 | Hardware handshaking interface 3
XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_4 | Hardware handshaking interface 4
XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_5 | Hardware handshaking interface 5
XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_6 | Hardware handshaking interface 6
XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_7 | Hardware handshaking interface 7
enum XMC_DMA_CH_PRIORITY_t

DMA channel priorities

Enumerator
XMC_DMA_CH_PRIORITY_0 | DMA channel priority 0 (low)
XMC_DMA_CH_PRIORITY_1 | DMA channel priority 1
XMC_DMA_CH_PRIORITY_2 | DMA channel priority 2
XMC_DMA_CH_PRIORITY_3 | DMA channel priority 3
XMC_DMA_CH_PRIORITY_4 | DMA channel priority 4
XMC_DMA_CH_PRIORITY_5 | DMA channel priority 5
XMC_DMA_CH_PRIORITY_6 | DMA channel priority 6
XMC_DMA_CH_PRIORITY_7 | DMA channel priority 7 (high)
enum XMC_DMA_CH_SRC_HANDSHAKING_t

Source handshake interface

Enumerator
XMC_DMA_CH_SRC_HANDSHAKING_HARDWARE | Source: hardware handshake
XMC_DMA_CH_SRC_HANDSHAKING_SOFTWARE | Source: software handshake
enum XMC_DMA_CH_STATUS_t

DMA channel status values

Enumerator
XMC_DMA_CH_STATUS_OK | DMA status OK
XMC_DMA_CH_STATUS_ERROR | DMA status error
XMC_DMA_CH_STATUS_BUSY | DMA is busy
enum XMC_DMA_CH_TRANSACTION_TYPE_t

Transaction types

Enumerator
XMC_DMA_CH_TRANSACTION_TYPE_SINGLE | Single DMA transaction
XMC_DMA_CH_TRANSACTION_TYPE_BURST | Burst transaction
enum XMC_DMA_CH_TRANSFER_FLOW_t

DMA transfer flow modes

Enumerator
XMC_DMA_CH_TRANSFER_FLOW_M2M_DMA | Memory to memory (DMA flow controller)
XMC_DMA_CH_TRANSFER_FLOW_M2P_DMA | Memory to peripheral (DMA flow controller)
XMC_DMA_CH_TRANSFER_FLOW_P2M_DMA | Peripheral to memory (DMA flow controller)
XMC_DMA_CH_TRANSFER_FLOW_P2P_DMA | Peripheral to peripheral (DMA flow controller)
XMC_DMA_CH_TRANSFER_FLOW_P2M_PER | Peripheral to memory (Peripheral flow controller)
XMC_DMA_CH_TRANSFER_FLOW_P2P_SRCPER | Peripheral to peripheral (Source peripheral flow controller)
XMC_DMA_CH_TRANSFER_FLOW_M2P_PER | Memory to peripheral (Peripheral flow controller)
XMC_DMA_CH_TRANSFER_FLOW_P2P_DSTPER | Peripheral to peripheral (Destination peripheral flow controller)
enum XMC_DMA_CH_TRANSFER_TYPE_t

DMA transfer types

Enumerator
XMC_DMA_CH_TRANSFER_TYPE_SINGLE_BLOCK | Single block
XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_CONTIGUOUS_DSTADR_RELOAD | Multi-block: src address contiguous, dst address reload
XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_RELOAD_DSTADR_CONTIGUOUS | Multi-block: src address reload, dst address contiguous
XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_RELOAD_DSTADR_RELOAD | Multi-block: src address reload, dst address reload
XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_CONTIGUOUS_DSTADR_LINKED | Multi-block: src address contiguous, dst address linked
XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_RELOAD_DSTADR_LINKED | Multi-block: src address reload, dst address linked
XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_LINKED_DSTADR_CONTIGUOUS | Multi-block: src address linked, dst address contiguous
XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_LINKED_DSTADR_RELOAD | Multi-block: src address linked, dst address reload
XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_LINKED_DSTADR_LINKED | Multi-block: src address linked, dst address linked
enum XMC_DMA_CH_TRANSFER_WIDTH_t

Valid transfer width values

Enumerator
XMC_DMA_CH_TRANSFER_WIDTH_8 | 8-bit transfer width
XMC_DMA_CH_TRANSFER_WIDTH_16 | 16-bit transfer width
XMC_DMA_CH_TRANSFER_WIDTH_32 | 32-bit transfer width

Function Documentation

void XMC_DMA_CH_ClearDestinationPeripheralRequest | ( | XMC_DMA_t *const | dma,
 |  | uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The destination peripheral request for which DMA channel is to be cleared?
Returns
None
Description:
Clear destination peripheral request
The function is used to clear the destination peripheral request for a given DMA channel.
void XMC_DMA_CH_ClearEventStatus | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The channel for which the event(s) need(s) to be disabled
event | A valid GPDMA event (XMC_DMA_CH_EVENT_t) or a valid combination of logically OR'd GPDMA events
Returns
None
Description:
Clear GPDMA event status
The following events are supported by the GPDMA peripheral:
1) Transfer complete event
2) Block transfer complete event
3) Source transaction complete event
4) Destination transaction complete event
5) DMA error event
The function is used to clear the status of one (or more) of the aforementioned events. Typically, its use is in the GPDMA interrupt handler function. Once an event is detected, an appropriate callback function must run and the event status should be cleared.
void XMC_DMA_CH_ClearSourcePeripheralRequest | ( | XMC_DMA_t *const | dma,
 |  | uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The source peripheral request for which DMA channel is to be cleared?
Returns
None
Description:
Clear source peripheral request
The function is used to clear the source peripheral request for a given DMA channel.
void XMC_DMA_CH_Disable | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | Which DMA channel should be disabled?
Returns
None
Description:
Disable a GPDMA channel
The function resets the GPDMA's CHENREG register to disable a DMA channel.
void XMC_DMA_CH_DisableDestinationAddressReload | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The channel for which the destination address reload must be disabled
Returns
None
Description:
Disable destination address reload
The destination DMA address can be automatically reloaded from its initial value at the end of every block in a multi-block transfer. To disable this feature, use this function.
void XMC_DMA_CH_DisableDestinationScatter | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The source gather for which DMA channel is to be disabled?
Returns
None
Description:
Disable source gather
The function is used to disable the destination scatter feature in the GPDMA peripheral.
void XMC_DMA_CH_DisableEvent | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The channel for which the event(s) need(s) to be disabled
event | A valid GPDMA event (XMC_DMA_CH_EVENT_t) or a valid combination of logically OR'd GPDMA events
Returns
None
Description:
Disable GPDMA event(s)
The following events are supported by the GPDMA peripheral:
1) Transfer complete event
2) Block transfer complete event
3) Source transaction complete event
4) Destination transaction complete event
5) DMA error event
The function can be used to disable one (or more) of the aforementioned events.
void XMC_DMA_CH_DisableSourceAddressReload | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The channel for which the source address reload must be disabled
Returns
None
Description:
Disable source address reload
The source DMA address can be automatically reloaded from its initial value at the end of every block in a multi-block transfer. To disable this feature, use this function.
void XMC_DMA_CH_DisableSourceGather | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The source gather for which DMA channel is to be disabled?
Returns
None
Description:
Disable source gather
The function is used to disable the source gather feature in the GPDMA peripheral.
void XMC_DMA_CH_Enable | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | Which DMA channel should be enabled?
Returns
None
Description:
Enable a GPDMA channel
The function sets the GPDMA's CHENREG register to enable a DMA channel. Please ensure that the GPDMA module itself is enabled before calling this function. See XMC_DMA_Enable() for details.
void XMC_DMA_CH_EnableDestinationAddressReload | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The channel for which the destination address must be reloaded
Returns
None
Description:
Enable source address reload
The function is used to automatically reload the destination DMA address (from its initial value) at the end of every block in a multi-block transfer. The auto- reload will begin soon after the DMA channel initialization (configured for a multi-block transaction).
void XMC_DMA_CH_EnableDestinationScatter | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel,
 |  | uint32_t | interval,
 |  | uint16_t | count
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | Which DMA channel is used for destination scatter?
interval | Scatter interval
count | Scatter count
Returns
None
Description:
Enable destination scatter
The function is used to enable the destination scatter feature in the GPDMA peripheral. The user must also specify the scatter count and interval. Once the configuration is successful, calling XMC_DMA_CH_EnableEvent() will initiate destination gather. This function is normally used in conjunction with source gather. Please see XMC_DMA_CH_EnableSourceGather() for additional information.
void XMC_DMA_CH_EnableEvent | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The channel for which the event(s) need(s) to be enabled
event | A valid GPDMA event (XMC_DMA_CH_EVENT_t) or a valid combination of logically OR'd GPDMA events
Returns
None
Description:
Enable GPDMA event(s)
The following events are supported by the GPDMA peripheral:
1) Transfer complete event
2) Block transfer complete event
3) Source transaction complete event
4) Destination transaction complete event
5) DMA error event
The function can be used to enable one (or more) of the aforementioned events. Once the events have been enabled, XMC_DMA_CH_SetEventHandler() API can be used to set a callback function.
void XMC_DMA_CH_EnableSourceAddressReload | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The channel for which the source address must be reloaded
Returns
None
Description:
Enable source address reload
The function is used to automatically reload the source DMA address (from its initial value) at the end of every block in a multi-block transfer. The auto- reload will begin soon after the DMA channel initialization (configured for a multi-block transaction).
void XMC_DMA_CH_EnableSourceGather | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel,
 |  | uint32_t | interval,
 |  | uint16_t | count
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | Which DMA channel is used for source gather?
interval | Gather interval
count | Gather count
Returns
None
Description:
Enable source gather
The function is used to enable the source gather feature in the GPDMA peripheral. The user must also specify the gather count and interval. Once the configuration is successful, calling XMC_DMA_CH_EnableEvent() will initiate source gather. This function is normally used in conjunction with destination scatter. Please see XMC_DMA_CH_EnableDestinationScatter() for additional information.
uint32_t XMC_DMA_CH_GetEventStatus | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The channel for which the event(s) status must be obtained
Returns
Event status
Description:
Get GPDMA channel event status
The function is used obtain the status of one (or more) of the aforementioned events. The return value may then be masked with any one of the following enumerations to obtain the status of individual DMA events.
Transfer complete -> XMC_DMA_CH_EVENT_TRANSFER_COMPLETE
Block transfer complete -> XMC_DMA_CH_EVENT_BLOCK_TRANSFER_COMPLETE
Source transaction complete -> XMC_DMA_CH_EVENT_SRC_TRANSACTION_COMPLETE
Destination transaction complete -> XMC_DMA_CH_EVENT_DST_TRANSACTION_COMPLETE
DMA error event -> XMC_DMA_CH_EVENT_ERROR
Typically, its use is in the GPDMA interrupt handler function. Once an event is detected, an appropriate callback function must run and the event status should be cleared.
XMC_DMA_CH_STATUS_t XMC_DMA_CH_Init | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel,
 |  | const XMC_DMA_CH_CONFIG_t *const | config
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The GPDMA channel (number) which needs to be initialized
config | A constant pointer to XMC_DMA_CH_CONFIG_t, pointing to a const channel configuration
Returns
XMC_DMA_CH_STATUS_t Initialization status
Description:
Initialize a GPDMA channel with provided channel configuration
The function sets up the following channel configuration parameters for a GPDMA channel (specified by the parameter channel):
1) Source and destination addresses (and linked list address if requested)
2) Source and destination handshaking interface (hardware or software?)
3) Scatter/gather configuration
4) Source and destination peripheral request (DMA is the flow controller)
5) Transfer flow and type
The function returns one of the following values:
1) In case the DMA channel is not enabled: XMC_DMA_CH_STATUS_BUSY
2) If the GPDMA module itself is not enabled: XMC_DMA_CH_STATUS_ERROR
3) If the configuration was successful: XMC_DMA_CH_STATUS_OK
Once the initialization is successful, calling XMC_DMA_CH_Enable() will trigger a GPDMA transfer.
bool XMC_DMA_CH_IsEnabled | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | Which DMA channel should be disabled?
Returns
bool
Description:
Check if a GPDMA channel is enabled
The function reads the GPDMA's CHENREG register to check if a DMA channel is enabled or not. The function returns "true" is the requested channel is enabled, "false" otherwise.
bool XMC_DMA_CH_IsSuspended | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | Which DMA channel should be checked for a suspended transfer?
Returns
bool
Description:
Check if a GPDMA
The function reads the CH_SUSP bit of the GPDMA's GFGL register to check if a DMA transfer for the requested channel has been suspended. The function returns "true" if it detects a transfer suspension or "false" if it doesn't.
Related API:
XMC_DMA_CH_Suspend(), XMC_DMA_CH_Resume()
void XMC_DMA_CH_RequestLastMultiblockTransfer | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | Which DMA channel is participating in a multi-block transfer?
Returns
None
Description:
Trigger the end of a multi-block transfer
The function is used signal the end of multi-block DMA transfer. It clears the RELOAD_SRC and RELOAD_DST bits of the CFGL register to keep the source and destination addresses from getting updated. The function is typically used in an event handler to signal that the next block getting transferred is the last block in the transfer sequence.
void XMC_DMA_CH_Resume | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | Which DMA channel should resume transfer?
Returns
None
Description:
Resume a GPDMA channel
The function clears the CH_SUSP bit of the GPDMA's GFGL register to resume a DMA transfer. The function may be called after enabling the DMA channel. Please see XMC_DMA_CH_Enable() for more information.
Related API:
XMC_DMA_CH_Suspend()
void XMC_DMA_CH_SetBlockSize | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel,
 |  | uint32_t | block_size
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | A DMA channel
block_size | Transfer size [1-2048]
Returns
None
Description:
This function sets the block size of a transfer
The function may be called after enabling the DMA channel. Please see XMC_DMA_CH_Enable() for more information.
void XMC_DMA_CH_SetDestinationAddress | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel,
 |  | uint32_t | addr
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | A DMA channel
addr | destination address
Returns
None
Description:
This function sets the destination address of the specified channel
The function may be called after enabling the DMA channel. Please see XMC_DMA_CH_Enable() for more information.
Related API:
XMC_DMA_CH_SetSourceAddress()
void XMC_DMA_CH_SetEventHandler | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel,
 |  | XMC_DMA_CH_EVENT_HANDLER_t | event_handler
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | The channel for which the event handler is being registered
event_handler | The event handler which will be invoked when the DMA event occurs
Returns
None
Description:
Set a GPDMA event handler to service GPDMA events
The function is used to register user callback functions for servicing DMA events. Call this function after enabling the GPDMA events (See XMC_DMA_CH_EnableEvent())
void XMC_DMA_CH_SetLinkedListPointer | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel,
 |  | XMC_DMA_LLI_t * | ll_ptr
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | A DMA channel
ll_ptr | linked list pointer
Returns
None
Description:
This function sets the linked list pointer
The function may be called after enabling the DMA channel. Please see XMC_DMA_CH_Enable() for more information.
void XMC_DMA_CH_SetSourceAddress | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel,
 |  | uint32_t | addr
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | A DMA channel
addr | source address
Returns
None
Description:
This function sets the source address of the specified channel
The function may be called after enabling the DMA channel. Please see XMC_DMA_CH_Enable() for more information.
Related API:
XMC_DMA_CH_SetDestinationAddress()
void XMC_DMA_CH_Suspend | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | Which DMA channel should suspend transfer?
Returns
None
Description:
Suspend a GPDMA channel transfer
The function sets the CH_SUSP bit of the GPDMA's GFGL register to initiate a DMA transfer suspend. The function may be called after enabling the DMA channel. Please see XMC_DMA_CH_Enable() for more information.
Related API:
XMC_DMA_CH_Resume()
void XMC_DMA_CH_TriggerDestinationRequest | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel,
 |  | const XMC_DMA_CH_TRANSACTION_TYPE_t | type,
 |  | bool | last
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | Which DMA channel is being used?
type | Transaction type: Single/burst mode
last | Specify "true" if it is the last destination request trigger, "false" otherwise
Returns
None
Description:
Trigger destination request
The function can be used for GPDMA transfers involving a peripheral in software handshaking mode viz. Peripheral -> memory and peripheral -> peripheral.
One would typically use this function in a (source) peripheral's event callback function to trigger the destination request.
void XMC_DMA_CH_TriggerSourceRequest | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | channel,
 |  | const XMC_DMA_CH_TRANSACTION_TYPE_t | type,
 |  | bool | last
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
channel | Which DMA channel is being used?
type | Transaction type: Single/burst mode
last | Specify "true" if it is the last source request trigger, "false" otherwise
Returns
None
Description:
Trigger source request
The function can be used for GPDMA transfers involving a peripheral in software handshaking mode viz. Memory -> peripheral and peripheral -> peripheral.
One would typically use this function in a (destination) peripheral's event callback function to trigger the source request.
void XMC_DMA_ClearOverrunStatus | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | line
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
line | The line for which the overrun status must be cleared
Returns
None
Description:
Clear overrun status of a DLR line
The function clears the overrun status of a line by setting the corresponding line bit in the DLR's OVERCLR register.
void XMC_DMA_ClearRequestLine | ( | XMC_DMA_t *const | dma,
 |  | uint8_t | line
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
line | Which DLR (DMA line router) line should the function use?
Returns
None
Description:
Clear request line
The function clears a DLR (DMA line router) request line.
void XMC_DMA_Disable ( XMC_DMA_t *const dma )
Parameters
dma A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
Returns
None
Description:
Disable the GPDMA peripheral
The function asserts the GPDMA peripheral reset. In addition, it gates the GPDMA0 peripheral clock for all XMC4000 series of microcontrollers with an exception of the XMC4500 microcontroller. The XMC4500 doesn't support gating.
void XMC_DMA_DisableRequestLine | ( | XMC_DMA_t *const | dma,
 |  | uint8_t | line
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
line | Which DLR (DMA line router) line should the function use?
Returns
None
Description:
Disable request line
The function disables a DLR (DMA line router) line by clearing appropriate bits in the LNEN register.
void XMC_DMA_Enable ( XMC_DMA_t *const dma )
Parameters
dma A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
Returns
None
Description:
Enable the GPDMA peripheral
The function de-asserts the GPDMA peripheral reset. In addition, it un-gates the GPDMA0 peripheral clock for all XMC4000 series of microcontrollers with an exception of the XMC4500 microcontroller. The XMC4500 doesn't support gating.
void XMC_DMA_EnableRequestLine | ( | XMC_DMA_t *const | dma,
 |  | uint8_t | line,
 |  | uint8_t | peripheral
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
line | Which DLR (DMA line router) line should the function use?
peripheral | Which hardware peripheral is the GPDMA communicating with?
Returns
None
Description:
Enable request line
The function enables a DLR (DMA line router) line and selects a service request source, resulting in the trigger of a DMA transfer.
Note:
The DLR is used for a DMA transfer typically involving a peripheral; For example, the ADC peripheral may use the DLR in hardware handshaking mode to transfer ADC conversion values to a destination memory block.
uint32_t XMC_DMA_GetChannelsBlockCompleteStatus ( XMC_DMA_t *const dma )
Parameters
dma A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
Returns
uint32_t DMA block complete status
Description:
Get block transfer complete status
The function returns GPDMA block transfer complete interrupt status.
uint32_t XMC_DMA_GetChannelsDestinationTransactionCompleteStatus ( XMC_DMA_t *const dma )
Parameters
dma A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
Returns
uint32_t DMA event status
Description:
Get destination transaction complete status
The function returns the destination transaction complete interrupt status
Note:
If the destination peripheral is memory, the destination transaction complete interrupt is ignored.
uint32_t XMC_DMA_GetChannelsErrorStatus ( XMC_DMA_t *const dma )
Parameters
dma A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
Returns
uint32_t DMA error event status
Description:
Get DMA error event status
The function returns error interrupt status.
uint32_t XMC_DMA_GetChannelsSourceTransactionCompleteStatus ( XMC_DMA_t *const dma )
Parameters
dma A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
Returns
uint32_t DMA event status
Description:
Get source transaction complete status
The function returns the source transaction complete interrupt status.
Note:
If the source peripheral is memory, the source transaction complete interrupt is ignored.
uint32_t XMC_DMA_GetChannelsTransferCompleteStatus ( XMC_DMA_t *const dma )
Parameters
dma A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
Returns
uint32_t DMA transfer complete status
Description:
Get transfer complete status
The function returns GPDMA transfer complete interrupt status.
uint32_t XMC_DMA_GetEventStatus ( XMC_DMA_t *const dma )
Parameters
dma A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
Returns
uint32_t DMA event status
Description:
Get DMA event status
The function returns the collective (global) status of GPDMA events. The following lists the various DMA events and their corresponding enumeration. The return value of this function may then be masked with any one of the following enumerations to obtain the status of individual DMA events.
Transfer complete -> XMC_DMA_CH_EVENT_TRANSFER_COMPLETE
Block transfer complete -> XMC_DMA_CH_EVENT_BLOCK_TRANSFER_COMPLETE
Source transaction complete -> XMC_DMA_CH_EVENT_SRC_TRANSACTION_COMPLETE
Destination transaction complete -> XMC_DMA_CH_EVENT_DST_TRANSACTION_COMPLETE
DMA error event -> XMC_DMA_CH_EVENT_ERROR
bool XMC_DMA_GetOverrunStatus | ( | XMC_DMA_t *const | dma,
 |  | const uint8_t | line
 | ) |  |
Parameters
dma | A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
line | The line for which the overrun status is requested
Returns
bool "true" if overrun occured, "false" otherwise
Description:
Get overrun status of a DLR line
The DLR module's OVERSTAT register keeps track of DMA service request overruns. Should an overrun occur, the bit corresponding to the used DLR line is set. The function simply reads this status and returns "true" if an overrun is detected It returns "false" if an overrun isn't registered.
void XMC_DMA_Init ( XMC_DMA_t *const dma )
Parameters
dma A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
Returns
None
Description:
Initialize the GPDMA peripheral
The function initializes a prioritized list of DMA channels and enables the GPDMA peripheral.
void XMC_DMA_IRQHandler ( XMC_DMA_t *const dma )
Parameters
dma A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
Returns
None
Description:
Default GPDMA IRQ handler
The function implements a default GPDMA IRQ handler. It can be used within the following (device specific) routines:
1) GPDMA0_0_IRQHandler
2) GPDMA1_0_IRQHandler

The function handles the enabled GPDMA events and runs the user callback function registered by the user to service the event. To register a callback function, see XMC_DMA_CH_SetEventHandler()

bool XMC_DMA_IsEnabled ( const XMC_DMA_t *const dma )
Parameters
dma A constant pointer to XMC_DMA_t, pointing to the GPDMA base address
Returns
bool
Description:
Check if the GPDMA peripheral is enabled
For the XMC4500 microcontroller, the function checks if the GPDMA module is asserted and returns "false" if it is. In addition, it also checks if the clock is gated for the other XMC4000 series of microcontrollers. It returns "true" if the peripheral is enabled.
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: GPDMA_CH_t Struct Reference

GPDMA_CH_t Struct Reference
XMC Peripheral Library » DMA

#include <xmc_dma.h>

Detailed Description

DMA channel configuration structure

The structure represents a collection of all hardware registers used to configure the DMA channel. It is contained within the XMC_DMA_t structure. It's registers can be used to configure DMA transfer details like source address, destination address, block size, incrementation modes and the like.

The documentation for this struct was generated from the following file:
  • xmc_dma.h
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_DMA_CH_CONFIG_t Struct Reference

Data Fields
XMC_DMA_CH_CONFIG_t Struct Reference
XMC Peripheral Library » DMA

#include <xmc_dma.h>

Data Fields

uint16_t | block_size
uint32_t | dst_addr
XMC_DMA_CH_DST_HANDSHAKING_t dst_handshaking
uint8_t | dst_peripheral_request
XMC_DMA_LLI_t * linked_list_pointer
XMC_DMA_CH_PRIORITY_t priority
uint32_t | src_addr
XMC_DMA_CH_SRC_HANDSHAKING_t src_handshaking
uint8_t | src_peripheral_request
XMC_DMA_CH_TRANSFER_TYPE_t transfer_type
uint32_t | dst_address_count_mode: 2
uint32_t | dst_burst_length: 3
uint32_t | dst_scatter_count: 12
uint32_t | dst_scatter_interval: 20
uint32_t | dst_transfer_width: 3
uint32_t | enable_dst_scatter: 1
uint32_t | enable_interrupt: 1
uint32_t | enable_src_gather: 1
uint32_t | src_address_count_mode: 2
uint32_t | src_burst_length: 3
uint32_t | src_gather_count: 12
uint32_t | src_gather_interval: 20
uint32_t | src_transfer_width: 3
uint32_t | transfer_flow: 3

Detailed Description

DMA channel configuration structure

Field Documentation

uint16_t block_size

Block size for DMA controlled transfers [max. 4095]

uint32_t dst_addr

Destination address

uint32_t dst_address_count_mode

Destination address count mode

uint32_t dst_burst_length

Destination burst length

XMC_DMA_CH_DST_HANDSHAKING_t dst_handshaking

DMA destination handshaking interface

uint8_t dst_peripheral_request

Destination peripheral request

uint32_t dst_scatter_count

Destination scatter count

uint32_t dst_scatter_interval

Destination scatter interval

uint32_t dst_transfer_width

Destination transfer width

uint32_t enable_dst_scatter

Enable destination scatter?

uint32_t enable_interrupt

Enable interrupts?

uint32_t enable_src_gather

Enable source gather?

XMC_DMA_LLI_t* linked_list_pointer

Linked list pointer

XMC_DMA_CH_PRIORITY_t priority

DMA channel priority

uint32_t src_addr

Source address

uint32_t src_address_count_mode

Source address count mode

uint32_t src_burst_length

Source burst length

uint32_t src_gather_count

Source gather count

uint32_t src_gather_interval

Source gather interval

XMC_DMA_CH_SRC_HANDSHAKING_t src_handshaking

DMA source handshaking interface

uint8_t src_peripheral_request

Source peripheral request

uint32_t src_transfer_width

Source transfer width

uint32_t transfer_flow

DMA transfer flow

XMC_DMA_CH_TRANSFER_TYPE_t transfer_type

DMA transfer type

The documentation for this struct was generated from the following file:
  • xmc_dma.h


XMC Peripheral Library for XMC4000 Family: XMC_DMA_LLI_t Struct Reference

Data Fields
XMC_DMA_LLI_t Struct Reference
XMC Peripheral Library » DMA

#include <xmc_dma.h>

Data Fields

uint32_t | block_size
uint32_t | dst_addr
uint32_t | dst_status
struct XMC_DMA_LLI * | llp
uint32_t | src_addr
uint32_t | src_status
uint32_t | __pad0__: 1
uint32_t | __pad1__: 4
uint32_t | __pad2__: 3
uint32_t | dst_address_count_mode: 2
uint32_t | dst_burst_length: 3
uint32_t | dst_transfer_width: 3
uint32_t | enable_dst_linked_list: 1
uint32_t | enable_dst_scatter: 1
uint32_t | enable_interrupt: 1
uint32_t | enable_src_gather: 1
uint32_t | enable_src_linked_list: 1
uint32_t | src_address_count_mode: 2
uint32_t | src_burst_length: 3
uint32_t | src_transfer_width: 3
uint32_t | transfer_flow: 3

Detailed Description

DMA channel linked list item. Note: Needs to be word aligned

Field Documentation

uint32_t __pad0__

Reserved bits

uint32_t __pad1__

Reserved bits

uint32_t __pad2__

Reserved bits

uint32_t block_size

Transfer block size

uint32_t dst_addr

Destination address

uint32_t dst_address_count_mode

Destination address count mode

uint32_t dst_burst_length

Destination burst length

uint32_t dst_status

Destination status

uint32_t dst_transfer_width

Destination transfer width

uint32_t enable_dst_linked_list

Enable destination linked list?

uint32_t enable_dst_scatter

Enable destination scatter?

uint32_t enable_interrupt

Enable interrupts?

uint32_t enable_src_gather

Enable source gather?

uint32_t enable_src_linked_list

Enable source linked list?

struct XMC_DMA_LLI* llp

Linked list pointer of type XMC_DMA_LLI_t

uint32_t src_addr

Source address

uint32_t src_address_count_mode

Source address count mode

uint32_t src_burst_length

Source burst length

uint32_t src_status

Source status

uint32_t src_transfer_width

Source transfer width

uint32_t transfer_flow

DMA transfer flow

The documentation for this struct was generated from the following file:
  • xmc_dma.h


XMC Peripheral Library for XMC4000 Family: XMC_DMA_t Struct Reference

XMC_DMA_t Struct Reference
XMC Peripheral Library » DMA

#include <xmc_dma.h>

Detailed Description

DMA device structure

The structure represents a collection of all hardware registers used to configure the GPDMA peripheral on the XMC4000 series of microcontrollers. The registers can be accessed with XMC_DMA0 and XMC_DMA1.

The documentation for this struct was generated from the following file:
  • xmc_dma.h


XMC Peripheral Library for XMC4000 Family: DSD

Data Structures | Typedefs | Enumerations | Functions
DSD
XMC Peripheral Library

Data Structures

struct | XMC_DSD_CH_AUX_FILTER_CONFIG_t
struct | XMC_DSD_CH_CONFIG_t
struct | XMC_DSD_CH_FILTER_CONFIG_t
struct | XMC_DSD_CH_INTEGRATOR_CONFIG_t
struct | XMC_DSD_CH_RECTIFY_CONFIG_t
struct | XMC_DSD_CH_TIMESTAMP_CONFIG_t
struct | XMC_DSD_GENERATOR_CONFIG_t

Typedefs

typedef DSD_CH_TypeDef | XMC_DSD_CH_t
typedef DSD_GLOBAL_TypeDef | XMC_DSD_t

Enumerations

Functions

void | XMC_DSD_CH_AuxFilter_DisableEvent (XMC_DSD_CH_t *const channel)
void | XMC_DSD_CH_AuxFilter_EnableEvent (XMC_DSD_CH_t *const channel, XMC_DSD_CH_AUX_EVENT_t event)
void | XMC_DSD_CH_AuxFilter_Init (XMC_DSD_CH_t *const channel, const XMC_DSD_CH_AUX_FILTER_CONFIG_t *const init)
void | XMC_DSD_CH_AuxFilter_SetBoundary (XMC_DSD_CH_t *const channel, const int16_t lower_boundary, const int16_t upper_boundary)
void | XMC_DSD_CH_GetRectifyDelay (XMC_DSD_CH_t *const channel, uint8_t *delay)
void | XMC_DSD_CH_GetResult (XMC_DSD_CH_t *const channel, int16_t *dsd_Result)
void | XMC_DSD_CH_GetResult_AUX (XMC_DSD_CH_t *const channel, int16_t *dsd_Result)
void | XMC_DSD_CH_GetResult_TS (XMC_DSD_CH_t *const channel, int16_t *dsd_Result, uint8_t *dsd_filter_loop, uint8_t *dsd_integration_loop)
void | XMC_DSD_CH_GetResult_TS_Time (XMC_DSD_CH_t *const channel, int16_t *dsd_Result, uint32_t *time)
XMC_DSD_STATUS_t | XMC_DSD_CH_Init (XMC_DSD_CH_t *const channel, const XMC_DSD_CH_CONFIG_t *const init)
void | XMC_DSD_CH_Integrator_Init (XMC_DSD_CH_t *const channel, const XMC_DSD_CH_INTEGRATOR_CONFIG_t *const init)
void | XMC_DSD_CH_MainFilter_DisableEvent (XMC_DSD_CH_t *const channel)
void | XMC_DSD_CH_MainFilter_EnableEvent (XMC_DSD_CH_t *const channel)
void | XMC_DSD_CH_MainFilter_Init (XMC_DSD_CH_t *const channel, const XMC_DSD_CH_FILTER_CONFIG_t *const init)
void | XMC_DSD_CH_MainFilter_SetOffset (XMC_DSD_CH_t *const channel, const int16_t offset)
void | XMC_DSD_CH_Rectify_Init (XMC_DSD_CH_t *const channel, const XMC_DSD_CH_RECTIFY_CONFIG_t *const init)
void | XMC_DSD_CH_Timestamp_Init (XMC_DSD_CH_t *const channel, const XMC_DSD_CH_TIMESTAMP_CONFIG_t *const init)
void | XMC_DSD_ClearAlarmEventFlag (XMC_DSD_t *const dsd, const uint32_t channel_id)
void | XMC_DSD_ClearResultEventFlag (XMC_DSD_t *const dsd, const uint32_t channel_id)
void | XMC_DSD_Disable (XMC_DSD_t *const dsd)
void | XMC_DSD_DisableClock (XMC_DSD_t *const dsd)
void | XMC_DSD_Enable (XMC_DSD_t *const dsd)
void | XMC_DSD_EnableClock (XMC_DSD_t *const dsd)
void | XMC_DSD_Generator_Init (XMC_DSD_t *const dsd, const XMC_DSD_GENERATOR_CONFIG_t *const init)
void | XMC_DSD_Generator_Start (XMC_DSD_t *const dsd, const XMC_DSD_GENERATOR_CONFIG_t *const config)
void | XMC_DSD_Generator_Stop (XMC_DSD_t *const dsd)
void | XMC_DSD_Init (XMC_DSD_t *const dsd)
bool | XMC_DSD_IsChannelStarted (XMC_DSD_t *const dsd, const XMC_DSD_CH_ID_t channel)
bool | XMC_DSD_IsEnabled (XMC_DSD_t *const dsd)
void | XMC_DSD_SetAlarmEventFlag (XMC_DSD_t *const dsd, const uint32_t channel_id)
void | XMC_DSD_SetResultEventFlag (XMC_DSD_t *const dsd, const uint32_t channel_id)
void | XMC_DSD_Start (XMC_DSD_t *const dsd, const uint32_t channel)
void | XMC_DSD_Stop (XMC_DSD_t *const dsd, const uint32_t channel)

Detailed Description

The DSD unit provides a series of digital input channels accepting data streams from external modulators using the Delta/Sigma (DS) conversion principle. The on-chip demodulator channels convert these inputs to discrete digital values. DSD unit can be used for isolated current/voltage measurement and for sensor interfaces.

Driver is divided in six DSD functional blocks -

  • Main Filter (APIs prefixed with XMC_DSD_CH_MainFilter),
  • Aux Filter (APIs prefixed with XMC_DSD_CH_AuxFilter),
  • Integrator (APIs prefixed with XMC_DSD_CH_Integrator),
  • Timestamp (APIs prefixed with XMC_DSD_CH_Timestamp),
  • Rectification (APIs prefixed with XMC_DSD_CH_Rectify),
  • Carrier Generator (APIs prefixed with XMC_DSD_Generator)

DSD driver features:

  1. DSD channel Configuration structure XMC_DSD_CH_CONFIG_t initialization function XMC_DSD_CH_Init() to configure all the functional blocks (except carrier generator)
  2. Configuration structure XMC_DSD_GENERATOR_CONFIG_t and initialization function XMC_DSD_Generator_Init() to configure carrier generator
  3. Configuration structure XMC_DSD_CH_FILTER_CONFIG_t and initialization function XMC_DSD_CH_MainFilter_Init() to configure main filter
  4. Configuration structure XMC_DSD_CH_AUX_FILTER_CONFIG_t and initialization function XMC_DSD_CH_AuxFilter_Init() to configure auxilary filter
  5. Configuration structure XMC_DSD_CH_INTEGRATOR_CONFIG_t and initialization function XMC_DSD_CH_Integrator_Init() to configure integrator
  6. Configuration structure XMC_DSD_CH_TIMESTAMP_CONFIG_t and initialization function XMC_DSD_CH_Timestamp_Init() to configure timestamp
  7. Configuration structure XMC_DSD_CH_RECTIFY_CONFIG_t and initialization function XMC_DSD_CH_Rectify_Init() to configure rectifier

Typedef Documentation

typedef DSD_CH_TypeDef XMC_DSD_CH_t

DSD Channel

typedef DSD_GLOBAL_TypeDef XMC_DSD_t

DSD Module

Enumeration Type Documentation

enum XMC_DSD_CH_AUX_EVENT_t

Enumerates the service request generation mode for auxiliary filter. Use type XMC_DSD_CH_AUX_EVENT_t for this enum. Note: This is combined ENUM for SRGA + ESEL bit fields

Enumerator
XMC_DSD_CH_AUX_EVENT_DISABLED | Service request is disabled
XMC_DSD_CH_AUX_EVENT_EVERY_NEW_RESULT | Service request generated for aux filter for every new result
XMC_DSD_CH_AUX_EVENT_CAPTURE_SIGN_DELAY | Service request generated for alternate source
XMC_DSD_CH_AUX_EVENT_INSIDE_BOUNDARY | Service request generated for aux filter if result is inside boundary
XMC_DSD_CH_AUX_EVENT_OUTSIDE_BOUNDARY | Service request generated for aux filter if result is outside boundary
enum XMC_DSD_CH_CLK_t

Enumerates the divider factor for modulator clock (fMOD). Use divider factor to derive modulator clock frequency(fMOD), from the selected internal clock source(fCLK). Use type XMC_DSD_CH_CLK_t for this enum.

Enumerator
XMC_DSD_CH_CLK_DIV_2 | fMOD = fCLK/2
XMC_DSD_CH_CLK_DIV_4 | fMOD = fCLK/4
XMC_DSD_CH_CLK_DIV_6 | fMOD = fCLK/6
XMC_DSD_CH_CLK_DIV_8 | fMOD = fCLK/8
XMC_DSD_CH_CLK_DIV_10 | fMOD = fCLK/10
XMC_DSD_CH_CLK_DIV_12 | fMOD = fCLK/12
XMC_DSD_CH_CLK_DIV_14 | fMOD = fCLK/14
XMC_DSD_CH_CLK_DIV_16 | fMOD = fCLK/16
XMC_DSD_CH_CLK_DIV_18 | fMOD = fCLK/18
XMC_DSD_CH_CLK_DIV_20 | fMOD = fCLK/20
XMC_DSD_CH_CLK_DIV_22 | fMOD = fCLK/22
XMC_DSD_CH_CLK_DIV_24 | fMOD = fCLK/24
XMC_DSD_CH_CLK_DIV_26 | fMOD = fCLK/26
XMC_DSD_CH_CLK_DIV_28 | fMOD = fCLK/28
XMC_DSD_CH_CLK_DIV_30 | fMOD = fCLK/30
XMC_DSD_CH_CLK_DIV_32 | fMOD = fCLK/32
enum XMC_DSD_CH_CLOCK_SOURCE_t

Enumerates the sample clock source select. Use type XMC_DSD_CH_CLOCK_SOURCE_t for this enum.

Enumerator
XMC_DSD_CH_CLOCK_SOURCE_A | External source, from input A
XMC_DSD_CH_CLOCK_SOURCE_B | External source, from input B
XMC_DSD_CH_CLOCK_SOURCE_C | External source, from input C
XMC_DSD_CH_CLOCK_SOURCE_D | External source, from input D
XMC_DSD_CH_CLOCK_SOURCE_INTERN | Internal clock source
enum XMC_DSD_CH_DATA_SOURCE_t

Enumerates the input data source select. Use type XMC_DSD_CH_DATA_SOURCE_t for this enum.

Enumerator
XMC_DSD_CH_DATA_SOURCE_DISCONNECT | Disconnected
XMC_DSD_CH_DATA_SOURCE_A_DIRECT | External source, from input A, direct
XMC_DSD_CH_DATA_SOURCE_A_INVERTED | External source, from input A, inverted
XMC_DSD_CH_DATA_SOURCE_B_DIRECT | External source, from input B, direct
XMC_DSD_CH_DATA_SOURCE_B_INVERTED | External source, from input B, inverted
enum XMC_DSD_CH_FILTER_TYPE_t

Enumerates the CIC(cyclic integrating comb) filter type. Use type XMC_DSD_CH_FILTER_TYPE_t for this enum.

Enumerator
XMC_DSD_CH_FILTER_TYPE_CIC1 | CIC1 filter
XMC_DSD_CH_FILTER_TYPE_CIC2 | CIC2 filter
XMC_DSD_CH_FILTER_TYPE_CIC3 | CIC3 filter
XMC_DSD_CH_FILTER_TYPE_CICF | CICF filter
enum XMC_DSD_CH_ID_t

Enumerates the channel run control bit register value in global run control register. Use type XMC_DSD_CH_ID_t for this enum.

Enumerator
XMC_DSD_CH_ID_0 | Register value for channel 0
XMC_DSD_CH_ID_1 | Register value for channel 1
XMC_DSD_CH_ID_2 | Register value for channel 2
XMC_DSD_CH_ID_3 | Register value for channel 3
enum XMC_DSD_CH_INTEGRATOR_START_t

Enumerates the integrator trigger mode. Use type XMC_DSD_CH_INTEGRATOR_START_t for this enum.

Enumerator
XMC_DSD_CH_INTEGRATOR_START_OFF | No integration trigger
XMC_DSD_CH_INTEGRATOR_START_TRIGGER_FALL | Trigger event upon a falling edge
XMC_DSD_CH_INTEGRATOR_START_TRIGGER_RISE | Trigger event upon a rising edge
XMC_DSD_CH_INTEGRATOR_START_ALLWAYS_ON | No trigger, integrator active all the time
enum XMC_DSD_CH_INTEGRATOR_STOP_t

Enumerates the integration enable. Use type XMC_DSD_CH_INTEGRATOR_STOP_t for this enum.

Enumerator
XMC_DSD_CH_INTEGRATOR_STOP_END_OF_LOOPS | Integration stopped upon the inverse trigger event
XMC_DSD_CH_INTEGRATOR_STOP_ENDLESS_OR_INVERSE_TRIGGER | Integration enabled upon the defined trigger event.
enum XMC_DSD_CH_RESULT_EVENT_t

Enumerates the service request generation for main chain filter. Use type XMC_DSD_CH_RESULT_EVENT_t for this enum.

Enumerator
XMC_DSD_CH_RESULT_EVENT_DISABLE | Disable service request
XMC_DSD_CH_RESULT_EVENT_ENABLE | Enable service request for each new result value
enum XMC_DSD_CH_SIGN_SOURCE_t

Enumerates the carrier generation mode. Use type XMC_DSD_CH_SIGN_SOURCE_t for this enum.

Enumerator
XMC_DSD_CH_SIGN_SOURCE_ON_CHIP_GENERATOR | Carrier is generated internally by DSD
XMC_DSD_CH_SIGN_SOURCE_NEXT_CHANNEL | Carrier sign signal is generated internally by next channel
XMC_DSD_CH_SIGN_SOURCE_EXTERNAL_A | Carrier is generated externally, External sign signal A
XMC_DSD_CH_SIGN_SOURCE_EXTERNAL_B | Carrier is generated externally, External sign signal B
enum XMC_DSD_CH_STROBE_t

Enumerates the data strobe generation Mode. Use type XMC_DSD_CH_STROBE_t for this enum.

enum XMC_DSD_CH_TIMESTAMP_TRIGGER_t

Enumerates the timestamp trigger mode. Use type XMC_DSD_CH_TIMESTAMP_TRIGGER_t for this enum.

Enumerator
XMC_DSD_CH_TIMESTAMP_TRIGGER_DISABLE | No trigger event
XMC_DSD_CH_TIMESTAMP_TRIGGER_FALL | Trigger event upon a falling edge
XMC_DSD_CH_TIMESTAMP_TRIGGER_RISE | Trigger event upon a rising edge
XMC_DSD_CH_TIMESTAMP_TRIGGER_BOTH_EDGES | Trigger event upon both the edge
enum XMC_DSD_CH_TRIGGER_SOURCE_t

Enumerates the trigger signal. Use type XMC_DSD_CH_TRIGGER_SOURCE_t for this enum.

Enumerator
XMC_DSD_CH_TRIGGER_SOURCE_A | Trigger signal,input A
XMC_DSD_CH_TRIGGER_SOURCE_B | Trigger signal,input B
XMC_DSD_CH_TRIGGER_SOURCE_C | Trigger signal,input C
XMC_DSD_CH_TRIGGER_SOURCE_D | Trigger signal,input D
XMC_DSD_CH_TRIGGER_SOURCE_E | Trigger signal,input E
XMC_DSD_CH_TRIGGER_SOURCE_F | Trigger signal,input F
XMC_DSD_CH_TRIGGER_SOURCE_G | Trigger signal,input G
XMC_DSD_CH_TRIGGER_SOURCE_H | Trigger signal,input H
enum XMC_DSD_GENERATOR_CLKDIV_t

Enumerates the divider factor for the PWM pattern signal generator. Use divider factor to derive input frequency of the carrier signal generator(fCG), from the selected internal clock source(fCLK). Use type XMC_DSD_GENERATOR_CLKDIV_t for this enum.

Enumerator
XMC_DSD_GENERATOR_CLKDIV_2048 | fCG = (fCLK/2)/1024
XMC_DSD_GENERATOR_CLKDIV_4096 | fCG = (fCLK/4)/1024
XMC_DSD_GENERATOR_CLKDIV_6144 | fCG = (fCLK/6)/1024
XMC_DSD_GENERATOR_CLKDIV_8192 | fCG = (fCLK/8)/1024
XMC_DSD_GENERATOR_CLKDIV_10240 | fCG = (fCLK/10)/1024
XMC_DSD_GENERATOR_CLKDIV_12288 | fCG = (fCLK/12)/1024
XMC_DSD_GENERATOR_CLKDIV_14336 | fCG = (fCLK/14)/1024
XMC_DSD_GENERATOR_CLKDIV_16384 | fCG = (fCLK/16)/1024
XMC_DSD_GENERATOR_CLKDIV_18432 | fCG = (fCLK/18)/1024
XMC_DSD_GENERATOR_CLKDIV_20480 | fCG = (fCLK/20)/1024
XMC_DSD_GENERATOR_CLKDIV_22528 | fCG = (fCLK/22)/1024
XMC_DSD_GENERATOR_CLKDIV_24576 | fCG = (fCLK/24)/1024
XMC_DSD_GENERATOR_CLKDIV_26624 | fCG = (fCLK/26)/1024
XMC_DSD_GENERATOR_CLKDIV_28672 | fCG = (fCLK/28)/1024
XMC_DSD_GENERATOR_CLKDIV_30720 | fCG = (fCLK/30)/1024
XMC_DSD_GENERATOR_CLKDIV_32768 | fCG = (fCLK/32)/1024
enum XMC_DSD_GENERATOR_MODE_t

Enumerates the carrier generator operating mode. Use type XMC_DSD_GENERATOR_MODE_t for this enum.

Enumerator
XMC_DSD_GENERATOR_MODE_STOPPED | Stopped
XMC_DSD_GENERATOR_MODE_RECTANGLE | Square wave
XMC_DSD_GENERATOR_MODE_TRIANGLE | Triangle
XMC_DSD_GENERATOR_MODE_SINE | Sine wave
enum XMC_DSD_STATUS_t

Return types of the API's.Use type XMC_DSD_STATUS_t for this enum.

Enumerator
XMC_DSD_STATUS_OK | API fulfills request
XMC_DSD_STATUS_ERROR | Error detected

Function Documentation

void XMC_DSD_CH_AuxFilter_DisableEvent ( XMC_DSD_CH_t *const channel )
Parameters
channel Pointer to an instance of DSD channel of type XMC_DSD_CH_t
Returns
None
Description
This API disable the auxiliary filter service request generation for this channel. Clear the bit fields SRGA and ESEL of register FCFGA.
void XMC_DSD_CH_AuxFilter_EnableEvent | ( | XMC_DSD_CH_t *const | channel,
 |  | XMC_DSD_CH_AUX_EVENT_t | event
 | ) |  |
Parameters
channel | Pointer to an instance of DSD channel of type XMC_DSD_CH_t
event | to select the type of event which will be enabled of type XMC_DSD_CH_AUX_EVENT_t
Returns
None
Description
This API enable the service request generation for this channel. Result events are generated at the output rate of the configured auxiliary filter chain. Configure bit field SRGA and ESEL of register FCFGA
void XMC_DSD_CH_AuxFilter_Init | ( | XMC_DSD_CH_t *const | channel,
 |  | const XMC_DSD_CH_AUX_FILTER_CONFIG_t *const | init
 | ) |  |
Parameters
channel | Pointer to an instance of DSD channel of type XMC_DSD_CH_t
init | Pointer to an instance of data structure of type XMC_DSD_CH_AUX_FILTER_CONFIG_t
Returns
None
Description
This API initialize auxiliary filter module with init. The auxiliary Filter is mainly used as fast filter.
Adding the auxiliary filter to the system structure helps by defining the boundaries and filter configurations.
Note
It is internally called by XMC_DSD_CH_Init().
Related APIs:
XMC_DSD_CH_Init()

void XMC_DSD_CH_AuxFilter_SetBoundary | ( | XMC_DSD_CH_t *const | channel,
 |  | const int16_t | lower_boundary,
 |  | const int16_t | upper_boundary
 | ) |  |
Parameters
channel | Pointer to an instance of DSD channel of type XMC_DSD_CH_t
lower_boundary | lower boundary value for limit checking
upper_boundary | upper boundary value for limit checking
Returns
None
Description
Invoke this API, to set the lower and upper boundary for limit checking for this channel. This (two’s complement) value is compared to the results of the parallel filter. Configure bit fields BOUNDARYU and BOUNDARYL of register BOUNDSEL.
Note
Lower and upper boundaries are internally configured by function XMC_DSD_CH_AuxFilter_Init().
Related APIs:
XMC_DSD_CH_AuxFilter_Init()

void XMC_DSD_CH_GetRectifyDelay | ( | XMC_DSD_CH_t *const | channel,
 |  | uint8_t * | delay
 | ) |  |
Parameters
channel | Pointer to an instance of DSD channel of type XMC_DSD_CH_t
delay | Captured value
Returns
uint8_t
Description
This API, capture sign delay value for DSD channel. Captured value indicates the values counted between the begin of the positive halfwave of the carrier signal and the first received positive value. Read bit field SDCAP of register CGSYNC
void XMC_DSD_CH_GetResult | ( | XMC_DSD_CH_t *const | channel,
 |  | int16_t * | dsd_Result
 | ) |  |
Parameters
channel | Pointer to an instance of DSD channel of type XMC_DSD_CH_t
dsd_Result | pointer point to the address of 16 bit variable
Returns
None
Description:
Returns the result of most recent conversion associated with this channel.
A call to this API would access the register bit field RESMx.RESULT (x = 0 - 3).
Related APIs:
XMC_DSD_CH_GetResult_TS()

void XMC_DSD_CH_GetResult_AUX | ( | XMC_DSD_CH_t *const | channel,
 |  | int16_t * | dsd_Result
 | ) |  |
Parameters
channel | Pointer to an instance of DSD channel of type XMC_DSD_CH_t
dsd_Result | pointer point to the address of 16 bit variable
Returns
None
Description:
Returns the most recent conversion result values of the auxiliary filter associated with this channel.
A call to this API would access the register bit field RESAx.RESULT (x = 0 - 3).
Related APIs:
XMC_DSD_CH_GetResult_TS()

void XMC_DSD_CH_GetResult_TS | ( | XMC_DSD_CH_t *const | channel,
 |  | int16_t * | dsd_Result,
 |  | uint8_t * | dsd_filter_loop,
 |  | uint8_t * | dsd_integration_loop
 | ) |  |
Parameters
channel Pointer to an instance of DSD channel of type XMC_DSD_CH_t
dsd_Result pointer point to the address of 16 bit variable holds result value
dsd_filter_loop pointer point to the address of 8 bit variable holds decimation counter value
dsd_integration_loop pointer point to the address of 8 bit integration counter variable holds value
Returns
None
Description:
API to get the result of the last conversion associated with this channel with CIC filter decimation counter and number of values counted.
A call to this API would access the register bit field TSTMPx.RESULT TSTMPx.CFMDCNT and TSTMPx.NVALCNT where (x = 0 - 3).
Related APIs:
XMC_DSD_CH_GetResult(),XMC_DSD_CH_GetResult_TS_Time()

void XMC_DSD_CH_GetResult_TS_Time | ( | XMC_DSD_CH_t *const | channel,
 |  | int16_t * | dsd_Result,
 |  | uint32_t * | time
 | ) |  |
Parameters
channel Pointer to an instance of DSD channel of type XMC_DSD_CH_t
dsd_Result pointer point to the address of 16 bit variable holds result value
time pointer point to the address of 32 bit variable holds the time
Returns
None
Description:
API to get the result of the last conversion with the time, associated with this channel.
Related APIs:
XMC_DSD_CH_GetResult(),XMC_DSD_CH_GetResult_TS()

XMC_DSD_STATUS_t XMC_DSD_CH_Init | ( | XMC_DSD_CH_t *const | channel,
 |  | const XMC_DSD_CH_CONFIG_t *const | init
 | ) |  |
Parameters
channel | Pointer to an instance of DSD channel of type XMC_DSD_CH_t
init | Pointer to an instance of data structure of type XMC_DSD_CH_CONFIG_t
Returns
XMC_DSD_STATUS_t if success Returns XMC_DSD_STATUS_OK else return XMC_DSD_STATUS_ERROR.
Description
Initialize main filter,auxiliary filter,integrator, rectifier and timestamp of DSD module with init.
Internally this API invoke main filter, auxiliary filter, integrator, rectifier and timestamp init API.
Related APIs:
XMC_DSD_CH_MainFilter_Init(),XMC_DSD_CH_AuxFilter_Init(),XMC_DSD_CH_Integrator_Init(), XMC_DSD_CH_Rectify_Init(),XMC_DSD_CH_Timestamp_Init()

void XMC_DSD_CH_Integrator_Init | ( | XMC_DSD_CH_t *const | channel,
 |  | const XMC_DSD_CH_INTEGRATOR_CONFIG_t *const | init
 | ) |  |
Parameters
channel | Pointer to an instance of DSD channel of type XMC_DSD_CH_t
init | Pointer to an instance of data structure of type XMC_DSD_CH_INTEGRATOR_CONFIG_t
Returns
None
Description
Initialize integrator of DSD module.The integrator is mainly used for resolver feedback but can also be used for high accurate measurement. This API configures number of integration loops, number of results are discarded before integration starts, integrator stop condition, number of integrator loop to get integration result and trigger mode.
Note
Trigger source for timestamp and integrator are shared. It is internally called by XMC_DSD_CH_Init().
Related APIs:
XMC_DSD_CH_Init()

void XMC_DSD_CH_MainFilter_DisableEvent ( XMC_DSD_CH_t *const channel )
Parameters
channel Pointer to an instance of DSD channel of type XMC_DSD_CH_t
Returns
None
Description
This API disable the service request generation for result of this channel. Configure bit field SRGM of register FCFGC
void XMC_DSD_CH_MainFilter_EnableEvent ( XMC_DSD_CH_t *const channel )
Parameters
channel Pointer to an instance of DSD channel of type XMC_DSD_CH_t
Returns
None
Description
This API enable the service request generation for result of this channel. Result events are generated at the output rate of the configured main filter chain. Configure bit field SRGM of register FCFGC
void XMC_DSD_CH_MainFilter_Init | ( | XMC_DSD_CH_t *const | channel,
 |  | const XMC_DSD_CH_FILTER_CONFIG_t *const | init
 | ) |  |
Parameters
channel | Pointer to an instance of DSD channel of type XMC_DSD_CH_t
init | Pointer to an instance of data structure of type XMC_DSD_CH_FILTER_CONFIG_t
Returns
None
Description
This API initialize main filter module with init. The filter demodulates the incoming bit stream from the delta sigma modulator to a 16 bit result.
Note
It is internally called by XMC_DSD_CH_Init().
Related APIs:
XMC_DSD_CH_Init()

void XMC_DSD_CH_MainFilter_SetOffset | ( | XMC_DSD_CH_t *const | channel,
 |  | const int16_t | offset
 | ) |  |
Parameters
channel | Pointer to an instance of DSD channel of type XMC_DSD_CH_t
offset | Signed Offset value to be set
Returns
None
Description
API set the signed offset value for this channel. This offset value is subtracted from each result before being written to the corresponding result register RESMx.
Note
The offset value is measured for each channel separately.
void XMC_DSD_CH_Rectify_Init | ( | XMC_DSD_CH_t *const | channel,
 |  | const XMC_DSD_CH_RECTIFY_CONFIG_t *const | init
 | ) |  |
Parameters
channel | Pointer to an instance of DSD channel of type XMC_DSD_CH_t
init | Pointer to an instance of data structure of type XMC_DSD_CH_RECTIFY_CONFIG_t
Returns
None
Description
Initialize rectification for this channel. In a resolver feedback system, rectifier is used to rectify the result from the integrator. Configure bit field RFEN and SSRC of register RECTCFG. Also configure sign delay value for positive halfwave(SDPOS) and negative halfwave(SDNEG).
Note
For the operational capability of rectifier the filter and the integrator is mandatory. It is internally called by XMC_DSD_CH_Init().
Related APIs:
XMC_DSD_CH_Init()

void XMC_DSD_CH_Timestamp_Init | ( | XMC_DSD_CH_t *const | channel,
 |  | const XMC_DSD_CH_TIMESTAMP_CONFIG_t *const | init
 | ) |  |
Parameters
channel | Pointer to an instance of DSD channel of type XMC_DSD_CH_t
init | Pointer to an instance of data structure of type XMC_DSD_CH_TIMESTAMP_CONFIG_t
Returns
None
Description
Initialize timestamp mode of DSD module with init.
Configures bits TRSEL and TSTRMODE of register DICFG .
Note
Trigger source for timestamp and integrator are shared. It is internally called by XMC_DSD_CH_Init().
Related APIs:
XMC_DSD_CH_Init()

void XMC_DSD_ClearAlarmEventFlag | ( | XMC_DSD_t *const | dsd,
 |  | const uint32_t | channel_id
 | ) |  |
Parameters
dsd | Pointer to an instance of DSD module of type XMC_DSD_t
channel_id | Channel number register value of type XMC_DSD_CH_ID_t
Returns
None
Description
Clear the result event flag.
Set bit fields ALECx of register EVFLAGCLR.Clearing these bits has no effect.
Note
API call for channel-0 : XMC_DSD_ClearResultEventFlag(DSD,(uint32_t)XMC_DSD_CH_ID_0); API call for channel-0 and 1: XMC_DSD_ClearResultEventFlag(DSD,(uint32_t)(XMC_DSD_CH_ID_0|XMC_DSD_CH_ID_1));
Related APIs:
XMC_DSD_SetAlarmEventFlag()

void XMC_DSD_ClearResultEventFlag | ( | XMC_DSD_t *const | dsd,
 |  | const uint32_t | channel_id
 | ) |  |
Parameters
dsd | Pointer to an instance of DSD module of type XMC_DSD_t
channel_id | Channel number register value of type XMC_DSD_CH_ID_t
Returns
None
Description
Clear the result event flag.
Set bit fields RESECx of register EVFLAGCLR.Clearing these bits has no effect.
Note
API call for channel-0 : XMC_DSD_ClearResultEventFlag(DSD,(uint32_t)XMC_DSD_CH_ID_0); API call for channel-0 and 1: XMC_DSD_ClearResultEventFlag(DSD,(uint32_t)(XMC_DSD_CH_ID_0|XMC_DSD_CH_ID_1));
Related APIs:
XMC_DSD_SetResultEventFlag()

void XMC_DSD_Disable ( XMC_DSD_t *const dsd )
Parameters
dsd Pointer to an instance of DSD module of type XMC_DSD_t
Returns
None
Description
Asserts the DSD module into reset.
Configures PRSET0 register's DSDRS bit field. If running on XMC44/XMC48 device then it will gate the peripheral clock.
Related APIs:
XMC_DSD_Enable()

void XMC_DSD_DisableClock ( XMC_DSD_t *const dsd )
Parameters
dsd Pointer to an instance of DSD module of type XMC_DSD_t
Returns
None
Description
Stop the module clock and disable internal module clock for DSD.
Configures bit field MCSEL of register GLOBCFG and bit field DISR of register CLC.
Related APIs:
XMC_DSD_DisableClock()

void XMC_DSD_Enable ( XMC_DSD_t *const dsd )
Parameters
dsd Pointer to an instance of DSD module of type XMC_DSD_t
Returns
None
Description
De-asserts the DSD module from reset.
Configures PRCLR0 register's DSDRS bit field. If running on XMC44/XMC48 device then it will ungate the peripheral clock.
Note
It is internally called by XMC_DSD_Init().
Related APIs:
XMC_DSD_Disable(),XMC_DSD_Init()

void XMC_DSD_EnableClock ( XMC_DSD_t *const dsd )
Parameters
dsd Pointer to an instance of DSD module of type XMC_DSD_t
Returns
None
Description
Enable the module clock and internal module clock for DSD.
Configures bit field MCSEL of register GLOBCFG and bit field DISR of register CLC.
Note
It is internally called by XMC_DSD_Init().
Related APIs:
XMC_DSD_DisableClock(),XMC_DSD_Init()

void XMC_DSD_Generator_Init | ( | XMC_DSD_t *const | dsd,
 |  | const XMC_DSD_GENERATOR_CONFIG_t *const | init
 | ) |  |
Parameters
dsd | Pointer to an instance of DSD module of type XMC_DSD_t
init | Pointer to an instance of data structure of type XMC_DSD_GENERATOR_CONFIG_t
Returns
None
Description
This API initialize generator module with init, to generate a wave for a resolver. Three types of waveforms can be generated: Rectangle, Triangle and Sine.
void XMC_DSD_Generator_Start | ( | XMC_DSD_t *const | dsd,
 |  | const XMC_DSD_GENERATOR_CONFIG_t *const | config
 | ) |  |
Parameters
dsd | Pointer to an instance of DSD module of type XMC_DSD_t
config | Pointer to an instance of data structure of type XMC_DSD_GENERATOR_CONFIG_t
Returns
None
Description
Start carrier generator by configuring operating mode. Configures bit field CGMOD of register CGCFG.
Related APIs:
XMC_DSD_Generator_Stop()

void XMC_DSD_Generator_Stop ( XMC_DSD_t *const dsd )
Parameters
dsd Pointer to an instance of DSD module of type XMC_DSD_t
Returns
None
Description
Stop carrier generator by configuring operating mode. Reset bit field CGMOD of register CGCFG.
Note
Stopping the carrier generator terminates the PWM output after completion of the current period.
Related APIs:
XMC_DSD_Generator_Start()

void XMC_DSD_Init ( XMC_DSD_t *const dsd )
Parameters
dsd Pointer to an instance of DSD module of type XMC_DSD_t
Returns
None
Description
Enable the DSD module and clock.
Note
This is the first API which application must invoke to configure DSD.
Related APIs:
XMC_DSD_Enable(),XMC_DSD_EnableClock()

bool XMC_DSD_IsChannelStarted | ( | XMC_DSD_t *const | dsd,
 |  | const XMC_DSD_CH_ID_t | channel
 | ) |  |
Parameters
dsd Pointer to an instance of DSD module of type XMC_DSD_t
channel Channel run control bit register value of type XMC_DSD_CH_ID_t
Returns
bool Return 1 if started else 0.
Description
Find out if particular demodulator channel is started or not.
Related APIs:
XMC_DSD_Start(),XMC_DSD_Stop()

bool XMC_DSD_IsEnabled ( XMC_DSD_t *const dsd )
Parameters
dsd Pointer to an instance of DSD module of type XMC_DSD_t
Returns
bool Return 1 if success else 0.
Description
Find out if the DSD reset is asserted.
Read PRSTAT0 register's DSDRS bit field.

void XMC_DSD_SetAlarmEventFlag | ( | XMC_DSD_t *const | dsd,
 |  | const uint32_t | channel_id
 | ) |  |
Parameters
dsd | Pointer to an instance of DSD module of type XMC_DSD_t
channel_id | Channel number register value of type XMC_DSD_CH_ID_t
Returns
None
Description
Set the alarm event flag.
Set bit fields ALEVx of register EVFLAG.Clearing these bits has no effect.
Note
API call for channel-0 : XMC_DSD_SetAlarmEventFlag(DSD,(uint32_t)XMC_DSD_CH_ID_0); API call for channel-0 and 1: XMC_DSD_SetAlarmEventFlag(DSD,(uint32_t)(XMC_DSD_CH_ID_0|XMC_DSD_CH_ID_1));
Related APIs:
XMC_DSD_ClearAlarmEventFlag()

void XMC_DSD_SetResultEventFlag | ( | XMC_DSD_t *const | dsd,
 |  | const uint32_t | channel_id
 | ) |  |
Parameters
dsd | Pointer to an instance of DSD module of type XMC_DSD_t
channel_id | Channel number register value of type XMC_DSD_CH_ID_t
Returns
None
Description
Set the result event flag and trigger the corresponding event.
Set bit fields RESEVx of register EVFLAG.Clearing these bits has no effect.
Note
API call for channel-0 : XMC_DSD_SetResultEventFlag(DSD,(uint32_t)XMC_DSD_CH_ID_0); API call for channel-0 and 1: XMC_DSD_SetResultEventFlag(DSD,(uint32_t)(XMC_DSD_CH_ID_0|XMC_DSD_CH_ID_1));
Related APIs:
XMC_DSD_ClearResultEventFlag()

void XMC_DSD_Start | ( | XMC_DSD_t *const | dsd,
 |  | const uint32_t | channel
 | ) |  |
Parameters
dsd | Pointer to an instance of DSD module of type XMC_DSD_t
channel | Channel run control bit register value
Returns
None
Description
Start demodulator channel by enabling run control bit. Multiple channel can be start at a time. For an example: To start all four channel, call this function as XMC_DSD_Start(DSD,(uint32_t)(XMC_DSD_CH_ID_0|XMC_DSD_CH_ID_1|XMC_DSD_CH_ID_2|XMC_DSD_CH_ID_3));
Note
All filter blocks are cleared when CHxRUN is set.
Related APIs:
XMC_DSD_Stop(),XMC_DSD_IsChannelStarted()

void XMC_DSD_Stop | ( | XMC_DSD_t *const | dsd,
 |  | const uint32_t | channel
 | ) |  |
Parameters
dsd Pointer to an instance of DSD module of type XMC_DSD_t
channel Channel run control bit register value
Returns
None
Description
Stop demodulator channel by resetting run control bit. Multiple channel can be stop at a time. For an example: To stop all four channel, call this function as XMC_DSD_Stop(DSD,(uint32_t)(XMC_DSD_CH_ID_0|XMC_DSD_CH_ID_1|XMC_DSD_CH_ID_2|XMC_DSD_CH_ID_3));
Related APIs:
XMC_DSD_Start(),XMC_DSD_IsChannelStarted()

Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_DSD_CH_AUX_FILTER_CONFIG_t Struct Reference

Data Fields
XMC_DSD_CH_AUX_FILTER_CONFIG_t Struct Reference
XMC Peripheral Library » DSD

#include <xmc_dsd.h>

Data Fields

uint32_t | decimation_factor
uint32_t | __pad0__: 8
uint32_t | enable_integrator_coupling: 1
uint32_t | filter_type: 2
uint32_t | lower_boundary: 16
uint32_t | result_event_type: 4
uint32_t | upper_boundary: 16

Detailed Description

DSD auxiliary Filter is used as fast filter to detect overvoltage or current by defining the boundaries.

Field Documentation

uint32_t __pad0__

This parameter can be in range of 4 - 256[dec]

uint32_t decimation_factor

This parameter can be in range of 4 - 256[dec]

uint32_t enable_integrator_coupling

Only enable AUX filter when Integrator is enabled

uint32_t filter_type

This parameter can take a value of XMC_DSD_CH_FILTER_TYPE_t

uint32_t lower_boundary

This parameter can take a value of int16_t

uint32_t result_event_type

Result event for aux filter and the event select configuration. Use enum XMC_DSD_CH_AUX_EVENT_t

uint32_t upper_boundary

This parameter can take a value of int16_t

The documentation for this struct was generated from the following file:
  • xmc_dsd.h


XMC Peripheral Library for XMC4000 Family: XMC_DSD_CH_CONFIG_t Struct Reference

Data Fields
XMC_DSD_CH_CONFIG_t Struct Reference
XMC Peripheral Library » DSD

#include <xmc_dsd.h>

Data Fields

XMC_DSD_CH_AUX_FILTER_CONFIG_t *const | aux
XMC_DSD_CH_FILTER_CONFIG_t *const | filter
XMC_DSD_CH_INTEGRATOR_CONFIG_t *const | integrator
XMC_DSD_CH_RECTIFY_CONFIG_t *const | rectify
XMC_DSD_CH_TIMESTAMP_CONFIG_t *const | timestamp

Detailed Description

DSD Enable Channel

Field Documentation

XMC_DSD_CH_AUX_FILTER_CONFIG_t* const aux

Pointer to the aux_filter configuration

XMC_DSD_CH_FILTER_CONFIG_t* const filter

Pointer to the filter configuration

XMC_DSD_CH_INTEGRATOR_CONFIG_t* const integrator

Pointer to the integrator configuration

XMC_DSD_CH_RECTIFY_CONFIG_t* const rectify

Pointer to the rectify configuration

XMC_DSD_CH_TIMESTAMP_CONFIG_t* const timestamp

Pointer to the time stamp configuration

The documentation for this struct was generated from the following file:
  • xmc_dsd.h


XMC Peripheral Library for XMC4000 Family: XMC_DSD_CH_FILTER_CONFIG_t Struct Reference

Data Fields
XMC_DSD_CH_FILTER_CONFIG_t Struct Reference
XMC Peripheral Library » DSD

#include <xmc_dsd.h>

Data Fields

uint32_t | clock_divider: 4
uint32_t | decimation_factor
uint32_t | filter_start_value
int16_t | offset
uint32_t | clock_source: 4
uint32_t | data_source: 4
uint32_t | filter_type: 2
uint32_t | result_event: 2
uint32_t | strobe: 4

Detailed Description

DSD filter is the basic module of the DSD. It can be used separately or can be combined with the other modules like integrator, rectify, auxiliary filter etc. The filter demodulates the incoming bit stream from the delta sigma modulator to a 16 bit result. Note: Configure or reconfigure filter parameters while the channel is inactive.

Field Documentation

uint32_t clock_divider

This parameter can take a value of XMC_DSD_CH_CLK_t

uint32_t clock_source

This parameter can take a value of XMC_DSD_CH_CLOCK_SOURCE_t

uint32_t data_source

This parameter can take a value of XMC_DSD_CH_DATA_SOURCE_t

uint32_t decimation_factor

This parameter can be in range of 4 - 256[dec]

uint32_t filter_start_value

This parameter can be in range of 4 - decimation_factor[dec]

uint32_t filter_type

This parameter can take a value of XMC_DSD_CH_FILTER_TYPE_t

int16_t offset

Offset subtracted from result.This parameter can take a value of int16_t

uint32_t result_event

This parameter can take a value of XMC_DSD_CH_RESULT_EVENT_t

uint32_t strobe

This parameter can take a value of XMC_DSD_CH_STROBE_t

The documentation for this struct was generated from the following file:
  • xmc_dsd.h


XMC Peripheral Library for XMC4000 Family: XMC_DSD_CH_INTEGRATOR_CONFIG_t Struct Reference

Data Fields
XMC_DSD_CH_INTEGRATOR_CONFIG_t Struct Reference
XMC Peripheral Library » DSD

#include <xmc_dsd.h>

Data Fields

uint32_t | counted_values
uint32_t | discarded_values
uint32_t | integration_loop
uint32_t | stop_condition
uint32_t | integrator_trigger
uint32_t | start_condition: 2
uint32_t | trigger_source: 3

Detailed Description

The integrator is mainly used for high accurate measurement. Note:DSD Filter is mandatory to use this block.

Field Documentation

uint32_t counted_values

Number of mainfilter results, integrated to a integrator result.Bitfields NVALINT of IWCTR.

uint32_t discarded_values

Number of mainfilter results,discarded before integration starts.Bitfields NVALDIS of IWCTR.

uint32_t integration_loop

Integration loops to see stop condition. Bitfields REPVAL of IWCTR.

uint32_t integrator_trigger

Demodulator Input Configuration Register(DICFG).

uint32_t start_condition

Can take a value of XMC_DSD_CH_INTEGRATOR_START_t.Bitfields ITRMODE of DICFG.

uint32_t stop_condition

Integrator stop condition. Can take a value of XMC_DSD_CH_INTEGRATOR_STOP_t.Bitfields IWS of IWCTR.

uint32_t trigger_source

Can take a value of XMC_DSD_CH_TRIGGER_SOURCE_t.Bitfields TRSEL of DICFG.

The documentation for this struct was generated from the following file:
  • xmc_dsd.h


XMC Peripheral Library for XMC4000 Family: XMC_DSD_CH_RECTIFY_CONFIG_t Struct Reference

XMC_DSD_CH_RECTIFY_CONFIG_t Struct Reference
XMC Peripheral Library » DSD

#include <xmc_dsd.h>

Detailed Description

DSD Rectify. Note: DSD Filter and integrator is mandatory to use this block.

Field Documentation

uint32_t rectify_config

Rectification configuration register(RECTCFG)

uint32_t sign_source

Can take a value of XMC_DSD_CH_SIGN_SOURCE_t.Bitfields SSRC of RECTCFG.

The documentation for this struct was generated from the following file:
  • xmc_dsd.h


XMC Peripheral Library for XMC4000 Family: XMC_DSD_CH_TIMESTAMP_CONFIG_t Struct Reference

XMC_DSD_CH_TIMESTAMP_CONFIG_t Struct Reference
XMC Peripheral Library » DSD

#include <xmc_dsd.h>

Detailed Description

DSD timestamp saves result, filter counter register and integrator count register. Note: Trigger source for timestamp and integrator trigger are shared. DSD Filter is mandatory to use this block.

Field Documentation

uint32_t trigger_mode

This parameter can take a value of XMC_DSD_CH_TIMESTAMP_TRIGGER_t

uint32_t trigger_source

This parameter can take a value of XMC_DSD_CH_TRIGGER_SOURCE_t

The documentation for this struct was generated from the following file:
  • xmc_dsd.h


XMC Peripheral Library for XMC4000 Family: XMC_DSD_GENERATOR_CONFIG_t Struct Reference

XMC_DSD_GENERATOR_CONFIG_t Struct Reference
XMC Peripheral Library » DSD

#include <xmc_dsd.h>

Detailed Description

DSD generator generates several pattern and frequencies. Use type XMC_DSD_GENERATOR_CONFIG_t for this data structure. Note: Output pins have to be enabled by user.

Field Documentation

uint32_t bit_reverse

should PWM signal be bit-reversed? 0: Normal mode, 1:Bit-reverse mode

uint32_t frequency

Frequency divider value of PWM signal. This parameter can take a value of XMC_DSD_GENERATOR_CLKDIV_t

uint32_t generator_conf

Carrier generator configuration register(CGCFG)

uint32_t inverted_polarity

should PWM signal start from negative max. 0: Normal, 1: Inverted

uint32_t mode

carrier generator operating mode. This parameter can take a value of XMC_DSD_GENERATOR_MODE_t

The documentation for this struct was generated from the following file:
  • xmc_dsd.h


XMC Peripheral Library for XMC4000 Family: EBU

Data Structures | Macros | Enumerations | Functions
EBU
XMC Peripheral Library

Data Structures

struct | XMC_EBU_BUS_READ_CONFIG_t
struct | XMC_EBU_BUS_WRITE_CONFIG_t
struct | XMC_EBU_CLK_CONFIG_t
struct | XMC_EBU_CONFIG_t
struct | XMC_EBU_FREE_PINS_TO_GPIO_t
struct | XMC_EBU_MODE_CONFIG_t
struct | XMC_EBU_REGION_READ_CONFIG_t
struct | XMC_EBU_REGION_t
struct | XMC_EBU_REGION_WRITE_CONFIG_t
struct | XMC_EBU_SDRAM_CONFIG_t
struct | XMC_EBU_t

Macros

#define XMC_EBU ((XMC_EBU_t *)EBU_BASE)

Enumerations

Functions

void | XMC_EBU_AddressSelectDisable (XMC_EBU_t *const ebu, uint32_t ebu_addr_select_dis, const uint32_t ebu_region_n)
void | XMC_EBU_AddressSelectEnable (XMC_EBU_t *const ebu, uint32_t ebu_addr_select_en, const uint32_t ebu_region_n)
void | XMC_EBU_CLKDivideRatio (XMC_EBU_t *ebu, XMC_EBU_CLOCK_DIVIDE_RATIO_t clock_divide_ratio)
void | XMC_EBU_ConfigureRegion (XMC_EBU_t *const ebu, const XMC_EBU_REGION_t *const region)
void | XMC_EBU_ConfigureSdram (XMC_EBU_t *const ebu, const XMC_EBU_SDRAM_CONFIG_t *const config)
void | XMC_EBU_Disable (XMC_EBU_t *const ebu)
void | XMC_EBU_Enable (XMC_EBU_t *const ebu)
uint32_t | XMC_EBU_GetBusWriteConfStatus (XMC_EBU_t *const ebu, const XMC_EBU_BUSWCON_SELECT_t ebu_buswcon_status, const uint32_t ebu_region_n)
uint32_t | XMC_EBU_GetCLKStatus (XMC_EBU_t *const ebu, const XMC_EBU_CLK_STATUS_t clk_status)
XMC_EBU_STATUS_t | XMC_EBU_Init (XMC_EBU_t *const ebu, const XMC_EBU_CONFIG_t *const config)
bool | XMC_EBU_IsBusAribitrationSelected (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramDisableAutomaticSelfRefresh (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramDisableAutoRefreshSelfRefreshExit (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramEnableAutomaticSelfRefresh (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramEnableAutoRefreshSelfRefreshExit (XMC_EBU_t *const ebu)
uint32_t | XMC_EBU_SdramGetRefreshStatus (XMC_EBU_t *const ebu, const XMC_EBU_SDRAM_RFRSH_STATUS_t sdram_rfrsh_status)
uint32_t | XMC_EBU_SdramGetStatus (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramResetSelfRefreshEntry (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramResetSelfRefreshExit (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramSetSelfRefreshEntry (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramSetSelfRefreshExit (XMC_EBU_t *const ebu)

Detailed Description

The External Bus Unit (EBU) controls the transactions between external memories or peripheral units, and the internal memories and peripheral units. Several external device configurations are supported; e.g. Asynchronous static memories, SDRAM and various flash memory types. It supports multiple programmable address regions.

The EBU low level driver provides functions to configure and initialize the EBU hardware peripheral.

Macro Definition Documentation

#define XMC_EBU ((XMC_EBU_t *)EBU_BASE)

A convenient symbol for the EBU peripheral base address

Enumeration Type Documentation

enum XMC_EBU_ADDRESS_SELECT_t

EBU address selection

Enumerator
XMC_EBU_ADDRESS_SELECT_MEMORY_REGION_ENABLE | Memory Region Enable
XMC_EBU_ADDRESS_SELECT_ALTERNATE_REGION_ENABLE | Alternate Region Enable
XMC_EBU_ADDRESS_SELECT_MEMORY_REGION_WRITE_PROTECT | Memory Region Write Protect
enum XMC_EBU_ALE_MODE_t

EBU ALE mode

Enumerator
XMC_EBU_ALE_OUTPUT_IS_INV_ADV | Output is ADV
XMC_EBU_ALE_OUTPUT_IS_ALE | Output is ALE
enum XMC_EBU_ARB_MODE_t

EBU arbitration mode

Enumerator
XMC_EBU_ARB_MODE_NOT_SELECTED | No Bus arbitration mode selected
XMC_EBU_ARB_MODE_ARBITER_MODE | Arbiter Mode arbitration mode selected
XMC_EBU_ARB_MODE_PARTICIPANT_MODE | Participant arbitration mode selected
XMC_EBU_ARB_MODE_SOLE_MASTER_MODE | Sole Master arbitration mode selected
enum XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_t

EBU asynchronous address phase

Enumerator
XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_CLOCK_ENABLED_AT_BEGINNING_OF_ACCESS | Enabled at beginning of access
XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_CLOCK_ENABLED_AFTER_ADDRESS_PHASE | Enabled after address phase
enum XMC_EBU_BURST_ADDRESS_WRAPPING_t

EBU burst address wrapping

Enumerator
XMC_EBU_BURST_ADDRESS_WRAPPING_DISABLED | Automatically re-aligns any non-aligned synchronous burst access
XMC_EBU_BURST_ADDRESS_WRAPPING_ENABLED | Starts any burst access at address specified by the AHB request
enum XMC_EBU_BURST_BUFFER_SYNC_MODE_t

EBU burst buffer mode

Enumerator
XMC_EBU_BURST_BUFFER_SYNC_LENGTH_SYNC_ENABLE | Burst buffer length defined by value in FETBLEN
XMC_EBU_BURST_BUFFER_SYNC_SINGLE_MODE | All data required for transaction (single burst transfer)
enum XMC_EBU_BURST_FLASH_CLOCK_FEEDBACK_t

EBU burst flash clock feedback enable/disable

Enumerator
XMC_EBU_BURST_FLASH_CLOCK_FEEDBACK_DISABLE | BFCLK feedback not used
XMC_EBU_BURST_FLASH_CLOCK_FEEDBACK_ENABLE | BFCLK feedback used
enum XMC_EBU_BURST_FLASH_CLOCK_MODE_t

EBU burst flash clock mode select

Enumerator
XMC_EBU_BURST_FLASH_CLOCK_MODE_RUN_CONTINUOSLY | Burst flash clock runs continuously
XMC_EBU_BURST_FLASH_CLOCK_MODE_DISABLED_BETWEEN_ACCESSES | Burst flash clock disabled
enum XMC_EBU_BURST_LENGTH_SYNC_t

EBU burst length for synchronous burst

Enumerator
XMC_EBU_BURST_LENGTH_SYNC_1_DATA_ACCESS | 1 data access (default after reset)
XMC_EBU_BURST_LENGTH_SYNC_2_DATA_ACCESSES | 2 data access
XMC_EBU_BURST_LENGTH_SYNC_4_DATA_ACCESSES | 3 data access
XMC_EBU_BURST_LENGTH_SYNC_8_DATA_ACCESSES | 4 data access
enum XMC_EBU_BURST_SIGNAL_SYNC_BURST_t

EBU early burst signal enable for synchronous burst

Enumerator
XMC_EBU_BURST_SIGNAL_SYNC_BURST_ADV_DELAYED | Chip select delayed
XMC_EBU_BURST_SIGNAL_SYNC_BURST_ADV_NOT_DELAYED | Chip select not delayed
enum XMC_EBU_BUSWCON_SELECT_t

EBU bus write configuration status

Enumerator
XMC_EBU_BUSWCON_SELECT_NAN_WORKAROUND | Enable flash non-array access workaround
XMC_EBU_BUSWCON_SELECT_DEVICE_ADDRESSING_MODE | Device Addressing Mode
enum XMC_EBU_BYTE_CONTROL_t

EBU byte control signal control

Enumerator
XMC_EBU_BYTE_CONTROL_FOLLOWS_CHIP_SELECT_TIMMING | Control signals follow chip select timing
XMC_EBU_BYTE_CONTROL_FOLLOWS_CONTROL_SIGNAL_TIMMING | Control signals follow control signal timing
XMC_EBU_BYTE_CONTROL_FOLLOWS_WRITE_ENABLE_SIGNAL_TIMMING | Control signals follow write enable timing
enum XMC_EBU_CLK_MODE_t

EBU clocking mode

Enumerator
XMC_EBU_CLK_MODE_ASYNCHRONOUS_TO_AHB | EBU is using standard clocking mode
XMC_EBU_CLK_MODE_SYNCHRONOUS_TO_CPU | EBU is running at AHB bus clock divided by 2
enum XMC_EBU_CLK_STATUS_t

EBU clock status

Enumerator
XMC_EBU_CLK_STATUS_DISABLE_BIT | EBU Disable Status Bit
XMC_EBU_CLK_STATUS_MODE | EBU Clocking Mode Status
XMC_EBU_CLK_STATUS_DIV2_MODE | DIV2 Clocking Mode Status
XMC_EBU_CLK_STATUS_DIV_RATIO | EBU Clock Divide Ratio Status
enum XMC_EBU_CLOCK_DIVIDE_RATIO_t

EBU clock divide ratio

Enumerator
XMC_EBU_CLOCK_DIVIDED_BY_1 | Clock divided by 1
XMC_EBU_CLOCK_DIVIDED_BY_2 | Clock divided by 2
XMC_EBU_CLOCK_DIVIDED_BY_3 | Clock divided by 3
XMC_EBU_CLOCK_DIVIDED_BY_4 | Clock divided by 4
enum XMC_EBU_DEVICE_ADDRESSING_MODE_t

EBU device addressing mode

Enumerator
XMC_EBU_DEVICE_ADDRESSING_MODE_16_BITS | Address will only be driven onto AD[15:0]
XMC_EBU_DEVICE_ADDRESSING_MODE_TWIN_16_BITS_MULTIPLEXED | Lower 16b will be driven onto A[15:0] & AD[15:0]
XMC_EBU_DEVICE_ADDRESSING_MODE_32_BITS_MULTIPLEXED | Full address driven onto A[15:0] & AD[15:0]
enum XMC_EBU_DEVICE_TYPE_t

EBU device type for region

Enumerator
XMC_EBU_DEVICE_TYPE_MUXED_ASYNCHRONOUS_TYPE | Device type muxed asynchronous
XMC_EBU_DEVICE_TYPE_MUXED_BURST_TYPE | Device type muxed burst
XMC_EBU_DEVICE_TYPE_NAND_FLASH | Device type NAND flash
XMC_EBU_DEVICE_TYPE_MUXED_CELLULAR_RAM | Device type muxed cellular RAM
XMC_EBU_DEVICE_TYPE_DEMUXED_ASYNCHRONOUS_TYPE | Device type de-muxed asynchronous
XMC_EBU_DEVICE_TYPE_DEMUXED_BURST_TYPE | Device type de-muxed burst
XMC_EBU_DEVICE_TYPE_DEMUXED_PAGE_MODE | Device type de-muxed page mode
XMC_EBU_DEVICE_TYPE_DEMUXED_CELLULAR_RAM | Device type de-muxed cellular RAM
XMC_EBU_DEVICE_TYPE_SDRAM | Device type SDRAM
enum XMC_EBU_DIV2_CLK_MODE_t

EBU DIV2 clocking mode

Enumerator
XMC_EBU_DIV2_CLK_MODE_OFF | Divider 2 clock mode OFF
XMC_EBU_DIV2_CLK_MODE_ON | Divider 2 clock mode ON
enum XMC_EBU_EARLY_CHIP_SELECT_SYNC_BURST_t

EBU early chip select for synchronous burst

Enumerator
XMC_EBU_EARLY_CHIP_SELECT_DELAYED | Chip select delayed
XMC_EBU_EARLY_CHIP_SELECT_NOT_DELAYED | Chip select not delayed
enum XMC_EBU_EXT_DATA_t

EBU extended data

Enumerator
XMC_EBU_EXT_DATA_OUTPUT_EVERY_1_BFCLK_CYCLES | External memory outputs data every BFCLK cycle
XMC_EBU_EXT_DATA_OUTPUT_EVERY_2_BFCLK_CYCLES | External memory outputs data every two BFCLK cycles
XMC_EBU_EXT_DATA_OUTPUT_EVERY_4_BFCLK_CYCLES | External memory outputs data every four BFCLK cycles
XMC_EBU_EXT_DATA_OUTPUT_EVERY_8_BFCLK_CYCLES | External memory outputs data every eight BFCLK cycles
enum XMC_EBU_FLASH_NON_ARRAY_ACCESS_t

EBU flash non-array access

Enumerator
XMC_EBU_FLASH_NON_ARRAY_ACCESS_DISNABLE | Disable non-array access
XMC_EBU_FLASH_NON_ARRAY_ACCESS_ENABLE | Enable non-array access
enum XMC_EBU_FREQ_EXT_CLK_PIN_t

EBU Frequency of external clock at pin BFCLKO

Enumerator
XMC_EBU_FREQ_EXT_CLK_PIN_EQUAL_TO_INT_CLK | Equal to INT_CLK frequency
XMC_EBU_FREQ_EXT_CLK_PIN_HALF_OF_INT_CLK | 1/2 of INT_CLK frequency
XMC_EBU_FREQ_EXT_CLK_PIN_THIRD_OF_INT_CLK | 1/3 of INT_CLK frequency
XMC_EBU_FREQ_EXT_CLK_PIN_QUARTER_OF_INT_CLK | 1/4 of INT_CLK frequency
enum XMC_EBU_LOCK_CHIP_SELECT_t

EBU lock chip select

Enumerator
XMC_EBU_LOCK_CHIP_SELECT_DISABLED | Chip select cannot be locked
XMC_EBU_LOCK_CHIP_SELECT_ENABLED | Chip select automatically locked after a write operation
enum XMC_EBU_READ_STAGES_SYNC_t

Read single stage synchronization

Enumerator
XMC_EBU_READ_STAGES_SYNC_TWO | Two stages of synchronization used (maximum margin)
XMC_EBU_READ_STAGES_SYNC_ONE | One stage of synchronization used (minimum latency)
enum XMC_EBU_SDRAM_BURST_LENGTH_t

Number of locations can be accessed with a single command

Enumerator
XMC_EBU_SDRAM_BURST_LENGTH_1_LOCATION | One location accessed with a single command
XMC_EBU_SDRAM_BURST_LENGTH_2_LOCATION | Two location accessed with a single command
XMC_EBU_SDRAM_BURST_LENGTH_4_LOCATION | Four location accessed with a single command
XMC_EBU_SDRAM_BURST_LENGTH_8_LOCATION | Eight location accessed with a single command
XMC_EBU_SDRAM_BURST_LENGTH_16_LOCATION | Sixteen location accessed with a single command
enum XMC_EBU_SDRAM_CAS_LATENCY_t

Number of clocks between a READ command and the availability of data

Enumerator
XMC_EBU_SDRAM_CAS_LATENCY_2_CLKS | 2 clocks between a READ command and the availability of data
XMC_EBU_SDRAM_CAS_LATENCY_3_CLKS | 3 clocks between a READ command and the availability of data
enum XMC_EBU_SDRAM_CLK_MODE_t

EBU SDRAM clock mode select

Enumerator
XMC_EBU_SDRAM_CLK_MODE_CONTINUOUSLY_RUNS | Clock continuously running
XMC_EBU_SDRAM_CLK_MODE_DISABLED_BETWEEN_ACCESSES | Clock disabled between accesses
enum XMC_EBU_SDRAM_CLK_OUTPUT_t

EBU disable SDRAM clock output

Enumerator
XMC_EBU_SDRAM_CLK_OUTPUT_ENABLED | Clock output enabled
XMC_EBU_SDRAM_CLK_OUTPUT_DISABLED | Clock output disabled
enum XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_t

EBU mask for bank tag

Enumerator
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_21_to_20 | Mask for bank tag addresses 21 to 20
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_22_to_21 | Mask for bank tag addresses 22 to 21
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_23_to_22 | Mask for bank tag addresses 23 to 22
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_24_to_23 | Mask for bank tag addresses 24 to 23
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_25_to_24 | Mask for bank tag addresses 25 to 24
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_26_to_25 | Mask for bank tag addresses 26 to 25
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_26 | Mask for bank tag addresses 26
enum XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_t

EBU Mask for row tag

Enumerator
XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_9 | Mask for row tag addresses 26 to 9
XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_10 | Mask for row tag addresses 26 to 10
XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_11 | Mask for row tag addresses 26 to 11
XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_12 | Mask for row tag addresses 26 to 12
XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_13 | Mask for row tag addresses 26 to 13
enum XMC_EBU_SDRAM_PWR_MODE_t

EBU power save mode used for gated clock mode

Enumerator
XMC_EBU_SDRAM_PWR_MODE_PRECHARGE_BEFORE_CLK_STOP | Precharge before clock stop
XMC_EBU_SDRAM_PWR_MODE_AUTO_PRECHARGE_BEFORE_CLK_STOP | Auto-precharge before clock stop
XMC_EBU_SDRAM_PWR_MODE_ACTIVE_PWR_DOWN | Active power down (stop clock without precharge)
XMC_EBU_SDRAM_PWR_MODE_CLK_STOP_PWR_DOWN | Clock stop power down
enum XMC_EBU_SDRAM_RFRSH_STATUS_t

SDRAM refresh status

Enumerator
XMC_EBU_SDRAM_RFRSH_STATUS_SELF_REFRESH_ENTRY_STATUS | Self refresh entry command issue successful
XMC_EBU_SDRAM_RFRSH_STATUS_SELF_REFRESH_EXIT_STATUS | Self refresh exit command issue successful
enum XMC_EBU_SDRAM_STATUS_t

EBU SDRAM status

Enumerator
XMC_EBU_SDRAM_STATUS_RX_ERROR | Detected an error when returning read data
XMC_EBU_SDRAM_STATUS_BUSY | The status of power-up initialization sequence
XMC_EBU_SDRAM_STATUS_REFRESH_ERROR | Failed previous refresh req collides with new req
enum XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_t

Number of address bits from bit 0 to be used for column address

Enumerator
XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_8_to_0 | Address [8:0]
XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_9_to_0 | Address [9:0]
XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_10_to_0 | Address [10:0]
enum XMC_EBU_STATUS_t

Status return values for EBU low level driver

Enumerator
XMC_EBU_STATUS_OK | Operation successful
XMC_EBU_STATUS_BUSY | Busy with a previous request
XMC_EBU_STATUS_ERROR | Operation unsuccessful
enum XMC_EBU_WAIT_CONTROL_t

EBU external wait control

Enumerator
XMC_EBU_WAIT_CONTROL_OFF | Default after reset; Wait control off
XMC_EBU_WAIT_CONTROL_SYNC_EARLY_WAIT_ASYNC_ASYNC_INPUT_AT_WAIT | SYNC: Wait for page load (Early WAIT); ASYNC: Asynchronous input at WAIT
XMC_EBU_WAIT_CONTROL_SYNC_WAIT_WITH_DATA_ASYNC_SYNC_INPUT_AT_WAIT | SYNC: Wait for page load (WAIT with data); ASYNC: Synchronous input at WAIT;
XMC_EBU_WAIT_CONTROL_SYNC_ABORT_AND_RETRY_ACCESS | SYNC: Abort and retry access;
enum XMC_EBU_WAIT_SIGNAL_POLARITY_t

EBU reversed polarity at WAIT

Enumerator
XMC_EBU_WAIT_SIGNAL_POLARITY_PIN_ACTIVE_LOW | OFF, input at WAIT pin is active low
XMC_EBU_WAIT_SIGNAL_POLARITY_PIN_ACTIVE_HIGH | Polarity reversed, input at WAIT pin is active high

Function Documentation

void XMC_EBU_AddressSelectDisable | ( | XMC_EBU_t *const | ebu,
 |  | uint32_t | ebu_addr_select_dis,
 |  | const uint32_t | ebu_region_n
 | ) |  |
Parameters
ebu | Constant pointer to XMC_EBU_t, pointing to the EBU base address
ebu_addr_select_dis | Choose between a memory region disable or an alternate region disable
ebu_region_n | A valid region number for which disable and protection settings configured
Returns
None
Description:
Controls the disable and protection settings of a region
The function controls the disable and protection settings of a memory or alternate region. It configures the memory region disable, alternate region disable and the memory region write protect disable for write accesses. The bits ADDRSEL.REGENAB, ADDRSEL.ALTENAB and ADDRSEL.WPROT are configured.
Related APIs:
XMC_EBU_AddressSelectEnable()
void XMC_EBU_AddressSelectEnable | ( | XMC_EBU_t *const | ebu,
 |  | uint32_t | ebu_addr_select_en,
 |  | const uint32_t | ebu_region_n
 | ) |  |
Parameters
ebu | Constant pointer to XMC_EBU_t, pointing to the EBU base address
ebu_addr_select_en | Choose between a memory region enable or an alternate region enable
ebu_region_n | A valid region number for which enable and protection settings need to be configured
Returns
None
Description:
Controls the enable and protection settings of a region
The function controls the enable and protection settings of a memory or alternate region. It configures the memory region enable, alternate region enable and the memory region's write protection. The bit-fields ADDRSEL.REGENAB, ADDRSEL.ALTENAB and ADDRSEL.WPROT are configured.
Related APIs:
XMC_EBU_AddressSelectDisable()
void XMC_EBU_CLKDivideRatio | ( | XMC_EBU_t * | ebu,
 |  | XMC_EBU_CLOCK_DIVIDE_RATIO_t | clock_divide_ratio
 | ) |  |
Parameters
ebu | Constant pointer to XMC_EBU_t, pointing to the EBU base address
clock_divide_ratio | Structure XMC_EBU_CLOCK_DIVIDE_RATIO_t, containing the clock division factors of 1, 2, 3 and 4 respectively
Returns
None
Description:
Sets the clock divide ratio for EBU peripheral
The function sets the CLC.EBUDIV bit-field to configure the clock divide ratio value (input clock divide by factor).
Related APIs:
XMC_EBU_Enable(), XMC_EBU_Disable() and XMC_EBU_GetCLKStatus()
void XMC_EBU_ConfigureRegion | ( | XMC_EBU_t *const | ebu,
 |  | const XMC_EBU_REGION_t *const | region
 | ) |  |
Parameters
ebu | Constant pointer to XMC_EBU_t, pointing to the EBU base address
region | Constant pointer to a constant XMC_EBU_REGION_t structure containing the read, read timing, write and write timing configurations for a region of EBU
Returns
None
Description:
Configures the SDRAM
The function configures the EBU region read, read timing, write and write timing parameter configuration. It also configures the region registers for read and write accesses. Please see XMC_EBU_REGION_t for more information.
void XMC_EBU_ConfigureSdram | ( | XMC_EBU_t *const | ebu,
 |  | const XMC_EBU_SDRAM_CONFIG_t *const | config
 | ) |  |
Parameters
ebu | Constant pointer to XMC_EBU_t, pointing to the EBU base address
config | Constant pointer to a constant XMC_EBU_SDRAM_CONFIG_t structure containing the SDRAM configuration, operation mode configuration and right refresh parameters
Returns
None
Description:
Configures the SDRAM
The function enables the SDRAM, sets SDRAM configuration parameters such as operation mode and refresh parameters. Please see XMC_EBU_SDRAM_CONFIG_t for more information.
void XMC_EBU_Disable ( XMC_EBU_t *const ebu )
Parameters
ebu Constant pointer to XMC_EBU_t, pointing to the EBU base address
Returns
None
Description:
Disable EBU peripheral
The function asserts the peripheral reset. It also disables the control of the EBU.
Related APIs:
XMC_EBU_Enable(), XMC_SCU_RESET_DeassertPeripheralReset()
void XMC_EBU_Enable ( XMC_EBU_t *const ebu )
Parameters
ebu Constant pointer to XMC_EBU_t, pointing to the EBU base address
Returns
None
Description:
Enable EBU peripheral
The function de-asserts the peripheral reset. The peripheral needs to be initialized. It also enables the control of the EBU.
Related APIs:
XMC_EBU_Disable(), XMC_SCU_RESET_AssertPeripheralReset()
uint32_t XMC_EBU_GetBusWriteConfStatus | ( | XMC_EBU_t *const | ebu,
 |  | const XMC_EBU_BUSWCON_SELECT_t | ebu_buswcon_status,
 |  | const uint32_t | ebu_region_n
 | ) |  |
Parameters
ebu | Constant pointer to XMC_EBU_t, pointing to the EBU base address
ebu_buswcon_status | Enumeration of type XMC_EBU_BUSWCON_SELECT_t, representing values for non-array access and device addressing modes.
ebu_region_n | A valid region number for which status pertaining to WRITE is required
Returns
Status Status of non-array access and device addressing mode
Description:
Gets WRITE specific status for a region
The function gets status of the various WRITE specific settings for a region. Status for non-array access enable and device addressing mode are obtained. The status bits of the BUSWCON register are returned.
Related APIs:
XMC_EBU_ConfigureRegion()
uint32_t XMC_EBU_GetCLKStatus | ( | XMC_EBU_t *const | ebu,
 |  | const XMC_EBU_CLK_STATUS_t | clk_status
 | ) |  |
Parameters
ebu | Constant pointer to XMC_EBU_t, pointing to the EBU base address
clk_status | Constant structure XMC_EBU_CLK_STATUS_t, containing the disable status, clock mode status, DIV2 clock mode status and clock divide ratio
Returns
Status Returns clock status, disable status, clock mode status, DIV2 clock mode status and clock divide ratio
Description:
Gets the clock status of EBU peripheral
The function returns the clock staus of the EBU peripheral. The return value will indicate the following parameters:
1) Is EBU disabled?
2) Clocking mode
3) DIV2 clocking mode
4) Clock divide ratio
Related APIs:
XMC_EBU_Enable(), XMC_EBU_Disable() and XMC_EBU_CLKDivideRatio()
XMC_EBU_STATUS_t XMC_EBU_Init | ( | XMC_EBU_t *const | ebu,
 |  | const XMC_EBU_CONFIG_t *const | config
 | ) |  |
Parameters
ebu | Constant pointer to XMC_EBU_t, pointing to the EBU base address
config | Constant pointer to a constant XMC_EBU_CONFIG_t structure containing the clock mode and clock configuration.
Returns
XMC_EBU_STATUS_t Always returns XMC_EBU_STATUS_OK (Only register assignment statements)
Description:
Initialize the EBU peripheral
The function enables the EBU peripheral, configures time values for clock mode, div2 clock mode, mode configuration, SDRAM tristate, external clock, arbitration, timeout control, ALE mode and configuration to free up the allocated EBU ports for GPIO functionality (if required).
bool XMC_EBU_IsBusAribitrationSelected ( XMC_EBU_t *const ebu )
Parameters
ebu Constant pointer to XMC_EBU_t, pointing to the EBU base address
Returns
bool Returns if the arbitration mode is selected or not
Description:
Check if arbitration mode of EBU peripheral is selected
The bit field ARBMODE of MODCON indicates the selected arbitration mode of the EBU. The follwing are the supported arbitration modes:
1) Arbiter Mode arbitration mode
2) Participant arbitration mode
3) Sole Master arbitration mode

If any of the above modes are selected, the function returns "true". It returns false otherwise.

Related APIs:
XMC_EBU_Init()

void XMC_EBU_SdramDisableAutomaticSelfRefresh ( XMC_EBU_t *const ebu )
Parameters
ebu Constant pointer to XMC_EBU_t, pointing to the EBU base address
Returns
None
Description:
Resets the SDRAM automatic self refresh
The function resets the SDRMREF.AUTOSELFR bit-field. When reset, the memory controller doesn't issue the self refresh entry command when it gives up control of the external bus. It will also not issue the self refresh exit command when it regains control of the bus.
Related APIs:
XMC_EBU_SdramEnableAutomaticSelfRefresh()
void XMC_EBU_SdramDisableAutoRefreshSelfRefreshExit ( XMC_EBU_t *const ebu )
Parameters
ebu Constant pointer to XMC_EBU_t, pointing to the EBU base address
Returns
None
Description:
Resets the SDRAM auto refresh on self refresh exit
The function resets the SDRMREF.ARFSH bit to disable an auto refresh cycle on existing self refresh before the self refresh exit delay. No refresh will be performed.
Related APIs:
XMC_EBU_SdramEnableAutoRefreshSelfRefreshExit()
void XMC_EBU_SdramEnableAutomaticSelfRefresh ( XMC_EBU_t *const ebu )
Parameters
ebu Constant pointer to XMC_EBU_t, pointing to the EBU base address
Returns
None
Description:
Sets the SDRAM automatic self refresh
The function sets the SDRMREF.AUTOSELFR bit-field. When set, the memory controller automatically issues the self refresh entry command to all SDRAM units devices when it gives up control of the external bus. It will also automatically issue the self refresh exit command when it regains control of the bus.
Related APIs:
XMC_EBU_SdramDisableAutomaticSelfRefresh()
void XMC_EBU_SdramEnableAutoRefreshSelfRefreshExit ( XMC_EBU_t *const ebu )
Parameters
ebu Constant pointer to XMC_EBU_t, pointing to the EBU base address
Returns
None
Description:
Sets the SDRAM auto refresh on self refresh exit
The function sets the SDRMREF.ARFSH bit-field to enable an auto refresh cycle on existing self refresh before the self refresh exit delay.
Related APIs:
XMC_EBU_SdramDisableAutoRefreshSelfRefreshExit()
uint32_t XMC_EBU_SdramGetRefreshStatus | ( | XMC_EBU_t *const | ebu,
 |  | const XMC_EBU_SDRAM_RFRSH_STATUS_t | sdram_rfrsh_status
 | ) |  |
Parameters
ebu | Constant pointer to XMC_EBU_t, pointing to the EBU base address
sdram_rfrsh_status | Constant enum of type XMC_EBU_SDRAM_RFRSH_STATUS_t
Returns
Status Status of self refresh entry and exit command issue
Description:
Gets SDRAM refresh status
The function gets SDRAM refresh status for self refresh entry/exit command successful issue. The bit-fields of SDRMREF indicate various states:
SELFRENST reflects successful issue of self refresh entry command
SELFREXST reflects successful issue of self refresh exit command
Related APIs:
XMC_EBU_SdramResetSelfRefreshEntry(), XMC_EBU_SdramResetSelfRefreshExit()
uint32_t XMC_EBU_SdramGetStatus ( XMC_EBU_t *const ebu )
Parameters
ebu Constant pointer to XMC_EBU_t, pointing to the EBU base address
Returns
Status SDRAM error or busy states
Description:
Gets SDRAM error or busy states
The function gets SDRAM read error, refresh error and busy states. The bit-fields of SDRSTAT indicate the various states. REFERR reflects a failed previous refresh request collision with a new request. SDRMBUSY indicates the status of power-up initialization sequence. It indicates if it is running or not running. SDERR indicates if the SDRAM controller has detected an error when returning the read data.
Related APIs:
XMC_EBU_ConfigureSdram()
void XMC_EBU_SdramResetSelfRefreshEntry ( XMC_EBU_t *const ebu )
Parameters
ebu Constant pointer to XMC_EBU_t, pointing to the EBU base address
Returns
None
Description:
Resets the SDRAM self refresh entry
The function resets the SDRMREF.SELFREN bit-field to stop issuing the self refresh command to all the SDRAM units. This ensures that the SDRAM units don't go into the power down mode after the pre-charge is all done.
void XMC_EBU_SdramResetSelfRefreshExit ( XMC_EBU_t *const ebu )
Parameters
ebu Constant pointer to XMC_EBU_t, pointing to the EBU base address
Returns
None
Description:
Resets the SDRAM self refresh exit (Power up)
The function resets the SDRMREF.SELFREX bit-field to stop issuing the self refresh command to all the SDRAM units connected to the bus. This ensures that the SDRAM units don't come out of the power down mode.
void XMC_EBU_SdramSetSelfRefreshEntry ( XMC_EBU_t *const ebu )
Parameters
ebu Constant pointer to XMC_EBU_t, pointing to the EBU base address
Returns
None
Description:
Sets the SDRAM self refresh entry
The function sets the SDRMREF.SELFREN bit-field to issue the self refresh command to all the SDRAM units. This ensures that the SDRAM units enter the power down mode after pre-charge. The function also resets the bit SDRMREF.SELFREXST(Self refresh exit status).
void XMC_EBU_SdramSetSelfRefreshExit ( XMC_EBU_t *const ebu )
Parameters
ebu Constant pointer to XMC_EBU_t, pointing to the EBU base address
Returns
None
Description:
Sets the SDRAM self refresh exit (Power up)
The function sets the SDRMREF.SELFREX bit to issue the self refresh command to all the SDRAM units. This ensures that the SDRAM units come out of the power down mode. The function also resets the bit SDRMREF.SELFRENST(Self refresh entry status).
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_EBU_BUS_READ_CONFIG_t Struct Reference

XMC_EBU_BUS_READ_CONFIG_t Struct Reference
XMC Peripheral Library » EBU

#include <xmc_ebu.h>

Detailed Description

Read configuration for a region of EBU

The structure presents a convenient way to set/obtain the read and read timing configuration for a region for EBU. The XMC_EBU_ConfigureRegion() can be used to populate the structure with the read configuration values for EBU.

Field Documentation

uint32_t address_cycles

Address Cycles: This bit field determines the number of clock cycles of the address phase.
0000B: 1 clock cycle selected
0001B: 1 clock cycle selected
...
1110B: 14 clock cycles selected
1111B: 15 clock cycles selected

uint32_t address_hold_cycles

Address hold cycles:
This bit field determines the number of clock cycles of the address hold phase.
0000B: 0 clock cycle selected
0001B: 1 clock cycle selected
...
1110B: 14 clock cycles selected
1111B: 15 clock cycles selected

uint32_t command_delay_lines

Command delay cycles:
This bit field determines the basic number of Command Delay phase clock cycles.
0000B: 0 clock cycle selected
0001B: 1 clock cycle selected
...
1110B: 14 clock cycles selected
1111B: 15 clock cycles selected

uint32_t ebu_asynchronous_address_phase

Asynchronous address phase (XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_t)

uint32_t ebu_burst_address_wrapping

Burst address wrapping (XMC_EBU_BURST_ADDRESS_WRAPPING_t)

uint32_t ebu_burst_buffer_sync_mode

Burst buffer mode (XMC_EBU_BURST_BUFFER_SYNC_MODE_t)

uint32_t ebu_burst_flash_clock_feedback

Burst flash clock feedback enable/disable (XMC_EBU_BURST_FLASH_CLOCK_FEEDBACK_t)

uint32_t ebu_burst_flash_clock_mode

Burst flash clock mode select (XMC_EBU_BURST_FLASH_CLOCK_MODE_t)

uint32_t ebu_burst_length_sync

Burst length for synchronous burst (XMC_EBU_BURST_LENGTH_SYNC_t)

uint32_t ebu_burst_signal_sync

Early burst signal enable for synchronous burst (XMC_EBU_BURST_SIGNAL_SYNC_BURST_t)

uint32_t ebu_byte_control

Byte control signal control (XMC_EBU_BYTE_CONTROL_t)

uint32_t ebu_data_hold_cycles_for_read_accesses

Data Hold Cycles for Read Accesses
This bit field determines the basic number of Data Hold phase clock cycles during read accesses. It has no effect in the current implementation

uint32_t ebu_device_addressing_mode

Device addressing mode (XMC_EBU_DEVICE_ADDRESSING_MODE_t)

uint32_t ebu_device_type

Device type for region (XMC_EBU_DEVICE_TYPE_t)

uint32_t ebu_early_chip_select_sync_burst

Early chip select for sync burst (XMC_EBU_EARLY_CHIP_SELECT_SYNC_BURST_t)

uint32_t ebu_ext_data

EBU Extended data (XMC_EBU_EXT_DATA_t)

uint32_t ebu_flash_non_array_access

flash non-array access (XMC_EBU_FLASH_NON_ARRAY_ACCESS_t)

uint32_t ebu_freq_ext_clk_pin

Frequency of external clock at pin BFCLKO (XMC_EBU_FREQ_EXT_CLK_PIN_t)

uint32_t ebu_programmed_wait_states_for_read_accesses

Programmed wait states for read accesses:
Number of programmed wait states for read accesses. For synchronous accesses, this will always be adjusted so that the phase exits on a rising edge of the external clock.
00000B: 1 wait state
00001B: 1 wait state
00010B: 2 wait state
...
11110B: 30 wait states
11111B: 31 wait states

uint32_t ebu_read_stages_synch

Read single stage synchronization

uint32_t ebu_recovery_cycles_after_read_accesses

Recovery cycles after read accesses:
This bit field determines the basic number of clock cycles of the Recovery Phase at the end of read accesses.
000B: No recovery phase clock cycles available
001B: 1 clock cycle selected
...
110B: 6 clock cycles selected
111B: 7 clock cycles selected

uint32_t ebu_recovery_cycles_between_different_regions

Recovery Cycles between Different Regions:
This bit field determines the number of clock cycles of the Recovery Phase between consecutive accesses directed to different regions or different types of access.
0000B: No recovery phase clock cycles available
0001B: 1 clock cycle selected
...
1110B: 14 clock cycles selected
1111B: 15 clock cycles selected

uint32_t ebu_wait_control

External wait control (XMC_EBU_WAIT_CONTROL_t)

uint32_t ebu_wait_signal_polarity

Reversed polarity at WAIT (XMC_EBU_WAIT_SIGNAL_POLARITY_t)

The documentation for this struct was generated from the following file:
  • xmc_ebu.h


XMC Peripheral Library for XMC4000 Family: XMC_EBU_BUS_WRITE_CONFIG_t Struct Reference

XMC_EBU_BUS_WRITE_CONFIG_t Struct Reference
XMC Peripheral Library » EBU

#include <xmc_ebu.h>

Detailed Description

Write configuration for a region of EBU

The structure presents a convenient way to set/obtain the write and write timing configurations for a region of EBU. The XMC_EBU_ConfigureRegion() can be used to populate the structure with the write configuration values of EBU.

Field Documentation

uint32_t address_cycles

Address cycles:
This bit field determines the number of clock cycles of the address phase.
0000B: 1 clock cycle selected
0001B: 1 clock cycle selected
...
1110B: 14 clock cycles selected
1111B: 15 clock cycles selected

uint32_t address_hold_cycles

Address hold cycles:
This bit field determines the number of clock cycles of the address hold phase.
0000B: 0 clock cycle selected
0001B: 1 clock cycle selected
...
1110B: 14 clock cycles selected
1111B: 15 clock cycles selected

uint32_t command_delay_lines

Command delay cycles:
This bit field determines the basic number of Command Delay phase clock cycles.
0000B: 0 clock cycle selected
0001B: 1 clock cycle selected
...
1110B: 14 clock cycles selected
1111B: 15 clock cycles selected

uint32_t ebu_asynchronous_address_phase

Asynchronous address phase (XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_t)

uint32_t ebu_burst_buffer_sync_mode

Burst buffer mode (XMC_EBU_BURST_BUFFER_SYNC_MODE_t)

uint32_t ebu_burst_length_sync

Burst length for synchronous burst (XMC_EBU_BURST_LENGTH_SYNC_t)

uint32_t ebu_burst_signal_sync

Early burst signal enable for synchronous burst (XMC_EBU_BURST_SIGNAL_SYNC_BURST_t)

uint32_t ebu_byte_control

Byte control signal control (XMC_EBU_BYTE_CONTROL_t)

uint32_t ebu_data_hold_cycles_for_write_accesses

Data Hold Cycles for Write Accesses This bit field determines the basic number of Data Hold phase clock cycles during write accesses.
0000B: No recovery phase clock cycles available
0001B: 1 clock cycle selected
...
1110B: 14 clock cycles selected
1111B: 15 clock cycles selected
Frequency of external clock at pin BFCLKO (XMC_EBU_FREQ_EXT_CLK_PIN_t)

uint32_t ebu_device_addressing_mode

Device addressing mode (XMC_EBU_DEVICE_ADDRESSING_MODE_t)

uint32_t ebu_device_type

Device type for region (XMC_EBU_DEVICE_TYPE_t)

uint32_t ebu_early_chip_select_sync_burst

Early chip select for sync burst (XMC_EBU_EARLY_CHIP_SELECT_SYNC_BURST_t)

uint32_t ebu_ext_data

EBU extended data (XMC_EBU_EXT_DATA_t)

uint32_t ebu_lock_chip_select

Lock chip select (XMC_EBU_LOCK_CHIP_SELECT_t)

uint32_t ebu_programmed_wait_states_for_write_accesses

Programmed wait states for write accesses:
Number of programmed wait states for write accesses. For synchronous accesses, this will always be adjusted so that the phase exits on a rising edge of the external clock.
00000B: 1 wait state
00001B: 1 wait state
00010B: 2 wait state
...
11110B: 30 wait states
11111B: 31 wait states

uint32_t ebu_recovery_cycles_after_write_accesses

Recovery cycles after write accesses:
This bit field determines the basic number of clock cycles of the Recovery Phase at the end of write accesses.
000B: No recovery phase clock cycles available
001B: 1 clock cycle selected
...
110B: 6 clock cycles selected
111B: 7 clock cycles selected

uint32_t ebu_recovery_cycles_between_different_regions

Recovery cycles between different regions:
This bit field determines the number of clock cycles of the Recovery Phase between consecutive accesses directed to different regions or different types of access.
0000B: No recovery phase clock cycles available
0001B: 1 clock cycle selected
...
1110B: 14 clock cycles selected
1111B: 15 clock cycles selected

uint32_t ebu_wait_control

External wait control (XMC_EBU_WAIT_CONTROL_t)

uint32_t ebu_wait_signal_polarity

Reversed polarity at WAIT (XMC_EBU_WAIT_SIGNAL_POLARITY_t)

The documentation for this struct was generated from the following file:
  • xmc_ebu.h


XMC Peripheral Library for XMC4000 Family: XMC_EBU_CLK_CONFIG_t Struct Reference

XMC_EBU_CLK_CONFIG_t Struct Reference
XMC Peripheral Library » EBU

#include <xmc_ebu.h>

Detailed Description

Clock configuration values of EBU

The structure presents a convenient way to set/obtain the clock configuration values for clock mode, div2 clock mode and clock divide ratio of EBU. The XMC_EBU_Init() can be used to populate the structure with the clock configuration values of the EBU module.

Field Documentation

uint32_t ebu_clk_mode

Clocking mode (XMC_EBU_CLK_MODE_t)

uint32_t ebu_clock_divide_ratio

Clock divide ratio (XMC_EBU_CLOCK_DIVIDE_RATIO_t)

uint32_t ebu_div2_clk_mode

DIV2 clocking mode (XMC_EBU_DIV2_CLK_MODE_t)

The documentation for this struct was generated from the following file:
  • xmc_ebu.h


XMC Peripheral Library for XMC4000 Family: XMC_EBU_CONFIG_t Struct Reference

Data Fields
XMC_EBU_CONFIG_t Struct Reference
XMC Peripheral Library » EBU

#include <xmc_ebu.h>

Data Fields

XMC_EBU_CLK_CONFIG_t ebu_clk_config
XMC_EBU_FREE_PINS_TO_GPIO_t ebu_free_pins_to_gpio
XMC_EBU_MODE_CONFIG_t ebu_mode_config

Detailed Description

EBU global configurations

The structure presents a convenient way to set/obtain the global configurations of the EBU like clock, mode and GPIO mode. The XMC_EBU_Init() can be used to populate the structure with the region read and write configuration values of EBU.

Field Documentation

XMC_EBU_CLK_CONFIG_t ebu_clk_config

Clock configuration structure

XMC_EBU_FREE_PINS_TO_GPIO_t ebu_free_pins_to_gpio

Free allocated EBU ports for GPIO

XMC_EBU_MODE_CONFIG_t ebu_mode_config

Mode configuration structure

The documentation for this struct was generated from the following file:
  • xmc_ebu.h


XMC Peripheral Library for XMC4000 Family: XMC_EBU_FREE_PINS_TO_GPIO_t Struct Reference

XMC_EBU_FREE_PINS_TO_GPIO_t Struct Reference
XMC Peripheral Library » EBU

#include <xmc_ebu.h>

Detailed Description

GPIO mode configuration for the allocated EBU ports
Configuring this structure frees the allocated EBU ports for GPIO functionality. The XMC_EBU_Init() is used to populate the structure with the GPIO mode for the allocated EBU ports.

Field Documentation

uint32_t address_pins_gpio

0 - Address bit required for addressing memory; 1 - Address bit available as GPIO

uint32_t adv_pin_gpio

Adv pin to GPIO mode

The documentation for this struct was generated from the following file:
  • xmc_ebu.h


XMC Peripheral Library for XMC4000 Family: XMC_EBU_MODE_CONFIG_t Struct Reference

XMC_EBU_MODE_CONFIG_t Struct Reference
XMC Peripheral Library » EBU

#include <xmc_ebu.h>

Detailed Description

Mode configuration values for EBU

The structure presents a convenient way to set/obtain the mode configuration, SDRAM tristate, external clock, arbitration, timeout control and ALE mode for EBU. The XMC_EBU_Init() can be used to populate the structure with the clock configuration values of the EBU module.

Field Documentation

uint32_t bus_timeout_control

Determines num of inactive cycles leading to a bus timeout after the EBU gains ownership
00H: Timeout is disabled
01H: Timeout is generated after 1 x 8 clock cycles
FFH: Timeout is generated after 255 x 8 clock cycles

uint32_t ebu_ale_mode

ALE mode. Switch the ADV output to be an active high ALE signal instead of active low ADV. (XMC_EBU_ALE_MODE_t)

uint32_t ebu_arbitration_mode

Arbitration mode selection (XMC_EBU_ARB_MODE_t)

uint32_t ebu_arbsync

0 - arbitration inputs are sync; 1 - arbitration inputs are async

uint32_t ebu_extlock

0 - ext bus is not locked after the EBU gains ownership; 1 - ext bus is not locked

uint32_t ebu_sdram_tristate

0 - SDRAM cannot be shared; 1 - SDRAM can be shared

The documentation for this struct was generated from the following file:
  • xmc_ebu.h


XMC Peripheral Library for XMC4000 Family: XMC_EBU_REGION_READ_CONFIG_t Struct Reference

Data Fields
XMC_EBU_REGION_READ_CONFIG_t Struct Reference
XMC Peripheral Library » EBU

#include <xmc_ebu.h>

Data Fields

XMC_EBU_BUS_READ_CONFIG_t ebu_bus_read_config
const uint32_t ebu_region_no

Detailed Description

EBU region initialization with read configurations

The structure presents a convenient way to set/obtain the read and read timing configurations for a region of EBU. The XMC_EBU_ConfigureRegion() can be used to populate the structure with the read configuration values of EBU

Field Documentation

XMC_EBU_BUS_READ_CONFIG_t ebu_bus_read_config

Read configuration and access parameters structure

const uint32_t ebu_region_no

Number of region

The documentation for this struct was generated from the following file:
  • xmc_ebu.h


XMC Peripheral Library for XMC4000 Family: XMC_EBU_REGION_t Struct Reference

XMC_EBU_REGION_t Struct Reference
XMC Peripheral Library » EBU

#include <xmc_ebu.h>

Detailed Description

EBU region initialization with read and write configurations

The structure presents a convenient way to set/obtain the read, read timing, write and write timing configurations for a region of EBU. The XMC_EBU_ConfigureRegion() can be used to populate the structure with the region read and write configuration values of EBU.

The documentation for this struct was generated from the following file:
  • xmc_ebu.h


XMC Peripheral Library for XMC4000 Family: XMC_EBU_REGION_WRITE_CONFIG_t Struct Reference

Data Fields
XMC_EBU_REGION_WRITE_CONFIG_t Struct Reference
XMC Peripheral Library » EBU

#include <xmc_ebu.h>

Data Fields

XMC_EBU_BUS_WRITE_CONFIG_t ebu_bus_write_config
const uint32_t ebu_region_no

Detailed Description

EBU region initialization with write configurations

The structure presents a convenient way to set/obtain the write and write timing configurations for a region of EBU. The XMC_EBU_ConfigureRegion() can be used to populate the structure with the write configuration values of EBU.

Field Documentation

XMC_EBU_BUS_WRITE_CONFIG_t ebu_bus_write_config

Write configuration and access parameters structure

const uint32_t ebu_region_no

Number of refresh counter period

The documentation for this struct was generated from the following file:
  • xmc_ebu.h


XMC Peripheral Library for XMC4000 Family: XMC_EBU_SDRAM_CONFIG_t Struct Reference

XMC_EBU_SDRAM_CONFIG_t Struct Reference
XMC Peripheral Library » EBU

#include <xmc_ebu.h>

Detailed Description

SDRAM configuration structure

The structure is a placeholder for setting (and obtaining) the SDRAM configuration, operation mode configuration and the right refresh parameters. The XMC_EBU_ConfigureSdram() can be used to populate the structure with the SDRAM operation mode and refresh parameters configuration.

Field Documentation

uint32_t ebu_init_refresh_commands_counter

(CRFSH) Number of refresh commands issued during powerup init sequence: Perform CRFSH + 1 refresh cycles

uint32_t ebu_mode_register_set_up_time

(CRSC) Number of NOP cycles after a mode register set command: Insert CRSC + 1 NOP cycles

uint32_t ebu_row_precharge_delay_counter

Number of clock cycles between row activate command and a precharge command

uint32_t ebu_row_precharge_time_counter

(CRP) Number of NOP cycles inserted after a precharge command: Insert CRP + 1 NOP cycles

uint32_t ebu_sdram_auto_refresh

If 1, an auto refresh cycle will be performed; If 0, no refresh will be performed

uint32_t ebu_sdram_auto_self_refresh

If 1, memory controller will automatically issue the "self refresh entry" command to all SDRAM devices when it gives up control of the external bus. It will also automatically issue "self refresh exit" when it regains control of the bus

uint32_t ebu_sdram_burst_length

Number of locations can be accessed with a single command

uint32_t ebu_sdram_casclk_mode

Number of clocks between a READ command and the availability of data

uint32_t ebu_sdram_clk_mode

SDRAM clock mode select

uint32_t ebu_sdram_clk_output

Disable SDRAM clock output

uint32_t ebu_sdram_cold_start

Cold start

uint32_t ebu_sdram_delay_on_power_down_exit

Number of NOPs after the SDRAM controller exits power down before an active command is permitted

uint32_t ebu_sdram_extended_operation_bank_select

Value to be written to the bank select pins of a mobile SDRAM device during an extended mode register write operation

uint32_t ebu_sdram_extended_operation_mode

Value to be written to the extended mode register of a mobile SDRAM device

uint32_t ebu_sdram_extended_refresh_counter_period

Extended number of refresh counter period

uint32_t ebu_sdram_mask_for_bank_tag

Mask for bank tag

uint32_t ebu_sdram_mask_for_row_tag

Mask for row tag

uint32_t ebu_sdram_num_refresh_cmnds

Number of refresh commands

uint32_t ebu_sdram_num_refresh_counter_period

Number of refresh counter period: Refresh period is 'num_refresh_counter_period' x 64 clock cycles

uint32_t ebu_sdram_pwr_mode

Power Save Mode used for gated clock mode

uint32_t ebu_sdram_row_cycle_time_counter

Row cycle time counter: Insert (CRCE * 8) + CRC + 1 NOP cycles

uint32_t ebu_sdram_row_cycle_time_counter_extension

Extension to the Row cycle time counter (CRCE)

uint32_t ebu_sdram_row_to_column_delay_counter

(CRCD) Number of NOP cycles between a row address and a column address: Insert CRCD + 1 NOP cycles

uint32_t ebu_sdram_self_refresh_entry

If "1", the self refresh entry command is issued to all SDRAM devices, regardless regardless of their attachment to type 0 or type 1

uint32_t ebu_sdram_self_refresh_exit

If 1, the self refresh exit command is issued to all SDRAM devices regardless of their attachment to type 0 or type 1

uint32_t ebu_sdram_self_refresh_exit_delay

Number of NOP cycles inserted after a self refresh exit before a command is permitted to the SDRAM/DDRAM

uint32_t ebu_sdram_width_of_column_address

Number of address bits from bit 0 to be used for column address

The documentation for this struct was generated from the following file:
  • xmc_ebu.h


XMC Peripheral Library for XMC4000 Family: XMC_EBU_t Struct Reference

XMC_EBU_t Struct Reference
XMC Peripheral Library » EBU

#include <xmc_ebu.h>

Detailed Description

External Bus Unit (EBU) device structure

The structure represents a collection of all hardware registers used to configure the EBU peripheral on the XMC4500 microcontroller. The registers can be accessed with XMC_EBU.

The documentation for this struct was generated from the following file:
  • xmc_ebu.h


XMC Peripheral Library for XMC4000 Family: ECAT

Data Structures | Enumerations | Functions
ECAT
XMC Peripheral Library

Data Structures

union | XMC_ECAT_CONFIG_t
struct | XMC_ECAT_PORT_CTRL_t

Enumerations

Functions

void | XMC_ECAT_Disable (void)
void | XMC_ECAT_DisableEvent (uint32_t event)
void | XMC_ECAT_DisableSyncManChannel (const uint8_t channel)
void | XMC_ECAT_Enable (void)
void | XMC_ECAT_EnableEvent (uint32_t event)
void | XMC_ECAT_EnableSyncManChannel (const uint8_t channel)
uint16_t | XMC_ECAT_GetALEventMask (void)
uint16_t | XMC_ECAT_GetALEventRegister (void)
uint32_t | XMC_ECAT_GetEventStatus (void)
void | XMC_ECAT_Init (XMC_ECAT_CONFIG_t *const config)
XMC_ECAT_STATUS_t | XMC_ECAT_ReadPhy (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
void | XMC_ECAT_SetALEventMask (uint16_t intMask)
void | XMC_ECAT_SetPortControl (const XMC_ECAT_PORT_CTRL_t port_ctrl)
XMC_ECAT_STATUS_t | XMC_ECAT_WritePhy (uint8_t phy_addr, uint8_t reg_addr, uint16_t data)

Detailed Description

EtherCAT is an Ethernet-based fieldbus system. The EtherCAT Slave Controller (ECAT) read the data addressed to them while the telegram passes through the device. An EtherCAT Slave Controller (ESC) takes care of the EtherCAT communication as an interface between the EtherCAT fieldbus and the slave application. EtherCAT uses standard IEEE 802.3 Ethernet frames, thus a standard network controller can be used and no special hardware is required on master side. EtherCAT has a reserved EtherType of 0x88A4 that distinguishes it from other Ethernet frames. Thus, EtherCAT can run in parallel to other Ethernet protocols. EtherCAT does not require the IP protocol, however it can be encapsulated in IP/UDP. The EtherCAT Slave Controller processes the frame in hardware. Thus, communication performance is independent from processor power.

The XMC_ECAT low level driver provides functions to configure and initialize the ECAT hardware peripheral. For EHTERCAT stack integration, the necessary hardware accees layer APIs shall be explicitly implemented depending upon the stack provider. The XMC_ECAT lld layer provides only the hardware initialization functions for start up and basic functionalities.

Enumeration Type Documentation

enum XMC_ECAT_EVENT_t

EtherCAT event enumeration types

Enumerator
XMC_ECAT_EVENT_AL_CONTROL | Application control event mask
XMC_ECAT_EVENT_DC_LATCH | Distributed Clock latch event mask
XMC_ECAT_EVENT_DC_SYNC0 | State of distributed clock sync-0 event mask
XMC_ECAT_EVENT_DC_SYNC1 | State of distributed clock sync-1 event mask
XMC_ECAT_EVENT_SM_ACTIVATION_REGISTER | SyncManager activation register mask
XMC_ECAT_EVENT_EEPROM | EEPROM Emulation event mask
XMC_ECAT_EVENT_WATCHDOG | WATCHDOG process data event mask
XMC_ECAT_EVENT_SM0 | Sync Manager 0 event mask
XMC_ECAT_EVENT_SM1 | Sync Manager 1 event mask
XMC_ECAT_EVENT_SM2 | Sync Manager 2 event mask
XMC_ECAT_EVENT_SM3 | Sync Manager 3 event mask
XMC_ECAT_EVENT_SM4 | Sync Manager 4 event mask
XMC_ECAT_EVENT_SM5 | Sync Manager 5 event mask
XMC_ECAT_EVENT_SM6 | Sync Manager 6 event mask
XMC_ECAT_EVENT_SM7 | Sync Manager 7 event mask
enum XMC_ECAT_STATUS_t

ECAT status return values

Enumerator
XMC_ECAT_STATUS_OK | Driver accepted application request
XMC_ECAT_STATUS_BUSY | Driver is busy and cannot handle request
XMC_ECAT_STATUS_ERROR | Driver could not fulfil application request

Function Documentation

void XMC_ECAT_Disable ( void )
Parameters
None
Returns
None
Description:
Disable the EtherCAT peripheral
The function asserts the peripheral reset.
void XMC_ECAT_DisableEvent ( uint32_t event )
Parameters
event Single or logically OR'd events specified in the enum type
Returns
None
Description:
Disable an ECAT event(s)
The function can be used to disable ECAT event(s).
void XMC_ECAT_DisableSyncManChannel ( const uint8_t channel )
Parameters
channel SyncManager channel number.
Returns
None
Description:
Disables selected SyncManager channel
Sets bit 0 of the corresponding 0x807 register.
void XMC_ECAT_Enable ( void )
Parameters
None
Returns
None
Description:
Enable the EtherCAT peripheral
The function de-asserts the peripheral reset.
void XMC_ECAT_EnableEvent ( uint32_t event )
Parameters
event Single or logically OR'd events specified in the enum type
Returns
None
Description:
Enable ECAT event(s)
The function can be used to enable ECAT event(s).
void XMC_ECAT_EnableSyncManChannel ( const uint8_t channel )
Parameters
channel SyncManager channel number.
Returns
None
Description:
Enables selected SyncManager channel
Resets bit 0 of the corresponding 0x807 register.
uint16_t XMC_ECAT_GetALEventMask ( void )
Parameters
None
Returns
uint16_t Content of register 0x220-0x221
Description:
Get content of AL event register
Get the first two bytes of the AL Event register (0x220-0x221).
uint16_t XMC_ECAT_GetALEventRegister ( void )
Parameters
None
Returns
uint16_t Content of register 0x220-0x221
Description:
Get content of AL event register
Get the first two bytes of the AL Event register (0x220-0x221).
uint32_t XMC_ECAT_GetEventStatus ( void )
Parameters
None
Returns
uint32_t Event status
Description:
Get event status
The function returns the ECAT status and interrupt status as a single word. The user can then check the status of the events by using an appropriate mask.
void XMC_ECAT_Init ( XMC_ECAT_CONFIG_t *const config )
Parameters
config XMC_ECAT_CONFIG_t
Returns
XMC_ECAT_STATUS_t ECAT Initialization status
Description:
Initialize the Ethernet MAC peripheral
The function sets the link speed, applies the duplex mode, sets auto-negotiation and loop-back settings.
XMC_ECAT_STATUS_t XMC_ECAT_ReadPhy | ( | uint8_t | phy_addr,
 |  | uint8_t | reg_addr,
 |  | uint16_t * | data
 | ) |  |
Parameters
phy_addr | PHY address
reg_addr | Register address
data | The destination to which the read data needs to be copied to.
Returns
XMC_ECAT_STATUS_t EtherCAT Read PHY API return status
Description:
Read a PHY register
The function reads a PHY register. It essentially polls busy bit during max PHY_TIMEOUT time and reads the information into 'data' when not busy.
void XMC_ECAT_SetALEventMask ( uint16_t intMask )
Parameters
intMask Interrupt mask (disabled interrupt shall be zero)
Returns
None
Description:
Sets application event mask register
Performs a logical OR with the AL Event Mask register (0x0204 : 0x0205).
void XMC_ECAT_SetPortControl ( const XMC_ECAT_PORT_CTRL_t port_ctrl )
Parameters
port_ctrl Port control configuration
Returns
None
Description:
Set port control configuration
The function sets the port control by writing the configuration into the ECAT CON register.
XMC_ECAT_STATUS_t XMC_ECAT_WritePhy | ( | uint8_t | phy_addr,
 |  | uint8_t | reg_addr,
 |  | uint16_t | data
 | ) |  |
Parameters
phy_addr | PHY address
reg_addr | Register address
data | The data to write
Returns
XMC_ECAT_STATUS_t EtherCAT Write PHY API return status
Description:
Write a PHY register
The function reads a PHY register. It essentially writes the data and polls the busy bit until it is no longer busy.
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_ECAT_CONFIG_t Union Reference

Data Fields
XMC_ECAT_CONFIG_t Union Reference
XMC Peripheral Library » ECAT

#include <xmc_ecat.h>

Data Fields

uint32_t | dword [4]
uint16_t | station_alias
uint16_t | sync_pulse_length

Detailed Description

ECAT EEPROM configuration area data structure

Field Documentation

uint32_t dword[4]

Four 32 bit double word equivalent to 8 16 bit configuration area word.

uint16_t station_alias

Initialization value for Configured Station Alias Address register

uint16_t sync_pulse_length

Initialization value for Pulse Length of SYNC Signals register

The documentation for this union was generated from the following file:
  • xmc_ecat.h


XMC Peripheral Library for XMC4000 Family: XMC_ECAT_PORT_CTRL_t Struct Reference

XMC_ECAT_PORT_CTRL_t Struct Reference
XMC Peripheral Library » ECAT

#include <xmc_ecat.h>

Detailed Description

ECAT port control data structure

Field Documentation

uint32_t __pad0__

Reserved bits

uint32_t __pad1__

Reserved bits

uint32_t __pad2__

Reserved bits

uint32_t __pad3__

Reserved bits

uint32_t __pad4__

Reserved bits

uint32_t enable_rstreq

Master can trigger a reset of the XMC4700 / XMC4800 (::bool)

uint32_t latch_input0

Latch input 0 selection (::XMC_ECAT_PORT_LATCHIN0_t)

uint32_t latch_input1

Latch input 1 selection (::XMC_ECAT_PORT_LATCHIN1_t)

uint32_t link

Link status (::XMC_ECAT_PORT0_CTRL_LINK_t)

Link status (::XMC_ECAT_PORT_CTRL_LINK_t)

uint32_t mdio

Bidirectional, push-pull management data I/O line (XMC_ETH_MAC_PORT_CTRL_MDIO_t)

uint32_t phyaddr_offset

Ethernet PHY address offset, address of port 0

uint32_t rx_clk

RX Clock (::XMC_ECAT_PORT0_CTRL_RX_CLK_t)

RX Clock (::XMC_ECAT_PORT_CTRL_RX_CLK_t)

uint32_t rx_dv

RX Data valid (::XMC_ECAT_PORT0_CTRL_RX_DV_t)

RX Data valid (::XMC_ECAT_PORT_CTRL_RX_DV_t)

uint32_t rx_err

RX Error (::XMC_ECAT_PORT0_CTRL_RX_ERR_t)

RX Error (::XMC_ECAT_PORT_CTRL_RX_ERR_t)

uint32_t rxd0

Receive data bit 0 (::XMC_ECAT_PORT0_CTRL_RXD0_t)

Receive data bit 0 (::XMC_ECAT_PORT_CTRL_RXD0_t)

uint32_t rxd1

Receive data bit 1 (::XMC_ECAT_PORT0_CTRL_RXD1_t)

Receive data bit 1 (::XMC_ECAT_PORT_CTRL_RXD1_t)

uint32_t rxd2

Receive data bit 2 (::XMC_ECAT_PORT0_CTRL_RXD2_t)

Receive data bit 2 (::XMC_ECAT_PORT_CTRL_RXD2_t)

uint32_t rxd3

Receive data bit 3 (::XMC_ECAT_PORT0_CTRL_RXD3_t)

Receive data bit 3 (::XMC_ECAT_PORT_CTRL_RXD3_t)

uint32_t tx_clk

TX Clock (::XMC_ECAT_PORT0_CTRL_TX_CLK_t)

TX Clock (::XMC_ECAT_PORT_CTRL_TX_CLK_t)

uint32_t tx_shift

TX signal delay (::XMC_ECAT_PORT0_CTRL_TX_SHIFT_t)

TX signal delay (::XMC_ECAT_PORT1_CTRL_TX_SHIFT_t)

The documentation for this struct was generated from the following file:
  • xmc_ecat.h


XMC Peripheral Library for XMC4000 Family: ERU

Data Structures | Enumerations | Functions
ERU
XMC Peripheral Library

Data Structures

struct | XMC_ERU_ETL_CONFIG_t
union | XMC_ERU_OGU_CONFIG_t
struct | XMC_ERU_t

Enumerations

Functions

void | XMC_ERU_Disable (XMC_ERU_t *const eru)
void | XMC_ERU_Enable (XMC_ERU_t *const eru)
void | XMC_ERU_ETL_ClearStatusFlag (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_DisableOutputTrigger (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_EnableOutputTrigger (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t trigger)
XMC_ERU_ETL_EDGE_DETECTION_t | XMC_ERU_ETL_GetEdgeDetection (XMC_ERU_t *const eru, const uint8_t channel)
uint32_t | XMC_ERU_ETL_GetStatusFlag (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_Init (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_CONFIG_t *const config)
void | XMC_ERU_ETL_SetEdgeDetection (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_EDGE_DETECTION_t edge_detection)
void | XMC_ERU_ETL_SetInput (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_INPUT_A_t input_a, const XMC_ERU_ETL_INPUT_B_t input_b)
void | XMC_ERU_ETL_SetSource (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_SOURCE_t source)
void | XMC_ERU_ETL_SetStatusFlag (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_SetStatusFlagMode (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_STATUS_FLAG_MODE_t mode)
void | XMC_ERU_OGU_DisablePatternDetection (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_OGU_DisablePeripheralTrigger (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_OGU_EnablePatternDetection (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t input)
void | XMC_ERU_OGU_EnablePeripheralTrigger (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_PERIPHERAL_TRIGGER_t peripheral_trigger)
uint32_t | XMC_ERU_OGU_GetPatternDetectionStatus (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_OGU_Init (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_CONFIG_t *const config)
void | XMC_ERU_OGU_SetServiceRequestMode (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_SERVICE_REQUEST_t mode)

Detailed Description

The Event Request Unit (ERU) is a versatile multiple input event detection and processing unit. The ERU module can be used to expand the P-to-P connections of the device: ports-to-peripherals, peripherals-to-peripherals and ports-to-ports. It also offers configurable logic, that allows the generation of triggers, pattern detection and real-time signal monitoring.

The driver is divided into two sections:

Event trigger logic (ERU_ETL):
This section of the LLD provides the configuration structure XMC_ERU_ETL_CONFIG_t and the initialization function XMC_ERU_ETL_Init().
It can be used to:
  1. Select one out of two inputs (A and B). For each of these two inputs, a vector of 4 possible signals is available. (XMC_ERU_ETL_SetSource())
  2. Logically combine the two input signals to a common trigger. (XMC_ERU_ETL_SetSource())
  3. Define the transition (edge selection, or by software) that leads to a trigger event and can also store this status. (XMC_ERU_ETL_SetEdgeDetection() and XMC_ERU_ETL_SetStatusFlag())
  4. Distribute the events and status flags to the output channels. (XMC_ERU_ETL_EnableOutputTrigger())
Output gating unit (ERU_OGU):
This section of the LLD provides the provides the configuration structure XMC_ERU_OGU_CONFIG_t and the initialization function XMC_ERU_ETL_OGU_Init(). It can be used to:
  1. Combine the trigger events and status information and gates the output depending on a gating signal. (XMC_ERU_OGU_EnablePatternDetection(), XMC_ERU_OGU_DisablePeripheralTrigger(), XMC_ERU_OGU_SetServiceRequestMode())

Enumeration Type Documentation

enum XMC_ERU_ETL_EDGE_DETECTION_t

Defines trigger edge for the event generation by ETLx (Event Trigger Logic, x = [0 to 3]) unit, by getting the signal from ERSx(Event request source, x = [0 to 3]) unit.

Enumerator
XMC_ERU_ETL_EDGE_DETECTION_DISABLED | no event enabled
XMC_ERU_ETL_EDGE_DETECTION_RISING | detection of rising edge generates the event
XMC_ERU_ETL_EDGE_DETECTION_FALLING | detection of falling edge generates the event
XMC_ERU_ETL_EDGE_DETECTION_BOTH | detection of either edges generates the event
enum XMC_ERU_ETL_INPUT_A_t

Defines input signal for path A of ERSx(Event request source, x = [0 to 3]) unit.

ETLx Input A selection
Enumerator
XMC_ERU_ETL_INPUT_A0 | input A0 is selected
XMC_ERU_ETL_INPUT_A1 | input A1 is selected
XMC_ERU_ETL_INPUT_A2 | input A2 is selected
XMC_ERU_ETL_INPUT_A3 | input A3 is selected
enum XMC_ERU_ETL_INPUT_B_t

Defines input signal for path B of ERSx(Event request source, x = [0 to 3]) unit.

ETLx Input B selection
Enumerator
XMC_ERU_ETL_INPUT_B0 | input B0 is selected
XMC_ERU_ETL_INPUT_B1 | input B1 is selected
XMC_ERU_ETL_INPUT_B2 | input B2 is selected
XMC_ERU_ETL_INPUT_B3 | input B3 is selected
enum XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t

Defines Output Channel of OGUy(Output gating unit y = [0 to 3]) to be mapped by the trigger pulse generated by ETLx(Event Trigger Logic, x = [0 to 3]) unit.

Note
Generation of output trigger pulse need to be enabled XMC_ERU_OGU_PERIPHERAL_TRIGGER_t
ERU_ETL ERU_OGU Connection matrix
Enumerator
XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL0 | Event from input ETLx triggers output OGU0
XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL1 | Event from input ETLx triggers output OGU1
XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL2 | Event from input ETLx triggers output OGU2
XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL3 | Event from input ETLx triggers output OGU3
enum XMC_ERU_ETL_OUTPUT_TRIGGER_t

Defines generation of the trigger pulse by ETLx(Event Trigger Logic, x = [0 to 3]) unit. Use type XMC_ERU_ETL_OUTPUT_TRIGGER_t for this enum.

Enumerator
XMC_ERU_ETL_OUTPUT_TRIGGER_DISABLED | trigger pulse generation disabled
XMC_ERU_ETL_OUTPUT_TRIGGER_ENABLED | trigger pulse generation enabled
enum XMC_ERU_ETL_SOURCE_t

Defines input path combination along with polarity for event generation by ERSx(Event request source) unit to ETLx(Event trigger logic),x = [0 to 3] unit.

ETLx input trigger signal generation
Enumerator
XMC_ERU_ETL_SOURCE_A | select (A) path as a event source
XMC_ERU_ETL_SOURCE_B | select (B) path as a event source
XMC_ERU_ETL_SOURCE_A_OR_B | select (A OR B) path as a event source
XMC_ERU_ETL_SOURCE_A_AND_B | select (A AND B) path as a event source
XMC_ERU_ETL_SOURCE_NOT_A | select (inverted A) path as a event source
XMC_ERU_ETL_SOURCE_NOT_A_OR_B | select (inverted A OR B) path as a event source
XMC_ERU_ETL_SOURCE_NOT_A_AND_B | select (inverted A AND B) path as a event source
XMC_ERU_ETL_SOURCE_NOT_B | select (inverted B) path as a event source
XMC_ERU_ETL_SOURCE_A_OR_NOT_B | select (A OR inverted B) path as a event source
XMC_ERU_ETL_SOURCE_A_AND_NOT_B | select (A AND inverted B) path as a event source
XMC_ERU_ETL_SOURCE_NOT_A_OR_NOT_B | select (inverted A OR inverted B) path as a event source
XMC_ERU_ETL_SOURCE_NOT_A_AND_NOT_B | select (inverted A AND inverted B) path as a event source
enum XMC_ERU_ETL_STATUS_FLAG_MODE_t

Defines status flag reset mode generated by ETLx(Event Trigger Logic, x = [0 to 3]) unit. Use type XMC_ERU_ETL_STATUS_FLAG_MODE_t for this enum.

Enumerator
XMC_ERU_ETL_STATUS_FLAG_MODE_SWCTRL | Status flag is in sticky mode. Retain the same state until cleared by software. In case of pattern match this mode is used.
XMC_ERU_ETL_STATUS_FLAG_MODE_HWCTRL | Status flag is in non-sticky mode. Automatically cleared by the opposite edge detection. eg. if positive edge is selected as trigger event, for the negative edge event the status flag is cleared.
enum XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t

Defines the inputs for Pattern detection. The configured status flag signal from the ETLx(Event Trigger Logic, x = [0 to 3]) unit indicates the pattern to be detected.

Enumerator
XMC_ERU_OGU_PATTERN_DETECTION_INPUT0 | Status flag ETL0, participating in pattern match
XMC_ERU_OGU_PATTERN_DETECTION_INPUT1 | Status flag ETL1, participating in pattern match
XMC_ERU_OGU_PATTERN_DETECTION_INPUT2 | Status flag ETL0, participating in pattern match
XMC_ERU_OGU_PATTERN_DETECTION_INPUT3 | Status flag ETL0, participating in pattern match
enum XMC_ERU_OGU_PATTERN_DETECTION_t

Defines pattern detection feature to be enabled or not in OGUy(Output gating unit, y = [0 to 3]).

Enumerator
XMC_ERU_OGU_PATTERN_DETECTION_DISABLED | Pattern match is disabled
XMC_ERU_OGU_PATTERN_DETECTION_ENABLED | Pattern match is enabled, the selected status flags of ETLx(Event Trigger Logic, x = [0 to 3]) unit, are used in pattern detection.
enum XMC_ERU_OGU_PERIPHERAL_TRIGGER_t

Defines peripheral trigger signal for event generation. Based on the selected peripheral for event generation, the trigger signal is mapped.

Enumerator
XMC_ERU_OGU_PERIPHERAL_TRIGGER1 | OGUy1 signal is mapped for event generation
XMC_ERU_OGU_PERIPHERAL_TRIGGER2 | OGUy2 signal is mapped for event generation
XMC_ERU_OGU_PERIPHERAL_TRIGGER3 | OGUy3 signal is mapped for event generation
enum XMC_ERU_OGU_SERVICE_REQUEST_t

Defines the gating scheme for service request generation. In later stage of the OGUy(Output gating unit, y = [0 to 3]) based on the gating scheme selected ERU_GOUTy(gated output signal) output is defined.

Interrupt gating signal
Enumerator
XMC_ERU_OGU_SERVICE_REQUEST_DISABLED | Service request blocked, ERUx_GOUTy = 0
XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER | Service request generated enabled, ERUx_GOUTy = 1
XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MATCH | Service request generated on trigger event and input pattern match, ERUx_GOUTy = ~pattern matching result
XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MISMATCH | Service request generated on trigger event and input pattern mismatch, ERUx_GOUTy = pattern matching result

Function Documentation

void XMC_ERU_Disable ( XMC_ERU_t *const eru )
Parameters
eru A constant pointer to XMC_ERU_t, pointing to the ERU base address
Returns
None
Description:
Disables clock and releases reset for ERU1 module.
Note:
  1. Required to configure ERU1 module again after calling XMC_ERU_ETL_Init() or XMC_ERU_OGU_Init(). Since the all the registers are reset with default values.
Related APIs:
XMC_ERU_Enable()
void XMC_ERU_Enable ( XMC_ERU_t *const eru )
Parameters
eru A constant pointer to XMC_ERU_t, pointing to the ERU base address
Returns
None
Description:
If ERU1 module is selected, it enables clock and releases reset.
This API is called by XMC_ERU_ETL_Init() or XMC_ERU_OGU_Init() and therefore no need to call it explicitly during initialization sequence. Call this API to enable ERU1 module once again if the module is disabled by calling XMC_ERU_Disable(). For ERU0 module clock gating and reset features are not available.
Note:
  1. Required to configure ERU1 module again after calling XMC_ERU_Disable(). Since the all the registers are reset with default values.
Related APIs:
XMC_ERU_ETL_Init(), XMC_ERU_OGU_Init(), XMC_ERU_Disable().
void XMC_ERU_ETL_ClearStatusFlag | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3]
Returns
None
Description:
Set the status flag bit(FL) in EXICONx(x = [0 to 3]).
If auto clear of the status flag is not enabled by detection of the opposite edge of the event edge, this API clears the Flag. SO that next event is considered as new event.
Related APIs:
XMC_ERU_ETL_SetStatusFlag(), XMC_ERU_ETL_GetStatusFlag()
void XMC_ERU_ETL_DisableOutputTrigger | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3].
Returns
None
Description:
Disables the trigger pulse generation by clearing the (PE) of the EXICONx(x = channel).
Typically this can used when only pattern match is being used for event generation.
Related APIs:
XMC_ERU_ETL_EnableOutputTrigger()
void XMC_ERU_ETL_EnableOutputTrigger | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t | trigger
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3].
trigger | Output Channel of OGUy(Output gating unit y = [0 to 3]) to be mapped by the trigger pulse Refer XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t for valid value.
Returns
None
Description:
Configure which Channel of OGUy(Output gating unit y = [0 to 3]) to be mapped by the trigger pulse generated by ETLx(Event Trigger Logic, x = channel) by setting (OCS and PE) bit fields.
The trigger pulse is generated for one clock pulse along with the flag status update. This is typically used to trigger the ISR for the external events. The configured OGUy(Output gating unit y = [0 to 3]), generates the event based on the trigger pulse.If output trigger pulse generation is disabled by XMC_ERU_ETL_DisableOutputTrigger(), XMC_ERU_ETL_EnableOutputTrigger() can called to reconfigure. These values are set during initialization in XMC_ERU_ETL_Init(). Call this to change the trigger edge, as needed later in the program.
Related APIs:
XMC_ERU_ETL_DisableOutputTrigger()
XMC_ERU_ETL_EDGE_DETECTION_t XMC_ERU_ETL_GetEdgeDetection | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3]
Returns
XMC_ERU_ETL_EDGE_DETECTION_t indicate which egde/s is configured for event generation
Description:
Return event trigger edge/s by reading (RE, FE) bits of EXICONx(x = [0 to 3]) register.
Rising edge, falling edge or either edges can be selected to generate the event. Call this to get the configured trigger edge.
uint32_t XMC_ERU_ETL_GetStatusFlag | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3].
Returns
uint32_t Current state of the status flag bit(FL). Result is in 32-bit format.
Description:
Returns status flag state of channel.
The function can typically be used to clear the status flag using software, when auto clear is not enabled.
Related APIs:
XMC_ERU_ETL_SetStatusFlag(), XMC_ERU_ETL_ClearStatusFlag()
void XMC_ERU_ETL_Init | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_ETL_CONFIG_t *const | config
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_ETLx(Event trigger logic unit) channel Range : [0 to 3]
config | pointer to a constant ERU_ETLx configuration data structure. Refer data structure XMC_ERU_ETL_CONFIG_t for detail.
Returns
None

Description:
Initializes the selected ERU_ETLx channel with the config structure.

Invokes XMC_ERU_Enable() to enable eru module clock. Then configures

  • Input signal for path A and Path B,
  • Trigger pulse generation,
  • status flag clear mode,
  • Event Trigger edge,
  • Output Channel of OGUy(Output gating unit y = [0 to 3]) to be mapped by the trigger pulse,
  • input path combination along with polarity for event generation

.

void XMC_ERU_ETL_SetEdgeDetection | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_ETL_EDGE_DETECTION_t | edge_detection
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3]
edge_detection | event trigger edge. Refer XMC_ERU_ETL_EDGE_DETECTION_t enum for valid values.
Returns
None
Description:
Configure event trigger edge/s by setting (RE, FE) bits of EXICONx(x = [0 to 3]) register.
Rising edge, falling edge or either edges can be selected to generate the event.These values are set during initialization in XMC_ERU_ETL_Init(). Call this to change the trigger edge, as needed later in the program.
void XMC_ERU_ETL_SetInput | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_ETL_INPUT_A_t | input_a,
 |  | const XMC_ERU_ETL_INPUT_B_t | input_b
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3]
input_a input signal for path A of ERSx(Event request source, x = [0 to 3]) unit.
Refer XMC_ERU_ETL_INPUT_A_t for valid value or xmc1_eru_map.h/xmc4_eru_map.h file where the mapping of the input is done based on selected signal.
e.g: ERU0_ETL3_INPUTA_P2_7.
input_b input signal for path B of ERSx(Event request source, x = [0 to 3]) unit.
Refer XMC_ERU_ETL_INPUT_B_t for valid value or xmc1_eru_map.h/xmc4_eru_map.h file where the mapping of the input is done based on selected signal.
e.g: ERU0_ETL0_INPUTB_P2_0.
Returns
None
Description:
Configures the event source for path A and path B in with selected input_a and input_b respectively.
These values are set during initialization in XMC_ERU_ETL_Init(). Call this to change the input, as needed later in the program. According to the ports/peripheral selected, the event source has to be changed.
void XMC_ERU_ETL_SetSource | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_ETL_SOURCE_t | source
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3]
source | input path combination along with polarity for event generation by ERSx(Event request source) unit. Refer XMC_ERU_ETL_SOURCE_t enum for valid input values.
Returns
None
Description:
Select input path combination along with polarity for event generation by setting (SS, NA, NB) bits in ERSx(Event request source) unit
The signal ERSxO is generated from the selection and this is connected to ETLx(Event trigger logic, x = [0 to 3]) for further action. These values are set during initialization in XMC_ERU_ETL_Init(). Call this to change the source, as needed later in the program.
void XMC_ERU_ETL_SetStatusFlag | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3]
Returns
None
Description:
Set the status flag bit(FL) in EXICONx(x = [0 to 3]).
The status flag indicates that the configured event has occurred. This status flag is used in Pattern match detection by OGUy(Output gating unit, y = [0 to 3]).
Related APIs:
XMC_ERU_ETL_ClearStatusFlag(), XMC_ERU_ETL_GetStatusFlag()
void XMC_ERU_ETL_SetStatusFlagMode | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_ETL_STATUS_FLAG_MODE_t | mode
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3].
mode | Set whether status flag has to be cleared by software or hardware. Refer XMC_ERU_ETL_STATUS_FLAG_MODE_t for valid value.
Returns
None
Description:
Set the mode for status flag mode by setting (LD) bit in EXICONx(x = channel) register.
If SWCTRL is selected, status flag has to be cleared by software. This is typically used for pattern match detection. If HWCTRL is selected, status flag is cleared by hardware. If Positive edge is selected as event edge, for negative edge status flag is cleared and vice versa.This is typically used for continuous event detection.These values are set during initialization in XMC_ERU_ETL_Init(). Call this to change the trigger edge, as needed later in the program.
Related APIs:
XMC_ERU_ETL_ClearStatusFlag(), XMC_ERU_ETL_GetStatusFlag()
void XMC_ERU_OGU_DisablePatternDetection | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
Returns
None
Description:
Disable the pattern detection by clearing (GEEN) bit.
Typically XMC_ERU_OGU_DisablePatternDetection is used when events has to be generated peripheral triggers.
Related APIs:
XMC_ERU_OGU_EnablePatternDetection(), XMC_ERU_OGU_GetPatternDetectionStatus()
void XMC_ERU_OGU_DisablePeripheralTrigger | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
Returns
None
Description:
Disables event generation based on peripheral trigger by clearing (ISS) bit.
This is typically used when peripheral trigger is no longer need. After calling XMC_ERU_OGU_DisablePeripheralTrigger(), XMC_ERU_OGU_EnablePeripheralTrigger() has to be called to reconfigure the signals again.
Related APIs:
XMC_ERU_OGU_EnablePeripheralTrigger()
void XMC_ERU_OGU_EnablePatternDetection | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t | input
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
input | ERU_ETLx(x = [0 to 3]), for pattern match detection. Refer XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t for valid values. Logical OR combination of the enum items can be passed as the input.
Returns
None
Description:
Configures ERU_ETLx(x = [0 to 3]) for pattern match detection by setting IPENx(x = [0 to 3]) and GEEN bits.
These bits are dedicated to each channel of the ERU_ETLx(x = [0 to 3]). These values are set during initialization in XMC_ERU_OGU_Init(). Call this to change the pattern, as needed later in the program.
Related APIs:
XMC_ERU_OGU_DisablePatternDetection(), XMC_ERU_OGU_GetPatternDetectionStatus()
void XMC_ERU_OGU_EnablePeripheralTrigger | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_OGU_PERIPHERAL_TRIGGER_t | peripheral_trigger
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
peripheral_trigger | which peripheral trigger signal is used for event generation. Refer XMC_ERU_OGU_PERIPHERAL_TRIGGER_t for the valid values, or xmc1_eru_map.h/xmc4_eru_map.h file where the mapping of the peripheral input is done based on input. e.g: ERU0_OGU0_PERIPHERAL_TRIGGER_CCU40_SR0.
Returns
None
Description:
Configures peripheral trigger input, by setting (ISS) bit.
Based on the peripheral the input signal has to be selected. These values are set during initialization in XMC_ERU_OGU_Init(). Call this to change the input, as needed later in the program.
Related APIs:
XMC_ERU_OGU_DisablePeripheralTrigger()
uint32_t XMC_ERU_OGU_GetPatternDetectionStatus | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
Returns
uint32_t returns the pattern match result. Result is in 32-bit format.
Description:
This API returns the pattern match result by reading (PDR) bit.
Related APIs:
XMC_ERU_OGU_EnablePatternDetection(), XMC_ERU_OGU_DisablePatternDetection()
void XMC_ERU_OGU_Init | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_OGU_CONFIG_t *const | config
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
config | pointer to constant ERU_OGUy configuration data structure. Refer data structure XMC_ERU_OGU_CONFIG_t for detail.
Returns
None

Description:
Initializes the selected ERU_OGUy channel with the config structure.

Invokes XMC_ERU_Enable() to enable eru module clock. Then configures

  • Pattern detection,
  • Peripheral trigger input,
  • Gating for service request generation

.

void XMC_ERU_OGU_SetServiceRequestMode | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_OGU_SERVICE_REQUEST_t | mode
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
mode | gating scheme for service request generation. Refer XMC_ERU_OGU_SERVICE_REQUEST_t for valid values.
Returns
None
Description:
Configures the gating scheme for service request generation by setting (GP) bit.
Typically this function is used to change the service request generation scheme. These values are set during initialization in XMC_ERU_OGU_Init(). Call this to change the gating mode, as needed later in the program.
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_ERU_ETL_CONFIG_t Struct Reference

XMC_ERU_ETL_CONFIG_t Struct Reference
XMC Peripheral Library » ERU

#include <xmc_eru.h>

Detailed Description

Structure for initializing ERUx_ETLy (x = [0..1], y = [0..4]) module.

Field Documentation

uint32_t edge_detection

Configure the event trigger edge(FE, RE). Refer XMC_ERU_ETL_EDGE_DETECTION_t for valid values.

uint32_t enable_output_trigger

Enables the generation of trigger pulse(PE), for the configured edge detection. This accepts boolean values as input.

uint32_t input

While configuring the bit fields, the values have to be shifted according to the position

uint32_t input_a

Configures input A. Refer XMC_ERU_ETL_INPUT_A_t for valid values

uint32_t input_b

Configures input B. Refer XMC_ERU_ETL_INPUT_B_t for valid values

uint32_t output_trigger_channel

Output channel select(OCS) for ETLx output trigger pulse. Refer XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t for valid values.

uint32_t source

Input path combination along with polarity for event generation. Refer XMC_ERU_ETL_SOURCE_t for valid values.

uint32_t status_flag_mode

Enables the status flag auto clear(LD), for the opposite edge of the configured event edge. This accepts boolean values as input.

The documentation for this struct was generated from the following file:
  • xmc_eru.h


XMC Peripheral Library for XMC4000 Family: XMC_ERU_OGU_CONFIG_t Union Reference

XMC_ERU_OGU_CONFIG_t Union Reference
XMC Peripheral Library » ERU

#include <xmc_eru.h>

Detailed Description

Structure for initializing ERUx_OGUy (x = [0..1], y = [0..4]) module.

Field Documentation

uint32_t enable_pattern_detection

Enable generation of(GEEN) event for pattern detection result change. This accepts boolean values as input.

uint32_t pattern_detection_input

Enable input for the pattern detection(IPENx, x = [0 to 3]). Refer XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t for valid values. OR combination of the enum items given as input

uint32_t peripheral_trigger

peripheral trigger(ISS) input selection. Refer XMC_ERU_OGU_PERIPHERAL_TRIGGER_t for valid values.

uint32_t service_request

Gating(GP) on service request generation for pattern detection result. Refer XMC_ERU_OGU_SERVICE_REQUEST_t for valid values.

The documentation for this union was generated from the following file:
  • xmc_eru.h


XMC Peripheral Library for XMC4000 Family: XMC_ERU_t Struct Reference

XMC_ERU_t Struct Reference
XMC Peripheral Library » ERU

#include <xmc_eru.h>

Detailed Description

ERU module

The documentation for this struct was generated from the following file:
  • xmc_eru.h


XMC Peripheral Library for XMC4000 Family: ETH_MAC

Data Structures | Macros | Enumerations | Functions
ETH_MAC
XMC Peripheral Library

Data Structures

struct | XMC_ETH_MAC_DMA_DESC_t
union | XMC_ETH_MAC_PORT_CTRL_t
struct | XMC_ETH_MAC_t
struct | XMC_ETH_MAC_TIME_t

Macros

#define | ETH_MAC_DMA_RDES0_AFM (0x40000000U)
#define | ETH_MAC_DMA_RDES0_CE (0x00000002U)
#define | ETH_MAC_DMA_RDES0_DBE (0x00000004U)
#define | ETH_MAC_DMA_RDES0_DE (0x00004000U)
#define | ETH_MAC_DMA_RDES0_ES (0x00008000U)
#define | ETH_MAC_DMA_RDES0_ESA (0x00000001U)
#define | ETH_MAC_DMA_RDES0_FL (0x3FFF0000U)
#define | ETH_MAC_DMA_RDES0_FS (0x00000200U)
#define | ETH_MAC_DMA_RDES0_FT (0x00000020U)
#define | ETH_MAC_DMA_RDES0_LC (0x00000040U)
#define | ETH_MAC_DMA_RDES0_LE (0x00001000U)
#define | ETH_MAC_DMA_RDES0_LS (0x00000100U)
#define | ETH_MAC_DMA_RDES0_OE (0x00000800U)
#define | ETH_MAC_DMA_RDES0_OWN (0x80000000U)
#define | ETH_MAC_DMA_RDES0_RE (0x00000008U)
#define | ETH_MAC_DMA_RDES0_RWT (0x00000010U)
#define | ETH_MAC_DMA_RDES0_SAF (0x00002000U)
#define | ETH_MAC_DMA_RDES0_TSA (0x00000080U)
#define | ETH_MAC_DMA_RDES0_VLAN (0x00000400U)
#define | ETH_MAC_DMA_TDES0_CC (0x00000078U)
#define | ETH_MAC_DMA_TDES0_CIC (0x00C00000U)
#define | ETH_MAC_DMA_TDES0_DB (0x00000001U)
#define | ETH_MAC_DMA_TDES0_DC (0x08000000U)
#define | ETH_MAC_DMA_TDES0_DP (0x04000000U)
#define | ETH_MAC_DMA_TDES0_EC (0x00000100U)
#define | ETH_MAC_DMA_TDES0_ED (0x00000004U)
#define | ETH_MAC_DMA_TDES0_ES (0x00008000U)
#define | ETH_MAC_DMA_TDES0_FF (0x00002000U)
#define | ETH_MAC_DMA_TDES0_FS (0x10000000U)
#define | ETH_MAC_DMA_TDES0_IC (0x40000000U)
#define | ETH_MAC_DMA_TDES0_IHE (0x00010000U)
#define | ETH_MAC_DMA_TDES0_IPE (0x00001000U)
#define | ETH_MAC_DMA_TDES0_JT (0x00004000U)
#define | ETH_MAC_DMA_TDES0_LC (0x00000200U)
#define | ETH_MAC_DMA_TDES0_LOC (0x00000800U)
#define | ETH_MAC_DMA_TDES0_LS (0x20000000U)
#define | ETH_MAC_DMA_TDES0_NC (0x00000400U)
#define | ETH_MAC_DMA_TDES0_OWN (0x80000000U)
#define | ETH_MAC_DMA_TDES0_TCH (0x00100000U)
#define | ETH_MAC_DMA_TDES0_TER (0x00200000U)
#define | ETH_MAC_DMA_TDES0_TTSE (0x02000000U)
#define | ETH_MAC_DMA_TDES0_TTSS (0x00020000U)
#define | ETH_MAC_DMA_TDES0_UF (0x00000002U)
#define | ETH_MAC_DMA_TDES0_VF (0x00000080U)
#define | XMC_ETH_MAC_BUF_SIZE (1524)
#define | XMC_ETH_MAC_PHY_MAX_RETRIES (0xffffUL)
#define | XMC_ETH_WAKEUP_REGISTER_LENGTH (8U)

Enumerations

Functions

void | XMC_ETH_MAC_AdjustPTPClock (XMC_ETH_MAC_t *const eth_mac, uint32_t correction)
void | XMC_ETH_MAC_ClearEventStatus (XMC_ETH_MAC_t *const eth_mac, uint32_t event)
void | XMC_ETH_MAC_Disable (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableDestinationAddressInverseFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableEvent (XMC_ETH_MAC_t *const eth_mac, uint32_t event)
void | XMC_ETH_MAC_DisableFrameBurst (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableFrameFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableJumboFrame (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableLoopback (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableMulticastHashFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisablePowerDownMode (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisablePowerManagmentEvent (XMC_ETH_MAC_t *const eth_mac, uint32_t event)
void | XMC_ETH_MAC_DisablePromiscuousMode (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisablePTPAlarm (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableReceptionBroadcastFrames (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableReceptionMulticastFrames (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableRx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableRxOwn (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableRxWatchdog (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableSourceAddressFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableSourceAddressInverseFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableTx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableTxJabber (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableUnicastHashFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_Enable (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableDestinationAddressInverseFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableEvent (XMC_ETH_MAC_t *const eth_mac, uint32_t event)
void | XMC_ETH_MAC_EnableFrameBurst (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableFrameFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableHashPerfectFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableJumboFrame (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableLoopback (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableMulticastHashFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnablePerfectFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnablePowerDownMode (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnablePowerManagmentEvent (XMC_ETH_MAC_t *const eth_mac, uint32_t event)
void | XMC_ETH_MAC_EnablePromiscuousMode (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnablePTPAlarm (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableReceptionBroadcastFrames (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableReceptionMulticastFrames (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableRx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableRxOwn (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableRxWatchdog (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableSourceAddressFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableSourceAddressInverseFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableTx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableTxJabber (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableUnicastHashFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_FlushRx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_FlushTx (XMC_ETH_MAC_t *const eth_mac)
uint64_t | XMC_ETH_MAC_GetAddress (XMC_ETH_MAC_t *const eth_mac)
uint32_t | XMC_ETH_MAC_GetEventStatus (const XMC_ETH_MAC_t *const eth_mac)
uint32_t | XMC_ETH_MAC_GetPTPStatus (const XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_GetPTPTime (XMC_ETH_MAC_t *const eth_mac, XMC_ETH_MAC_TIME_t *const time)
uint8_t * | XMC_ETH_MAC_GetRxBuffer (XMC_ETH_MAC_t *const eth_mac)
uint32_t | XMC_ETH_MAC_GetRxFrameSize (XMC_ETH_MAC_t *const eth_mac)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_GetRxTimeStamp (XMC_ETH_MAC_t *const eth_mac, XMC_ETH_MAC_TIME_t *const time)
uint8_t * | XMC_ETH_MAC_GetTxBuffer (XMC_ETH_MAC_t *const eth_mac)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_GetTxTimeStamp (XMC_ETH_MAC_t *const eth_mac, XMC_ETH_MAC_TIME_t *const time)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_Init (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_InitPTP (XMC_ETH_MAC_t *const eth_mac, uint32_t config)
void | XMC_ETH_MAC_InitPTPEx (XMC_ETH_MAC_t *const eth_mac, uint32_t config, XMC_ETH_MAC_TIME_t *const time)
void | XMC_ETH_MAC_InitRxDescriptors (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_InitTxDescriptors (XMC_ETH_MAC_t *const eth_mac)
bool | XMC_ETH_MAC_IsEnabled (const XMC_ETH_MAC_t *const eth_mac)
bool | XMC_ETH_MAC_IsMagicPacketReceived (XMC_ETH_MAC_t *const eth_mac)
bool | XMC_ETH_MAC_IsRxDescriptorOwnedByDma (XMC_ETH_MAC_t *const eth_mac)
bool | XMC_ETH_MAC_IsTxDescriptorOwnedByDma (XMC_ETH_MAC_t *const eth_mac)
bool | XMC_ETH_MAC_IsWakeupFrameReceived (XMC_ETH_MAC_t *const eth_mac)
uint32_t | XMC_ETH_MAC_ReadFrame (XMC_ETH_MAC_t *const eth_mac, uint8_t *const frame, uint32_t len)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_ReadPhy (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
void | XMC_ETH_MAC_Reset (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_ResumeRx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_ResumeTx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_ReturnRxDescriptor (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_ReturnTxDescriptor (XMC_ETH_MAC_t *const eth_mac)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_SendFrame (XMC_ETH_MAC_t *const eth_mac, const uint8_t *frame, uint32_t len, uint32_t flags)
void | XMC_ETH_MAC_SetAddress (XMC_ETH_MAC_t *const eth_mac, uint64_t addr)
void | XMC_ETH_MAC_SetAddressHashFilter (XMC_ETH_MAC_t *const eth_mac, const uint64_t hash)
void | XMC_ETH_MAC_SetAddressPerfectFilter (XMC_ETH_MAC_t *const eth_mac, uint8_t index, const uint64_t addr, uint32_t flags)
void | XMC_ETH_MAC_SetLink (XMC_ETH_MAC_t *const eth_mac, XMC_ETH_LINK_SPEED_t speed, XMC_ETH_LINK_DUPLEX_t duplex)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_SetManagmentClockDivider (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_SetPortControl (XMC_ETH_MAC_t *const eth_mac, const XMC_ETH_MAC_PORT_CTRL_t port_ctrl)
void | XMC_ETH_MAC_SetPTPAlarm (XMC_ETH_MAC_t *const eth_mac, const XMC_ETH_MAC_TIME_t *const time)
void | XMC_ETH_MAC_SetPTPTime (XMC_ETH_MAC_t *const eth_mac, XMC_ETH_MAC_TIME_t *const time)
void | XMC_ETH_MAC_SetTxBufferSize (XMC_ETH_MAC_t *const eth_mac, uint32_t size)
void | XMC_ETH_MAC_SetVLANTag (XMC_ETH_MAC_t *const eth_mac, uint16_t tag)
void | XMC_ETH_MAC_SetWakeUpFrameFilter (XMC_ETH_MAC_t *const eth_mac, const uint32_t(*const filter)[(8U)])
void | XMC_ETH_MAC_UpdateAddend (XMC_ETH_MAC_t *const eth_mac, uint32_t addend)
void | XMC_ETH_MAC_UpdatePTPTime (XMC_ETH_MAC_t *const eth_mac, const XMC_ETH_MAC_TIME_t *const time)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_WritePhy (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr, uint8_t reg_addr, uint16_t data)

Detailed Description

The Ethernet MAC (ETH) is a major communication peripheral that supports 10/100 MBit/s data transfer rates in compliance with the IEEE 802.3-2002 standard. The ETH may be used to implement internet connected applications using IPv4 and IPv6. The ETH also includes support for IEEE1588 time synchronisation to allow implementation of Real Time Ethernet protocols.

The XMC_ETH_MAC low level driver provides functions to configure and initialize the ETH_MAC hardware peripheral.

Macro Definition Documentation

#define ETH_MAC_DMA_RDES0_AFM (0x40000000U)

Destination address filter fail

#define ETH_MAC_DMA_RDES0_CE (0x00000002U)

CRC error

#define ETH_MAC_DMA_RDES0_DBE (0x00000004U)

Dribble bit error

#define ETH_MAC_DMA_RDES0_DE (0x00004000U)

Descriptor error

#define ETH_MAC_DMA_RDES0_ES (0x00008000U)

Error summary

#define ETH_MAC_DMA_RDES0_ESA (0x00000001U)

Extended Status/Rx MAC address

#define ETH_MAC_DMA_RDES0_FL (0x3FFF0000U)

Frame length mask

#define ETH_MAC_DMA_RDES0_FS (0x00000200U)

First descriptor

#define ETH_MAC_DMA_RDES0_FT (0x00000020U)

Frame type

#define ETH_MAC_DMA_RDES0_LC (0x00000040U)

Late collision

#define ETH_MAC_DMA_RDES0_LE (0x00001000U)

Length error

#define ETH_MAC_DMA_RDES0_LS (0x00000100U)

Last descriptor

#define ETH_MAC_DMA_RDES0_OE (0x00000800U)

Overflow error

#define ETH_MAC_DMA_RDES0_OWN (0x80000000U)

RDES0 Descriptor RX Packet StatusOwn bit 1=DMA, 0=CPU

#define ETH_MAC_DMA_RDES0_RE (0x00000008U)

Receive error

#define ETH_MAC_DMA_RDES0_RWT (0x00000010U)

Receive watchdog timeout

#define ETH_MAC_DMA_RDES0_SAF (0x00002000U)

Source address filter fail

#define ETH_MAC_DMA_RDES0_TSA (0x00000080U)

Timestamp available

#define ETH_MAC_DMA_RDES0_VLAN (0x00000400U)

VLAN tag

#define ETH_MAC_DMA_TDES0_CC (0x00000078U)

Collision count

#define ETH_MAC_DMA_TDES0_CIC (0x00C00000U)

Checksum insertion control

#define ETH_MAC_DMA_TDES0_DB (0x00000001U)

Deferred bit

#define ETH_MAC_DMA_TDES0_DC (0x08000000U)

Disable CRC

#define ETH_MAC_DMA_TDES0_DP (0x04000000U)

Disable pad

#define ETH_MAC_DMA_TDES0_EC (0x00000100U)

Excessive collision

#define ETH_MAC_DMA_TDES0_ED (0x00000004U)

Excessive deferral

#define ETH_MAC_DMA_TDES0_ES (0x00008000U)

Error summary

#define ETH_MAC_DMA_TDES0_FF (0x00002000U)

Frame flushed

#define ETH_MAC_DMA_TDES0_FS (0x10000000U)

First segment

#define ETH_MAC_DMA_TDES0_IC (0x40000000U)

Interrupt on competition

#define ETH_MAC_DMA_TDES0_IHE (0x00010000U)

IP header error

#define ETH_MAC_DMA_TDES0_IPE (0x00001000U)

IP payload error

#define ETH_MAC_DMA_TDES0_JT (0x00004000U)

Jabber timeout

#define ETH_MAC_DMA_TDES0_LC (0x00000200U)

Late collision

#define ETH_MAC_DMA_TDES0_LOC (0x00000800U)

Loss of carrier

#define ETH_MAC_DMA_TDES0_LS (0x20000000U)

Last segment

#define ETH_MAC_DMA_TDES0_NC (0x00000400U)

No carrier

#define ETH_MAC_DMA_TDES0_OWN (0x80000000U)

TDES0 Descriptor TX Packet Control/StatusOwn bit 1=DMA, 0=CPU

#define ETH_MAC_DMA_TDES0_TCH (0x00100000U)

Second address chained

#define ETH_MAC_DMA_TDES0_TER (0x00200000U)

Transmit end of ring

#define ETH_MAC_DMA_TDES0_TTSE (0x02000000U)

Transmit time stamp enable

#define ETH_MAC_DMA_TDES0_TTSS (0x00020000U)

Transmit time stamp status

#define ETH_MAC_DMA_TDES0_UF (0x00000002U)

Underflow error

#define ETH_MAC_DMA_TDES0_VF (0x00000080U)

VLAN frame

#define XMC_ETH_MAC_BUF_SIZE (1524)

ETH MAC buffer size

#define XMC_ETH_MAC_PHY_MAX_RETRIES (0xffffUL)

Maximum retries

#define XMC_ETH_WAKEUP_REGISTER_LENGTH (8U)

Remote wakeup frame reg length

Enumeration Type Documentation

enum XMC_ETH_LINK_DUPLEX_t

ETH duplex settings (full/half?)

Enumerator
XMC_ETH_LINK_DUPLEX_HALF | Half duplex
XMC_ETH_LINK_DUPLEX_FULL | Full duplex
enum XMC_ETH_LINK_INTERFACE_t

Link interface

Enumerator
XMC_ETH_LINK_INTERFACE_MII | Link interface: Media independent interface
XMC_ETH_LINK_INTERFACE_RMII | Link interface: Reduced media independent interface
enum XMC_ETH_LINK_SPEED_t

ETH link speed

Enumerator
XMC_ETH_LINK_SPEED_10M | Link speed: 10M
XMC_ETH_LINK_SPEED_100M | Link speed: 100M
enum XMC_ETH_LINK_STATUS_t

ETH link status

Enumerator
XMC_ETH_LINK_STATUS_DOWN | Link status down
XMC_ETH_LINK_STATUS_UP | Link status up
enum XMC_ETH_MAC_ADDR_FILTER_t

MAC address filter

Enumerator
XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE0 | Address filter mask: byte 0
XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE1 | Address filter mask: byte 1
XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE2 | Address filter mask: byte 2
XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE3 | Address filter mask: byte 3
XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE4 | Address filter mask: byte 4
XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE5 | Address filter mask: byte 5
XMC_ETH_MAC_ADDR_FILTER_SA | Address filter SA
enum XMC_ETH_MAC_EVENT_t

ETH MAC event

Enumerator
XMC_ETH_MAC_EVENT_PMT | Power management event
XMC_ETH_MAC_EVENT_TIMESTAMP | Time stamp event
XMC_ETH_MAC_EVENT_EARLY_RECEIVE | Early receive
XMC_ETH_MAC_EVENT_BUS_ERROR | Bus error
XMC_ETH_MAC_EVENT_EARLY_TRANSMIT | Early transmit
XMC_ETH_MAC_EVENT_RECEIVE_WATCHDOG_TIMEOUT | Receive watchdog time-out
XMC_ETH_MAC_EVENT_RECEIVE_PROCESS_STOPPED | Receive process stopped
XMC_ETH_MAC_EVENT_RECEIVE_BUFFER_UNAVAILABLE | Receive buffer unavailable
XMC_ETH_MAC_EVENT_RECEIVE | Receive event
XMC_ETH_MAC_EVENT_TRANSMIT_UNDERFLOW | Transmit underflow
XMC_ETH_MAC_EVENT_RECEIVE_OVERFLOW | Receive overflow
XMC_ETH_MAC_EVENT_TRANSMIT_JABBER_TIMEOUT | Transmit jabber time-out
XMC_ETH_MAC_EVENT_TRANSMIT_BUFFER_UNAVAILABLE | Transmit buffer unavailable
XMC_ETH_MAC_EVENT_TRANSMIT_PROCESS_STOPPED | Transmit process stopped
XMC_ETH_MAC_EVENT_TRANSMIT | Transmit event
enum XMC_ETH_MAC_PMT_EVENT_t

Power management events that triggers a PMT interrupt

Enumerator
XMC_ETH_MAC_PMT_EVENT_ON_WAKEUP_FRAME | Wakeup frame
XMC_ETH_MAC_PMT_EVENT_ON_MAGIC_PACKET | Magic packet
XMC_ETH_MAC_PMT_EVENT_ON_UNICAST_FRAME_FILTER | Unicast frame filter
enum XMC_ETH_MAC_STATUS_t

Ethernet MAC status return values

Enumerator
XMC_ETH_MAC_STATUS_OK | Driver accepted application request
XMC_ETH_MAC_STATUS_BUSY | Driver is busy and cannot handle request
XMC_ETH_MAC_STATUS_ERROR | Driver could not fulfil application request
enum XMC_ETH_MAC_TIMESTAMP_CONFIG_t

ETH MAC time-stamp configuration enable

Enumerator
XMC_ETH_MAC_TIMESTAMP_CONFIG_FINE_UPDATE | Fine update
XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_TS_INTERRUPT | Timestamp Interrupt Trigger Enable
XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_ALL_FRAMES | Enable all frames
XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_PTPV2 | PTPV2
XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_PTP_OVER_ETHERNET | PTP over ETH
XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_PTP_OVER_IPV6 | PTP over IPV6
XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_PTP_OVER_IPV4 | PTP over IPV4
XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_MAC_ADDRESS_FILTER | MAC address filter
enum XMC_ETH_MAC_TIMESTAMP_STATUS_t

ETH MAC time-stamp status

Enumerator
XMC_ETH_MAC_TIMESTAMP_STATUS_SECONDS_OVERFLOW | Indicates that the seconds value of the timestamp has overflowed beyond 0xFFFFFFFF
XMC_ETH_MAC_TIMESTAMP_STATUS_TARGET_TIME_REACHED | Indicates that the value of system time is greater or equal to the value specified in the Target_Time_ Seconds Register and Target Time Nanoseconds Register
XMC_ETH_MAC_TIMESTAMP_STATUS_TARGET_TIMER_ERROR | Set when the target time, being programmed in Target Time Registers, is already elapsed
enum XMC_ETH_MAC_TX_FRAME_t

Transmission frame

Enumerator
XMC_ETH_MAC_TX_FRAME_FRAGMENT | Indicate frame fragment
XMC_ETH_MAC_TX_FRAME_EVENT | Generate event when frame is transmitted
XMC_ETH_MAC_TX_FRAME_TIMESTAMP | Capture frame time stamp

Function Documentation

void XMC_ETH_MAC_AdjustPTPClock | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint32_t | correction
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
correction | Correction factor
Returns
None
Description:
Adjust PTP clock
The function can be used to adjust the PTP clock (time synchronization). Please see the function implementation for more information.
void XMC_ETH_MAC_ClearEventStatus | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint32_t | event
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
event | The status of which event (or a combination of logically OR'd events) needs to be cleared
Returns
None
Description:
Clear event status
The function clears the status of an event passed as a parameter to the function.
void XMC_ETH_MAC_Disable ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable the Ethernet MAC peripheral
The function asserts the peripheral reset.
void XMC_ETH_MAC_DisableDestinationAddressInverseFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable destination address inverse filtering
The function sets the DAIF bitfield of the MAC_FRAME_FILTER register. It can be used to perform normal filtering of frames.
void XMC_ETH_MAC_DisableEvent | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint32_t | event
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
event | Which event (or a combination of logically OR'd events) needs to be disabled?
Returns
None
Description:
Disable an ETH MAC event(s)
The function can be used to disable ETH MAC event(s).
void XMC_ETH_MAC_DisableFrameBurst ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Frame burst disable
The function can be used to disable frame bursting.
void XMC_ETH_MAC_DisableFrameFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable frame filter
The function sets the RA bitfield of the MAC_FRAME_FILTER register. This ensures that the receiver module passes all received frames, irrespective of whether they pass the address filter or not.
void XMC_ETH_MAC_DisableJumboFrame ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Jumbo frame disable
The function can be used to disable jumbo frames.
void XMC_ETH_MAC_DisableLoopback ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable loopback mode
The function can be used to disable the loopback mode.
void XMC_ETH_MAC_DisableMulticastHashFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable multicast hash filter
The function disables multicast hash filtering. The MAC performs a perfect destination address filtering for multicast frames post invocation.
void XMC_ETH_MAC_DisablePowerDownMode ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable power down mode
The function disables the power down mode of the ETH MAC.
void XMC_ETH_MAC_DisablePowerManagmentEvent | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint32_t | event
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
event | A valid ETH PMT event (XMC_ETH_MAC_PMT_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Disable power management event(s)
The function disables the event(s) that trigger(s) a PMT interrupt.
void XMC_ETH_MAC_DisablePromiscuousMode ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable promiscuous mode
The function disables the promiscuous mode.
void XMC_ETH_MAC_DisablePTPAlarm ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disables timestamp interrupt
The timestamp interrupt is generated when the System Time becomes greater than the value written in the Target Time register (Alarm). After the generation of the Timestamp Trigger Interrupt, the interrupt is disabled.
void XMC_ETH_MAC_DisableReceptionBroadcastFrames ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable reception of broadcast frames
The function sets the DBF bitfield of the MAC_FRAME_FILTER register. When set, the AFM module filters all incoming broadcast frames. In addition, it overrides all other filter settings.
void XMC_ETH_MAC_DisableReceptionMulticastFrames ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable reception of multicast frames
The function disables the reception of multicast frames. When invoked, the AFM module passes all received broadcast frames.
void XMC_ETH_MAC_DisableRx ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
ETH MAC Disable RX
The function disables the receive process.
void XMC_ETH_MAC_DisableRxOwn ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable receive own
On invocation of the function, the MAC disables the reception of frames in the half-duplex mode.
void XMC_ETH_MAC_DisableRxWatchdog ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable RX watchdog
The function disables the RX watchdog by disabling the timer on the RX.
void XMC_ETH_MAC_DisableSourceAddressFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable source address filter
The function resets the SAF bitfield of the MAC_FRAME_FILTER register. Verbatim from the reference manual - "When invoked, the MAC forwards the received frame to the application and updates the SA Match bit of the RxStatus depending on the SA address comparison".
void XMC_ETH_MAC_DisableSourceAddressInverseFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable source address inverse filtering
The function resets the SAIF bitfield of the MAC_FRAME_FILTER register. Verbatim from the reference manual - "When invoked, frames whose SA does not match the SA registers are marked as failing the SA Address filter".
void XMC_ETH_MAC_DisableTx ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
ETH MAC Disable TX
The function disables the transmit process.
void XMC_ETH_MAC_DisableTxJabber ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable TX jabber
When the function is invoked, the MAC disables the jabber timer on TX.
void XMC_ETH_MAC_DisableUnicastHashFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Disable unicast hash filter
The function disables unicast hash filtering. When invoked, the MAC performs a perfect destination address filtering for unicast frames.
void XMC_ETH_MAC_Enable ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable the Ethernet MAC peripheral
The function de-asserts the peripheral reset.
void XMC_ETH_MAC_EnableDestinationAddressInverseFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable destination address inverse filtering
The function sets the DAIF bitfield of the MAC_FRAME_FILTER register. Verbatim from the reference manual - "When invoked, the address check block operates in inverse filtering mode for the DA address comparison for both unicast and multicast frames".
void XMC_ETH_MAC_EnableEvent | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint32_t | event
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
event | Which event (or a combination of logically OR'd events) needs to be enabled?
Returns
None
Description:
Enable ETH MAC event(s)
The function can be used to enable ETH MAC event(s).
void XMC_ETH_MAC_EnableFrameBurst ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Frame burst enable
The function can be used to enable frame bursting during transmission in the MII half-duplex mode.
void XMC_ETH_MAC_EnableFrameFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable frame filter
The function resets the RA bitfield of the MAC_FRAME_FILTER register. This ensures that the receiver module passes only those frames (to the application) that pass the SA or DA address filter.
void XMC_ETH_MAC_EnableHashPerfectFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable hash perfect filter
The function sets the HPF bitfield of the MAC_FRAME_FILTER register. The function configures the address filter to pass a frame if it matches either the perfect filtering or the hash filtering.
void XMC_ETH_MAC_EnableJumboFrame ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Jumbo frame enable
The function can be used to enable jumbo frames. When enabled, the MAC allows jumbo frames of 9,018 bytes without reporting a giant frame error in the receive frame status.
void XMC_ETH_MAC_EnableLoopback ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable loopback mode
The function enables the MAC to operate in the loopback mode using the MII.
void XMC_ETH_MAC_EnableMulticastHashFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable multicast hash filter
When invoked, the MAC performs destination address filtering of received multicast frames according to the hash table.
void XMC_ETH_MAC_EnablePerfectFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable perfect filter
The function clears the HPF bitfield of the MAC_FRAME_FILTER register. When the function is invoked, the frame is passed only if it matches the hash filter.
void XMC_ETH_MAC_EnablePowerDownMode ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable power down mode
The function enables the power down mode of the ETH MAC.
void XMC_ETH_MAC_EnablePowerManagmentEvent | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint32_t | event
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
event | A valid ETH PMT event (XMC_ETH_MAC_PMT_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Enable power management event(s)
The function enables the event(s) that trigger(s) a PMT interrupt.
void XMC_ETH_MAC_EnablePromiscuousMode ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable promiscuous mode
The function enables the promiscuous mode. In this mode, the address filter module passes all incoming frames regardless of its destination or source address.
void XMC_ETH_MAC_EnablePTPAlarm ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enables timestamp interrupt
The timestamp interrupt is generated when the System Time becomes greater than the value written in the Target Time register (Alarm). After the generation of the Timestamp Trigger Interrupt, the interrupt is disabled.
void XMC_ETH_MAC_EnableReceptionBroadcastFrames ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable reception of broadcast frames
This function enables the AFM module to pass all received broadcast frames.
void XMC_ETH_MAC_EnableReceptionMulticastFrames ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable reception of multicast frames
The function sets the DBF bitfield of the MAC_FRAME_FILTER register. When set, the AFM module filters all incoming broadcast frames. In addition, it overrides all other filter settings.
void XMC_ETH_MAC_EnableRx ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
ETH MAC Enable RX
The function enables the receiver state machine of the MAC and puts the receive process in running state. The DMA then acquires the descriptor from the receive list and processes the received frames.
void XMC_ETH_MAC_EnableRxOwn ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable receive own
The function enables the MAC to receive all packets that are given by the PHY while transmitting.
void XMC_ETH_MAC_EnableRxWatchdog ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable RX watchdog
The function enables the RX watchdog by clearing the WD bitfield of the MAC_CONFIGURATION register. When invoked, the MAC does not allow more than 2048 bytes of the frame being received.
void XMC_ETH_MAC_EnableSourceAddressFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable source address filter
The function sets the SAF bitfield of the MAC_FRAME_FILTER register. Verbatim from the reference manual - "When invoked, the MAC compares the SA field of the received frames with the values programmed in the enabled SA registers. If the comparison matches, then the SA Match bit of RxStatus Word is set high. When this bit is set high and the SA filter fails, the MAC drops the frame.
void XMC_ETH_MAC_EnableSourceAddressInverseFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable source address inverse filtering
The function resets the SAIF bitfield of the MAC_FRAME_FILTER register. Verbatim from the reference manual - "When invoked, the address check block operates in inverse filtering mode for the SA address comparison. The frames whose SA matches the SA registers are marked as failing the SA Address filter".
void XMC_ETH_MAC_EnableTx ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
ETH MAC Enable TX
The function enables the transmit state machine of the MAC and puts the transmit process in running state. The DMA then checks the TX list at the current position for transmitting a frame.
void XMC_ETH_MAC_EnableTxJabber ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable TX jabber
When the function is invoked, the MAC cuts off the transmitter if the application sends out more than 2,048 bytes of data during transmission (10,240 bytes if jumbo frames are enabled)
void XMC_ETH_MAC_EnableUnicastHashFilter ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Enable unicast hash filter
The function enables the MAC to perform destination address filtering of unicast frames according to the hash table.
void XMC_ETH_MAC_FlushRx ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Flush RX
The function initializes the RX DMA descriptors and enables the DMA transmission.
void XMC_ETH_MAC_FlushTx ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Flush TX
The function initializes the TX DMA descriptors and enables the DMA transmission.
uint64_t XMC_ETH_MAC_GetAddress ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
uint64_t The MAC address which has been set
Description:
Get MAC address
The function returns the current ETH MAC address.
uint32_t XMC_ETH_MAC_GetEventStatus ( const XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
uint32_t Event status
Description:
Get event status
The function returns the ETH status and interrupt status as a single word. The user can then check the status of the events by using an appropriate mask.
uint32_t XMC_ETH_MAC_GetPTPStatus ( const XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
uint32_t Timestamp status
Description:
Get PTP status
The function returns the timestamp status by reading the TIMESTAMP_STATUS register. As indicated in the reference manual, all bits of the TIMESTAMP_STATUS register (except bits [27:25]) are cleared after the invocation of this function.
void XMC_ETH_MAC_GetPTPTime | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | XMC_ETH_MAC_TIME_t *const | time
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
time | A constant pointer to XMC_ETH_MAC_TIME_t, pointing to the PTP time
Returns
None
Description:
Get PTP time
The function obtains the PTP time and writes the nanoseconds and seconds info to the 'time' argument.
uint8_t* XMC_ETH_MAC_GetRxBuffer ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
Pointer to current RX buffer
Description:
Returns the current RX buffer.
uint32_t XMC_ETH_MAC_GetRxFrameSize ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
uint32_t RX frame size
Description:
Get RX frame size
The function is used to get the effective length of the RX frame size.
XMC_ETH_MAC_STATUS_t XMC_ETH_MAC_GetRxTimeStamp | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | XMC_ETH_MAC_TIME_t *const | time
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
time | A constant pointer to XMC_ETH_MAC_TIME_t, pointing to the RX timestamp
Returns
XMC_ETH_MAC_STATUS_t ETH MAC status
Description:
Get RX timestamp
The function can be used to get the RX timestamp.
uint8_t* XMC_ETH_MAC_GetTxBuffer ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
Pointer to current TX buffer
Description:
Returns the current TX buffer.
XMC_ETH_MAC_STATUS_t XMC_ETH_MAC_GetTxTimeStamp | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | XMC_ETH_MAC_TIME_t *const | time
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
time | A constant pointer to XMC_ETH_MAC_TIME_t, pointing to the TX timestamp
Returns
XMC_ETH_MAC_STATUS_t ETH MAC status
Description:
Get TX timestamp
The function can be used to get the TX timestamp.
XMC_ETH_MAC_STATUS_t XMC_ETH_MAC_Init ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
XMC_ETH_MAC_STATUS_t Initialization status
Description:
Initialize the Ethernet MAC peripheral
The function sets the link speed, applies the duplex mode, sets auto-negotiation and loop-back settings.
void XMC_ETH_MAC_InitPTP | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint32_t | config
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
config | The configuration the PTP should be configured with
Returns
None
Description:
Initialize PTP
The function can be used to initialize PTP.
void XMC_ETH_MAC_InitPTPEx | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint32_t | config,
 |  | XMC_ETH_MAC_TIME_t *const | time
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
config | Configuration of PTP module. See XMC_ETH_MAC_TIMESTAMP_CONFIG_t
time | Initialization time
Returns
None
Description:
Initialize PTP
The function can be used to initialize PTP given a time parameter in addition
void XMC_ETH_MAC_InitRxDescriptors ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Initialize the RX DMA descriptors
The function initializes the RX descriptors in a chained configuration. It sets up the status bit, control bit, buffer length and the buffer pointer.
void XMC_ETH_MAC_InitTxDescriptors ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Initialize the TX DMA descriptors
The function initializes the TX descriptors in a chained configuration. It sets up the status bit, control bit, buffer length and the buffer pointer.
bool XMC_ETH_MAC_IsEnabled ( const XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
bool
Description:
Check if the ETH MAC is enabled
The function checks if the ETH MAC is enabled or not. It returns "true" if the peripheral is enabled, "false" otherwise.
bool XMC_ETH_MAC_IsMagicPacketReceived ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
bool true if the received packet is a magic packet, false otherwise
Description:
Is magic packet received?
The function checks if the packet received is a magic packet.
bool XMC_ETH_MAC_IsRxDescriptorOwnedByDma ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
bool true if RX descriptor is owned by DMA, false otherwise
Description:
Is RX descriptor owned by DMA?
The function checks if the RX descriptor is owned by the DMA.

< Own bit 1=DMA, 0=CPU

bool XMC_ETH_MAC_IsTxDescriptorOwnedByDma ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
bool true if TX descriptor is owned by DMA, false otherwise
Description:
Is TX descriptor owned by DMA?
The function checks if the TX descriptor is owned by the DMA.

< Own bit 1=DMA, 0=CPU

bool XMC_ETH_MAC_IsWakeupFrameReceived ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
bool true if the received packet is a wakeup frame, false otherwise
Description:
Is wakeup frame received?
The function checks if the packet received is a wakeup frame.
uint32_t XMC_ETH_MAC_ReadFrame | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint8_t *const | frame,
 |  | uint32_t | len
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
frame | A constant pointer to a uint8_t constant, holding the received frame
len | Frame length?
Returns
uint32_t Length of the frame
Description:
Read a frame
The function is used to read a frame. The function returns 'len', the length as specified as the actual parameter in the function call.
XMC_ETH_MAC_STATUS_t XMC_ETH_MAC_ReadPhy | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint8_t | phy_addr,
 |  | uint8_t | reg_addr,
 |  | uint16_t * | data
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
phy_addr | PHY address
reg_addr | Register address
data | The destination to which the read data needs to be copied to
Returns
XMC_ETH_MAC_STATUS_t ETH MAC status
Description:
Read a PHY register
The function reads a PHY register. It essentially polls busy bit during max PHY_TIMEOUT time and reads the information into 'data' when not busy.
void XMC_ETH_MAC_Reset ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Reset the ETH MAC peripheral
The function resets the ETH MAC peripheral. It blocks until reset.
void XMC_ETH_MAC_ResumeRx ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Resume RX
Verbatim from the reference manual the function enables the DMA to read the current descriptor pointed to by the "current host transmit descriptor" reg. If that descriptor is not available (owned by the CPU), the transmission returns to the suspend state else the transmission resumes.
void XMC_ETH_MAC_ResumeTx ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Resume TX
Verbatim from the reference manual, the function enables the DMA to read the current descriptor pointed to by the "current host transmit descriptor" reg. If that descriptor is not available (owned by the CPU), the transmission returns to the suspend state else the transmission resumes.
void XMC_ETH_MAC_ReturnRxDescriptor ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Return RX descriptor
The function sets the specified DMA RX descriptor own bit.
void XMC_ETH_MAC_ReturnTxDescriptor ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
None
Description:
Return TX descriptor
The function sets the specified DMA TX descriptor own bit.
XMC_ETH_MAC_STATUS_t XMC_ETH_MAC_SendFrame | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | const uint8_t * | frame,
 |  | uint32_t | len,
 |  | uint32_t | flags
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
frame | A pointer to a uint8_t constant, holding the frame to be transmitted
len | Length of the frame to transmit
flags | Additional flags: ored combination of XMC_ETH_MAC_TX_FRAME_t or zero.
Returns
XMC_ETH_MAC_STATUS_t ETH MAC status (XMC_ETH_MAC_STATUS_BUSY if busy, XMC_ETH_MAC_STATUS_OK otherwise).
Description:
Send a frame
The function is used to send a frame. The transmission is done using the ETH MAC's dedicated DMA unit.
void XMC_ETH_MAC_SetAddress | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint64_t | addr
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
addr | The MAC address to set
Returns
None
Description:
Set MAC address
The function sets the MAC address by writing to the MAC_ADDRESS0_HIGH and MAC_ADDRESS0_LOW registers.
void XMC_ETH_MAC_SetAddressHashFilter | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | const uint64_t | hash
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
hash | The hash to be used for filtering
Returns
None
Description:
Set hash filter for group address filtering
The function sets up a hash filter for group address filtering. It writes the given hash value into the HASH_TABLE_LOW and HASH_TABLE_HIGH registers.
void XMC_ETH_MAC_SetAddressPerfectFilter | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint8_t | index,
 |  | const uint64_t | addr,
 |  | uint32_t | flags
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
index | Table entry index
addr | Address value
flags | Compare control. OR'ed combination of XMC_ETH_MAC_ADDR_FILTER_t or zero.
Returns
None
Description:
Set perfect filter for address filtering
The function can be used to set perfect filter for address filtering.
void XMC_ETH_MAC_SetLink | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | XMC_ETH_LINK_SPEED_t | speed,
 |  | XMC_ETH_LINK_DUPLEX_t | duplex
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
speed | The speed at which the link is set (10M or 100M?)
duplex | Duplex settings (half or full duplex?)
Returns
None
Description:
Set link
The function sets the link speed and duplex settings.
XMC_ETH_MAC_STATUS_t XMC_ETH_MAC_SetManagmentClockDivider ( XMC_ETH_MAC_t *const eth_mac )
Parameters
eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
Returns
XMC_ETH_MAC_STATUS_t ETH MAC status
Description:
Set management clock divider
The function sets the management clock divider by writing to the GMII_ADDRESS register.
void XMC_ETH_MAC_SetPortControl | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | const XMC_ETH_MAC_PORT_CTRL_t | port_ctrl
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
port_ctrl | Port control configuration
Returns
None
Description:
Set port control configuration
The function sets the port control by writing the configuration into the CON register.
Note
MII Mode is only available in:
  • XMC4500 LQFP144 and BGA144 packages
  • XMC4700 LQFP144 and BGA196 packages
  • XMC4800 LQFP144 and BGA196 packages
void XMC_ETH_MAC_SetPTPAlarm | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | const XMC_ETH_MAC_TIME_t *const | time
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
time | A constant pointer to XMC_ETH_MAC_TIME_t, pointing to the PTP time
Returns
None
Description:
Set PTP alarm
The function programs the TARGET_TIME_NANOSECONDS and TARGET_TIME_SECONDS registers. It can be used to schedule an interrupt event triggered when the set alarm time limit is reached.
void XMC_ETH_MAC_SetPTPTime | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | XMC_ETH_MAC_TIME_t *const | time
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
time | A constant pointer to XMC_ETH_MAC_TIME_t, pointing to the PTP time
Returns
None
Description:
Get PTP time
The function sets the PTP time give by the time parameter
void XMC_ETH_MAC_SetTxBufferSize | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint32_t | size
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
size | Size of buffer
Returns
None
Description:
Sets the current TX buffer size.
void XMC_ETH_MAC_SetVLANTag | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint16_t | tag
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
tag | The (16 bit) VLAN tag to set
Returns
None
Description:
Set VLAN tag
The function sets the VLAN tag to identify the VLAN frames.
void XMC_ETH_MAC_SetWakeUpFrameFilter | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | const uint32_t(*) | filter[(8U)]
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
filter | wake-up filter registers
Returns
None
Description:
Set wakeup frame filter
The function populates the remote wakeup frame registers.
void XMC_ETH_MAC_UpdateAddend | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint32_t | addend
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
addend | Addend value
Returns
None
Description:
Adjust PTP clock
The function is used to adjust the PTP clock (time synchronization) to compensate a reference clock drift.
void XMC_ETH_MAC_UpdatePTPTime | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | const XMC_ETH_MAC_TIME_t *const | time
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
time | A constant pointer to XMC_ETH_MAC_TIME_t, pointing to the PTP time
Returns
None
Description:
Update PTP time
The function updates the PTP time with the nanoseconds and seconds info contained in the 'time' argument.
XMC_ETH_MAC_STATUS_t XMC_ETH_MAC_WritePhy | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint8_t | phy_addr,
 |  | uint8_t | reg_addr,
 |  | uint16_t | data
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
phy_addr | PHY address
reg_addr | Register address
data | The data to write
Returns
XMC_ETH_MAC_STATUS_t ETH MAC status
Description:
Write a PHY register
The function reads a PHY register. It essentially writes the data and polls the busy bit until it is no longer busy.
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_ETH_MAC_DMA_DESC_t Struct Reference

Data Fields
XMC_ETH_MAC_DMA_DESC_t Struct Reference
XMC Peripheral Library » ETH_MAC

#include <xmc_eth_mac.h>

Data Fields

uint32_t | buffer1
uint32_t | buffer2
uint32_t | extended_status
uint32_t | length
uint32_t | reserved
uint32_t | status
uint32_t | time_stamp_nanoseconds
uint32_t | time_stamp_seconds

Detailed Description

ETH MAC DMA descriptor

Field Documentation

uint32_t buffer1

Buffer 1

uint32_t buffer2

Buffer 2

uint32_t extended_status

Extended status

uint32_t length

Descriptor length

uint32_t reserved

Reserved

uint32_t status

DMA descriptor status

uint32_t time_stamp_nanoseconds

Time stamp low

uint32_t time_stamp_seconds

Time stamp high

The documentation for this struct was generated from the following file:
  • xmc_eth_mac.h


XMC Peripheral Library for XMC4000 Family: XMC_ETH_MAC_PORT_CTRL_t Union Reference

XMC_ETH_MAC_PORT_CTRL_t Union Reference
XMC Peripheral Library » ETH_MAC

#include <xmc_eth_mac.h>

Detailed Description

ETH MAC port control

Field Documentation

uint32_t __pad0__

Reserved bits

uint32_t __pad1__

Reserved bits

uint32_t clk_rmii

RMII: Continuous 50 MHz reference clock. MII: Receive clock, 25 MHz for 100Mbit/s, 2.5 MHz for 10Mbit/s (XMC_ETH_MAC_PORT_CTRL_CLK_RMII_t)

uint32_t clk_tx

Transmit clock (only MII), 25 MHz for 100Mbit/s, 2.5 MHz for 10Mbit/s (XMC_ETH_MAC_PORT_CTRL_CLK_TX_t)

uint32_t col

Collision Detect for only MII (XMC_ETH_MAC_PORT_CTRL_COL_t)

uint32_t crs

Carrier sense for only MII (XMC_ETH_MAC_PORT_CTRL_CRS_t)

uint32_t crs_dv

RMII: carrier sense/RX_Data valid. MII: RX_Data valid (XMC_ETH_MAC_PORT_CTRL_CRS_DV_t)

uint32_t mdio

Bidirectional, push-pull management data I/O line (XMC_ETH_MAC_PORT_CTRL_MDIO_t)

uint32_t mode

RMII or MII (XMC_ETH_MAC_PORT_CTRL_MODE_t)

uint32_t rxd0

Receive data bit 0 (XMC_ETH_MAC_PORT_CTRL_RXD0_t)

uint32_t rxd1

Receive data bit 1 (XMC_ETH_MAC_PORT_CTRL_RXD1_t)

uint32_t rxd2

Receive data bit 2 (only MII) (XMC_ETH_MAC_PORT_CTRL_RXD2_t)

uint32_t rxd3

Receive data bit 3 (only MII) (XMC_ETH_MAC_PORT_CTRL_RXD3_t)

uint32_t rxer

Receive error (XMC_ETH_MAC_PORT_CTRL_RXER_t)

The documentation for this union was generated from the following file:
  • xmc_eth_mac.h


XMC Peripheral Library for XMC4000 Family: XMC_ETH_MAC_t Struct Reference

Data Fields
XMC_ETH_MAC_t Struct Reference
XMC Peripheral Library » ETH_MAC

#include <xmc_eth_mac.h>

Data Fields

uint64_t | address
uint8_t * | frame_end
uint8_t | num_rx_buf
uint8_t | num_tx_buf
ETH_GLOBAL_TypeDef * | regs
uint8_t * | rx_buf
XMC_ETH_MAC_DMA_DESC_t * rx_desc
uint8_t | rx_index
uint8_t * | tx_buf
XMC_ETH_MAC_DMA_DESC_t * tx_desc
uint8_t | tx_index
uint8_t | tx_ts_index

Detailed Description

ETH driver structure

Field Documentation

uint64_t address

MAC address

uint8_t* frame_end

End of assembled frame fragments

uint8_t num_rx_buf

How many RX descriptors?

uint8_t num_tx_buf

How many TX descriptors?

ETH_GLOBAL_TypeDef* regs

ETH module 0 (now, we have a single ETH module)

uint8_t* rx_buf

RX buffer

XMC_ETH_MAC_DMA_DESC_t* rx_desc

DMA descriptor: RX

uint8_t rx_index

Receive descriptor index

uint8_t* tx_buf

TX buffer

XMC_ETH_MAC_DMA_DESC_t* tx_desc

DMA descriptor: TX

uint8_t tx_index

Transmit descriptor index

uint8_t tx_ts_index

Transmit time-stamp descriptor index

The documentation for this struct was generated from the following file:
  • xmc_eth_mac.h


XMC Peripheral Library for XMC4000 Family: XMC_ETH_MAC_TIME_t Struct Reference

Data Fields
XMC_ETH_MAC_TIME_t Struct Reference
XMC Peripheral Library » ETH_MAC

#include <xmc_eth_mac.h>

Data Fields

int32_t | nanoseconds
uint32_t | seconds

Detailed Description

ETH MAC time

Field Documentation

int32_t nanoseconds

Nanoseconds

uint32_t seconds

Seconds

The documentation for this struct was generated from the following file:
  • xmc_eth_mac.h


XMC Peripheral Library for XMC4000 Family: ETH_PHY

Data Structures | Enumerations | Functions
ETH_PHY
XMC Peripheral Library

Data Structures

struct XMC_ETH_PHY_CONFIG_t

Enumerations

Functions

int32_t | XMC_ETH_PHY_ExitPowerDown (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)
XMC_ETH_LINK_DUPLEX_t | XMC_ETH_PHY_GetLinkDuplex (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)
XMC_ETH_LINK_SPEED_t | XMC_ETH_PHY_GetLinkSpeed (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)
XMC_ETH_LINK_STATUS_t | XMC_ETH_PHY_GetLinkStatus (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)
int32_t | XMC_ETH_PHY_Init (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr, const XMC_ETH_PHY_CONFIG_t *const config)
bool | XMC_ETH_PHY_IsAutonegotiationCompleted (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)
int32_t | XMC_ETH_PHY_PowerDown (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)
int32_t | XMC_ETH_PHY_Reset (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)

Detailed Description

The XMC_ETH_PHY low level driver provides functions used by XMC_ETH_MAC.

Enumeration Type Documentation

enum XMC_ETH_PHY_STATUS_t

ETH PHY status returns

Enumerator
XMC_ETH_PHY_STATUS_OK | OK. All is well!
XMC_ETH_PHY_STATUS_BUSY | Busy
XMC_ETH_PHY_STATUS_ERROR | Error
XMC_ETH_PHY_STATUS_ERROR_DEVICE_ID | Error in device identifier
XMC_ETH_PHY_STATUS_ERROR_TIMEOUT | Time-out error

Function Documentation

int32_t XMC_ETH_PHY_ExitPowerDown | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint8_t | phy_addr
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
phy_addr | Physical address
Returns
int32_t return status XMC_ETH_PHY_STATUS_t
Description:
Exit power down mode
XMC_ETH_LINK_DUPLEX_t XMC_ETH_PHY_GetLinkDuplex | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint8_t | phy_addr
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
phy_addr | Physical address
Returns
XMC_ETH_LINK_DUPLEX_t ETH link duplex settings
Description:
Get link duplex settings
The function reads the physical layer interface and returns the link duplex settings. It returns either XMC_ETH_LINK_DUPLEX_FULL or XMC_ETH_LINK_DUPLEX_HALF.
XMC_ETH_LINK_SPEED_t XMC_ETH_PHY_GetLinkSpeed | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint8_t | phy_addr
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
phy_addr | Physical address
Returns
XMC_ETH_LINK_SPEED_t ETH link speed
Description:
Get link speed
The function reads the physical layer interface and returns the link speed. It returns either XMC_ETH_LINK_SPEED_100M or XMC_ETH_LINK_SPEED_10M.
XMC_ETH_LINK_STATUS_t XMC_ETH_PHY_GetLinkStatus | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint8_t | phy_addr
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
phy_addr | Physical address
Returns
XMC_ETH_LINK_STATUS_t ETH link status
Description:
Get link status
The function reads the physical layer interface and returns the link status. It returns either XMC_ETH_LINK_STATUS_UP or XMC_ETH_LINK_STATUS_DOWN.
int32_t XMC_ETH_PHY_Init | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint8_t | phy_addr,
 |  | const XMC_ETH_PHY_CONFIG_t *const | config
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
phy_addr | Physical address
config | A constant pointer to XMC_ETH_PHY_CONFIG_t, pointing to a physical layer config
Returns
int32_t return status XMC_ETH_PHY_STATUS_t
Description:
Initialize the ETH physical layer interface
The function sets the link speed, applies the duplex mode, sets auto-negotiation and loop-back settings.
bool XMC_ETH_PHY_IsAutonegotiationCompleted | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint8_t | phy_addr
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
phy_addr | Physical address
Returns
bool True if autonegotiation process is finished otherwise false
Description:
Get status of autonegotiation
int32_t XMC_ETH_PHY_PowerDown | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint8_t | phy_addr
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
phy_addr | Physical address
Returns
int32_t return status XMC_ETH_PHY_STATUS_t
Description:
Enter power down mode
int32_t XMC_ETH_PHY_Reset | ( | XMC_ETH_MAC_t *const | eth_mac,
 |  | uint8_t | phy_addr
 | ) |  |
Parameters
eth_mac | A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address
phy_addr | Physical address
Returns
int32_t return status XMC_ETH_PHY_STATUS_t
Description:
Reset transciver
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_ETH_PHY_CONFIG_t Struct Reference

Data Fields
XMC_ETH_PHY_CONFIG_t Struct Reference
XMC Peripheral Library » ETH_PHY

#include <xmc_eth_phy.h>

Data Fields

XMC_ETH_LINK_DUPLEX_t duplex
bool | enable_auto_negotiate
bool | enable_loop_back
XMC_ETH_LINK_INTERFACE_t interface
XMC_ETH_LINK_SPEED_t speed

Detailed Description

ETH PHY configuration

Field Documentation

XMC_ETH_LINK_DUPLEX_t duplex

Half or full duplex?

bool enable_auto_negotiate

Enable auto-negotiate?

bool enable_loop_back

Enable loop-back?

XMC_ETH_LINK_INTERFACE_t interface

Link interface

XMC_ETH_LINK_SPEED_t speed

ETH speed: 100M or 10M?

The documentation for this struct was generated from the following file:
  • xmc_eth_phy.h


XMC Peripheral Library for XMC4000 Family: FCE

Data Structures | Macros | Typedefs | Enumerations | Functions
FCE
XMC Peripheral Library

Data Structures

struct | XMC_FCE_CONFIG_t
struct | XMC_FCE_t

Macros

#define | XMC_FCE_CRC16 FCE_KE2
#define | XMC_FCE_CRC32_0 FCE_KE0
#define | XMC_FCE_CRC32_1 FCE_KE1
#define | XMC_FCE_CRC8 FCE_KE3
#define | XMC_FCE_INVSEL_RESET (0U)
#define | XMC_FCE_INVSEL_SET (1U)
#define | XMC_FCE_REFIN_RESET (0U)
#define | XMC_FCE_REFIN_SET (1U)
#define | XMC_FCE_REFOUT_RESET (0U)
#define | XMC_FCE_REFOUT_SET (1U)

Typedefs

typedef FCE_KE_TypeDef XMC_FCE_Kernel_t

Enumerations

Functions

XMC_FCE_STATUS_t | XMC_FCE_CalculateCRC16 (const XMC_FCE_t *const engine, const uint16_t *data, uint32_t length, uint16_t *result)
XMC_FCE_STATUS_t | XMC_FCE_CalculateCRC32 (const XMC_FCE_t *const engine, const uint32_t *data, uint32_t length, uint32_t *result)
XMC_FCE_STATUS_t | XMC_FCE_CalculateCRC8 (const XMC_FCE_t *const engine, const uint8_t *data, uint32_t length, uint8_t *result)
void | XMC_FCE_ClearEvent (const XMC_FCE_t *const engine, XMC_FCE_STS_FLAG_t event)
void | XMC_FCE_Disable (void)
void | XMC_FCE_DisableCRCAlgorithm (const XMC_FCE_t *const engine, uint32_t algo)
void | XMC_FCE_DisableEvent (const XMC_FCE_t *const engine, uint32_t event)
void | XMC_FCE_DisableOperation (const XMC_FCE_t *const engine, uint32_t operation)
void | XMC_FCE_Enable (void)
void | XMC_FCE_EnableCRCAlgorithm (const XMC_FCE_t *const engine, uint32_t algo)
void | XMC_FCE_EnableEvent (const XMC_FCE_t *const engine, uint32_t event)
void | XMC_FCE_EnableOperation (const XMC_FCE_t *const engine, uint32_t operation)
bool | XMC_FCE_Get_DisableStatus (void)
void | XMC_FCE_GetCRCResult (const XMC_FCE_t *const engine, uint32_t *result)
bool | XMC_FCE_GetEventStatus (const XMC_FCE_t *const engine, XMC_FCE_STS_FLAG_t event)
XMC_FCE_STATUS_t | XMC_FCE_Init (const XMC_FCE_t *const engine)
void | XMC_FCE_InitializeSeedValue (const XMC_FCE_t *const engine, uint32_t seedvalue)
void | XMC_FCE_LittleEndian16bit (uint8_t *inbuffer, uint16_t *outbuffer, uint16_t length)
void | XMC_FCE_LittleEndian32bit (uint8_t *inbuffer, uint32_t *outbuffer, uint16_t length)
uint32_t | XMC_FCE_ReadModuleNumber (void)
uint32_t | XMC_FCE_ReadModuleRev (void)
uint32_t | XMC_FCE_ReadModuleType (void)
void | XMC_FCE_TriggerMismatch (const XMC_FCE_t *const engine, XMC_FCE_CTR_TEST_t test)
void | XMC_FCE_UpdateCRCCheck (const XMC_FCE_t *const engine, const uint32_t checkvalue)
void | XMC_FCE_UpdateLength (const XMC_FCE_t *const engine, const uint32_t checklength)

Detailed Description

The FCE provides a parallel implementation of Cyclic Redundancy Code (CRC) algorithms. The current FCE version for the XMC4000 microcontroller family implements the IEEE 802.3 ethernet CRC32, the CCITT CRC16 and the SAE J1850 CRC8 polynomials. The primary target of FCE is to be used as an hardware acceleration engine for software applications or operating systems services using CRC signatures.

FCE Features:

  • CRC kernel 0 and 1: IEEE 802.3 CRC32 ethernet polynomial: 0x04C11DB71
  • CRC kernel 2: CCITT CRC16 polynomial: 0x1021
  • CRC kernel 3: SAE J1850 CRC8 polynomial: 0x1D
  • Configuration Registers enable to control the CRC operation and perform automatic checksum checks at the end of a message.
  • Extended register interface to control reliability of FCE execution in safety applications.
  • Error notification scheme via dedicated interrupt node for:
    a)Transient error detection: Error interrupt generation (maskable) with local status register (cleared by software)
    b)Checksum failure: Error interrupt generation (maskable) with local status register (cleared by software)

FCE provides one interrupt line to the interrupt system. Each CRC engine has its own set of flag registers.

Macro Definition Documentation

#define XMC_FCE_CRC16 FCE_KE2

Kernel 2

#define XMC_FCE_CRC32_0 FCE_KE0

Kernel 0

#define XMC_FCE_CRC32_1 FCE_KE1

Kernel 1

#define XMC_FCE_CRC8 FCE_KE3

Kernel 3

#define XMC_FCE_INVSEL_RESET (0U)

Disables output inversion

#define XMC_FCE_INVSEL_SET (1U)

Enables output inversion

#define XMC_FCE_REFIN_RESET (0U)

Disables input reflection

#define XMC_FCE_REFIN_SET (1U)

Enables input reflection

#define XMC_FCE_REFOUT_RESET (0U)

Disables output reflection

#define XMC_FCE_REFOUT_SET (1U)

Enables output reflection

Typedef Documentation

typedef FCE_KE_TypeDef XMC_FCE_Kernel_t

FCE kernel

Enumeration Type Documentation

enum XMC_FCE_CONFIG_ALGO_t

FCE algorithm configuration

Enumerator
XMC_FCE_CFG_CONFIG_REFIN | Enables input byte reflection
XMC_FCE_CFG_CONFIG_REFOUT | Enables Final CRC reflection
XMC_FCE_CFG_CONFIG_XSEL | Enables output inversion
enum XMC_FCE_CONFIG_INTERRUPT_t

FCE interrupt configuration

Enumerator
XMC_FCE_CFG_CONFIG_CMI | Enables CRC Mismatch interrupt
XMC_FCE_CFG_CONFIG_CEI | Enables Configuration error interrupt
XMC_FCE_CFG_CONFIG_LEI | Enables Length error interrupt
XMC_FCE_CFG_CONFIG_BEI | Enables Bus error interrupt
enum XMC_FCE_CONFIG_OPERATION_t

FCE operation configuration

Enumerator
XMC_FCE_CFG_CONFIG_CCE | Enables CRC check
XMC_FCE_CFG_CONFIG_ALR | Enables Automatic length reload
enum XMC_FCE_CTR_TEST_t

FCE control configuration

Enumerator
XMC_FCE_CTR_MISMATCH_CRC | Forces CRC mismatch
XMC_FCE_CTR_MISMATCH_CFG | Forces CFG Register mismatch
XMC_FCE_CTR_MISMATCH_CHECK | Forces CRC Check Register mismatch
enum XMC_FCE_STATUS_t

FCE status enumeration

Enumerator
XMC_FCE_STATUS_OK | Returns OK on success
XMC_FCE_STATUS_BUSY | Returns BUSY when API is busy with a previous request
XMC_FCE_STATUS_ERROR | Returns ERROR when API cannot fulfil request
enum XMC_FCE_STS_FLAG_t

FCE status flag configuration

Enumerator
XMC_FCE_STS_MISMATCH_CRC | CRC Mismatch flag
XMC_FCE_STS_CONFIG_ERROR | Configuration Error flag
XMC_FCE_STS_LENGTH_ERROR | Length Error flag
XMC_FCE_STS_BUS_ERROR | Bus Error flag

Function Documentation

XMC_FCE_STATUS_t XMC_FCE_CalculateCRC16 | ( | const XMC_FCE_t *const | engine,
 |  | const uint16_t * | data,
 |  | uint32_t | length,
 |  | uint16_t * | result
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
data | Pointer to the data buffer
length | Length of data buffer
result | Pointer to computed CRC result
Returns
XMC_FCE_STATUS_ERROR on error
XMC_FCE_STATUS_SUCCESS otherwise.
Description:
Calculate and update the RC16 checksum in the result pointer
Note:
A write to Internal Register (IRm m = 2) triggers the CRC kernel to update the message checksum according to the IR and current CRC register contents. Only 32-bit or 16-bit write transactions are permitted. Any other bus write transaction will lead to a bus error. Only the lower 16-bit of the write transactions will be used. XMC_FCE_GetCRCResult() should be called after XMC_FCE_CalculateCRC16() to get final CRC value.
XMC_FCE_STATUS_t XMC_FCE_CalculateCRC32 | ( | const XMC_FCE_t *const | engine,
 |  | const uint32_t * | data,
 |  | uint32_t | length,
 |  | uint32_t * | result
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
data | Pointer to the data buffer
length | Total number of bytes of data buffer
result | Pointer to computed CRC result
Returns
XMC_FCE_STATUS_ERROR on error
XMC_FCE_STATUS_SUCCESS otherwise.
Description
Calculate and update the calculated CRC32 checksum in the result pointer
Note:
A write to Internal Register (IRm, m = 0-1) triggers the CRC kernel to update the message checksum according to the IR and current CRC register contents. Only 32-bit write transactions are permitted. Any other bus write transaction will lead to a bus error. XMC_FCE_GetCRCResult() should be called after XMC_FCE_CalculateCRC32() to get final CRC value.
XMC_FCE_STATUS_t XMC_FCE_CalculateCRC8 | ( | const XMC_FCE_t *const | engine,
 |  | const uint8_t * | data,
 |  | uint32_t | length,
 |  | uint8_t * | result
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
data | Pointer to the data buffer
length | Total number of bytes of data buffer
result | Pointer to computed CRC result
Returns
XMC_FCE_STATUS_ERROR on error
XMC_FCE_STATUS_SUCCESS otherwise.
Description:
Calculate and updates the CRC8 checksum in the result pointer
Note:
A write to IRm (m = 3) triggers the CRC kernel to update the message checksum according to the IR and current CRC register contents. Any write transaction is allowed to this IRm register. Only the lower 8-bit of the write transactions will be used. XMC_FCE_GetCRCResult() should be called after invoking XMC_FCE_CalculateCRC8() to get final CRC value.
void XMC_FCE_ClearEvent | ( | const XMC_FCE_t *const | engine,
 |  | XMC_FCE_STS_FLAG_t | event
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
event | Event of type XMC_FCE_STS_FLAG_t
Returns
None
Description:
Clear an FCE event
The function clears requested FCE events by setting the bit-fields of the STS register.
void XMC_FCE_Disable ( void )
Parameters
None
Returns
None
Description:
Disable the FCE module
The function asserts the FCE peripheral reset and sets the DISR bit in the CLC register.
Note:
All pending transactions running on the bus slave interface must be completed before entering the disabled state.
void XMC_FCE_DisableCRCAlgorithm | ( | const XMC_FCE_t *const | engine,
 |  | uint32_t | algo
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
algo | A valid algorithm of type XMC_FCE_CONFIG_ALGO_t or a valid combination of logically OR'd algorithms
Returns
None
Description:
Disable CRC algorithm(s)
Note:
Options for disabling CRC algorithm:
REFIN: Input byte wise reflection
REFOUT: Output bit wise reflection
XSEL: Value to be XORed with final CRC
void XMC_FCE_DisableEvent | ( | const XMC_FCE_t *const | engine,
 |  | uint32_t | event
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
event | OR'd values of XMC_FCE_CONFIG_INTERRUPT_t enumeration values
Returns
None
Description:
Disable FCE event(s)
The function clears the CFG register to disable FCE event(s).
void XMC_FCE_DisableOperation | ( | const XMC_FCE_t *const | engine,
 |  | uint32_t | operation
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
operation | FCE operation of type XMC_FCE_CONFIG_OPERATION_t
Returns
None
Description:
Disable CRC operations
The function disables FRC operations by writing to the CFG register.
Note:
CRC comparison check (at the end of message) can be disabled using the CCE bit-field. Automatic reload of LENGTH field (at the end of message) can be disabled using the ALR bit field.
void XMC_FCE_Enable ( void )
Parameters
None
Returns
None
Description:
Enable the FCE module
The function de-asserts the peripheral reset and clears the DISR bit CLC register.
void XMC_FCE_EnableCRCAlgorithm | ( | const XMC_FCE_t *const | engine,
 |  | uint32_t | algo
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
algo | A valid algorithm of type XMC_FCE_CONFIG_ALGO_t or a valid combination of logically OR'd algorithms
Returns
None
Description:
Enables CRC algorithm(s)
Note:
Options for enabling CRC algorithm:
REFIN: Input byte wise reflection
REFOUT: Output bit wise reflection
XSEL: Value to be XORed with final CRC
void XMC_FCE_EnableEvent | ( | const XMC_FCE_t *const | engine,
 |  | uint32_t | event
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
event | OR'd values of XMC_FCE_CONFIG_INTERRUPT_t enumeration values
Returns
None
Description:
Enable FCE event(s)
The function sets the CFG register to enable FCE event(s).
void XMC_FCE_EnableOperation | ( | const XMC_FCE_t *const | engine,
 |  | uint32_t | operation
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
operation | FCE operation of type XMC_FCE_CONFIG_OPERATION_t
Returns
None
Description:
Enable CRC operations
The function enables FRC operations by writing to the CFG register.
Note:
CRC comparison check (at the end of message) can be enabled using the CCE bit-field. Automatic reload of LENGTH field (at the end of message) can be enabled using the ALR bit field.
bool XMC_FCE_Get_DisableStatus ( void )
Parameters
None
Returns
bool Disable status
Description:
Return the disable status
The function reads the FCE module disable status (DISS) bit. It returns "true" if set, "false" otherwise.
void XMC_FCE_GetCRCResult | ( | const XMC_FCE_t *const | engine,
 |  | uint32_t * | result
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
result | Pointer to CRC result
Returns
None
Description:
Read the final CRC value from RES register
bool XMC_FCE_GetEventStatus | ( | const XMC_FCE_t *const | engine,
 |  | XMC_FCE_STS_FLAG_t | event
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
event | Event of type XMC_FCE_STS_FLAG_t
Returns
bool
Description:
Return the event status of FCE event
The function returns the status of a single requested FCE event by reading the appropriate bit-fields of the STS register.
XMC_FCE_STATUS_t XMC_FCE_Init ( const XMC_FCE_t *const engine )
Parameters
engine Constant pointer to XMC_FCE_t, pointing to the FCE base address
Returns
XMC_FCE_STATUS_t
Description:
Initialize the FCE engine
The function sets to the CFG and CRC registers with the FCE configuration and seeds values. The function always returns XMC_FCE_STATUS_SUCCESS.
Note:
The software must first ensure that the CRC kernel is properly configured with the initial CRC value (seed value).
void XMC_FCE_InitializeSeedValue | ( | const XMC_FCE_t *const | engine,
 |  | uint32_t | seedvalue
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
seedvalue | Initial CRC value
Returns
None
Description:
Initialize FCE seed value
The function sets the initial CRC (seed) value in the CRC register.
void XMC_FCE_LittleEndian16bit | ( | uint8_t * | inbuffer,
 |  | uint16_t * | outbuffer,
 |  | uint16_t | length
 | ) |  |
Parameters
inbuffer | Pointer to input data buffer
outbuffer | Pointer to the output data buffer
length | Length of the input buffer
Returns
None
Description:
Convert input data buffer's endianness from big endian to little endian
The function stores the converted data in output data buffer.
Note:
This function should be invoked before using XMC_FCE_CalculateCRC16() to compute the CRC value.
void XMC_FCE_LittleEndian32bit | ( | uint8_t * | inbuffer,
 |  | uint32_t * | outbuffer,
 |  | uint16_t | length
 | ) |  |
Parameters
inbuffer | Pointer to input data buffer
outbuffer | Pointer to the output data buffer
length | Length of the input buffer
Returns
None
Description:
Convert input data buffer's endianness from big endian to little endian
The function stores the converted data in output data buffer.
Note:
This function should be invoked before using XMC_FCE_CalculateCRC32() to compute the CRC value.
uint32_t XMC_FCE_ReadModuleNumber ( void )
Parameters
None
Returns
uint32_t Module number
Description:
Read FCE module number
The return value for FCE module is currently 0x00CA.
uint32_t XMC_FCE_ReadModuleRev ( void )
Parameters
None
Returns
uint32_t Module revision number
Description:
Read FCE module revision number
The value of a module revision starts with 0x01 (first revision). The current revision number is 0x01.
uint32_t XMC_FCE_ReadModuleType ( void )
Parameters
None
Returns
uint32_t Module type
Description:
Read the FCE module type
The return value is currently 0xC0. It defines the module as a 32-bit module.
void XMC_FCE_TriggerMismatch | ( | const XMC_FCE_t *const | engine,
 |  | XMC_FCE_CTR_TEST_t | test
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
test | values of type XMC_FCE_CTR_TEST_t
Returns
None
Description:
Trigger the CTR register to generate a CRC mismatch/register mismatch/check register mismatch interrupt
void XMC_FCE_UpdateCRCCheck | ( | const XMC_FCE_t *const | engine,
 |  | const uint32_t | checkvalue
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
checkvalue | Checksum value
Returns
None
Description:
Updates CRC check value
When the CFG.CCE bit field is set, every time the IR register is written, the LENGTH register is decremented by one until it reaches zero. The hardware monitors the transition of the LENGTH register from 1 to 0 to detect the end of the message and proceed with the comparison of the result register (RES) value with the CHECK register value.
void XMC_FCE_UpdateLength | ( | const XMC_FCE_t *const | engine,
 |  | const uint32_t | checklength
 | ) |  |
Parameters
engine | Constant pointer to XMC_FCE_t, pointing to the FCE base address
checklength | Checksum length
Returns
None
Description:
Updates CRC length specified in the input parameter
When the ALR bit field is set to 1, every write to the IR register decrements the value of the LENGTH bit field. The LENGTH field shall be reloaded with its configuration value at the end of the cycle where LENGTH reaches 0.
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_FCE_CONFIG_t Struct Reference

XMC_FCE_CONFIG_t Struct Reference
XMC Peripheral Library » FCE

#include <xmc_fce.h>

Field Documentation

uint32_t __pad1__

Reserved bits

uint32_t config_refin

Enables byte-wise reflection

uint32_t config_refout

Enables bit-wise reflection

uint32_t config_xsel

Enables output inversion

The documentation for this struct was generated from the following file:
  • xmc_fce.h


XMC Peripheral Library for XMC4000 Family: XMC_FCE_t Struct Reference

Data Fields
XMC_FCE_t Struct Reference
XMC Peripheral Library » FCE

#include <xmc_fce.h>

Data Fields

XMC_FCE_CONFIG_t fce_cfg_update
XMC_FCE_Kernel_t * kernel_ptr
uint32_t seedvalue

Detailed Description

FCE handler

Field Documentation

XMC_FCE_CONFIG_t fce_cfg_update

FCE CFG register update

XMC_FCE_Kernel_t* kernel_ptr

FCE Kernel Pointer

uint32_t seedvalue

CRC seed value to be used

The documentation for this struct was generated from the following file:
  • xmc_fce.h


XMC Peripheral Library for XMC4000 Family: FLASH

Macros | Enumerations | Functions
FLASH
XMC Peripheral Library

Macros

#define | XMC_FLASH_BYTES_PER_PAGE (256UL)
#define | XMC_FLASH_BYTES_PER_UCB (1024UL)
#define | XMC_FLASH_PHY_SECTOR_0 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x00000UL)
#define | XMC_FLASH_PHY_SECTOR_10 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x80000UL)
#define | XMC_FLASH_PHY_SECTOR_11 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0xC0000UL)
#define | XMC_FLASH_PHY_SECTOR_12 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x100000UL)
#define | XMC_FLASH_PHY_SECTOR_13 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x140000UL)
#define | XMC_FLASH_PHY_SECTOR_14 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x180000UL)
#define | XMC_FLASH_PHY_SECTOR_15 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x1C0000UL)
#define | XMC_FLASH_PHY_SECTOR_4 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x10000UL)
#define | XMC_FLASH_PHY_SECTOR_8 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x20000UL)
#define | XMC_FLASH_PHY_SECTOR_9 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x40000UL)
#define | XMC_FLASH_SECTOR_0 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x00000UL)
#define | XMC_FLASH_SECTOR_1 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x04000UL)
#define | XMC_FLASH_SECTOR_10 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x80000UL)
#define | XMC_FLASH_SECTOR_11 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0xC0000UL)
#define | XMC_FLASH_SECTOR_12 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x100000UL)
#define | XMC_FLASH_SECTOR_13 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x140000UL)
#define | XMC_FLASH_SECTOR_14 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x180000UL)
#define | XMC_FLASH_SECTOR_15 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x1C0000UL)
#define | XMC_FLASH_SECTOR_2 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x08000UL)
#define | XMC_FLASH_SECTOR_3 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x0C000UL)
#define | XMC_FLASH_SECTOR_4 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x10000UL)
#define | XMC_FLASH_SECTOR_5 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x14000UL)
#define | XMC_FLASH_SECTOR_6 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x18000UL)
#define | XMC_FLASH_SECTOR_7 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x1C000UL)
#define | XMC_FLASH_SECTOR_8 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x20000UL)
#define | XMC_FLASH_SECTOR_9 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x40000UL)
#define | XMC_FLASH_UCB0 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x0000UL)
#define | XMC_FLASH_UCB1 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x0400UL)
#define | XMC_FLASH_UCB2 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x0800UL)
#define | XMC_FLASH_UNCACHED_BASE (0x0C000000U)
#define | XMC_FLASH_WORDS_PER_PAGE (64UL)

Enumerations

Functions

void | XMC_FLASH_ClearStatus (void)
void | XMC_FLASH_ConfirmProtection (uint8_t user)
void | XMC_FLASH_DisableDoubleBitErrorTrap (void)
void | XMC_FLASH_DisableDynamicIdle (void)
void | XMC_FLASH_DisableEvent (const uint32_t event_msk)
void | XMC_FLASH_DisableSleepRequest (void)
void | XMC_FLASH_DisableWaitStateForECC (void)
void | XMC_FLASH_EnableDoubleBitErrorTrap (void)
void | XMC_FLASH_EnableDynamicIdle (void)
void | XMC_FLASH_EnableEvent (const uint32_t event_msk)
void | XMC_FLASH_EnableSleepRequest (void)
void | XMC_FLASH_EnableWaitStateForECC (void)
void | XMC_FLASH_ErasePhysicalSector (uint32_t *sector_start_address)
void | XMC_FLASH_EraseSector (uint32_t *address)
void | XMC_FLASH_EraseUCB (uint32_t *ucb_sector_start_address)
uint32_t | XMC_FLASH_GetStatus (void)
void | XMC_FLASH_InstallProtection (uint8_t user, uint32_t protection_mask, uint32_t password_0, uint32_t password_1)
bool | XMC_FLASH_IsBusy (void)
void | XMC_FLASH_ProgramPage (uint32_t *address, const uint32_t *data)
void | XMC_FLASH_RepairPhysicalSector (void)
void | XMC_FLASH_Reset (void)
void | XMC_FLASH_ResumeProtection (void)
void | XMC_FLASH_SetMargin (const XMC_FLASH_MARGIN_t margin)
void | XMC_FLASH_SetWaitStates (uint32_t num_wait_states)
bool | XMC_FLASH_VerifyReadProtection (uint32_t password_0, uint32_t password_1)
bool | XMC_FLASH_VerifyWriteProtection (uint32_t user, uint32_t protection_mask, uint32_t password_0, uint32_t password_1)
void | XMC_PREFETCH_DisableInstructionBuffer (void)
void | XMC_PREFETCH_EnableInstructionBuffer (void)
void | XMC_PREFETCH_InvalidateInstructionBuffer (void)

Detailed Description

Flash is a non volatile memory module used to store instruction code or constant data. The flash low level driver provides support to the following functionalities of flash memory.

  1. Provides function to program a page. ( XMC_FLASH_ProgramPage() )
  2. Provides functions to support read and write protection. ( XMC_FLASH_InstallProtection(), XMC_FLASH_ConfirmProtection(), XMC_FLASH_VerifyReadProtection(), XMC_FLASH_VerifyWriteProtection() )
  3. Provides function to erase sector. ( XMC_FLASH_EraseSector() )

Macro Definition Documentation

#define XMC_FLASH_BYTES_PER_PAGE (256UL)

Number of bytes in a page

#define XMC_FLASH_BYTES_PER_UCB (1024UL)

Number of bytes in a user configurable block Note : Total number of Sectors depends on the flash size of the controller. So while using these macros for flash operations ensure that sector is available, other may lead to flash error.

#define XMC_FLASH_PHY_SECTOR_0 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x00000UL)

Starting address of non cached physical sector0

#define XMC_FLASH_PHY_SECTOR_10 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x80000UL)

Starting address of non cached physical sector10

#define XMC_FLASH_PHY_SECTOR_11 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0xC0000UL)

Starting address of non cached physical sector11

#define XMC_FLASH_PHY_SECTOR_12 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x100000UL)

Starting address of non cached physical sector12

#define XMC_FLASH_PHY_SECTOR_13 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x140000UL)

Starting address of non cached physical sector13

#define XMC_FLASH_PHY_SECTOR_14 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x180000UL)

Starting address of non cached physical sector14

#define XMC_FLASH_PHY_SECTOR_15 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x1C0000UL)

Starting address of non cached physical sector15

#define XMC_FLASH_PHY_SECTOR_4 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x10000UL)

Starting address of non cached physical sector4

#define XMC_FLASH_PHY_SECTOR_8 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x20000UL)

Starting address of non cached physical sector8

#define XMC_FLASH_PHY_SECTOR_9 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x40000UL)

Starting address of non cached physical sector9

#define XMC_FLASH_SECTOR_0 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x00000UL)

Starting address of sector0

#define XMC_FLASH_SECTOR_1 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x04000UL)

Starting address of sector1

#define XMC_FLASH_SECTOR_10 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x80000UL)

Starting address of sector10

#define XMC_FLASH_SECTOR_11 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0xC0000UL)

Starting address of sector11

#define XMC_FLASH_SECTOR_12 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x100000UL)

Starting address of sector12

#define XMC_FLASH_SECTOR_13 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x140000UL)

Starting address of sector13

#define XMC_FLASH_SECTOR_14 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x180000UL)

Starting address of sector14

#define XMC_FLASH_SECTOR_15 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x1C0000UL)

Starting address of sector15

#define XMC_FLASH_SECTOR_2 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x08000UL)

Starting address of sector2

#define XMC_FLASH_SECTOR_3 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x0C000UL)

Starting address of sector3

#define XMC_FLASH_SECTOR_4 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x10000UL)

Starting address of sector4

#define XMC_FLASH_SECTOR_5 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x14000UL)

Starting address of sector5

#define XMC_FLASH_SECTOR_6 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x18000UL)

Starting address of sector6

#define XMC_FLASH_SECTOR_7 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x1C000UL)

Starting address of sector7

#define XMC_FLASH_SECTOR_8 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x20000UL)

Starting address of sector8

#define XMC_FLASH_SECTOR_9 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x40000UL)

Starting address of sector9

#define XMC_FLASH_UCB0 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x0000UL)

Starting address of User Configurable Block 0

#define XMC_FLASH_UCB1 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x0400UL)

Starting address of User Configurable Block 1

#define XMC_FLASH_UCB2 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x0800UL)

Starting address of User Configurable Block 2

#define XMC_FLASH_UNCACHED_BASE (0x0C000000U)

Non cached flash starting address of for XMC4 family of microcontrollers

#define XMC_FLASH_WORDS_PER_PAGE (64UL)

Number of words in a page (256 bytes / 4 bytes = 64 words)

Enumeration Type Documentation

enum XMC_FLASH_EVENT_t

Provides the options to select flash operational events

Enumerator
XMC_FLASH_EVENT_VERIFY_AND_OPERATION_ERROR | Flash verify and operation error event
XMC_FLASH_EVENT_COMMAND_SEQUENCE_ERROR | Flash command sequence error event
XMC_FLASH_EVENT_PROTECTION_ERROR | Flash protection error event
XMC_FLASH_EVENT_SINGLE_BIT_ERROR | Flash single bit error event
XMC_FLASH_EVENT_DOUBLE_BIT_ERROR | Flash double bit error event
XMC_FLASH_EVENT_END_OF_BUSY | Flash end of busy event
enum XMC_FLASH_MARGIN_t

Provides the options to select flash margin read settings of the for quality assurance.

Enumerator
XMC_FLASH_MARGIN_DEFAULT | Default margin
XMC_FLASH_MARGIN_TIGHT0 | Sub-optimal 0-bits are read as 1s
XMC_FLASH_MARGIN_TIGHT1 | Sub-optimal 1-bits are read as 0s
enum XMC_FLASH_PROTECTION_t

Provides the options to select sectors for write protection and select global read protection. The members can be combined using 'OR' operator for multiple selection.

Enumerator
XMC_FLASH_PROTECTION_WRITE_SECTOR_0 | Sector 0 write protection
XMC_FLASH_PROTECTION_WRITE_SECTOR_1 | Sector 1 write protection
XMC_FLASH_PROTECTION_WRITE_SECTOR_2 | Sector 3 write protection
XMC_FLASH_PROTECTION_WRITE_SECTOR_3 | Sector 3 write protection
XMC_FLASH_PROTECTION_WRITE_SECTOR_4 | Sector 4 write protection
XMC_FLASH_PROTECTION_WRITE_SECTOR_5 | Sector 5 write protection
XMC_FLASH_PROTECTION_WRITE_SECTOR_6 | Sector 6 write protection
XMC_FLASH_PROTECTION_WRITE_SECTOR_7 | Sector 7 write protection
XMC_FLASH_PROTECTION_WRITE_SECTOR_8 | Sector 8 write protection
XMC_FLASH_PROTECTION_WRITE_SECTOR_9 | Sector 9 write protection
XMC_FLASH_PROTECTION_WRITE_SECTORS_10_11 | Sector 10 and 11 write protection
XMC_FLASH_PROTECTION_WRITE_SECTORS_12_13 | Sector 12 and 13 write protection
XMC_FLASH_PROTECTION_WRITE_SECTORS_14_15 | Sector 14 and 15 write protection
XMC_FLASH_PROTECTION_READ_GLOBAL | Global read protection (Applicable for UserLevel0 alone)
enum XMC_FLASH_STATUS_t

Defines the return status of the API.

Enumerator
XMC_FLASH_STATUS_OK | Operation completed successfully
XMC_FLASH_STATUS_BUSY | API cannot proceed since FLASH is busy
XMC_FLASH_STATUS_PROGRAMMING_STATE | Write page is in progress or finished
XMC_FLASH_STATUS_ERASE_STATE | Erase page is in progress or finished
XMC_FLASH_STATUS_PAGE_MODE | Flash is in page mode. Assembly buffer of PFLASH is in use
XMC_FLASH_STATUS_OPERATION_ERROR | Flash Operation aborted
XMC_FLASH_STATUS_COMMAND_SEQUENCE_ERROR | Improper address or Invalid state machine operation
XMC_FLASH_STATUS_PROTECTION_ERROR | Flash operation addressing the locked sector
XMC_FLASH_STATUS_SINGLE_BIT_ERROR_AND_CORRECTION | Single bit error detected and corrected
XMC_FLASH_STATUS_DOUBLE_BIT_ERROR | Multiple bit error occurred
XMC_FLASH_STATUS_PROTECTION_INSTALLED | Confirmation of the read or/and write protection is successful
XMC_FLASH_STATUS_READ_PROTECTION_INSTALLED | Confirmation of read and global write protection is successful for user-0
XMC_FLASH_STATUS_READ_PROTECTION_DISABLED_STATE | Read or/and write protection is temporarily disabled
XMC_FLASH_STATUS_WRITE_PROTECTION_INSTALLED_UCB0 | Sector write protection is installed for user-0
XMC_FLASH_STATUS_WRITE_PROTECTION_INSTALLED_UCB1 | Sector write protection is installed for user-1
XMC_FLASH_STATUS_WRITE_PROTECTION_INSTALLED_UCB2 | Sector OTP protection is installed for user-2
XMC_FLASH_STATUS_WRITE_PROTECTION_DISABLED_UCB0 | Sector write protection is disabled for user-0
XMC_FLASH_STATUS_WRITE_PROTECTION_DISABLED_UCB1 | Sector write protection is disabled for user-1
XMC_FLASH_STATUS_SLEEP_MODE | Indicates flash in sleep mode or not
XMC_FLASH_STATUS_VERIFY_ERROR | Write verification and Erase verification error occurred

Function Documentation

void XMC_FLASH_ClearStatus ( void )
Parameters
None
Returns
None
Description:
Clears the previous error status by reseting the FSR status register.

Call this API before starting any flash programming / erase related APIs to ensure all previous errors are cleared.
Related APIs:
None
void XMC_FLASH_ConfirmProtection ( uint8_t user )
Parameters
user ID number of the user configuration block (UCB).
Range: [0 to 2]
Returns
None
Description:
Confirms the protection, so that sectors specified under user configurable block are locked forever.

The protection shall be installed by calling XMC_FLASH_InstallProtection() before calling this API. The confirmation starts by issuing the page mode entry command followed by the load page command. The load page command issues the confirmation protection command for the sectors on which the protection installation was done. It also loads the specified passwords password0 and password1 respectively. Finally, it issues the confirm protection command for the specified user configuration block so that the sectors will be protected forever.
Related APIs:
XMC_FLASH_InstallProtection()
void XMC_FLASH_DisableDoubleBitErrorTrap ( void )
Parameters
None
Returns
None
Description:
Disables the trap generation for double bit error by clearing MARP register bit TRAPDIS.

The double-bit error trap can be disabled for margin checks and also redirected to an error interrupt. Any time during the execution the double bit error trap can be enabled back by calling XMC_FLASH_EnableDoubleBitErrorTrap() API.
Related APIs:
None
void XMC_FLASH_DisableDynamicIdle ( void )
Parameters
None
Returns
None
Description:
Disables dynamic idle mode feature.

It resets the FCON register IDLE bit to disable this feature. Hence normal flash read operation is selected.
Related APIs:
XMC_FLASH_EnableDynamicIdle()

void XMC_FLASH_DisableEvent ( const uint32_t event_msk )
Parameters
event_msk ORed values of XMC_FLASH_EVENT_t enumeration
Returns
None
Description:
Disables the particular flash events as specified in the input parameter.
Related APIs:
XMC_FLASH_EnableEvent()

void XMC_FLASH_DisableSleepRequest ( void )
Parameters
None
Returns
None
Description:
Wake-up the PFLASH from sleep.

Wakes-up from sleep is done by clearing the bit FCON.SLEEP, if selected via this bit, or wake-up is initiated by releasing the external sleep signal from SCU.
Note:
fCPU must be equal or above 1 MHz when wake-up request is triggered.
Related APIs:
XMC_FLASH_EnableSleepRequest()

void XMC_FLASH_DisableWaitStateForECC ( void )
Parameters
None
Returns
None
Description:
Disables the wait state for error correction.

Removes additional wait state for ECC by resetting WSECPF bit of FCON register.
Related APIs:
XMC_FLASH_EnableWaitStateForECC()

void XMC_FLASH_EnableDoubleBitErrorTrap ( void )
Parameters
None
Returns
None
Description:
Enables double bit error trap.

. It enables by setting MARP register bit TRAPDIS.
Related APIs:
None
void XMC_FLASH_EnableDynamicIdle ( void )
Parameters
None
Returns
None
Description:
Enables dynamic idle mode feature to save power.

It switches off the PFLASH read path when no read access is pending. Hence power is saved marginally. This slightly reduces the flash read performance because static pre-fetching is disabled.It sets the FCON register IDLE bit to enable this feature.
Related APIs:
XMC_FLASH_DisableDynamicIdle()

void XMC_FLASH_EnableEvent ( const uint32_t event_msk )
Parameters
event_msk ORed values of XMC_FLASH_EVENT_t enumeration
Returns
None
Description:
Enables the particular flash events as specified in the input parameter.
Related APIs:
XMC_FLASH_DisableEvent()

void XMC_FLASH_EnableSleepRequest ( void )
Parameters
None
Returns
None
Description:
Enables sleep mode of the PFLASH.

Sleep mode is enabled by setting the bit FCON.SLEEP.
Note:
fCPU must be equal or above 1 MHz when wake-up request is triggered.
Related APIs:
XMC_FLASH_DisableSleepRequest()

void XMC_FLASH_EnableWaitStateForECC ( void )
Parameters
None
Returns
None
Description:
Enables the wait state for error correction.process, It enables one additional wait state for ECC by setting WSECPF bit of FCON register.
Related APIs:
XMC_FLASH_DisableWaitStateForECC()

void XMC_FLASH_ErasePhysicalSector ( uint32_t * sector_start_address )
Parameters
sector_start_address Pointer to the starting address of physical sector. Use XMC_FLASH_SECTOR_x MACRO defined in xmc4_flash.h file.
Returns
None
Description:
Erases the physical sector "PSA".

If "PSA" does not point to base address of a correct sector or an unavailable sector, it returns SQER.
Related APIs:
None
void XMC_FLASH_EraseSector ( uint32_t * address )
Parameters
address Pointer to the starting address of the page to be erased.
Returns
None
Description:

Erases a sector associated with the specified address.

Before erase, it clears the error status bits inside FSR status register. Issues the erase sector command sequence with the specified starting address to start flash erase process. Call XMC_FLASH_GetStatus() API after calling this API, to verify the erase operation.

Related APIs:
None
void XMC_FLASH_EraseUCB ( uint32_t * ucb_sector_start_address )
Parameters
ucb_sector_start_address Pointer to the starting address of physical sector. Use XMC_FLASH_UCBx MACRO defined in xmc4_flash.h file.
Returns
None
Description:
The addressed user configuration block “UCB” is erased.

Erases UCB whose startting address specified in the input parameter ucb_sector_start_address. When the UCB has an active write protection or the Flash module has an active global read protection the execution fails and PROER is set. The command fails with SQER when ucb_sector_start_address is not the start address of a valid UCB. Call XMC_FLASH_GetStatus API after this API to verify the erase was proper ot not.
Related APIs:
None
uint32_t XMC_FLASH_GetStatus ( void )
Parameters
None
Returns
uint32_t Status of the previous flash operation.
Description:
Informs the status of flash by reading the FSR register.

It indicates the error status such as PFOPER, SQER, PROER, PFDBER, ORIER, VER errors as well as the current flash state. After calling the flash read/write/erase operation related APIs, call this API to verify flash status. The return value of this API shall be checked against the members of XMC_FLASH_STATUS_t enumeration to get the relevant status.
Related APIs:
None
void XMC_FLASH_InstallProtection | ( | uint8_t | user,
 |  | uint32_t | protection_mask,
 |  | uint32_t | password_0,
 |  | uint32_t | password_1
 | ) |  |
Parameters
user ID number of the user configuration block (UCB).
Range: [0 to 2]
protection_mask ORed values of XMC_FLASH_PROTECTION_t enum type, for which sectors the protection has to be enabled.
password_0 First password for protection.
Range: [0 to 4294967295]
password_1 Second password for protection.
Range: [0 to 4294967295]
Returns
None
Description:
Installs the global read and sector write protection.

The installation starts by issuing the page mode entry command followed by the load page command. The load page command mode loads the required sectors intended for protection specified in protection_mask. It also loads the specified passwords password0 and password1 respectively. Finally, it issues the write page command for the specified user configuration block. Calling XMC_FLASH_ConfirmProtection() after this API completes the protection process by freezing the sectors forever.
Related APIs:
XMC_FLASH_ConfirmProtection()
XMC_FLASH_VerifyReadProtection()
bool XMC_FLASH_IsBusy ( void )
Parameters
None
Returns
true if flash is in busy state else returns false.
Description:
Checks whether flash is in busy state or not.

It is checked by calling the XMC_FLASH_GetStatus() API internally. Refer XMC_FLASH_GetStatus() for more details.
Related APIs:
XMC_FLASH_GetStatus()

void XMC_FLASH_ProgramPage | ( | uint32_t * | address,
 |  | const uint32_t * | data
 | ) |  |
Parameters
address | Pointer to the starting address of flash page from where the programming starts.
data | Pointer to the source address where targeted data is located.
Returns
None
Description:
Programs a single flash page associated with the specified address.

XMC4000 flash can be programmed with a granularity of 256 bytes page using this API. Before entering into page write process, it clears the error status bits inside status register. It starts the write process by issuing the page mode command followed by the load page command which loads the targeted data blocks into internal assembly buffer. Finally, it issues the write page command which programs the data into flash. Call XMC_FLASH_GetStatus() API after calling this API, to verify the programming operation.
Note:
Flash will be busy state during write is ongoing, hence no operations allowed until it completes.
Related APIs:
None
void XMC_FLASH_RepairPhysicalSector ( void )
Parameters
None
Returns
None
Description:
Repairs the physical sector "PS4".

For selected devices, Erase Physical Sector can also be used for Sector Soft Repair, depending on the configuration of PROCON1.PSR. This command sequence is required to run an EEPROM emulation algorithm that cycles the logical sectors S4..S7 of PS4. This command sequence repairs the corrupted logical sectors inside the physical sector due to interrupted erase operation.
Related APIs:
None
void XMC_FLASH_Reset ( void )
Parameters
None
Returns
None
Description:
Resets the command interpreter to its initial state.

Reset to Read can cancel every command sequence before its last command cycle has been received. All error flags gets cleared by calling this API.
Note:
todo
Related APIs:
None
void XMC_FLASH_ResumeProtection ( void )
Parameters
None
Returns
None
Description:
Resumes flash protection as it was configured before.

It clears all the disable proection status flags FSR.WPRODISx and FSR.RPRODIS. But FSR.WPRODISx is not cleared when corresponding UCBx is not in the “confirmed” state.
Related APIs:
None
void XMC_FLASH_SetMargin ( const XMC_FLASH_MARGIN_t margin )
Parameters
margin PFLASH margin selection. Use type XMC_FLASH_MARGIN_t.
Returns
None
Description:
Sets the read margin levels for checking the healthiness of flash data.

Configures the margin field of MARP MARP register with the specified margin level. It changes the margin levels for read operations to find problematic array bits.
Related APIs:
None
void XMC_FLASH_SetWaitStates ( uint32_t num_wait_states )
Parameters
num_wait_states number of wait states for initial read access
Range: [0 to 15]
Returns
None
Description:
Configures the number of wait states for initial flash read access.

Depending on the configured num_wait_states value into FCON resister WSPFLASH field, the read performance gets optimized . The wait cycles for the flash read access must be configured based on the CPU frequency (fCPU), in relation to the flash access time (ta) defined. The access time formula (WSPFLASH x (1 / fCPU) >= ta) applies only for the values num_wait_states >0.
Related APIs:
None
bool XMC_FLASH_VerifyReadProtection | ( | uint32_t | password_0,
 |  | uint32_t | password_1
 | ) |  |
Parameters
password_0 First password used for protection.
Range: [0 to 4294967295]
password_1 Second password used for protection.
Range: [0 to 4294967295]
Returns
true if read protection installed properly else returns false.
Description:
Verifies sector read protection is properly installed or not.

Before entering into verify read protection process, it clears the error status bits inside status register. It temporarily disables the protection with passwords password0 and password1 respectively. It reads the FSR register and verifies the protection state. Resumption of read protection after disablement is achieved by XMC_FLASH_ResumeProtection or until next reset.
Related APIs:
XMC_FLASH_InstallProtection()
XMC_FLASH_VerifyWriteProtection()
XMC_FLASH_ResumeProtection()
bool XMC_FLASH_VerifyWriteProtection | ( | uint32_t | user,
 |  | uint32_t | protection_mask,
 |  | uint32_t | password_0,
 |  | uint32_t | password_1
 | ) |  |
Parameters
user ID number of the user configuration block (UCB).
Range: [0 to 2]
protection_mask ORed values of XMC_FLASH_PROTECTION_t enum type, for which sectors the protection has to be verified.
password_0 First password used for protection.
Range: [0 to 4294967295]
password_1 Second password used for protection.
Range: [0 to 4294967295]
Returns
true if write protection installed properly else returns false.
Description:
Verifies sector read protection is properly installed or not.

Before entering into verify read protection process, it clears the error status bits inside status register. It temporarily disables the protection with passwords password0 and password1 respectively for the intended sectors specified in protection_mask. It reads the FSR register and verifies the write protection state. Resumption of write protection after disablement is achieved by XMC_FLASH_ResumeProtection or until next reset.
Related APIs:
XMC_FLASH_InstallProtection()
XMC_FLASH_VerifyReadProtection()
XMC_FLASH_ResumeProtection()
void XMC_PREFETCH_DisableInstructionBuffer ( void )
Parameters
None
Returns
None
Description:
Bypasses the instruction buffer for cacheable accesses, by setting the register bit PREF_PCON.IBYP.
Related APIs:
None
void XMC_PREFETCH_EnableInstructionBuffer ( void )
Parameters
None
Returns
None
Description:
Configures the cacheable accesses to use the instruction buffer by resetting the register bit PREF_PCON.IBYP.
Related APIs:
None
void XMC_PREFETCH_InvalidateInstructionBuffer ( void )
Parameters
None
Returns
None
Description:
Invalidates the instruction buffer by setting PREF_PCON register bit IINV.

After system reset, the instruction buffer is automatically invalidated.
Note:
The complete invalidation operation is performed in a single cycle.
Related APIs:
None
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: GPIO

Data Structures | Enumerations | Functions
GPIO
XMC Peripheral Library

Data Structures

struct | XMC_GPIO_CONFIG_t
struct | XMC_GPIO_PORT_t

Enumerations

Functions

void | XMC_GPIO_DisableDigitalInput (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_DisablePowerSaveMode (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_EnableDigitalInput (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_EnablePowerSaveMode (XMC_GPIO_PORT_t *const port, const uint8_t pin)
uint32_t | XMC_GPIO_GetInput (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_Init (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_CONFIG_t *const config)
void | XMC_GPIO_SetHardwareControl (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_HWCTRL_t hwctrl)
void | XMC_GPIO_SetMode (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_MODE_t mode)
void | XMC_GPIO_SetOutputHigh (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_SetOutputLevel (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_OUTPUT_LEVEL_t level)
void | XMC_GPIO_SetOutputLow (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_SetOutputStrength (XMC_GPIO_PORT_t *const port, const uint8_t pin, XMC_GPIO_OUTPUT_STRENGTH_t strength)
void | XMC_GPIO_ToggleOutput (XMC_GPIO_PORT_t *const port, const uint8_t pin)

Detailed Description

GPIO driver provide a generic and very flexible software interface for all standard digital I/O port pins. Each port slice has individual interfaces for the operation as General Purpose I/O and it further provides the connectivity to the on-chip periphery and the control for the pad characteristics.

The driver is divided into Input and Output mode.

Input mode features:

  1. Configuration structure XMC_GPIO_CONFIG_t and initialization function XMC_GPIO_Init()
  2. Allows the selection of weak pull-up or pull-down device. Configuration structure XMC_GPIO_MODE_t and function XMC_GPIO_SetMode()

Output mode features:

  1. Allows the selection of push pull/open drain and Alternate output. Configuration structure XMC_GPIO_MODE_t and function XMC_GPIO_SetMode()
  2. Allows the selection of pad driver strength. Configuration structure XMC_GPIO_OUTPUT_STRENGTH_t and function XMC_GPIO_SetOutputStrength()
  3. Allows the selection of initial output level. Configuration structure XMC_GPIO_OUTPUT_LEVEL_t and function XMC_GPIO_SetOutputLevel()

Enumeration Type Documentation

enum XMC_GPIO_HWCTRL_t

Defines direct hardware control characteristics of the pin . Use type XMC_GPIO_HWCTRL_t for this enum.

Enumerator
XMC_GPIO_HWCTRL_DISABLED | Software control only
XMC_GPIO_HWCTRL_PERIPHERAL1 | HWI0/HWO0 control path can override the software configuration
XMC_GPIO_HWCTRL_PERIPHERAL2 | HWI1/HWO1 control path can override the software configuration
enum XMC_GPIO_MODE_t

Defines the direction and characteristics of a pin. Use type XMC_GPIO_MODE_t for this enum. For the operation with alternate functions, the port pins are directly connected to input or output functions of the on-chip periphery.

Enumerator
XMC_GPIO_MODE_INPUT_TRISTATE | No internal pull device active
XMC_GPIO_MODE_INPUT_PULL_DOWN | Internal pull-down device active
XMC_GPIO_MODE_INPUT_PULL_UP | Internal pull-up device active
XMC_GPIO_MODE_INPUT_SAMPLING | No internal pull device active;Pn_OUTx continuously samples the input value
XMC_GPIO_MODE_INPUT_INVERTED_TRISTATE | Inverted no internal pull device active
XMC_GPIO_MODE_INPUT_INVERTED_PULL_DOWN | Inverted internal pull-down device active
XMC_GPIO_MODE_INPUT_INVERTED_PULL_UP | Inverted internal pull-up device active
XMC_GPIO_MODE_INPUT_INVERTED_SAMPLING | Inverted no internal pull device active; Pn_OUTx continuously samples the input value
XMC_GPIO_MODE_OUTPUT_PUSH_PULL | Push-pull general-purpose output
XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN | Open-drain general-purpose output
XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1 | Push-pull alternate output function 1
XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2 | Push-pull alternate output function 2
XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT3 | Push-pull alternate output function 3
XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4 | Push-pull alternate output function 4
XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT1 | Open drain alternate output function 1
XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT2 | Open drain alternate output function 2
XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT3 | Open drain alternate output function 3
XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT4 | Open drain alternate output function 4
enum XMC_GPIO_OUTPUT_LEVEL_t

Defines output level of a pin. Use type XMC_GPIO_OUTPUT_LEVEL_t for this enum.

Enumerator
XMC_GPIO_OUTPUT_LEVEL_LOW | Reset bit
XMC_GPIO_OUTPUT_LEVEL_HIGH | Set bit
enum XMC_GPIO_OUTPUT_STRENGTH_t

Defines output strength and slew rate of a pin. Use type XMC_GPIO_OUTPUT_STRENGTH_t for this enum.

Enumerator
XMC_GPIO_OUTPUT_STRENGTH_STRONG_SHARP_EDGE | Defines pad driver mode, for high speed 3.3V LVTTL outputs
XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE | Defines pad driver mode, for high speed 3.3V LVTTL outputs
XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE | Defines pad driver mode, medium speed 3.3V LVTTL outputs
XMC_GPIO_OUTPUT_STRENGTH_STRONG_SLOW_EDGE | Defines pad driver mode, medium speed 3.3V LVTTL outputs
XMC_GPIO_OUTPUT_STRENGTH_MEDIUM | Defines pad driver mode, for low speed 3.3V LVTTL outputs
XMC_GPIO_OUTPUT_STRENGTH_WEAK | Defines pad driver mode, low speed 3.3V LVTTL outputs

Function Documentation

void XMC_GPIO_DisableDigitalInput | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_PDISC.
pin | port pin number.
Returns
None
Related APIs:
None
Description:
Disable digital input path for analog pins and configures Pn_PDISC register.This configuration is applicable only for analog port pins.
void XMC_GPIO_DisablePowerSaveMode | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_PPS.
pin | port pin number.
Returns
None
Description:
Disables pin power save mode and configures Pn_PPS register.This configuration is useful when the controller enters Deep Sleep mode. This configuration enables input Schmitt-Trigger and output driver stage(if pin is enabled power save mode previously). By default port pin does not react to power save mode request.
Related APIs:
XMC_GPIO_EnablePowerSaveMode()
Note:
Do not enable the Pin Power Save function for pins configured for Hardware Control (Pn_HWSEL.HWx != 00B). Doing so may result in an undefined behavior of the pin when the device enters the Deep Sleep state.
void XMC_GPIO_EnableDigitalInput | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_PDISC.
pin | port pin number.
Returns
None
Related APIs:
None
Description:
Enable digital input path for analog pins and configures Pn_PDISC register.This configuration is applicable only for analog port pins.
void XMC_GPIO_EnablePowerSaveMode | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_PPS.
pin | port pin number.
Returns
None
Description:
Enables pin power save mode and configures Pn_PPS register.This configuration is useful when the controller enters Deep Sleep mode.Port pin enabled with power save mode option are set to a defined state and the input Schmitt-Trigger as well as the output driver stage are switched off. By default port pin does not react to power save mode request.
Related APIs:
XMC_GPIO_DisablePowerSaveMode()

Note:
Do not enable the Pin Power Save function for pins configured for Hardware Control (Pn_HWSEL.HWx != 00B). Doing so may result in an undefined behavior of the pin when the device enters the Deep Sleep state.

uint32_t XMC_GPIO_GetInput | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_IN.
pin | Port pin number.
Returns
uint32_t pin logic level status.
Description:
Reads the Pn_IN register and returns the current logical value at the GPIO pin.
Related APIs:
None
Note:
Prior to this api, user has to configure port pin to input mode using XMC_GPIO_SetMode().
void XMC_GPIO_Init | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin,
 |  | const XMC_GPIO_CONFIG_t *const | config
 | ) |  |
Parameters
port | Constant pointer pointing to GPIO port, to access port registers like Pn_OUT,Pn_OMR,Pn_IOCR etc.
pin | Port pin number.
config | GPIO configuration data structure. Refer data structure XMC_GPIO_CONFIG_t for details.
Returns
None
Description:
Initializes input / output mode settings like, pull up / pull down devices,push pull /open drain, and pad driver mode. Also configures alternate function outputs and clears hardware port control for selected port and pin . It configures hardware registers Pn_IOCR,Pn_OUT,Pn_OMR,Pn_PDISC and Pn_PDR.
Related APIs:
None
Note:
This API is called in definition of DAVE_init by code generation and therefore should not be explicitly called for the normal operation. Use other APIs only after DAVE_init is called successfully (returns DAVE_STATUS_SUCCESS).
void XMC_GPIO_SetHardwareControl | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin,
 |  | const XMC_GPIO_HWCTRL_t | hwctrl
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_HWSEL.
pin | port pin number.
hwctrl | direct hardware control selection. Refer XMC_GPIO_HWCTRL_t for valid values.
Returns
None
Description:
Selects direct hard ware control and configures Pn_HWSEL register.This configuration is useful for the port pins overlaid with peripheral functions for which the connected peripheral needs hardware control.
Related APIs:
None
Note:
Do not enable the Pin Power Save function for pins configured for Hardware Control (Pn_HWSEL.HWx != 00B). Doing so may result in an undefined behavior of the pin when the device enters the Deep Sleep state.
void XMC_GPIO_SetMode | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin,
 |  | const XMC_GPIO_MODE_t | mode
 | ) |  |
Parameters
port | Constant pointer pointing to GPIO port, to access hardware register Pn_IOCR.
pin | Port pin number.
mode | input / output functionality selection. Refer XMC_GPIO_MODE_t for valid values.
Returns
None
Description:
Sets digital input and output driver functionality and characteristics of a GPIO port pin. It configures hardware registers Pn_IOCR. mode is initially configured during initialization in XMC_GPIO_Init(). Call this API to alter the port direction functionality as needed later in the program.
Related APIs:
None
void XMC_GPIO_SetOutputHigh | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_OMR.
pin | Port pin number.
Returns
None
Description:
Sets port pin output to high. It configures hardware registers Pn_OMR.
Related APIs:
XMC_GPIO_SetOutputLow()
Note:
Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode().
Register Pn_OMR is virtual and does not contain any flip-flop. A read action delivers the value of 0.
void XMC_GPIO_SetOutputLevel | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin,
 |  | const XMC_GPIO_OUTPUT_LEVEL_t | level
 | ) |  |
Parameters
port | Constant pointer pointing to GPIO port, to access hardware register Pn_OMR.
pin | Port pin number.
level | output level selection. Refer XMC_GPIO_OUTPUT_LEVEL_t for valid values.
Returns
None
Description:
Set port pin output level to high or low.It configures hardware registers Pn_OMR.level is initially configured during initialization in XMC_GPIO_Init(). Call this API to alter output level as needed later in the program.
Related APIs:
XMC_GPIO_SetOutputHigh(), XMC_GPIO_SetOutputLow().
Note:
Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode().
void XMC_GPIO_SetOutputLow | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_OMR.
pin | port pin number.
Returns
None
Description:
Sets port pin output to low. It configures hardware registers Pn_OMR.
Related APIs:>
XMC_GPIO_SetOutputHigh()
Note:
Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode(). Register Pn_OMR is virtual and does not contain any flip-flop. A read action delivers the value of 0.
void XMC_GPIO_SetOutputStrength | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin,
 |  | XMC_GPIO_OUTPUT_STRENGTH_t | strength
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_PDR.
pin | Port pin number.
strength | Output driver mode selection. Refer data structure XMC_GPIO_OUTPUT_STRENGTH_t for details.
Returns
None
Description:
Sets port pin output strength and slew rate. It configures hardware registers Pn_PDR. strength is initially configured during initialization in XMC_GPIO_Init(). Call this API to alter output driver mode as needed later in the program.
Related APIs:
None
Note:
Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode().
void XMC_GPIO_ToggleOutput | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_OMR.
pin | port pin number.
Returns
None
Description:
Configures port pin output to Toggle. It configures hardware registers Pn_OMR.
Related APIs:
XMC_GPIO_SetOutputHigh(), XMC_GPIO_SetOutputLow().
Note:
Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode(). Register Pn_OMR is virtual and does not contain any flip-flop. A read action delivers the value of 0.
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_GPIO_CONFIG_t Struct Reference

Data Fields
XMC_GPIO_CONFIG_t Struct Reference
XMC Peripheral Library » GPIO

#include <xmc4_gpio.h>

Data Fields

XMC_GPIO_MODE_t mode
XMC_GPIO_OUTPUT_LEVEL_t output_level
XMC_GPIO_OUTPUT_STRENGTH_t output_strength

Detailed Description

Structure initializes port pin. Use type XMC_GPIO_CONFIG_t for this structure.

Field Documentation

XMC_GPIO_MODE_t mode

Defines the direction and characteristics of a pin

XMC_GPIO_OUTPUT_LEVEL_t output_level

Defines output level of a pin

XMC_GPIO_OUTPUT_STRENGTH_t output_strength

Defines pad driver mode of a pin

The documentation for this struct was generated from the following file:
  • xmc4_gpio.h


XMC Peripheral Library for XMC4000 Family: XMC_GPIO_PORT_t Struct Reference

Data Fields
XMC_GPIO_PORT_t Struct Reference
XMC Peripheral Library » GPIO

#include <xmc4_gpio.h>

Data Fields

__IO uint32_t | HWSEL
__I uint32_t | IN
__IO uint32_t | IOCR [4]
__O uint32_t | OMR
__IO uint32_t | OUT
__IO uint32_t | PDISC
__IO uint32_t | PDR [2]
__IO uint32_t | PPS

Detailed Description

Structure points port hardware registers. Use type XMC_GPIO_PORT_t for this structure.

Field Documentation

__IO uint32_t HWSEL

Pin Hardware Select Register

__I uint32_t IN

The logic level of a GPIO pin can be read via the read-only port input register Pn_IN

__IO uint32_t IOCR[4]

The port input/output control registers select the digital output and input driver functionality and characteristics of a GPIO port pin

__O uint32_t OMR

The port output modification register contains control bits that make it possible to individually set, reset, or toggle the logic state of a single port line

__IO uint32_t OUT

The port output register determines the value of a GPIO pin when it is selected by Pn_IOCRx as output

__IO uint32_t PDISC

Pin Function Decision Control Register is to disable/enable the digital pad structure in shared analog and digital ports

__IO uint32_t PDR[2]

Pad Driver Mode Registers

__IO uint32_t PPS

Pin Power Save Register

The documentation for this struct was generated from the following file:
  • xmc4_gpio.h


XMC Peripheral Library for XMC4000 Family: HRPWM

Data Structures | Typedefs | Enumerations | Functions
HRPWM
XMC Peripheral Library

Data Structures

struct | XMC_HRPWM_CSG_CMP_t
struct | XMC_HRPWM_CSG_CONFIG_t
struct | XMC_HRPWM_CSG_DAC_t
struct | XMC_HRPWM_CSG_INPUT_CONFIG_t
struct | XMC_HRPWM_CSG_SGEN_t
struct | XMC_HRPWM_HRC_CONFIG_t
struct | XMC_HRPWM_HRC_SRC_CONFIG_t

Typedefs

typedef HRPWM0_CSG_Type | XMC_HRPWM_CSG_t
typedef HRPWM0_HRC_Type | XMC_HRPWM_HRC_t
typedef HRPWM0_Type | XMC_HRPWM_t

Enumerations

Functions

void | XMC_HRPWM_ClampComparatorOutput (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_ClearPreScaler (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_CSG_ClrEventSW (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_IRQ_ID_t event)
void | XMC_HRPWM_CSG_DACRefValSwitchingConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_DisableEvent (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_IRQ_ID_t event)
void | XMC_HRPWM_CSG_EnableEvent (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_IRQ_ID_t event)
uint32_t | XMC_HRPWM_CSG_GetEventStatus (XMC_HRPWM_CSG_t *const csg, const uint32_t mask)
void | XMC_HRPWM_CSG_Init (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_CONFIG_t *const config)
void | XMC_HRPWM_CSG_SelBlankingInput (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_SelClampingInput (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_SelSlopeGenClkInput (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_CLK_INPUT_t input_clk)
void | XMC_HRPWM_CSG_SetCMPInput (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_CMP_INPUT_t input)
void | XMC_HRPWM_CSG_SetEventSW (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_IRQ_ID_t event)
void | XMC_HRPWM_CSG_SetSRNode (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_IRQ_ID_t event, const XMC_HRPWM_CSG_IRQ_SR_LINE_t sr)
void | XMC_HRPWM_CSG_StartSlopeGenConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_StopSlopeGenConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_TriggerDACConvConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_TriggerShadowXferConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_UpdateBlankingValue (XMC_HRPWM_CSG_t *const csg, uint8_t value)
void | XMC_HRPWM_CSG_UpdateDACPrescaler (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_PRESCALER_DIVISION_t div_value)
void | XMC_HRPWM_CSG_UpdateDACRefDSV1 (XMC_HRPWM_CSG_t *const csg, uint32_t value)
void | XMC_HRPWM_CSG_UpdateDACRefDSV2 (XMC_HRPWM_CSG_t *const csg, uint32_t value)
void | XMC_HRPWM_CSG_UpdateDACStepGain (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_SLOPE_STEP_GAIN_t gain)
void | XMC_HRPWM_CSG_UpdateFilterWindow (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_CMP_FILTER_WINDOW_t window)
void | XMC_HRPWM_CSG_UpdatePulseClk (XMC_HRPWM_CSG_t *const csg, uint32_t value)
void | XMC_HRPWM_DisableBias (XMC_HRPWM_t *const hrpwm)
void | XMC_HRPWM_DisableComparatorShadowTransfer (XMC_HRPWM_t *const hrpwm, uint32_t mask)
void | XMC_HRPWM_DisableCsgClock (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_DisableGlobalHR (XMC_HRPWM_t *const hrpwm)
void | XMC_HRPWM_DisableHighResolutionPath (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_DisableHighResolutionShadowTransfer (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_DisableHRPowerMode (XMC_HRPWM_t *const hrpwm)
void | XMC_HRPWM_DisableLowResolutionPath (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_EnableBias (XMC_HRPWM_t *const hrpwm)
void | XMC_HRPWM_EnableComparatorShadowTransfer (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_EnableGlobalHR (XMC_HRPWM_t *const hrpwm)
void | XMC_HRPWM_EnableHighResolutionPath (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_EnableHighResolutionShadowTransfer (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_EnableHRPowerMode (XMC_HRPWM_t *const hrpwm)
void | XMC_HRPWM_EnableLowResolutionPath (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
uint32_t | XMC_HRPWM_GetCMPInput (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
uint32_t | XMC_HRPWM_GetComparatorShadowTransferStatus (XMC_HRPWM_t *const hrpwm)
uint32_t | XMC_HRPWM_GetHighResolutionShadowTransferStatus (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
XMC_HRPWM_HR_LOGIC_t | XMC_HRPWM_GetHRGenReadyStatus (XMC_HRPWM_t *const hrpwm)
uint32_t | XMC_HRPWM_GetRunBitStatus (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_HRC_ConfigSourceSelect0 (XMC_HRPWM_HRC_t *const hrc, const XMC_HRPWM_HRC_SRC_CONFIG_t *const config)
void | XMC_HRPWM_HRC_ConfigSourceSelect1 (XMC_HRPWM_HRC_t *const hrc, const XMC_HRPWM_HRC_SRC_CONFIG_t *const config)
void | XMC_HRPWM_HRC_Init (XMC_HRPWM_HRC_t *const hrc, const XMC_HRPWM_HRC_CONFIG_t *const config)
void | XMC_HRPWM_HRC_Set_HR_Source (XMC_HRPWM_HRC_t *const hrc, XMC_HRPWM_HRC_SOURCE_t source)
void | XMC_HRPWM_HRC_SetCompare1 (XMC_HRPWM_HRC_t *const hrc, const uint8_t cr1_value)
void | XMC_HRPWM_HRC_SetCompare2 (XMC_HRPWM_HRC_t *const hrc, const uint8_t cr2_value)
void | XMC_HRPWM_HRC_SetDeadTimeFalling (XMC_HRPWM_HRC_t *const hrc, uint16_t dcf_value)
void | XMC_HRPWM_HRC_SetDeadTimeRising (XMC_HRPWM_HRC_t *const hrc, uint16_t dcr_value)
XMC_HRPWM_STATUS_t | XMC_HRPWM_Init (XMC_HRPWM_t *const hrpwm)
uint32_t | XMC_HRPWM_IsComparatorClamped (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
bool | XMC_HRPWM_IsComparatorRunning (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
uint32_t | XMC_HRPWM_IsDacRunning (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
uint32_t | XMC_HRPWM_IsPrescalerRunning (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
bool | XMC_HRPWM_IsSlopeGenerationRunning (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_ModuleClkFreq (XMC_HRPWM_t *const hrpwm, const XMC_HRPWM_CLK_FREQ_t clk_freq)
void | XMC_HRPWM_SetCsgPowerMode (XMC_HRPWM_t *const hrpwm, const XMC_HRPWM_CSG_SLICE_t slice, const XMC_HRPWM_CSG_POWER_MODE_t power_mode)
void | XMC_HRPWM_StartComparator (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_StartDac (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_StartSlopeGeneration (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_StopComparator (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_StopDac (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_StopSlopeGeneration (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_UnClampComparatorOutput (XMC_HRPWM_t *const hrpwm, const uint32_t mask)

Detailed Description

The HRPWM extends the capabilities of the associated Capture/Compare Unit(CCU8), that simplifies the design various of SMPS. It allows easy and fast implementation of control loop, reduced total number of external components, avoid susceptibility to environmental and process variations there by reducing the size of the power supply.

Comparator Slope Generator(CSG)
HRPWM module consists 3 Comparator Slope Generator(CSG) units. Each CSG unit comprised of one High Speed Comparator, a dedicated 10 bit 30 MS/s DAC and one hardware controlled Slope Compensation module.

CSG features include:

  1. 3 High Speed Comparators, that can be use to compare an external signal against the DAC value
  2. 3 (30MS/s) 10 bit DAC
  3. 3 Slope generation blocks, that are used to generate the DAC input value
  4. different slope generations schemes, for a flexible and automated DAC voltage generation
  5. 2 DAC reference values, to allow flexible hysteretic mode control
  6. Input multiplexer for the inverting comparator input, allowing several analog inputs to be connected to each comparator and also dynamic input switching.
  7. blanking compare mode, to avoid premature switch OFF due to noise
  8. a dedicated output per Comparator
  9. programmable clock prescaler
  10. programmable clock pulse swallower for slope linearization with uneven clock scale
  11. different slope generation schemes:
    – incrementing mode
    – decrementing mode
    – triangular mode
  12. shadow transfer for one DAC reference value
  13. external trigger for the DAC
  14. external control for the DAC reference values
  15. four dedicated service request lines

High Resolution Channel unit(HRC)
It also has 4 High Resolution Channel unit(HRC) that upgrades 4 compare channels of a Capture/Compare unit (CCU8), enabling generation of PWM with 150ps resolution. ie; the rise time and/or fall time of PWM can be changed in steps of 150ps.

HRC features include:

  1. Upgrade up to 4 PWM signals of CCU8 outputs for high resolution positioning.
  2. Independent control of PWM set and reset.
  3. Delay the PWM rise time in steps of 150ps. This does not insert dead time.
  4. Extent the fall time of PWM in steps of 150ps. This does not insert dead time.
  5. Dead time insertion on complementary signals
  6. Passive level selection on outputs.

Typedef Documentation

typedef HRPWM0_CSG_Type XMC_HRPWM_CSG_t

Typedef for CSG unit registers data structure

typedef HRPWM0_HRC_Type XMC_HRPWM_HRC_t

Typedef for HRPWM high resolution channel registers data structure

typedef HRPWM0_Type XMC_HRPWM_t

Typedef for HRPWM Global registers data structure

Enumeration Type Documentation

enum XMC_HRPWM_CLK_FREQ_t

HRPWM module clock frequency

Enumerator
XMC_HRPWM_CLK_FREQ_NONE | No clock frequency is selected
XMC_HRPWM_CLK_FREQ_180MHZ | Module clock frequency is 180MHz
XMC_HRPWM_CLK_FREQ_120MHZ | Module clock frequency is 120MHz
XMC_HRPWM_CLK_FREQ_80MHZ | Module clock frequency is 80MHz
enum XMC_HRPWM_CSG_CLK_INPUT_t

HRPWM CSG - Slope Generation clock selection

Enumerator
XMC_HRPWM_CSG_CLK_INPUT_MCLK | Clock for CSG is module clock
XMC_HRPWM_CSG_CLK_INPUT_ECLKA | Clock for CSG is external clock A
XMC_HRPWM_CSG_CLK_INPUT_ECLKB | Clock for CSG is external clock B
XMC_HRPWM_CSG_CLK_INPUT_ECLKC | Clock for CSG is external clock C
enum XMC_HRPWM_CSG_CLK_t

HRPWM CSG - Configuration for Clock disable

Enumerator
XMC_HRPWM_CSG_CLK_CSG0 | CSG0 clock mask
XMC_HRPWM_CSG_CLK_CSG1 | CSG1 clock mask
XMC_HRPWM_CSG_CLK_CSG2 | CSG2 clock mask
enum XMC_HRPWM_CSG_CMP_FILTER_WINDOW_t

HRPWM CSG - Comparator output filter window

Enumerator
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_2_CLK_CYCLES | Needs to be stable for 2 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_3_CLK_CYCLES | Needs to be stable for 3 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_4_CLK_CYCLES | Needs to be stable for 4 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_5_CLK_CYCLES | Needs to be stable for 5 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_6_CLK_CYCLES | Needs to be stable for 6 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_7_CLK_CYCLES | Needs to be stable for 7 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_8_CLK_CYCLES | Needs to be stable for 8 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_9_CLK_CYCLES | Needs to be stable for 9 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_10_CLK_CYCLES | Needs to be stable for 10 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_11_CLK_CYCLES | Needs to be stable for 11 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_12_CLK_CYCLES | Needs to be stable for 12 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_13_CLK_CYCLES | Needs to be stable for 13 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_14_CLK_CYCLES | Needs to be stable for 14 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_15_CLK_CYCLES | Needs to be stable for 15 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_16_CLK_CYCLES | Needs to be stable for 16 clk cycles
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_32_CLK_CYCLES | Needs to be stable for 32 clk cycles
enum XMC_HRPWM_CSG_CMP_INPUT_t

Comparator inputs

Enumerator
XMC_HRPWM_CSG_CMP_INPUT_CINA | Input for comparator is CINA
XMC_HRPWM_CSG_CMP_INPUT_CINB | Input for comparator is CINB
enum XMC_HRPWM_CSG_CMP_INVERTING_INPUT_t

CSG comparator input switch request

Enumerator
XMC_HRPWM_CSG_CMP_INVERTING_INPUT_CMP0 | Comparator 0 inverting input connection
XMC_HRPWM_CSG_CMP_INVERTING_INPUT_CMP1 | Comparator 1 inverting input connection
XMC_HRPWM_CSG_CMP_INVERTING_INPUT_CMP2 | Comparator 2 inverting input connection
enum XMC_HRPWM_CSG_EDGE_SEL_t

HRPWM CSG - Selection of edge sensitivity

Enumerator
XMC_HRPWM_CSG_EDGE_SEL_DISABLED | Trigger event not generated
XMC_HRPWM_CSG_EDGE_SEL_RISING_EDGE | Trigger event not generated in rising edge
XMC_HRPWM_CSG_EDGE_SEL_FALLING_EDGE | Trigger event not generated in falling edge
XMC_HRPWM_CSG_EDGE_SEL_BOTH_EDGE | Trigger event not generated in both edges
enum XMC_HRPWM_CSG_INPUT_SEL_t

Input list to CSG

Enumerator
XMC_HRPWM_CSG_INPUT_SEL_IA | Input selected for blanking or comparator switch: Input-A
XMC_HRPWM_CSG_INPUT_SEL_IB | Input selected for blanking or comparator switch: Input-B
XMC_HRPWM_CSG_INPUT_SEL_IC | Input selected for blanking or comparator switch: Input-C
XMC_HRPWM_CSG_INPUT_SEL_ID | Input selected for blanking or comparator switch: Input-D
XMC_HRPWM_CSG_INPUT_SEL_IE | Input selected for blanking or comparator switch: Input-E
XMC_HRPWM_CSG_INPUT_SEL_IF | Input selected for blanking or comparator switch: Input-F
XMC_HRPWM_CSG_INPUT_SEL_IG | Input selected for blanking or comparator switch: Input-G
XMC_HRPWM_CSG_INPUT_SEL_IH | Input selected for blanking or comparator switch: Input-H
XMC_HRPWM_CSG_INPUT_SEL_II | Input selected for blanking or comparator switch: Input-I
XMC_HRPWM_CSG_INPUT_SEL_IJ | Input selected for blanking or comparator switch: Input-J
XMC_HRPWM_CSG_INPUT_SEL_IK | Input selected for blanking or comparator switch: Input-K
XMC_HRPWM_CSG_INPUT_SEL_IL | Input selected for blanking or comparator switch: Input-L
XMC_HRPWM_CSG_INPUT_SEL_IM | Input selected for blanking or comparator switch: Input-M
XMC_HRPWM_CSG_INPUT_SEL_IN | Input selected for blanking or comparator switch: Input-N
XMC_HRPWM_CSG_INPUT_SEL_IO | Input selected for blanking or comparator switch: Input-O
XMC_HRPWM_CSG_INPUT_SEL_IP | Input selected for blanking or comparator switch: Input-P
enum XMC_HRPWM_CSG_IRQ_ID_t

HRPWM CSG - IRQ Event Id The enum is used to access the bitfields of registers CSGySRE, CSGySRS, CSGySWS, CSGySWC, CSGyISTAT

Enumerator
XMC_HRPWM_CSG_IRQ_ID_VLS1 | Interrupt on DAC value switch from CSGyDSV1 to CSGyDSV2 interrupt
XMC_HRPWM_CSG_IRQ_ID_VLS2 | Interrupt on DAC value switch from CSGyDSV2 to CSGyDSV1 interrupt
XMC_HRPWM_CSG_IRQ_ID_TRGS | Interrupt on DAC conversion trigger
XMC_HRPWM_CSG_IRQ_ID_STRS | Interrupt on DAC start trigger
XMC_HRPWM_CSG_IRQ_ID_STPS | Interrupt on DAC stop trigger
XMC_HRPWM_CSG_IRQ_ID_STD | Interrupt on DAC shadow transfer
XMC_HRPWM_CSG_IRQ_ID_CRSE | Interrupt on comparator output rise edge
XMC_HRPWM_CSG_IRQ_ID_CFSE | Interrupt on comparator output fall edge
XMC_HRPWM_CSG_IRQ_ID_CSEE | Interrupt on comparator output clamped state
enum XMC_HRPWM_CSG_IRQ_SR_LINE_t

HRPWM CSG - Service request line

Enumerator
XMC_HRPWM_CSG_IRQ_SR_LINE_0 | CSG - Service request SR-0
XMC_HRPWM_CSG_IRQ_SR_LINE_1 | CSG - Service request SR-1
XMC_HRPWM_CSG_IRQ_SR_LINE_2 | CSG - Service request SR-2
XMC_HRPWM_CSG_IRQ_SR_LINE_3 | CSG - Service request SR-3
enum XMC_HRPWM_CSG_LVL_SEL_t

HRPWM CSG - Selection of level sensitivity

Enumerator
XMC_HRPWM_CSG_LVL_SEL_DISABLED | Level sensitivity is disabled
XMC_HRPWM_CSG_LVL_SEL_HIGH | Level sensitivity is High
XMC_HRPWM_CSG_LVL_SEL_LOW | Level sensitivity is Low
enum XMC_HRPWM_CSG_POWER_MODE_t

CSG power modes

Enumerator
XMC_HRPWM_CSG_POWER_MODE_OFF | Comparator slope generator turned off
XMC_HRPWM_CSG_POWER_MODE_LOW_SPEED | Comparator slope generator in low speed mode
XMC_HRPWM_CSG_POWER_MODE_HI_SPEED | Comparator slope generator in high speed mode
enum XMC_HRPWM_CSG_PRESCALER_CLR_t

Clear prescaler in CSG

Enumerator
XMC_HRPWM_CSG_PRESCALER_CLR_CSG0 | Clear prescaler of CSG0
XMC_HRPWM_CSG_PRESCALER_CLR_CSG1 | Clear prescaler of CSG1
XMC_HRPWM_CSG_PRESCALER_CLR_CSG2 | Clear prescaler of CSG2
enum XMC_HRPWM_CSG_PRESCALER_DIVISION_t

HRPWM CSG - Slope step gain

Enumerator
XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_1 | Division by 1
XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_2 | Division by 2
XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_4 | Division by 4
XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_8 | Division by 8
enum XMC_HRPWM_CSG_PRESCALER_EXT_START_t

HRPWM CSG - Prescaler external start configuration

Enumerator
XMC_HRPWM_CSG_PRESCALER_EXT_START_IGNORE | Prescaler operation on external start trigger is: Ignore
XMC_HRPWM_CSG_PRESCALER_EXT_START_STRT | Prescaler operation on external start trigger is: Start prescaler
XMC_HRPWM_CSG_PRESCALER_EXT_START_CLR | Prescaler operation on external start trigger is: Clear prescaler
XMC_HRPWM_CSG_PRESCALER_EXT_START_CLR_N_STRT | Prescaler operation on external start trigger is: Clear & Start prescaler
enum XMC_HRPWM_CSG_PRESCALER_EXT_STOP_t

HRPWM CSG - Prescaler external stop configuration

Enumerator
XMC_HRPWM_CSG_PRESCALER_EXT_STOP_IGNORE | Prescaler operation on external stop trigger is: Ignore
XMC_HRPWM_CSG_PRESCALER_EXT_STOP_STP | Prescaler operation on external stop trigger is: Stop prescaler
XMC_HRPWM_CSG_PRESCALER_EXT_STOP_CLR | Prescaler operation on external stop trigger is: Clear prescaler
XMC_HRPWM_CSG_PRESCALER_EXT_STOP_CLR_N_STOP | Prescaler operation on external stop trigger is: Clear & Stop prescaler
enum XMC_HRPWM_CSG_PRESCALER_START_t

Prescaler start in CSG

Enumerator
XMC_HRPWM_CSG_PRESCALER_START_CSG0 | Start prescaler of CSG0
XMC_HRPWM_CSG_PRESCALER_START_CSG1 | Start prescaler of CSG1
XMC_HRPWM_CSG_PRESCALER_START_CSG2 | Start prescaler of CSG2
enum XMC_HRPWM_CSG_PRESCALER_STATUS_t

CSG prescaler status

Enumerator
XMC_HRPWM_CSG_PRESCALER_STATUS_CSG0 | Prescaler status in CSG0
XMC_HRPWM_CSG_PRESCALER_STATUS_CSG1 | Prescaler status in CSG1
XMC_HRPWM_CSG_PRESCALER_STATUS_CSG2 | Prescaler status in CSG2
enum XMC_HRPWM_CSG_PRESCALER_STOP_t

Prescaler stop in CSG

Enumerator
XMC_HRPWM_CSG_PRESCALER_STOP_CSG0 | Stop prescaler of CSG0
XMC_HRPWM_CSG_PRESCALER_STOP_CSG1 | Stop prescaler of CSG1
XMC_HRPWM_CSG_PRESCALER_STOP_CSG2 | Stop prescaler of CSG2
enum XMC_HRPWM_CSG_RUN_BIT_t

DAC, Comparator start controls & Comparator clamped state control The enum is used to access the bitfields of registers CSGSETG, CSGCLRG, CSGSTATG

Enumerator
XMC_HRPWM_CSG_RUN_BIT_DAC0 | Start DAC0
XMC_HRPWM_CSG_RUN_BIT_CMP0 | Start comparator 0
XMC_HRPWM_CSG_RUN_BIT_CMP0_PSL | Set comparator 0 output to clamped state
XMC_HRPWM_CSG_RUN_BIT_DAC1 | Start DAC1
XMC_HRPWM_CSG_RUN_BIT_CMP1 | Start comparator 1
XMC_HRPWM_CSG_RUN_BIT_CMP1_PSL | Set comparator 1 output to clamped state
XMC_HRPWM_CSG_RUN_BIT_DAC2 | Start DAC2
XMC_HRPWM_CSG_RUN_BIT_CMP2 | Start comparator2
XMC_HRPWM_CSG_RUN_BIT_CMP2_PSL | Set comparator 2 output to clamped state
enum XMC_HRPWM_CSG_SLICE_t

HRPWM CSG - Slice numbers

Enumerator
XMC_HRPWM_CSG_SLICE_0 | CSG slice number is 0
XMC_HRPWM_CSG_SLICE_1 | CSG slice number is 1
XMC_HRPWM_CSG_SLICE_2 | CSG slice number is 2
enum XMC_HRPWM_CSG_SLOPE_CTRL_MODE_t

HRPWM CSG - Slope Generation control mode

Enumerator
XMC_HRPWM_CSG_SLOPE_CTRL_MODE_STATIC | Slope generation mode - Static mode
XMC_HRPWM_CSG_SLOPE_CTRL_MODE_DEC_GEN | Slope generation mode - Decrementing slope generation
XMC_HRPWM_CSG_SLOPE_CTRL_MODE_INC_GEN | Slope generation mode - Incrementing slope generation
XMC_HRPWM_CSG_SLOPE_CTRL_MODE_TRIANGULAR | Slope generation mode - Triangular slope generation
enum XMC_HRPWM_CSG_SLOPE_EXT_START_t

HRPWM CSG - Slope Generation external start configuration

Enumerator
XMC_HRPWM_CSG_SLOPE_EXT_START_IGNORE | Slope generation on external start trigger is: Ignore
XMC_HRPWM_CSG_SLOPE_EXT_START_STRT | Slope generation on external start trigger is: Start/restart slope generation
XMC_HRPWM_CSG_SLOPE_EXT_START_RESUME | Slope generation on external start trigger is: Resumes slope generation
enum XMC_HRPWM_CSG_SLOPE_EXT_STOP_t

HRPWM CGS - Slope Generation external stop configuration

Enumerator
XMC_HRPWM_CSG_SLOPE_EXT_STOP_IGNORE | Slope generation on external stop trigger is: Ignore
XMC_HRPWM_CSG_SLOPE_EXT_STOP_STP | Slope generation on external stop trigger is: Stops/Halts the slope generation
XMC_HRPWM_CSG_SLOPE_EXT_STOP_FREEZE | Slope generation on external stop trigger is: Freezes slope generation & feeds constantly the value programmed in CSGyDSV2 to the DAC
enum XMC_HRPWM_CSG_SLOPE_START_t

Slope start for DAC units

Enumerator
XMC_HRPWM_CSG_SLOPE_START_DAC0 | Start slope generation for DAC0
XMC_HRPWM_CSG_SLOPE_START_DAC1 | Start slope generation for DAC1
XMC_HRPWM_CSG_SLOPE_START_DAC2 | Start slope generation for DAC2
enum XMC_HRPWM_CSG_SLOPE_STEP_GAIN_t

HRPWM CSG - Slope step gain

Enumerator
XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_1 | slope step has an increment/decrement of 1
XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_2 | slope step has an increment/decrement of 2
XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_4 | slope step has an increment/decrement of 4
XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_8 | slope step has an increment/decrement of 8
enum XMC_HRPWM_CSG_SLOPE_STOP_t

Slope stop for DAC units

Enumerator
XMC_HRPWM_CSG_SLOPE_STOP_DAC0 | Stop slope generation for DAC0
XMC_HRPWM_CSG_SLOPE_STOP_DAC1 | Stop slope generation for DAC1
XMC_HRPWM_CSG_SLOPE_STOP_DAC2 | Stop slope generation for DAC2
enum XMC_HRPWM_CSG_SWITCH_CMP_INPUT_t

CSG comparator input switch request

Enumerator
XMC_HRPWM_CSG_SWITCH_CMP_INPUT_CMP0 | Request to switch the analog input connected to the comparator 0 between CINA and CINB
XMC_HRPWM_CSG_SWITCH_CMP_INPUT_CMP1 | Request to switch the analog input connected to the comparator 1 between CINA and CINB
XMC_HRPWM_CSG_SWITCH_CMP_INPUT_CMP2 | Request to switch the analog input connected to the comparator 2 between CINA and CINB
enum XMC_HRPWM_CSG_SWSM_t

HRPWM CSG - Initial DAC start mode

Enumerator
XMC_HRPWM_CSG_SWSM_DSV2_W_TRIGGER | DSV2 is used as initial DAC value & conversion trigger is generated
XMC_HRPWM_CSG_SWSM_DSV1_W_TRIGGER | DSV1 is used as initial DAC value & conversion trigger is generated
XMC_HRPWM_CSG_SWSM_DSV2_NO_TRIGGER | DSV2 is used as initial DAC value & no conversion trigger generated
XMC_HRPWM_CSG_SWSM_DSV1_NO_TRIGGER | DSV1 is used as initial DAC value & no conversion trigger generated
enum XMC_HRPWM_DAC_SLOPE_GEN_STATUS_t

DAC slope generation status

Enumerator
XMC_HRPWM_DAC_SLOPE_GEN_STATUS_DAC0 | Slope generation status mask for DAC0
XMC_HRPWM_DAC_SLOPE_GEN_STATUS_DAC1 | Slope generation status mask for DAC1
XMC_HRPWM_DAC_SLOPE_GEN_STATUS_DAC2 | Slope generation status mask for DAC2
enum XMC_HRPWM_FUNC_STATUS_t

HRPWM function Enable / Disable status

Enumerator
XMC_HRPWM_FUNC_STATUS_DISABLE | Function is disabled
XMC_HRPWM_FUNC_STATUS_ENABLE | Function is enabled
enum XMC_HRPWM_HR_LOGIC_t

HRPWM high resolution module status

Enumerator
XMC_HRPWM_HR_LOGIC_NOT_WORKING | High resolution signal path is switched off for all HRC channels
XMC_HRPWM_HR_LOGIC_WORKING | High resolution signal path is switched on for all HRC channels
enum XMC_HRPWM_HR_PATH_t

High resolution paths for HRC channels

Enumerator
XMC_HRPWM_HR_PATH_HRC0 | HRC0 path selected for High resolution
XMC_HRPWM_HR_PATH_HRC1 | HRC1 path selected for High resolution
XMC_HRPWM_HR_PATH_HRC2 | HRC2 path selected for High resolution
XMC_HRPWM_HR_PATH_HRC3 | HRC3 path selected for High resolution
enum XMC_HRPWM_HRC_CMP_SEL_t

HRPWM HRC source selector - connection of source selector to which CSG unit

Enumerator
XMC_HRPWM_HRC_CMP_SEL_CSG0 | Comparator output of CSG0 selected
XMC_HRPWM_HRC_CMP_SEL_CSG1 | Comparator output of CSG1 selected
XMC_HRPWM_HRC_CMP_SEL_CSG2 | Comparator output of CSG2 selected
enum XMC_HRPWM_HRC_DT_TR_SEL_t

HRC dead time shadow transfer trigger selection

Enumerator
XMC_HRPWM_HRC_DT_TR_SEL_TIMER | Source for shadow transfer trigger is CCU8 timer.
XMC_HRPWM_HRC_DT_TR_SEL_OVERFLOW | Source for shadow transfer trigger is dead time timer overflow.
enum XMC_HRPWM_HRC_HR_EDGE_t

HRPWM HRC High Resolution mode configuration

Enumerator
XMC_HRPWM_HRC_HR_EDGE_SEL_RISING | Rising edge high resolution signal positioning enabled
XMC_HRPWM_HRC_HR_EDGE_SEL_FALLING | Falling edge high resolution signal positioning enabled
XMC_HRPWM_HRC_HR_EDGE_SEL_BOTH | Both edges high resolution signal positioning enabled
XMC_HRPWM_HRC_HR_EDGE_SEL_NONE | No high resolution signal positioning
enum XMC_HRPWM_HRC_OUT_PASSIVE_LVL_t

HRPWM HRC output - Passive level

Enumerator
XMC_HRPWM_HRC_OUT_PASSIVE_LVL_LOW | Passive low output
XMC_HRPWM_HRC_OUT_PASSIVE_LVL_HIGH | Passive high output
enum XMC_HRPWM_HRC_SHADOW_TX_t

Shadow transfer for HRC values The enum is used to access the bitfields of registers HRCSTRG, HRCCTRG, HRCSTSG

Enumerator
XMC_HRPWM_HRC_SHADOW_TX_HRC0_VALUE | HRC0 shadow transfer mask for CR1 & CR2
XMC_HRPWM_HRC_SHADOW_TX_HRC0_DT_VALUE | HRC0 shadow transfer mask for DCR & DCRF
XMC_HRPWM_HRC_SHADOW_TX_HRC1_VALUE | HRC1 shadow transfer mask for CR1 & CR2
XMC_HRPWM_HRC_SHADOW_TX_HRC1_DT_VALUE | HRC1 shadow transfer mask for DCR & DCRF
XMC_HRPWM_HRC_SHADOW_TX_HRC2_VALUE | HRC2 shadow transfer mask for CR1 & CR2
XMC_HRPWM_HRC_SHADOW_TX_HRC2_DT_VALUE | HRC2 shadow transfer mask for DCR & DCRF
XMC_HRPWM_HRC_SHADOW_TX_HRC3_VALUE | HRC3 shadow transfer mask for CR1 & CR2
XMC_HRPWM_HRC_SHADOW_TX_HRC3_DT_VALUE | HRC3 shadow transfer mask for DCR & DCRF
enum XMC_HRPWM_HRC_SOURCE_t

HR source selector

Enumerator
XMC_HRPWM_HRC_SOURCE_0 | High resolution source 0
XMC_HRPWM_HRC_SOURCE_1 | High resolution source 1
enum XMC_HRPWM_HRC_SRC_EDGE_SEL_t

HR source selector edge configuration (GSEL)

Enumerator
XMC_HRPWM_HRC_SRC_EDGE_SEL_DISABLED | source signal generation disabled
XMC_HRPWM_HRC_SRC_EDGE_SEL_RISING | source signal generation on rising edge
XMC_HRPWM_HRC_SRC_EDGE_SEL_FALLING | source signal generation on falling edge
XMC_HRPWM_HRC_SRC_EDGE_SEL_BOTH | source signal generation on both edges
enum XMC_HRPWM_HRC_SRC_INPUT_t

HRPWM HRC source selector input

Enumerator
XMC_HRPWM_HRC_SRC_INPUT_CCU | Source selector is controlled via CCU timer signal
XMC_HRPWM_HRC_SRC_INPUT_CSG | Source selector is controlled via CSG output signal
enum XMC_HRPWM_HRC_TIMER_SEL_t

HRPWM HRC source selector - connection of source selector to which CCU timer

Enumerator
XMC_HRPWM_HRC_TIMER_SEL_CCU_CC0 | CCU timer 0 selected
XMC_HRPWM_HRC_TIMER_SEL_CCU_CC1 | CCU timer 1 selected
XMC_HRPWM_HRC_TIMER_SEL_CCU_CC2 | CCU timer 2 selected
XMC_HRPWM_HRC_TIMER_SEL_CCU_CC3 | CCU timer 3 selected
enum XMC_HRPWM_LR_PATH_t

Low resolution paths for HRC channels.

Enumerator
XMC_HRPWM_LR_PATH_HRC0 | LRC0 path selected for Low resolution
XMC_HRPWM_LR_PATH_HRC1 | LRC0 path selected for Low resolution
XMC_HRPWM_LR_PATH_HRC2 | LRC0 path selected for Low resolution
XMC_HRPWM_LR_PATH_HRC3 | LRC0 path selected for Low resolution
enum XMC_HRPWM_SHADOW_TX_DAC_t

HRPWM CSG - DAC shadow transfer values

Enumerator
XMC_HRPWM_SHADOW_TX_DAC0 | Shadow transfer mask for DAC0 - reference value 1 & Pulse swallow value
XMC_HRPWM_SHADOW_TX_DAC1 | Shadow transfer mask for DAC1 - reference value 1 & Pulse swallow value
XMC_HRPWM_SHADOW_TX_DAC2 | Shadow transfer mask for DAC2 - reference value 1 & Pulse swallow value
enum XMC_HRPWM_STATUS_t

Return HRPWM driver status

Enumerator
XMC_HRPWM_STATUS_OK | Driver successfully completed the request
XMC_HRPWM_STATUS_BUSY | Driver busy, cannot handle request
XMC_HRPWM_STATUS_ERROR | Driver cannot fulfill request, error occurred

Function Documentation

void XMC_HRPWM_ClampComparatorOutput | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Set the comparator output to clamp state

Sets the comparator to clamped state via software by setting CSGSETG.SC0P bit. The output of comparator is now not dependent on its inputs pins. The clamped state is defined by comparator output passive level value. Output passive level can be set to high or low.
Related APIs:
XMC_HRPWM_UnClampComparatorOutput()
XMC_HRPWM_IsComparatorClamped()
void XMC_HRPWM_ClearPreScaler | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_PRESCALER_STATUS_t to generate the mask.
Returns
None
Description

Clears the prescaler registers of DACs selected by mask

Clears the prescaler registers of DACs selected by mask, by setting CSGFCG.PS0CLR bit.
Related APIs:
XMC_HRPWM_IsPrescalerRunning()
void XMC_HRPWM_CSG_ClrEventSW | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | XMC_HRPWM_CSG_IRQ_ID_t | event
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
event | Event selected for software trigger.
Returns
None
Description

Cancel software request for selected event

Cancel the Event trigger request performed via software.
Related APIs:
XMC_HRPWM_CSG_EnableEvent()
XMC_HRPWM_CSG_GetEventStatus()
XMC_HRPWM_CSG_SetSRNode()
XMC_HRPWM_CSG_SetEventSW()
void XMC_HRPWM_CSG_DACRefValSwitchingConfig | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | const XMC_HRPWM_CSG_INPUT_CONFIG_t *const | config
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
config | Pointer to configuration structure.
Returns
None
Description

Configure input selection for switching DAC value between DSV1 and DSV2.

Configure the signal used to switch DAC value between DSV1 and DSV2.
It configures the signal source, required edge or level.
void XMC_HRPWM_CSG_DisableEvent | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | XMC_HRPWM_CSG_IRQ_ID_t | event
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
event | Event selected for interrupt.
Returns
None
Description

Disables the interrupt

Disables the selected interrupt request which may be forwarded to service node.
Related APIs:
XMC_HRPWM_CSG_EnableEvent()
XMC_HRPWM_CSG_GetEventStatus()
XMC_HRPWM_CSG_SetSRNode()
void XMC_HRPWM_CSG_EnableEvent | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | XMC_HRPWM_CSG_IRQ_ID_t | event
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
event | Event selected for interrupt.
Returns
None
Description

Enables the interrupt

Enables the selected interrupt request which may be forwarded to service node. The enabled event may be connected to any of the four service nodes.
Related APIs:
XMC_HRPWM_CSG_DisableEvent()
XMC_HRPWM_CSG_GetEventStatus()
XMC_HRPWM_CSG_SetSRNode()
uint32_t XMC_HRPWM_CSG_GetEventStatus | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | const uint32_t | mask
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_IRQ_ID_t to generate the input.
Returns
uint32_t
Description

Returns the bit encoded status of selected events

Checks the status of selected events. The return value is non-zero is the status is set.
Related APIs:
XMC_HRPWM_CSG_EnableEvent()
XMC_HRPWM_CSG_SetSRNode()
void XMC_HRPWM_CSG_Init | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | const XMC_HRPWM_CSG_CONFIG_t *const | config
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
config | Pointer to configuration structure.
Returns
None
Description

Initializes the CSG channel.

This function is used to initialize the CSG channel.

These include:
1) Comparator setup.
2) DAC Configuration.
3) Slope generation configuration.
void XMC_HRPWM_CSG_SelBlankingInput | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | const XMC_HRPWM_CSG_INPUT_CONFIG_t *const | config
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
config | Pointer to configuration structure.
Returns
None
Description

Configures the input signal to blank the comparator output

Configures the input signal that is used as trigger signal to blank the comparator output.
It configures the signal source, required edge or level. The comparator output is blanked and set to passive level.
void XMC_HRPWM_CSG_SelClampingInput | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | const XMC_HRPWM_CSG_INPUT_CONFIG_t *const | config
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
config | Pointer to configuration structure.
Returns
None
Description

Configures the input signal to clamp the comparator output

Configures the input signal that is used as level signal to clamp the comparator output.
It configures the signal source and required level.
void XMC_HRPWM_CSG_SelSlopeGenClkInput | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | const XMC_HRPWM_CSG_CLK_INPUT_t | input_clk
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
input_clk | Clock selection.
Returns
None
Description

Select the clock for slope generation

Selects the clock source used for slope generation.
These are :
module clock
external clock A
external clock B
external clock C
void XMC_HRPWM_CSG_SetCMPInput | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | const XMC_HRPWM_CSG_CMP_INPUT_t | input
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
input | Input to comparator. Use the enum type XMC_HRPWM_CSG_CMP_INPUT_t to generate the input.
Returns
None
Description

Configures the input connection to inverting pin of comparator

Selects the HW pin that gets connected to inverting pin of comparator.
Either CINA or CINB can be set. The non-inverting pin is connected to DAC output.
Related APIs:
XMC_HRPWM_GetCMPInput()
void XMC_HRPWM_CSG_SetEventSW | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | XMC_HRPWM_CSG_IRQ_ID_t | event
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
event | Event selected for software trigger.
Returns
None
Description

Software request for selected event

Perform a software request for selected event.This overrides any hardware trigger.
Related APIs:
XMC_HRPWM_CSG_EnableEvent()
XMC_HRPWM_CSG_GetEventStatus()
XMC_HRPWM_CSG_SetSRNode()
XMC_HRPWM_CSG_ClrEventSW()
void XMC_HRPWM_CSG_SetSRNode | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | const XMC_HRPWM_CSG_IRQ_ID_t | event,
 |  | const XMC_HRPWM_CSG_IRQ_SR_LINE_t | sr
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
event | Event selected for interrupt.
sr | Service request node.
Returns
None
Description

Connects the interrupt request to serve node

Enables the connection between interrupt request and serve node.
Each event may be connected to any of four service node available. Each event/interrupt needs to be enabled individually.
Related APIs:
XMC_HRPWM_CSG_EnableEvent()
XMC_HRPWM_CSG_GetEventStatus()
void XMC_HRPWM_CSG_StartSlopeGenConfig | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | const XMC_HRPWM_CSG_INPUT_CONFIG_t *const | config
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
config | Pointer to configuration structure.
Returns
None
Description

Configures the input signal to start the DAC slope generation

Configures the input signal that is used as trigger signal to start the slope generation.
It configures the signal source, required edge or level.
Related APIs:
XMC_HRPWM_CSG_StopSlopeGenConfig()
void XMC_HRPWM_CSG_StopSlopeGenConfig | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | const XMC_HRPWM_CSG_INPUT_CONFIG_t *const | config
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
config | Pointer to configuration structure.
Returns
None
Description

Configures the input signal to stop the DAC slope generation

Configures the input that is used as trigger signal to stop the slope generation.
It configures the signal source, required edge or level.
Related APIs:
XMC_HRPWM_CSG_StartSlopeGenConfig()
void XMC_HRPWM_CSG_TriggerDACConvConfig | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | const XMC_HRPWM_CSG_INPUT_CONFIG_t *const | config
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
config | Pointer to configuration structure.
Returns
None
Description

Configures the input signal to trigger the DAC conversion

Configures the input signal that is used as trigger signal to perform the DAC conversion.
It configures the signal source, required edge or level.
This is used when DAC is configured in static mode.
void XMC_HRPWM_CSG_TriggerShadowXferConfig | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | const XMC_HRPWM_CSG_INPUT_CONFIG_t *const | config
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
config | Pointer to configuration structure.
Returns
None
Description

Configure input selection for triggering shadow transfer

Configure the signal used to triggering shadow transfer.
It configures the signal source, required edge or level.
void XMC_HRPWM_CSG_UpdateBlankingValue | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | uint8_t | value
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
value | Value to be written to blanking register.
Returns
None
Description

Updates the BLV register

Updates the blanking register.
Note BLV register does not have shadow register.
void XMC_HRPWM_CSG_UpdateDACPrescaler | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | XMC_HRPWM_CSG_PRESCALER_DIVISION_t | div_value
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
div_value | Prescaler value.
Returns
None
Description

Updates the prescaler value of slope generation

Updates the prescaler value of slope generation by setting SC.PSV The rate of DAC value update is determined by prescaler.
Related APIs:
XMC_HRPWM_CSG_UpdateDACStepGain()
void XMC_HRPWM_CSG_UpdateDACRefDSV1 | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | uint32_t | value
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
value | Value to be written to DSV1 shadow register.
Returns
None
Description

Updates the DSV1 shadow register

Update the DSV1 shadow register.
Call the shadow transfer update API. A shadow transfer request in corresponding CCU8 slice may also be required.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
XMC_HRPWM_CSG_UpdateDACRefDSV2()
void XMC_HRPWM_CSG_UpdateDACRefDSV2 | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | uint32_t | value
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
value | Value to be written to DSV2 register.
Returns
None
Description

Updates the DSV2 register

Updates the DSV2 register.
Note DSV2 register does not have shadow register.
Related APIs:
XMC_HRPWM_CSG_UpdateDACRefDSV1()
void XMC_HRPWM_CSG_UpdateDACStepGain | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | XMC_HRPWM_CSG_SLOPE_STEP_GAIN_t | gain
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
gain | Gain value.
Returns
None
Description

Updates the gain value of slope generation

Updates the gain value of slope generation by setting SC.GCFG bits. The value by which DAC increments/decrements is determined by the step gain.
Related APIs:
XMC_HRPWM_CSG_UpdateDACPrescaler()
void XMC_HRPWM_CSG_UpdateFilterWindow | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | XMC_HRPWM_CSG_CMP_FILTER_WINDOW_t | window
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
window | Size of filter window.
Returns
None
Description

Updates the filter window size

Updates the filter window size used for pulse swallowing, in slope generation.
This value is used in slope generation when filter window is enabled. A certain no of clock pulses in the filter window are swallowed and applied to slope generation. The pulse swallowed are determined by "Pulse swallow value"
Related APIs:
XMC_HRPWM_CSG_UpdatePulseClk()
void XMC_HRPWM_CSG_UpdatePulseClk | ( | XMC_HRPWM_CSG_t *const | csg,
 |  | uint32_t | value
 | ) |  |
Parameters
csg | Constant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
value | No of clock pulses to be swallowed in the filter window.
Returns
None
Description

Updates the no of clock pulses to be swallowed in the filter window

Update the pulse swallow value.
This value is used in slope generation when filter window is enabled for slope generation. No of clock pulse swallow is determined by this value.
Related APIs:
XMC_HRPWM_CSG_UpdateFilterWindow()
void XMC_HRPWM_DisableBias ( XMC_HRPWM_t *const hrpwm )
Parameters
hrpwm Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
None
Description

Disables the bias generation

Disables the bias generation of high resolution generation by clearing HRBSC.HRBE bit.
Related APIs:
XMC_HRPWM_EnableBias()
void XMC_HRPWM_DisableComparatorShadowTransfer | ( | XMC_HRPWM_t *const | hrpwm,
 |  | uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_SHADOW_TX_DAC_t to generate the mask.
Returns
None
Description

Cancels the shadow transfer of DSV1 and pulse swallow registers

Cancels the shadow transfer of DSV1 and pulse swallow registers by setting CSGTRC.D0SEC bit. The transfer request is canceled. Needs to be called before the next shadow transfer trigger.
Related APIs:
XMC_HRPWM_EnableComparatorShadowTransfer()
XMC_HRPWM_GetComparatorShadowTransferStatus()
void XMC_HRPWM_DisableCsgClock | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_CLK_t to generate the mask.
Returns
None
Description

Disables the clock of selected CSG subunits

Disables the clock of selected CSG subunits by setting the CSGCFG.C0CD bit.
Related APIs:
void XMC_HRPWM_DisableGlobalHR ( XMC_HRPWM_t *const hrpwm )
Parameters
hrpwm Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
None
Description

Disable global high resolution generation

Disables global high resolution generation by clearing GLBANA.GHREN bit.
Related APIs:
XMC_HRPWM_EnableGlobalHR()
void XMC_HRPWM_DisableHighResolutionPath | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected HRC modules. Use the enum type XMC_HRPWM_HR_PATH_t to generate the mask.
Returns
None
Description

Disables the high resolution path

Disables the high resolution path determined by passed mask value, by clearing HRCCFG.HRC0E bit.
Related APIs:
XMC_HRPWM_EnableHighResolutionPath()
XMC_HRPWM_EnableLowResolutionPath()
XMC_HRPWM_DisableLowResolutionPath()
void XMC_HRPWM_DisableHighResolutionShadowTransfer | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected HRC modules. Use the enum type XMC_HRPWM_HRC_SHADOW_TX_t to generate the mask.
Returns
None
Description

Disables the high resolution shadow transfer

Disables the high resolution shadow transfer determined by passed mask value, by setting HRCCTRG.H0EC, HRCCTRG.H0DEC bits. It cancels shadow transfer request by XMC_HRPWM_EnableHighResolutionShadowTransfer(), provided the shadow transfer has not occurred.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
void XMC_HRPWM_DisableHRPowerMode ( XMC_HRPWM_t *const hrpwm )
Parameters
hrpwm Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
None
Description

Turns OFF the power to all HR and LR path

Turns OFF the power to all HR and LR path by clearing HRCCFG.HRCPM bit. This disables all HR and LR paths.
Related APIs:
XMC_HRPWM_EnableHRPowerMode()
void XMC_HRPWM_DisableLowResolutionPath | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected HRC modules. Use the enum type XMC_HRPWM_LR_PATH_t to generate the mask.
Returns
None
Description

Disables the low resolution path

Disables the low resolution path determined by passed mask value, by clearing HRCCFG.LRC0E bit.
Related APIs:
XMC_HRPWM_EnableHighResolutionPath()
XMC_HRPWM_DisableHighResolutionPath()
XMC_HRPWM_EnableLowResolutionPath()
void XMC_HRPWM_EnableBias ( XMC_HRPWM_t *const hrpwm )
Parameters
hrpwm Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
None
Description

Enables the bias generation

Enables the bias generation of high resolution generation by setting HRBSC.HRBE bit.
Related APIs:
XMC_HRPWM_DisableBias()
void XMC_HRPWM_EnableComparatorShadowTransfer | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected HRC modules. Use the enum type XMC_HRPWM_SHADOW_TX_DAC_t to generate the mask.
Returns
None
Description

Enables the shadow transfer of DSV1 and pulse swallow registers of DACs selected by mask

Enables the shadow transfer of DSV1 and pulse swallow registers of DACs selected by mask by setting CSGTRG.D0SES bit. The transfer is done at the next shadow transfer trigger.
Related APIs:
XMC_HRPWM_DisableComparatorShadowTransfer()
XMC_HRPWM_GetComparatorShadowTransferStatus()
void XMC_HRPWM_EnableGlobalHR ( XMC_HRPWM_t *const hrpwm )
Parameters
hrpwm Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
None
Description

Enable global high resolution generation

Enables global high resolution generation by setting GLBANA.GHREN bit.
Related APIs:
XMC_HRPWM_DisableGlobalHR()
void XMC_HRPWM_EnableHighResolutionPath | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected HRC modules. Use the enum type XMC_HRPWM_HR_PATH_t to generate the mask.
Returns
None
Description

Enables the high resolution path.

Enables the high resolution path determined by passed mask value, by setting HRCCFG.HRC0E bit. By default signals from source selector 0 are linked to HR path and signals from source selector 1 are linked to LR path. This connections can be reversed at runtime, if bit HRCySC.ST is set to 1.
Related APIs:
XMC_HRPWM_HRC_Set_HR_Source()
XMC_HRPWM_DisableHighResolutionPath()
XMC_HRPWM_EnableLowResolutionPath()
XMC_HRPWM_DisableLowResolutionPath()
XMC_HRPWM_EnableHRPowerMode()
void XMC_HRPWM_EnableHighResolutionShadowTransfer | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected HRC modules. Use the enum type XMC_HRPWM_HRC_SHADOW_TX_t to generate the mask.
Returns
None
Description

Enables the high resolution shadow transfer

Enables the high resolution shadow transfer determined by passed mask value, by setting HRCSTRG.H0ES, HRCSTRG.H0DES bits. The input for trigger for shadow transfer needs to be configured correctly.
Related APIs:
XMC_HRPWM_DisableHighResolutionShadowTransfer()
XMC_HRPWM_GetHighResolutionShadowTransferStatus()
void XMC_HRPWM_EnableHRPowerMode ( XMC_HRPWM_t *const hrpwm )
Parameters
hrpwm Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
None
Description

Turns ON the power to all HR and LR path

Turns ON the power to all HR and LR path by setting HRCCFG.HRCPM bit. Enable the HR and LR paths as per requirement by calling following API XMC_HRPWM_EnableHighResolutionPath() and XMC_HRPWM_EnableLowResolutionPath().
Related APIs:
XMC_HRPWM_EnableHighResolutionPath()
XMC_HRPWM_EnableLowResolutionPath()
void XMC_HRPWM_EnableLowResolutionPath | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected HRC modules. Use the enum type XMC_HRPWM_LR_PATH_t to generate the mask.
Returns
None
Description

Enables the low resolution path

Enables the low resolution path determined by passed mask value, by setting HRCCFG.LRC0E bit. By default signals from source selector 0 are linked to HR path and signals from source selector 1 are linked to LR path. This connections can be reversed at runtime, if bit HRCySC.ST is set to 1.
Related APIs:
XMC_HRPWM_HRC_Set_HR_Source()
XMC_HRPWM_EnableHighResolutionPath()
XMC_HRPWM_DisableHighResolutionPath()
XMC_HRPWM_DisableLowResolutionPath()
XMC_HRPWM_EnableHRPowerMode()
uint32_t XMC_HRPWM_GetCMPInput | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_SWITCH_CMP_INPUT_t to generate the mask.
Returns
uint32_t
Description

Returns the bit encoded status of HW pin connected to comparator inverting pin

Returns the bit encoded status of HW pin connected to comparator inverting pin by checking CSGTRSG.SW0ST bit. The bit position is set to 1 if CINB is connected, else its CINA.
Related APIs:
XMC_HRPWM_CSG_SetCMPInput()
uint32_t XMC_HRPWM_GetComparatorShadowTransferStatus ( XMC_HRPWM_t *const hrpwm )
Parameters
hrpwm Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
uint32_t
Description

Gets the shadow transfer status of DSV1 and pulse swallow registers of all the DACs

Gets the shadow transfer status of DSV1 and pulse swallow registers of all the DACs by checking the register CSGTRSG The return value is not zero if shadow transfer has been requested, but is still pending completion.
Related APIs:
XMC_HRPWM_EnableComparatorShadowTransfer()
XMC_HRPWM_DisableComparatorShadowTransfer()
uint32_t XMC_HRPWM_GetHighResolutionShadowTransferStatus | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected HRC modules. Use the enum type XMC_HRPWM_HRC_SHADOW_TX_t to generate the mask.
Returns
uint32_t
Description

Returns the shadow transfer request status

Returns the shadow transfer request status, by checking HRCSTSG.H0STE, HRCSTSG.H0DSTE bits. Returns a non zero value if corresponding shadow transfer request has been performed.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
XMC_HRPWM_HR_LOGIC_t XMC_HRPWM_GetHRGenReadyStatus ( XMC_HRPWM_t *const hrpwm )
Parameters
hrpwm Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
XMC_HRPWM_HR_LOGIC_t
Description

Returns the status of the high resolution logic.

Returns status of the high resolution logic by checking HRGHRS.HRGR bit. The return value should be XMC_HRPWM_HR_LOGIC_WORKING for proper generation of high resolution signal positioning.
uint32_t XMC_HRPWM_GetRunBitStatus | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
uint32_t
Description

Returns bit encoded status of multiple DACs and Comparators, defined by the mask.

Returns bit encoded status of multiple DACs and Comparators from register CSGSTATG, defined by the mask. The mask is generated by bitwise ORing multiple Enums.
mask = (uint32_t) (XMC_HRPWM_CSG_RUN_BIT_CMP0 | XMC_HRPWM_CSG_RUN_BIT_DAC0 | XMC_HRPWM_CSG_RUN_BIT_CMP0_PSL);
Related APIs:
XMC_HRPWM_IsDacRunning()
XMC_HRPWM_IsComparatorClamped()
void XMC_HRPWM_HRC_ConfigSourceSelect0 | ( | XMC_HRPWM_HRC_t *const | hrc,
 |  | const XMC_HRPWM_HRC_SRC_CONFIG_t *const | config
 | ) |  |
Parameters
hrc | Constant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
config | Pointer to configuration structure.
Returns
None
Description

Initializes the source 0 of HRC channel.

Initialize the source 0 functionality of HRC channel.
This include:
1) general configuration for source 0 HRC channel.
2) Configuration of which inputs are being used to generate the set and clear for the latch and therefore controlling the generation of the output PWM signal.
3) Configuration for which timer from the Capture/Compare Unit is used for the Source Selector 0 and Source Selector 1.
Related APIs:
XMC_HRPWM_HRC_ConfigSourceSelect1()
void XMC_HRPWM_HRC_ConfigSourceSelect1 | ( | XMC_HRPWM_HRC_t *const | hrc,
 |  | const XMC_HRPWM_HRC_SRC_CONFIG_t *const | config
 | ) |  |
Parameters
hrc | Constant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
config | Pointer to configuration structure.
Returns
None
Description

Initializes the source 1 of HRC channel.

Initialize the source 1 functionality of HRC channel.

This include:
1) general configuration for source 1 HRC channel.
2) Configuration of which inputs are being used to generate the set and clear for the latch and therefore controlling the generation of the output PWM signal.
3) Configuration for which timer from the Capture/Compare Unit is used for the Source Selector 0 and Source Selector 1.
Related APIs:
XMC_HRPWM_HRC_ConfigSourceSelect0()
void XMC_HRPWM_HRC_Init | ( | XMC_HRPWM_HRC_t *const | hrc,
 |  | const XMC_HRPWM_HRC_CONFIG_t *const | config
 | ) |  |
Parameters
hrc | Constant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
config | Pointer to configuration structure.
Returns
None
Description

Initializes the HRC channel.

Initializes the HRC channel functionality.
These include:
1) Dead time configuration.
3) Trap Configuration.
4) Shadow transfer configuration.
5) Output inversion configuration.
6) Passive levels of HRC outputs.
void XMC_HRPWM_HRC_Set_HR_Source | ( | XMC_HRPWM_HRC_t *const | hrc,
 |  | XMC_HRPWM_HRC_SOURCE_t | source
 | ) |  |
Parameters
hrc | Constant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
source | Source connected to high resolution channel.
Returns
None
Description

Sets the source to high resolution channel

Sets the shadow transfer register deciding the source connected to high resolution channel. This also affects the CCU8 timer used for linking shadow transfer trigger. Call the shadow transfer update API. A shadow transfer request in corresponding CCU8 slice may also be required.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
void XMC_HRPWM_HRC_SetCompare1 | ( | XMC_HRPWM_HRC_t *const | hrc,
 |  | const uint8_t | cr1_value
 | ) |  |
Parameters
hrc | Constant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
cr1_value | high resolution positioning value.
Returns
None
Description

Sets the shadow transfer register of high resolution positioning for rising edge

Call the shadow transfer update API for transfer to CR1 register. A shadow transfer request in corresponding CCU8 slice may also be required.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
XMC_HRPWM_HRC_SetCompare2()
void XMC_HRPWM_HRC_SetCompare2 | ( | XMC_HRPWM_HRC_t *const | hrc,
 |  | const uint8_t | cr2_value
 | ) |  |
Parameters
hrc | Constant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
cr2_value | high resolution positioning value.
Returns
None
Description

Sets the shadow transfer register of high resolution positioning for falling edge

Call the shadow transfer update API for transfer to CR2 register. A shadow transfer request in corresponding CCU8 slice may also be required.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
XMC_HRPWM_HRC_SetCompare1()
void XMC_HRPWM_HRC_SetDeadTimeFalling | ( | XMC_HRPWM_HRC_t *const | hrc,
 |  | uint16_t | dcf_value
 | ) |  |
Parameters
hrc | Constant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
dcf_value | Falling edge dead time value.
Returns
None
Description

Sets the shadow transfer register of falling edge dead time.

Call the shadow transfer update API for transfer to DCR register. A shadow transfer request in corresponding CCU8 slice may also be required.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
XMC_HRPWM_HRC_SetDeadTimeRising()
void XMC_HRPWM_HRC_SetDeadTimeRising | ( | XMC_HRPWM_HRC_t *const | hrc,
 |  | uint16_t | dcr_value
 | ) |  |
Parameters
hrc | Constant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
dcr_value | Rising edge dead time value.
Returns
None
Description

Sets the shadow transfer register of rising edge dead time.

Call the shadow transfer update API for transfer to DCR register. A shadow transfer request in corresponding CCU8 slice may also be required.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
XMC_HRPWM_HRC_SetDeadTimeFalling()
XMC_HRPWM_STATUS_t XMC_HRPWM_Init ( XMC_HRPWM_t *const hrpwm )
Parameters
hrpwm Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
XMC_HRPWM_STATUS_t
Description

HRPWM Init

This function initializes the HRPWM global registers. It configures the CSG trimming data. This is the first function that needs to be called in initializing HRC or CSG modules.
Related APIs:
XMC_SDMMC_TriggerEvent()

uint32_t XMC_HRPWM_IsComparatorClamped | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
uint32_t
Description

Checks if comparator is in clamped state

Checks if comparator is in clamped state by checking CSGSTATG.PSLS0 bit. Returns bit encoded status if comparator is set to clamped state via software.
Related APIs:
XMC_HRPWM_ClampComparatorOutput()
XMC_HRPWM_UnClampComparatorOutput()
bool XMC_HRPWM_IsComparatorRunning | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
bool
Description

Checks if comparator is enabled

Checks if comparator is enabled by checking CSGSTATG.C0RB bit. Returns true if comparator run bit is set, else returns false.
Related APIs:
XMC_HRPWM_StartComparator()
XMC_HRPWM_StopComparator()
uint32_t XMC_HRPWM_IsDacRunning | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
uint32_t
Description

Checks if CSG DAC is operational

Checks if CSG DAC is operational by checking CSGSTATG.D0RB bit.
Related APIs:
XMC_HRPWM_StartDac()
XMC_HRPWM_StopDac()
uint32_t XMC_HRPWM_IsPrescalerRunning | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_PRESCALER_STATUS_t to generate the mask.
Returns
uint32_t
Description

Checks the prescaler status of DACs selected by mask

Checks the prescaler status of DACs selected by mask, by checking CSGFCG.P0RB bit. Returns the bit encoded status information of prescaler.
Related APIs:
XMC_HRPWM_ClearPreScaler()
XMC_HRPWM_StartSlopeGeneration()
bool XMC_HRPWM_IsSlopeGenerationRunning | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
bool
Description

Checks if Prescaler & slope generation is running

Checks if Prescaler & slope generation is running by checking CSGFSG.S0RB CSGFSG.P0RB bits. The mask is generated by bitwise ORing multiple Enums.
mask = (uint32_t) (XMC_HRPWM_CSG_SLOPE_START_DAC0 | XMC_HRPWM_CSG_PRESCALER_START_CSG0);
Related APIs:
XMC_HRPWM_StartSlopeGeneration()
XMC_HRPWM_StopSlopeGeneration()
void XMC_HRPWM_ModuleClkFreq | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const XMC_HRPWM_CLK_FREQ_t | clk_freq
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
clk_freq | The operating clock frequency of HRPWM module. Use the enum type XMC_HRPWM_CLK_FREQ_t to generate the mask.
Returns
None
Description

Configures the clock frequency of operation of HRPWM module

Configures the clock frequency of operation of HRPWM module by configuring HRCCFG.CLKC bits. The clock is generally selected based on the device type selected.
void XMC_HRPWM_SetCsgPowerMode | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const XMC_HRPWM_CSG_SLICE_t | slice,
 |  | const XMC_HRPWM_CSG_POWER_MODE_t | power_mode
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
slice | Slice NO.
power_mode | The mode to be put in.
Returns
None
Description

Sets the DAC in OFF, Low speed or High speed mode

Sets the DAC in OFF, Low speed or High speed mode, by setting CSGCFG.C0PM bits.
Related APIs:
void XMC_HRPWM_StartComparator | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Enables the operation of comparator

Enables the operation of comparator by setting CSGSETG.SC0R bit.
Related APIs:
XMC_HRPWM_StopComparator()
XMC_HRPWM_IsComparatorRunning()
void XMC_HRPWM_StartDac | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Enables the operation of CSG DAC

Enables the operation of CSG DAC by setting CSGSETG.SD0R bit. The DAC operation is enabled. Either the value in DSV1 or DSV2 is sent to DAC, based on configuration.
Related APIs:
XMC_HRPWM_StopDac()
XMC_HRPWM_IsDacRunning()
void XMC_HRPWM_StartSlopeGeneration | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Start the prescaler & slope generation of DAC

Start the prescaler & slope generation of DAC by setting CSGFCG.S0STR and CSGFCG.PS0STR bits. The mask is generated by bitwise ORing multiple Enums.
mask = (uint32_t) (XMC_HRPWM_CSG_SLOPE_START_DAC0 | XMC_HRPWM_CSG_PRESCALER_START_CSG0);
Related APIs:
XMC_HRPWM_StopSlopeGeneration()
XMC_HRPWM_IsSlopeGenerationRunning()
void XMC_HRPWM_StopComparator | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Disables the operation of comparator

Disables the operation of comparator by setting CSGCLRG.CC0R bit.
Related APIs:
XMC_HRPWM_StartComparator()
XMC_HRPWM_IsComparatorRunning()
void XMC_HRPWM_StopDac | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Disables the operation of CSG DAC

Disables the operation of CSG DAC by setting CSGCLRG.CD0R bit.
Related APIs:
XMC_HRPWM_StartDac()
XMC_HRPWM_IsDacRunning()
void XMC_HRPWM_StopSlopeGeneration | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Stops the prescaler & slope generation of DAC

Stops the prescaler & slope generation of DAC by setting CSGFCG.S0STP and CSGFCG.PS0STP bits. The mask is generated by bitwise ORing multiple Enums.
mask = (uint32_t) (XMC_HRPWM_CSG_SLOPE_START_DAC0 | XMC_HRPWM_CSG_PRESCALER_START_CSG0);
Related APIs:
XMC_HRPWM_StartSlopeGeneration()
XMC_HRPWM_IsSlopeGenerationRunning()
void XMC_HRPWM_UnClampComparatorOutput | ( | XMC_HRPWM_t *const | hrpwm,
 |  | const uint32_t | mask
 | ) |  |
Parameters
hrpwm | Constant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
mask | masked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Clear the comparator output from clamp state

Un-clamps the output of comparator from clamped state set via software by setting CSGCLRG.CC0P bit. The output of comparator is now dependent on the inputs of comparator.
Related APIs:
XMC_HRPWM_ClampComparatorOutput()
XMC_HRPWM_IsComparatorClamped()
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_HRPWM_CSG_CMP_t Struct Reference

Data Fields
XMC_HRPWM_CSG_CMP_t Struct Reference
XMC Peripheral Library » HRPWM

#include <xmc_hrpwm.h>

Data Fields

uint32_t | blanking_val
uint32_t | blank_ext_enable: 1
uint32_t | blanking_mode: 2
uint32_t | cc
uint32_t | clamp_ctrl_lvl: 2
uint32_t | clamp_enter_config: 2
uint32_t | clamp_exit_config: 2
uint32_t | clamp_exit_sw_config: 1
uint32_t | clamp_level: 1
uint32_t | cmp_ext_sw_enable: 1
uint32_t | cmp_input_sel: 1
uint32_t | cmp_input_sw: 2
uint32_t | cmp_out_inv: 1
uint32_t | filter_control: 2
uint32_t | filter_enable: 1
uint32_t | filter_window: 4
uint32_t | plc

Detailed Description

CSG Unit - Comparator configuration

Field Documentation

uint32_t blank_ext_enable

Enable blanking via external trigger. Accepts enum XMC_HRPWM_FUNC_STATUS_t

uint32_t blanking_mode

Select the edge for blanking. Accepts enum XMC_HRPWM_CSG_EDGE_SEL_t

uint32_t blanking_val

blanking value, blanking time = blanking_val * module clk freq

uint32_t cc

Comparator general configuration

uint32_t clamp_ctrl_lvl

Select the trigger signal level for clamping the comparator output. Accepts enum XMC_HRPWM_CSG_LVL_SEL_t

uint32_t clamp_enter_config

Clamping level enter configuration

uint32_t clamp_exit_config

Clamping level exit configuration

uint32_t clamp_exit_sw_config

Clamped state exit software configuration

uint32_t clamp_level

Select the comparator output passive level value.

uint32_t cmp_ext_sw_enable

Enable switching of input between CINA and CINB via external trigger. Accepts enum XMC_HRPWM_FUNC_STATUS_t

uint32_t cmp_input_sel

Comparator input pin selection. Accepts enum XMC_HRPWM_CSG_CMP_INPUT_t

uint32_t cmp_input_sw

Comparator input switching configuration. Accepts enum XMC_HRPWM_CSG_LVL_SEL_t

uint32_t cmp_out_inv

Invert comparator output. Accepts enum XMC_HRPWM_FUNC_STATUS_t

uint32_t filter_control

Select the filter application condition 00B Filtering is always done if enabled 01B Filtering is only done when CSGyDSV1 value is currently fed to the DAC 10B Filtering is only done when the CSGyDSV2 value is currently fed to the DAC

uint32_t filter_enable

Enable comparator output filter. Accepts enum XMC_HRPWM_FUNC_STATUS_t

uint32_t filter_window

Select the comparator output filter window

uint32_t plc

Comparator passive level configuration

The documentation for this struct was generated from the following file:
  • xmc_hrpwm.h


XMC Peripheral Library for XMC4000 Family: XMC_HRPWM_CSG_CONFIG_t Struct Reference

Data Fields
XMC_HRPWM_CSG_CONFIG_t Struct Reference
XMC Peripheral Library » HRPWM

#include <xmc_hrpwm.h>

Data Fields

XMC_HRPWM_CSG_CMP_t cmp_config
XMC_HRPWM_CSG_DAC_t dac_config
XMC_HRPWM_CSG_SGEN_t sgen_config

Detailed Description

HRPWM CSG configuration

Field Documentation

XMC_HRPWM_CSG_CMP_t cmp_config

Comparator set up

XMC_HRPWM_CSG_DAC_t dac_config

DAC configuration of CSG

XMC_HRPWM_CSG_SGEN_t sgen_config

Slope generation related configurations

The documentation for this struct was generated from the following file:
  • xmc_hrpwm.h


XMC Peripheral Library for XMC4000 Family: XMC_HRPWM_CSG_DAC_t Struct Reference

Data Fields
XMC_HRPWM_CSG_DAC_t Struct Reference
XMC Peripheral Library » HRPWM

#include <xmc_hrpwm.h>

Data Fields

uint32_t | dac_dsv1
uint32_t | dac_dsv2
XMC_HRPWM_CSG_SWSM_t start_mode

Detailed Description

CSG Unit - DAC configuration

Field Documentation

uint32_t dac_dsv1

DAC reference value 1

uint32_t dac_dsv2

DAC reference value 2

XMC_HRPWM_CSG_SWSM_t start_mode

Initial DAC start mode

The documentation for this struct was generated from the following file:
  • xmc_hrpwm.h


XMC Peripheral Library for XMC4000 Family: XMC_HRPWM_CSG_INPUT_CONFIG_t Struct Reference

Data Fields
XMC_HRPWM_CSG_INPUT_CONFIG_t Struct Reference
XMC Peripheral Library » HRPWM

#include <xmc_hrpwm.h>

Data Fields

XMC_HRPWM_CSG_EDGE_SEL_t edge
XMC_HRPWM_CSG_LVL_SEL_t level
XMC_HRPWM_CSG_INPUT_SEL_t mapped_input

Detailed Description

Configuration data structure of a CSG input selection

Field Documentation

XMC_HRPWM_CSG_EDGE_SEL_t edge

Active edge of mapped_input

XMC_HRPWM_CSG_LVL_SEL_t level

Active level of mapped_input

XMC_HRPWM_CSG_INPUT_SEL_t mapped_input

CSG input selection

The documentation for this struct was generated from the following file:
  • xmc_hrpwm.h


XMC Peripheral Library for XMC4000 Family: XMC_HRPWM_CSG_SGEN_t Struct Reference

Data Fields
XMC_HRPWM_CSG_SGEN_t Struct Reference
XMC Peripheral Library » HRPWM

#include <xmc_hrpwm.h>

Data Fields

uint32_t | pulse_swallow_val
uint32_t | ctrl_mode: 2
uint32_t | ext_start_mode: 2
uint32_t | ext_stop_mode: 2
uint32_t | fixed_prescaler_enable: 1
uint32_t | prescaler: 2
uint32_t | prescaler_ext_start_mode: 2
uint32_t | prescaler_ext_stop_mode: 2
uint32_t | pulse_swallow_enable: 1
uint32_t | pulse_swallow_win_mode: 2
uint32_t | sc
uint32_t | slope_ref_val_mode: 2
uint32_t | static_mode_ist_enable: 1
uint32_t | step_gain: 2

Detailed Description

CSG Unit - Slope Generation configuration

Field Documentation

uint32_t ctrl_mode

Slope control mode. Accepts enum XMC_HRPWM_CSG_SLOPE_CTRL_MODE_t

uint32_t ext_start_mode

Slope external start mode. Accepts enum XMC_HRPWM_CSG_SLOPE_EXT_START_t

uint32_t ext_stop_mode

Slope external stop mode. Accepts enum XMC_HRPWM_CSG_SLOPE_EXT_STOP_t

uint32_t fixed_prescaler_enable

Fixed pre-scaler, 0:enabled, 1:disabled

uint32_t prescaler

Pre-scaler division factor

uint32_t prescaler_ext_start_mode

Pre-scaler external start mode. Accepts enum XMC_HRPWM_CSG_PRESCALER_EXT_START_t

uint32_t prescaler_ext_stop_mode

Pre-scaler external stop mode. Accepts enum XMC_HRPWM_CSG_PRESCALER_EXT_STOP_t

uint32_t pulse_swallow_enable

Pulse swallow enable / disable. Accepts enum XMC_HRPWM_FUNC_STATUS_t

uint32_t pulse_swallow_val

Pulse swallow value

uint32_t pulse_swallow_win_mode

Pulse swallow window mode

uint32_t sc

Slope Generation Configuration

uint32_t slope_ref_val_mode

Slope reference value mode

uint32_t static_mode_ist_enable

Immediate shadow transfer in static mode enabled. Accepts enum XMC_HRPWM_FUNC_STATUS_t

uint32_t step_gain

Slope step gain configuration

The documentation for this struct was generated from the following file:
  • xmc_hrpwm.h


XMC Peripheral Library for XMC4000 Family: XMC_HRPWM_HRC_CONFIG_t Struct Reference

XMC_HRPWM_HRC_CONFIG_t Struct Reference
XMC Peripheral Library » HRPWM

#include <xmc_hrpwm.h>

Detailed Description

HRPWM HRC configuration

Field Documentation

uint32_t dt_enable

Enables dead time. Accepts enum XMC_HRPWM_FUNC_STATUS_t

uint32_t dt_shadow_xfer_linktoCCU8

Shadow transfer for DCR and DCF linked to shadow transfer trigger of CCU8 slice. Accepts enum XMC_HRPWM_FUNC_STATUS_t

uint32_t dt_trigger_sel

Selection of trigger for dead time shadow transfer. Accepts enum XMC_HRPWM_HRC_DT_TR_SEL_t

uint32_t gc

General high resolution channel configuration

uint32_t hr_out0_inv_enable

Enables inversion of HROUT0 output pin. Accepts enum XMC_HRPWM_FUNC_STATUS_t

uint32_t hr_out0_passive_level_out

Selection of HROUT0 passive level. Accepts enum XMC_HRPWM_HRC_OUT_PASSIVE_LVL_t

uint32_t hr_out0_trap_enable

Enables trap for HROUT0. Accepts enum XMC_HRPWM_FUNC_STATUS_t

uint32_t hr_out1_inv_enable

Enables inversion of HROUT1 output pin. Accepts enum XMC_HRPWM_FUNC_STATUS_t

uint32_t hr_out1_passive_level_out

Selection of HROUT0 passive level. Accepts enum XMC_HRPWM_HRC_OUT_PASSIVE_LVL_t

uint32_t hr_out1_trap_enable

Enables trap for HROUT1. Accepts enum XMC_HRPWM_FUNC_STATUS_t

uint32_t hrc_shadow_xfer_linktoCCU8

Shadow transfer for CR1 and CR2 linked to shadow transfer trigger of CCU8 slice. Accepts enum XMC_HRPWM_FUNC_STATUS_t

uint32_t psl

Output passive level configuration

The documentation for this struct was generated from the following file:
  • xmc_hrpwm.h


XMC Peripheral Library for XMC4000 Family: XMC_HRPWM_HRC_SRC_CONFIG_t Struct Reference

Data Fields
XMC_HRPWM_HRC_SRC_CONFIG_t Struct Reference
XMC Peripheral Library » HRPWM

#include <xmc_hrpwm.h>

Data Fields

XMC_HRPWM_HRC_SRC_INPUT_t clear_config
XMC_HRPWM_HRC_SRC_EDGE_SEL_t clear_edge_config
XMC_HRPWM_HRC_CMP_SEL_t cmp_clear
XMC_HRPWM_HRC_CMP_SEL_t cmp_set
XMC_HRPWM_HRC_HR_EDGE_t high_res_mode
XMC_HRPWM_HRC_SRC_INPUT_t set_config
XMC_HRPWM_HRC_SRC_EDGE_SEL_t set_edge_config
XMC_HRPWM_FUNC_STATUS_t src_trap_enable
XMC_HRPWM_HRC_TIMER_SEL_t timer_sel

Detailed Description

HRPWM HRC source path configuration

Field Documentation

XMC_HRPWM_HRC_SRC_INPUT_t clear_config

Selection of input clear configuration

XMC_HRPWM_HRC_SRC_EDGE_SEL_t clear_edge_config

Selection of edge for generating clear signal

XMC_HRPWM_HRC_CMP_SEL_t cmp_clear

Selection of comparator for clear configuration

XMC_HRPWM_HRC_CMP_SEL_t cmp_set

Selection of comparator for set configuration

XMC_HRPWM_HRC_HR_EDGE_t high_res_mode

high resolution mode configuration

XMC_HRPWM_HRC_SRC_INPUT_t set_config

Selection of input for set configuration

XMC_HRPWM_HRC_SRC_EDGE_SEL_t set_edge_config

Selection of edge for generating set signal

XMC_HRPWM_FUNC_STATUS_t src_trap_enable

Selection of source for trap signal generation

XMC_HRPWM_HRC_TIMER_SEL_t timer_sel

Selection of timer

The documentation for this struct was generated from the following file:
  • xmc_hrpwm.h


XMC Peripheral Library for XMC4000 Family: I2C

Data Structures | Macros | Enumerations | Functions
I2C
XMC Peripheral Library

Data Structures

struct XMC_I2C_CH_CONFIG_t

Macros

#define | XMC_I2C0_CH0 XMC_USIC0_CH0
#define | XMC_I2C0_CH1 XMC_USIC0_CH1
#define | XMC_I2C1_CH0 XMC_USIC1_CH0
#define | XMC_I2C1_CH1 XMC_USIC1_CH1
#define | XMC_I2C2_CH0 XMC_USIC2_CH0
#define | XMC_I2C2_CH1 XMC_USIC2_CH1
#define | XMC_I2C_10BIT_ADDR_GROUP (0x7800U)

Enumerations

Functions

void | XMC_I2C_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, uint32_t flag)
void | XMC_I2C_CH_ConfigExternalInputSignalToBRG (XMC_USIC_CH_t *const channel, const uint16_t pdiv, const uint32_t oversampling, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_I2C_CH_DisableAcknowledgeAddress0 (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_DisableEvent (XMC_USIC_CH_t *const channel, uint32_t event)
void | XMC_I2C_CH_EnableAcknowledgeAddress0 (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_EnableEvent (XMC_USIC_CH_t *const channel, uint32_t event)
uint8_t | XMC_I2C_CH_GetReceivedData (const XMC_USIC_CH_t *const channel)
uint8_t | XMC_I2C_CH_GetReceiverStatusFlag (XMC_USIC_CH_t *const channel)
uint16_t | XMC_I2C_CH_GetSlaveAddress (const XMC_USIC_CH_t *const channel)
uint32_t | XMC_I2C_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_Init (XMC_USIC_CH_t *const channel, const XMC_I2C_CH_CONFIG_t *const config)
void | XMC_I2C_CH_MasterReceiveAck (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_MasterReceiveNack (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_MasterRepeatedStart (XMC_USIC_CH_t *const channel, const uint16_t addr, const XMC_I2C_CH_CMD_t command)
void | XMC_I2C_CH_MasterStart (XMC_USIC_CH_t *const channel, const uint16_t addr, const XMC_I2C_CH_CMD_t command)
void | XMC_I2C_CH_MasterStop (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_MasterTransmit (XMC_USIC_CH_t *const channel, const uint8_t data)
void | XMC_I2C_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_I2C_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_I2C_CH_STATUS_t | XMC_I2C_CH_SetBaudrate (XMC_USIC_CH_t *const channel, const uint32_t rate)
void | XMC_I2C_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_I2C_CH_INPUT_t input, const uint8_t source)
void | XMC_I2C_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_I2C_CH_SetSlaveAddress (XMC_USIC_CH_t *const channel, const uint16_t address)
void | XMC_I2C_CH_SlaveTransmit (XMC_USIC_CH_t *const channel, const uint8_t data)
void | XMC_I2C_CH_Start (XMC_USIC_CH_t *const channel)
XMC_I2C_CH_STATUS_t | XMC_I2C_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)

Detailed Description

USIC IIC Features:

  • Two-wire interface, with one line for shift clock transfer and synchronization (shift clock SCL), the other one for the data transfer (shift data SDA)
  • Communication in standard mode (100 kBit/s) or in fast mode (up to 400 kBit/s)
  • Support of 7-bit addressing, as well as 10-bit addressing
  • Master mode operation, where the IIC controls the bus transactions and provides the clock signal.
  • Slave mode operation, where an external master controls the bus transactions and provides the clock signal.
  • Multi-master mode operation, where several masters can be connected to the bus and bus arbitration can take place, i.e. the IIC module can be master or slave.
    The master/slave operation of an IIC bus participant can change from frame to frame.
  • Efficient frame handling (low software effort), also allowing DMA transfers
  • Powerful interrupt handling due to multitude of indication flags

Macro Definition Documentation

#define XMC_I2C0_CH0 XMC_USIC0_CH0

USIC0 channel 0 base address

#define XMC_I2C0_CH1 XMC_USIC0_CH1

USIC0 channel 1 base address

#define XMC_I2C1_CH0 XMC_USIC1_CH0

USIC1 channel 0 base address

#define XMC_I2C1_CH1 XMC_USIC1_CH1

USIC1 channel 1 base address

#define XMC_I2C2_CH0 XMC_USIC2_CH0

USIC2 channel 0 base address

#define XMC_I2C2_CH1 XMC_USIC2_CH1

USIC2 channel 1 base address

#define XMC_I2C_10BIT_ADDR_GROUP (0x7800U)

Value to verify the address is 10-bit or not

Enumeration Type Documentation

enum XMC_I2C_CH_CMD_t

I2C commands.

Enumerator
XMC_I2C_CH_CMD_WRITE | I2C Command Write
XMC_I2C_CH_CMD_READ | I2C Command Read
enum XMC_I2C_CH_EVENT_t

I2C events.

Enumerator
XMC_I2C_CH_EVENT_RECEIVE_START | Receive start event
XMC_I2C_CH_EVENT_DATA_LOST | Data lost event
XMC_I2C_CH_EVENT_TRANSMIT_SHIFT | Transmit shift event
XMC_I2C_CH_EVENT_TRANSMIT_BUFFER | Transmit buffer event
XMC_I2C_CH_EVENT_STANDARD_RECEIVE | Receive event
XMC_I2C_CH_EVENT_ALTERNATIVE_RECEIVE | Alternate receive event
XMC_I2C_CH_EVENT_BAUD_RATE_GENERATOR | Baudrate generator event
XMC_I2C_CH_EVENT_START_CONDITION_RECEIVED | Start condition received event
XMC_I2C_CH_EVENT_REPEATED_START_CONDITION_RECEIVED | Repeated start condition received event
XMC_I2C_CH_EVENT_STOP_CONDITION_RECEIVED | Stop condition received event
XMC_I2C_CH_EVENT_NACK | NACK received event
XMC_I2C_CH_EVENT_ARBITRATION_LOST | Arbitration lost event
XMC_I2C_CH_EVENT_SLAVE_READ_REQUEST | Slave read request event
XMC_I2C_CH_EVENT_ERROR | Error condition event
XMC_I2C_CH_EVENT_ACK | ACK received event
enum XMC_I2C_CH_INPUT_t

I2C input stage selection.

Enumerator
XMC_I2C_CH_INPUT_SDA | selection of sda input stage
XMC_I2C_CH_INPUT_SCL | selection of scl input stage
enum XMC_I2C_CH_INTERRUPT_NODE_POINTER_t

I2C channel interrupt node pointers

Enumerator
XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT | Node pointer for transmit shift interrupt
XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER | Node pointer for transmit buffer interrupt
XMC_I2C_CH_INTERRUPT_NODE_POINTER_RECEIVE | Node pointer for receive interrupt
XMC_I2C_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE | Node pointer for alternate receive interrupt
XMC_I2C_CH_INTERRUPT_NODE_POINTER_PROTOCOL | Node pointer for protocol related interrupts
enum XMC_I2C_CH_RECEIVER_STATUS_FLAG_t

I2C receiver status. The received data byte is available at the bit positions RBUF[7:0], whereas the additional information is monitored at the bit positions RBUF[12:8].

Enumerator
XMC_I2C_CH_RECEIVER_STATUS_FLAG_ACK | Bit 8: Value of Received Acknowledgement bit
XMC_I2C_CH_RECEIVER_STATUS_FLAG_FIN | Bit 9: A 1 at this bit position indicates that after a (repeated) start condition followed by the address reception the first data byte of a new frame has been received. A 0 at this bit position indicates further data bytes
XMC_I2C_CH_RECEIVER_STATUS_FLAG_MODE | Bit 10: A 0 at this bit position indicates that the data byte has been received when the device has been in slave mode, whereas a 1 indicates a reception in master mode
XMC_I2C_CH_RECEIVER_STATUS_FLAG_ERR | Bit 11: A 1 at this bit position indicates an incomplete/erroneous data byte in the receive buffer
XMC_I2C_CH_RECEIVER_STATUS_FLAG_ADR | Bit 12: A 0 at this bit position indicates that the programmed address has been received. A 1 indicates a general call address.
enum XMC_I2C_CH_STATUS_FLAG_t

I2C status.

Enumerator
XMC_I2C_CH_STATUS_FLAG_SLAVE_SELECT | Slave select status
XMC_I2C_CH_STATUS_FLAG_WRONG_TDF_CODE_FOUND | Wrong TDF status
XMC_I2C_CH_STATUS_FLAG_START_CONDITION_RECEIVED | Start condition received status
XMC_I2C_CH_STATUS_FLAG_REPEATED_START_CONDITION_RECEIVED | Repeated start condition received status
XMC_I2C_CH_STATUS_FLAG_STOP_CONDITION_RECEIVED | Stop condition received status
XMC_I2C_CH_STATUS_FLAG_NACK_RECEIVED | NACK received status
XMC_I2C_CH_STATUS_FLAG_ARBITRATION_LOST | Arbitration lost status
XMC_I2C_CH_STATUS_FLAG_SLAVE_READ_REQUESTED | Slave read requested status
XMC_I2C_CH_STATUS_FLAG_ERROR | Error status
XMC_I2C_CH_STATUS_FLAG_ACK_RECEIVED | ACK received status
XMC_I2C_CH_STATUS_FLAG_RECEIVER_START_INDICATION | Receive start indication status
XMC_I2C_CH_STATUS_FLAG_DATA_LOST_INDICATION | Data lost indication status
XMC_I2C_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION | Transmit shift indication status
XMC_I2C_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION | Transmit buffer indication status
XMC_I2C_CH_STATUS_FLAG_RECEIVE_INDICATION | Receive indication status
XMC_I2C_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION | Alternate receive indication status
XMC_I2C_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION | Baud rate generator indication status
enum XMC_I2C_CH_STATUS_t

I2C Status.

Enumerator
XMC_I2C_CH_STATUS_OK | Status OK
XMC_I2C_CH_STATUS_ERROR | Status ERROR
XMC_I2C_CH_STATUS_BUSY | Status BUSY

Function Documentation

void XMC_I2C_CH_ClearStatusFlag | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | flag
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
flag | Status flag
Returns
None
Description:
Clears the status flag of I2C channel by setting the input parameter flag in PSCR register.
Related APIs:
XMC_I2C_CH_GetStatusFlag()

void XMC_I2C_CH_ConfigExternalInputSignalToBRG | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | pdiv,
 |  | const uint32_t | oversampling,
 |  | const XMC_USIC_CH_INPUT_COMBINATION_MODE_t | combination_mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2C0_CH0, XMC_I2C0_CH1,XMC_I2C1_CH0,XMC_I2C1_CH1,XMC_I2C2_CH0,XMC_I2C2_CH1
Note
Availability of I2C1 and I2C2 depends on device selection
Parameters
pdiv Desired divider for the external frequency input. Range: minimum value = 1, maximum value = 1024
oversampling Required oversampling. The value indicates the number of time quanta for one symbol of data.
This can be related to the number of samples for each logic state of the data signal.
Range: 1 to 32. Value should be chosen based on the protocol used.
combination_mode USIC channel input combination mode
Returns
None
Description
Enables the external frequency input for the Baudrate Generator and configures the divider, oversampling and the combination mode of the USIC channel.

Related APIs:
XMC_USIC_CH_SetBRGInputClockSource(), XMC_USIC_CH_SetInputTriggerCombinationMode()

void XMC_I2C_CH_DisableAcknowledgeAddress0 ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
None
Description:
This bit defines that slave device should not be sensitive to the slave address 00H.
Related APIs:
XMC_I2C_CH_EnableAcknowledgeAddress0()

void XMC_I2C_CH_DisableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_I2C0_CH0, XMC_I2C0_CH1,XMC_I2C1_CH0,XMC_I2C1_CH1,XMC_I2C2_CH0,XMC_I2C2_CH1
Note
Availability of I2C1 and I2C2 depends on device selection
Returns
None
Description
Disable data transmission.

Use this function in combination with XMC_I2C_CH_EnableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Related APIs:
XMC_I2C_CH_EnableDataTransmission()

void XMC_I2C_CH_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | event
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
event | ORed values of XMC_I2C_CH_EVENT_t enum
Returns
None
Description:
Disables the input parameter XMC_I2C_CH_EVENT_t event using PCR_IICMode register.
Related APIs:
XMC_I2C_CH_EnableEvent()

void XMC_I2C_CH_EnableAcknowledgeAddress0 ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
None
Description:
Retrieves the status byte of I2C channel using PSR_IICMode register.
Related APIs:
XMC_I2C_CH_DisableAcknowledgeAddress0()

void XMC_I2C_CH_EnableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_I2C0_CH0, XMC_I2C0_CH1,XMC_I2C1_CH0,XMC_I2C1_CH1,XMC_I2C2_CH0,XMC_I2C2_CH1
Note
Availability of I2C1 and I2C2 depends on device selection
Returns
None
Description
Enable data transmission.

Use this function in combination with XMC_I2C_CH_DisableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Note
If you need more control over the start of transmission use XMC_USIC_CH_SetStartTransmisionMode()
Related APIs:
XMC_I2C_CH_DisableDataTransmission()

void XMC_I2C_CH_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | event
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
event | ORed values of XMC_I2C_CH_EVENT_t enum
Returns
None
Description:
Enables the input parameter XMC_I2C_CH_EVENT_t event using PCR_IICMode register.
Related APIs:
XMC_I2C_CH_DisableEvent()

uint8_t XMC_I2C_CH_GetReceivedData ( const XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
uint8_t OUTR/RBUF register data
Description:
Reads the data from I2C channel.
Data is read by using OUTR/RBUF register based on FIFO/non-FIFO modes.
Related APIs:
XMC_I2C_CH_MasterTransmit()

uint8_t XMC_I2C_CH_GetReceiverStatusFlag ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
uint8_t Receiver status flag
Description:
Gets the receiver status of I2C channel using RBUF register of bits 8-12 which gives information about receiver status.
Related APIs:
XMC_I2C_CH_MasterTransmit()

uint16_t XMC_I2C_CH_GetSlaveAddress ( const XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handler of type XMC_USIC_CH_t
Returns
uint16_t Slave address
Description:
Gets the I2C channel slave address.
Returns the address using PCR_IICMode register by checking if it is in 10-bit address group or 7-bit address group.
(If first five bits of address are assigned with 0xF0, then address mode is considered as 10-bit mode otherwise it is 7-bit mode)
Note
A 7-bit address will include an additional bit at the LSB. For example, address 0x05 will be returned as 0x0a. 10-bit address will not include the 10-bit address identifier 0b11110xx at the most signifcant bits.
Related APIs:
XMC_I2C_CH_SetSlaveAddress()

uint32_t XMC_I2C_CH_GetStatusFlag ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
uint32_t Status byte
Description:
Retrieves the status byte of I2C channel using PSR_IICMode register.
Related APIs:
XMC_I2C_CH_ClearStatusFlag()

void XMC_I2C_CH_Init | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2C_CH_CONFIG_t *const | config
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
config | Constant pointer to I2C channel config structure of type XMC_I2C_CH_CONFIG_t
Returns
None
Description:
Initializes the I2C channel.
Configures the data format in SCTR register. Sets the slave address, baud rate. Enables transmit data valid, clears status flags and disables parity generation.
Related APIs:
XMC_USIC_CH_Enable()

void XMC_I2C_CH_MasterReceiveAck ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
None
Description:
Sends the Ack request from I2C master channel.
Reads the transmit buffer status is busy or not and thereby updates IN/TBUF register based on FIFO/non-FIFO modes using Master Receive Ack command.
Related APIs:
XMC_I2C_CH_MasterTransmit()

void XMC_I2C_CH_MasterReceiveNack ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
None
Description:
Sends the Nack request from I2C master channel.
Reads the transmit buffer status is busy or not and thereby updates IN/TBUF register based on FIFO/non-FIFO modes using Master Receive Nack command.
Related APIs:
XMC_I2C_CH_MasterTransmit()

void XMC_I2C_CH_MasterRepeatedStart | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | addr,
 |  | const XMC_I2C_CH_CMD_t | command
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
addr | I2C master address
command | read/write command
Returns
None
Description:
Sends the repeated start condition from I2C master channel.
Sends the repeated start condition with read/write command by updating IN/TBUF register based on FIFO/non-FIFO modes.
Note
Address(addr) should reserve an additional bit at the LSB for read/write indication. For example, address 0x05 should be provided as 0x0a. If the address is 10-bit, only most significant bits with the 10-bit identifier should be sent using this function. For example, if the 10-bit address is 0x305, the address should be provided as 0xf6(prepend with 0b11110, upper two bits of address 0b11, followed by 1-bit field for read/write).
Related APIs:
XMC_I2C_CH_MasterTransmit(), XMC_USIC_CH_GetTransmitBufferStatus()

void XMC_I2C_CH_MasterStart | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | addr,
 |  | const XMC_I2C_CH_CMD_t | command
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
addr | I2C master address
command | read/write command
Returns
None
Description:
Starts the I2C master channel.
Sends the Start condition with read/write command by updating IN/TBUF register based on FIFO/non-FIFO modes.
Note
Address(addr) should reserve an additional bit at the LSB for read/write indication. For example, address 0x05 should be provided as 0x0a. If the address is 10-bit, only most significant bits with the 10-bit identifier should be sent using this function. For example, if the 10-bit address is 0x305, the address should be provided as 0xf6(prepend with 0b11110, upper two bits of address 0b11, followed by 1-bit field for read/write).
Related APIs:
XMC_I2C_CH_MasterTransmit(), XMC_USIC_CH_GetTransmitBufferStatus()

void XMC_I2C_CH_MasterStop ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
None
Description:
Stops the I2C master channel.
Reads the transmit buffer status is busy or not and thereby updates IN/TBUF register based on FIFO/non-FIFO modes using Stop command.
Related APIs:
XMC_I2C_CH_MasterTransmit(), XMC_USIC_CH_GetTransmitBufferStatus()

void XMC_I2C_CH_MasterTransmit | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | data
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
data | data to transmit from I2C channel
Returns
None
Description:
Transmit the data from the I2C master channel.
Reads the transmit buffer status is busy or not and thereby updates IN/TBUF register based on FIFO/non-FIFO modes using Master Send command.
Related APIs:
XMC_USIC_CH_GetTransmitBufferStatus()

void XMC_I2C_CH_SelectInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2C_CH_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2C0_CH0, XMC_I2C0_CH1,XMC_I2C1_CH0,XMC_I2C1_CH1,XMC_I2C2_CH0,XMC_I2C2_CH1
Note
Availability of I2C1 and I2C2 depends on device selection
Parameters
interrupt_node Interrupt node pointer to be configured.
Range: XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT, XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER etc.
service_request Service request number.
Range: 0 to 5.
Returns
None
Description
Sets the interrupt node for USIC channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so.
Note: NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_I2C_CH_EnableEvent()

XMC_I2C_CH_STATUS_t XMC_I2C_CH_SetBaudrate | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | rate
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
rate | baud rate of I2C channel
Returns
None
Description:
Sets the rate of I2C channel.
Note:
Standard over sampling is considered if rate <= 100KHz and fast over sampling is considered if rate > 100KHz.
Related APIs:
XMC_USIC_CH_SetBaudrate()

void XMC_I2C_CH_SetInputSource | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2C_CH_INPUT_t | input,
 |  | const uint8_t | source
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
input | I2C channel input stage of type XMC_I2C_CH_INPUT_t
source | Input source select for the input stage(0->DX0A, 1->DX1A, .. 7->DX7G)
Returns
None
Description:
Sets the input source for I2C channel.
Defines the input stage for the corresponding input line.
Note
After configuring the input source for corresponding channel, interrupt node pointer is set.
Related APIs:
XMC_USIC_CH_SetInptSource(), XMC_USIC_CH_SetInterruptNodePointer()
void XMC_I2C_CH_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | service_request
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
service_request | Service request number in the range of 0-5
Returns
None
Description:
Sets the interrupt node for protocol interrupt.
To generate interrupt for an event, node pointer should be configured with service request number(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so.
Note:
NVIC node should be separately enabled to generate the interrupt. After setting the node pointer, desired event must be enabled.
Related APIs:
XMC_I2C_CH_EnableEvent(), NVIC_SetPriority(), NVIC_EnableIRQ(), XMC_I2C_CH_SetInputSource()
void XMC_I2C_CH_SetSlaveAddress | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | address
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
address | I2C slave address
Returns
None
Description:
Sets the I2C channel slave address.
Address is set in PCR_IICMode register by checking if it is in 10-bit address group or 7-bit address group. (If first five bits of address are assigned with 0xF0, then address mode is 10-bit mode otherwise it is 7-bit mode)
Note
A 7-bit address should include an additional bit at the LSB for read/write indication. For example, address 0x05 should be provided as 0x0a. A 10-bit address should be provided with the identifier 0b11110xx at the most significant bits. For example, address 0x305 should be provided as 0x7b05(bitwise OR with 0x7800).
Related APIs:
XMC_I2C_CH_GetSlaveAddress()

void XMC_I2C_CH_SlaveTransmit | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | data
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
data | data to transmit from I2C channel
Returns
None
Description:
Transmit the data from the I2C slave channel.
Reads the transmit buffer status is busy or not and thereby updates IN/TBUF register based on FIFO/non-FIFO modes using Slave Send command.
Related APIs:
XMC_USIC_CH_GetTransmitBufferStatus(),XMC_I2C_CH_ClearStatusFlag()

void XMC_I2C_CH_Start ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
None
Description:
Starts the I2C channel.
Sets the USIC input operation mode to I2C mode using CCR register.
Related APIs:
XMC_USIC_CH_SetMode()

XMC_I2C_CH_STATUS_t XMC_I2C_CH_Stop ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
XMC_I2C_CH_STATUS_t
Description:
Stops the I2C channel.
Sets the USIC input operation to IDLE mode using CCR register.
Related APIs:
XMC_USIC_CH_SetMode()

void XMC_I2C_CH_TriggerServiceRequest | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | service_request_line
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2C0_CH0, XMC_I2C0_CH1,XMC_I2C1_CH0,XMC_I2C1_CH1,XMC_I2C2_CH0,XMC_I2C2_CH1
Note
Availability of I2C1 and I2C2 depends on device selection
Parameters
service_request_line service request number of the event to be triggered.
Range: 0 to 5.
Returns
None
Description
Trigger a I2C interrupt service request.

When the I2C service request is triggered, the NVIC interrupt associated with it will be generated if enabled.
Related APIs:
XMC_I2C_CH_SelectInterruptNodePointer()

Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_I2C_CH_CONFIG_t Struct Reference

Data Fields
XMC_I2C_CH_CONFIG_t Struct Reference
XMC Peripheral Library » I2C

#include <xmc_i2c.h>

Data Fields

uint16_t | address
uint32_t | baudrate

Field Documentation

uint16_t address

slave address A 7-bit address needs to be left shifted it by 1. A 10-bit address needs to be ORed with XMC_I2C_10BIT_ADDR_GROUP.

uint32_t baudrate

baud rate configuration upto max of 400KHz

The documentation for this struct was generated from the following file:
  • xmc_i2c.h


XMC Peripheral Library for XMC4000 Family: I2S

Data Structures | Macros | Functions
I2S
XMC Peripheral Library

Data Structures

struct XMC_I2S_CH_CONFIG_t

Macros

#define | XMC_I2S0_CH0 XMC_USIC0_CH0
#define | XMC_I2S0_CH1 XMC_USIC0_CH1
#define | XMC_I2S1_CH0 XMC_USIC1_CH0
#define | XMC_I2S1_CH1 XMC_USIC1_CH1
#define | XMC_I2S2_CH0 XMC_USIC2_CH0
#define | XMC_I2S2_CH1 XMC_USIC2_CH1

Functions

void | XMC_I2S_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, const uint32_t flag)
void | XMC_I2S_CH_ConfigureShiftClockOutput (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t clock_output)
void | XMC_I2S_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_DisableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_I2S_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INPUT_t input)
void | XMC_I2S_CH_DisableMasterClock (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_EnableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_I2S_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INPUT_t input)
void | XMC_I2S_CH_EnableMasterClock (XMC_USIC_CH_t *const channel)
uint16_t | XMC_I2S_CH_GetReceivedData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_I2S_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_Init (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_CONFIG_t *const config)
void | XMC_I2S_CH_Receive (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_CHANNEL_t channel_number)
void | XMC_I2S_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_I2S_CH_STATUS_t | XMC_I2S_CH_SetBaudrate (XMC_USIC_CH_t *const channel, const uint32_t rate)
void | XMC_I2S_CH_SetBitOrderLsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_SetBitOrderMsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_I2S_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INPUT_t input, const uint8_t source)
void | XMC_I2S_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_I2S_CH_SetSystemWordLength (XMC_USIC_CH_t *const channel, uint32_t sclk_cycles_system_word_length)
void | XMC_I2S_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_I2S_CH_Start (XMC_USIC_CH_t *const channel)
XMC_I2S_CH_STATUS_t | XMC_I2S_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_Transmit (XMC_USIC_CH_t *const channel, const uint16_t data, const XMC_I2S_CH_CHANNEL_t channel_number)
void | XMC_I2S_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)
void | XMC_I2S_CH_WordAddressSignalPolarity (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_WA_POLARITY_t wa_inversion)

Detailed Description

USIC IIS Features:

Macro Definition Documentation

#define XMC_I2S0_CH0 XMC_USIC0_CH0

USIC0 channel 0 base address

#define XMC_I2S0_CH1 XMC_USIC0_CH1

USIC0 channel 1 base address

#define XMC_I2S1_CH0 XMC_USIC1_CH0

USIC1 channel 0 base address

#define XMC_I2S1_CH1 XMC_USIC1_CH1

USIC1 channel 1 base address

#define XMC_I2S2_CH0 XMC_USIC2_CH0

USIC2 channel 0 base address

#define XMC_I2S2_CH1 XMC_USIC2_CH1

USIC2 channel 1 base address

Enumeration Type Documentation

enum XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t

I2S Baudrate Generator shift clock output.

Enumerator
XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK | Baudrate Generator shift clock output: SCLK
XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 | Clock obtained as input from master: DX1
enum XMC_I2S_CH_BUS_MODE_t

Defines the I2S bus mode.

Enumerator
XMC_I2S_CH_BUS_MODE_MASTER | I2S Master
XMC_I2S_CH_BUS_MODE_SLAVE | I2S Slave
enum XMC_I2S_CH_CHANNEL_t

Defines the Polarity of the WA in the SELO output lines in relation to the internal WA signal.

Enumerator
XMC_I2S_CH_CHANNEL_1_LEFT | Channel 1 (left)
XMC_I2S_CH_CHANNEL_2_RIGHT | Channel 2 (right)
enum XMC_I2S_CH_EVENT_t

I2S events.

Enumerator
XMC_I2S_CH_EVENT_RECEIVE_START | Receive start event
XMC_I2S_CH_EVENT_DATA_LOST | Data lost event
XMC_I2S_CH_EVENT_TRANSMIT_SHIFT | Transmit shift event
XMC_I2S_CH_EVENT_TRANSMIT_BUFFER | Transmit buffer event
XMC_I2S_CH_EVENT_STANDARD_RECEIVE | Receive event
XMC_I2S_CH_EVENT_ALTERNATIVE_RECEIVE | Alternate receive event
XMC_I2S_CH_EVENT_BAUD_RATE_GENERATOR | Baudrate generator event
XMC_I2S_CH_EVENT_WA_FALLING_EDGE | WA falling edge event
XMC_I2S_CH_EVENT_WA_RISING_EDGE | WA rising edge event
XMC_I2S_CH_EVENT_WA_GENERATION_END | END event
XMC_I2S_CH_EVENT_DX2TIEN_ACTIVATED | WA input signal transition event
enum XMC_I2S_CH_INPUT_t

I2S input stage selection.

Enumerator
XMC_I2S_CH_INPUT_DIN0 | Data input stage 0
XMC_I2S_CH_INPUT_SLAVE_SCLKIN | Clock input stage
XMC_I2S_CH_INPUT_SLAVE_WA | WA input stage
XMC_I2S_CH_INPUT_DIN1 | Data input stage 1
XMC_I2S_CH_INPUT_DIN2 | Data input stage 2
XMC_I2S_CH_INPUT_DIN3 | Data input stage 3
enum XMC_I2S_CH_INTERRUPT_NODE_POINTER_t

I2S channel interrupt node pointers.

Enumerator
XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT | Node pointer for transmit shift interrupt
XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER | Node pointer for transmit buffer interrupt
XMC_I2S_CH_INTERRUPT_NODE_POINTER_RECEIVE | Node pointer for receive interrupt
XMC_I2S_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE | Node pointer for alternate receive interrupt
XMC_I2S_CH_INTERRUPT_NODE_POINTER_PROTOCOL | Node pointer for protocol related interrupts
enum XMC_I2S_CH_STATUS_FLAG_t

I2S status flag.

Enumerator
XMC_I2S_CH_STATUS_FLAG_WORD_ADDRESS | Word Address status
XMC_I2S_CH_STATUS_FLAG_DX2S | Status of WA input(DX2) signal
XMC_I2S_CH_STATUS_FLAG_DX2T_EVENT_DETECTED | Status for WA input signal transition
XMC_I2S_CH_STATUS_FLAG_WA_FALLING_EDGE_EVENT | Falling edge of the WA output signal has been generated
XMC_I2S_CH_STATUS_FLAG_WA_RISING_EDGE_EVENT | Rising edge of the WA output signal has been generated
XMC_I2S_CH_STATUS_FLAG_WA_GENERATION_END | The WA generation has ended
XMC_I2S_CH_STATUS_FLAG_RECEIVER_START_INDICATION | Receive start indication status
XMC_I2S_CH_STATUS_FLAG_DATA_LOST_INDICATION | Data lost indication status
XMC_I2S_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION | Transmit shift indication status
XMC_I2S_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION | Transmit buffer indication status
XMC_I2S_CH_STATUS_FLAG_RECEIVE_INDICATION | Receive indication status
XMC_I2S_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION | Alternate receive indication status
XMC_I2S_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION | Baud rate generator indication status
enum XMC_I2S_CH_STATUS_t

I2S Status.

Enumerator
XMC_I2S_CH_STATUS_OK | Status OK
XMC_I2S_CH_STATUS_ERROR | Status ERROR
XMC_I2S_CH_STATUS_BUSY | Status BUSY
enum XMC_I2S_CH_WA_POLARITY_t

Defines the Polarity of the WA in the SELO output lines in relation to the internal WA signal.

Enumerator
XMC_I2S_CH_WA_POLARITY_DIRECT | The SELO outputs have the same polarity as the WA signal (active high)
XMC_I2S_CH_WA_POLARITY_INVERTED | The SELO outputs have the inverted polarity to the WA signal (active low)

Function Documentation

void XMC_I2S_CH_ClearStatusFlag | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | flag
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
flag | Protocol event status to be cleared for detection of next occurence. Refer @ XMC_I2S_CH_STATUS_FLAG_t for valid values. OR combinations of these enum item can be used as input.
Returns
None
Description:
Clears the events specified, by setting PSCR register.

During communication the events occurred have to be cleared to detect their next occurence.
e.g: During transmission Transmit buffer event occurs to indicating data word transfer has started. This event has to be cleared after transmission of each data word. Otherwise next event cannot be recognized.
Related APIs:
XMC_I2S_CH_GetStatusFlag()
void XMC_I2S_CH_ConfigureShiftClockOutput | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t | clock_output
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
clock_output shift clock source.
Refer XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t for valid inputs.
Returns
None
Description:
Configures the shift clock source by setting BRG.SCLKOSEL.

In Master mode operation, shift clock is generated by the internal baud rate generator. This SCLK is made available for external slave devices by SCLKOUT signal.
In Slave mode, the signal is received from the external master. So the DX1(input) stage has to be connected to input.
void XMC_I2S_CH_DisableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0,XMC_I2S1_CH1,XMC_I2S2_CH0,XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Returns
None
Description
Disable data transmission.

Use this function in combination with XMC_I2S_CH_EnableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Related APIs:
XMC_I2S_CH_EnableDataTransmission()

void XMC_I2S_CH_DisableDelayCompensation ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0,XMC_I2S1_CH1,XMC_I2S2_CH0,XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Returns
None
Description
Disables delay compensation..

Related APIs:
XMC_I2S_CH_EnableDelayCompensation()

void XMC_I2S_CH_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
event | Protocol events which have to be disabled. Refer @ XMC_I2S_CH_EVENT_t for valid values. OR combinations of these enum item can be used as input.
Returns
None
Description:
Disables the I2S protocol specific events, by configuring PCR register.

After disabling the events, XMC_I2S_CH_EnableEvent() has to be invoked to re-enable the events.
Related APIs:
XMC_I2S_CH_EnableEvent()
void XMC_I2S_CH_DisableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_INPUT_t | input
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
input I2S channel input stage.
Refer XMC_I2S_CH_INPUT_t for valid inputs.
Returns
None
Description
Disables the polarity inversion of input data signal, by clearing DXyCR.DPOL(where y = input).

Resets the input data polarity. Invoke XMC_I2S_CH_EnableInputInversion() to apply inversion.
Related APIs:
XMC_I2S_CH_EnableInputInversion()
void XMC_I2S_CH_DisableMasterClock ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Disables the generation of Master clock by clearing PCR.MCLK bit.

This clock can be enabled by invoking XMC_I2S_CH_EnableMasterClock() as needed in the program.
Related APIs:
XMC_I2S_CH_EnableMasterClock()
void XMC_I2S_CH_EnableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0,XMC_I2S1_CH1,XMC_I2S2_CH0,XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Returns
None
Description
Enable data transmission.

Use this function in combination with XMC_I2S_CH_DisableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Note
If you need more control over the start of transmission use XMC_USIC_CH_SetStartTransmisionMode()
Related APIs:
XMC_I2S_CH_DisableDataTransmission()

void XMC_I2S_CH_EnableDelayCompensation ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0,XMC_I2S1_CH1,XMC_I2S2_CH0,XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Returns
None
Description
Enables delay compensation.

Delay compensation can be applied to the receive path.
Related APIs:
XMC_I2S_CH_DisableDelayCompensation()

void XMC_I2S_CH_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
event | Protocol events which have to be enabled. Refer @ XMC_I2S_CH_EVENT_t for valid values. OR combinations of these enum items can be used as input.
Returns
None
Description:
Enables the I2S protocol specific events, by configuring PCR register.

Events can be enabled as needed using XMC_I2S_CH_EnableEvent(). XMC_I2S_CH_DisableEvent() can be used to disable the events.
Related APIs:
XMC_I2S_CH_DisableEvent()
void XMC_I2S_CH_EnableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_INPUT_t | input
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
input I2S channel input stage.
Refer XMC_I2S_CH_INPUT_t for valid inputs.
Returns
None
Description
Enables the polarity inversion of input data signal, by setting DXyCR.DPOL(where y = input).

This is not set in XMC_I2S_CH_Init(). Invoke XMC_I2S_CH_EnableInputInversion() as needed later in the program. To disable the inversion XMC_I2S_CH_DisableInputInversion() can be invoked.
Related APIs:
XMC_I2S_CH_DisableInputInversion()
void XMC_I2S_CH_EnableMasterClock ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Enables the generation of Master clock by setting PCR.MCLK bit.

This clock can be used as a clock reference for external devices. This is not enabled during initialization in XMC_I2S_CH_Init(). Invoke XMC_I2S_CH_EnableMasterClock() to enable as needed in the program, or if it is disabled by XMC_I2S_CH_DisableMasterClock().
Related APIs:
XMC_I2S_CH_DisableMasterClock()
uint16_t XMC_I2S_CH_GetReceivedData ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
uint16_t Data read from the receive buffer.
Description:
Reads data from the receive buffer based on the FIFO selection.

Invocation of XMC_I2S_CH_Receive() receives the data and place it into receive buffer. After receiving the data XMC_I2S_CH_GetReceivedData() can be used to read the data from the buffer.
Related APIs:
XMC_I2S_CH_Receive()
uint32_t XMC_I2S_CH_GetStatusFlag ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
uint32_t Status of I2S protocol events.
Description:
Returns the status of the events, by reading PSR register.

This indicates the status of the all the events, for I2S communication.
Related APIs:
XMC_I2S_CH_ClearStatusFlag()
void XMC_I2S_CH_Init | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_CONFIG_t *const | config
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0, XMC_I2S1_CH1,XMC_I2S2_CH0, XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Parameters
config Constant pointer to I2S configuration structure of type XMC_I2S_CH_CONFIG_t.
Returns
XMC_I2S_CH_STATUS_t Status of initializing the USIC channel for I2S protocol.
Range: XMC_I2S_CH_STATUS_OK if initialization is successful.
XMC_I2S_CH_STATUS_ERROR if configuration of baudrate failed.
Description
Initializes the USIC channel for I2S protocol.

During the initialization, USIC channel is enabled and baudrate is configured. After each change of the WA signal, a complete data frame is intended to be transferred (frame length <= system word length). The number of data bits transferred after a change of signal WA is defined by config->frame_length. A data frame can consist of several data words with a data word length defined by config->data_bits. The changes of signal WA define the system word length as the number of SCLK cycles between two changes of WA. The system word length is set by default to the frame length defined by config->frame_length.

XMC_I2S_CH_Start() should be invoked after the initialization to enable the channel.

Related APIs:
XMC_I2S_CH_Start(), XMC_I2S_CH_Stop(), XMC_I2S_CH_Transmit(), XMC_I2S_CH_SetSystemWordLength()

void XMC_I2S_CH_Receive | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_CHANNEL_t | channel_number
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
channel_number Communication output channel of the I2S, based on this mode TCI(Transmit control information)is updated.
Refer XMC_I2S_CH_CHANNEL_t for valid values.
Returns
None
Description:
Transmits a dummy data(FFFFH) to provide clock for slave and receives the data from the slave.

XMC_I2S_CH_Receive() receives the data and places it into buffer based on the FIFO selection. After reception of data XMC_I2S_CH_GetReceivedData() can be invoked to read the data from the buffers.
Related APIs:
XMC_I2S_CH_GetReceivedData()
void XMC_I2S_CH_SelectInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0,XMC_I2S1_CH1,XMC_I2S2_CH0,XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Parameters
interrupt_node Interrupt node pointer to be configured.
Range: XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT, XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER etc.
service_request Service request number.
Range: 0 to 5.
Returns
None
Description
Sets the interrupt node for USIC channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so.
Note: NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_I2S_CH_EnableEvent()

XMC_I2S_CH_STATUS_t XMC_I2S_CH_SetBaudrate | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | rate
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
rate | Bus speed in bits per second
Returns
XMC_I2S_CH_STATUS_t Status of the I2S driver after the request for setting baudrate is processed.
XMC_I2S_CH_STATUS_OK- If the baudrate is successfully changed.
XMC_I2S_CH_STATUS_ERROR- If the new baudrate value is out of range.
Description:
Sets the bus speed in bits per second
Related APIs:
XMC_I2S_CH_Init(), XMC_I2S_CH_Stop()
void XMC_I2S_CH_SetBitOrderLsbFirst ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Set the order of data transfer from LSB to MSB, by clearing SCTR.SDIR bit.

This is typically based on the slave settings. Invoke XMC_I2S_CH_SetBitOrderLsbFirst() to set direction as needed in the program.
Related APIs:
XMC_I2S_CH_SetBitOrderMsbFirst()
void XMC_I2S_CH_SetBitOrderMsbFirst ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Set the order of data transfer from MSB to LSB, by setting SCTR.SDIR bit.

This is typically based on the slave settings. This is not set during XMC_I2S_CH_Init(). Invoke XMC_I2S_CH_SetBitOrderMsbFirst() to set direction as needed in the program.
Related APIs:
XMC_I2S_CH_SetBitOrderLsbFirst()
void XMC_I2S_CH_SetFrameLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | frame_length
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
frame_length Number of bits in a frame.
Range: 1 to 64.
Returns
None
Description
Define the data frame length.

Set the number of bits to be serially transmitted in a frame. The frame length should be multiples of word length.
Related APIs:
XMC_USIC_CH_SetWordLength()
void XMC_I2S_CH_SetInputSource | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_INPUT_t | input,
 |  | const uint8_t | source
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
input I2S channel input stage.
Refer XMC_I2S_CH_INPUT_t for valid values
source | Input source select for the input stage. Range : [0 to 7]
Returns
None
Description
Selects the data source for I2S input stage, by configuring DXCR.DSEL bits.

Selects the input data signal source among DXnA, DXnB.. DXnG for the input stage. The API can be used for all the input stages like DX0CR, DX1CR etc. This is not done during initialization. This has to be configured before starting the I2S communication.
void XMC_I2S_CH_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | service_request
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
service_request | Service request number. Range: [0 to 5]
Returns
None
Description
Sets the interrupt node for I2S channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so. This is not configured in XMC_I2S_CH_Init() during initialization.
Note::
  1. NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_USIC_CH_EnableEvent()
void XMC_I2S_CH_SetSystemWordLength | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | sclk_cycles_system_word_length
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
sclk_cycles_system_word_length | system word length in terms of sclk clock cycles.
Returns
None
Description:
Configures the system word length by setting BRG.DCTQ bit field.

This value has to be always higher than 1U and lower than the data with (SCTR.FLE)
void XMC_I2S_CH_SetWordLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | word_length
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
word_length Number of bits to be configured for a data word.
Range: 1 to 16.
Returns
None
Description
Defines the data word length.

Sets the number of bits to represent a data word. Frame length should be a multiple of word length.
Related APIs:
XMC_I2S_CH_SetFrameLength()
void XMC_I2S_CH_Start ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Set the selected USIC channel to operate in I2S mode, by setting CCR.MODE bits.

It should be executed after XMC_I2S_CH_Init() during initialization. By invoking XMC_I2S_CH_Stop(), the MODE is set to IDLE state. Call XMC_I2S_CH_Start() to set the I2S mode again, as needed later in the program.
Related APIs:
XMC_I2S_CH_Init(), XMC_I2S_CH_Stop()
XMC_I2S_CH_STATUS_t XMC_I2S_CH_Stop ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
XMC_I2S_CH_STATUS_t Status of the I2S driver after the request for stopping is processed.
XMC_I2S_CH_STATUS_OK- If the USIC channel is successfully put to IDLE mode.
XMC_I2S_CH_STATUS_BUSY- If the USIC channel is busy transmitting data.
Description:
Set the selected I2S channel to IDLE mode, by clearing CCR.MODE bits.

After calling XMC_I2S_CH_Stop, channel is IDLE mode. So no communication is supported. XMC_I2S_CH_Start() has to be invoked to start the communication again.
Related APIs:
XMC_I2S_CH_Start()
void XMC_I2S_CH_Transmit | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data,
 |  | const XMC_I2S_CH_CHANNEL_t | channel_number
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
data | Data to be transmitted
channel_number Communication output channel of the I2S, based on this channel selection TCI(Transmit control information)is updated.
Refer XMC_I2S_CH_CHANNEL_t for valid values.
Returns
None
Description:
Puts the data into FIFO, if FIFO mode is enabled or else into standard buffer, by setting the proper mode.

TCI(Transmit Control Information) allows dynamic control of output channel during data transfers. To support this auto update, TCSR.WAMD(Automatic WA mode) will be enabled during the initialization using XMC_I2S_CH_Init() for all modes.
Related APIs:
XMC_I2S_CH_Receive()
void XMC_I2S_CH_TriggerServiceRequest | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | service_request_line
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0,XMC_I2S1_CH1,XMC_I2S2_CH0,XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Parameters
service_request_line service request number of the event to be triggered.
Range: 0 to 5.
Returns
None
Description
Trigger a I2S interrupt service request.

When the I2S service request is triggered, the NVIC interrupt associated with it will be generated if enabled.
Related APIs:
XMC_I2S_CH_SelectInterruptNodePointer()

void XMC_I2S_CH_WordAddressSignalPolarity | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_WA_POLARITY_t | wa_inversion
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
wa_inversion Polarity of the word address signal.
Refer XMC_I2S_CH_WA_POLARITY_t for valid values
Returns
None
Description
Set the polarity of the word address signal, by configuring PCR.SELINV bit.

Normally WA signal is active low level signal. This is configured in XMC_I2S_CH_Init() during initialization. Invoke XMC_I2S_CH_WordAddressSignalPolarity() with desired settings as needed later in the program.
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_I2S_CH_CONFIG_t Struct Reference

Data Fields
XMC_I2S_CH_CONFIG_t Struct Reference
XMC Peripheral Library » I2S

#include <xmc_i2s.h>

Data Fields

uint32_t | baudrate
XMC_I2S_CH_BUS_MODE_t bus_mode
uint8_t | data_bits
uint8_t | data_delayed_sclk_periods
uint8_t | frame_length
XMC_I2S_CH_WA_POLARITY_t wa_inversion

Field Documentation

uint32_t baudrate

Module baud rate for communication

XMC_I2S_CH_BUS_MODE_t bus_mode

Bus mode MASTER/SLAVE

uint8_t data_bits

Data word length. A data frame can consists of several data words.
Value configured as USIC channel word length.
Range: minimum= 1, maximum= 16

uint8_t data_delayed_sclk_periods

Data delay defined in sclk periods

uint8_t frame_length

Number of data bits transferred after a change of signal WA (data frame).
Configured as USIC channel frame length.
Range: minimum= 1, maximum= 63

XMC_I2S_CH_WA_POLARITY_t wa_inversion

Enable inversion of Slave select signal relative to the internal WA

The documentation for this struct was generated from the following file:
  • xmc_i2s.h


XMC Peripheral Library for XMC4000 Family: LEDTS

Data Structures | Macros | Typedefs | Enumerations | Functions
LEDTS
XMC Peripheral Library

Data Structures

struct | XMC_LEDTS_GLOBAL_CONFIG_t
struct | XMC_LEDTS_GLOBAL_t
struct | XMC_LEDTS_LED_CONFIG_t
struct | XMC_LEDTS_TS_CONFIG_ADVANCED_t
struct | XMC_LEDTS_TS_CONFIG_BASIC_t

Macros

#define | XMC_LEDTS0 ((XMC_LEDTS_GLOBAL_t *) LEDTS0)
#define | XMC_LEDTS0 ((XMC_LEDTS_GLOBAL_t *) LEDTS0)

Typedefs

typedef XMC_LEDTS_GLOBAL_t XMC_LEDTS_t

Enumerations

Functions

void | XMC_LEDTS_ClearInterruptFlag (XMC_LEDTS_t *const ledts, uint32_t interrupt_mask)
void | XMC_LEDTS_DisableInterrupt (XMC_LEDTS_t *const ledts, uint32_t interrupt_mask)
void | XMC_LEDTS_EnableInterrupt (XMC_LEDTS_t *const ledts, uint32_t interrupt_mask)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitGlobal (XMC_LEDTS_t *const ledts, const XMC_LEDTS_GLOBAL_CONFIG_t *config)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitLED (XMC_LEDTS_t *const ledts, const XMC_LEDTS_LED_CONFIG_t *config)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitTSAdvanced (XMC_LEDTS_t *const ledts, const XMC_LEDTS_TS_CONFIG_ADVANCED_t *config)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitTSBasic (XMC_LEDTS_t *const ledts, const XMC_LEDTS_TS_CONFIG_BASIC_t *config)
uint32_t | XMC_LEDTS_ReadFNCOL (XMC_LEDTS_t *const ledts)
uint32_t | XMC_LEDTS_ReadInterruptFlag (XMC_LEDTS_t *const ledts)
uint16_t | XMC_LEDTS_ReadTSVAL (XMC_LEDTS_t *const ledts)
void | XMC_LEDTS_SetActivePADNo (XMC_LEDTS_t *const ledts, XMC_LEDTS_NUMBER_TS_INPUT_t pad_num)
void | XMC_LEDTS_SetColumnBrightness (XMC_LEDTS_t *const ledts, XMC_LEDTS_LED_COLUMN_t column, const uint8_t brightness)
void | XMC_LEDTS_SetCommonOscillationWindow (XMC_LEDTS_t *const ledts, const uint8_t common_size)
void | XMC_LEDTS_SetLEDLinePattern (XMC_LEDTS_t *const ledts, XMC_LEDTS_LED_COLUMN_t column, const uint8_t pattern)
void | XMC_LEDTS_SetNumOfLEDColumns (XMC_LEDTS_t *const ledts, uint8_t count)
void | XMC_LEDTS_SetOscillationWindow (XMC_LEDTS_t *const ledts, XMC_LEDTS_NUMBER_TS_INPUT_t touchpad, const uint8_t size)
void | XMC_LEDTS_StartCounter (XMC_LEDTS_t *const ledts, const uint16_t prescaler)
void | XMC_LEDTS_StopCounter (XMC_LEDTS_t *const ledts)

Detailed Description

The LED and Touch-Sense (LEDTS) drives LEDs and controls touch pads used as human-machine interface (HMI) in an application. The LEDTS can measure the capacitance of up to 8 touch pads, can also drive up to 64 LEDs in an LED matrix. Touch pads and LEDs can share pins to minimize the number of pins needed for such applications, this is realized by the module controlling the touch pads and driving the LEDs in a time-division multiplexed manner.

This device contains LEDTS kernel that has an LED driving function and a touch-sensing function.

It is recommended to set up all configurations for the LEDTS in all Special Function Registers(SFR) before enabling and starting LED and/or touch-sense function(s).

This Low Level Driver(LLD) provides APIs to configure and control LED functionality, Touch-Sense functionality and features common to both functionalities.

LED features:

  1. Configuration structure to configure LED functionality (XMC_LEDTS_LED_CONFIG_t) and initialization funtion (XMC_LEDTS_InitLED()).
  2. Selection of number of LED columns, active column level and enabling LED funtionality (XMC_LEDTS_InitLED()).
  3. Setting line pattern to be displayed on LED column (XMC_LEDTS_SetLEDLinePattern()).
  4. Brightness control of LED column (XMC_LEDTS_SetColumnBrightness()).
  5. Setting number of columns to be activated (XMC_LEDTS_SetNumOfLEDColumns()).

Touch-Sense features:

  1. Configuration structure to perform basic Touch-Sense functionality (XMC_LEDTS_TS_CONFIG_BASIC_t) settings and initialization funtion (XMC_LEDTS_InitTSBasic()).
  2. Configuration structure to perform advanced Touch-Sense functionality (XMC_LEDTS_TS_CONFIG_ADVANCED_t) settings and initialization function (XMC_LEDTS_InitTSAdvanced()).
  3. Setting number of touch inputs and acculumate count on touch input (XMC_LEDTS_InitTSBasic()).
  4. Enabling/disabling of common compare, Touch-Sense counter auto reset and Touch-Sense funtionality. (XMC_LEDTS_InitTSBasic()).
  5. Set number of mask bits for time frame validation and first touch input to be active. (XMC_LEDTS_InitTSAdvanced()).
  6. Enable/disable time frame interrupt, external pull-up on touch pin and hardware or software control of pad turn (XMC_LEDTS_InitTSAdvanced()).
  7. Setting size of common oscillation window for all touch-sense inputs (XMC_LEDTS_SetCommonOscillationWindow()).
  8. Setting size of oscillation window for a touch-sense input (XMC_LEDTS_SetOscillationWindow()).

Common features:

  1. Global configuration structure XMC_LEDTS_GLOBAL_CONFIG_t and initialization function XMC_LEDTS_InitGlobal().
  2. Selection of Clock source for LEDTS module (XMC_LEDTS_InitGlobal()).
  3. Kick-start and stop of LEDTS module (XMC_LEDTS_StartCounter() / XMC_LEDTS_StopCounter()).
  4. Read and clear of interrupt status flags (XMC_LEDTS_ReadInterruptFlag() / XMC_LEDTS_ClearInterruptFlag()).
  5. Reading of previous active column number (XMC_LEDTS_ReadFNCOL()).
  6. Enable/Disable Interrupts(XMC_LEDTS_EnableInterrupt() / XMC_LEDTS_DisableInterrupt()).

Macro Definition Documentation

#define XMC_LEDTS0 ((XMC_LEDTS_GLOBAL_t *) LEDTS0)

Typedef for LEDTS kernel0

#define XMC_LEDTS0 ((XMC_LEDTS_GLOBAL_t *) LEDTS0)

Typedef for LEDTS kernel0

Typedef Documentation

typedef XMC_LEDTS_GLOBAL_t XMC_LEDTS_t

Defines typedef for LEDTS Global data structure. Use type XMC_LEDTS_t for this data structure.

Enumeration Type Documentation

enum XMC_LEDTS_ACCUMULATION_COUNT_t

Defines number of accumulation counts on Touch-Sense input. Use type XMC_LEDTS_ACCUMULATION_COUNT_t for this enum.

Enumerator
XMC_LEDTS_ACCUMULATION_COUNT_1_TIME | Accumulate once
XMC_LEDTS_ACCUMULATION_COUNT_2_TIMES | Accumulate twice
XMC_LEDTS_ACCUMULATION_COUNT_3_TIMES | Accumulate thrice
XMC_LEDTS_ACCUMULATION_COUNT_4_TIMES | Accumulate 4 times
XMC_LEDTS_ACCUMULATION_COUNT_5_TIMES | Accumulate 5 times
XMC_LEDTS_ACCUMULATION_COUNT_6_TIMES | Accumulate 6 times
XMC_LEDTS_ACCUMULATION_COUNT_7_TIMES | Accumulate 7 times
XMC_LEDTS_ACCUMULATION_COUNT_8_TIMES | Accumulate 8 times
XMC_LEDTS_ACCUMULATION_COUNT_9_TIMES | Accumulate 9 times
XMC_LEDTS_ACCUMULATION_COUNT_10_TIMES | Accumulate 10 times
XMC_LEDTS_ACCUMULATION_COUNT_11_TIMES | Accumulate 11 times
XMC_LEDTS_ACCUMULATION_COUNT_12_TIMES | Accumulate 12 times
XMC_LEDTS_ACCUMULATION_COUNT_13_TIMES | Accumulate 13 times
XMC_LEDTS_ACCUMULATION_COUNT_14_TIMES | Accumulate 14 times
XMC_LEDTS_ACCUMULATION_COUNT_15_TIMES | Accumulate 15 times
XMC_LEDTS_ACCUMULATION_COUNT_16_TIMES | Accumulate 16 times
enum XMC_LEDTS_ACTIVE_LEVEL_LED_COL_t

Defines level of LED column when active. Use type XMC_LEDTS_ACTIVE_LEVEL_LED_COL_t for this enum.

Enumerator
XMC_LEDTS_ACTIVE_LEVEL_LED_COL_LOW | LED column pins output low when active
XMC_LEDTS_ACTIVE_LEVEL_LED_COL_HIGH | LED column pins output high when active
enum XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_t

Defines Autoscan time period interrupt flag status. Use type XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_t for this enum.

Enumerator
XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_INACTIVE | Autoscan time period interrupt not active
XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_ACTIVE | Autoscan time period interrupt active
enum XMC_LEDTS_CLOCK_TYPE_t

Defines Clock master enable/disable. Use type for XMC_LEDTS_CLOCK_TYPE_t for this enum.

Enumerator
XMC_LEDTS_CLOCK_TYPE_MASTER | Kernel generates its own clock
XMC_LEDTS_CLOCK_TYPE_SLAVE | Clock is taken from another master kernel
enum XMC_LEDTS_COMMON_COMPARE_t

Defines enable/disable of common compare configuration for Touch-Sense. Use type XMC_LEDTS_COMMON_COMPARE_t for this enum.

Enumerator
XMC_LEDTS_COMMON_COMPARE_DISABLE | Disable common compare for touch-sense
XMC_LEDTS_COMMON_COMPARE_ENABLE | Enable common compare for touch-sense
enum XMC_LEDTS_EXT_PULLUP_COLA_t

Defines External pull-up on touch-sense pin. Use type XMC_LEDTS_EXT_PULLUP_COLA_t for this enum.

Enumerator
XMC_LEDTS_EXT_PULLUP_COLA_DISABLE | Disable external pull-up. Internal pull-up is active
XMC_LEDTS_EXT_PULLUP_COLA_ENABLE | Enable external pull-up
enum XMC_LEDTS_EXTEND_TS_OUTPUT_t

Defines extended Touch-Sense output for pin-low-level. Use type XMC_LEDTS_EXTEND_TS_OUTPUT_t for this enum.

Enumerator
XMC_LEDTS_EXTEND_TS_OUTPUT_BY_1_CLK | Extend Touch-Sense output for pin-low-level by 1 ledts_clk
XMC_LEDTS_EXTEND_TS_OUTPUT_BY_4_CLK | Extend Touch-Sense output for pin-low-level by 4 ledts_clk
XMC_LEDTS_EXTEND_TS_OUTPUT_BY_8_CLK | Extend Touch-Sense output for pin-low-level by 8 ledts_clk
XMC_LEDTS_EXTEND_TS_OUTPUT_BY_16_CLK | Extend Touch-Sense output for pin-low-level by 16 ledts_clk
enum XMC_LEDTS_FLAG_STATUS_t

Defines return value for checking interrupt flag. Use type XMC_LEDTS_FLAG_STATUS_t for this enum.

Enumerator
XMC_LEDTS_FLAG_STATUS_NO | Flag not raised
XMC_LEDTS_FLAG_STATUS_YES | Flag is raised
enum XMC_LEDTS_INTERRUPT_t

Defines Enable or disable interrupts. Use type XMC_LEDTS_INTERRUPT_t for this enum.

Enumerator
XMC_LEDTS_INTERRUPT_TIMESLICE | Enable or Disable time slice interrupt
XMC_LEDTS_INTERRUPT_TIMEFRAME | Enable or Disable time frame interrupt
XMC_LEDTS_INTERRUPT_TIMEPERIOD | Enable or Disable autoscan time period interrupt
enum XMC_LEDTS_LED_COLUMN_t

Defines available LED columns. Use type XMC_LEDTS_LED_COLUMN_t for this enum.

Enumerator
XMC_LEDTS_LED_COLUMN_0 | Denotes LED Column 0
XMC_LEDTS_LED_COLUMN_1 | Denotes LED Column 1
XMC_LEDTS_LED_COLUMN_2 | Denotes LED Column 2
XMC_LEDTS_LED_COLUMN_3 | Denotes LED Column 3
XMC_LEDTS_LED_COLUMN_4 | Denotes LED Column 4
XMC_LEDTS_LED_COLUMN_5 | Denotes LED Column 5
XMC_LEDTS_LED_COLUMN_6 | Denotes LED Column 6
XMC_LEDTS_LED_COLUMN_A | Denotes LED Column A
enum XMC_LEDTS_LED_FUNC_t

Defines LED function enable/disable. Use type XMC_LEDTS_LED_FUNC_t for this enum.

Enumerator
XMC_LEDTS_LED_FUNC_DISABLE | Disable LED function
XMC_LEDTS_LED_FUNC_ENABLE | Enable LED function
enum XMC_LEDTS_NUMBER_LED_COLUMNS_t

Defines Number of LED columns. Use type XMC_LEDTS_NUMBER_LED_COLUMNS_t for this enum.

Enumerator
XMC_LEDTS_NUMBER_LED_COLUMNS_1 | COLA only if TS is enabled, else COL0 only
XMC_LEDTS_NUMBER_LED_COLUMNS_2 | COLA,COL0 if TS is enabled, else COL0-1
XMC_LEDTS_NUMBER_LED_COLUMNS_3 | COLA,COL0-1 if TS is enabled, else COL0-2
XMC_LEDTS_NUMBER_LED_COLUMNS_4 | COLA,COL0-2 if TS is enabled, else COL0-3
XMC_LEDTS_NUMBER_LED_COLUMNS_5 | COLA,COL0-3 if TS is enabled, else COL0-4
XMC_LEDTS_NUMBER_LED_COLUMNS_6 | COLA,COL0-4 if TS is enabled, else COL0-5
XMC_LEDTS_NUMBER_LED_COLUMNS_7 | COLA,COL0-5 if TS is enabled, else COL0-6
XMC_LEDTS_NUMBER_LED_COLUMNS_8 | Only possible if TS is disabled; COLA,COL0-6 used
enum XMC_LEDTS_NUMBER_TS_INPUT_t

Defines number of Touch-Sense Input (for HW pad turn control). Use type XMC_LEDTS_NUMBER_TS_INPUT_t for this enum.

Enumerator
XMC_LEDTS_NUMBER_TS_INPUT_1 | Only TSIN0 is used
XMC_LEDTS_NUMBER_TS_INPUT_2 | TSIN0 & TSIN1 are used
XMC_LEDTS_NUMBER_TS_INPUT_3 | TSIN0-TSIN2 are used
XMC_LEDTS_NUMBER_TS_INPUT_4 | TSIN0-TSIN3 are used
XMC_LEDTS_NUMBER_TS_INPUT_5 | TSIN0-TSIN4 are used
XMC_LEDTS_NUMBER_TS_INPUT_6 | TSIN0-TSIN5 are used
XMC_LEDTS_NUMBER_TS_INPUT_7 | TSIN0-TSIN6 are used
XMC_LEDTS_NUMBER_TS_INPUT_8 | TSIN0-TSIN7 are used
enum XMC_LEDTS_PAD_TURN_SW_CONTROL_t

Defines software control for Touch-Sense pad turn. Use type XMC_LEDTS_PAD_TURN_SW_CONTROL_t for this enum.

Enumerator
XMC_LEDTS_SW_CONTROL_DISABLE | Disable software control. Auto hardware control
XMC_LEDTS_SW_CONTROL_ENABLE | Enable software control for pad turn
enum XMC_LEDTS_PAD_TURN_t

Defines Touch-Sense TSIN pad turn. Use type XMC_LEDTS_PAD_TURN_t for this enum.

Enumerator
XMC_LEDTS_PAD_TURN_0 | TSIN0 is next or currently active
XMC_LEDTS_PAD_TURN_1 | TSIN1 is next or currently active
XMC_LEDTS_PAD_TURN_2 | TSIN2 is next or currently active
XMC_LEDTS_PAD_TURN_3 | TSIN3 is next or currently active
XMC_LEDTS_PAD_TURN_4 | TSIN4 is next or currently active
XMC_LEDTS_PAD_TURN_5 | TSIN5 is next or currently active
XMC_LEDTS_PAD_TURN_6 | TSIN6 is next or currently active
XMC_LEDTS_PAD_TURN_7 | TSIN7 is next or currently active
enum XMC_LEDTS_STATUS_t

Defines return value of an API. Use type XMC_LEDTS_STATUS_t for this enum.

Enumerator
XMC_LEDTS_STATUS_SUCCESS | API fulfills request
XMC_LEDTS_STATUS_RUNNING | The kernel-counter is currently running
XMC_LEDTS_STATUS_ERROR | API cannot fulfill request
XMC_LEDTS_STATUS_IDLE | The kernel-counter is currently idle
enum XMC_LEDTS_SUSPEND_t

Defines Suspend request configuration. Use type XMC_LEDTS_SUSPEND_t for this enum.

Enumerator
XMC_LEDTS_SUSPEND_DISABLE | Ignore suspend request
XMC_LEDTS_SUSPEND_ENABLE | Enable suspend according to request
enum XMC_LEDTS_TF_INTERRUPT_FLAG_t

Defines (Extended) Time frame interrupt flag status. Use type XMC_LEDTS_TF_INTERRUPT_FLAG_t for this enum.

Enumerator
XMC_LEDTS_TF_INTERRUPT_FLAG_INACTIVE | (Extended) Time frame interrupt not active
XMC_LEDTS_TF_INTERRUPT_FLAG_ACTIVE | (Extended) Time frame interrupt active
enum XMC_LEDTS_TF_VALIDATION_t

Defines Enable/disable of (extended) time frame validation. Use type XMC_LEDTS_TF_VALIDATION_t for this enum.

Enumerator
XMC_LEDTS_TF_VALIDATION_DISABLE | Disable time frame validation
XMC_LEDTS_TF_VALIDATION_ENABLE | Enable time frame validation
enum XMC_LEDTS_TP_SYNC_t

Defines enable/disable of autoscan time period synchronization. Use type XMC_LEDTS_TP_SYNC_t for this enum.

Enumerator
XMC_LEDTS_TP_SYNC_DISABLE | Synchronization is disabled
XMC_LEDTS_TP_SYNC_ENABLE | Synchronization enabled on Kernel0 autoscan time period
enum XMC_LEDTS_TS_COUNTER_AUTO_RESET_t

Defines enable/disable of Touch-Sense counter auto reset configuration. Use type XMC_LEDTS_TS_COUNTER_AUTO_RESET_t for this enum.

Enumerator
XMC_LEDTS_TS_COUNTER_AUTO_RESET_DISABLE | Disable Touch-Sense counter automatic reset
XMC_LEDTS_TS_COUNTER_AUTO_RESET_ENABLE | Enable Touch-Sense counter automatic reset to 0x00
enum XMC_LEDTS_TS_COUNTER_MASK_t

Defines number of bits to mask for time frame event validation. Use type XMC_LEDTS_TS_COUNTER_MASK_t for this enum.

Enumerator
XMC_LEDTS_TS_COUNTER_MASK_1_LSB | Mask LSB bit only
XMC_LEDTS_TS_COUNTER_MASK_2_LSB | Mask 2 LSB bits
XMC_LEDTS_TS_COUNTER_MASK_3_LSB | Mask 3 LSB bits
XMC_LEDTS_TS_COUNTER_MASK_4_LSB | Mask 4 LSB bits
XMC_LEDTS_TS_COUNTER_MASK_5_LSB | Mask 5 LSB bits
XMC_LEDTS_TS_COUNTER_MASK_6_LSB | Mask 6 LSB bits
XMC_LEDTS_TS_COUNTER_MASK_7_LSB | Mask 7 LSB bits
XMC_LEDTS_TS_COUNTER_MASK_8_LSB | Mask 8 LSB bits
enum XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_t

Defines Touch-Sense counter overflow indication. Use type XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_t for this enum.

Enumerator
XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_NO | Touch-sense counter has not overflowed
XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_YES | Touch-sense counter has overflowed at least once
enum XMC_LEDTS_TS_COUNTER_SATURATION_t

Defines enable/disable of Touch-Sense counter saturation configuration. Use type XMC_LEDTS_TS_COUNTER_SATURATION_t for this enum.

Enumerator
XMC_LEDTS_TS_COUNTER_SATURATION_DISABLE | Disabled. Touch-Sense counter overflows when it reaches 0xFF
XMC_LEDTS_TS_COUNTER_SATURATION_ENABLE | Enabled. Touch-Sense counter stops counting when it reaches 0xFF
enum XMC_LEDTS_TS_FUNC_t

Defines Touch-Sense function enable/disable. Use type XMC_LEDTS_TS_FUNC_t for this enum.

Enumerator
XMC_LEDTS_TS_FUNC_DISABLE | Disable touch-sense function
XMC_LEDTS_TS_FUNC_ENABLE | Enable touch-sense function
enum XMC_LEDTS_TS_INPUT_t

Defines available Touch-Sense inputs. Use type XMC_LEDTS_TS_INPUT_t for this enum.

Enumerator
XMC_LEDTS_TS_INPUT_0 | TSIN0 - Denotes touch-sense line 1
XMC_LEDTS_TS_INPUT_1 | TSIN1 - Denotes touch-sense line 2
XMC_LEDTS_TS_INPUT_2 | TSIN2 - Denotes touch-sense line 3
XMC_LEDTS_TS_INPUT_3 | TSIN3 - Denotes touch-sense line 4
XMC_LEDTS_TS_INPUT_4 | TSIN4 - Denotes touch-sense line 5
XMC_LEDTS_TS_INPUT_5 | TSIN5 - Denotes touch-sense line 6
XMC_LEDTS_TS_INPUT_6 | TSIN6 - Denotes touch-sense line 7
XMC_LEDTS_TS_INPUT_7 | TSIN7 - Denotes touch-sense line 8
enum XMC_LEDTS_TS_INTERRUPT_FLAG_t

Defines Interrupt flag status. Use type XMC_LEDTS_TS_INTERRUPT_FLAG_t for this enum.

Enumerator
XMC_LEDTS_INTERRUPT_FLAG_TIMESLICE | Time slice interrupt flag status
XMC_LEDTS_INTERRUPT_FLAG_TIMEFRAME | Time frame interrupt flag status
XMC_LEDTS_INTERRUPT_FLAG_TIMEPERIOD | Time period interrupt flag status
XMC_LEDTS_INTERRUPT_FLAG_TSCOUNTER_OVERFLOW | TS counter overflow flag status

Function Documentation

void XMC_LEDTS_ClearInterruptFlag | ( | XMC_LEDTS_t *const | ledts,
 |  | uint32_t | interrupt_mask
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
interrupt_mask mask value of XMC_LEDTS_INTERRUPT_t enum type.
Returns
None.
Description
Clears interrupt status flags in EVFR register as indicated by mask value interrupt_mask.
This API sets EVFR.CTSF, EVFR.CTFF, EVFR.CTPF bit fields to clear time slice, time frame or time period interrupts respectively.
Typically used along with XMC_LEDTS_ReadInterruptFlag() to figure out which event triggered the interrupt.
Note
Calling this API moves interrupt from pending/active state to inactive state. If the interrupt is pulsed, failing to clear the event bit might cause CPU to immediately re-enter the interrupt service routine(ISR).
Related API's
XMC_LEDTS_ReadInterruptFlag().
void XMC_LEDTS_DisableInterrupt | ( | XMC_LEDTS_t *const | ledts,
 |  | uint32_t | interrupt_mask
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
interrupt_mask mask value of XMC_LEDTS_INTERRUPT_t enum type.
Returns
None.
Description
Disables requested interrupt type by configuring GLOBCTL register with masked value interrupt_mask.
This API can be used to disable time slice(GLOBCTL.ITS_EN) or time frame(GLOBCTL.ITF_EN )or time period (GLOBCTL.ITP_EN)interrupt or any combination of these interrupts by passing appropriate bitwise ORed mask value.
Related API's
XMC_LEDTS_EnableInterrupt().
void XMC_LEDTS_EnableInterrupt | ( | XMC_LEDTS_t *const | ledts,
 |  | uint32_t | interrupt_mask
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
interrupt_mask mask value of XMC_LEDTS_INTERRUPT_t enum type.
Returns
None.
Description
Enables requested interrupt type by configuring GLOBCTL register with masked value interrupt_mask.
This API can be used to enable time slice(GLOBCTL.ITS_EN) or time frame(GLOBCTL.ITF_EN )or time period (GLOBCTL.ITP_EN)interrupt or any combination of these interrupts by passing appropriate bitwise ORed mask value.
Related API's
XMC_LEDTS_DisableInterrupt().
XMC_LEDTS_STATUS_t XMC_LEDTS_InitGlobal | ( | XMC_LEDTS_t *const | ledts,
 |  | const XMC_LEDTS_GLOBAL_CONFIG_t * | config
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
config Pointer to constant LEDTS Global configuration structure. Refer XMC_LEDTS_GLOBAL_CONFIG_t data structure.
Returns
XMC_LEDTS_STATUS_SUCCESS - on success.
XMC_LEDTS_STATUS_RUNNING - LEDTS module currently active. Refer XMC_LEDTS_STATUS_t enum type.
Description
Initializes and configures GLOBCTL register of ledts with configuration data pointed by config.
This API selects clock source (GLOBCTL.CMTR), enables/disables auto scan sync(GLOBCTL.ENSYNC) & suspend config(GLOBCTL.SUSCFG).
Call this API to initialize global register fields common to both LED and touch-sense(TS).
Note
LEDTS should be stopped by using XMC_LEDTS_StopCounter()before calling this API.
Related API's
XMC_LEDTS_StopCounter()
XMC_LEDTS_STATUS_t XMC_LEDTS_InitLED | ( | XMC_LEDTS_t *const | ledts,
 |  | const XMC_LEDTS_LED_CONFIG_t * | config
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
config Pointer to constant LEDTS LED configuration structure. Refer XMC_LEDTS_LED_CONFIG_t data structure.
Returns
XMC_LEDTS_STATUS_SUCCESS - on success.
XMC_LEDTS_STATUS_RUNNING - LEDTS module currently active/running. Refer XMC_LEDTS_STATUS_t enum type.
Description
Configures FNCTL register of ledts with configuration data pointed by config and enables LED functionality.
This API sets number of LED columns(FNCTL.NR_LEDCOL), column level(FNCTL.COLLEV) and enables LED functionality(GLOBCTL.LD_EN).
Call this API to Configure FNCTL & GLOBCTL registers for LED-driving function. Global initialization of LEDTS module should be done by calling XMC_LEDTS_InitGlobal() prior to calling this API.
Note
LEDTS should be stopped by using XMC_LEDTS_StopCounter() before calling this API.
Related API's
XMC_LEDTS_StopCounter() XMC_LEDTS_InitGlobal()
XMC_LEDTS_STATUS_t XMC_LEDTS_InitTSAdvanced | ( | XMC_LEDTS_t *const | ledts,
 |  | const XMC_LEDTS_TS_CONFIG_ADVANCED_t * | config
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
config Pointer to constant LEDTS TS advanced configuration structure. Refer XMC_LEDTS_TS_CONFIG_ADVANCED_t data structure.
Returns
XMC_LEDTS_STATUS_SUCCESS - on success.
XMC_LEDTS_STATUS_RUNNING - LEDTS module currently active/running. Refer XMC_LEDTS_STATUS_t enum type.
Description
Configures FNCTL register of ledts for advanced touch sense functionality with configuration data pointed by config.
This API sets number of mask-bits for time frame validation(GLOBCTL.MASKVAL) & first touch input to be active(if pad turn control is set to S/W)(FNCTL.PADT).
Enables/disables time frame interrupt(GLOBCTL.ITF_EN), external pull up on touch pin(FNCTL.EPULL) & H/W or S/W control of pad turn(if set to H/W, touch input activation is done in round-robin sequence, starting from TSIN0) (FNCTL.PADTSW).
Call this API to initialize registers for advanced touch sense function. Before calling this API Call XMC_LEDTS_InitGlobal() to do Global initialization and XMC_LEDTS_InitTSBasic() to do basic init of touch-sense.
Note
LEDTS should be stopped by using XMC_LEDTS_StopCounter() before calling this API.
Related API's
XMC_LEDTS_StopCounter(), XMC_LEDTS_InitTSBasic().
XMC_LEDTS_STATUS_t XMC_LEDTS_InitTSBasic | ( | XMC_LEDTS_t *const | ledts,
 |  | const XMC_LEDTS_TS_CONFIG_BASIC_t * | config
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
config Pointer to constant LEDTS TS basic configuration structure. Refer XMC_LEDTS_TS_CONFIG_BASIC_t data structure.
Returns
XMC_LEDTS_STATUS_SUCCESS - on success.
XMC_LEDTS_STATUS_RUNNING - LEDTS module currently active/running. Refer XMC_LEDTS_STATUS_t enum type.
Description
Configures FNCTL register of ledts for basic touch sense functionality with configuration data pointed by config and enables TS functionality.
This API sets number of touch inputs(FNCTL.NR_TSIN), accumulate count on touch input(FNCTL.ACCCNT).
This API Enables/disables common compare(FNCTL.TSCCMP), TS counter auto reset(FNCTL.TSCTRR), counter saturation(FNCTL.TSCTRSAT) and enables TS functionality(GLOBCTL.TS_EN).
Call this API to configure FNCTL & GLOBCTL registers for basic touch sense function. Global initialization of LEDTS module should be done by calling XMC_LEDTS_InitGlobal() prior to calling this API.
Note
LEDTS should be stopped by using XMC_LEDTS_StopCounter() before calling this API.
Related API's
XMC_LEDTS_StopCounter() XMC_LEDTS_InitGlobal()
uint32_t XMC_LEDTS_ReadFNCOL ( XMC_LEDTS_t *const ledts )
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
Returns
uint32_t Previous active LED column number. Range: 0 to 7.
Description
Returns active LED column number in previous time-slice by reading FNCOL bit field of FNCTL register. Call this API to figure out active column during previous time slice.
uint32_t XMC_LEDTS_ReadInterruptFlag ( XMC_LEDTS_t *const ledts )
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
Returns
Status flags for events. Possible event flags are 0x01(time slice), 0x02(time frame), 0x04(time period), 0x08(TS counter overflow).
Description
Returns interrupt status flag by reading TSF(time slice), TFF(time frame), TPF(time period), TSCTROVF (touch sense counter overflow) fields of EVFR register.
Typically used in interrupt handler to find out which event has triggered the interrupt.
Note
These flags are set on event regardless of corresponding interrupt is enabled or not.
Related API's
XMC_LEDTS_ClearInterruptFlag().
uint16_t XMC_LEDTS_ReadTSVAL ( XMC_LEDTS_t *const ledts )
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
Returns
uint16_t Shadow touch sense counter value. Range: 0H to FFFFH.
Description
Returns latched touch sense counter value by reading the TSCTRVALR field of TSVAL register.
This API is typically called in time frame(TF) event handler to get oscillation count of the touch-sense input active in previous time frame.
Note
This is the latched value of the TS-counter(on every extended time frame event).
Related API's
XMC_LEDTS_ReadInterruptFlag().
void XMC_LEDTS_SetActivePADNo | ( | XMC_LEDTS_t *const | ledts,
 |  | XMC_LEDTS_NUMBER_TS_INPUT_t | pad_num
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
pad_num Pad number. Range refer XMC_LEDTS_NUMBER_TS_INPUT_t enum type.
Returns
None.
Description
Sets TSIN[x] (where x corresponds to active pad number to be set) field of TSIN[x](x = 0-7) .
This is the TSIN[x] pin that is next or currently active in pad turn.
Call this API to set the active pad turn.
Touch sense functionality should be initialized and configured before calling this API.
void XMC_LEDTS_SetColumnBrightness | ( | XMC_LEDTS_t *const | ledts,
 |  | XMC_LEDTS_LED_COLUMN_t | column,
 |  | const uint8_t | brightness
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
column Column number. Range refer XMC_LEDTS_LED_COLUMN_t enum type.
brightness LED brightness level. Range: 0H(min brightness) to FFH(max brightness).
Returns
None.
Description
Programs CMP_LDx (where x denotes column number) field of LDCMPx(x = 0-1)register to the requested brightness level.
The LDCMPx registers hold the COMPARE values for their respective LED columns. These values are used for LED brightness control. Call this API to control brightness level of the LED.
LED functionality should be initialized and configured before calling this API.
void XMC_LEDTS_SetCommonOscillationWindow | ( | XMC_LEDTS_t *const | ledts,
 |  | const uint8_t | common_size
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
common_size Requested common oscillation window width. Range: FFH(min) to 00H.(max)
Returns
None.
Description
Programs the respective LDCMP1 register bit field CMP_LDA_TSCOM with common_size.
Call this API to adjust the size of the common oscillation window to increase/decrease the number of recorded number of oscillation counts for all touch-sense inputs.
void XMC_LEDTS_SetLEDLinePattern | ( | XMC_LEDTS_t *const | ledts,
 |  | XMC_LEDTS_LED_COLUMN_t | column,
 |  | const uint8_t | pattern
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
column Column number. Range refer XMC_LEDTS_LED_COLUMN_t enum type.
pattern Pattern to be displayed. Range: 0H to FFH.
Returns
None.
Description
Sets LINE_x (where x corresponds to column number) field of LINEx(x = 0-1) register to pattern value.
This value is output on LINE_x when LED column x is active.
Call this API to set desired LED pattern.
LED functionality should be initialized and configured before calling this API.
void XMC_LEDTS_SetNumOfLEDColumns | ( | XMC_LEDTS_t *const | ledts,
 |  | uint8_t | count
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure
count Number of LED columns to be enabled. Range: 0 to 7.
Returns
None.
Description
Sets count number of LED columns active by programming NR_LEDCOL bit field of FNCTL register.
Call this API to set desired number of LED columns active.
Note
NR_LEDCOL bit field can only be modified when LEDTS counter is not running, use XMC_LEDTS_StopCounter() to stop LEDTS module before calling this API.
Related API's
XMC_LEDTS_StopCounter().
void XMC_LEDTS_SetOscillationWindow | ( | XMC_LEDTS_t *const | ledts,
 |  | XMC_LEDTS_NUMBER_TS_INPUT_t | touchpad,
 |  | const uint8_t | size
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
touchpad Touch-sense input pad number. Range refer XMC_LEDTS_NUMBER_TS_INPUT_t enum type.
size Requested oscillation window width. Range: 0H(max) to FFH(min).
Returns
None.
Description
Sets the size of touchpad touch sense oscillation window to size.
This API programs the respective CMP_TSx(where x is touchpad number) bit fields of TSCMPx(x = 0-1) register. size value determines the size of the pad oscillation window for each pad input lines during their pad turn.
Call this API to increase/decrease recorded number of oscillation counts for the requested touch-sense input.
void XMC_LEDTS_StartCounter | ( | XMC_LEDTS_t *const | ledts,
 |  | const uint16_t | prescaler
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
prescaler Constant prescaler value. Range: 0H to FFFFH.
Returns
None.
Description
Kick-starts the LEDTS module by programming CLK_PS bit field of GLOBCTL register with prescaler value to start the LEDTS-counter.
To set LEDTS counter at least one of the touch-sense or LED function should be enabled. Call this API to start LEDTS counter.
Note
This should be called after all used modules have been initialized.
Related API's
XMC_LEDTS_StopCounter(), XMC_LEDTS_InitLED(), XMC_LEDTS_InitTSBasic(), XMC_LEDTS_InitTSAdvanced().
void XMC_LEDTS_StopCounter ( XMC_LEDTS_t *const ledts )
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
Returns
None.
Description
Stops the LEDTS module by programming the CLK_PS bit field(with value = 0) of GLOBCTL register.
This could be done when it is required to change some module configuration which requires the LEDTS-counter to be stopped before the register bit/bit field can be programmed.
Call this API to stop LEDTS counter.
Related API's
XMC_LEDTS_StartCounter(), XMC_LEDTS_InitLED(), XMC_LEDTS_InitTSBasic(), XMC_LEDTS_InitTSAdvanced().
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_LEDTS_GLOBAL_CONFIG_t Struct Reference

XMC_LEDTS_GLOBAL_CONFIG_t Struct Reference
XMC Peripheral Library » LEDTS

#include <xmc_ledts.h>

Detailed Description

Data structure for initialization of global features common to LED and touch-sense function. Use type XMC_LEDTS_GLOBAL_CONFIG_t for this structure.

Field Documentation

uint32_t autoscan_synchronization

Set this bit to synchronize start of autoscan time period with master kernel(ENSYNC). Refer XMC_LEDTS_TP_SYNC_t enum for possible values.

uint32_t clock_generation

When this bit is set LEDTS counter takes its clock from another master kernel. Kernel generates its own clock when this bit is not set (CMTR). Refer XMC_LEDTS_CLOCK_TYPE_t enum for possible values.

uint32_t suspend_response

Suspend request configuration(SUSCFG). Refer XMC_LEDTS_SUSPEND_t enum for possible values.

The documentation for this struct was generated from the following file:
  • xmc_ledts.h


XMC Peripheral Library for XMC4000 Family: XMC_LEDTS_GLOBAL_t Struct Reference

Data Fields
XMC_LEDTS_GLOBAL_t Struct Reference
XMC Peripheral Library » LEDTS

#include <xmc_ledts.h>

Data Fields

__O uint32_t | EVFR
__IO uint32_t | FNCTL
__IO uint32_t | GLOBCTL
__I uint32_t | ID
__IO uint32_t | LDCMP [2]
__IO uint32_t | LINE [2]
__IO uint32_t | TSCMP [2]
__IO uint32_t | TSVAL

Detailed Description

Defines LEDTS module structure. This holds data and configuration registers of LEDTS modules. Use type XMC_LEDTS_GLOBAL_t for this data structure.

Field Documentation

__O uint32_t EVFR

(@ 0x5002000C) Event Flag Register

__IO uint32_t FNCTL

(@ 0x50020008) Function Control Register

__IO uint32_t GLOBCTL

(@ 0x50020004) Global Control Register

__I uint32_t ID

< (@ 0x50020000) LEDTS Structure (@ 0x50020000) Module Identification Register

__IO uint32_t LDCMP[2]

(@ 0x5002001C) LED Compare Register 0

__IO uint32_t LINE[2]

(@ 0x50020014) Line Pattern Register 0

__IO uint32_t TSCMP[2]

(@ 0x50020024) Touch-sense Compare Register 0

__IO uint32_t TSVAL

(@ 0x50020010) Touch-sense TS-Counter Value

The documentation for this struct was generated from the following file:
  • xmc_ledts.h


XMC Peripheral Library for XMC4000 Family: XMC_LEDTS_LED_CONFIG_t Struct Reference

XMC_LEDTS_LED_CONFIG_t Struct Reference
XMC Peripheral Library » LEDTS

#include <xmc_ledts.h>

Detailed Description

Data structure for LED function initialization. Use type XMC_LEDTS_LED_CONFIG_t for this structure.

Field Documentation

uint32_t column_active_level

When this bit is set LED column level is active high, otherwise column level is active low(COLLEV). Refer XMC_LEDTS_ACTIVE_LEVEL_LED_COL_t enum for possible values.

uint32_t no_of_led_columns

Defines number of LED columns(NR_LEDCOL). Range 0 - 7. Refer XMC_LEDTS_NUMBER_LED_COLUMNS_t enum for possible values.

The documentation for this struct was generated from the following file:
  • xmc_ledts.h


XMC Peripheral Library for XMC4000 Family: XMC_LEDTS_TS_CONFIG_ADVANCED_t Struct Reference

XMC_LEDTS_TS_CONFIG_ADVANCED_t Struct Reference
XMC Peripheral Library » LEDTS

#include <xmc_ledts.h>

Detailed Description

Data structure for advanced Touch-Sense function initialization. Use type XMC_LEDTS_TS_CONFIG_ADVANCED_t for this structure.

Field Documentation

uint32_t external_pullup

Disable or enable external pull-up on touch pin(EPULL). Refer XMC_LEDTS_EXT_PULLUP_COLA_t enum for possible values.

uint32_t first_pad_turn

This bit-field denotes TSIN[x] pin on which oscillations are measured currently/next(PADT). Refer XMC_LEDTS_PAD_TURN_t enum for possible values.

uint32_t pad_turn_control

Control pad turn via HW or SW(PADTSW). Refer XMC_LEDTS_PAD_TURN_SW_CONTROL_t enum for possible values.

uint32_t pin_low_extend

This bit extends touch-sense output for pin-low-level configuration for adjustment of oscillation per user system. Refer XMC_LEDTS_EXTEND_TS_OUTPUT_t enum for possible values.

uint32_t time_frame_validation

Disable or enable (extended) time frame validation(FENVAL). when validation fails time frame interrupt is not triggered. Refer XMC_LEDTS_TF_VALIDATION_t enum for possible values.

uint32_t validation_mask

This bit-field defines number of LSB bits to mask for TS counter and shadow TS counter comparison when Time Frame validation is enabled(MASKVAL). Refer XMC_LEDTS_TS_COUNTER_MASK_t enum for possible values.

The documentation for this struct was generated from the following file:
  • xmc_ledts.h


XMC Peripheral Library for XMC4000 Family: XMC_LEDTS_TS_CONFIG_BASIC_t Struct Reference

XMC_LEDTS_TS_CONFIG_BASIC_t Struct Reference
XMC Peripheral Library » LEDTS

#include <xmc_ledts.h>

Detailed Description

Data structure for basic Touch-Sense function initialization. Use type XMC_LEDTS_TS_CONFIG_BASIC_t for this structure.

Field Documentation

uint32_t common_compare

When this bit is set it enables common compare for all touch sense inputs. Disables common compare when not set(TSCCMP). Refer XMC_LEDTS_COMMON_COMPARE_t enum for possible values.

uint32_t counter_auto_reset

When this bit is set TS-counter is automatically reset to 00H on first pad turn of a new touch-sense pin(TSCTRR). Refer XMC_LEDTS_TS_COUNTER_AUTO_RESET_t enum for possible values.

uint32_t counter_saturation

When this bit is set TS-counter stops counting in the touch-sense time slice of the same frame when it reaches FFH (TSCTRSAT). Refer XMC_LEDTS_TS_COUNTER_SATURATION_t enum for possible values.

uint32_t no_of_accumulation

Defines number of times touch-sense input pin is enabled in touch-sense time slice of consecutive frames(ACCCNT). Range 0 - 15. Refer XMC_LEDTS_ACCUMULATION_COUNT_t enum type for possible values.

uint32_t no_of_touch_inputs

Defines number of touch-sense inputs (NR_TSIN). Range 0 - 7. Refer XMC_LEDTS_NUMBER_TS_INPUT_t enum for possible values.

The documentation for this struct was generated from the following file:
  • xmc_ledts.h


XMC Peripheral Library for XMC4000 Family: POSIF

Data Structures | Typedefs | Enumerations | Functions
POSIF
XMC Peripheral Library

Data Structures

struct | XMC_POSIF_CONFIG_t
struct | XMC_POSIF_HSC_CONFIG_t
struct | XMC_POSIF_MCM_CONFIG_t
struct | XMC_POSIF_QD_CONFIG_t

Typedefs

typedef POSIF_GLOBAL_TypeDef XMC_POSIF_t

Enumerations

Functions

void | XMC_POSIF_ClearEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
void | XMC_POSIF_Disable (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_DisableEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
void | XMC_POSIF_Enable (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_EnableEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
uint8_t | XMC_POSIF_GetEventStatus (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
uint8_t | XMC_POSIF_HSC_GetCurrentPattern (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_HSC_GetExpectedPattern (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_HSC_GetLastSampledPattern (XMC_POSIF_t *const peripheral)
XMC_POSIF_STATUS_t | XMC_POSIF_HSC_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_HSC_CONFIG_t *const config)
void | XMC_POSIF_HSC_SetCurrentPattern (XMC_POSIF_t *const peripheral, const uint8_t pattern)
void | XMC_POSIF_HSC_SetExpectedPattern (XMC_POSIF_t *const peripheral, const uint8_t pattern)
void | XMC_POSIF_HSC_SetHallPatterns (XMC_POSIF_t *const peripheral, const uint8_t pattern_mask)
void | XMC_POSIF_HSC_UpdateHallPattern (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_CONFIG_t *const config)
bool | XMC_POSIF_IsRunning (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_MCM_EnableMultiChannelPatternUpdate (XMC_POSIF_t *const peripheral)
uint16_t | XMC_POSIF_MCM_GetMultiChannelPattern (XMC_POSIF_t *const peripheral)
uint16_t | XMC_POSIF_MCM_GetShadowMultiChannelPattern (XMC_POSIF_t *const peripheral)
XMC_POSIF_STATUS_t | XMC_POSIF_MCM_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_MCM_CONFIG_t *const config)
void | XMC_POSIF_MCM_SetMultiChannelPattern (XMC_POSIF_t *const peripheral, const uint16_t pattern)
void | XMC_POSIF_MCM_UpdateMultiChannelPattern (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_QD_GetCurrentIndexValue (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_QD_GetCurrentState (XMC_POSIF_t *const peripheral)
XMC_POSIF_QD_DIR_t | XMC_POSIF_QD_GetDirection (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_QD_GetPreviousState (XMC_POSIF_t *const peripheral)
XMC_POSIF_STATUS_t | XMC_POSIF_QD_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_QD_CONFIG_t *const config)
void | XMC_POSIF_SelectInputSource (XMC_POSIF_t *const peripheral, const XMC_POSIF_INPUT_PORT_t input0, const XMC_POSIF_INPUT_PORT_t input1, const XMC_POSIF_INPUT_PORT_t input2)
void | XMC_POSIF_SetEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
void | XMC_POSIF_SetInterruptNode (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event, const XMC_POSIF_SR_ID_t sr)
void | XMC_POSIF_SetMode (XMC_POSIF_t *const peripheral, const XMC_POSIF_MODE_t mode)
void | XMC_POSIF_Start (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_Stop (XMC_POSIF_t *const peripheral)

Detailed Description

The POSIF unit is a flexible and powerful component for motor control systems that use rotary encoders or hall sensors as feedback loop. It provides interface for motor position and velocity measurement. POSIF unit works with CCU4 and CCU8 to enable position and velocity measurement and to control PWM outputs using multi channel pattern.

Driver is divided in three POSIF functional blocks - Hall Sensor Control (POSIF_HSC), Quadrature Decoder (POSIF_QD) and MultiChannel Mode (POSIF_MCM).

POSIF driver features:

  1. Configuration structure XMC_POSIF_CONFIG_t and initialization function XMC_POSIF_Init() to configure global settings
  2. Allows to change the operating mode using XMC_POSIF_SetMode()
  3. Allows the selection of one of the four inputs (A, B, C or D) using XMC_POSIF_SelectInputSource(). In hall sensor control, inputs are hall0, hall1 and hall2 signals. For quadrature decoder mode, inputs are phase A, phase B and index signals.
  4. Hall Sensor Control (APIs prefixed with XMC_POSIF_HSC_)
    • Configuration structure XMC_POSIF_HSC_CONFIG_t and initialization function XMC_POSIF_HSC_Init()
    • Update current and expected hall pattern in shadow register using XMC_POSIF_HSC_SetHallPatterns()
    • Allows immediate shadow transfer using XMC_POSIF_HSC_UpdateHallPattern()
  5. Quadrature Decoder (APIs prefixed with XMC_POSIF_QD_)
    • Configuration structure XMC_POSIF_QD_CONFIG_t and initialization function XMC_POSIF_QD_Init()
    • Get direction of rotation using XMC_POSIF_QD_GetDirection()
  6. MultiChannel Mode (APIs prefixed with XMC_POSIF_MCM_)
    • Configuration structure XMC_POSIF_MCM_CONFIG_t and initialization function XMC_POSIF_MCM_Init()
    • Update multichannel pattern in shadow register using XMC_POSIF_MCM_SetMultiChannelPattern()
    • Allows immediate shadow transfer using XMC_POSIF_MCM_UpdateMultiChannelPattern()
  7. User need to call respective init functions to configure POSIF operating mode. e.g to configure POSIF in hall sensor control with multichannel mode call both XMC_POSIF_HSC_Init() and XMC_POSIF_MCM_Init().
  8. Allows to enable and disable interrupt sources and assign to service request node using XMC_POSIF_EnableEvent(), XMC_POSIF_DisableEvent() and XMC_POSIF_SetInterruptNode()
Note
POSIF is not available on XMC11 and XMC12 devices

Typedef Documentation

typedef POSIF_GLOBAL_TypeDef XMC_POSIF_t

Defines POSIF peripheral register structure.Use type XMC_POSIF_t for this data structure.

Enumeration Type Documentation

enum XMC_POSIF_FILTER_t

Defines POSIF input debounce filter configuration.POSIF inputs are connected to low pass filter and this enum is used to configure low pass filters cut off frequency. Use type XMC_POSIF_FILTER_t for this enum. The member defines the low pass filter configuration(LPC) bitfield of PCONF register.

Enumerator
XMC_POSIF_FILTER_DISABLED | No filtering
XMC_POSIF_FILTER_1_CLOCK_CYCLE | Filter of 1 Clock Cycle
XMC_POSIF_FILTER_2_CLOCK_CYCLE | Filter of 2 Clock Cycles
XMC_POSIF_FILTER_4_CLOCK_CYCLE | Filter of 4 Clock Cycles
XMC_POSIF_FILTER_8_CLOCK_CYCLE | Filter of 8 Clock Cycles
XMC_POSIF_FILTER_16_CLOCK_CYCLE | Filter of 16 Clock Cycles
XMC_POSIF_FILTER_32_CLOCK_CYCLE | Filter of 32 Clock Cycles
XMC_POSIF_FILTER_64_CLOCK_CYCLE | Filter of 64 Clock Cycles
enum XMC_POSIF_HSC_TRIGGER_EDGE_t

Defines trigger edge in hall sensor mode.Use type XMC_POSIF_HSC_TRIGGER_EDGE_t for this enum. It can be used to configure PCONF register's SPES and MSES bit fields.

Enumerator
XMC_POSIF_HSC_TRIGGER_EDGE_RISING | Rising edge
XMC_POSIF_HSC_TRIGGER_EDGE_FALLING | Falling edge
enum XMC_POSIF_INPUT_ACTIVE_LEVEL_t

Defines active level of an input signal.Use type XMC_POSIF_INPUT_ACTIVE_LEVEL_t for this enum.

Enumerator
XMC_POSIF_INPUT_ACTIVE_LEVEL_HIGH | Input - Active High
XMC_POSIF_INPUT_ACTIVE_LEVEL_LOW | Input - Active Low
enum XMC_POSIF_INPUT_PORT_t

Defines POSIF configurable input ports.Use type XMC_POSIF_INPUT_PORT_t for this enum. The member defines the respective input selector(INSELX) bitfields of PCONF register. It selects, which input is used for the phase or Hall input function (depending on the module is set for Quadrature Decoder or Hall Sensor Mode). Same enum can be used to configure pattern update signal select by configuring PCONF register's MSETS bit field.

Enumerator
XMC_POSIF_INPUT_PORT_A | INPUT-A
XMC_POSIF_INPUT_PORT_B | INPUT-B
XMC_POSIF_INPUT_PORT_C | INPUT-C
XMC_POSIF_INPUT_PORT_D | INPUT-D
XMC_POSIF_INPUT_PORT_E | INPUT-E
XMC_POSIF_INPUT_PORT_F | INPUT-F
XMC_POSIF_INPUT_PORT_G | INPUT-G
XMC_POSIF_INPUT_PORT_H | INPUT-H
enum XMC_POSIF_IRQ_EVENT_t

Defines POSIF events.Use type XMC_POSIF_IRQ_EVENT_t for this enum. The member defines available event sources.It is used to configure which event to be used for interrupt generation using PFLGE register. [ PFLG,SPFLG,RPFLG]

Enumerator
XMC_POSIF_IRQ_EVENT_CHE | Hall Mode : Correct Hall Event
XMC_POSIF_IRQ_EVENT_WHE | Hall Mode : Wrong Hall Event
XMC_POSIF_IRQ_EVENT_HALL_INPUT | Hall Mode : Hall Input update
XMC_POSIF_IRQ_EVENT_MCP_SHADOW_TRANSFER | Hall Mode + MCM Mode : MC Pattern shadow transfer
XMC_POSIF_IRQ_EVENT_INDX | Quadrature Mode : Index event detection
XMC_POSIF_IRQ_EVENT_ERR | Quadrature Mode : Quadrature Phase Error
XMC_POSIF_IRQ_EVENT_CNT | Quadrature Mode : Quadrature Clock event
XMC_POSIF_IRQ_EVENT_DIR | Quadrature Mode : Quadrature Direction change event
XMC_POSIF_IRQ_EVENT_PCLK | Quadrature Mode : Quadrature period clock generation event
enum XMC_POSIF_MODE_t

Defines POSIF configurable modes.Use type XMC_POSIF_MODE_t for this enum. The members defines the function selector(FSEL) bitfields of PCONF register.

Enumerator
XMC_POSIF_MODE_HALL_SENSOR | Hall sensor mode
XMC_POSIF_MODE_QD | Quadrature Decoder mode
XMC_POSIF_MODE_MCM | Standalone Multichannel mode
XMC_POSIF_MODE_MCM_QD | Quadrature Decoder + Standalone Multichannel mode
enum XMC_POSIF_QD_DIR_t

Defines motor rotation direction.Use type XMC_POSIF_QD_DIR_t for this enum. The member defines the direction in quadrature mode.

Enumerator
XMC_POSIF_QD_DIR_COUNTERCLOCKWISE | Counter Clockwise
XMC_POSIF_QD_DIR_CLOCKWISE | Clockwise
enum XMC_POSIF_QD_INDEX_GENERATION_t

Defines frequency of index signal generation.Use type XMC_POSIF_QD_INDEX_GENERATION_t for this enum. Member represents available configuration for index marker generation using ICM bit field in QDC register.

Enumerator
XMC_POSIF_QD_INDEX_GENERATION_NEVER | Never generate the index marker signal
XMC_POSIF_QD_INDEX_GENERATION_ONCE | Generate only once after the first revolution
XMC_POSIF_QD_INDEX_GENERATION_ALWAYS | Index marker generated upon every revolution
enum XMC_POSIF_QD_MODE_t

Defines position decoder mode selection.Use type XMC_POSIF_QD_MODE_t for this enum. The member defines configuration for the operation of the quadrature decoder mode. It used to configure QDC register.

Enumerator
XMC_POSIF_QD_MODE_QUADRATURE | Standard Quadrature Mode
XMC_POSIF_QD_MODE_DIRECTION_COUNT | Direction Count Mode
enum XMC_POSIF_SR_ID_t

Defines POSIF service request lines.Use type XMC_POSIF_SR_ID_t for this enum. It used to connect POSIF event to required service request line. in PFLGE register for interrupt generation.

Enumerator
XMC_POSIF_SR_ID_0 | SR-0
XMC_POSIF_SR_ID_1 | SR-1
enum XMC_POSIF_STATUS_t

Defines the return status, to verify the POSIF related API calls. Use type XMC_POSIF_STATUS_t for this enum.

Enumerator
XMC_POSIF_STATUS_OK | API fulfills request
XMC_POSIF_STATUS_ERROR | API cannot fulfill request

Function Documentation

void XMC_POSIF_ClearEvent | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_IRQ_EVENT_t | event
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
event | Event to be acknowledged
Return values
None
Description
Clears event by acknowledgment of peripheral.
Acknowledges an IRQ event by configuring 1 to RPFLG register's event bit field.
Related APIs:
XMC_POSIF_SetEvent()

void XMC_POSIF_Disable ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module of type XMC_POSIF_t
Return values
None
Description
Asserts the POSIF module into reset and disables the clock.
If running on other than XMC45 device then in addition it will gate the peripheral clock. Configures PRCLR0 register's POSIF0RS or POSIF1RS bitfield depends upon peripheral.
Related APIs:
XMC_POSIF_Enable()

void XMC_POSIF_DisableEvent | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_IRQ_EVENT_t | event
 | ) |  |

Disables an IRQ generation capable event.

Parameters
peripheral | Pointer to an instance of POSIF module
event | Event to be disabled
Return values
None
Description
Disables event generation of peripheral.
Disables an IRQ generation capable event by configuring 0 to PFLGE register's event bit field.
Related APIs:
XMC_POSIF_EnableEvent()

void XMC_POSIF_Enable ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module of type XMC_POSIF_t
Return values
None
Description
De-asserts the POSIF module from reset and enables the clock.
Configures PRCLR0 register's POSIF0RS or POSIF1RS bit field depends upon peripheral. If running on other than XMC45 device then it will ungate the peripheral clock.
Note
This is the first API which application must invoke to configure POSIF. It is internally called by XMC_POSIF_Init().
Related APIs:
XMC_POSIF_Disable(),XMC_POSIF_Init()

void XMC_POSIF_EnableEvent | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_IRQ_EVENT_t | event
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
event | Event to be enabled
Return values
None
Description
Enables event generation of peripheral.
Enables an IRQ generation capable event by configuring 1 to PFLGE register's event bit field.
Related APIs:
XMC_POSIF_DisableEvent()

uint8_t XMC_POSIF_GetEventStatus | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_IRQ_EVENT_t | event
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
event | Event ID to be checked for status
Return values
uint8_t Returns event status
Description
Returns event status of peripheral.
Determines if IRQ event is asserted by retrieving data from PFLG register's event bit field.
Related APIs:
XMC_POSIF_SetEvent(),XMC_POSIF_ClearEvent()

uint8_t XMC_POSIF_HSC_GetCurrentPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint8_t Returns current hall sensor pattern. Range : [0-7]
Description
Returns current sampled hall sensor pattern of peripheral.
Retrieves the current hall sensor pattern from HALP register's HCP bit field of peripheral. Applications can at any point in time retrieve the current hall sensor pattern by invoking this API.
Note
This is applicable only to the hall sensor mode of operation.
Related APIs:
XMC_POSIF_HSC_GetLastSampledPattern(),XMC_POSIF_HSC_GetExpectedPattern()

uint8_t XMC_POSIF_HSC_GetExpectedPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint8_t Returns expected hall sensor pattern. Range : [0-7]
Description
Returns expected hall sensor pattern of peripheral.
Retrieves the expected hall sensor pattern from HALP register's HEP bit field of peripheral. Applications can at any point in time retrieve the expected hall sensor pattern by invoking this API.
Note
This is applicable only to the hall sensor mode of operation.
Related APIs:
XMC_POSIF_HSC_GetLastSampledPattern(),XMC_POSIF_HSC_GetCurrentPattern()

uint8_t XMC_POSIF_HSC_GetLastSampledPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint8_t Returns last sampled hall sensor pattern. Range : [0-7]
Description
Returns last sampled hall sensor pattern of peripheral.
Retrieves the last sampled hall sensor pattern from PDBG register's HSP bit field of peripheral. Applications can at any point in time retrieve the last sampled hall sensor pattern by invoking this API.
Note
This is applicable only to the hall sensor mode of operation.
Related APIs:
XMC_POSIF_HSC_GetCurrentPattern(),XMC_POSIF_HSC_GetExpectedPattern()

XMC_POSIF_STATUS_t XMC_POSIF_HSC_Init | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_HSC_CONFIG_t *const | config
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
config | Pointer to hall sensor control initialization data of type XMC_POSIF_HSC_CONFIG_t
Return values
XMC_POSIF_STATUS_t Returns XMC_POSIF_STATUS_OK if configured in Hall Sensor Mode else return XMC_POSIF_STATUS_ERROR.
Description
Initializes hall sensor control mode.
Configures PCONF register with which POSIF input trigger to be used for sampling hall pattern.Configures PCONF register for idle signal generation for wrong hall event.
Note
It is necessary to have called XMC_POSIF_Init first with Hall sensor mode before invocation of this API.
Related APIs:
XMC_POSIF_Init()

void XMC_POSIF_HSC_SetCurrentPattern | ( | XMC_POSIF_t *const | peripheral,
 |  | const uint8_t | pattern
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
pattern | The hall sensor pattern to be programmed into current pattern [0-7]
Return values
None
Description
Configures current Hall sensor pattern of peripheral.
Configures the Current hall sensor pattern on HALPS shadow register's HCPS bit field of peripheral. Applications can set at any point in time program the current hall sensor pattern by invoking this API.
Note
This is applicable only to the hall sensor mode of operation. It may be noted that the pattern is merely written to the shadow register. Transfer from the shadow register is based on a hardware transfer trigger or software trigger through API XMC_POSIF_HSC_UpdateHallPattern().
Related APIs:
XMC_POSIF_HSC_GetCurrentPattern(),XMC_POSIF_HSC_SetExpectedPattern()

void XMC_POSIF_HSC_SetExpectedPattern | ( | XMC_POSIF_t *const | peripheral,
 |  | const uint8_t | pattern
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
pattern | The hall sensor pattern to be programmed into expected pattern [0-7]
Return values
None
Description
Configures the expected hall sensor pattern of peripheral.
Applications can set at any point in time program the hall sensor expected patterns by invoking this API. Configures the expected hall sensor pattern on HALPS shadow register's HEPS bit field of peripheral.
Note
This is applicable only to the hall sensor mode of operation.It may be noted that the pattern is merely written to the shadow register. Transfer from the shadow register is based on a hardware transfer trigger or software trigger through API XMC_POSIF_HSC_UpdateHallPattern().
Related APIs:
XMC_POSIF_HSC_GetExpectedPattern()

void XMC_POSIF_HSC_SetHallPatterns | ( | XMC_POSIF_t *const | peripheral,
 |  | const uint8_t | pattern_mask
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
pattern_mask | The hall sensor pattern mask [0-63] Format of mask: (expected_pattern << 3) | (current_pattern)
Return values
None
Description
Configures current and expected hall pattern of peripheral.
Configures HALPS register with the Current and Expected hall sensor patterns in one operation. Applications can at any point in time program the current and expected hall sensor pattern by invoking this API.
Note
This is applicable only to the hall sensor mode of operation. It may be noted that the pattern is merely written to the shadow register. Transfer from the shadow register is based on a hardware transfer trigger or software trigger through API XMC_POSIF_HSC_UpdateHallPattern().
Related APIs:
XMC_POSIF_HSC_SetExpectedPattern(),XMC_POSIF_HSC_SetCurrentPattern()

void XMC_POSIF_HSC_UpdateHallPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
None
Description
Manually performs shadow transfer of hall sensor patterns.
Configures MCMS register's STHR bit field with 1. Setting this bit to 1 leads to an immediate update of the fields HALP.HCP(Current pattern) and HALP.HEP(Expected pattern).
Note
The transfer of hall sensor pattern shadow registers content to the sensor pattern register happens under two conditions. A hardware trigger starts the shadow transfer. Alternatively, the shadow transfer can be initiated by application software by means of invocation of this API.
Related APIs:
XMC_POSIF_HSC_SetHallPatterns()

void XMC_POSIF_Init | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_CONFIG_t *const | config
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module of type XMC_POSIF_t
config | Pointer to POSIF configuration data(operation mode,input selection and filter configuration)
Return values
None
Description
Initialize POSIF module with config.
Configures POSIF global registers.This is the first API which application must invoke to configure POSIF. It sets up parameters common to all the POSIF modes - hall sensor,quadrature decoder and multi-channel modes of operation. Configures PCONF register with mode of operation,input selection and filter configuration.
Related APIs:
XMC_POSIF_HSC_Init(),XMC_POSIF_QD_Init(),XMC_POSIF_MCM_Init()

bool XMC_POSIF_IsRunning ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
bool Returns false: IDLE, true:RUNNING
Description
Returns the status of POSIF module - Running or IDLE.
Retrieves the status from PRUN register's SRB bit.
Related APIs:
XMC_POSIF_Start(),XMC_POSIF_Stop()

void XMC_POSIF_MCM_EnableMultiChannelPatternUpdate ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
None
Description
Enables update of the Multi-Channel Pattern by software in standalone multi-channel mode.
Enabling update of multi-channel pattern happens under two conditions. A hardware trigger enables this update. Alternatively, this can be enabled by software by means of invocation of this API.
Note
The update is not done immediately due to the fact that the trigger that synchronizes the update with the PWM is still needed.
Related APIs:
XMC_POSIF_MCM_UpdateMultiChannelPattern()

uint16_t XMC_POSIF_MCM_GetMultiChannelPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint16_t Returns configured multi channel pattern
Description
Returns configured multi channel pattern of peripheral.
Retrieves the Multi-Channel Pattern from MCM register's MCMP bit field of peripheral Applications can at any point in time retrieve the multi-channel pattern by invoking this API.
Related APIs:
XMC_POSIF_MCM_SetMultiChannelPattern()

uint16_t XMC_POSIF_MCM_GetShadowMultiChannelPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint16_t Returns configured multi channel pattern present in shadow transfer register
Description
Returns configured multi channel pattern in shadow register of peripheral.
Retrieves the Multi-Channel Pattern from MCSM shadow register's MCMPS bit field. Applications can at any point in time retrieve the multi-channel pattern by invoking this API.

It can be used when MCM is enabled.

Related APIs:
XMC_POSIF_MCM_SetMultiChannelPattern()

XMC_POSIF_STATUS_t XMC_POSIF_MCM_Init | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_MCM_CONFIG_t *const | config
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
config | Pointer to quadrature decoder initialization data
Return values
XMC_POSIF_STATUS_t Returns multi channel pattern initialization status of type XMC_POSIF_STATUS_t
Description
Initializes multi channel mode in Hall mode, standalone multi-channel mode and quadrature with multi-channel mode.
Configures PCONF register with multi channel mode using XMC_POSIF_MCM_CONFIG_t data structure.
Note
It is necessary to call XMC_POSIF_Init first before invocation of this API. For XMC_POSIF_MODE_HALL_SENSOR, it is necessary to have called XMC_POSIF_HSC_Init before invocation of this API. For XMC_POSIF_MODE_MCM_QD, it is necessary to have called XMC_POSIF_QD_Init before invocation of this API.
Related APIs:
XMC_POSIF_Init(),XMC_POSIF_HSC_Init(),XMC_POSIF_QD_Init()

void XMC_POSIF_MCM_SetMultiChannelPattern | ( | XMC_POSIF_t *const | peripheral,
 |  | const uint16_t | pattern
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
pattern | The 16b multi-channel pattern [0-65535]
Return values
None
Description
Configures MCSM register with Multi-Channel Pattern.
This 16b multi-channel pattern which controls the 16 outputs of all slices of a CCU8 module. Transfer from the shadow register is based on a hardware transfer trigger or software trigger through API XMC_POSIF_MCM_UpdateMultiChannelPattern(). Every time that a Multi-Channel pattern transfer is triggered, this value is passed into the field MCM.MCMP of peripheral
Note
It may be noted that the pattern is merely written to the shadow register.
Related APIs:
XMC_POSIF_MCM_GetMultiChannelPattern()

void XMC_POSIF_MCM_UpdateMultiChannelPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
None
Description
Performs shadow transfer of the Multi-Channel Pattern register by configuring MCMS register's STMR bit field.
Note
Transfer multi-channel pattern shadow registers content to the actual pattern register of peripheral.
The transfer of multi-channel pattern shadow registers content to the actual pattern register happens under two conditions. A hardware trigger starts the shadow transfer. Alternatively, the shadow transfer can be initiated by application software by means of invocation of this API.
Related APIs:
XMC_POSIF_MCM_SetMultiChannelPattern()

uint8_t XMC_POSIF_QD_GetCurrentIndexValue ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint8_t Returns the index value.[1 - New rotation started, 0 - In-between]
Description
Returns the current index value in quadrature decoder mode of peripheral.
Retrieves current index signal value of the quadrature decoder from PDBG register's IVAL bit field. Applications can at any point in time retrieve the current index signal value of the quadrature decoder by invoking this API.
Note
This is applicable only to the quadrature decoder mode of operation.
uint8_t XMC_POSIF_QD_GetCurrentState ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint8_t Returns current state of quadrature decoder[Phase B,Phase A]
Description
Returns the current state of phase signals in quadrature decoder mode of peripheral.
Retrieves current state of the quadrature decoder from PDBG register's QCSV bit fields. Applications can at any point in time retrieve the current state of Phase A and Phase B signals by invoking this API.
Note
This is applicable only to the quadrature decoder mode of operation.
Related APIs:
XMC_POSIF_QD_GetPreviousState()

XMC_POSIF_QD_DIR_t XMC_POSIF_QD_GetDirection ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
XMC_POSIF_QD_DIR_t Return direction of revolution of the motor of type XMC_POSIF_QD_DIR_t
Description
Returns the direction of revolution of the motor.
Retrieves direction from QDC register's DVAL bit field in quadrature mode. Applications can at any point in time retrieve the direction of rotation by invoking this API.
Note
This is applicable only to the quadrature decoder mode of operation.
uint8_t XMC_POSIF_QD_GetPreviousState ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint8_t Returns previous state of quadrature decoder[Phase B,Phase A]
Description
Returns the previous state of phase signals in quadrature decoder mode of peripheral.
Retrieves previous state of the quadrature decoder from PDBG register's QPSV bit fields. Applications can at any point in time retrieve the previous state of Phase A and Phase B signals by invoking this API.
Note
This is applicable only to the quadrature decoder mode of operation.
Related APIs:
XMC_POSIF_QD_GetCurrentState()

XMC_POSIF_STATUS_t XMC_POSIF_QD_Init | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_QD_CONFIG_t *const | config
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
config | Pointer to quadrature decoder initialization data
Return values
XMC_POSIF_STATUS_t Returns quadrature mode initialization status of type XMC_POSIF_STATUS_t
Description
Initializes quadrature decoder control mode.
Configures PCONF register with quadrature mode using XMC_POSIF_QD_MODE_t data structure. Initializes QDC register with quadrature mode configuration using XMC_POSIF_QD_CONFIG_t structure.
Note
It is necessary to have called XMC_POSIF_Init first with Quadrature decoder mode before invocation of this API.
Related APIs:
XMC_POSIF_Init()

void XMC_POSIF_SelectInputSource | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_INPUT_PORT_t | input0,
 |  | const XMC_POSIF_INPUT_PORT_t | input1,
 |  | const XMC_POSIF_INPUT_PORT_t | input2
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
input0 | Choice of input for input 0 [0-3]
input1 | Choice of input for input 1 [0-3]
input2 | Choice of input for input 2 [0-3]
Return values
None
Description
Configures which input to be connected to POSIF module.
Configures PCONF register's INSEL0,INSEL1,INSEL2 bit fields with source for the input connection for input0 input1, input2 respectively.
Note
Configures which input is used for the Phase X or Hall input X function depending upon the module is set for Quadrature Decoder or Hall Sensor Mode.
Related APIs:
XMC_POSIF_Init()

void XMC_POSIF_SetEvent | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_IRQ_EVENT_t | event
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
event | Event to be manually asserted
Return values
None
Description
Manually generates event of peripheral.
Manually asserts an IRQ generation capable event by configuring 1 to SPFLG register's event bit field.
Related APIs:
XMC_POSIF_ClearEvent()

void XMC_POSIF_SetInterruptNode | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_IRQ_EVENT_t | event,
 |  | const XMC_POSIF_SR_ID_t | sr
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
event | Event to be acknowledged of type XMC_POSIF_IRQ_EVENT_t
sr | Service request line of type XMC_POSIF_SR_ID_t
Return values
None
Description
Configures event to generate sr (service request) of peripheral.
Binds an IRQ event to a service request line by configuring PFLGE register's event bit field.
void XMC_POSIF_SetMode | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_MODE_t | mode
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
mode | POSIF operating mode of type XMC_POSIF_MODE_t
Return values
None
Description
Configures POSIF module for mode.
Configures PCONF register's a\ FSEL bitfield with mode. Refer XMC_POSIF_MODE_t for available options.
Note
POSIF module should be in stopped state while changing the operating mode.
Related APIs:
XMC_POSIF_Stop()

void XMC_POSIF_Start ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
None
Description
Starts POSIF peripheral functional state machine.
Starts POSIF state machine for peripheral.Configures PRUNS register's SRB bit field with 1.
Note
Global properties of POSIF along with mode specific properties should have been initialized before starting of POSIF FSM.
Related APIs:
XMC_POSIF_Stop(),XMC_POSIF_IsRunning()

void XMC_POSIF_Stop ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
None
Description
Stops POSIF peripheral functional state machine.
Stop POSIF functional state machine and clears current internal status of the peripheral. Configures PRUNC register's CRB bit field with 1.
Related APIs:
XMC_POSIF_Start(),XMC_POSIF_IsRunning()

Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_POSIF_CONFIG_t Struct Reference

XMC_POSIF_CONFIG_t Struct Reference
XMC Peripheral Library » POSIF

#include <xmc_posif.h>

Detailed Description

Defines POSIF module initialization data structure. Use type XMC_POSIF_CONFIG_t for this data structure. It is used to initialize POSIF module using PCONF register.

Field Documentation

uint32_t filter

Input filter configuration

uint32_t input0

Choice of input for Input-1

uint32_t input1

Choice of input for Input-2

uint32_t input2

Choice of input for Input-3

uint32_t mode

POSIF Operational mode. Use XMC_POSIF_MODE_t to configure

The documentation for this struct was generated from the following file:
  • xmc_posif.h


XMC Peripheral Library for XMC4000 Family: XMC_POSIF_HSC_CONFIG_t Struct Reference

XMC_POSIF_HSC_CONFIG_t Struct Reference
XMC Peripheral Library » POSIF

#include <xmc_posif.h>

Detailed Description

Defines POSIF hall sensor control initialization data structure. Use type XMC_POSIF_HSC_CONFIG_t for this data structure. It used to initialize hall sensor mode configuration using PCONF register.

Field Documentation

uint32_t disable_idle_signal

Should idle signal be disabled upon wrong hall event?

uint32_t external_error_enable

Should external errors lead to Wrong Hall event?

uint32_t external_error_level

What should be the active level of external error signal?

uint32_t external_error_port

Of the 4 external error ports, which one is to be considered?

uint32_t sampling_trigger

Of HSDA and HSDB, which one is to be used to trigger POSIF to sample hall pattern?

uint32_t sampling_trigger_edge

Which edge of the sampling trigger signal is to be considered?

The documentation for this struct was generated from the following file:
  • xmc_posif.h


XMC Peripheral Library for XMC4000 Family: XMC_POSIF_MCM_CONFIG_t Struct Reference

XMC_POSIF_MCM_CONFIG_t Struct Reference
XMC Peripheral Library » POSIF

#include <xmc_posif.h>

Detailed Description

Defines POSIF multi-channel mode initialization data structure. Use type XMC_POSIF_MCM_CONFIG_t for this data structure. It used to initialize multi channel mode configuration using PCONF register.

Field Documentation

uint32_t pattern_sw_update

should multi channel pattern updated by SW ?

uint32_t pattern_trigger_edge

Which edge of the pattern update trigger is to be considered?

uint32_t pattern_update_trigger

Of the 8 update triggers, which one is to be considered?

uint32_t pwm_sync

Of the 4 pwm sync inputs, which one is to be considered?

The documentation for this struct was generated from the following file:
  • xmc_posif.h


XMC Peripheral Library for XMC4000 Family: XMC_POSIF_QD_CONFIG_t Struct Reference

Data Fields
XMC_POSIF_QD_CONFIG_t Struct Reference
XMC Peripheral Library » POSIF

#include <xmc_posif.h>

Data Fields

XMC_POSIF_QD_MODE_t mode
uint32_t | index: 2
uint32_t | phase_a: 1
uint32_t | phase_b: 1
uint32_t | phase_leader: 1

Detailed Description

Defines POSIF quadrature decoder initialization data structure. Use type XMC_POSIF_QD_CONFIG_t for this data structure. It used to configure Quadrature mode using QDC register.

Field Documentation

uint32_t index

Index signal generation control. Use XMC_POSIF_QD_INDEX_GENERATION_t to configure this field.

XMC_POSIF_QD_MODE_t mode

Operational Mode of the quadrature encoder and decoder

uint32_t phase_a

Phase-A active level configuration

uint32_t phase_b

Phase-B active level configuration

uint32_t phase_leader

Which of the two phase signals[Phase A or Phase B] leads the other?

The documentation for this struct was generated from the following file:
  • xmc_posif.h


XMC Peripheral Library for XMC4000 Family: RTC

Data Structures | Enumerations | Functions
RTC
XMC Peripheral Library

Data Structures

struct | XMC_RTC_ALARM_t
struct | XMC_RTC_CONFIG_t
struct | XMC_RTC_TIME_t

Enumerations

Functions

void | XMC_RTC_ClearEvent (const uint32_t event)
void | XMC_RTC_Disable (void)
void | XMC_RTC_DisableEvent (const uint32_t event)
void | XMC_RTC_DisableHibernationWakeUp (const uint32_t event)
void | XMC_RTC_Enable (void)
void | XMC_RTC_EnableEvent (const uint32_t event)
void | XMC_RTC_EnableHibernationWakeUp (const uint32_t event)
void | XMC_RTC_GetAlarm (XMC_RTC_ALARM_t *const alarm)
void | XMC_RTC_GetAlarmStdFormat (struct tm *const stdtime)
uint32_t | XMC_RTC_GetEventStatus (void)
uint32_t | XMC_RTC_GetPrescaler (void)
void | XMC_RTC_GetTime (XMC_RTC_TIME_t *const time)
void | XMC_RTC_GetTimeStdFormat (struct tm *const stdtime)
XMC_RTC_STATUS_t | XMC_RTC_Init (const XMC_RTC_CONFIG_t *const config)
bool | XMC_RTC_IsEnabled (void)
bool | XMC_RTC_IsRunning (void)
void | XMC_RTC_SetAlarm (const XMC_RTC_ALARM_t *const alarm)
void | XMC_RTC_SetAlarmStdFormat (const struct tm *const stdtime)
void | XMC_RTC_SetPrescaler (uint16_t prescaler)
void | XMC_RTC_SetTime (const XMC_RTC_TIME_t *const timeval)
void | XMC_RTC_SetTimeStdFormat (const struct tm *const stdtime)
void | XMC_RTC_Start (void)
void | XMC_RTC_Stop (void)

Detailed Description

Real-time clock (RTC) is a clock that keeps track of the current time. Precise real time keeping is with a 32.768 KHz external crystal clock or a 32.768 KHz high precision internal clock. It provides a periodic time based interrupt and a programmable alarm interrupt on time match. It also supports wakeup from hibernate.

The RTC low level driver provides functions to configure and initialize the RTC hardware peripheral.

Enumeration Type Documentation

enum XMC_RTC_EVENT_t

Events which enables interrupt request generation

Enumerator
XMC_RTC_EVENT_PERIODIC_SECONDS | Mask value to enable an event on periodic seconds
XMC_RTC_EVENT_PERIODIC_MINUTES | Mask value to enable an event on periodic seconds
XMC_RTC_EVENT_PERIODIC_HOURS | Mask value to enable an event on periodic seconds
XMC_RTC_EVENT_PERIODIC_DAYS | Mask value to enable an event on periodic seconds
XMC_RTC_EVENT_PERIODIC_MONTHS | Mask value to enable an event on periodic seconds
XMC_RTC_EVENT_PERIODIC_YEARS | Mask value to enable an event on periodic seconds
XMC_RTC_EVENT_ALARM | Mask value to enable an event on periodic seconds
enum XMC_RTC_MONTH_t

Months used to program the date

enum XMC_RTC_STATUS_t

Status return values for RTC low level driver

Enumerator
XMC_RTC_STATUS_OK | Operation successful
XMC_RTC_STATUS_ERROR | Operation unsuccessful
XMC_RTC_STATUS_BUSY | Busy with a previous request
enum XMC_RTC_WAKEUP_EVENT_t

Wakeup events for RTC from hibernate domain

Enumerator
XMC_RTC_WAKEUP_EVENT_ON_ALARM | Wakeup from alarm event
XMC_RTC_WAKEUP_EVENT_ON_SECONDS | Wakeup from seconds event
XMC_RTC_WAKEUP_EVENT_ON_MINUTES | Wakeup from minutes event
XMC_RTC_WAKEUP_EVENT_ON_HOURS | Wakeup from hours event
XMC_RTC_WAKEUP_EVENT_ON_DAYS | Wakeup from days event
XMC_RTC_WAKEUP_EVENT_ON_MONTHS | Wakeup from months event
XMC_RTC_WAKEUP_EVENT_ON_YEARS | Wakeup from years event
enum XMC_RTC_WEEKDAY_t

Week days used program the date

Function Documentation

void XMC_RTC_ClearEvent ( const uint32_t event )
Parameters
event A valid RTC event (XMC_RTC_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Clears periodic and alarm event(s) status
The function sets the bitfields of CLRSR register to clear status bits in RAWSTAT and STSSR registers. Setting the value for the the RTC event(s) containing in the XMC_RTC_EVENT_t clears the corresponding status bits in RAWSTAT and STSSR registers.
Related APIs:
XMC_RTC_GetEventStatus()
void XMC_RTC_Disable ( void )
Returns
None
Description
Disables RTC peripheral for programming its registers
Empty function (Hibernate domain is not disabled).
Related APIs:
XMC_RTC_Enable(), XMC_SCU_RESET_AssertPeripheralReset()
void XMC_RTC_DisableEvent ( const uint32_t event )
Parameters
event A valid RTC event (XMC_RTC_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Disable RTC periodic and alarm event(s)
The function resets the bitfields of MSKSR register to disable interrupt generation for requested RTC event(s). Resetting the masking value for the the event(s) containing in the XMC_RTC_EVENT_t blocks the generation of the interrupt.
Related APIs:
XMC_RTC_EnableEvent()
void XMC_RTC_DisableHibernationWakeUp ( const uint32_t event )
Parameters
event A valid RTC Wakeup event (XMC_RTC_WAKEUP_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Disable Wakeup from hibernate mode
The function resets the bitfields of CTR register to disable wakeup from hibernate mode. Resetting the masking value for the RTC wakeup events containing in the XMC_RTC_WAKEUP_EVENT_t disables wakeup from hibernate mode.
Related APIs:
XMC_RTC_EnableHibernationWakeUp()
void XMC_RTC_Enable ( void )
Returns
None
Description
Enables RTC peripheral for programming its registers
Enables the hibernate domain for accessing RTC peripheral registers.
Related APIs:
XMC_RTC_Disable(), XMC_SCU_RESET_DeassertPeripheralReset()
void XMC_RTC_EnableEvent ( const uint32_t event )
Parameters
event A valid RTC event (XMC_RTC_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Enable RTC periodic and alarm event(s)
The function sets the bitfields of MSKSR register to enable interrupt generation for requested RTC event(s). Setting the masking value for the event(s) containing in the XMC_RTC_EVENT_t leads to a generation of the interrupt.
Related APIs:
XMC_RTC_DisableEvent()
void XMC_RTC_EnableHibernationWakeUp ( const uint32_t event )
Parameters
event A valid RTC Wakeup event (XMC_RTC_WAKEUP_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Enable Wakeup from hibernate mode
The function sets the bitfields of CTR register to enable wakeup from hibernate mode. Setting the masking value for the RTC wakeup events containing in the XMC_RTC_WAKEUP_EVENT_t leads to a wakeup from hibernate mode.
Related APIs:
XMC_RTC_DisableHibernationWakeUp()
void XMC_RTC_GetAlarm ( XMC_RTC_ALARM_t *const alarm )
Parameters
alarm Pointer to a constant XMC_RTC_ALARM_t structure containing the time parameters alarm seconds, alarm minutes, alarm hours, alarm days, alarm daysofweek, alarm month and alarm year.
Returns
None
Description:
Gets the RTC module alarm time value
The function gets the alarm time values from ATIM0, ATIM1 registers. See the structure XMC_RTC_ALARM_t for the valid range of alarm time value parameters.
Related APIs:
XMC_RTC_SetAlarm()
void XMC_RTC_GetAlarmStdFormat ( struct tm *const stdtime )
Parameters
stdtime Pointer to a constant ::tm structure containing the time parameters alarm seconds, alarm minutes, alarm hours, alarm days, alarm daysofweek, alarm month, alarm year(since 1900) and alarm days in a year in standard format.
Returns
None
Description:
Gets the RTC module alarm time value in standard format
The function gets the alarm time values from ATIM0, ATIM1 registers. See the structure XMC_RTC_ALARM_t for the valid range of alarm time value parameters.
For days the valid range is (1 - Actual days of month), year (since 1900) and daysinyear (0 -365).
Related APIs:
XMC_RTC_SetAlarm(), XMC_RTC_GetAlarm()
uint32_t XMC_RTC_GetEventStatus ( void )
Returns
None
Description:
Gets the RTC periodic and alarm event(s) status
The function reads the bitfields of STSSR register to get the status of RTC events. Reading the value of the register STSSR gives the status of the event(s) containing in the XMC_RTC_EVENT_t.
Related APIs:
XMC_RTC_ClearEvent()
uint32_t XMC_RTC_GetPrescaler ( void )
Returns
None
Description:
Gets the RTC module prescaler value
The function reads the CTR.DIV bitfield to get the prescalar value. The default value for the prescalar with the 32.768kHz crystal (or the internal clock) is 7FFFH for a time interval of 1 sec.
Related APIs:
XMC_RTC_SetPrescaler()
void XMC_RTC_GetTime ( XMC_RTC_TIME_t *const time )
Parameters
time Pointer to a constant XMC_RTC_TIME_t structure containing the time parameters seconds, minutes, hours, days, daysofweek, month and year.
Returns
None
Description:
Gets the RTC module time value
The function gets the time values from TIM0, TIM1 registers. See the structure XMC_RTC_TIME_t for the valid range of time value parameters.
Related APIs:
XMC_RTC_SetTime()
void XMC_RTC_GetTimeStdFormat ( struct tm *const stdtime )
Parameters
stdtime Pointer to a constant ::tm structure containing the time parameters seconds, minutes, hours, days, daysofweek, month, year(since 1900) and days in a year in standard format.
Returns
None
Description:
Gets the RTC module time value in standard format
The function gets the time values from TIM0, TIM1 registers. See the structure XMC_RTC_TIME_t for the valid range of time value parameters.
For days the valid range is (1 - Actual days of month), year (since 1900) and daysinyear (0 -365).
Related APIs:
XMC_RTC_SetTime(), XMC_RTC_GetTime()
XMC_RTC_STATUS_t XMC_RTC_Init ( const XMC_RTC_CONFIG_t *const config )
Parameters
config Constant pointer to a constant XMC_RTC_CONFIG_t structure containing the time, alarm time and clock divider(prescaler) configuration.
Returns
XMC_RTC_STATUS_t Always returns XMC_RTC_STATUS_OK (It contains only register assignment statements)
Description:
Initialize the RTC peripheral
The function enables the hibernate domain for accessing RTC peripheral registers, configures
internal clock divider, time and alarm values by writing to the CTR.DIV, TIM0, TIM1, ATIM0 and ATIM1 registers.
bool XMC_RTC_IsEnabled ( void )
Returns
None
Description
Checks RTC peripheral is enabled for programming its registers
Checks the hibernate domain is enabled or not.
Related APIs:
XMC_RTC_Enable(), XMC_RTC_Disable(), XMC_SCU_RESET_DeassertPeripheralReset(), XMC_SCU_RESET_AssertPeripheralReset()
bool XMC_RTC_IsRunning ( void )
Returns
bool true if RTC is running false if RTC is not running
Description:
Checks the running status of the RTC
The function reads the bitfield ENB of CTR register to get the running status of RTC.
Related APIs:
XMC_RTC_Start(), XMC_RTC_Stop()
void XMC_RTC_SetAlarm ( const XMC_RTC_ALARM_t *const alarm )
Parameters
alarm Constant pointer to a constant XMC_RTC_ALARM_t structure containing the alarm time parameters alarm seconds, alarm minutes, alarm hours, alarm days, alarm daysofweek, alarm month and alarm year.
Returns
None
Description:
Sets the RTC module alarm time value
The function sets the ATIM0, ATIM1 registers with alarm time values. See the structure XMC_RTC_ALARM_t for the valid range of alarm time value parameters.
Related APIs:
XMC_RTC_GetAlarm()
void XMC_RTC_SetAlarmStdFormat ( const struct tm *const stdtime )
Parameters
stdtime Pointer to a ::tm structure containing the time parameters alarm seconds, alarm minutes, alarm hours, alarm days, alarm daysofweek, alarm month, alarm year(since 1900) and alarm days in a year in standard format.
Returns
None
Description:
Sets the RTC module alarm time value in standard format
The function sets the alarm time values from ATIM0, ATIM1 registers.
Related APIs:
XMC_RTC_SetAlarm(), XMC_RTC_GetAlarm()
void XMC_RTC_SetPrescaler ( uint16_t prescaler )
Parameters
prescaler Prescaler value to be set
Returns
None
Description:
Sets the RTC module prescaler value
The function sets the CTR.DIV bitfield to configure the prescalar value. The default value for the prescalar with the 32.768kHz crystal (or the internal clock) is 7FFFH for a time interval of 1 sec. Before setting the prescaler value RTC should be in stop mode and hibernate domain should be enabled.
Related APIs:
XMC_RTC_Stop(), XMC_RTC_Enable(), XMC_RTC_GetPrescaler()
void XMC_RTC_SetTime ( const XMC_RTC_TIME_t *const timeval )
Parameters
timeval Contstant pointer to a constant XMC_RTC_TIME_t structure containing the time parameters seconds, minutes, hours, days, daysofweek, month and year.
Returns
None
Description:
Sets the RTC module time values
The function sets the TIM0, TIM1 registers with time values. The values can only be written when RTC is disabled. See the structure XMC_RTC_TIME_t for the valid range of time value parameters.
Related APIs:
XMC_RTC_GetTime(), XMC_RTC_Stop()
void XMC_RTC_SetTimeStdFormat ( const struct tm *const stdtime )
Parameters
stdtime Pointer to a ::tm structure containing the time parameters seconds, minutes, hours, days, daysofweek, month, year(since 1900) and days in a year in standard format.
Returns
None
Description:
Sets the RTC module time value in standard format
The function sets the time values from TIM0, TIM1 registers.
Related APIs:
XMC_RTC_SetTime(), XMC_RTC_GetTime()
void XMC_RTC_Start ( void )
Returns
None
Description
Enables RTC peripheral to start counting time
The function starts the RTC for counting time by setting CTR.ENB bit. Before starting the RTC, it should not be in running mode and also hibernate domain should be enabled.
Related APIs:
XMC_RTC_Enable(), XMC_RTC_Stop(), XMC_SCU_RESET_DeassertPeripheralReset()
void XMC_RTC_Stop ( void )
Returns
None
Description
Disables RTC peripheral to start counting time
The function stops the RTC for counting time by resetting CTR.ENB. Before stopping the RTC, hibernate domain should be enabled.
Related APIs:
XMC_RTC_Enable(), XMC_RTC_Start(), XMC_SCU_RESET_AssertPeripheralReset()
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_RTC_ALARM_t Struct Reference

XMC_RTC_ALARM_t Struct Reference
XMC Peripheral Library » RTC

#include <xmc_rtc.h>

Detailed Description

Alarm time values of RTC

The structure presents a convenient way to set/obtain the alarm time values for seconds, minutes, hours, days, month and year of RTC. The XMC_RTC_SetAlarm() and XMC_RTC_GetAlarm() can be used to populate the structure with the alarm time value of RTC

Field Documentation

uint32_t days

Alarm days compare value (0-Actual days of month: Above this causes this bitfield to be set with 0)

uint32_t hours

Alarm hours compare value (0-23: Above this causes this bitfield to be set with 0)

uint32_t minutes

Alarm minutes compare value (0-59: Above this causes this bitfield to be set with 0)

uint32_t month

Alarm month compare value (0-11: Above this causes this bitfield to be set with 0)

uint32_t seconds

Alarm seconds compare value (0-59: Above this causes this bitfield to be set with 0)

uint32_t year

Alarm year compare value

The documentation for this struct was generated from the following file:
  • xmc_rtc.h


XMC Peripheral Library for XMC4000 Family: XMC_RTC_CONFIG_t Struct Reference

XMC_RTC_CONFIG_t Struct Reference
XMC Peripheral Library » RTC

#include <xmc_rtc.h>

Detailed Description

RTC initialization with time, alarm and clock divider(prescaler) configurations

The structure presents a convenient way to set/obtain the time and alarm configurations for RTC. The XMC_RTC_Init() can be used to populate the structure with the time and alarm values of RTC.

The documentation for this struct was generated from the following file:
  • xmc_rtc.h


XMC Peripheral Library for XMC4000 Family: XMC_RTC_TIME_t Struct Reference

XMC_RTC_TIME_t Struct Reference
XMC Peripheral Library » RTC

#include <xmc_rtc.h>

Detailed Description

Time values of RTC

The structure presents a convenient way to set/obtain the time values for seconds, minutes, hours, days, month and year of RTC. The XMC_RTC_SetTime() and XMC_RTC_GetTime() can be used to populate the structure with the time value of RTC

Field Documentation

uint32_t days

Days time value (0-Actual days of month: Above this causes this bitfield to be set with 0)

uint32_t daysofweek

Days of week time value (0-6: Above this causes this bitfield to be set with 0)

uint32_t hours

Hours time value (0-23: Above this causes this bitfield to be set with 0)

uint32_t minutes

Minutes time value (0-59: Above this causes this bitfield to be set with 0)

uint32_t month

Month time value (0-11: Above this causes this bitfield to be set with 0)

uint32_t seconds

Seconds time value (0-59: Above this causes this bitfield to be set with 0)

uint32_t year

Year time value

The documentation for this struct was generated from the following file:
  • xmc_rtc.h


XMC Peripheral Library for XMC4000 Family: SCU

Data Structures | Macros | Typedefs | Enumerations | Functions
SCU
XMC Peripheral Library

Data Structures

struct | XMC_SCU_CLOCK_CONFIG_t
struct | XMC_SCU_CLOCK_SYSPLL_CONFIG_t

Macros

#define | XMC_SCU_INTERRUPT_EVENT_DLR_OVERRUN SCU_INTERRUPT_SRSTAT_DLROVR_Msk
#define | XMC_SCU_INTERRUPT_EVENT_HDCLR_UPDATED SCU_INTERRUPT_SRSTAT_HDCLR_Msk
#define | XMC_SCU_INTERRUPT_EVENT_HDCR_UPDATED SCU_INTERRUPT_SRSTAT_HDCR_Msk
#define | XMC_SCU_INTERRUPT_EVENT_HDSET_UPDATED SCU_INTERRUPT_SRSTAT_HDSET_Msk
#define | XMC_SCU_INTERRUPT_EVENT_OSCSICTRL_UPDATED SCU_INTERRUPT_SRSTAT_OSCSICTRL_Msk
#define | XMC_SCU_INTERRUPT_EVENT_OSCULCTRL_UPDATED SCU_INTERRUPT_SRSTAT_OSCULCTRL_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RMX_UPDATED SCU_INTERRUPT_SRSTAT_RMX_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTC_ALARM SCU_INTERRUPT_SRSTAT_AI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTC_PERIODIC SCU_INTERRUPT_SRSTAT_PI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCATIM0_UPDATED SCU_INTERRUPT_SRSTAT_RTC_ATIM0_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCATIM1_UPDATED SCU_INTERRUPT_SRSTAT_RTC_ATIM1_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCCTR_UPDATED SCU_INTERRUPT_SRSTAT_RTC_CTR_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCTIM0_UPDATED SCU_INTERRUPT_SRSTAT_RTC_TIM0_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCTIM1_UPDATED SCU_INTERRUPT_SRSTAT_RTC_TIM1_Msk
#define | XMC_SCU_INTERRUPT_EVENT_WDT_WARN SCU_INTERRUPT_SRSTAT_PRWARN_Msk

Typedefs

typedef void(* | XMC_SCU_INTERRUPT_EVENT_HANDLER_t) (void)
typedef uint32_t | XMC_SCU_INTERRUPT_EVENT_t

Enumerations

Functions

void | XMC_SCU_CalibrateTemperatureSensor (uint32_t offset, uint32_t gain)
void | XMC_SCU_CLOCK_DisableClock (const XMC_SCU_CLOCK_t clock)
void | XMC_SCU_CLOCK_DisableHighPerformanceOscillator (void)
void | XMC_SCU_CLOCK_DisableHighPerformanceOscillatorGeneralPurposeInput (void)
void | XMC_SCU_CLOCK_DisableLowPowerOscillator (void)
void | XMC_SCU_CLOCK_DisableLowPowerOscillatorGeneralPurposeInput (void)
void | XMC_SCU_CLOCK_DisableSystemPll (void)
void | XMC_SCU_CLOCK_DisableUsbPll (void)
void | XMC_SCU_CLOCK_EnableClock (const XMC_SCU_CLOCK_t clock)
void | XMC_SCU_CLOCK_EnableHighPerformanceOscillator (void)
void | XMC_SCU_CLOCK_EnableHighPerformanceOscillatorGeneralPurposeInput (void)
void | XMC_SCU_CLOCK_EnableLowPowerOscillator (void)
void | XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput (void)
void | XMC_SCU_CLOCK_EnableSystemPll (void)
void | XMC_SCU_CLOCK_EnableUsbPll (void)
void | XMC_SCU_CLOCK_GatePeripheralClock (const XMC_SCU_PERIPHERAL_CLOCK_t peripheral)
uint32_t | XMC_SCU_CLOCK_GetCcuClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetCcuClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetCpuClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetCpuClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetEbuClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetEbuClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetECATClockDivider (void)
XMC_SCU_CLOCK_ECATCLKSRC_t | XMC_SCU_CLOCK_GetECATClockSource (void)
uint32_t | XMC_SCU_CLOCK_GetEthernetClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetExternalOutputClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetExternalOutputClockFrequency (void)
XMC_SCU_CLOCK_EXTOUTCLKSRC_t | XMC_SCU_CLOCK_GetExternalOutputClockSource (void)
uint32_t | XMC_SCU_CLOCK_GetHighPerformanceOscillatorGeneralPurposeInputStatus (void)
uint32_t | XMC_SCU_CLOCK_GetLowPowerOscillatorGeneralPurposeInputStatus (void)
uint32_t | XMC_SCU_CLOCK_GetPeripheralClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetPeripheralClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetSystemClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetSystemClockFrequency (void)
XMC_SCU_CLOCK_SYSCLKSRC_t | XMC_SCU_CLOCK_GetSystemClockSource (void)
uint32_t | XMC_SCU_CLOCK_GetSystemPllClockFrequency (void)
XMC_SCU_CLOCK_SYSPLLCLKSRC_t | XMC_SCU_CLOCK_GetSystemPllClockSource (void)
uint32_t | XMC_SCU_CLOCK_GetSystemPllClockSourceFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetUsbClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetUsbClockFrequency (void)
XMC_SCU_CLOCK_USBCLKSRC_t | XMC_SCU_CLOCK_GetUsbClockSource (void)
uint32_t | XMC_SCU_CLOCK_GetUsbPllClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetWdtClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetWdtClockFrequency (void)
XMC_SCU_CLOCK_WDTCLKSRC_t | XMC_SCU_CLOCK_GetWdtClockSource (void)
void | XMC_SCU_CLOCK_Init (const XMC_SCU_CLOCK_CONFIG_t *const config)
bool | XMC_SCU_CLOCK_IsClockEnabled (const XMC_SCU_CLOCK_t clock)
bool | XMC_SCU_CLOCK_IsHighPerformanceOscillatorStable (void)
bool | XMC_SCU_CLOCK_IsLowPowerOscillatorStable (void)
bool | XMC_SCU_CLOCK_IsPeripheralClockGated (const XMC_SCU_PERIPHERAL_CLOCK_t peripheral)
bool | XMC_SCU_CLOCK_IsSystemPllLocked (void)
bool | XMC_SCU_CLOCK_IsUsbPllLocked (void)
void | XMC_SCU_CLOCK_SetBackupClockCalibrationMode (XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_t mode)
void | XMC_SCU_CLOCK_SetCcuClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetCpuClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetDeepSleepConfig (int32_t config)
void | XMC_SCU_CLOCK_SetEbuClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetECATClockDivider (const uint32_t divider)
void | XMC_SCU_CLOCK_SetECATClockSource (const XMC_SCU_CLOCK_ECATCLKSRC_t source)
void | XMC_SCU_CLOCK_SetExternalOutputClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetExternalOutputClockSource (const XMC_SCU_CLOCK_EXTOUTCLKSRC_t clock)
void | XMC_SCU_CLOCK_SetPeripheralClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetSleepConfig (int32_t config)
void | XMC_SCU_CLOCK_SetSystemClockDivider (const uint32_t divider)
void | XMC_SCU_CLOCK_SetSystemClockSource (const XMC_SCU_CLOCK_SYSCLKSRC_t source)
void | XMC_SCU_CLOCK_SetSystemPllClockSource (const XMC_SCU_CLOCK_SYSPLLCLKSRC_t source)
void | XMC_SCU_CLOCK_SetUsbClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetUsbClockSource (const XMC_SCU_CLOCK_USBCLKSRC_t source)
void | XMC_SCU_CLOCK_SetWdtClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetWdtClockSource (const XMC_SCU_CLOCK_WDTCLKSRC_t source)
void | XMC_SCU_CLOCK_StartSystemPll (XMC_SCU_CLOCK_SYSPLLCLKSRC_t source, XMC_SCU_CLOCK_SYSPLL_MODE_t mode, uint32_t pdiv, uint32_t ndiv, uint32_t kdiv)
void | XMC_SCU_CLOCK_StartUsbPll (uint32_t pdiv, uint32_t ndiv)
void | XMC_SCU_CLOCK_StepSystemPllFrequency (uint32_t kdiv)
void | XMC_SCU_CLOCK_StopSystemPll (void)
void | XMC_SCU_CLOCK_StopUsbPll (void)
void | XMC_SCU_CLOCK_UngatePeripheralClock (const XMC_SCU_PERIPHERAL_CLOCK_t peripheral)
void | XMC_SCU_DisableOutOfRangeComparator (const uint32_t group, const uint32_t channel)
void | XMC_SCU_DisableTemperatureSensor (void)
void | XMC_SCU_EnableOutOfRangeComparator (const uint32_t group, const uint32_t channel)
void | XMC_SCU_EnableTemperatureSensor (void)
uint32_t | XMC_SCU_GetBootMode (void)
uint32_t | XMC_SCU_GetMirrorStatus (void)
uint32_t | XMC_SCU_GetTemperatureMeasurement (void)
void | XMC_SCU_HIB_ClearEventStatus (int32_t event)
void | XMC_SCU_HIB_ClearWakeupEventDetectionStatus (void)
void | XMC_SCU_HIB_DisableEvent (int32_t event)
void | XMC_SCU_HIB_DisableHibernateDomain (void)
void | XMC_SCU_HIB_DisableInternalSlowClock (void)
void | XMC_SCU_HIB_EnableEvent (int32_t event)
void | XMC_SCU_HIB_EnableHibernateDomain (void)
void | XMC_SCU_HIB_EnableInternalSlowClock (void)
void | XMC_SCU_HIB_EnterHibernateState (void)
void | XMC_SCU_HIB_EnterHibernateStateEx (XMC_SCU_HIB_HIBERNATE_MODE_t mode)
int32_t | XMC_SCU_HIB_GetEventStatus (void)
int32_t | XMC_SCU_HIB_GetHibernateControlStatus (void)
XMC_SCU_HIB_RTCCLKSRC_t | XMC_SCU_HIB_GetRtcClockSource (void)
XMC_SCU_HIB_RTCCLKSRC_t | XMC_SCU_HIB_GetStdbyClockSource (void)
bool | XMC_SCU_HIB_IsHibernateDomainEnabled (void)
bool | XMC_SCU_HIB_IsWakeupEventDetected (void)
void | XMC_SCU_HIB_LPAC_ClearStatus (int32_t status)
int32_t | XMC_SCU_HIB_LPAC_GetStatus (void)
void | XMC_SCU_HIB_LPAC_SetHIBIO0Thresholds (uint8_t lower, uint8_t upper)
void | XMC_SCU_HIB_LPAC_SetHIBIO1Thresholds (uint8_t lower, uint8_t upper)
void | XMC_SCU_HIB_LPAC_SetInput (XMC_SCU_HIB_LPAC_INPUT_t input)
void | XMC_SCU_HIB_LPAC_SetTiming (bool enable_delay, uint16_t interval_count, uint8_t settle_count)
void | XMC_SCU_HIB_LPAC_SetTrigger (XMC_SCU_HIB_LPAC_TRIGGER_t trigger)
void | XMC_SCU_HIB_LPAC_SetVBATThresholds (uint8_t lower, uint8_t upper)
void | XMC_SCU_HIB_LPAC_TriggerCompare (XMC_SCU_HIB_LPAC_INPUT_t input)
void | XMC_SCU_HIB_SetInput0 (XMC_SCU_HIB_IO_t pin)
void | XMC_SCU_HIB_SetPinMode (XMC_SCU_HIB_IO_t pin, XMC_SCU_HIB_PIN_MODE_t mode)
void | XMC_SCU_HIB_SetPinOutputLevel (XMC_SCU_HIB_IO_t pin, XMC_SCU_HIB_IO_OUTPUT_LEVEL_t level)
void | XMC_SCU_HIB_SetRtcClockSource (const XMC_SCU_HIB_RTCCLKSRC_t source)
void | XMC_SCU_HIB_SetSR0Input (XMC_SCU_HIB_SR0_INPUT_t input)
void | XMC_SCU_HIB_SetStandbyClockSource (const XMC_SCU_HIB_STDBYCLKSRC_t source)
void | XMC_SCU_HIB_SetWakeupTriggerInput (XMC_SCU_HIB_IO_t pin)
void | XMC_SCU_HIB_TriggerEvent (int32_t event)
bool | XMC_SCU_HighTemperature (void)
void | XMC_SCU_INTERRUPT_ClearEventStatus (const XMC_SCU_INTERRUPT_EVENT_t event)
void | XMC_SCU_INTERRUPT_DisableEvent (const XMC_SCU_INTERRUPT_EVENT_t event)
void | XMC_SCU_INTERRUPT_DisableNmiRequest (const uint32_t request)
void | XMC_SCU_INTERRUPT_EnableEvent (const XMC_SCU_INTERRUPT_EVENT_t event)
void | XMC_SCU_INTERRUPT_EnableNmiRequest (const uint32_t request)
XMC_SCU_STATUS_t | XMC_SCU_INTERRUPT_SetEventHandler (const XMC_SCU_INTERRUPT_EVENT_t event, const XMC_SCU_INTERRUPT_EVENT_HANDLER_t handler)
void | XMC_SCU_INTERRUPT_TriggerEvent (const XMC_SCU_INTERRUPT_EVENT_t event)
XMC_SCU_INTERRUPT_EVENT_t | XMC_SCU_INTERUPT_GetEventStatus (void)
void | XMC_SCU_IRQHandler (uint32_t sr_num)
bool | XMC_SCU_IsTemperatureSensorBusy (void)
bool | XMC_SCU_IsTemperatureSensorEnabled (void)
bool | XMC_SCU_IsTemperatureSensorReady (void)
bool | XMC_SCU_LowTemperature (void)
void | XMC_SCU_PARITY_ClearStatus (const uint32_t memory)
void | XMC_SCU_PARITY_Disable (const uint32_t memory)
void | XMC_SCU_PARITY_DisableTrapGeneration (const uint32_t memory)
void | XMC_SCU_PARITY_Enable (const uint32_t memory)
void | XMC_SCU_PARITY_EnableTrapGeneration (const uint32_t memory)
uint32_t | XMC_SCU_PARITY_GetStatus (void)
void | XMC_SCU_POWER_DisableMonitor (void)
void | XMC_SCU_POWER_DisableUsb (void)
void | XMC_SCU_POWER_EnableMonitor (uint8_t threshold, uint8_t interval)
void | XMC_SCU_POWER_EnableUsb (void)
float | XMC_SCU_POWER_GetEVR13Voltage (void)
float | XMC_SCU_POWER_GetEVR33Voltage (void)
int32_t | XMC_SCU_POWER_GetEVRStatus (void)
void | XMC_SCU_POWER_WaitForEvent (XMC_SCU_POWER_MODE_t mode)
void | XMC_SCU_POWER_WaitForInterrupt (XMC_SCU_POWER_MODE_t mode, bool sleep_on_exit)
uint32_t | XMC_SCU_ReadFromRetentionMemory (uint32_t address)
uint32_t | XMC_SCU_ReadGPR (const uint32_t index)
void | XMC_SCU_RESET_AssertPeripheralReset (const XMC_SCU_PERIPHERAL_RESET_t peripheral)
void | XMC_SCU_RESET_ClearDeviceResetReason (void)
void | XMC_SCU_RESET_DeassertPeripheralReset (const XMC_SCU_PERIPHERAL_RESET_t peripheral)
uint32_t | XMC_SCU_RESET_GetDeviceResetReason (void)
bool | XMC_SCU_RESET_IsPeripheralResetAsserted (const XMC_SCU_PERIPHERAL_RESET_t peripheral)
void | XMC_SCU_SetBootMode (const XMC_SCU_BOOTMODE_t mode)
void | XMC_SCU_SetCcuTriggerHigh (const uint32_t trigger)
void | XMC_SCU_SetCcuTriggerLow (const uint32_t trigger)
void | XMC_SCU_SetRawTempLimits (const uint32_t lower_temp, const uint32_t upper_temp)
XMC_SCU_STATUS_t | XMC_SCU_StartTemperatureMeasurement (void)
void | XMC_SCU_TRAP_ClearStatus (const uint32_t trap)
void | XMC_SCU_TRAP_Disable (const uint32_t trap)
void | XMC_SCU_TRAP_Enable (const uint32_t trap)
uint32_t | XMC_SCU_TRAP_GetStatus (void)
void | XMC_SCU_TRAP_Trigger (const uint32_t trap)
void | XMC_SCU_WriteGPR (const uint32_t index, const uint32_t data)
void | XMC_SCU_WriteToRetentionMemory (uint32_t address, uint32_t data)

Detailed Description

System control unit is the SoC power, reset and a clock manager with additional responsibility of providing system stability protection and other auxiliary functions.
SCU provides the following features,

  1. Power control
  2. Hibernate control
  3. Reset control
  4. Clock control
  5. Miscellaneous control(boot mode, system interrupts etc.)

The SCU driver is divided in to clock control logic, reset control logic, system interrupt control logic , hibernate control logic, trap control logic, parity control logic and miscellaneous control logic.

Clock driver features:

  1. Allows clock configuration using the structure XMC_SCU_CLOCK_CONFIG_t and API XMC_SCU_CLOCK_Init()
  2. Provides structure XMC_SCU_CLOCK_SYSPLL_CONFIG_t for configuring the system PLL
  3. Allows selection of clock source for system PLL, XMC_SCU_CLOCK_GetSystemPllClockSource()
  4. Provides APIs for configuring different module clock frequencies XMC_SCU_CLOCK_SetWdtClockDivider(), XMC_SCU_CLOCK_SetUsbClockDivider()
  5. Allows selection of clock source for external output, XMC_SCU_CLOCK_SetExternalOutputClockSource()
  6. Provides APIs for enabling external high power oscillator and ultra low power oscillator, XMC_SCU_CLOCK_EnableHighPerformanceOscillator(), XMC_SCU_CLOCK_EnableLowPowerOscillator()
  7. Provides APIs for getting various clock frequencies XMC_SCU_CLOCK_GetPeripheralClockFrequency(), XMC_SCU_CLOCK_GetCpuClockFrequency(), XMC_SCU_CLOCK_GetSystemClockFrequency()

Reset driver features:

  1. Allows to handle peripheral reset XMC_SCU_RESET_AssertPeripheralReset(), XMC_SCU_RESET_DeassertPeripheralReset()
  2. Allows configuration of NMI generation for selected events, XMC_SCU_INTERRUPT_EnableNmiRequest()

Interrupt driver features:

  1. Provides APIs for enabling/ disabling interrupt event generation XMC_SCU_INTERRUPT_EnableEvent(), XMC_SCU_INTERRUPT_DisableEvent()
  2. Provides API for registering callback function for events XMC_SCU_INTERRUPT_SetEventHandler()

Hibernate driver features:

  1. Allows configuration of hibernate domain XMC_SCU_HIB_EnableHibernateDomain(), XMC_SCU_HIB_DisableHibernateDomain()
  2. Allows selection of standby clock source, XMC_SCU_HIB_SetStandbyClockSource()
  3. Allows selection of RTC clock source, XMC_SCU_HIB_SetRtcClockSource()
  4. Provides API for enabling slow internal clock used for backup clock, XMC_SCU_HIB_EnableInternalSlowClock()

Trap driver features:

  1. Allows handling of trap XMC_SCU_TRAP_Enable(), XMC_SCU_TRAP_GetStatus(), XMC_SCU_TRAP_Trigger()

Parity driver features:

  1. Parity error generated by on-chip RAM can be monitored, XMC_SCU_PARITY_Enable(), XMC_SCU_PARITY_GetStatus()
  2. Allows configuration of trap generation on detection of parity error, XMC_SCU_PARITY_EnableTrapGeneration()

Power driver features:

  1. Allows to power the USB module XMC_SCU_POWER_EnableUsb(), XMC_SCU_POWER_DisableUsb()

Miscellaneous features:

  1. Allows to trigger multiple capture compare unit(CCU) channels to be started together XMC_SCU_SetCcuTriggerHigh()
  2. Enables configuration of out of range comparator (ORC) XMC_SCU_EnableOutOfRangeComparator()
  3. Enables configuration of die temperature sensor XMC_SCU_EnableTemperatureSensor(), XMC_SCU_CalibrateTemperatureSensor()
  4. Enables configuration of device boot mode XMC_SCU_SetBootMode()

Macro Definition Documentation

#define XMC_SCU_INTERRUPT_EVENT_DLR_OVERRUN SCU_INTERRUPT_SRSTAT_DLROVR_Msk

DLR overrun event.

#define XMC_SCU_INTERRUPT_EVENT_HDCLR_UPDATED SCU_INTERRUPT_SRSTAT_HDCLR_Msk

HIB HDCLR register update event.

#define XMC_SCU_INTERRUPT_EVENT_HDCR_UPDATED SCU_INTERRUPT_SRSTAT_HDCR_Msk

HIB HDCR register update event.

#define XMC_SCU_INTERRUPT_EVENT_HDSET_UPDATED SCU_INTERRUPT_SRSTAT_HDSET_Msk

HIB HDSET register update event.

#define XMC_SCU_INTERRUPT_EVENT_OSCSICTRL_UPDATED SCU_INTERRUPT_SRSTAT_OSCSICTRL_Msk

HIB OSCSICTRL register update event.

#define XMC_SCU_INTERRUPT_EVENT_OSCULCTRL_UPDATED SCU_INTERRUPT_SRSTAT_OSCULCTRL_Msk

HIB OSCULCTRL register update event.

#define XMC_SCU_INTERRUPT_EVENT_RMX_UPDATED SCU_INTERRUPT_SRSTAT_RMX_Msk

HIB RMX register update event.

#define XMC_SCU_INTERRUPT_EVENT_RTC_ALARM SCU_INTERRUPT_SRSTAT_AI_Msk

RTC alarm event.

#define XMC_SCU_INTERRUPT_EVENT_RTC_PERIODIC SCU_INTERRUPT_SRSTAT_PI_Msk

RTC periodic interrupt.

#define XMC_SCU_INTERRUPT_EVENT_RTCATIM0_UPDATED SCU_INTERRUPT_SRSTAT_RTC_ATIM0_Msk

HIB RTCATIM0 register update event.

#define XMC_SCU_INTERRUPT_EVENT_RTCATIM1_UPDATED SCU_INTERRUPT_SRSTAT_RTC_ATIM1_Msk

HIB RTCATIM1 register update event.

#define XMC_SCU_INTERRUPT_EVENT_RTCCTR_UPDATED SCU_INTERRUPT_SRSTAT_RTC_CTR_Msk

HIB RTCCTR register update event.

#define XMC_SCU_INTERRUPT_EVENT_RTCTIM0_UPDATED SCU_INTERRUPT_SRSTAT_RTC_TIM0_Msk

HIB TIM0 register update event.

#define XMC_SCU_INTERRUPT_EVENT_RTCTIM1_UPDATED SCU_INTERRUPT_SRSTAT_RTC_TIM1_Msk

HIB TIM1 register update event.

#define XMC_SCU_INTERRUPT_EVENT_WDT_WARN SCU_INTERRUPT_SRSTAT_PRWARN_Msk

Watchdog prewarning event.

Typedef Documentation

typedef void(* XMC_SCU_INTERRUPT_EVENT_HANDLER_t) (void)

Function pointer type used for registering callback functions on SCU event occurrence.

typedef uint32_t XMC_SCU_INTERRUPT_EVENT_t

Defines enumerations for events which can lead to interrupt. These enumeration values represent the status of one of the bits in SRSTAT register. Use type XMC_SCU_INTERRUPT_EVENT_t for accessing these enum parameters.

Enumeration Type Documentation

enum XMC_SCU_BOOTMODE_t

Defines options for selecting device boot mode. These enums are used to configure SWCON bits of STCON register. User can choose among various boot modes by configuring SWCON bits. Use type XMC_SCU_BOOTMODE_t for accessing these enum parameters.

Enumerator
XMC_SCU_BOOTMODE_NORMAL | Boot from start of flash.
XMC_SCU_BOOTMODE_ASC_BSL | UART bootstrap.
XMC_SCU_BOOTMODE_BMI | Boot Mode Index - Customized boot sequence.
XMC_SCU_BOOTMODE_CAN_BSL | CAN bootstrap.
XMC_SCU_BOOTMODE_PSRAM_BOOT | Boot from PSRAM.
XMC_SCU_BOOTMODE_ABM0 | Boot from flash - fixed alternative address 0.
XMC_SCU_BOOTMODE_ABM1 | Boot from flash - fixed alternative address 1.
XMC_SCU_BOOTMODE_FABM | fallback Alternate Boot Mode (ABM) - Try ABM-0 then try ABM-1.
enum XMC_SCU_CCU_TRIGGER_t

Defines Capture/Compare unit timer slice trigger, that enables synchronous start function available on the SCU, CCUCON register. Use type XMC_SCU_CCU_TRIGGER_t for accessing these enum parameters.

Enumerator
XMC_SCU_CCU_TRIGGER_CCU40 | Trigger mask used for Global Start Control of CCU40 peripheral.
XMC_SCU_CCU_TRIGGER_CCU80 | Trigger mask used for Global Start Control of CCU80 peripheral.
enum XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_t

Defines the source of the system clock and peripherals clock gating in DEEPSLEEP state. In addition the state of FLASH, PLL and PLLVCO during DEEPSLEEP state. Use this enum as parameter of XMC_SCU_CLOCK_SetDeepSleepConfig before going to DEEPSLEEP state.

The DEEPSLEEP state of the system corresponds to the DEEPSLEEP state of the CPU. The state is entered via WFI or WFE instruction of the CPU. In this state the clock to the CPU is stopped.

In Deep Sleep state the OSC_HP and the PLL may be switched off. The wake-up logic in the NVIC is still clocked by a free-running clock. Peripherals are only clocked when configured to stay enabled. Configuration of peripherals and any SRAM content is preserved. The Flash module can be put into low-power mode to achieve a further power reduction. On wake-up Flash module will be restarted again before instructions or data access is possible. Any interrupt will bring the system back to operation via the NVIC.The clock setup before entering Deep Sleep state is restored upon wake-up.

Enumerator
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_SYSCLK_FOFI | fOFI used as system clock source in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_SYSCLK_FPLL | fPLL used as system clock source in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_FLASH_POWERDOWN | Flash power down in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_PLL_POWERDOWN | Switch off main PLL in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_VCO_POWERDOWN | Switch off VCO of main PLL in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_USB | USB clock disabled in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_USB | USB clock enabled in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_SDMMC | SDMMC clock disabled in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_SDMMC | SDMMC clock enabled in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_ETH | ETH clock disabled in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_ETH | ETH clock enabled in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_EBU | EBU clock disabled in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_EBU | EBU clock enabled in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_CCU | CCU clock disabled in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_CCU | CCU clock enabled in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_WDT | WDT clock disabled in DEEPSLEEP state
XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_WDT | WDT clock enabled in DEEPSLEEP state
enum XMC_SCU_CLOCK_ECATCLKSRC_t

Defines options for selecting the ECAT clock source.

Enumerator
XMC_SCU_CLOCK_ECATCLKSRC_USBPLL | USB PLL (fUSBPLL) as a source for ECAT clock.
XMC_SCU_CLOCK_ECATCLKSRC_SYSPLL | Main PLL output (fPLL) as a source for ECAT clock.
enum XMC_SCU_CLOCK_EXTOUTCLKSRC_t

Defines options for selecting the source of external clock out (fEXT). These enums are used to configure ECKSEL bits of EXTCLKCR register. User can choose either fSYS or fPLL or fUSBPLL clock as a source for external clock out (fEXT). Use type XMC_SCU_CLOCK_EXTOUTCLKSRC_t for accessing these enum parameters.

Enumerator
XMC_SCU_CLOCK_EXTOUTCLKSRC_SYS | System clock (fSYS) as the source for external clock out (fEXT).
XMC_SCU_CLOCK_EXTOUTCLKSRC_USB | USB PLL output(fUSB PLL) as the source for external clock out (fEXT).
XMC_SCU_CLOCK_EXTOUTCLKSRC_PLL | Main PLL output(fPLL) as the source for external clock out (fEXT).
enum XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_t

Defines options for backup clock trimming. These enums are used to configure AOTREN FOTR bits of PLLCON0 register. Use type XMC_SCU_CLOCK_BACKUP_TRIM_t for accessing these enum parameters.

Enumerator
XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_FACTORY | Factory Oscillator Calibration: Force adjustment of the internal oscillator with the firmware defined values.
XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_AUTOMATIC | Automatic Oscillator Calibration adjustment of the fOFI clock with fSTDBY clock.
enum XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_t

Defines the source of the system clock and peripherals clock gating in SLEEP state. Use this enum as parameter of XMC_SCU_CLOCK_SetSleepConfig before going to SLEEP state.

The SLEEP state of the system corresponds to the SLEEP state of the CPU. The state is entered via WFI or WFE instruction of the CPU. In this state the clock to the CPU is stopped. Peripherals are only clocked when configured to stay enabled.

Peripherals can continue to operate unaffected and eventually generate an event to wake-up the CPU. Any interrupt to the NVIC will bring the CPU back to operation. The clock tree upon exit from SLEEP state is restored to what it was before entry into SLEEP state.

Enumerator
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_SYSCLK_FOFI | fOFI used as system clock source in SLEEP state
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_SYSCLK_FPLL | fPLL used as system clock source in SLEEP state
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLE_USB | USB clock disabled in SLEEP state
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_USB | USB clock enabled in SLEEP state
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLE_SDMMC | SDMMC clock disabled in SLEEP state
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_SDMMC | SDMMC clock enabled in SLEEP state
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLE_ETH | ETH clock disabled in SLEEP state
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_ETH | ETH clock enabled in SLEEP state
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLE_EBU | EBU clock disabled in SLEEP state
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_EBU | EBU clock enabled in SLEEP state
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLED_CCU | CCU clock disabled in SLEEP state
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_CCU | CCU clock enabled in SLEEP state
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLED_WDT | WDT clock disabled in SLEEP state
XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_WDT | WDT clock enabled in SLEEP state
enum XMC_SCU_CLOCK_SYSCLKSRC_t

Defines options for system clock (fSYS) source. These enums are used to configure SYSSEL bits of SYSCLKCR Clock Control Register. Use type XMC_SCU_CLOCK_SYSCLKSRC_t for accessing these enum parameters.

Enumerator
XMC_SCU_CLOCK_SYSCLKSRC_OFI | Internal Fast Clock (fOFI) as a source for system clock (fSYS).
XMC_SCU_CLOCK_SYSCLKSRC_PLL | PLL output (fPLL) as a source for system clock (fSYS).
enum XMC_SCU_CLOCK_SYSPLL_MODE_t

Defines various PLL modes of operation. These enums are used to configure VCOBYP bit of PLLCON0 register. User can choose either normal or prescalar mode by configuring VCOBYP bit. Use type XMC_SCU_PLL_MODE_t for accessing these enum parameters.

Enumerator
XMC_SCU_CLOCK_SYSPLL_MODE_DISABLED | fPLL derived from fOSC and PLL operating in prescalar mode(i.e.VCO bypassed).
XMC_SCU_CLOCK_SYSPLL_MODE_NORMAL | fPLL derived from fVCO and PLL operating in normal mode.
XMC_SCU_CLOCK_SYSPLL_MODE_PRESCALAR | fPLL derived from fOSC and PLL operating in prescalar mode(i.e.VCO bypassed).
enum XMC_SCU_CLOCK_SYSPLLCLKSRC_t

Defines options for selecting the P-Divider input frequency. These enums are used to configure PINSEL bits of PLLCON2 register. Use type XMC_SCU_CLOCK_OSCCLKSRC_t for accessing these enum parameters.

Enumerator
XMC_SCU_CLOCK_SYSPLLCLKSRC_OSCHP | External crystal oscillator (fOHP) as the source for P-Divider.
XMC_SCU_CLOCK_SYSPLLCLKSRC_OFI | Backup clock(fOFI) as the source for P-Divider.
enum XMC_SCU_CLOCK_t

Defines enumerations for disabling the clocks sources of peripherals. Disabling of the peripheral clock is configured via the CLKCLR registers. Use type XMC_SCU_PERIPHERAL_CLOCK_t for accessing these enum parameters.

Enumerator
XMC_SCU_CLOCK_USB | USB module clock.
XMC_SCU_CLOCK_MMC | MMC module clock.
XMC_SCU_CLOCK_ETH | Ethernet module clock.
XMC_SCU_CLOCK_EBU | EBU module clock.
XMC_SCU_CLOCK_CCU | CCU module clock.
XMC_SCU_CLOCK_WDT | WDT module clock.
enum XMC_SCU_CLOCK_USBCLKSRC_t

Defines options for selecting the USB clock source(fUSB/fSDMMC). These enums are used to configure USBSEL bits of USBCLKCR register. User can choose either fPLL or fUSBPLL clock as a source for USB clock. Use type XMC_SCU_CLOCK_USBCLKSRC_t for accessing these enum parameters.

Enumerator
XMC_SCU_CLOCK_USBCLKSRC_USBPLL | USB PLL(fUSB PLL) as a source for USB clock (fUSB/fSDMMC).
XMC_SCU_CLOCK_USBCLKSRC_SYSPLL | Main PLL output (fPLL) as a source for USB clock (fUSB/fSDMMC).
enum XMC_SCU_CLOCK_WDTCLKSRC_t

Defines options for selecting the source of WDT clock(fWDT). These enums are used to configure WDTSEL bits of WDTCLKCR register. User can choose either fOFI or fPLL or fSTDBY clock as a source for WDT clock. Use type XMC_SCU_CLOCK_USBCLKSRC_t for accessing these enum parameters.

Enumerator
XMC_SCU_CLOCK_WDTCLKSRC_OFI | Internal Fast Clock (fOFI) as the source for WDT clock (fWDT).
XMC_SCU_CLOCK_WDTCLKSRC_STDBY | Standby clock (fSTDBY) as the source for WDT clock (fWDT).
XMC_SCU_CLOCK_WDTCLKSRC_PLL | PLL output (fPLL) as the source for WDT clock (fWDT).
enum XMC_SCU_HIB_CTRL_STATUS_t

Define status of external hibernate control

Enumerator
XMC_SCU_HIB_CTRL_STATUS_NO_ACTIVE | Hibernate not driven active to pads
XMC_SCU_HIB_CTRL_STATUS_ACTIVE | Hibernate driven active to pads
enum XMC_SCU_HIB_EVENT_t

Hibernate domain event status

Enumerator
XMC_SCU_HIB_EVENT_WAKEUP_ON_POS_EDGE

Wake-up on positive edge pin event

XMC_SCU_HIB_EVENT_WAKEUP_ON_NEG_EDGE

Wake-up on negative edge pin event

XMC_SCU_HIB_EVENT_WAKEUP_ON_RTC

Wake-up on RTC event

XMC_SCU_HIB_EVENT_ULPWDG

ULP watchdog alarm status

XMC_SCU_HIB_EVENT_LPAC_VBAT_POSEDGE

Wake-up on LPAC positive edge of VBAT threshold crossing.

Note
Only available in XMC44, XMC42 and XMC41 series
XMC_SCU_HIB_EVENT_LPAC_VBAT_NEGEDGE

Wake-up on LPAC negative edge of VBAT threshold crossing.

Note
Only available in XMC44, XMC42 and XMC41 series
XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_POSEDGE

Wake-up on LPAC positive edge of HIB_IO_0 threshold crossing.

Note
Only available in XMC44, XMC42 and XMC41 series
XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_NEGEDGE

Wake-up on LPAC negative edge of HIB_IO_0 threshold crossing.

Note
Only available in XMC44, XMC42 and XMC41 series
XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_POSEDGE

Wake-up on LPAC positive edge of HIB_IO_1 threshold crossing.

Note
Only available in XMC44 series and LQFP100.
XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_NEGEDGE

Wake-up on LPAC negative edge of HIB_IO_1 threshold crossing.

Note
Only available in XMC44 series and LQFP100.
enum XMC_SCU_HIB_HIBERNATE_MODE_t

Selects hibernate mode

Enumerator
XMC_SCU_HIB_HIBERNATE_MODE_EXTERNAL

Request external hibernate mode

XMC_SCU_HIB_HIBERNATE_MODE_INTERNAL

Request internal hibernate mode.

Note
Only available in XMC44, XMC42 and XMC41 series
enum XMC_SCU_HIB_IO_OUTPUT_LEVEL_t

Selects the output polarity of the HIB_IOx

Enumerator
XMC_SCU_HIB_IO_OUTPUT_LEVEL_LOW | Direct value
XMC_SCU_HIB_IO_OUTPUT_LEVEL_HIGH | Inverted value
enum XMC_SCU_HIB_IO_t

Hibernate domain dedicated pins

Enumerator
XMC_SCU_HIB_IO_0

HIB_IO_0 pin. At the first power-up and with every reset of the hibernate domain this pin is configured as opendrain output and drives "0". As output the medium driver mode is active.

XMC_SCU_HIB_IO_1

HIB_IO_1 pin. At the first power-up and with every reset of the hibernate domain this pin is configured as input with no pull device active. As output the medium driver mode is active.

Note
: Only available in certain packages
enum XMC_SCU_HIB_LPAC_INPUT_t

HIB LPAC input selection

Enumerator
XMC_SCU_HIB_LPAC_INPUT_DISABLED

Comparator permanently in power down

XMC_SCU_HIB_LPAC_INPUT_VBAT

Comparator activated for VBAT input

XMC_SCU_HIB_LPAC_INPUT_HIB_IO_0

Comparator activated for HIB_IO_0 input

XMC_SCU_HIB_LPAC_INPUT_HIB_IO_1

Comparator activated for HIB_IO_1 input.

Note
Only available in XMC44 series and LQFP100 package.
enum XMC_SCU_HIB_LPAC_STATUS_t

HIB LPAC status

Enumerator
XMC_SCU_HIB_LPAC_STATUS_VBAT_COMPARE_DONE

VBAT compare operation completed

XMC_SCU_HIB_LPAC_STATUS_HIB_IO_0_COMPARE_DONE

HBI_IO_0 compare operation completed

XMC_SCU_HIB_LPAC_STATUS_HIB_IO_1_COMPARE_DONE

HBI_IO_1 compare operation completed.

Note
Only available in XMC44 series and LQFP100 package.
XMC_SCU_HIB_LPAC_STATUS_VBAT_ABOVE_THRESHOLD

VBAT comparison result above programmed threshold

XMC_SCU_HIB_LPAC_STATUS_HIB_IO_0_ABOVE_THRESHOLD

HBI_IO_0 comparison result above programmed threshold

XMC_SCU_HIB_LPAC_STATUS_HIB_IO_1_ABOVE_THRESHOLD

HBI_IO_1 comparison result above programmed threshold.

Note
Only available in XMC44 series and LQFP100 package.
enum XMC_SCU_HIB_LPAC_TRIGGER_t

HIB LPAC start trigger selection for selected inputs

Enumerator
XMC_SCU_HIB_LPAC_TRIGGER_SUBSECOND_INTERVAL_COUNTER | Sub-second interval counter
XMC_SCU_HIB_LPAC_TRIGGER_RTC_ALARM_EVENT | RTC alarm event
XMC_SCU_HIB_LPAC_TRIGGER_RTC_PERIODIC_EVENT | RTC periodic event
XMC_SCU_HIB_LPAC_TRIGGER_ON_WAKEUP_POSITIVE_EDGE_EVENT | On digital wakeup input positive edge event
XMC_SCU_HIB_LPAC_TRIGGER_ON_WAKEUP_NEGATIVE_EDGE_EVENT | On digital wakeup input negative edge event
XMC_SCU_HIB_LPAC_TRIGGER_CONTINOUS | Continuous measurement
XMC_SCU_HIB_LPAC_TRIGGER_SINGLE_SHOT | Single shot on software request
enum XMC_SCU_HIB_PIN_MODE_t

HIB_IOx pin I/O control

Enumerator
XMC_SCU_HIB_PIN_MODE_INPUT_PULL_NONE | Direct input, no input pull device connected
XMC_SCU_HIB_PIN_MODE_INPUT_PULL_DOWN | Direct input, input pull down device connected
XMC_SCU_HIB_PIN_MODE_INPUT_PULL_UP | Direct input, input pull up device connected
XMC_SCU_HIB_PIN_MODE_OUTPUT_PUSH_PULL_HIBCTRL | Push-pull HIB control output
XMC_SCU_HIB_PIN_MODE_OUTPUT_PUSH_PULL_WDTSRV | Push-pull WDT service output
XMC_SCU_HIB_PIN_MODE_OUTPUT_PUSH_PULL_GPIO | Push-pull GPIO output
XMC_SCU_HIB_PIN_MODE_OUTPUT_OPEN_DRAIN_HIBCTRL | Open drain HIB control output
XMC_SCU_HIB_PIN_MODE_OUTPUT_OPEN_DRAIN_WDTSRV | Open drain WDT service output
XMC_SCU_HIB_PIN_MODE_OUTPUT_OPEN_DRAIN_GPIO | Open drain GPIO output
enum XMC_SCU_HIB_RTCCLKSRC_t

Defines options for selecting the source of RTC Clock (fRTC). These enums are used to configure RCS bit of HDCR register. User can choose either fOSI or fULP clock as a source for RTC Clock (fRTC). Use type XMC_SCU_HIB_RTCCLKSRC_t for accessing these enum parameters.

Enumerator
XMC_SCU_HIB_RTCCLKSRC_OSI | Internal Slow Clock (fOSI) as the source for RTC Clock (fRTC).
XMC_SCU_HIB_RTCCLKSRC_ULP | Ultra Low Power Clock (fULP) as the source for RTC Clock (fRTC).
enum XMC_SCU_HIB_SR0_INPUT_t

Selects input signal HIB_SR0 of ERU0

Enumerator
XMC_SCU_HIB_SR0_INPUT_HIB_IO_0

Set HIB_SR0 to HIB_IO_0 digital input

XMC_SCU_HIB_SR0_INPUT_HIB_IO_1

Set HIB_SR0 to HIB_IO_1 digital input.

Note
Only available in certain packages.
XMC_SCU_HIB_SR0_INPUT_ACMP0

Set HIB_SR0 to LPAC CMP0.

Note
Only available in XMC44, XMC42 and XMC41 series.
enum XMC_SCU_HIB_STDBYCLKSRC_t

Defines options for selecting the source of Standby Clock (fSTDBY). These enums are used to configure STDBYSEL bit of HDCR register. User can choose either fOSI or fULP clock as a source for Standby Clock (fSTDBY). Use type XMC_SCU_HIB_STDBYCLKSRC_t for accessing these enum parameters.

Enumerator
XMC_SCU_HIB_STDBYCLKSRC_OSI | Internal Slow Clock (fOSI) as the source for Standby Clock (fSTDBY).
XMC_SCU_HIB_STDBYCLKSRC_OSCULP | Ultra Low Power Clock (fULP) as the source for Standby Clock (fSTDBY).
enum XMC_SCU_NMIREQ_t

Defines enumeration for the events that can generate non maskable interrupt(NMI). The NMI generation can be enabled with NMIREQEN register. The event will be reflected in SRSTAT or will be mirrored in the TRAPSTAT register. These enums can be used to configure NMI request generation bits of NMIREQEN register. Once configured, these events can generate non maskable interrupt. All the enum items are tabulated as per bits present in NMIREQEN register. Use type XMC_SCU_NMIREQ_t for accessing these enum parameters.

Enumerator
XMC_SCU_NMIREQ_WDT_WARN | Watchdog timer Pre-Warning event
XMC_SCU_NMIREQ_RTC_PI | RTC Periodic event
XMC_SCU_NMIREQ_RTC_AI | RTC Alarm event
XMC_SCU_NMIREQ_ERU0_0 | Channel 0 event of ERU0
XMC_SCU_NMIREQ_ERU0_1 | Channel 1 event of ERU0
XMC_SCU_NMIREQ_ERU0_2 | Channel 2 event of ERU0
XMC_SCU_NMIREQ_ERU0_3 | Channel 3 event of ERU0
enum XMC_SCU_PARITY_t

Defines enumerations for different parity event generating modules that in turn generate a trap. Parity can be enabled with PETE register in order to get the trap flag reflected in TRAPRAW register. These enums are used to configure parity error trap generation mechanism bits of PETE register. All the enum items are tabulated as per bits present in PETE register. Use type XMC_SCU_PARITY_t for accessing these enum parameters.

Enumerator
XMC_SCU_PARITY_PSRAM_MEM | Program SRAM parity error trap.
XMC_SCU_PARITY_DSRAM1_MEM | Data SRAM-1 parity error trap.
XMC_SCU_PARITY_USIC0_MEM | USIC0 memory parity error trap.
XMC_SCU_PARITY_MCAN_MEM | CAN memory parity error trap.
XMC_SCU_PARITY_PMU_MEM | PMU Prefetch memory parity error trap.
XMC_SCU_PARITY_USB_MEM | USB memory parity error trap.
enum XMC_SCU_PERIPHERAL_CLOCK_t

Defines enumeration for peripherals that support clock gating. The enumerations can be used for gating or ungating the peripheral clocks. All the enum items are tabulated as per bits present in CGATSTAT0 register. Use type XMC_SCU_PERIPHERAL_CLOCK_t for accessing these enum parameters.

Enumerator
XMC_SCU_PERIPHERAL_CLOCK_VADC | VADC peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_DSD | DSD peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_CCU40 | CCU40 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_CCU80 | CCU80 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_POSIF0 | POSIF0 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_USIC0 | USIC0 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_ERU1 | ERU1 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_HRPWM0 | HRPWM0 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_LEDTS0 | LEDTS0 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_MCAN | MCAN peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_DAC | DAC peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_SDMMC | SDMMC peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_USIC1 | USIC1 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_USIC2 | USIC2 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_PORTS | PORTS peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_WDT | WDT peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_ETH0 | ETH0 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_GPDMA0 | DMA0 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_GPDMA1 | DMA1 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_FCE | FCE peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_USB0 | USB0 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_ECAT0 | ECAT0 peripheral gating.
XMC_SCU_PERIPHERAL_CLOCK_EBU | EBU peripheral gating.
enum XMC_SCU_PERIPHERAL_RESET_t

Defines enumeration representing different peripheral reset bits in the PRSTAT registers. All the enum items are tabulated as per bits present in PRSTAT0, PRSTAT1, PRSTAT2, PRSTAT3 registers. Use type XMC_SCU_PERIPHERAL_RESET_t for accessing these enum parameters. Note: Release of reset should be prevented when the peripheral clock is gated in cases where kernel clock and bus interface clocks are shared, in order to avoid system hang-up.

Enumerator
XMC_SCU_PERIPHERAL_RESET_VADC | VADC reset.
XMC_SCU_PERIPHERAL_RESET_DSD | DSD reset.
XMC_SCU_PERIPHERAL_RESET_CCU40 | CCU40 reset.
XMC_SCU_PERIPHERAL_RESET_CCU80 | CCU80 reset.
XMC_SCU_PERIPHERAL_RESET_POSIF0 | POSIF0 reset.
XMC_SCU_PERIPHERAL_RESET_USIC0 | USIC0 reset.
XMC_SCU_PERIPHERAL_RESET_ERU1 | ERU1 reset.
XMC_SCU_PERIPHERAL_RESET_HRPWM0 | HRPWM0 reset.
XMC_SCU_PERIPHERAL_RESET_LEDTS0 | LEDTS0 reset.
XMC_SCU_PERIPHERAL_RESET_MCAN | MCAN reset.
XMC_SCU_PERIPHERAL_RESET_DAC | DAC reset.
XMC_SCU_PERIPHERAL_RESET_SDMMC | SDMMC reset.
XMC_SCU_PERIPHERAL_RESET_USIC1 | USIC1 reset.
XMC_SCU_PERIPHERAL_RESET_USIC2 | USIC2 reset.
XMC_SCU_PERIPHERAL_RESET_PORTS | PORTS reset.
XMC_SCU_PERIPHERAL_RESET_WDT | WDT reset.
XMC_SCU_PERIPHERAL_RESET_ETH0 | ETH0 reset.
XMC_SCU_PERIPHERAL_RESET_GPDMA0 | DMA0 reset.
XMC_SCU_PERIPHERAL_RESET_GPDMA1 | DMA1 reset.
XMC_SCU_PERIPHERAL_RESET_FCE | FCE reset.
XMC_SCU_PERIPHERAL_RESET_USB0 | USB0 reset.
XMC_SCU_PERIPHERAL_RESET_ECAT0 | ECAT0 reset.
XMC_SCU_PERIPHERAL_RESET_EBU | EBU reset.
enum XMC_SCU_POWER_EVR_STATUS_t

Defines status of EVR13 regulator

Enumerator
XMC_SCU_POWER_EVR_STATUS_OK | EVR13 regulator No overvoltage condition
XMC_SCU_POWER_EVR_STATUS_EVR13_OVERVOLTAGE | EVR13 regulator is in overvoltage
enum XMC_SCU_POWER_MODE_t

Low power modes

Enumerator
XMC_SCU_POWER_MODE_SLEEP | sleep mode stops the processor clock
XMC_SCU_POWER_MODE_DEEPSLEEP | deep sleep mode stops the system clock and switches off the PLL and flash memory.
enum XMC_SCU_RESET_REASON_t

Defines the different causes for last reset. The cause of the last reset gets automatically stored in the SCU_RSTSTAT register and can be checked by user software to determine the state of the system and for debuggging purpose. All the enum items are tabulated as per bits present in SCU_RSTSTAT register. Use type XMC_SCU_RESET_REASON_t for accessing these enum parameters.

Enumerator
XMC_SCU_RESET_REASON_PORST | Reset due to Power on reset.
XMC_SCU_RESET_REASON_SWD | Reset due to Supply Watchdog reset.
XMC_SCU_RESET_REASON_PV | Reset due to Power Validation reset.
XMC_SCU_RESET_REASON_SW | Reset due to Software reset.
XMC_SCU_RESET_REASON_LOCKUP | Reset due to reset due to CPU lockup.
XMC_SCU_RESET_REASON_WATCHDOG | Reset due to Watchdog timer initiated reset.
XMC_SCU_RESET_REASON_PARITY_ERROR | Reset due to reset due to memory parity error.
enum XMC_SCU_STATUS_t

Defines the status of SCU API execution, used to verify the SCU related API calls.

Enumerator
XMC_SCU_STATUS_OK | SCU related operation successfully completed.
XMC_SCU_STATUS_ERROR | SCU related operation failed. When API cannot fulfill request, this value is returned.
XMC_SCU_STATUS_BUSY | Cannot execute the SCU related operation request because another operation is in progress. XMC_SCU_STATUS_BUSY is returned when API is busy processing another request.
enum XMC_SCU_TRAP_t

Defines enumerations representing the status of trap cause. The cause of the trap gets automatically stored in the TRAPSTAT register and can be checked by user software to determine the state of the system and for debug purpose. Use type XMC_SCU_TRAP_t for accessing these enum parameters.

Enumerator
XMC_SCU_TRAP_OSC_WDG | OSC_HP Oscillator Watchdog trap.
XMC_SCU_TRAP_VCO_LOCK | PLL loss of lock trap.
XMC_SCU_TRAP_USB_VCO_LOCK | USB PLL loss of lock trap.
XMC_SCU_TRAP_PARITY_ERROR | Memory Parity error trap.
XMC_SCU_TRAP_BROWNOUT | Brownout trap.
XMC_SCU_TRAP_ULP_WDG | Unstable 32KHz clock trap.
XMC_SCU_TRAP_PER_BRIDGE0 | Bad memory access of peripherals on Bridge-0.
XMC_SCU_TRAP_PER_BRIDGE1 | Bad memory access of peripherals on Bridge-1.
XMC_SCU_TRAP_ECAT_RESET | EtherCat Reset

Function Documentation

void XMC_SCU_CalibrateTemperatureSensor | ( | uint32_t | offset,
 |  | uint32_t | gain
 | ) |  |
Parameters
offset Offset value for calibrating the DTS result.
Range: 0 to 127.
gain Gain value for calibrating the DTS conversion result.
Range: 0 to 63.
Returns
None
Description
Calibrates the measurement of temperature by configuring the values of offset and gain of DTSCON register.

Allows to improve the accuracy of the temperature measurement with the adjustment of OFFSET and GAIN bit fields in the DTSCON register. Offset adjustment is defined as a shift of the conversion result. The range of the offset adjustment is 7 bits with a resolution that corresponds to +/- 12.5�C. The offset value gets added to the measure result. Offset is considered as a signed value. Gain adjustment helps in minimizing gain error. When the gain value is 0, result is generated with maximum gain. When the gain value is 63, result is generated with least gain, i.e, RESULT - 63 at the highest measured temperature.
It is recommended to use following steps:
  • Call XMC_SCU_StopTempMeasurement to stop temperature measurement if it was started previously.
  • Call XMC_SCU_CalibrateTempMonitor with desired offset and gain calibration values to the DTS.
  • Call XMC_SCU_SetRawTempLimits with desired lower and upper temperature threshold limit values if it is needed.
  • Call XMC_SCU_StartTempMeasurement to start temperature measurement.
  • Check whether Die Temperature Sensor (DTS) is busy in conversion by calling XMC_SCU_IsTemperatureSensorBusy() and wait till conversion complete.
  • Read the die temperature value using XMC_SCU_GetTemperatureMeasurement API.
Related APIs:
XMC_SCU_EnableTemperatureSensor(), XMC_SCU_StartTemperatureMeasurement(), XMC_SCU_GetTemperatureMeasurement()

void XMC_SCU_CLOCK_DisableClock ( const XMC_SCU_CLOCK_t clock )
Parameters
clock Peripheral for which the clock has to be disabled.
Range: Use type XMC_SCU_CLOCK_t to select the peripheral.
Returns
None
Description
Disables source clock for the peripheral selected.

The various outputs of Clock Generation Unit (CGU) can be individually disabled by setting the peripheral specific bits in the CLKCLR register.
It is recommended to use following steps to verify whether clock source of the peripheral is enabled/disabled:
  • Call XMC_SCU_CLOCK_DisableClock with desired peripheral identifier.
  • Call XMC_SCU_CLOCK_IsClockEnabled with same peripheral identifier to verify whether peripheral is enabled/disabled.
Related APIs:
XMC_SCU_CLOCK_EnableClock(), XMC_SCU_RESET_AssertPeripheralReset()

void XMC_SCU_CLOCK_DisableHighPerformanceOscillator ( void )
Returns
None
Description
Disables the high precision oscillator by disabling the external oscillator.

The API configures MODE bits of OSCHPCTRL register to 1, there by disabling the external oscillator.
Related APIs:
XMC_SCU_CLOCK_EnableHighPerformanceOscillator()

void XMC_SCU_CLOCK_DisableHighPerformanceOscillatorGeneralPurposeInput ( void )
Returns
None
Description
Disables XTAL1 input of OSC_ULP as general purpose input.
Related APIs:
XMC_SCU_CLOCK_EnableHighPerformanceOscillatorGeneralPurposeInput()

void XMC_SCU_CLOCK_DisableLowPowerOscillator ( void )
Returns
None
Description
Disables ultra low power oscillator.

It is disabled by setting the MODE bits of OSCULCTRL register to value 2. By default on power up, the ultra low power osciallator is disabled.
Related APIs:
XMC_SCU_CLOCK_EnableLowPowerOscillator()

void XMC_SCU_CLOCK_DisableLowPowerOscillatorGeneralPurposeInput ( void )
Returns
None
Description
Disables XTAL1 input of OSC_ULP as general purpose input.
Related APIs:
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()

XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput()

void XMC_SCU_CLOCK_DisableSystemPll ( void )
Returns
None
Description
Disables main PLL for system clock.

System PLL is disabled by setting the PLLPWD and VCOPWD bits of PLLCON0 register. By default the system PLL is in power saving mode. If the system PLL is explicitly enabled, the API disables the PLL and the voltage controlled oscillator(VCO) associated with it.
Related APIs:
XMC_SCU_CLOCK_EnableSystemPll(), XMC_SCU_CLOCK_StopSystemPll()

void XMC_SCU_CLOCK_DisableUsbPll ( void )
Returns
None
Description
Disables USB PLL for USB clock.

USB PLL is disabled by setting the PLLPWD and VCOPWD bits of USBPLLCON register. By default the USB PLL is in power saving mode. If the USB PLL is explicitly enabled, the API disables the PLL and the voltage controlled oscillator(VCO) associated with it.
Related APIs:
XMC_SCU_CLOCK_EnableUsbPll(), XMC_SCU_CLOCK_StopUsbPll()

void XMC_SCU_CLOCK_EnableClock ( const XMC_SCU_CLOCK_t clock )
Parameters
clock Peripheral for which the clock has to be enabled.
Range: Use type XMC_SCU_CLOCK_t to select the peripheral.
Returns
None
Description
Enables the source clock for selected peripheral.

The various outputs of Clock Generation Unit (CGU) can be individually enabled by setting the peripheral specific bit in the CLKSET register.
It is recommended to use following steps to verify whether a source clock of peripheral is enabled/disabled:
  • Call XMC_SCU_CLOCK_EnableClock() with desired peripheral identifier.
  • Call XMC_SCU_CLOCK_IsClockEnabled() with same peripheral identifier to verify whether the clock is enabled.
Related APIs:
XMC_SCU_CLOCK_DisableClock(), XMC_SCU_RESET_DeassertPeripheralReset()

void XMC_SCU_CLOCK_EnableHighPerformanceOscillator ( void )
Returns
None
Description
Enables the high precision oscillator by configuring external crystal mode.

The API configures MODE bits of OSCHPCTRL register to 0, there by configuring the external clock input. The System Oscillator Watchdog is enabled. The user should check the status of the oscillator using XMC_SCU_CLOCK_IsHighPerformanceOscillatorStable()
Related APIs:
XMC_SCU_CLOCK_DisableHighPerformanceOscillator()

void XMC_SCU_CLOCK_EnableHighPerformanceOscillatorGeneralPurposeInput ( void )
Returns
None
Description
Enables XTAL1 input of OSC_ULP as general purpose input. Use XMC_SCU_CLOCK_GetHighPerformanceOscillatorGeneralPurposeInputStatus to monitor the status of OSC_HP XTAL1 pin. OSC_ULP should be disabled previously using XMC_SCU_CLOCK_DisableHighPerformanceOscillator().
Related APIs:
XMC_SCU_CLOCK_DisableHighPerformanceOscillator()

void XMC_SCU_CLOCK_EnableLowPowerOscillator ( void )
Returns
None
Description
Enables ultra low power oscillator(ULP).

It enables the hibernate domain, configures the ultra low power oscillator uisng the MODE bits of the OSCULCTRL register. The Mode bits will be reset to 0 to enable the low power oscillator. Mirror register update delays are handled internally. The OSC_ULP Oscillator Watchdog is enabled. The user should check the status of the oscillator using XMC_SCU_CLOCK_IsLowPowerOscillatorStable()
Related APIs:
XMC_SCU_CLOCK_DisableLowPowerOscillator() XMC_SCU_CLOCK_IsLowPowerOscillatorStable()

void XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput ( void )
Returns
None
Description
Enables XTAL1 input of OSC_ULP as general purpose input. Use XMC_SCU_CLOCK_GetLowPowerOscillatorGeneralPurposeInputStatus to monitor the status of OSC_ULP XTAL1 pin. OSC_ULP should be disabled previously using XMC_SCU_CLOCK_DisableLowPowerOscillator().
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_CLOCK_DisableLowPowerOscillator()

void XMC_SCU_CLOCK_EnableSystemPll ( void )
Returns
None
Description
Enables main PLL for system clock.

System PLL is enabled by clearing the PLLPWD and VCOPWD bits of PLLCON0 register. By default the system PLL is in power saving mode. The API enables the PLL and the voltage controlled oscillator associated with it.
Related APIs:
XMC_SCU_CLOCK_DisableSystemPll(), XMC_SCU_CLOCK_StartSystemPll()

void XMC_SCU_CLOCK_EnableUsbPll ( void )
Returns
None
Description
Enables USB PLL for USB clock.

USB PLL is enabled by clearing the PLLPWD and VCOPWD bits of USBPLLCON register. By default the USB PLL is in power saving mode. The API enables the PLL and the voltage controlled oscillator associated with it.
Related APIs:
XMC_SCU_CLOCK_DisableUsbPll(), XMC_SCU_CLOCK_StartUsbPll()

void XMC_SCU_CLOCK_GatePeripheralClock ( const XMC_SCU_PERIPHERAL_CLOCK_t peripheral )
Parameters
peripheral The peripheral for which the clock has to be gated. Range: Use type XMC_SCU_PERIPHERAL_CLOCK_t to identify the peripheral clock to be gated.
Returns
None
Description
Blocks the supply of clock to the selected peripheral.

Clock gating helps in reducing the power consumption. User can selectively gate the clocks of unused peripherals. fPERI is the source of clock to various peripherals. Some peripherals support clock gate. Such a gate blocks the clock supply for the selected peripheral. Software can request for individual gating of such peripheral clocks by enabling one of the SCU_CGATSET0, SCU_CGATSET1 or SCU_CGATSET2 register bitfields.

Note: Clock gating shall not be activated unless the module is in reset state. So use XMC_SCU_CLOCK_IsPeripheralClockGated() API before enabling the gating of any peripheral.

Related APIs:
XMC_SCU_CLOCK_IsPeripheralClockGated(), XMC_SCU_CLOCK_UngatePeripheralClock()

uint32_t XMC_SCU_CLOCK_GetCcuClockDivider ( void )
Returns
uint32_t Ratio of fCCU clock source to the value of fCCU. Range: 0 or 1.
0-> fCCU= fSYS
1-> fCCU= fSYS/2.
Description
Provides the ratio of CCU clock(fCCU) to system clock(fSYS).

The value is obtained by reading CCUDIV bit of CCUCLKCR register.
Related APIs:
XMC_SCU_CLOCK_SetCcuClockDivider()

uint32_t XMC_SCU_CLOCK_GetCcuClockFrequency ( void )
Returns
uint32_t CCU clock frequency in Hertz.
Description
Provides the frequency of clock(fCPU) used for CCU4, CCU8, POSIF and HRPWM.

The value is obtained from CCUDIV bits of CCUCLKCR register and system clock (fSYS) frequency. Based on these values, fCCU clock frequency is calculated using following formula:
fCCU = fSYS >> CCUDIV.
Related APIs:
XMC_SCU_CLOCK_GetCcuClockDivider(), XMC_SCU_CLOCK_GetSystemClockFrequency()

uint32_t XMC_SCU_CLOCK_GetCpuClockDivider ( void )
Returns
uint32_t Ratio between system clock(fSYS) and CPU clock(fCPU). Range: 0 or 1.
0-> fCPU= fSYS.
1-> fCPU= fSYS/2.
Description
Provides the ratio between system clock(fSYS) and CPU clock(fCPU).

The value is obtained by reading CPUDIV bit of CPUCLKCR register.
Related APIs:
XMC_SCU_CLOCK_SetCpuClockDivider()

uint32_t XMC_SCU_CLOCK_GetCpuClockFrequency ( void )
Returns
uint32_t Value of CPU clock frequency.
Description
Provides the vlaue of CPU clock frequency.

The value is stored in a global variable SystemCoreClock. It is updated when the clock configuration is done using the SCU LLD APIs. The value represents the frequency of clock used for CPU operation. Range: Value is of type uint32_t, and gives the value of frequency in Hertz.
Related APIs:
XMC_SCU_CLOCK_GetPeripheralClockFrequency(), XMC_SCU_CLOCK_GatePeripheralClock()

uint32_t XMC_SCU_CLOCK_GetEbuClockDivider ( void )
Returns
uint32_t Ratio of PLL clock(fPLL) to EBU clock(fEBU).
Range: 0 to 63.
Description
Provides the ratio between PLL clock(fPLL) and EBU clock(fEBU).

The value is obtained by reading EBUDIV bits of EBUCLKCR register.
Related APIs:
XMC_SCU_CLOCK_SetEbuClockDivider()

uint32_t XMC_SCU_CLOCK_GetEbuClockFrequency ( void )
Returns
uint32_t EBU clock frequency in Hertz.
Description
Provides the frequency of EBU clock(fEBU).

The value is derived from system PLL clock frequency(fPLL) by applying the EBU divider. It is calculated using the following formula:
fETH = fPLL /(EBUDIV+1)
Related APIs:
XMC_SCU_CLOCK_GetEbuClockDivider(), XMC_SCU_CLOCK_GetSystemPllClockFrequency()

uint32_t XMC_SCU_CLOCK_GetECATClockDivider ( void )
Returns
uint32_t Ratio between the source of ECAT clock and the ECAT clock.
Range: 0 to 3.
Description
Provides the ratio between the ECAT parent clock and the ECAT clock.

The value is obtained by reading ECADIV bits of ECATCLKCR register.
Related APIs:
XMC_SCU_CLOCK_SetECATClockSource(), XMC_SCU_CLOCK_SetECATClockDivider()

XMC_SCU_CLOCK_ECATCLKSRC_t XMC_SCU_CLOCK_GetECATClockSource ( void )
Returns
XMC_SCU_CLOCK_ECATCLKSRC_t Source of ECAT clock.
Range: Use type XMC_SCU_CLOCK_ECATCLKSRC_t to identify the clock source.
XMC_SCU_CLOCK_ECATCLKSRC_USBPLL - USB PLL (fUSBPLL) as a source for ECAT clock.
XMC_SCU_CLOCK_ECATCLKSRC_SYSPLL - Main PLL output (fPLL) as a source for ECAT clock.
Description
Provides the source of ECAT clock (fECAT). The value is obtained by reading ECATSEL bit of ECATCLKCR register.
Related APIs:
XMC_SCU_HIB_SetRtcClockSource()

uint32_t XMC_SCU_CLOCK_GetEthernetClockFrequency ( void )
Returns
uint32_t Ethernet clock frequency in Hertz.
Description
Provides the frequency of Ethernet clock(fETH).

The value is derived from system clock frequency(fSYS). It is calculated using the following formula:
fETH = fSYS >> 1;
Related APIs:
XMC_SCU_CLOCK_GetSystemClockFrequency()

uint32_t XMC_SCU_CLOCK_GetExternalOutputClockDivider ( void )
Returns
uint32_t Ratio between the external output parent clock selected and the output clock.
Range: 0 to 511.
Description
Provides the divider value applied on parent clock before the generation of external output clock.

The value is obtained by reading EXTDIV bit of EXTCLKCR register.
Related APIs:
XMC_SCU_CLOCK_GetExternalOutputClockSource(), XMC_SCU_CLOCK_SetExternalOutputClockDivider()

uint32_t XMC_SCU_CLOCK_GetExternalOutputClockFrequency ( void )
Returns
uint32_t External clock out frequency in Hertz.
Description
Provides the frequency of external output clock(fEXT).

The value is derived using ECKDIV bits of EXCLKCR register and external clock out source. Based on these values, it is calculated using the following formula:
if external clock out source = System clock: fEXT = fSYS.
if external clock out source = PLL: fEXT = fPLL/(ECKDIV + 1).
if external clock out source = USBPLL: fEXT = fUSBPLL/(ECKDIV + 1).
Related APIs:
XMC_SCU_CLOCK_GetExternalOutputClockDivider(), XMC_SCU_CLOCK_GetExternalOutputClockSource()

XMC_SCU_CLOCK_EXTOUTCLKSRC_t XMC_SCU_CLOCK_GetExternalOutputClockSource ( void )
Returns
XMC_SCU_CLOCK_EXTOUTCLKSRC_t Source of external clock output(fEXT).
Range: Use type XMC_SCU_CLOCK_EXTOUTCLKSRC_t to identify the clock.
XMC_SCU_CLOCK_EXTOUTCLKSRC_SYS - system clock fSYS.
XMC_SCU_CLOCK_EXTOUTCLKSRC_USB - USB clock fUSB.
XMC_SCU_CLOCK_EXTOUTCLKSRC_PLL - PLL output fPLL.
Description
Provides the source of external clock output(fEXT).

The value is obtained by reading ECKSEL bits of EXTCLKCR register.
Related APIs:
XMC_SCU_CLOCK_SetExternalOutputClockSource(), XMC_SCU_CLOCK_SetExternalOutputClockDivider()

uint32_t XMC_SCU_CLOCK_GetHighPerformanceOscillatorGeneralPurposeInputStatus ( void )
Returns
Status OSC_HP XTAL1 pin
Description
Monitor the status of OSC_HP XTAL1 pin.
Related APIs:
XMC_SCU_CLOCK_EnableHighPerformanceOscillatorGeneralPurposeInput()

uint32_t XMC_SCU_CLOCK_GetLowPowerOscillatorGeneralPurposeInputStatus ( void )
Returns
Status OSC_ULP XTAL1 pin
Description
Monitor the status of OSC_ULP XTAL1 pin.
Related APIs:
XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput()

uint32_t XMC_SCU_CLOCK_GetPeripheralClockDivider ( void )
Returns
uint32_t Ratio of peripheral clock source to the value of peripheral clock.
Range: 0 or 1.
0-> fPERIPH= fCPU.
1-> fPERIPH= fCPU/2.
Description
Provides the ratio of CPU clock(fCPU) to peripheral clock(fPERIPH).

The value is obtained by reading PBDIV bit of PBCLKCR register.
Related APIs:
XMC_SCU_CLOCK_SetPeripheralClockDivider()

uint32_t XMC_SCU_CLOCK_GetPeripheralClockFrequency ( void )
Returns
uint32_t Value of peripheral clock frequency in Hertz.
Description
Provides the vlaue of clock frequency at which the peripherals are working.

The value is derived from the CPU frequency. Range: Value is of type uint32_t. It is represented in Hertz.
Related APIs:
XMC_SCU_CLOCK_GetCpuClockFrequency(),XMC_SCU_CLOCK_GatePeripheralClock()

uint32_t XMC_SCU_CLOCK_GetSystemClockDivider ( void )
Returns
uint32_t Ratio of fSYS clock source to the value of fSYS. Range: 0 to 255.
Description
Provides the value of ratio between the source of system clock to the the value of system clock frequency.

The value is obtained by reading SYSDIV bits of SYSCLKCR register.
Related APIs:
XMC_SCU_CLOCK_SetSystemClockDivider(), XMC_SCU_CLOCK_SetSystemClockSource()

uint32_t XMC_SCU_CLOCK_GetSystemClockFrequency ( void )
Returns
uint32_t System clock frequency in Hertz.
Description
Provides the frequency of system clock (fSYS).

The value obtained by dividing CPUDIV bits information of CPUCLKCR register with SystemCoreClock (fCPU) value.
Based on these values, fSYS clock frequency is derived using the following formula:
fSYS = fCPU << CPUDIV.
Related APIs:
XMC_SCU_CLOCK_GetUsbPllClockFrequency()

XMC_SCU_CLOCK_SYSCLKSRC_t XMC_SCU_CLOCK_GetSystemClockSource ( void )
Returns
XMC_SCU_CLOCK_SYSCLKSRC_t Source of clock for fSYS.
Range: Use type XMC_SCU_CLOCK_SYSCLKSRC_t to select the source of clock.
XMC_SCU_CLOCK_SYSCLKSRC_OFI - internal fast clock selected as fSYS.
XMC_SCU_CLOCK_SYSCLKSRC_PLL - output of PLL fPLL selected as fSYS.
Description
Provides the selected source of system clock (fSYS).

Selected source of fSYS is obtained by reading SYSSEL bits of SYSCLKCR register.
Related APIs:
XMC_SCU_CLOCK_SetSystemClockSource(), XMC_SCU_CLOCK_GetSystemPllClockSourceFrequency()

uint32_t XMC_SCU_CLOCK_GetSystemPllClockFrequency ( void )
Returns
uint32_t System frequency in Hertz.
Range: clock frequency in Hertz. Range of the value depends on the source clock frequency and the configured values of dividers.
Description
Provides the value of system PLL output clock frequency(fPLL).

The API uses N-DIV, P-DIV, K1-DIV, K2-DIV bits information from PLLCON1 register and VCOBYP bit information from PLLCON0 register. It calculates frequency of system pll clock using following formula: If normal Mode : fPLL = (fOSC * N)/(P * K2). If prescaler mode: fPLL = fOSC/ K1.
Related APIs:
XMC_SCU_CLOCK_SetSystemClockSource()

XMC_SCU_CLOCK_SYSPLLCLKSRC_t XMC_SCU_CLOCK_GetSystemPllClockSource ( void )
Returns
XMC_SCU_CLOCK_OSCCLKSRC_t Source of clock for system PLL.
Range: Use type XMC_SCU_CLOCK_SYSPLLCLKSRC_t for identifying the clock source.
XMC_SCU_CLOCK_SYSPLLCLKSRC_OSCHP - External High performance oscillator(fOHP).
XMC_SCU_CLOCK_SYSPLLCLKSRC_OFI - Internal fast clock (fOFI).
Description
Provides the source of system PLL clock (fPLL).

The value is obtained by reading VCOBYP bit of PLLCON0 register.
Related APIs:
XMC_SCU_CLOCK_EnableHighPerformanceOscillator(), XMC_SCU_CLOCK_SetSystemPllClockSource()

uint32_t XMC_SCU_CLOCK_GetSystemPllClockSourceFrequency ( void )
Returns
uint32_t Source clock used for deriving system clock.
Range: fOHP frequency if external high precision frequency is used.
fOFI fast internal clock frequency.
Description
Provides the value of the input clock frequency for deriving the system clock. The API retrieves frequency of system PLL input clock (fPLLin). Based on PINSEL bits information from PLLCON2 register, the parent clock source is obtained. This bit field specifies if fOHP or fOFI is used for deriving system clock. System clock frequency is obtained by dividing the source clock frequency with different divider values.
Related APIs:
XMC_SCU_CLOCK_GetSystemPllClockFrequency()

uint32_t XMC_SCU_CLOCK_GetUsbClockDivider ( void )
Returns
uint32_t Ratio of PLL output clock(fPLL) to USB clock(fUSB). Range: 0 to 7.
Description
Provides the ratio between PLL output frequency(fPLL) and USB clock(fUSB).

The value is obtained by reading USBDIV bit of USBCLKCR register.
Related APIs:
XMC_SCU_CLOCK_SetUsbClockDivider(), XMC_SCU_CLOCK_GetUsbClockSource()

uint32_t XMC_SCU_CLOCK_GetUsbClockFrequency ( void )
Returns
uint32_t USB clock frequency in Hertz.
Description
Provides the frequency of USB and SDMMC clock(fUSB/fSDMMC).

The value is obtained from USBDIV bits of USBCLKCR register and USB clock source. Based on these values fUSB/fSDMMC clock frequency is calculated using following formula:
if USB clock source = USBPLL: fUSB/fSDMMC = fUSBPLL/(USBDIV + 1).
if USB clock source = PLL: fUSB/fSDMMC = fPLL/(USBDIV + 1).
Related APIs:
XMC_SCU_CLOCK_GetUsbClockSource(), XMC_SCU_CLOCK_GetUsbClockDivider()

XMC_SCU_CLOCK_USBCLKSRC_t XMC_SCU_CLOCK_GetUsbClockSource ( void )
Returns
XMC_SCU_CLOCK_USBCLKSRC_t Source of clock for USB and SDMMC(fUSB/SDMMC).
Range: Use type XMC_SCU_CLOCK_USBCLKSRC_t to identify the source of clock.
XMC_SCU_CLOCK_USBCLKSRC_USBPLL - output of USB PLL is selected as source of USB clock(fUSB/SDMMC).
XMC_SCU_CLOCK_USBCLKSRC_SYSPLL - output of PLL fPLL is selected as source of USB clock(fUSB/SDMMC).
Description
Provides the selected source of USB and SDMMC clock frequency.

The clock source is read from from the USBSEL bits of USBCLKCR register.
Related APIs:
XMC_SCU_CLOCK_SetUsbClockDivider(), XMC_SCU_CLOCK_GetUsbPllClockFrequency()

uint32_t XMC_SCU_CLOCK_GetUsbPllClockFrequency ( void )
Returns
uint32_t USB PLL output clock frequency.
Description
Provides the frequency of USB PLL output clock (fUSBPLL).

It obtains the VCOBYP bits information from USBPLLCON register and decides if USB PLL mode is used. If USB PLL mode is used, the USB clock frequency is obtained by dividing the source clock by USB PLL dividers.
The frequency is obtained using following formula:
If Normal Mode : fUSBPLL = (fOSC * N)/(P * 2).
If Prescaler mode: fPLL = fOSC.
Related APIs:
XMC_SCU_CLOCK_GetSystemPllClockSourceFrequency()

uint32_t XMC_SCU_CLOCK_GetWdtClockDivider ( void )
Returns
uint32_t Ratio between the source of WDT clock and the WDT clock.
Range: 0 to 255.
Description
Provides the ratio between the WDT parent clock and the WDT clock.

The value is obtained by reading WDTDIV bits of WDTCLKCR register. Ensure that the WDT parent clock is considered before using the value of the divider value.
Related APIs:
XMC_SCU_CLOCK_SetWdtClockSource(), XMC_SCU_CLOCK_SetWdtClockDivider()

uint32_t XMC_SCU_CLOCK_GetWdtClockFrequency ( void )
Returns
uint32_t WDT clock frequency in Hertz.
Description
Provides the frequency of WDT clock(fWDT).

The value is derived using WDTDIV bits of WDTCLKCR register and WDT clock source. Based on these values it is calculated using the following formula:
if WDT clock source = PLL: fWDT = fUSBPLL/(WDTDIV + 1).
if WDT clock source = OFI: fWDT = fOFI/(WDTDIV + 1).
if WDT clock source = Standby: fWDT = fSTDBY/(WDTDIV + 1).
Related APIs:
XMC_SCU_CLOCK_GetWdtClockSource(), XMC_SCU_CLOCK_GetWdtClockDivider()

XMC_SCU_CLOCK_WDTCLKSRC_t XMC_SCU_CLOCK_GetWdtClockSource ( void )
Returns
XMC_SCU_CLOCK_WDTCLKSRC_t Clock source configured for watchdog timer.
Range: Use type XMC_SCU_CLOCK_WDTCLKSRC_t to identify the clock source.
XMC_SCU_CLOCK_WDTCLKSRC_OFI - internal fast oscillator (fOFI)
XMC_SCU_CLOCK_WDTCLKSRC_STDBY - backup standby clock (fSTDBY)
XMC_SCU_CLOCK_WDTCLKSRC_PLL - PLL output clock (fPLL)
Description
Provides the source of clock used for watchdog timer.

The value is obtained by reading WDTSEL bits of WDTCLKCR register. The time for timeout or pre-warning of watchdog has to be calculated based on the clock source selected.
Related APIs:
XMC_SCU_CLOCK_SetWdtClockDivider(), XMC_SCU_CLOCK_SetWdtClockSource()

void XMC_SCU_CLOCK_Init ( const XMC_SCU_CLOCK_CONFIG_t *const config )
Parameters
config Pointer to structure holding the clock prescaler values and divider values for configuring clock generators and clock tree.
Range: Configure the members of structure XMC_SCU_CLOCK_CONFIG_t for various parameters of clock setup.
Returns
None
Description
Initializes clock generators and clock tree.

Enables the high precision oscillator(fOHP) input and configures the system and peripheral clock frequencies. Based on the system clock source selected in config, either fPLL or fOFI will be chosen as system clock. Based on PLL mode(normal or prescaler mode) used, PLL ramps up in steps to achieve target frequency. The clock dividers for CPU, CCU and peripheral clocks will be set based on the input configuration. The SystemCoreClock variable is set with the value of system clock frequency.
Related APIs:
XMC_SCU_CLOCK_GetPeripheralClockFrequency(), XMC_SCU_CLOCK_GetCpuClockFrequency()

bool XMC_SCU_CLOCK_IsClockEnabled ( const XMC_SCU_CLOCK_t clock )
Parameters
clock Peripheral for which the clock status has to be checked.
Range: Use type XMC_SCU_CLOCK_t to select the peripheral.
Returns
bool Status of peripheral clock.
Range: true if peripheral clock is enabled. false if peripheral clock is disabled.
Description
Checks the status of peripheral source clock.

The status of peripheral source clock is read from the CLKSTATn register. Returns true if clock is enabled and returns false otherwise.
Related APIs:
XMC_SCU_CLOCK_EnableClock(), XMC_SCU_CLOCK_DisableClock()

bool XMC_SCU_CLOCK_IsHighPerformanceOscillatorStable ( void )
Returns
Status of high performance oscillator
Description
Checks if the OSC_HP oscillator is stable and usable
Related APIs:
XMC_SCU_CLOCK_EnableHighPerformanceOscillator()

bool XMC_SCU_CLOCK_IsLowPowerOscillatorStable ( void )
Returns
Status of low power oscillator
Description
Checks if the OSC_ULP oscillator is stable and usable
Related APIs:
XMC_SCU_CLOCK_EnableLowPowerOscillator()

bool XMC_SCU_CLOCK_IsPeripheralClockGated ( const XMC_SCU_PERIPHERAL_CLOCK_t peripheral )
Parameters
peripheral The peripheral for which the check for clock gating has to be done. Range: Use type XMC_SCU_PERIPHERAL_CLOCK_t to identify the peripheral.
Returns
bool Status of the peripheral clock gating. Range: true if the peripheral clock is gated. false if the peripheral clock ungated(gate de-asserted).
Description
Gives the status of peripheral clock gating.

Checks the status of peripheral clock gating using one of CGATSTAT0, CGATSTAT1 or CGATSTAT2 registers. It is recommended to use this API before enabling the gating of any peripherals through XMC_SCU_CLOCK_GatePeripheralClock() API.
Related APIs:
XMC_SCU_CLOCK_UngatePeripheralClock(), XMC_SCU_CLOCK_GatePeripheralClock()

bool XMC_SCU_CLOCK_IsSystemPllLocked ( void )
Parameters
None
Returns
Boolean value indicating if System PLL is locked
Description
Return status of System PLL VCO.
Related APIs:
XMC_SCU_CLOCK_StartSystemPll()

bool XMC_SCU_CLOCK_IsUsbPllLocked ( void )
Parameters
None
Returns
Boolean value indicating if USB PLL is locked
Description
Return status of USB PLL VCO.
Related APIs:
XMC_SCU_CLOCK_StartUsbPll()

void XMC_SCU_CLOCK_SetBackupClockCalibrationMode ( XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_t mode )
Parameters
mode Backup clock calibration mode.
Range: Use type XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_t to identify the calibration mode.
XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_FACTORY- Force trimming of internal oscillator with firmware configured values.
XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_AUTOMATIC- Calibrate internal oscillator automatically using standby clock(fSTDBY).
Returns
None
Description
Configures the calibration mode of internal oscillator.

Based on the calibration mode selected, the internal oscillator calibration will be configured. The calibration is useful while using fast internal clock(fOFI). When factory mode calibration is used, the internal oscillator is trimmed using the firmware configured values. If automatic calibration is selected, the internal oscillator will be monitored using the backup clock.
Related APIs:
XMC_SCU_CLOCK_SetSystemClockSource()

void XMC_SCU_CLOCK_SetCcuClockDivider ( const uint32_t ratio )
Parameters
ratio Ratio of fCCU clock source to the value of fCCU. Range: 1 or 2.
1-> fCCU= fSYS
2-> fCCU= fSYS/2.
Returns
None
Description
Configures the divider for CCU clock source.

Capture compare unit(CCU) can take either fSYS or fSYS/2 as the source of clock. The configuration is set to CCUDIV bit of CCUCLKCR register. The CCUDIV bit is 1 bit wide.
Related APIs:
XMC_SCU_CLOCK_GetCcuClockDivider()

void XMC_SCU_CLOCK_SetCpuClockDivider ( const uint32_t ratio )
Parameters
ratio Ratio between system clock(fSYS) and CPU clock(fCPU). Range: 1 or 2.
1-> fCPU= fSYS.
2-> fCPU= fSYS/2.
Returns
None
Description
Configures the CPU clock by setting the divider value for the system clock.

The value is set to the CPUDIV bit of CPUCLKCR register.
Related APIs:
XMC_SCU_CLOCK_GetCpuClockDivider()

void XMC_SCU_CLOCK_SetDeepSleepConfig ( int32_t config )
Parameters
config Defines the source of the system clock and peripherals clock gating in DEEPSLEEP state. XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_t
Returns
None
Description
Defines the source of the system clock and peripherals clock gating in DEEPSLEEP state. In addition the state of FLASH, PLL and PLLVCO during DEEPSLEEP state. Use this enum as parameter of XMC_SCU_CLOCK_SetDeepSleepConfig before going to DEEPSLEEP state.

The DEEPSLEEP state of the system corresponds to the DEEPSLEEP state of the CPU. The state is entered via WFI or WFE instruction of the CPU. In this state the clock to the CPU is stopped.

In Deep Sleep state the OSC_HP and the PLL may be switched off. The wake-up logic in the NVIC is still clocked by a free-running clock. Peripherals are only clocked when configured to stay enabled. Configuration of peripherals and any SRAM content is preserved. The Flash module can be put into low-power mode to achieve a further power reduction. On wake-up Flash module will be restarted again before instructions or data access is possible. Any interrupt will bring the system back to operation via the NVIC.The clock setup before entering Deep Sleep state is restored upon wake-up.

1 // Configure system during SLEEP state
2 XMC_SCU_CLOCK_SetDeepSleepConfig(XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_SYSCLK_FOFI |
3 XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_FLASH_POWERDOWN |
4 XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_PLL_POWERDOWN);
5
6 // Make sure that SLEEPDEEP bit is set
7 SCB->SCR |= SCB_SCR_DEEPSLEEP_Msk;
8
9 // Return to SLEEP mode after handling the wakeup event
10 SCB->SCR |= SCB_SCR_SLEEPONEXIT_Msk;
11
12 // Put system in DEEPSLEEP state
13 __WFI();
Related APIs:
XMC_SCU_CLOCK_Init()

void XMC_SCU_CLOCK_SetEbuClockDivider ( const uint32_t ratio )
Parameters
ratio Ratio of PLL clock(fPLL) to EBU clock(fEBU).
Range: 1 to 64.
Returns
None
Description
Configures the EBU clock(fEBU) by setting the divider value.

The clock divider is configured to the EBUDIV bits of EBUCLKCR register.
Related APIs:
XMC_SCU_CLOCK_GetEbuClockDivider()

void XMC_SCU_CLOCK_SetECATClockDivider ( const uint32_t divider )
Parameters
ratio Ratio between the source of ECAT clock and the ECAT clock.
Range: 1 to 4.
Returns
None
Description
Configures the ECAT clock by setting the clock divider for the ECAT clock source.

The value is configured to ECADIV bits of ECATCLKCR register. The value of divider is decremented by 1 before configuring.
Related APIs:
XMC_SCU_CLOCK_SetECATClockSource(), XMC_SCU_CLOCK_GetECATClockDivider()

void XMC_SCU_CLOCK_SetECATClockSource ( const XMC_SCU_CLOCK_ECATCLKSRC_t source )
Parameters
source Source of ECAT clock.
Range: Use type XMC_SCU_CLOCK_ECATCLKSRC_t to identify the clock source.
XMC_SCU_CLOCK_ECATCLKSRC_USBPLL - USB PLL (fUSBPLL) as a source for ECAT clock.
XMC_SCU_CLOCK_ECATCLKSRC_SYSPLL - Main PLL output (fPLL) as a source for ECAT clock.
Returns
None
Description
Selects the source of ECAT clock (fECAT).

The value is configured to ECATSEL bit of ECATCLKCR register.
Related APIs:
XMC_SCU_CLOCK_GetECATClockSource()

void XMC_SCU_CLOCK_SetExternalOutputClockDivider ( const uint32_t ratio )
Parameters
ratio Ratio between the external output parent clock selected and the output clock.
Range: 1 to 512.
Returns
None
Description
Configures the external output clock by setting the divider value for the parent clock.

The value will be configured to ECKDIV bits of EXTCLKCR register. The divider value is decremented by 1 before storing it to the bit fields. Ensure that the source of external output clock is configured appropriately using the API XMC_SCU_CLOCK_SetExternalOutputClockSource().
Related APIs:
XMC_SCU_CLOCK_SetExternalOutputClockSource(), XMC_SCU_CLOCK_GetExternalOutputClockDivider()

void XMC_SCU_CLOCK_SetExternalOutputClockSource ( const XMC_SCU_CLOCK_EXTOUTCLKSRC_t clock )
Parameters
clock Source of external clock output(fEXT).
Range: Use type XMC_SCU_CLOCK_EXTOUTCLKSRC_t to identify the clock.
XMC_SCU_CLOCK_EXTOUTCLKSRC_SYS - system clock fSYS.
XMC_SCU_CLOCK_EXTOUTCLKSRC_USB - USB clock fUSB.
XMC_SCU_CLOCK_EXTOUTCLKSRC_PLL - PLL output fPLL.
Returns
None
Description
Selects the source of external clock out (fEXT).

The value will be configured to ECKSEL bits of EXTCLKCR register.
Related APIs:
XMC_SCU_CLOCK_GetExternalOutputClockSource(), XMC_SCU_CLOCK_SetExternalOutputClockDivider()

void XMC_SCU_CLOCK_SetPeripheralClockDivider ( const uint32_t ratio )
Parameters
ratio Ratio of peripheral clock source to the value of peripheral clock.
Range: 1 or 2.
1-> fPERIPH= fCPU.
2-> fPERIPH= fCPU/2.
Returns
None
Description
Configures the peripheral clock by setting the divider for CPU clock(fCPU).

The peripheral clock can be equal to either fCPU or fCPU/2. The value is configured to PBDIV bit of PBCLKCR register.
Related APIs:
XMC_SCU_CLOCK_GetPeripheralClockDivider()

void XMC_SCU_CLOCK_SetSleepConfig ( int32_t config )
Parameters
config Defines the source of the system clock and peripherals clock gating in SLEEP state. XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_t
Returns
None
Description
Defines the source of the system clock and peripherals clock gating in SLEEP state.

The SLEEP state of the system corresponds to the SLEEP state of the CPU. The state is entered via WFI or WFE instruction of the CPU. In this state the clock to the CPU is stopped. Peripherals are only clocked when configured to stay enabled.

Peripherals can continue to operate unaffected and eventually generate an event to wake-up the CPU. Any interrupt to the NVIC will bring the CPU back to operation. The clock tree upon exit from SLEEP state is restored to what it was before entry into SLEEP state.

1 // Configure system during SLEEP state
2 XMC_SCU_CLOCK_SetSleepConfig(XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_SYSCLK_FOFI);
3
4 // Make sure that SLEEPDEEP bit is cleared
5 SCB->SCR &= ~ SCB_SCR_DEEPSLEEP_Msk;
6
7 // Return to SLEEP mode after handling the wakeup event
8 SCB->SCR |= SCB_SCR_SLEEPONEXIT_Msk;
9
10 // Put system in SLEEP state
11 __WFI();
Related APIs:
XMC_SCU_CLOCK_Init()

void XMC_SCU_CLOCK_SetSystemClockDivider ( const uint32_t divider )
Parameters
divider Ratio of fSYS clock source to the value of fSYS. Range: 1 to 256.
Returns
None
Description
Configures the ratio of system clock source to the value of system clock frequency.

The value is configured as SYSDIV bits of SYSCLKCR register. The divider value is decremented by 1 before configuring.
Related APIs:
XMC_SCU_CLOCK_GetSystemClockDivider(), XMC_SCU_CLOCK_SetSystemClockSource()

void XMC_SCU_CLOCK_SetSystemClockSource ( const XMC_SCU_CLOCK_SYSCLKSRC_t source )
Parameters
source Source of clock for fSYS.
Range: Use type XMC_SCU_CLOCK_SYSCLKSRC_t to select the source of clock.
XMC_SCU_CLOCK_SYSCLKSRC_OFI for selecting internal fast clock as fSYS.
XMC_SCU_CLOCK_SYSCLKSRC_PLL for selecting the output of PLL fPLL as fSYS.
Returns
None
Description
Selects the source for system clock (fSYS).

System clock is selected by setting SYSSEL bits in the SYSCLKCR register. If XMC_SCU_CLOCK_SYSCLKSRC_PLL is selected, then the dividers of the PLL have to be additionally configured to achieve the required system clock frequency.
Related APIs:
XMC_SCU_CLOCK_StartSystemPll(), XMC_SCU_CLOCK_EnableHighPerformanceOscillator()

void XMC_SCU_CLOCK_SetSystemPllClockSource ( const XMC_SCU_CLOCK_SYSPLLCLKSRC_t source )
Parameters
source Source of clock for system PLL.
Range: Use type XMC_SCU_CLOCK_SYSPLLCLKSRC_t for identifying the clock source.
XMC_SCU_CLOCK_SYSPLLCLKSRC_OSCHP - External High performance oscillator(fOHP).
XMC_SCU_CLOCK_SYSPLLCLKSRC_OFI - Internal fast clock (fOFI).
Returns
None
Description
Selects the source of system PLL.

The value is configured to VCOBYP bit of PLLCON0 register. If XMC_SCU_CLOCK_SYSPLLCLKSRC_OSCHP is selected, ensure that the high performance oscillator is enabled by using the API XMC_SCU_CLOCK_EnableHighPerformanceOscillator().
Related APIs:
XMC_SCU_CLOCK_EnableHighPerformanceOscillator()

void XMC_SCU_CLOCK_SetUsbClockDivider ( const uint32_t ratio )
Parameters
ratio Ratio of PLL output clock(fPLL) to USB clock(fUSB). Range: 1 to 8.
Returns
None
Description
Configures the USB clock(fUSB) by setting the USB clock divider.

The value is decremented by 1 before setting it to USBDIV bits of USBCLKCR register.
Related APIs:
XMC_SCU_CLOCK_GetUsbClockDivider(), XMC_SCU_CLOCK_SetUsbClockSource()

void XMC_SCU_CLOCK_SetUsbClockSource ( const XMC_SCU_CLOCK_USBCLKSRC_t source )
Parameters
source Source of clock for USB and SDMMC(fUSB/SDMMC).
Range: Use type XMC_SCU_CLOCK_USBCLKSRC_t to select the source of clock.
XMC_SCU_CLOCK_USBCLKSRC_USBPLL - output of USB PLL as source of USB clock(fUSB/SDMMC).
XMC_SCU_CLOCK_USBCLKSRC_SYSPLL - output of PLL fPLL as source of USB clock(fUSB/SDMMC).
Returns
None
Description
Selects the source of USB/SDMMC clock (fUSB/SDMMC).

USB and SDMMC use a common clock source. They can either use fUSB PLL or fPLL as the source of clock. The selection is done by configuring the USBSEL bits of USBCLKCR register.
Related APIs:
XMC_SCU_CLOCK_SetUsbClockDivider(), XMC_SCU_CLOCK_GetUsbPllClockFrequency()

void XMC_SCU_CLOCK_SetWdtClockDivider ( const uint32_t ratio )
Parameters
ratio Ratio between the source of WDT clock and the WDT clock.
Range: 1 to 256.
Returns
None
Description
Configures the WDT clock by setting the clock divider for the WDT clock source.

The value is configured to WDTDIV bits of WDTCLKCR register. The value of divider is decremented by 1 before configuring. Check the selected clock source for the WDT clock before configuring the divider using the API XMC_SCU_CLOCK_SetWdtClockSource().
Related APIs:
XMC_SCU_CLOCK_SetWdtClockSource(), XMC_SCU_CLOCK_GetWdtClockDivider()

void XMC_SCU_CLOCK_SetWdtClockSource ( const XMC_SCU_CLOCK_WDTCLKSRC_t source )
Parameters
source Clock source for watchdog timer.
Range: Use type XMC_SCU_CLOCK_WDTCLKSRC_t to identify the clock source.
XMC_SCU_CLOCK_WDTCLKSRC_OFI - internal fast oscillator (fOFI)
XMC_SCU_CLOCK_WDTCLKSRC_STDBY - backup standby clock (fSTDBY)
XMC_SCU_CLOCK_WDTCLKSRC_PLL - PLL output clock (fPLL)
Returns
None
Description
Selects the source of WDT clock (fWDT).

The selected value is configured to the WDTSEL bits of WDTCLKCR register. The watchdog timer counts at the frequency selected using this API. So the time for timeout or pre-warning of watchdog has to be calculated based on this selection.
Related APIs:
XMC_SCU_CLOCK_SetWdtClockDivider(), XMC_SCU_CLOCK_GetWdtClockFrequency()

void XMC_SCU_CLOCK_StartSystemPll | ( | XMC_SCU_CLOCK_SYSPLLCLKSRC_t | source,
 |  | XMC_SCU_CLOCK_SYSPLL_MODE_t | mode,
 |  | uint32_t | pdiv,
 |  | uint32_t | ndiv,
 |  | uint32_t | kdiv
 | ) |  |
Parameters
source PLL clock source.
Range: Use type XMC_SCU_CLOCK_SYSPLLCLKSRC_t to identify the clock source.
XMC_SCU_CLOCK_SYSPLLCLKSRC_OSCHP- External high precision oscillator input. XMC_SCU_CLOCK_SYSPLLCLKSRC_OFI- Internal fast clock input.
mode Mode of PLL operation.
Range: Use type XMC_SCU_CLOCK_SYSPLL_MODE_t to identify the PLL mode.
XMC_SCU_CLOCK_SYSPLL_MODE_NORMAL- PLL frequency obtained from output of VCO(fVCO).
XMC_SCU_CLOCK_SYSPLL_MODE_PRESCALAR- VCO is bypassed. Frequency obtained from fOSC.
pdiv Input divider. Represents (PDIV+1) applied to external reference frequency.
Range: 1 to 16.
ndiv Feedback divider. Represents(NDIV+1)
Range: 1 to 128.
kdiv Output divider. Represents (K2DIV+1) in normal PLL mode or (K1DIV+1) in prescaler mode.
Range: 1 to 128.
Returns
None
Description
Enables system PLL.

Based on the selected source of clock, either external frequency fOHP or internal clock fOFI will be used. Based on the selected PLL mode, either voltage controlled oscillator(VCO) output(fVCO) or direct input frequency is used for the output dividers.
The API implements the following sequence:
  • Store the value of TRAPDIS register into a temporary variable before disabling all traps.
  • Clear all PLL related traps.
  • If external fOHP is selected as source, wait for the external oscillator to stabilize.
  • If PLL normal mode is selected, calculate the value of K2DIV and configure the PDIV, NDIV and K2DIV values.
  • Ramp up the PLL frequency in steps.
  • If prescaler mode is selected, configure the value of K1DIV.
  • Wait for LOCK.
  • Restore the trap configuration from stored temporary variable.
Related APIs:
XMC_SCU_CLOCK_GetSystemPllClockFrequency(), XMC_SCU_CLOCK_StopSystemPll()

void XMC_SCU_CLOCK_StartUsbPll | ( | uint32_t | pdiv,
 |  | uint32_t | ndiv
 | ) |  |
Parameters
pdiv Input divider value. Represents (PDIV+1) divider for the USB PLL.
Range: 1 to 16.
ndiv VCO feedback divider for USB PLL. Represents (NDIV+1) feedback divider.
Range: 1 to 128.
Returns
None
Description
Configures USB PLL dividers and enables the PLL.

The API follows the required sequence for safely configuring the divider values of USB PLL. Checks for PLL stabilization before enabling the same. After the configuring the dividers, it waits till the VCO lock is achieved. The sequence followed is as follows:
  • Enable the USB PLL and configure VCO to be bypassed.
  • Set up the HP oscillator clock input.
  • Store the value of TRAPDIS register into a temporary variable before disabling all traps.
  • Clear all USBPLL related traps.
  • Disconnect the oscillator from USB PLL and configure the dividers PDIV and NDIV.
  • Connect the oscillator to USB PLL and enable VCO.
  • Wait for LOCK.
  • Restore the trap configuration from stored temporary variable.
Related APIs:
XMC_SCU_CLOCK_StopUsbPll()

void XMC_SCU_CLOCK_StepSystemPllFrequency ( uint32_t kdiv )
Parameters
kdiv PLL output divider K2DIV.
Range: 1 to 128. Represents (K2DIV+1).
Returns
None
Description
Ramps up or ramps down the PLL output frequency in provided step.

The PLL output frequency is divided by the kdiv value. This generates a step of ramp for the PLL output frequency. The API waits for the clock to stabilize before the completing its execution.
Related APIs:
XMC_SCU_CLOCK_StartSystemPll()

void XMC_SCU_CLOCK_StopSystemPll ( void )
Returns
None
Description
Disables the system PLL. PLL is placed in power saving mode. It disables the PLL by setting the PLLPWD bit of PLLCON0 register. If the PLL is put to power saving mode, it can no longer be used. It is recommended to ensure following steps before using XMC_SCU_CLOCK_StopSystemPll API:
  • Store the value of TRAPDIS register into a temporary variable before disabling all traps.
  • Clear all PLL related traps.
  • Ramp down frequency until fPLL reaches backup clock frequency (fOFI).
  • Disable PLL.
  • Restore the trap configuration from stored temporary variable.
Related APIs:
XMC_SCU_CLOCK_GetSystemPllClockFrequency(), XMC_SCU_CLOCK_StartSystemPll()

void XMC_SCU_CLOCK_StopUsbPll ( void )
Returns
None
Description
Disables USB PLL operation.

USB PLL is disabled by placing the USB PLL in power saving mode. The VCO and USB PLL are put in power saving mode by setting the PLLPWD bit and VCOPWD bit of USBLLCON register to 1. VCO bypass mode is enabled by setting the VCOBYP bit of USBLLCON register to 1. It is recommended to ensure following steps before using XMC_SCU_CLOCK_StopUsbPll API:
  • Store the value of TRAPDIS register into a temporary variable before disabling all traps.
  • Clear all USBPLL related traps.
  • Ramp down frequency.
  • Disable PLL.
  • Restore the trap configuration from stored temporary variable.
Related APIs:
XMC_SCU_CLOCK_StartUsbPll()

void XMC_SCU_CLOCK_UngatePeripheralClock ( const XMC_SCU_PERIPHERAL_CLOCK_t peripheral )
Parameters
peripheral The peripheral for which the clock has to be ungated. Range: Use type XMC_SCU_PERIPHERAL_CLOCK_t to identify the peripheral.
Returns
None
Description
Enables the supply of clock to the selected peripheral.

By default when the device powers on, the peripheral clock will be gated for the peripherals that support clock gating. The peripheral clock should be enabled before using it for any functionality. fPERI is the source of clock to various peripherals. Some peripherals support clock gate. Software can request for individual ungating of such peripheral clocks by setting the respective bits in one of SCU_CGATCLR0, SCU_CGATCLR1 or SCU_CGATCLR2 registers.
Related APIs:
XMC_SCU_CLOCK_IsPeripheralClockGated(), XMC_SCU_CLOCK_GatePeripheralClock()

void XMC_SCU_DisableOutOfRangeComparator | ( | const uint32_t | group,
 |  | const uint32_t | channel
 | ) |  |
Parameters
group ADC Group to which the channel being monitored belongs to.
Range: 0 or 1.
channel The channel whose voltage range has to be monitored.
Range: 6 or 7. Value identifies the channel in the selected ADC group.
Returns
None
Description
Disables the out of range comparator for the selected ADC group and the channel.

Out of range comparator is disabled by clearing the enable bit in the GORCEN register.
Related APIs:
XMC_SCU_EnableOutOfRangeComparator()

void XMC_SCU_DisableTemperatureSensor ( void )
Returns
None
Description
Disables die temperature measurement by powering the DTS module off.

Die temperature sensor is disabled by clearing the PWD bit of DTSCON register.
Related APIs:
XMC_SCU_EnableTemperatureSensor(), XMC_SCU_IsTemperatureSensorEnabled(), XMC_SCU_CalibrateTemperatureSensor(), XMC_SCU_StartTemperatureMeasurement(), XMC_SCU_GetTemperatureMeasurement()

void XMC_SCU_EnableOutOfRangeComparator | ( | const uint32_t | group,
 |  | const uint32_t | channel
 | ) |  |
Parameters
group ADC Group to which the channel being monitored belongs to.
Range: 0 or 1.
channel The channel whose voltage range has to be monitored.
Range: 6 or 7. Value identifies the channel in the selected ADC group.
Returns
None
Description
Enables out of range comparator for the selected ADC group and channel.

The ADC channel input is compared by Out of Range Comparator (ORC) for overvoltage monitoring or for detection of out of range analog inputs. ORC must be turned on explicitly to leverage the auditing feature. ORC is enabled by setting the enable bit in the GORCEN register.
Related APIs:
XMC_SCU_DisableOutOfRangeComparator()

void XMC_SCU_EnableTemperatureSensor ( void )
Returns
None
Description
Enables die temperature measurement by powering the DTS module.

Die temperature sensor is enabled by setting the PWD bit of DTSCON register.
Related APIs:
XMC_SCU_DisableTemperatureSensor(), XMC_SCU_IsTemperatureSensorEnabled(), XMC_SCU_CalibrateTemperatureSensor(), XMC_SCU_StartTemperatureMeasurement(), XMC_SCU_GetTemperatureMeasurement()

uint32_t XMC_SCU_GetBootMode ( void )
Returns
uint32_t Configured boot mode for the device.
Range: Use type XMC_SCU_BOOTMODE_t for enumeration of different boot modes.
Description
Provides the boot mode configured for the device.

The boot mode is read from the STCON register bit field SWCON.
Related APIs:
XMC_SCU_SetBootMode()

uint32_t XMC_SCU_GetMirrorStatus ( void )
Returns
uint32_t Status of the register mirror update.
Range: Use the bit mask of the SCU_GENERAL_MIRRSTS register for the mirror update event of interest. e.g.: SCU_GENERAL_MIRRSTS_RTC_CTR_Msk. Multiple update events can be combined using OR operation.
Description
Provides the status of hibernate domain register update, when the respective mirror registers are changed.

The hibernate domain is connected to the core domain via SPI serial communication. MIRRSTS is a status register representing the communication of changed value of a mirror register to its corresponding register in the hibernate domain. The bit fields of the register indicate that a corresponding register of the hibernate domain is ready to accept a write or that the communication interface is busy with executing the previous operation.
Note: There is no hibernate domain in XMC1x devices. This register is retained for legacy purpose.
uint32_t XMC_SCU_GetTemperatureMeasurement ( void )
Returns
uint32_t Measured temperature value.
Range: Valid temperature range is 0 to 1023.
If sensor is not enabled, 0x7FFFFFFFH is returned.
Description
Reads the measured value of die temperature.

Temperature measurement result is read from RESULT bit field of DTSSTAT register. The temperature measured in �C is given by (RESULT - 605) / 2.05 [�C]
Related APIs:
XMC_SCU_IsTemperatureSensorBusy()

void XMC_SCU_HIB_ClearEventStatus ( int32_t event )
Parameters
event Hibernate wakeup event XMC_SCU_HIB_EVENT_t
Returns
None
Description
Clear hibernate wakeup event status
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_HIB_TriggerEvent(), XMC_SCU_HIB_EnableEvent(), XMC_SCU_HIB_DisableEvent(), XMC_SCU_GetMirrorStatus()

void XMC_SCU_HIB_ClearWakeupEventDetectionStatus ( void )
Returns
None
Description
Clear detection status of wakeup from hibernate mode
void XMC_SCU_HIB_DisableEvent ( int32_t event )
Parameters
event Hibernate wakeup event XMC_SCU_HIB_EVENT_t
Returns
None
Description
Disable hibernate wakeup event source
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_HIB_TriggerEvent(), XMC_SCU_HIB_EnableEvent(), XMC_SCU_HIB_ClearEventStatus(), XMC_SCU_GetMirrorStatus()

void XMC_SCU_HIB_DisableHibernateDomain ( void )
Returns
None
Description
Powers down the hibernation domain.

After disabling the hibernate domain, none of the peripherals from the hibernte domain can be used. Hibernate domain is disabled by setting the HIB bit of PWRCLR register and \ HIBRS bit of RSTSET register.
It is recommended to use following steps to verify whether a hibernation domain is enabled/disabled:
  • Call XMC_SCU_HIB_DisableHibernateDomain .
  • Call XMC_SCU_HIB_IsHibernateDomainEnabled and check return value. If return value is true, it indicates that the hibernation domain is enabled otherwise disabled.
Related APIs:
XMC_SCU_HIB_EnableHibernateDomain(), XMC_SCU_HIB_IsHibernateDomainEnabled()

void XMC_SCU_HIB_DisableInternalSlowClock ( void )
Returns
None
Description
Disables slow internal oscillator(fOSI).

By default on device power up, the slow internall oscillator is enabled. It can be disabled only if the external oscillator(fULP) is enabled and toggling. It is recommended to enable fOSI to prevent deadlock if fULP fails. fOSI is disabled by setting the PWD bit of OSCSICTRL register. The API waits for the mirror register update of the configured register. The slow internal oscillator registers are in hibernate domain. Ensure that the hibernate domain is enabled before changing the configuration.
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_HIB_EnableInternalSlowClock(), XMC_SCU_CLOCK_SetBackupClockCalibrationMode(), XMC_SCU_HIB_EnableHibernateDomain(), XMC_SCU_GetMirrorStatus()

void XMC_SCU_HIB_EnableEvent ( int32_t event )
Parameters
event Hibernate wakeup event XMC_SCU_HIB_EVENT_t
Returns
None
Description
Enable hibernate wakeup event source
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_HIB_TriggerEvent(), XMC_SCU_HIB_ClearEventStatus(), XMC_SCU_HIB_DisableEvent(), XMC_SCU_GetMirrorStatus()

void XMC_SCU_HIB_EnableHibernateDomain ( void )
Returns
None
Description
Powers up the hibernation domain.

Hibernate domain should be enabled before using any peripheral from the hibernate domain. It enables the power to the hibernate domain and moves it out of reset state. Power to hibernate domain is enabled by setting the HIB bit of PWRSET register only if it is currently powered down. The API will wait until HIB domain is enabled. If hibernate domain is in a state of reset, HIBRS bit of RSTCLR register is set to move it out of reset state.
It is recommended to use following steps to verify whether a hibernation domain is enabled/disabled:
  • Call XMC_SCU_HIB_EnableHibernateDomain .
  • Call XMC_SCU_HIB_IsHibernateDomainEnabled and check the return value. If return value is true, it indicates that the hibernation domain is enabled otherwise disabled.
Related APIs:
XMC_SCU_HIB_DisableHibernateDomain(), XMC_SCU_HIB_IsHibernateDomainEnabled()

void XMC_SCU_HIB_EnableInternalSlowClock ( void )
Returns
None
Description
Enables slow internal oscillator(fOSI).

By default on device power up, the slow internall oscillator is enabled. It can be disabled only if the external oscillator(fULP) is enabled and toggling. It is recommended to enable fOSI to prevent deadlock if fULP fails. fOSI is enabled by clearing the PWD bit of OSCSICTRL register. The API waits for the mirror register update of the configured register. The slow internal oscillator registers are in hibernate domain. Ensure that the hibernate domain is enabled before changing the configuration.
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_HIB_DisableInternalSlowClock(), XMC_SCU_CLOCK_SetBackupClockCalibrationMode(), XMC_SCU_HIB_EnableHibernateDomain(), XMC_SCU_GetMirrorStatus()

void XMC_SCU_HIB_EnterHibernateState ( void )
Returns
None
Description
Request enter external hibernate state
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_GetMirrorStatus()

void XMC_SCU_HIB_EnterHibernateStateEx ( XMC_SCU_HIB_HIBERNATE_MODE_t mode )
Parameters
mode hibernate mode XMC_SCU_HIB_HIBERNATE_MODE_t
Returns
None
Description
Request enter external hibernate state
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_GetMirrorStatus()

int32_t XMC_SCU_HIB_GetEventStatus ( void )
Returns
XMC_SCU_HIB_EVENT_t
Description
Returns status of hibernate wakeup events.
int32_t XMC_SCU_HIB_GetHibernateControlStatus ( void )
Returns
XMC_SCU_HIB_CTRL_STATUS_t
Description
Returns status of the external hibernate control.
XMC_SCU_HIB_RTCCLKSRC_t XMC_SCU_HIB_GetRtcClockSource ( void )
Returns
XMC_SCU_HIB_RTCCLKSRC_t Source of RTC clock.
Range: Use type XMC_SCU_HIB_RTCCLKSRC_t to identify the clock source.
XMC_SCU_HIB_RTCCLKSRC_OSI - internal slow oscillator(fOSI).
XMC_SCU_HIB_RTCCLKSRC_ULP - ultra low power oscillator(fULP).
Description
Provides the source of RTC clock (fRTC). The value is obtained by reading RCS bit of HDCR register. The frequency of the clock will be 32.768 kHz.
Related APIs:
XMC_SCU_HIB_SetRtcClockSource()

XMC_SCU_HIB_RTCCLKSRC_t XMC_SCU_HIB_GetStdbyClockSource ( void )
Returns
XMC_SCU_HIB_RTCCLKSRC_t Source clock of standby clock(fSTDBY).
Range: Use type XMC_SCU_HIB_STDBYCLKSRC_t to identify the clock source.
XMC_SCU_HIB_STDBYCLKSRC_OSI - internal slow oscillator (fOSI)
XMC_SCU_HIB_STDBYCLKSRC_OSCULP - ultra low power osciallator (fULP)
Description
Provides the source of standby clock (fSTDBY).

The value is obtained by reading STDBYSEL bits of HDCR register.
Related APIs:
XMC_SCU_HIB_SetStandbyClockSource(), XMC_SCU_HIB_EnableHibernateDomain()

bool XMC_SCU_HIB_IsHibernateDomainEnabled ( void )
Returns
bool Power status of hibernate domain.
Range: Boolean state value.
true if hibernate domain is enabled.
false if hibernate domain is disabled.
Description
Checks whether hibernation domain is enabled/disabled.

The API can be used before using the peripherals from hibernation domain to ensure that the power is supplied to the peripherals and also that the hibernation domain is not in reset state. The status is obtained using the HIBEN bit of PWRSTAT register and HIBRS bit of RSTSET register.
Related APIs:
XMC_SCU_HIB_EnableHibernateDomain(), XMC_SCU_HIB_DisableHibernateDomain()

bool XMC_SCU_HIB_IsWakeupEventDetected ( void )
Returns
Detection of a wakeup from hibernate mode
Description
Detection of a wakeup from hibernate mode
void XMC_SCU_HIB_LPAC_ClearStatus ( int32_t status )
Parameters
status HIB LPAC status. Values from XMC_SCU_HIB_LPAC_STATUS_t can be ORed.
Returns
None
Description
Clear status of HIB LPAC.
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Only available in XMC44, XMC42 and XMC41 series
int32_t XMC_SCU_HIB_LPAC_GetStatus ( void )
Returns
HIB LPAC status XMC_SCU_HIB_LPAC_STATUS_t
Description
Return status of HIB LPAC.
Note
Only available in XMC44, XMC42 and XMC41 series and in certain packages
void XMC_SCU_HIB_LPAC_SetHIBIO0Thresholds | ( | uint8_t | lower,
 |  | uint8_t | upper
 | ) |  |
Parameters
low | HIB_IO_0 low threshold
high | HIB_IO_0 high threshold
Returns
None
Description
Select compare thresholds for HIB_IO_0. After the reset of HCU the upper threshold is applied to LPAC for all consecutive measurements until it has been crossed upwards. Once upper threshold crossed upwards the lower threshold gets applied and remains applied for all consecutive measuremements until it has been crossed downwards and the threshold values gets swapped again.
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Only available in XMC44, XMC42 and XMC41 series
void XMC_SCU_HIB_LPAC_SetHIBIO1Thresholds | ( | uint8_t | lower,
 |  | uint8_t | upper
 | ) |  |
Parameters
low | HIB_IO_1 low threshold
high | HIB_IO_1 high threshold
Returns
None
Description
Select compare thresholds for HIB_IO_1. After the reset of HCU the upper threshold is applied to LPAC for all consecutive measurements until it has been crossed upwards. Once upper threshold crossed upwards the lower threshold gets applied and remains applied for all consecutive measuremements until it has been crossed downwards and the threshold values gets swapped again.
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Only available in XMC44 series and LQFP100 package
void XMC_SCU_HIB_LPAC_SetInput ( XMC_SCU_HIB_LPAC_INPUT_t input )
Parameters
input LPAC compare input. Values from XMC_SCU_HIB_LPAC_INPUT_t can be ORed.
Returns
None
Description
Selects inputs to the LPAC comparator. Several inputs can be selected (time multiplexing).
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Only available in XMC44, XMC42 and XMC41 series
void XMC_SCU_HIB_LPAC_SetTiming | ( | bool | enable_delay,
 |  | uint16_t | interval_count,
 |  | uint8_t | settle_count
 | ) |  |
Parameters
enable_delay | Enable conversion delay
interval_count | compare interval (interval_count + 16) * 1/32768 (s)
settle_count | settleing time of LPAC after powered up (triggered) before measurement start (settle_count + 1) * 1/32768 (s)
Returns
None
Description
Configures timing behavior of comparator.
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Only available in XMC44, XMC42 and XMC41 series
void XMC_SCU_HIB_LPAC_SetTrigger ( XMC_SCU_HIB_LPAC_TRIGGER_t trigger )
Parameters
trigger LPAC compare trigger
Returns
None
Description
Selects trigger mechanism to start a comparison.
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Only available in XMC44, XMC42 and XMC41 series
void XMC_SCU_HIB_LPAC_SetVBATThresholds | ( | uint8_t | lower,
 |  | uint8_t | upper
 | ) |  |
Parameters
low | VBAT low threshold
high | VBAT high threshold
Returns
None
Description
Select compare thresholds for VBAT. After the reset of HCU the upper threshold is applied to LPAC for all consecutive measurements until it has been crossed upwards. Once upper threshold crossed upwards the lower threshold gets applied and remains applied for all consecutive measuremements until it has been crossed downwards and the threshold values gets swapped again.
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Only available in XMC44, XMC42 and XMC41 series
void XMC_SCU_HIB_LPAC_TriggerCompare ( XMC_SCU_HIB_LPAC_INPUT_t input )
Parameters
input LPAC compare input. Values from XMC_SCU_HIB_LPAC_INPUT_t can be ORed.
Returns
None
Description
Trigger comparasion on the selected inputs.
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Only available in XMC44, XMC42 and XMC41 series
void XMC_SCU_HIB_SetInput0 ( XMC_SCU_HIB_IO_t pin )
Parameters
pin Hibernate domain dedicated pin XMC_SCU_HIB_IO_t
Returns
None
Description
Selects input to ERU0 module (HIB_SR0) that optionally can be used with software as a general purpose input.
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_HIB_SetSR0Input(), XMC_SCU_GetMirrorStatus()

void XMC_SCU_HIB_SetPinMode | ( | XMC_SCU_HIB_IO_t | pin,
 |  | XMC_SCU_HIB_PIN_MODE_t | mode
 | ) |  |
Parameters
pin | Hibernate domain dedicated pin XMC_SCU_HIB_IO_t
mode | Hibernate domain dedicated pin mode XMC_SCU_HIB_PIN_MODE_t
Returns
None
Description
Selects mode of hibernate domain dedicated pins HIB_IOx
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_GetMirrorStatus()

void XMC_SCU_HIB_SetPinOutputLevel | ( | XMC_SCU_HIB_IO_t | pin,
 |  | XMC_SCU_HIB_IO_OUTPUT_LEVEL_t | level
 | ) |  |
Parameters
pin | Hibernate domain dedicated pin XMC_SCU_HIB_IO_t
level | Output polarity of the hibernate domain dedicated pins HIB_IOx XMC_SCU_HIB_IO_OUTPUT_LEVEL_t
Returns
None
Description
Selects the output polarity of the hibernate domain dedicated pins HIB_IOx
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_GetMirrorStatus()

void XMC_SCU_HIB_SetRtcClockSource ( const XMC_SCU_HIB_RTCCLKSRC_t source )
Parameters
source Source of RTC clock.
Range: Use type XMC_SCU_HIB_RTCCLKSRC_t to identify the clock source.
XMC_SCU_HIB_RTCCLKSRC_OSI - internal slow oscillator(fOSI).
XMC_SCU_HIB_RTCCLKSRC_ULP - ultra low power oscillator(fULP).
Returns
None
Description
Selects the source of RTC clock (fRTC).

The value is configured to RCS bit of HDCR register. fULP needs external input powered by VBAT or VDDP. fOSI is internal clock. The frequency of the clock will be 32.768 kHz.
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_HIB_GetRtcClockSource()

void XMC_SCU_HIB_SetSR0Input ( XMC_SCU_HIB_SR0_INPUT_t input )
Parameters
input input signal HIB_SR0 of ERU0
Returns
None
Description
Selects input to ERU0 module (HIB_SR0).
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_HIB_SetInput0(),XMC_SCU_GetMirrorStatus()

void XMC_SCU_HIB_SetStandbyClockSource ( const XMC_SCU_HIB_STDBYCLKSRC_t source )
Parameters
source Source for standby clock.
Range: Use type XMC_SCU_HIB_STDBYCLKSRC_t to identify the clock source.
XMC_SCU_HIB_STDBYCLKSRC_OSI - internal slow oscillator (fOSI)
XMC_SCU_HIB_STDBYCLKSRC_OSCULP - ultra low power osciallator (fULP)
Returns
None
Description
Selects the source of Standby clock (fSTDBY).

Clock source is configured by setting the STDBYSEL bits of HDCR register. Hibernate domain should be enabled explicitly before using the API.
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_HIB_GetStdbyClockSource(), XMC_SCU_HIB_EnableHibernateDomain()

void XMC_SCU_HIB_SetWakeupTriggerInput ( XMC_SCU_HIB_IO_t pin )
Parameters
pin Hibernate domain dedicated pin XMC_SCU_HIB_IO_t
Returns
None
Description
Selects input for Wake-Up from Hibernate
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_GetMirrorStatus()

void XMC_SCU_HIB_TriggerEvent ( int32_t event )
Parameters
event Hibernate wakeup event XMC_SCU_HIB_EVENT_t
Returns
None
Description
Trigger hibernate wakeup event
Note
The register update in HIB domain is indicated by the MIRRST register which can be polled using XMC_SCU_GetMirrorStatus()
Related APIs:
XMC_SCU_HIB_ClearEventStatus(), XMC_SCU_HIB_EnableEvent(), XMC_SCU_HIB_DisableEvent(), XMC_SCU_GetMirrorStatus()

bool XMC_SCU_HighTemperature ( void )
Returns
bool Indicates if the measured die temperature value has exceeded the configured upper limit.
Range: true if the temperature value has exceeded the configured upper limit. false if the temperature value is less than the configured upper limit.
Description
Checks if the measured temperature has exceeded the configured upper limit of temperature.

The API checks OVERFL bit (Upper Limit Overflow Status bit) of DTEMPALARM register. The OVERFL bit will be set if the measured temperature has exceeded the limit configured in the bitfield UPPER in the DTEMPLIM register.
Related APIs:
XMC_SCU_SetRawTempLimits(),XMC_SCU_LowTemperature()

void XMC_SCU_INTERRUPT_ClearEventStatus ( const XMC_SCU_INTERRUPT_EVENT_t event )
Parameters
event Bit mask of the events to clear. Range: Use type XMC_SCU_INTERRUPT_EVENT_t for providing the input value. Multiple events can be combined using the OR operation.
Returns
None
Description
Clears the event status bit in SRRAW register.

The events are cleared by writing value 1 to their bit positions in the SRCLR register. The API can be used when polling method is used. After detecting the event, the event status should be cleared using software to detect the event again.
Related APIs:
XMC_SCU_INTERUPT_GetEventStatus(), XMC_SCU_INTERRUPT_TriggerEvent()

void XMC_SCU_INTERRUPT_DisableEvent ( const XMC_SCU_INTERRUPT_EVENT_t event )
Parameters
event Bit mask of the event to disable. Range: Use type XMC_SCU_INTERRUPT_EVENT_t for providing the input value. Multiple events can be combined using the OR operation.
Returns
None
Description
Disables generation of interrupt on occurrence of the input event.

The events are disabled by resetting the respective bit fields in the SRMSK register.
Related APIs:
NVIC_DisableIRQ(), XMC_SCU_INTERRUPT_EnableEvent()

void XMC_SCU_INTERRUPT_DisableNmiRequest ( const uint32_t request )
Parameters
request Non-maskable interrupt (NMI) request source to be disabled.
Range: Use type XMC_SCU_NMIREQ_t for selecting the source of NMI. Multiple sources can be combined using OR operation.
Returns
None
Description
Selectively disables interrupt sources from generating non maskable interrupt(NMI).

NMI assertion can be individually disabled by clearing corresponding bits in the NMIREQEN register.
Related APIs:
XMC_SCU_INTERRUPT_EnableNmiRequest()

void XMC_SCU_INTERRUPT_EnableEvent ( const XMC_SCU_INTERRUPT_EVENT_t event )
Parameters
event Bit mask of the event to enable. Range: Use type XMC_SCU_INTERRUPT_EVENT_t for providing the input value. Multiple events can be combined using the OR operation.
Returns
None
Description
Enables the generation of interrupt for the input events.

The events are enabled by setting the respective bit fields in the SRMSK register.
Note: User should separately enable the NVIC node responsible for handling the SCU interrupt. The interrupt will be generated when the respective event occurs.
Related APIs:
NVIC_EnableIRQ(), XMC_SCU_INTERRUPT_DisableEvent()

void XMC_SCU_INTERRUPT_EnableNmiRequest ( const uint32_t request )
Parameters
request Non-maskable interrupt (NMI) request source to be enabled.
Range: Use type XMC_SCU_NMIREQ_t for selecting the source of NMI. Multiple sources can be combined using OR operation.
Returns
None
Description
Selectively enables interrupt sources to generate non maskable interrupt(NMI).

NMI assertion can be individually enabled by setting corresponding bit of an interrupt in the NMIREQEN register.
Related APIs:
XMC_SCU_INTERRUPT_DisableNmiRequest()

XMC_SCU_STATUS_t XMC_SCU_INTERRUPT_SetEventHandler | ( | const XMC_SCU_INTERRUPT_EVENT_t | event,
 |  | const XMC_SCU_INTERRUPT_EVENT_HANDLER_t | handler
 | ) |  |
Parameters
event The event for which the interrupt handler is to be configured.
Range: Use type XMC_SCU_INTERRUPT_EVENT_t for identifying the event.
handler Name of the function to be executed when the event if detected.
Range: The function accepts no arguments and returns no value.
Returns
XMC_SCU_STATUS_t Status of configuring the event handler function for the selected event.
Range: XMC_SCU_STATUS_OK if the event handler is successfully configured.
XMC_SCU_STATUS_ERROR if the input event is invalid.
Description
Assigns the event handler function to be executed on occurrence of the selected event.

If the input event is valid, the handler function will be assigned to a table to be executed when the interrupt is generated and the event status is set in the event status register. By using this API, polling for a particular event can be avoided. This way the CPU utilization will be optimized. Multiple SCU events can generate a common interrupt. When the interrupt is generated, a common interrupt service routine is executed. It checks for status flags of events which can generate the interrupt. The handler function will be executed if the event flag is set.
Related APIs:
XMC_SCU_INTERRUPT_TriggerEvent(), XMC_SCU_INTERUPT_GetEventStatus()

void XMC_SCU_INTERRUPT_TriggerEvent ( const XMC_SCU_INTERRUPT_EVENT_t event )
Parameters
event Bit mask of the event to be triggered. Range: Use type XMC_SCU_INTERRUPT_EVENT_t for providing the input value. Multiple events can be combined using the OR operation.
Returns
None
Description
Triggers the event as if the hardware raised it.

Event will be triggered by setting the respective bitfield in the SRSET register.
Note: User should enable the NVIC node that handles the respective event for interrupt generation.
Related APIs:
NVIC_EnableIRQ(), XMC_SCU_INTERUPT_GetEventStatus(), XMC_SCU_INTERRUPT_ClearEventStatus()

XMC_SCU_INTERRUPT_EVENT_t XMC_SCU_INTERUPT_GetEventStatus ( void )
Returns
uint32_t Status of the SCU events.
Description
Provides the status of all SCU events.

The status is read from the SRRAW register. To check the status of a particular event, the returned value should be masked with the bit mask of the event. The bitmask of events can be obtained using the type XMC_SCU_INTERRUPT_EVENT_t. Multiple events' status can be checked by combining the bit masks using OR operation. After detecting the event, the event status should be cleared using software to detect the event again.
Related APIs:
XMC_SCU_INTERRUPT_ClearEventStatus(), XMC_SCU_INTERRUPT_TriggerEvent(), XMC_SCU_INTERRUPT_SetEventHandler()

void XMC_SCU_IRQHandler ( uint32_t sr_num )
Parameters
sr_num Service request number identifying the SCU interrupt generated.
Range: 0 to 2. XMC4x devices have one common SCU interrupt, so the value should be 0.
But XMC1x devices support 3 interrupt nodes.
Returns
None
Description
A common function to execute callback functions for multiple events.

It checks for the status of events which can generate the interrupt with the selected service request. If the event is set, the corresponding callback function will be executed. It also clears the event status bit.
Note: This is an internal function. It should not be called by the user application.
Related APIs:
XMC_SCU_INTERRUPT_SetEventHandler()

bool XMC_SCU_IsTemperatureSensorBusy ( void )
Returns
bool Indicates if the die temperature sensor is busy.
Range: true if sensor is busy in temperature measurement. false if sensor is free and can accept a new request for measurement.
Description
Checks whether Die Temperature Sensor (DTS) is busy in temperature measurement.

The status is read from the BUSY bit field of the DTSSTAT register.
Related APIs:
XMC_SCU_GetTemperatureMeasurement()

bool XMC_SCU_IsTemperatureSensorEnabled ( void )
Returns
Status of die temperature sensor.
Range: true - if temperature sensor is enabled.
false - if temperature sensor is disabled.
Description
Provides the die temperature sensor power status.

The status is obtained by reading the PWD bit of DTSCON register.
Related APIs:
XMC_SCU_EnableTemperatureSensor(), XMC_SCU_CalibrateTemperatureSensor(), XMC_SCU_StartTemperatureMeasurement(), XMC_SCU_GetTemperatureMeasurement()

bool XMC_SCU_IsTemperatureSensorReady ( void )
Returns
bool Status of die temperature sensor whether it is ready to start measurement.
Range:
true if temperature sensor is ready to start measurement.
false if temperature sensor is not ready to start measurement.
Description
Checks if the die temperature sensor is ready to start a measurement

The status is obtained by reading RDY bit of DTSSTAT register. It is recommended to check the ready status of die temperature sensor before starting it.
Related APIs:
XMC_SCU_StartTemperatureMeasurement(), XMC_SCU_IsTemperatureSensorBusy()

bool XMC_SCU_LowTemperature ( void )
Returns
bool Indicates if the measured die temperature value has dropped below the configured lower limit.
Range: true if the temperature value has dropped below the configured lower limit. false if the temperature value is higher than the configured lower limit.
Description
Checks if the measured temperature has dropped below the configured lower limit of temperature.

The API checks UNDERFL bit (Lower LimitUnderflow Status bit) of DTEMPALARM register. The UNDERFL bit will be set if the measured temperature has dropped below the limit configured in the bitfield LOWER in the DTEMPLIM register.
Related APIs:
XMC_SCU_SetRawTempLimits(),XMC_SCU_HighTemperature()

void XMC_SCU_PARITY_ClearStatus ( const uint32_t memory )
Parameters
memory The on-chip RAM type, for which the parity error status has to be cleared.
Range: Use type XMC_SCU_PARITY_t to identify the on-chip RAM type. Multiple memory status bits can be cleared by using the OR operation.
Returns
None
Description
Clears the parity error status bit.

When a memory parity error is detected using the status bits in PEFLAG register. It has to be cleared by software to detect the parity error from the same memory next time. The API clears the parity error status bit of the selected peripheral by setting the respective bit in the PEFLAG register. Status of multiple memory parity errors can be cleared by combining the enum values using OR operation.
Related APIs:
XMC_SCU_PARITY_GetStatus(), XMC_SCU_PARITY_Enable(), XMC_SCU_PARITY_EnableTrapGeneration()

void XMC_SCU_PARITY_Disable ( const uint32_t memory )
Parameters
memory The on-chip RAM type, for which the parity error checking has to be disabled.
Range: Use type XMC_SCU_PARITY_t to identify the on-chip RAM type. Multiple memory types can be combined using the OR operation.
Returns
None
Description
Disables parity error checking for the selected on-chip RAM type.

Parity error detection can be disabled by clearing the respective bit in the PEEN register.
Related APIs:
XMC_SCU_PARITY_Enable(), XMC_SCU_PARITY_DisableTrapGeneration()

void XMC_SCU_PARITY_DisableTrapGeneration ( const uint32_t memory )
Parameters
memory The on-chip RAM type, for which the parity error trap generation has to be disabled.
Range: Use type XMC_SCU_PARITY_t to identify the on-chip RAM type. Multiple memory types can be combined using the OR operation.
Returns
None
Description
Disables the assertion of trap for the parity error source.

Trap assertion can be disabled by clearing the respective bit of the RAM type in the PETE register.
Related APIs:
XMC_SCU_PARITY_EnableTrapGeneration()

void XMC_SCU_PARITY_Enable ( const uint32_t memory )
Parameters
memory The on-chip RAM type, for which the parity error checking has to be enabled.
Range: Use type XMC_SCU_PARITY_t to identify the on-chip RAM type. Multiple memory types can be combined using the OR operation.
Returns
None
Description
Enables parity error checking for the selected on-chip RAM type.

Parity error checking can be enabled by setting respective bits in the PEEN register. Additionally parity error can be configured to generate trap when the error is detected, using the API XMC_SCU_PARITY_EnableTrapGeneration(). Such a trap can be further configured to generate non maskable interrupt(NMI) using the API XMC_SCU_INTERRUPT_EnableNmiRequest().
Related APIs:
XMC_SCU_PARITY_EnableTrapGeneration(), XMC_SCU_INTERRUPT_EnableNmiRequest()

void XMC_SCU_PARITY_EnableTrapGeneration ( const uint32_t memory )
Parameters
memory The on-chip RAM type, for which the parity error trap generation has to be enabled.
Range: Use type XMC_SCU_PARITY_t to identify the on-chip RAM type. Multiple memory types can be combined using the OR operation.
Returns
None
Description
Enables trap assertion for the parity error source.

Parity error detection for different types of on-chip RAM can generate trap. Trap assertion for parity error can be individually enabled by setting the respective bits in the PETE register. The generated trap can be additionally configured to generate non maskable interrupt(NMI) using the API XMC_SCU_INTERRUPT_EnableNmiRequest().
Related APIs:
XMC_SCU_INTERRUPT_EnableNmiRequest(), XMC_SCU_PARITY_DisableTrapGeneration()

uint32_t XMC_SCU_PARITY_GetStatus ( void )
Returns
uint32_t Status of parity error detection for the on-chip RAM modules.
Range: Use type XMC_SCU_PARITY_t to get the bit mask of each RAM module type.
Description
Provides the status of parity error detection for the on-chip RAM modules.

Parity error status information is obtained from the PEFLAG register. If a particular RAM module has parity error, its respective bit field will be set to 1 in the returned value. A check for the status of a particular RAM module can be done by masking the returned value with the RAM module identifier from the type XMC_SCU_PARITY_t.
Related APIs:
XMC_SCU_PARITY_ClearStatus()

void XMC_SCU_POWER_DisableMonitor ( void )
Returns
None

Disable power monitoring control register for brown-out detection.

void XMC_SCU_POWER_DisableUsb ( void )
Returns
None
Description
Disables the USB PHY and also OTG comparator if available.

Configures the USBPHYPDQ bit of PWRSET register to move the USB PHY to power down state. If USB OTG is available in the device, the USBOTGEN bit of PWRSET register is set to 0. This disables the USB on the go comparators.
Related APIs:
XMC_SCU_POWER_EnableUsb(), XMC_SCU_CLOCK_SetUsbClockSource()

void XMC_SCU_POWER_EnableMonitor | ( | uint8_t | threshold,
 |  | uint8_t | interval
 | ) |  |
Parameters
threshold | Threshold value for comparison to VDDP for brownout detection. LSB33V is 22.5mV
interval | Interval value for comparison to VDDP expressed in cycles of system clock
Returns
None

Enable power monitoring control register for brown-out detection. Brown Out Trap need to be enabled using XMC_SCU_TRAP_Enable() and event handling done in NMI_Handler.

Related APIs:
XMC_SCU_TRAP_Enable()

void XMC_SCU_POWER_EnableUsb ( void )
Returns
None
Description
Enables the USB PHY and also OTG comparator if available.

Configures the USBPHYPDQ bit of PWRSET register to move the USB PHY from power down state. If USB OTG is available in the device, the USBOTGEN bit of PWRSET register is set to 1. This enables the USB on the go comparators.
Related APIs:
XMC_SCU_POWER_DisableUsb(), XMC_SCU_CLOCK_SetUsbClockSource()

float XMC_SCU_POWER_GetEVR13Voltage ( void )
Returns
EVR13 voltage in volts
Description
Returns EVR13 voltage in volts.
float XMC_SCU_POWER_GetEVR33Voltage ( void )
Returns
EVR33 voltage in volts
Description
Returns EVR33 voltage in volts
int32_t XMC_SCU_POWER_GetEVRStatus ( void )
Returns
XMC_SCU_POWER_EVR_STATUS_t
Description
Returns status of the EVR13.
void XMC_SCU_POWER_WaitForEvent ( XMC_SCU_POWER_MODE_t mode )
Parameters
mode Low power mode
Returns
None
Description
Enter selected low power mode and wait for event
Related APIs:
XMC_SCU_CLOCK_SetSleepConfig(), XMC_SCU_CLOCK_SetDeepSleepConfig()

void XMC_SCU_POWER_WaitForInterrupt | ( | XMC_SCU_POWER_MODE_t | mode,
 |  | bool | sleep_on_exit
 | ) |  |
Parameters
mode Low power mode
sleep_on_exit Enter sleep, or deep sleep, on return from an ISR
Returns
None
Description
Enter selected low power mode and wait for interrupt
Related APIs:
XMC_SCU_CLOCK_SetSleepConfig(), XMC_SCU_CLOCK_SetDeepSleepConfig()

uint32_t XMC_SCU_ReadFromRetentionMemory ( uint32_t address )
Parameters
address Location in the retention memory to be read.
Range: 4 bit address space is provided for selecting 16 words of 32 bits. equivalent to 64 bytes of data. address value should be from 0 to 15.
Returns
uint32_t 32 bit data read from retention memory. The API reads one word(4 bytes) of data from the address specified.
Range: 32 bit data.
Description
Reads data from selected address of retention memory in hibernate domain.

The retention memory is located in hibernate domain. It is used for the purpose of store/restore of context information. Access to the retention memory space is served over shared serial interface. Retention memory content is retained even in hibernate mode.
Related APIs:
XMC_SCU_WriteToRetentionMemory()

uint32_t XMC_SCU_ReadGPR ( const uint32_t index )
Parameters
index The SCU general purpose register to be read.
Range: 0 and 1 corresponding to GPR0 and GPR1.
Returns
uint32_t Data read from the selected general purpose register.
Description
Provides stored data from general purpose SCU register.

SCU consists of 2 general purpose registers. These registers can be used for storing data. The API reads from either GPR0 or GPR1 based on the index value.
Related APIs:
XMC_SCU_WriteGPR()

void XMC_SCU_RESET_AssertPeripheralReset ( const XMC_SCU_PERIPHERAL_RESET_t peripheral )
Parameters
peripheral The peripheral to be reset.
Range: Type XMC_SCU_PERIPHERAL_RESET_t enumerates all the peripherals that can be reset.
Returns
None
Description
Puts the specified peripheral in to reset state.

The API achieves reset of peripherals by setting the respective bit in the PRSET0, PRSET1 or PRSET2 register. Status of reset assertion automatically stored in the PRSTATn register and can be checked by user software to determine the state of the system and for debug purpose.
It is recommended to use following steps to assert a peripheral reset:
  • Call XMC_SCU_RESET_AssertPeripheralReset() with desired peripheral identifier.
  • Call XMC_SCU_RESET_IsPeripheralResetAsserted with same peripheral identifier to verify whether peripheral is in reset state.
Related APIs:
XMC_SCU_RESET_IsPeripheralResetAsserted()

void XMC_SCU_RESET_ClearDeviceResetReason ( void )
Returns
None
Description
Clears the reset reason bits in the reset status register.

Clearing of the reset status information in the SCU_RSTSTAT register via register bit RSTCLR.RSCLR is strongly recommended to ensure a clear indication of the cause of next reset.
Related APIs:
XMC_SCU_RESET_GetDeviceResetReason()

void XMC_SCU_RESET_DeassertPeripheralReset ( const XMC_SCU_PERIPHERAL_RESET_t peripheral )
Parameters
peripheral The peripheral to be moved out of reset state.
Range: Type XMC_SCU_PERIPHERAL_RESET_t enumerates all the peripherals that can be reset.
Returns
None
Description
Enables the specified peripheral by moving it out of reset state.

Any peripheral should be moved out of reset state for executing its functionality. The API enables the peripheral by setting its respective bit in the PRCLR0, PRCLR1 or PRCLR2 register. Status of reset deassertion is automatically stored in the PRSTATn register and can be checked by the user software to determine the state of the system and for debug purpose.
It is recommended to use following steps to deassert a peripheral reset:
  • Call XMC_SCU_RESET_DeassertPeripheralReset() with desired peripheral identifier.
  • Call XMC_SCU_RESET_IsPeripheralResetAsserted() with desired peripheral identifier to verify whether peripheral has been enabled.
Related APIs:
XMC_SCU_RESET_AssertPeripheralReset()

uint32_t XMC_SCU_RESET_GetDeviceResetReason ( void )
Returns
uint32_t Status representing the reason for device reset.
Description
Provides the value representing the reason for device reset.

The return value is an encoded word, which can indicate multiple reasons for the last reset. Each bit position of the returned word is representative of a last reset cause. The returned value should be appropriately masked to check the cause of reset. The cause of the last reset gets automatically stored in the SCU_RSTSTAT register. The reset status shall be reset after each startup in order to ensure consistent source indication after the next reset. Range: The type XMC_SCU_RESET_REASON_t can be used to get the bit masks of the reset cause.
Related APIs:
XMC_SCU_RESET_ClearDeviceResetReason()

bool XMC_SCU_RESET_IsPeripheralResetAsserted ( const XMC_SCU_PERIPHERAL_RESET_t peripheral )
Parameters
peripheral The peripheral, whose reset status has to be checked.
Range: Type XMC_SCU_PERIPHERAL_RESET_t enumerates all the peripherals.
Returns
bool Status of peripheral reset.
Range: true if peripheral is in reset state. false if peripheral is enabled and out of reset state.
Description
Checks the reset status of the selected peripheral.

The API reads the reset status from PRSTATn register. Returns true if the peripheral is in reset state. On power up of the device, all the peripherals will be in reset state. If the peripheral is enabled, false will be returned as the status.
Related APIs:
XMC_SCU_RESET_AssertPeripheralReset(), XMC_SCU_RESET_DeassertPeripheralReset()

void XMC_SCU_SetBootMode ( const XMC_SCU_BOOTMODE_t mode )
Parameters
mode Boot mode to be configured for the device.
Range: Use type XMC_SCU_BOOTMODE_t for selecting the boot mode.
Returns
None
Description
Configures the desired boot mode for the device.

The XMC4 series devices support multiple boot modes. A running application can set a desired bootmode and launch it by means of software reset. Switching of boot modes should be handled carefully. User should ensure that the initial boot sequence is executed. A stable execution environment should be maintained when program control is eventually handed over to the application program.
It is recommended to use following steps to launch requested bootmode:
  • Call XMC_SCU_SetBootMode() with desired boot mode value.
  • Trigger a software reset using system reset request by enabling a bit SYSRESETREQ of AIRCR register (PPB->AIRCR |= PPB_AIRCR_SYSRESETREQ_Msk).
Related APIs:
XMC_SCU_GetBootMode()

void XMC_SCU_SetCcuTriggerHigh ( const uint32_t trigger )
Parameters
trigger CCU slices to be triggered synchronously via software. The value is a bitmask of CCU slice bits in the register CCUCON.
Range: Use type XMC_SCU_CCU_TRIGGER_t for bitmask of individual CCU slices. Multiple slices can be combined using OR operation.
Returns
None
Description
Generates active edge(low to high) trigger for multiple CCU units at the same time.

Before executing this API, all the required CCU timers should configure external start. The edge of the start signal should be selected as active edge. The input signal for the CCU slice should be selected as SCU input. The above mentioned configurations can be made using the CCU LLD API XMC_CCU4_SLICE_StartConfig(). CCU timer slice should be started using XMC_CCU4_SLICE_StartTimer() before triggering the timer using this API.
Related APIs:
XMC_CCU4_SLICE_StartConfig(), XMC_CCU4_SLICE_SetInput(), XMC_SCU_SetCcuTriggerLow()

void XMC_SCU_SetCcuTriggerLow ( const uint32_t trigger )
Parameters
trigger CCU slices to be triggered synchronously via software. The value is a bitmask of CCU slice bits in the register CCUCON.
Range: Use type XMC_SCU_CCU_TRIGGER_t for bitmask of individual CCU slices. Multiple slices can be combined using OR operation.
Returns
None
Description
Generates passive edge(high to low) trigger for multiple CCU units at the same time.

Before executing this API, all the required CCU timers should configure external start. The edge of the start signal should be selected as passive edge. The input signal for the CCU slice should be selected as SCU input. The above mentioned configurations can be made using the CCU LLD API XMC_CCU4_SLICE_StartConfig(). CCU timer slice should be started using XMC_CCU4_SLICE_StartTimer() before triggering the timer using this API.
Related APIs:
XMC_CCU4_SLICE_StartConfig(), XMC_CCU4_SLICE_SetInput(), XMC_SCU_SetCcuTriggerHigh()

void XMC_SCU_SetRawTempLimits | ( | const uint32_t | lower_temp,
 |  | const uint32_t | upper_temp
 | ) |  |
Parameters
lower_temp | Lower threshold of die temperature. If measured temperature falls below this value, alarm bit will be set in UNDERFL bit field of DTEMPALARM register.
upper_temp | Upper threshold of die temperature. If measured temperature exceeds this value, alarm bit will be set in OVERFL bit field of DTEMPALARM register.
Returns
None
Description
Configures the lower and upper threshold of die temperature.

API configures DTEMPLIM register for upper and lower die temperature threshold limits. When the measured temperature is outside the range defined by the limits, alarm bits UNDERFL or OVERFL will be set in the register DTEMPALARM.
It is recommended to use following steps:
  • Call XMC_SCU_StopTempMeasurement to stop temperature measurement if it was started previously.
  • Call XMC_SCU_SetRawTempLimits with desired lower and upper temperature threshold limit values.
  • Call XMC_SCU_StartTempMeasurement to start temperature measurement.
  • Use XMC_SCU_HighTemperature() and XMC_SCU_LowTemperature() to monitor the temperature.
Related APIs:
XMC_SCU_HighTemperature(), XMC_SCU_LowTemperature()

XMC_SCU_STATUS_t XMC_SCU_StartTemperatureMeasurement ( void )
Returns
XMC_SCU_STATUS_t Result of starting the temperature measurement.
Range:
XMC_SCU_STATUS_OK if the measurement is started successfully.
XMC_SCU_STATUS_ERROR if temperature sensor is not enabled.
XMC_SCU_STATUS_BUSY if temperature sensor is busy measuring the temperature.
Description
Starts die temperature measurement using internal temperature sensor.

The API checks if the temperature sensor is enabled and is not busy in measurement.
It is recommended to use following steps:
  • Call XMC_SCU_StopTempMeasurement to stop temperature measurement if it was started previously.
  • Call XMC_SCU_SetRawTempLimits with desired lower and upper temperature threshold limit values if it is needed.
  • Call XMC_SCU_StartTempMeasurement to start temperature measurement.
  • Check whether Die Temperature Sensor (DTS) is busy in conversion by calling XMC_SCU_IsTemperatureSensorBusy() and wait till conversion complete.
  • Read the die temperature value using XMC_SCU_GetTemperatureMeasurement API.
Related APIs:
XMC_SCU_EnableTemperatureSensor(), XMC_SCU_CalibrateTemperatureSensor(), XMC_SCU_GetTemperatureMeasurement()

void XMC_SCU_TRAP_ClearStatus ( const uint32_t trap )
Parameters
trap The event for which, trap status bit has to be cleared.
Range: Use type XMC_SCU_TRAP_t to identify the event.
Returns
None
Description
Clears the trap status of input event.

Once a trap event is detected, it will have to be acknowledged and later serviced. The trap status bit should be cleared to detect the occurence of trap next time. This is useful while polling for TRAPSTAT without enabling the NMI for trap. Trap status can be cleared by setting the event bit in the TRAPCLR register.
Related APIs:
XMC_SCU_INTERRUPT_EnableNmiRequest(), XMC_SCU_TRAP_GetStatus()

void XMC_SCU_TRAP_Disable ( const uint32_t trap )
Parameters
trap The event for which, trap generation has to be disabled.
Range: Use type XMC_SCU_TRAP_t to identify the event.
Returns
None
Description
Disables assertion of trap for the selected trap event.

Trap assertion can be individually disabled by setting the respective event bit in the TRAPDIS register in order to suppress trap generation.
Related APIs:
XMC_SCU_TRAP_Enable(), XMC_SCU_TRAP_ClearStatus(), XMC_SCU_TRAP_GetStatus()

void XMC_SCU_TRAP_Enable ( const uint32_t trap )
Parameters
trap The event for which, trap generation has to be enabled.
Range: Use type XMC_SCU_TRAP_t to identify the event.
Returns
None
Description
Enables assertion of trap for the selected trap event.

Trap assertion can be individually enabled by clearing respective bit of the event in TRAPDIS register in order to get an exception.
Related APIs:
XMC_SCU_TRAP_Disable(), XMC_SCU_TRAP_ClearStatus(), XMC_SCU_TRAP_GetStatus()

uint32_t XMC_SCU_TRAP_GetStatus ( void )
Returns
uint32_t Status of trap generating events.
Range: Use type XMC_SCU_TRAP_t to identify the event. The returned value indicates the status of multiple events at their respective bit positions. User should mask the bits of the events of interest using the type specified.
Description
Provides the status of trap generating events.

The status is read from TRAPRAW register. Status of the specific events can be checked using their respective bits in the TRAPRAW register. The bit masks can be obtained from the enumeration type XMC_SCU_TRAP_t. Multiple events can be combined using OR operation. A trap event is considered to be asserted if the respective bit of the event is set to 1.
Related APIs:
XMC_SCU_INTERRUPT_EnableNmiRequest(), XMC_SCU_TRAP_ClearStatus()

void XMC_SCU_TRAP_Trigger ( const uint32_t trap )
Parameters
trap The event for which, trap has to be triggered.
Range: Use type XMC_SCU_TRAP_t to identify the event.
Returns
None
Description
Triggers trap generation for the event specified.

The trap source has to be enabled before invocation of this API. Trap event can be triggered by setting its respective bit in the TRAPSET register. Trap event can be configured to generate a non maskable interrupt by using the API XMC_SCU_INTERRUPT_EnableNmiRequest().
It is recommended to use following steps to manually assert a trap event:
  • Call XMC_SCU_TRAP_EnableEvent with desired trap request source ID.
  • Call XMC_SCU_TRAP_SetEvent with same trap request source ID to manually assert a trap event.
Related APIs:
XMC_SCU_INTERRUPT_EnableNmiRequest(), XMC_SCU_TRAP_GetStatus()

void XMC_SCU_WriteGPR | ( | const uint32_t | index,
 |  | const uint32_t | data
 | ) |  |
Parameters
index The SCU general purpose register to be written.
Range: 0 and 1 corresponding to GPR0 and GPR1.
data Data to be written to the selected general purpose register.
Returns
None
Description
Stores data in the selected general purpose SCU register.

SCU consists of 2 general purpose registers. These registers can be used for storing data. The API writes data to either GPR0 or GPR1 based on the index value.
Related APIs:
XMC_SCU_ReadGPR()

void XMC_SCU_WriteToRetentionMemory | ( | uint32_t | address,
 |  | uint32_t | data
 | ) |  |
Parameters
address Location in the retention memory to be written.
Range: 4 bit address space is provided for selecting 16 words of 32 bits. equivalent to 64 bytes of data. address value should be from 0 to 15.
data 32 bit data to be written into retention memory. The API writes one word(4 bytes) of data to the address specified.
Range: 32 bit data.
Returns
None
Description
Writes input data to the selected address of Retention memory in hibernate domain.

The retention memory is located in hibernate domain. It is used for the purpose of store/restore of context information. Access to the retention memory space is served over shared serial interface. Retention memory content is retained even in hibernate mode.
Related APIs:
XMC_SCU_ReadFromRetentionMemory()

Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_SCU_CLOCK_CONFIG_t Struct Reference

Data Fields
XMC_SCU_CLOCK_CONFIG_t Struct Reference
XMC Peripheral Library » SCU

#include <xmc4_scu.h>

Data Fields

XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_t calibration_mode
bool | enable_oschp
bool | enable_osculp
uint8_t | fccu_clkdiv
uint8_t | fcpu_clkdiv
uint8_t | fperipheral_clkdiv
XMC_SCU_HIB_STDBYCLKSRC_t fstdby_clksrc
uint8_t | fsys_clkdiv
XMC_SCU_CLOCK_SYSCLKSRC_t fsys_clksrc
XMC_SCU_CLOCK_SYSPLL_CONFIG_t syspll_config

Detailed Description

Defines a data structure used for initializing the clock functional block. Clock functional block configures clock source needed for various peripheral and its divider values. Use type XMC_SCU_CLOCK_CONFIG_t for accessing these structure parameters.

Field Documentation

XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_t calibration_mode

Backup clock trimming mode.

bool enable_oschp

Enable external high precision oscillator. Should be enabled when fOHP has to be source of system clock.

bool enable_osculp

Enable external ultra low power oscillator. Should be enabled when fULP has to be source of standby clock(fSTDBY).

uint8_t fccu_clkdiv

Ratio of fSys to fCCU.

uint8_t fcpu_clkdiv

Ratio of fSys to fCPU.

uint8_t fperipheral_clkdiv

Ratio of fSYS to fPERI.

XMC_SCU_HIB_STDBYCLKSRC_t fstdby_clksrc

Standby clock source.

uint8_t fsys_clkdiv

Ratio of fPLL to fSYS.

XMC_SCU_CLOCK_SYSCLKSRC_t fsys_clksrc

Choice of system clock.

XMC_SCU_CLOCK_SYSPLL_CONFIG_t syspll_config

PLL configuration

The documentation for this struct was generated from the following file:
  • xmc4_scu.h


XMC Peripheral Library for XMC4000 Family: XMC_SCU_CLOCK_SYSPLL_CONFIG_t Struct Reference

Data Fields
XMC_SCU_CLOCK_SYSPLL_CONFIG_t Struct Reference
XMC Peripheral Library » SCU

#include <xmc4_scu.h>

Data Fields

XMC_SCU_CLOCK_SYSPLLCLKSRC_t clksrc
uint8_t | k_div
XMC_SCU_CLOCK_SYSPLL_MODE_t mode
uint8_t | n_div
uint8_t | p_div

Detailed Description

Defines a data structure for initializing the PLL functional block. Structure holds divider values for N-DIV, P-DIV, K1-DIV, K2-DIV in order to generate desired frequency using VCO. It holds the PLL mode of operation either normal or prescaler (VCO bypassed). Use type XMC_SCU_CLOCK_PLL_CONFIG_t for accessing these structure parameters.

Field Documentation

XMC_SCU_CLOCK_SYSPLLCLKSRC_t clksrc

PLL divider input frequency.

uint8_t k_div

K1-Divider(Prescalar mode) or K2-Divider (Normal mode).

XMC_SCU_CLOCK_SYSPLL_MODE_t mode

PLL mode of operation.

uint8_t n_div

PLL N-Divider value.

uint8_t p_div

PLL P-Divider value.

The documentation for this struct was generated from the following file:
  • xmc4_scu.h


XMC Peripheral Library for XMC4000 Family: SDMMC

Data Structures | Macros | Enumerations | Functions
SDMMC
XMC Peripheral Library

Data Structures

union | XMC_SDMMC_COMMAND_t
struct | XMC_SDMMC_CONFIG_t
union | XMC_SDMMC_PRESENT_STATE_t
struct | XMC_SDMMC_RESPONSE_t
struct | XMC_SDMMC_t
struct | XMC_SDMMC_TRANSFER_MODE_t

Macros

#define XMC_SDMMC ((XMC_SDMMC_t *)SDMMC_BASE)

Enumerations

Functions

void | XMC_SDMMC_BusPowerOff (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_BusPowerOn (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_ClearEvent (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_Disable (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_DisableDelayCmdDatLines (void)
void | XMC_SDMMC_DisableEvent (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_DisableEventStatus (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_DisableHighSpeed (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_DisableInterruptAtBlockGap (XMC_SDMMC_t *const sdmmc, const XMC_SDMMC_CONFIG_t *config)
void | XMC_SDMMC_DisableWakeupEvent (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_Enable (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_EnableDelayCmdDatLines (void)
void | XMC_SDMMC_EnableEvent (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_EnableEventStatus (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_EnableHighSpeed (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_EnableInterruptAtBlockGap (XMC_SDMMC_t *const sdmmc, const XMC_SDMMC_CONFIG_t *config)
void | XMC_SDMMC_EnableWakeupEvent (XMC_SDMMC_t *const sdmmc, uint32_t event)
bool | XMC_SDMMC_GetACMDErrStatus (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_ACMD_ERR_t error)
uint32_t | XMC_SDMMC_GetAutoCommandResponse (const XMC_SDMMC_t *const sdmmc)
bool | XMC_SDMMC_GetClockStability (XMC_SDMMC_t *const sdmmc)
uint32_t | XMC_SDMMC_GetCommandResponse (XMC_SDMMC_t *const sdmmc)
bool | XMC_SDMMC_GetContinueRequest (XMC_SDMMC_t *const sdmmc)
bool | XMC_SDMMC_GetEvent (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_EVENT_t event)
bool | XMC_SDMMC_GetPowerStatus (XMC_SDMMC_t *const sdmmc)
XMC_SDMMC_PRESENT_STATE_t | XMC_SDMMC_GetPresentState (const XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_GetR2Response (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_RESPONSE_t *const response)
uint32_t | XMC_SDMMC_GetSWResetStatus (XMC_SDMMC_t *const sdmmc)
uint32_t | XMC_SDMMC_GetTransferBlocksNum (XMC_SDMMC_t *const sdmmc)
XMC_SDMMC_STATUS_t | XMC_SDMMC_Init (XMC_SDMMC_t *const sdmmc, const XMC_SDMMC_CONFIG_t *config)
bool | XMC_SDMMC_IsAllDataLinesHigh (XMC_SDMMC_t *const sdmmc)
bool | XMC_SDMMC_IsAnyErrorEvent (XMC_SDMMC_t *const sdmmc)
bool | XMC_SDMMC_IsCommandLineBusy (XMC_SDMMC_t *const sdmmc)
bool | XMC_SDMMC_IsDataLineBusy (XMC_SDMMC_t *const sdmmc)
uint32_t | XMC_SDMMC_ReadFIFO (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_SDClockDisable (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_SDClockEnable (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_SDClockFreqSelect (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_SDCLK_FREQ_SEL_t clk)
XMC_SDMMC_STATUS_t | XMC_SDMMC_SendCommand (XMC_SDMMC_t *const sdmmc, const XMC_SDMMC_COMMAND_t *command, uint32_t arg)
void | XMC_SDMMC_SetBusVoltage (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_BUS_VOLTAGE_t bus_voltage)
void | XMC_SDMMC_SetCardDetectionSource (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_CD_SOURCE_t source)
void | XMC_SDMMC_SetCardDetectionStatus (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_CD_STATUS_t status)
void | XMC_SDMMC_SetContinueRequest (XMC_SDMMC_t *const sdmmc, bool enabled)
void | XMC_SDMMC_SetDataLineTimeout (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_DAT_TIMEOUT_COUNTER_t timeout)
void | XMC_SDMMC_SetDataTransferDirection (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_DATA_TRANSFER_DIR_t dir)
void | XMC_SDMMC_SetDataTransferMode (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_TRANSFER_MODE_t *const transfer_mode)
void | XMC_SDMMC_SetDataTransferWidth (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_DATA_LINES_t lines)
void | XMC_SDMMC_SetDelay (uint8_t tapdel)
void | XMC_SDMMC_SetReadWaitControl (XMC_SDMMC_t *const sdmmc, bool enabled)
void | XMC_SDMMC_SetStopAtBlockGap (XMC_SDMMC_t *const sdmmc, bool enabled)
void | XMC_SDMMC_SetSWReset (XMC_SDMMC_t *const sdmmc, uint32_t reset_mode)
void | XMC_SDMMC_Start (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_Stop (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_TriggerACMDErr (XMC_SDMMC_t *const sdmmc, uint32_t error)
void | XMC_SDMMC_TriggerEvent (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_WriteFIFO (XMC_SDMMC_t *const sdmmc, uint32_t *data)

Detailed Description

The SDMMC peripheral provides an interface between SD/SDIO/MMC cards and the AHB. It handles the SD/SDIO protocol at transmission level. It automatically packs data and checks for CRC, start/end bits and format correctness. For SD cards, a maximum transfer rate of 24MB/sec is supported and for MMC cards, 48MB/sec.

The peripheral can be used for applications that require large storage memory; e.g. Data logging, firmware updates or an embedded database.

The SDMMC low level driver provides functions to configure and initialize the SDMMC hardware peripheral.

Macro Definition Documentation

#define XMC_SDMMC ((XMC_SDMMC_t *)SDMMC_BASE)

A convenient symbol for the SDMMC peripheral base address

Enumeration Type Documentation

enum XMC_SDMMC_ACMD_ERR_t

CMD12 response errors of Auto CMD12

Enumerator
XMC_SDMMC_ACMD12_NOT_EXEC_ERR | ACMD12 not executed error
XMC_SDMMC_ACMD_TIMEOUT_ERR | ACMD timeout error
XMC_SDMMC_ACMD_CRC_ERR | ACMD CRC error
XMC_SDMMC_ACMD_END_BIT_ERR | ACMD end bit error
XMC_SDMMC_ACMD_IND_ERR | ACMD IND error
XMC_SDMMC_CMD_NOT_ISSUED_BY_ACMD12_ERR | CMD not issued by ACMD12
enum XMC_SDMMC_BUS_VOLTAGE_t

SDMMC bus voltage level

enum XMC_SDMMC_CD_SOURCE_t

SDMMC card detection signal source

enum XMC_SDMMC_CD_STATUS_t

SDMMC card detection status

enum XMC_SDMMC_COMMAND_RESPONSE_t

Command response selection

Enumerator
XMC_SDMMC_COMMAND_RESPONSE_NONE | No Response
XMC_SDMMC_COMMAND_RESPONSE_LONG | Response length 136
XMC_SDMMC_COMMAND_RESPONSE_SHORT | Response length 48
XMC_SDMMC_COMMAND_RESPONSE_SHORT_BUSY | Response length 48 check Busy after response
enum XMC_SDMMC_COMMAND_TYPE_t

Types of SDMMC commands

Enumerator
XMC_SDMMC_COMMAND_TYPE_NORMAL | Command normal
XMC_SDMMC_COMMAND_TYPE_SUSPEND | Command suspend
XMC_SDMMC_COMMAND_TYPE_RESUME | Command resume
XMC_SDMMC_COMMAND_TYPE_ABORT | Command abort
enum XMC_SDMMC_DAT_TIMEOUT_COUNTER_t

Data line timeout counter values

Enumerator
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_14 | SDCLK * (2 ^ 13)
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_15 | SDCLK * (2 ^ 14)
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_16 | SDCLK * (2 ^ 15)
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_17 | SDCLK * (2 ^ 16)
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_18 | SDCLK * (2 ^ 17)
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_19 | SDCLK * (2 ^ 18)
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_20 | SDCLK * (2 ^ 19)
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_21 | SDCLK * (2 ^ 20)
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_22 | SDCLK * (2 ^ 21)
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_23 | SDCLK * (2 ^ 22)
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_24 | SDCLK * (2 ^ 23)
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_25 | SDCLK * (2 ^ 24)
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_26 | SDCLK * (2 ^ 25)
XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_27 | SDCLK * (2 ^ 26)
enum XMC_SDMMC_DATA_LINES_t

Number of data lines for SDMMC data transfer

Enumerator
XMC_SDMMC_DATA_LINES_1 | Single data line mode
XMC_SDMMC_DATA_LINES_4 | 4-bit mode
XMC_SDMMC_DATA_LINES_8 | SD 8-bit mode
enum XMC_SDMMC_DATA_TRANSFER_DIR_t

SDMMC data transfer direction

Enumerator
XMC_SDMMC_DATA_TRANSFER_CARD_TO_HOST

Host to card Card to host

enum XMC_SDMMC_EVENT_t

SDMMC events (Normal and error events)

Enumerator
XMC_SDMMC_CMD_COMPLETE | Command complete event
XMC_SDMMC_TX_COMPLETE | Transmit complete event
XMC_SDMMC_BLOCK_GAP_EVENT | Block gap event
XMC_SDMMC_BUFFER_WRITE_READY | Buffer write ready event
XMC_SDMMC_BUFFER_READ_READY | Buffer read ready event
XMC_SDMMC_CARD_INS | Card insert event
XMC_SDMMC_CARD_REMOVAL | Card removal event
XMC_SDMMC_CARD_INT | Card INT event
XMC_SDMMC_CARD_ERR | Card error interrupt
XMC_SDMMC_CMD_TIMEOUT_ERR | Command time-out error
XMC_SDMMC_CMD_CRC_ERR | Command CRC error
XMC_SDMMC_CMD_END_BIT_ERR | Command end bit error
XMC_SDMMC_CMD_IND_ERR | Command index error
XMC_SDMMC_DATA_TIMEOUT_ERR | Data time-out error
XMC_SDMMC_DATA_CRC_ERR | Data CRC error
XMC_SDMMC_DATA_END_BIT_ERR | Data end bit error
XMC_SDMMC_CURRENT_LIMIT_ERR | Current limit error
XMC_SDMMC_ACMD_ERR | ACMD error
XMC_SDMMC_TARGET_RESP_ERR | Target response error
enum XMC_SDMMC_RESPONSE_TYPE_t

SDMMC response types

Enumerator
XMC_SDMMC_RESPONSE_TYPE_NO_RESPONSE | No response
XMC_SDMMC_RESPONSE_TYPE_R1 | Response type: R1
XMC_SDMMC_RESPONSE_TYPE_R1b | Response type: R1b
XMC_SDMMC_RESPONSE_TYPE_R2 | Response type: R2
XMC_SDMMC_RESPONSE_TYPE_R3 | Response type: R3
XMC_SDMMC_RESPONSE_TYPE_R6 | Response type: R6
XMC_SDMMC_RESPONSE_TYPE_R7 | Response type: R7
enum XMC_SDMMC_SDCLK_FREQ_SEL_t

Valid SD clock frequency divider selection

Enumerator
XMC_SDMMC_CLK_DIV_1 | Base clock (10 Mhz -> 63 Mhz)
XMC_SDMMC_CLK_DIV_2 | Base clock divided by 2
XMC_SDMMC_CLK_DIV_4 | Base clock divided by 4
XMC_SDMMC_CLK_DIV_8 | Base clock divided by 8
XMC_SDMMC_CLK_DIV_16 | Base clock divided by 16
XMC_SDMMC_CLK_DIV_32 | Base clock divided by 32
XMC_SDMMC_CLK_DIV_64 | Base clock divided by 64
XMC_SDMMC_CLK_DIV_128 | Base clock divided by 128
XMC_SDMMC_CLK_DIV_256 | Base clock divided by 256
enum XMC_SDMMC_STATUS_t

Status return values for the SDMMC low level driver

Enumerator
XMC_SDMMC_STATUS_SUCCESS | Operation successful
XMC_SDMMC_STATUS_CMD_LINE_BUSY | Command line busy
XMC_SDMMC_STATUS_DAT_LINE_BUSY | Data line busy
enum XMC_SDMMC_SW_RESET_t

SDMMC software reset modes

Enumerator
XMC_SDMMC_SW_RESET_ALL | Software reset all
XMC_SDMMC_SW_RST_CMD_LINE | Software reset command line
XMC_SDMMC_SW_RST_DAT_LINE | Software reset data line
enum XMC_SDMMC_TRANSFER_MODE_AUTO_CMD_t

Auto command transfer modes

Enumerator
XMC_SDMMC_TRANSFER_MODE_AUTO_CMD_DISABLED | ACMD mode disabled
XMC_SDMMC_TRANSFER_MODE_AUTO_CMD_12 | ACMD12 mode
enum XMC_SDMMC_TRANSFER_MODE_TYPE_t

SDMMC transfer modes

Enumerator
XMC_SDMMC_TRANSFER_MODE_TYPE_SINGLE | Transfer mode type: single
XMC_SDMMC_TRANSFER_MODE_TYPE_INFINITE | Transfer mode type: infinite
XMC_SDMMC_TRANSFER_MODE_TYPE_MULTIPLE | Transfer mode type: multiple
XMC_SDMMC_TRANSFER_MODE_TYPE_STOP_MULTIPLE | Transfer mode type: multiple stop
enum XMC_SDMMC_WAKEUP_EVENT_t

SDMMC wakeup events

Enumerator
XMC_SDMMC_WAKEUP_EN_CARD_INT | Wakeup on card interrupt
XMC_SDMMC_WAKEUP_EN_CARD_INS | Wakeup on SD card insertion
XMC_SDMMC_WAKEUP_EN_CARD_REM | Wakeup SD card removal

Function Documentation

void XMC_SDMMC_BusPowerOff ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
None
Description:
Disable SDMMC bus power
The function resets the SD_BUS_POWER bit-field in the POWER_CTRL register, disabling the bus power.
void XMC_SDMMC_BusPowerOn ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
None
Description:
Enable SDMMC bus power
The function sets the SD_BUS_POWER bit-field in the POWER_CTRL register, enabling the bus power. It may be invoked after enabling the SD clock (XMC_SDMMC_SDClockEnable()).
void XMC_SDMMC_ClearEvent | ( | XMC_SDMMC_t *const | sdmmc,
 |  | uint32_t | event
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
event | A valid SDMMC event (XMC_SDMMC_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Clear SDMMC event(s)
The function clears requested normal/error events by settings the bit-fields of the INT_STATUS register. Please check SDMMC_INT_STATUS_NORM in the XMC45000 manual for more details.
void XMC_SDMMC_Disable ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
None
Description:
Disable SDMMC peripheral
The function asserts the peripheral reset.
void XMC_SDMMC_DisableDelayCmdDatLines ( void )
Parameters
None
Returns
None
Description:
Disable delay on the command/data out lines
Use the function to disable delay on the command/data out lines.
void XMC_SDMMC_DisableEvent | ( | XMC_SDMMC_t *const | sdmmc,
 |  | uint32_t | event
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
event | A valid SDMMC event (XMC_SDMMC_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Disable normal and error SDMMC event(s)
The function disables the interrupt generation for the requested events by clearing the bit-fields of EN_INT_SIGNAL_NORM and EN_INT_SIGNAL_ERR registers.
Note:
The XMC_SDMMC_DisableEvent() function doesn't reset the the interrupt status. One may still use XMC_SDMMC_GetEvent() to check the status of requested events even if the interrupt generation is already disabled.
void XMC_SDMMC_DisableEventStatus | ( | XMC_SDMMC_t *const | sdmmc,
 |  | uint32_t | event
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
event | A valid SDMMC event (XMC_SDMMC_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Disable event status
The function resets the bit-fields of EN_INT_STATUS_NORM and EN_INT_STATUS_ERR registers to disable interrupt status for requested normal/error SDMMC events.
void XMC_SDMMC_DisableHighSpeed ( XMC_SDMMC_t *const sdmmc )
Parameters
None
Returns
None
Description:
High speed disable
Use the function to disable high speed operation. The host controller will switch back to a normal speed mode. In this mode, the host controller outputs command and data lines at 25 MHz for SD.
void XMC_SDMMC_DisableInterruptAtBlockGap | ( | XMC_SDMMC_t *const | sdmmc,
 |  | const XMC_SDMMC_CONFIG_t * | config
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
config | A pointer to the SDMMC configuration structure (XMC_SDMMC_CONFIG_t)
Returns
None
Description:
Disable interrupt at block gap
The function resets the BLOCK_GAP_CTRL.INT_AT_BLOCK_GAP bit-field to disable interrupt at block gap. This bit is only valid in a 4-bit mode of the SDIO card.
void XMC_SDMMC_DisableWakeupEvent | ( | XMC_SDMMC_t *const | sdmmc,
 |  | uint32_t | event
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
event | A valid SDMMC wakeup event (XMC_SDMMC_WAKEUP_EVENT_t) or a valid combination of logically OR'd wakeup events
Returns
None
Description:
Disable wakeup event(s)
The function disables SDMMC wakeup events by clearing appropriate bit-fields of the WAKEUP_CTRL register.

List of supported wakeup events -> Wakeup on:
1) Card interrupt
2) SD card insertion
3) SD card removal

void XMC_SDMMC_Enable ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
None
Description:
Enable SDMMC peripheral
The function de-asserts the peripheral reset. The peripheral needs to be initialized.
void XMC_SDMMC_EnableDelayCmdDatLines ( void )
Parameters
None
Returns
None
Description:
Enable delay on the command/data out lines
Use the function to enable delay on the command/data out lines. Invoke this function before selecting the number of delay elements.
void XMC_SDMMC_EnableEvent | ( | XMC_SDMMC_t *const | sdmmc,
 |  | uint32_t | event
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
event | A valid SDMMC event (XMC_SDMMC_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Enable SDMMC normal and error event(s)
The function first sets the bit-fields of EN_INT_STATUS_NORM and EN_INT_STATUS_ERR registers to enable interrupt status for requested normal/error SDMMC events. It then sets the bit-fields of EN_INT_SIGNAL_NORM and EN_INT_SIGNAL_ERR to enable the interrupt generation for the requested events.
void XMC_SDMMC_EnableEventStatus | ( | XMC_SDMMC_t *const | sdmmc,
 |  | uint32_t | event
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
event | A valid SDMMC event (XMC_SDMMC_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Enable event status
The function sets the bit-fields of EN_INT_STATUS_NORM and EN_INT_STATUS_ERR registers to enable interrupt status for requested normal/error SDMMC events.
void XMC_SDMMC_EnableHighSpeed ( XMC_SDMMC_t *const sdmmc )
Parameters
None
Returns
None
Description:
High speed enable
Use the function to enable high speed operation. The default is a normal speed operation. Once enabled, the host controller outputs command and data lines at the rising edge of the SD clock (up to 50 MHz for SD).
void XMC_SDMMC_EnableInterruptAtBlockGap | ( | XMC_SDMMC_t *const | sdmmc,
 |  | const XMC_SDMMC_CONFIG_t * | config
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
config | A pointer to the SDMMC configuration structure (XMC_SDMMC_CONFIG_t)
Returns
None
Description:
Enable interrupt at block gap
The function sets the BLOCK_GAP_CTRL.INT_AT_BLOCK_GAP bit-field to enable interrupt at block gap for a multi-block transfer. This bit is only valid in a 4-bit mode of the SDIO card.
void XMC_SDMMC_EnableWakeupEvent | ( | XMC_SDMMC_t *const | sdmmc,
 |  | uint32_t | event
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
event | A valid SDMMC wakeup event (XMC_SDMMC_WAKEUP_EVENT_t) or a valid combination of logically OR'd wakeup events
Returns
None
Description:
Enable wakeup event(s)
The function enables SDMMC wakeup events by setting appropriate bit-fields of the WAKEUP_CTRL register.

List of supported wakeup events -> Wakeup on:
1) Card interrupt
2) SD card insertion
3) SD card removal

bool XMC_SDMMC_GetACMDErrStatus | ( | XMC_SDMMC_t *const | sdmmc,
 |  | XMC_SDMMC_ACMD_ERR_t | error
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
error | A valid SDMMC ACMD error (XMC_SDMMC_ACMD_ERR_t)
Returns
bool
Description:
Get status of Auto CMD12 errors
The function detects the presence of an Auto CMD12 error. A boolean is returned to indicate if an error is detected.
uint32_t XMC_SDMMC_GetAutoCommandResponse ( const XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
uint32_t Auto command response value
Description:
Get card response of Auto commands
This function returns card response [39:8] bits of auto commands: R1 of Auto CMD 23 and R1b of Auto CMD 12.
bool XMC_SDMMC_GetClockStability ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
bool
Description:
Check internal clock stability
Use this function to check the internal SDMMC clock stability. The function returns a boolean value indicating internal clock stability (true = stable)
uint32_t XMC_SDMMC_GetCommandResponse ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
uint32_t SDMMC command response
Description:
Get card response (no Auto command)
This function returns [39:8] bits of the card response. The others are checked automatically by the peripheral. This function can be used with response type R1, R1b, R3, R4, R5, R5b, R6 but it doesn't support the retrieving of R1 of Auto CMD 23 and R1b of Auto CMD 12. To get these responses, use XMC_SDMMC_GetAutoCommandResponse().
bool XMC_SDMMC_GetContinueRequest ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
bool
Description:
Get continue request
The function returns the status of the BLOCK_GAP_CTRL.CONTINUE_REQ bit-field. It returns "true" if the transaction is restarted after a "stop at block gap" request.
bool XMC_SDMMC_GetEvent | ( | XMC_SDMMC_t *const | sdmmc,
 |  | XMC_SDMMC_EVENT_t | event
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
event | A valid SDMMC event (XMC_SDMMC_EVENT_t)
Returns
bool
Description:
Get SDMMC event status
The function returns the status of a single requested (normal/error) event by reading the appropriate bit-fields of the INT_STATUS register.
bool XMC_SDMMC_GetPowerStatus ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
bool
Description:
Get power status of the SDMMC peripheral
The function checks the SD_BUS_POWER bit-field of the POWER_CTRL register and returns a boolean value - "on" or "off".
XMC_SDMMC_PRESENT_STATE_t XMC_SDMMC_GetPresentState ( const XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
XMC_SDMMC_PRESENT_STATE_t A structure storing the present state of the host controller
Description:
Get the present state of the SDMMC host controller
Get the values of each bit-field in SDMMC_PRESENT_STATE register The function call populates an instance of the XMC_SDMMC_PRESENT_STATE_t structure with the state of the SD host controller and returns it to the caller.
void XMC_SDMMC_GetR2Response | ( | XMC_SDMMC_t *const | sdmmc,
 |  | XMC_SDMMC_RESPONSE_t *const | response
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
response | Pointer to structure type XMC_SDMMC_RESPONSE_t to store the full response
Returns
None
Description:
Get card R2 response
The R2 response is 120 bits wide. The function reads all peripheral registers and store in the response data structure.
uint32_t XMC_SDMMC_GetSWResetStatus ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
Software reset status
Description:
Get SDMMC software reset status
The SD host takes some time to reset its registers after invoking XMC_SDMMC_SetSWReset(). Since XMC_SDMMC_SetSWReset() is a non-blocking function, XMC_SDMMC_GetSWResetStatus() has been provided to check the software reset status. The return value needs to be masked with the reset mode (XMC_SDMMC_SW_RESET_t) to get a specific software reset status value.
uint32_t XMC_SDMMC_GetTransferBlocksNum ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
uint32_t Number of blocks that need to be transferred
Description:
Get the number of blocks that need to be transferred
This function is valid only for multiple block transfers. The host controller decrements the block count after each block transfer and stops when the count reaches zero. It can only be accessed when no transaction is happening (i.e after a transaction has stopped). This function returns an invalid value during the transfer.

When saving transfer context as a result of the suspend command, the number of blocks yet to be transferred can be determined by using this function.

XMC_SDMMC_STATUS_t XMC_SDMMC_Init | ( | XMC_SDMMC_t *const | sdmmc,
 |  | const XMC_SDMMC_CONFIG_t * | config
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
config | A pointer to a constant XMC_SDMMC_CONFIG_t structure containing the bus width and clock divider configuration
Returns
XMC_SDMMC_STATUS_SUCCESS
Description:
Initialize the SDMMC peripheral
The function enables the SDMMC peripheral, sets the internal clock divider register and sets the bus width.
bool XMC_SDMMC_IsAllDataLinesHigh ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
bool Status of all data lines
Description:
Check if all data line are high
The function reads the SDMMC PRESENT_STATE register and returns "true" if all data lines are high. It can be used to handle SDMMC error conditions. For example, if an error event (XMC_SDMMC_IsAnyErrorEvent()) is detected and all data lines are high, the user code can conclude that the error is of a "recoverable" type.
bool XMC_SDMMC_IsAnyErrorEvent ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
bool
Description:
Check if any error event has occured
The function can typically be used for writing an error interrupt recovery routine. Should any error be indicated (If XMC_SDMMC_IsAnyErrorEvent() returns true), the routine may then clear the event after indicating the error event and reset the SDMMC command and data lines.
bool XMC_SDMMC_IsCommandLineBusy ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
bool SDMMC command line status
Description:
Check if the command line is busy
The function reads the SDMMC PRESENT_STATE register and returns "true" if the command line is busy ("false" otherwise). The command line must be free before sending an SDMMC command with XMC_SDMMC_SendCommand().
bool XMC_SDMMC_IsDataLineBusy ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
bool SDMMC data line status
Description:
Check if the data line is busy
The function reads the SDMMC PRESENT_STATE register and returns "true" if the data line is busy ("false" otherwise). The data line must be free before sending an SDMMC command with XMC_SDMMC_SendCommand().
uint32_t XMC_SDMMC_ReadFIFO ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
uint32_t The value held in the SDMMC FIFO
Description:
Use this function to read a single word (32 bits) from the SDMMC FIFO.
void XMC_SDMMC_SDClockDisable ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
None
Description:
Disable the SD clock
The function resets the SDCLOCK_EN bit-field of the CLOCK_CTRL register, disabling the SD clock. It can be used alongside a SD card information reset routine (if required).
void XMC_SDMMC_SDClockEnable ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
None
Description:
Enable the SD clock
The function sets the SDCLOCK_EN bit-field of the CLOCK_CTRL register, enabling the SD clock. It can be invoked after the internal clock has achieved stability. SD card initialization process may then follow.
void XMC_SDMMC_SDClockFreqSelect | ( | XMC_SDMMC_t *const | sdmmc,
 |  | XMC_SDMMC_SDCLK_FREQ_SEL_t | clk
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
clk | Desired clock frequency (XMC_SDMMC_SDCLK_FREQ_SEL_t)
Returns
None
Description:
Set SD clock frequency
The function sets the CLOCK_CTRL register to configure the frequency of the SD clock pin. The register is programmed with the divisor of the base clock frequency (clk).

The following settings are permitted (8-bit divided clock mode):
00H: base clock (10MHz->63MHz)
01H: base clock divided by 2
10H: base clock divided by 32
02H: base clock divided by 4
04H: base clock divided by 8
08H: base clock divided by 16
20H: base clock divided by 64
40H: base clock divided by 128
80H: base clock divided by 256

Note:
The internal clock should be disabled before updating frequency clock select. Please see section 2.2.14 -> "Clock Control Register" in the SD HOST specification for more information.
XMC_SDMMC_STATUS_t XMC_SDMMC_SendCommand | ( | XMC_SDMMC_t *const | sdmmc,
 |  | const XMC_SDMMC_COMMAND_t * | command,
 |  | uint32_t | arg
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
command | A pointer to a constant of type XMC_SDMMC_COMMAND_t, pointing to the command configuration
arg | Command argument
Returns
XMC_SDMMC_STATUS_SUCCESS
Description:
Send normal SDMMC command
Use this function to send a normal SDMMC command. This non-blocking function sets the ARGUMENT1 and COMMAND registers. It is the user's responsibility to check if the command and data lines are busy (XMC_SDMMC_IsDataLineBusy(), XMC_SDMMC_IsCommandLineBusy()).
void XMC_SDMMC_SetBusVoltage | ( | XMC_SDMMC_t *const | sdmmc,
 |  | XMC_SDMMC_BUS_VOLTAGE_t | bus_voltage
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
bus_voltage | Desired bus voltage (XMC_SDMMC_BUS_VOLTAGE_t)
Returns
None
Description:
Set SDMMC bus voltage
The function sets the CLOCK_CTRL register to configure the bus voltage. Currently, 3.3 volts is the supported voltage level. This function is relevant within the host controller initialization routine.
void XMC_SDMMC_SetCardDetectionSource | ( | XMC_SDMMC_t *const | sdmmc,
 |  | XMC_SDMMC_CD_SOURCE_t | source
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
source | A valid SDMMC card detection signal source (XMC_SDMMC_CD_SOURCE_t)
Returns
None
Description:
Selects source for card detection
void XMC_SDMMC_SetCardDetectionStatus | ( | XMC_SDMMC_t *const | sdmmc,
 |  | XMC_SDMMC_CD_STATUS_t | status
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
status | A valid SDMMC card detection status (XMC_SDMMC_CD_STATUS_t)
Returns
None
Description:
Sets the card detection status indicating whether card is inserted or not. Generates (card ins or card removal) interrupt when the normal interrupt is enabled.
Note
Only valid if SDMMC card detection signal source is set to XMC_SDMMC_CD_SOURCE_SW
void XMC_SDMMC_SetContinueRequest | ( | XMC_SDMMC_t *const | sdmmc,
 |  | bool | enabled
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
enabled | "true" to restart transaction, "false" is ignored
Returns
None
Description:
Issue a continue request
The function is used to restart a transaction which was stopped using the "Stop at block gap" request. (XMC_SDMMC_SetStopAtBlockGap())
void XMC_SDMMC_SetDataLineTimeout | ( | XMC_SDMMC_t *const | sdmmc,
 |  | XMC_SDMMC_DAT_TIMEOUT_COUNTER_t | timeout
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
timeout | Data line timeout value
Returns
None
Description:
Set data line timeout
Use the function to set the interval by which the data line timeouts are detected. The timeout clock frequency is generated by dividing the SD clock (TMCLK) by the timeout argument. This function must be called before setting the bus voltage (XMC_SDMMC_SetBusVoltage()).
void XMC_SDMMC_SetDataTransferDirection | ( | XMC_SDMMC_t *const | sdmmc,
 |  | XMC_SDMMC_DATA_TRANSFER_DIR_t | dir
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
dir | Transfer direction (XMC_SDMMC_DATA_TRANSFER_DIR_t)
Returns
None
Description:
Set data transfer direction
Use the function to set the data transfer direction: host to card OR card to host. It is typically used to configure block operations (read/write) on the SD card. For example, XMC_SDMMC_DATA_TRANSFER_HOST_TO_CARD must be used for a write block operation.
void XMC_SDMMC_SetDataTransferMode | ( | XMC_SDMMC_t *const | sdmmc,
 |  | XMC_SDMMC_TRANSFER_MODE_t *const | transfer_mode
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
transfer_mode | Transfer mode configuration
Returns
None
Description:
Configure data transfer mode
The function configures block size, block count, type of data transfer, response type and sets the auto command configuration. Use this function to configure a multi-block SDMMC transfer.
void XMC_SDMMC_SetDataTransferWidth | ( | XMC_SDMMC_t *const | sdmmc,
 |  | XMC_SDMMC_DATA_LINES_t | lines
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
lines | Number of data lines to use (XMC_SDMMC_DATA_LINES_t)
Returns
None
Description:
Set data transfer width
Use the function to set the data transfer width. Before using this function, an ACMD6 command (with R1 response type) must be sent to switch the bus width.
void XMC_SDMMC_SetDelay ( uint8_t tapdel )
Parameters
tapdel Number of delay elements to select
Returns
None
Description:
Set number of delay elements on the command/data out lines
Use the function to set the number of delay elements on the command/data out lines. The function writes the delay value to the SDMMC delay control register (SDMMCDEL) within the realm of the SCU peripheral. A delay of tapdel + 1 is considered as the final selected number of delay elements.
void XMC_SDMMC_SetReadWaitControl | ( | XMC_SDMMC_t *const | sdmmc,
 |  | bool | enabled
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
enabled | "true" to enable read wait control, "false" to disable read wait control.
Returns
None
Description:
Configure read wait control
The read wait function is optional for SDIO cards. If the card supports read wait and XMC_SDMMC_GetTransferBlocksNum() is executed, the SDMMC peripheral will stop read data using DAT[2] line. If this feature is not enabled the peripheral has to stop the SD clock to hold read data, restricting commands generation.

When the host driver detects an SD card insertion, it sets this bit according to the CCCR of the SDIO card. If the card does not support read wait, this feature shall never be enabled otherwise a DAT line conflict may occur. If this feature is disabled, Suspend/Resume cannot be supported.

void XMC_SDMMC_SetStopAtBlockGap | ( | XMC_SDMMC_t *const | sdmmc,
 |  | bool | enabled
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
enabled | "true" to set stop at block gap, "false" for transfer
Returns
None
Description:
Stop at block gap request
The function is used to terminate a transaction execution at the next block gap for non-DMA transfers.
void XMC_SDMMC_SetSWReset | ( | XMC_SDMMC_t *const | sdmmc,
 |  | uint32_t | reset_mode
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
reset_mode | Reset mode or a bitwise combination of modes
Returns
None
Description:
Set SDMMC software reset request
The function sets in the SDMMC SW_RESET register:
1) bit 0 to reset all
2) bit 1 to reset CMD line
3) bit 2 reset DAT line

It is typically used to reset the SD HOST controller's registers.

void XMC_SDMMC_Start ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
None
Description:
Enable the internal SDMMC clock
The function enables the internal clock of the SDMMC peripheral. To check if the clock is stable, use XMC_SDMMC_GetClockStability().
Note:
Invoke XMC_SDMMC_Init() before using this function.
void XMC_SDMMC_Stop ( XMC_SDMMC_t *const sdmmc )
Parameters
sdmmc A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
Returns
None
Description:
Disable internal SDMMC clock
The function disables the internal clock of the SDMMC peripheral. The SDMMC registers can still be read and written even if the internal clock is disabled.
void XMC_SDMMC_TriggerACMDErr | ( | XMC_SDMMC_t *const | sdmmc,
 |  | uint32_t | error
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
error | A valid SDMMC ACMD error (XMC_SDMMC_ACMD_ERR_t) or a valid combination of logically OR'd ACMD error events
Returns
None
Description:
Triggers Auto CMD12 error(s)
This function triggers Auto CMD12 error(s) by setting appropriate bit-fields of the FORCE_EVENT_ACMD_ERR_STATUS register.
Related APIs:
XMC_SDMMC_TriggerEvent()
void XMC_SDMMC_TriggerEvent | ( | XMC_SDMMC_t *const | sdmmc,
 |  | uint32_t | event
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
event | A valid SDMMC event (XMC_SDMMC_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Trigger SDMMC error events
The SDMMC peripheral supports triggering of following error events:

XMC_SDMMC_CMD_TIMEOUT_ERR, XMC_SDMMC_CMD_CRC_ERR, XMC_SDMMC_CMD_END_BIT_ERR, XMC_SDMMC_CMD_IND_ERR, XMC_SDMMC_DATA_TIMEOUT_ERR, XMC_SDMMC_DATA_CRC_ERR, XMC_SDMMC_DATA_END_BIT_ERR, XMC_SDMMC_CURRENT_LIMIT_ERR, XMC_SDMMC_ACMD_ERR, XMC_SDMMC_TARGET_RESP_ERR

For triggering Auto CMD12 error, see XMC_SDMMC_TriggerACMDErr()

void XMC_SDMMC_WriteFIFO | ( | XMC_SDMMC_t *const | sdmmc,
 |  | uint32_t * | data
 | ) |  |
Parameters
sdmmc | A constant pointer to XMC_SDMMC_t, pointing to the SDMMC base address
data | Pointer to a data word (32 bits) that needs to be written to the FIFO
Returns
None
Description:
Use this function to write a single word (32 bits) to the SDMMC FIFO.
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_SDMMC_COMMAND_t Union Reference

XMC_SDMMC_COMMAND_t Union Reference
XMC Peripheral Library » SDMMC

#include <xmc_sdmmc.h>

Detailed Description

Represent an SDMMC command

The structure holds the configuration for an SDMMC command. The SDMMC COMMAND register is a 16-bit register which is responsible for enabling configuration parameters like command type, response type, index check enable (and a few more). Once SDMMC.COMMAND is configured, the XMC_SDMMC_SendCommand() function can be used to send the command.

Field Documentation

uint16_t cmd_index

Command index

uint16_t cmd_type

Command type XMC_SDMMC_COMMAND_TYPE_t

uint16_t crc_check_en

Command CRC check enable

uint16_t dat_present_sel

Data present select

uint16_t index_check_en

Command index check enable

uint16_t response_type_sel

Response type select XMC_SDMMC_COMMAND_RESPONSE_t

The documentation for this union was generated from the following file:
  • xmc_sdmmc.h


XMC Peripheral Library for XMC4000 Family: XMC_SDMMC_CONFIG_t Struct Reference

Data Fields
XMC_SDMMC_CONFIG_t Struct Reference
XMC Peripheral Library » SDMMC

#include <xmc_sdmmc.h>

Data Fields

uint8_t bus_width
XMC_SDMMC_SDCLK_FREQ_SEL_t clock_divider

Detailed Description

SDMMC configuration data structure

The structure is used to configure the bus width and the clock divider.

Field Documentation

uint8_t bus_width

SDMMC bus width

XMC_SDMMC_SDCLK_FREQ_SEL_t clock_divider

SDMMC clock divider

The documentation for this struct was generated from the following file:
  • xmc_sdmmc.h


XMC Peripheral Library for XMC4000 Family: XMC_SDMMC_PRESENT_STATE_t Union Reference

XMC_SDMMC_PRESENT_STATE_t Union Reference
XMC Peripheral Library » SDMMC

#include <xmc_sdmmc.h>

Detailed Description

Present state of the SDMMC host controller

The structure presents a convenient way to obtain the SDMMC peripheral's present state information (for example, the write protect pin level). The XMC_SDMMC_GetPresentState() API can be used to populate the structure with the state of the SD host controller.

Field Documentation

uint32_t buffer_read_enable

Buffer read enable

uint32_t buffer_write_enable

Buffer write enable

uint32_t card_detect_pin_level

Card detect pin level

uint32_t card_inserted

Card inserted

uint32_t card_state_stable

Card state stable

uint32_t cmd_line_level

Command line level

uint32_t command_inihibit_cmd

Command: Inhibit command

uint32_t command_inihibit_dat

Command: Inhibit data

uint32_t dat7_4_pin_level

Data 7_4 pin level

uint32_t dat_3_0_pin_level

Data 3_0 pin level

uint32_t dat_line_active

Data line active

uint32_t read_transfer_active

Read transfer active

uint32_t write_protect_pin_level

Write protect pin level

uint32_t write_transfer_active

Write transfer active

The documentation for this union was generated from the following file:
  • xmc_sdmmc.h


XMC Peripheral Library for XMC4000 Family: XMC_SDMMC_RESPONSE_t Struct Reference

XMC_SDMMC_RESPONSE_t Struct Reference
XMC Peripheral Library » SDMMC

#include <xmc_sdmmc.h>

Detailed Description

Card response structure

The documentation for this struct was generated from the following file:
  • xmc_sdmmc.h


XMC Peripheral Library for XMC4000 Family: XMC_SDMMC_t Struct Reference

XMC_SDMMC_t Struct Reference
XMC Peripheral Library » SDMMC

#include <xmc_sdmmc.h>

Detailed Description

SDMMC device structure

The structure represents a collection of all hardware registers used to configure the SDMMC peripheral on the XMC4500 microcontroller. The registers can be accessed with XMC_SDMMC.

The documentation for this struct was generated from the following file:
  • xmc_sdmmc.h


XMC Peripheral Library for XMC4000 Family: XMC_SDMMC_TRANSFER_MODE_t Struct Reference

XMC_SDMMC_TRANSFER_MODE_t Struct Reference
XMC Peripheral Library » SDMMC

#include <xmc_sdmmc.h>

Detailed Description

SDMMC transfer mode configuration

The documentation for this struct was generated from the following file:
  • xmc_sdmmc.h


XMC Peripheral Library for XMC4000 Family: SPI

Data Structures | Macros | Enumerations | Functions
SPI
XMC Peripheral Library

Data Structures

struct XMC_SPI_CH_CONFIG_t

Macros

#define | XMC_SPI0_CH0 XMC_USIC0_CH0
#define | XMC_SPI0_CH1 XMC_USIC0_CH1
#define | XMC_SPI1_CH0 XMC_USIC1_CH0
#define | XMC_SPI1_CH1 XMC_USIC1_CH1
#define | XMC_SPI2_CH0 XMC_USIC2_CH0
#define | XMC_SPI2_CH1 XMC_USIC2_CH1

Enumerations

Functions

void | XMC_SPI_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, const uint32_t flag)
void | XMC_SPI_CH_ConfigExternalInputSignalToBRG (XMC_USIC_CH_t *const channel, const uint16_t pdiv, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_SPI_CH_ConfigureShiftClockOutput (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t passive_level, const XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t clock_output)
void | XMC_SPI_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableEOF (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_SPI_CH_DisableFEM (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INPUT_t input)
void | XMC_SPI_CH_DisableInterwordDelay (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableMasterClock (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableSlaveSelect (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableSlaveSelectCodedMode (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableSOF (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableEOF (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_SPI_CH_EnableFEM (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INPUT_t input)
void | XMC_SPI_CH_EnableInterwordDelay (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableMasterClock (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableSlaveSelect (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_SLAVE_SELECT_t slave)
void | XMC_SPI_CH_EnableSlaveSelectCodedMode (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableSOF (XMC_USIC_CH_t *const channel)
uint16_t | XMC_SPI_CH_GetReceivedData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_SPI_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_Init (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_CONFIG_t *const config)
void | XMC_SPI_CH_Receive (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_MODE_t mode)
void | XMC_SPI_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_SPI_CH_STATUS_t | XMC_SPI_CH_SetBaudrate (XMC_USIC_CH_t *const channel, const uint32_t rate)
void | XMC_SPI_CH_SetBitOrderLsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_SetBitOrderMsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_SPI_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INPUT_t input, const uint8_t source)
void | XMC_SPI_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_SPI_CH_SetInterwordDelay (XMC_USIC_CH_t *const channel, uint32_t tinterword_delay_ns)
void | XMC_SPI_CH_SetInterwordDelaySCLK (XMC_USIC_CH_t *const channel, uint32_t sclk_period)
void | XMC_SPI_CH_SetSlaveSelectDelay (XMC_USIC_CH_t *const channel, uint32_t sclk_period)
void | XMC_SPI_CH_SetSlaveSelectPolarity (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t selo_inversion)
void | XMC_SPI_CH_SetTransmitMode (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_MODE_t mode)
void | XMC_SPI_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_SPI_CH_Start (XMC_USIC_CH_t *const channel)
XMC_SPI_CH_STATUS_t | XMC_SPI_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_Transmit (XMC_USIC_CH_t *const channel, const uint16_t data, const XMC_SPI_CH_MODE_t mode)
void | XMC_SPI_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)

Detailed Description

The SPI driver uses Universal Serial Interface Channel(USIC) module. The USIC module supports multiple data lines for SPI communication.

  1. Full duplex communication with 2 separate lines for transmission and reception.
  2. Half duplex communication with 1 common line shared for transmission and reception.
  3. Dual mode communication with 2 common lines shared for transmission and reception.
  4. Quad mode communication with 4 common lines shared for transmission and reception.

SPI driver provides structures, enumerations and APIs for configuring the USIC channel for SPI communication and also for data transaction.
SPI driver features:

  1. Configuration structure XMC_SPI_CH_CONFIG_t and SPI initialization function XMC_SPI_CH_Init()
  2. Allows configuration of protocol word and frame length using XMC_SPI_CH_SetWordLength(), XMC_SPI_CH_SetFrameLength()
  3. Allows manipulation of data frame at runtime using XMC_SPI_CH_EnableSOF(), XMC_SPI_CH_EnableEOF(), XMC_SPI_CH_EnableSlaveSelect(), XMC_SPI_CH_DisableSlaveSelect()
  4. Provides APIs for transmitting data and receiving data using XMC_SPI_CH_Transmit(), XMC_SPI_CH_Receive(), XMC_SPI_CH_GetReceivedData()
  5. Allows configuration of shift clock using XMC_SPI_CH_ConfigureShiftClockOutput()
  6. Provides enumeration of SPI protocol events using XMC_SPI_CH_STATUS_FLAG_t

Macro Definition Documentation

#define XMC_SPI0_CH0 XMC_USIC0_CH0

SPI0 channel 0 base address

#define XMC_SPI0_CH1 XMC_USIC0_CH1

SPI0 channel 1 base address

#define XMC_SPI1_CH0 XMC_USIC1_CH0

SPI1 channel 0 base address

#define XMC_SPI1_CH1 XMC_USIC1_CH1

SPI1 channel 1 base address

#define XMC_SPI2_CH0 XMC_USIC2_CH0

SPI2 channel 0 base address

#define XMC_SPI2_CH1 XMC_USIC2_CH1

SPI2 channel 1 base address

Enumeration Type Documentation

enum XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t

SPI Baudrate Generator shift clock output

Enumerator
XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK | Baudrate Generator shift clock output: SCLK
XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 | Clock obtained as input from master: DX1
enum XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t

SPI Baudrate Generator shift clock passive level

Enumerator
XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED | Passive clock level 0, delay disabled Passive clock level 1, delay disabled
XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED | Passive clock level 0, delay enabled
XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED | Passive clock level 1, delay enabled
enum XMC_SPI_CH_BUS_MODE_t

Defines the SPI bus mode

Enumerator
XMC_SPI_CH_BUS_MODE_MASTER | SPI Master
XMC_SPI_CH_BUS_MODE_SLAVE | SPI Slave
enum XMC_SPI_CH_DATA_POLARITY_t

Defines the Polarity of the data inputs.

Enumerator
XMC_SPI_CH_DATA_POLARITY_DIRECT | The polarity of the data line is not inverted
XMC_SPI_CH_DATA_POLARITY_INVERT | The polarity of the data line is inverted
enum XMC_SPI_CH_EVENT_t

Defines SPI specific events

Enumerator
XMC_SPI_CH_EVENT_RECEIVE_START | Receive start event
XMC_SPI_CH_EVENT_DATA_LOST | Data lost event
XMC_SPI_CH_EVENT_TRANSMIT_SHIFT | Transmit shift event
XMC_SPI_CH_EVENT_TRANSMIT_BUFFER | Transmit buffer event
XMC_SPI_CH_EVENT_STANDARD_RECEIVE | Receive event
XMC_SPI_CH_EVENT_ALTERNATIVE_RECEIVE | Alternate receive event
XMC_SPI_CH_EVENT_BAUD_RATE_GENERATOR | Baudrate generator event
XMC_SPI_CH_EVENT_PARITY_ERROR | Parity error event
XMC_SPI_CH_EVENT_MSLS_CHANGE | Master slave select(MSLS) output transition event
XMC_SPI_CH_EVENT_DX2TIEN_ACTIVATED | Slave select input signal transition event
enum XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_t

Defines input frequency sources for slave select signal delay configuration.

Enumerator
XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FPDIV | Output of PDIV divider: FPDIV
XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FPPP | Peripheral clock: FPPP
XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FSCLK | Shift clock: FSCLK
XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FMCLK | Master clock: FMCLK
enum XMC_SPI_CH_INPUT_t

Define data and clock input stages

Enumerator
XMC_SPI_CH_INPUT_DIN0 | Data input stage 0
XMC_SPI_CH_INPUT_SLAVE_SCLKIN | Clock input stage
XMC_SPI_CH_INPUT_SLAVE_SELIN | Slave select input stage
XMC_SPI_CH_INPUT_DIN1 | Data input stage 1
XMC_SPI_CH_INPUT_DIN2 | Data input stage 2
XMC_SPI_CH_INPUT_DIN3 | Data input stage 3
enum XMC_SPI_CH_INTERRUPT_NODE_POINTER_t

SPI channel interrupt node pointers

Enumerator
XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT | Node pointer for transmit shift interrupt
XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER | Node pointer for transmit buffer interrupt
XMC_SPI_CH_INTERRUPT_NODE_POINTER_RECEIVE | Node pointer for receive interrupt
XMC_SPI_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE | Node pointer for alternate receive interrupt
XMC_SPI_CH_INTERRUPT_NODE_POINTER_PROTOCOL | Node pointer for protocol related interrupts
enum XMC_SPI_CH_MODE_t

Define SPI data transfer mode

Enumerator
XMC_SPI_CH_MODE_STANDARD | SPI standard full duplex mode
XMC_SPI_CH_MODE_STANDARD_HALFDUPLEX | SPI standard half duplex mode
XMC_SPI_CH_MODE_DUAL | SPI half duplex mode with dual data lines
XMC_SPI_CH_MODE_QUAD | SPI half duplex mode with quad data lines
enum XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t

Defines the Polarity of the slave select signals SELO[7:0] in relation to the master slave select signal MSLS.

Enumerator
XMC_SPI_CH_SLAVE_SEL_SAME_AS_MSLS | The SELO outputs have the same polarity as the MSLS signal (active high)
XMC_SPI_CH_SLAVE_SEL_INV_TO_MSLS | The SELO outputs have the inverted polarity to the MSLS signal (active low)
enum XMC_SPI_CH_SLAVE_SELECT_t

Defines Slave Select lines

Enumerator
XMC_SPI_CH_SLAVE_SELECT_0 | Slave Select line 0
XMC_SPI_CH_SLAVE_SELECT_1 | Slave Select line 1
XMC_SPI_CH_SLAVE_SELECT_2 | Slave Select line 2
XMC_SPI_CH_SLAVE_SELECT_3 | Slave Select line 3
XMC_SPI_CH_SLAVE_SELECT_4 | Slave Select line 4
XMC_SPI_CH_SLAVE_SELECT_5 | Slave Select line 5
XMC_SPI_CH_SLAVE_SELECT_6 | Slave Select line 6
XMC_SPI_CH_SLAVE_SELECT_7 | Slave Select line 7
enum XMC_SPI_CH_STATUS_FLAG_t

Defines SPI event status

Enumerator
XMC_SPI_CH_STATUS_FLAG_MSLS | Status of Master slave select(MSLS) signal
XMC_SPI_CH_STATUS_FLAG_DX2S | Status of slave select input(DX2) signal
XMC_SPI_CH_STATUS_FLAG_MSLS_EVENT_DETECTED | Status for master slave select output signal transition
XMC_SPI_CH_STATUS_FLAG_DX2T_EVENT_DETECTED | Status for slave select input signal transition
XMC_SPI_CH_STATUS_FLAG_PARITY_ERROR_EVENT_DETECTED | Indicates status of the parity error
XMC_SPI_CH_STATUS_FLAG_RECEIVER_START_INDICATION | Status for receive start event
XMC_SPI_CH_STATUS_FLAG_DATA_LOST_INDICATION | Status for data lost event
XMC_SPI_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION | Status for transmit shift event
XMC_SPI_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION | Status for transmit buffer event
XMC_SPI_CH_STATUS_FLAG_RECEIVE_INDICATION | Status for receive event
XMC_SPI_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION | Status for alternative receive event
XMC_SPI_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION | Status for baud rate generation error event
enum XMC_SPI_CH_STATUS_t

Defines return status of SPI driver APIs

Enumerator
XMC_SPI_CH_STATUS_OK | Status of the Module: OK
XMC_SPI_CH_STATUS_ERROR | Status of the Module: ERROR
XMC_SPI_CH_STATUS_BUSY | The Module is busy

Function Documentation

void XMC_SPI_CH_ClearStatusFlag | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | flag
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
flag | Protocol event status to be cleared for detection of next occurence. Refer @ XMC_SPI_CH_STATUS_FLAG_t for valid values. OR combinations of these enum item can be used as input.
Returns
None
Description:
Clears the events specified, by setting PSCR register.

During communication the events occurred have to be cleared to detect their next occurence.
e.g: During transmission Transmit buffer event occurs to indicating data word transfer has started. This event has to be cleared after transmission of each data word. Otherwise next event cannot be recognized.
Related APIs:
XMC_SPI_CH_GetStatusFlag()
void XMC_SPI_CH_ConfigExternalInputSignalToBRG | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | pdiv,
 |  | const XMC_USIC_CH_INPUT_COMBINATION_MODE_t | combination_mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Parameters
pdiv Desired divider for the external frequency input. Range: minimum value = 1, maximum value = 1024
combination_mode USIC channel input combination mode
Returns
None
Description
Enables the external frequency input for the Baudrate Generator and configures the divider, oversampling and the combination mode of the USIC channel.

Related APIs:
XMC_USIC_CH_SetBRGInputClockSource(), XMC_USIC_CH_SetInputTriggerCombinationMode()

void XMC_SPI_CH_ConfigureShiftClockOutput | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t | passive_level,
 |  | const XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t | clock_output
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
passive_level polarity and delay of the selected shift clock.
Refer XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t for valid inputs.
clock_output shift clock source.
Refer XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t for valid inputs.
Returns
None
Description:
Configures the shift clock source with the selected polarity and delay by setting BRG.SCLKOSEL and BRG.SCLKCFG.

In Master mode operation, shift clock is generated by the internal baud rate generator. This SCLK is made available for external slave devices by SCLKOUT signal.
In Slave mode, the signal is received from the external master. So the DX1(input) stage has to be connected to input.
The shift clock output(SCLKOUT) signal polarity can be set relative to SCLK, with the delay of half the shift clock period. These settings are applicable only in master mode.
void XMC_SPI_CH_DisableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Returns
None
Description
Disable data transmission.

Use this function in combination with XMC_SPI_CH_EnableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Related APIs:
XMC_SPI_CH_EnableDataTransmission()

void XMC_SPI_CH_DisableDelayCompensation ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Returns
None
Description
Disables delay compensation..

Related APIs:
XMC_SPI_CH_EnableDelayCompensation()

void XMC_SPI_CH_DisableEOF ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description
Configure the handling of end of frame through hardware, by clearing TCSR.EOF bit.

Typically this can be disabled, where the transmission control is done by the hardware.
Related APIs:
XMC_SPI_CH_EnableEOF()
void XMC_SPI_CH_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
event | Protocol events which have to be disabled. Refer @ XMC_SPI_CH_EVENT_t for valid values. OR combinations of these enum item can be used as input.
Returns
None
Description:
Disables the SPI protocol specific events, by configuring PCR register.

After disabling the events, XMC_SPI_CH_EnableEvent() has to be invoked to re-enable the events.
Related APIs:
XMC_SPI_CH_EnableEvent()
void XMC_SPI_CH_DisableFEM ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Configure to disable the MSLS(Slave select signal) if the current data frame is considered as finished, by setting PCR.FEM bit.

When the last bit of a data word has been sent out and the transmit buffer TBUF does not contain new data, is considered as frame is ended and MSLS(Slave select signal) is disabled.
Related APIs:
XMC_SPI_CH_EnableFEM()
void XMC_SPI_CH_DisableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_INPUT_t | input
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
input SPI channel input stage.
Refer XMC_SPI_CH_INPUT_t for valid inputs.
Returns
None
Description
Disables the polarity inversion of input data signal, by clearing DXyCR.DPOL(where y = input).

Resets the input data polarity. Invoke XMC_SPI_CH_EnableInputInversion() to apply inversion.
Related APIs:
XMC_SPI_CH_EnableInputInversion()
void XMC_SPI_CH_DisableInterwordDelay ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Disables the delay after after each word, by clearing PCR.TIWEN bit.

So the last data bit of a data word is directly followed by the first data bit of the next data word. If needed can be enabled by invoking XMC_SPI_CH_EnableInterwordDelay().
Related APIs:
XMC_SPI_CH_EnableInterwordDelay()
void XMC_SPI_CH_DisableMasterClock ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Disables the generation of Master clock by clearing PCR.MCLK bit.

This clock can be enabled by invoking XMC_SPI_CH_EnableMasterClock() as needed in the program.
Related APIs:
XMC_SPI_CH_EnableMasterClock()
void XMC_SPI_CH_DisableSlaveSelect ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant ponter to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Disable all the slave signals by clearing PCR.SELO bits.

XMC_SPI_CH_EnableSlaveSelect() has to be invoked to start the communication with the desired slave again.
Related APIs:
XMC_SPI_CH_EnableSlaveSelect()
void XMC_SPI_CH_DisableSlaveSelectCodedMode ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description
Each SELOx line (with x = 0-7) can be directly connected to an external slave device.
void XMC_SPI_CH_DisableSOF ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description
Set the control of the handling start of frame through hardware, by clearing TCSR.SOF bit.

Typically this can be disabled, where the transmission control is done by the hardware.
Related APIs:
XMC_SPI_CH_EnableSOF()
void XMC_SPI_CH_EnableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Returns
None
Description
Enable data transmission.

Use this function in combination with XMC_SPI_CH_DisableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Note
If you need more control over the start of transmission use XMC_USIC_CH_SetStartTransmisionMode()
Related APIs:
XMC_SPI_CH_DisableDataTransmission()

void XMC_SPI_CH_EnableDelayCompensation ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Returns
None
Description
Enables delay compensation.

Delay compensation can be applied to the receive path.
Related APIs:
XMC_SPI_CH_DisableDelayCompensation()

void XMC_SPI_CH_EnableEOF ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description
Configure the handling of end of frame through software, by setting TCSR.EOF bit.

This can be used if the software handles the TBUF data without FIFO. If EOF is set, a valid content of the TBUF is considered as last word of a frame. After transfer of the last word, MSLS signal becomes inactive. For software handling of EOF bit, it is recommended to configure TCSR.WLEMD as 0.
Note: The API should be called before putting the last data word of the frame to TBUF.
Related APIs:
XMC_SPI_CH_DisableEOF()
void XMC_SPI_CH_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
event | Protocol events which have to be enabled. Refer @ XMC_SPI_CH_EVENT_t for valid values. OR combinations of these enum items can be used as input.
Returns
None
Description:
Enables the SPI protocol specific events, by configuring PCR register.

Events can be enabled as needed using XMC_SPI_CH_EnableEvent(). XMC_SPI_CH_DisableEvent() can be used to disable the events.
Related APIs:
XMC_SPI_CH_DisableEvent()
void XMC_SPI_CH_EnableFEM ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:

Configure to keep MSLS(Slave select signal) active even after finishing the current data frame, by setting PCR.FEM bit.

This is typically used during the transmission of multi-data word frames, where there is possibility of delay in delivering the data. Frame end mode is enabled in XMC_SPI_CH_Init() during initialization. To disable XMC_SPI_CH_DisableFEM() can be invoked as needed in the program.

Related APIs:
XMC_SPI_CH_DisableFEM()
void XMC_SPI_CH_EnableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_INPUT_t | input
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
input SPI channel input stage.
Refer XMC_SPI_CH_INPUT_t for valid inputs.
Returns
None
Description
Enables the polarity inversion of input data signal, by setting DXyCR.DPOL(where y = input).

This is not set in XMC_SPI_CH_Init(). Invoke XMC_SPI_CH_EnableInputInversion() as needed later in the program. To disable the inversion XMC_SPI_CH_DisableInputInversion() can be invoked.
Related APIs:
XMC_SPI_CH_DisableInputInversion()
void XMC_SPI_CH_EnableInterwordDelay ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Enables the delay after each word, by setting PCR.TIWEN bit.

The inter word delay starts at the end of last SCLK cycle of data word. During this time no clock pulses are generated and MSLS signal stays active. If inter word delay is not enabled, last data bit of a data word is directly followed by the first data bit of the next data word. This is not enabled in XMC_SPI_CH_Init(). To enable XMC_SPI_CH_EnableInterwordDelay() has to be invoked as needed in the program. And can be disabled by invoking XMC_SPI_CH_DisableInterwordDelay().
Related APIs:
XMC_SPI_CH_DisableInterwordDelay()
void XMC_SPI_CH_EnableMasterClock ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Enables the generation of Master clock by setting PCR.MCLK bit.

This clock can be used as a clock reference for external devices. This is not enabled during initialization in XMC_SPI_CH_Init(). Invoke XMC_SPI_CH_EnableMasterClock() to enable as needed in the program, or if it is disabled by XMC_SPI_CH_DisableMasterClock().
Related APIs:
XMC_SPI_CH_DisableMasterClock()
void XMC_SPI_CH_EnableSlaveSelect | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_SLAVE_SELECT_t | slave
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
slave Slave select signal.
Refer XMC_SPI_CH_SLAVE_SELECT_t for valid values.
Returns
None
Description:
Enable the selected slave signal by setting PCR.SELO bits.

Each slave is connected with one slave select signal. This is not configured in XMC_SPI_CH_Init(). Invoke XMC_SPI_CH_EnableSlaveSelect() with required slave to to start the communication. After finishing the communication XMC_SPI_CH_DisableSlaveSelect() can be invoked to disable the slaves.
Related APIs:
XMC_SPI_CH_DisableSlaveSelect()
void XMC_SPI_CH_EnableSlaveSelectCodedMode ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description
The SELOx lines (with x = 1-7) can be used as addresses for an external address decoder to increase the number of external slave devices.
void XMC_SPI_CH_EnableSOF ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description
Configure the handling of start of frame through software, by setting TCSR.SOF bit.

This can be used if the software handles the TBUF data without FIFO. If SOF is set, a valid content of the TBUF is considered as first word of a new frame by finishing the currently running frame. For software handling of SOF bit, it is recommended to configure TCSR.WLEMD as 0. This is not configured during initialization. XMC_SPI_CH_EnableSOF() can be called as needed in the program and can be disabled by XMC_SPI_CH_DisableSOF().
Related APIs:
XMC_SPI_CH_DisableSOF()
uint16_t XMC_SPI_CH_GetReceivedData ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
uint16_t Data read from the receive buffer.
Description:
Reads data from the receive buffer based on the FIFO selection.

Invocation of XMC_SPI_CH_Receive() receives the data and place it into receive buffer. After receiving the data XMC_SPI_CH_GetReceivedData() can be used to read the data from the buffer.
Related APIs:
XMC_SPI_CH_Receive()
uint32_t XMC_SPI_CH_GetStatusFlag ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
uint32_t Status of SPI protocol events.
Description:
Returns the status of the events, by reading PSR register.

This indicates the status of the all the events, for SPI communication.
Related APIs:
XMC_SPI_CH_ClearStatusFlag()
void XMC_SPI_CH_Init | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_CONFIG_t *const | config
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
config pointer to constant SPI channel configuration data structure.
Refer data structure XMC_SPI_CH_CONFIG_t for detail.
Returns
None
Description:
Initializes the selected SPI channel with the config structure.

Enable SPI channel by calling XMC_USIC_CH_Enable() and then configures
  • Baudrate,
  • Passive data level as active high,
  • Shift control signal as active high,
  • Frame length as 64U,
  • Word length as 8U,
  • Enable Hardware port control mode,
  • Enable transmission of data TDV(Transmit data valid) bit is set to 1,
  • Enable invalidation of data in TBUF once loaded into shift register,
  • Parity mode settings
And if master mode is selected,
  • Enables MSLS signal generation,
  • configures slave selection as normal mode,
  • Set polarity for the Slave signal,
  • Enable Frame end mode(MSLS signal is kept active after transmission of a frame)
void XMC_SPI_CH_Receive | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_MODE_t | mode
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
mode Communication mode of the SPI, based on this mode TCI(Transmit control information)is updated.
Refer XMC_SPI_CH_MODE_t for valid values.
Returns
None
Description:
Transmits a dummy data(FFFFH) to provide clock for slave and receives the data from the slave.

XMC_SPI_CH_Receive() receives the data and places it into buffer based on the FIFO selection. After reception of data XMC_SPI_CH_GetReceivedData() can be invoked to read the data from the buffers.
Related APIs:
XMC_SPI_CH_GetReceivedDaa()
void XMC_SPI_CH_SelectInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Parameters
interrupt_node Interrupt node pointer to be configured.
Range: XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT, XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER etc.
service_request Service request number.
Range: 0 to 5.
Returns
None
Description
Sets the interrupt node for USIC channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so.
Note: NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_SPI_CH_EnableEvent()

XMC_SPI_CH_STATUS_t XMC_SPI_CH_SetBaudrate | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | rate
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
rate | Bus speed in bits per second
Returns
XMC_SPI_CH_STATUS_t Status of the SPI driver after the request for setting baudrate is processed.
XMC_SPI_CH_STATUS_OK- If the baudrate is successfully changed.
XMC_SPI_CH_STATUS_ERROR- If the new baudrate value is out of range.
Description:
Sets the bus speed in bits per second
Related APIs:
XMC_SPI_CH_Init(), XMC_SPI_CH_Stop()
void XMC_SPI_CH_SetBitOrderLsbFirst ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Set the order of data transfer from LSB to MSB, by clearing SCTR.SDIR bit.

This is typically based on the slave settings. Invoke XMC_SPI_CH_SetBitOrderLsbFirst() to set direction as needed in the program.
Related APIs:
XMC_SPI_CH_SetBitOrderMsbFirst()
void XMC_SPI_CH_SetBitOrderMsbFirst ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Set the order of data transfer from MSB to LSB, by setting SCTR.SDIR bit.

This is typically based on the slave settings. This is not set during XMC_SPI_CH_Init(). Invoke XMC_SPI_CH_SetBitOrderMsbFirst() to set direction as needed in the program.
Related APIs:
XMC_SPI_CH_SetBitOrderLsbFirst()
void XMC_SPI_CH_SetFrameLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | frame_length
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
frame_length Number of bits in a frame.
Range: 1 to 64. If the value 64 is configured, then the frame does not automatically end. User should explicitly end the frame.
Returns
None
Description
Define the data frame length.

Set the number of bits to be serially transmitted in a frame. The frame length should be multiples of word length. If the value is set to 64, the frame does not automatically end. Use XMC_SPI_CH_DisableSlaveSelect() to end the frame after all the data is transmitted.
Related APIs:
XMC_USIC_CH_SetWordLength(), XMC_USIC_CH_EnableFrameLengthControl(), XMC_SPI_CH_DisableSlaveSelect()
void XMC_SPI_CH_SetInputSource | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_INPUT_t | input,
 |  | const uint8_t | source
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
input SPI channel input stage.
Refer XMC_SPI_CH_INPUT_t for valid values
source | Input source select for the input stage. Range : [0 to 7]
Returns
None
Description
Selects the data source for SPI input stage, by configuring DXCR.DSEL bits.

Selects the input data signal source among DXnA, DXnB.. DXnG for the input stage. The API can be used for all the input stages like DX0CR, DX1CR etc. This is not done during initialization. This has to be configured before starting the SPI communication.
void XMC_SPI_CH_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | service_request
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
service_request | Service request number. Range: [0 to 5]
Returns
None
Description
Sets the interrupt node for SPI channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so. This is not configured in XMC_SPI_CH_Init() during initialization.
Note::
  1. NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_USIC_CH_EnableEvent()
void XMC_SPI_CH_SetInterwordDelay | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | tinterword_delay_ns
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
tinterword_delay_ns | delay in terms of nano seconds.
Returns
None
Description:
Configures the inter word delay by setting PCR.PCTQ1, PCR.DCTQ1 bit fields.

The inter word delay is dependent on the peripheral clock. The maximum possible value is calculated by using the below formula
Maximum inter word delay = ((1 + PCTQ1_max)(1 + DCTQ1_max)) / peripheral clock
where PCTQ1_max = 3 and DCTQ1_max = 31
After configuring the inter word delay, this has to be enabled by invoking XMC_SPI_CH_EnableInterwordDelay().
Related APIs:
XMC_SPI_CH_EnableInterwordDelay(),XMC_SPI_CH_SetInterwordDelaySCLK()
void XMC_SPI_CH_SetInterwordDelaySCLK | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | sclk_period
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
sclk_period | in terms of clk cycles.
Returns
None
Description:
Configures the inter word delay by setting PCR.DCTQ1 bit fields.

This delay is dependent on the peripheral clock. The maximum possible value supported by this API is 32 clock cycles. After configuring the inter word delay, this has to be enabled by invoking XMC_SPI_CH_EnableInterwordDelay().
Related APIs:
XMC_SPI_CH_EnableInterwordDelay(),XMC_SPI_CH_EnableInterwordDelay()
void XMC_SPI_CH_SetSlaveSelectDelay | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | sclk_period
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
sclk_period | delay in terms of sclk clock cycles.
Returns
None
Description:
Configures the leading/trailing delay by setting BRG.DCTQ bit field.

This delay is dependent on the peripheral clock. The maximum possible value supported by this API is 30 clock cycles.
void XMC_SPI_CH_SetSlaveSelectPolarity | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t | selo_inversion
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
selo_inversion Polarity of the slave select signal relative to the MSLS signal.
Refer XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t for valid values
Returns
None
Description
Set the polarity of the slave select signal, by configuring PCR.SELINV bit.

Normally MSLS signal is active low level signal. SO based on the slave inversion has to be applied. This is configured in XMC_SPI_CH_Init() during initialization. Invoke XMC_SPI_CH_SetSlaveSelectPolarity() with desired settings as needed later in the program.
void XMC_SPI_CH_SetTransmitMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_MODE_t | mode
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
mode Communication mode of the SPI, based on this mode TCI(Transmit control information)is updated.
Refer XMC_SPI_CH_MODE_t for valid values.
Returns
None
Description:
In Dual and Quad modes, hardware port control(CCR.HPCEN) mode is enabled.

By enabling this the direction of the data pin is updated by hardware itself. Before transmitting the data set the mode to ensure the proper communication.
Related APIs:
XMC_SPI_CH_Transmit()
void XMC_SPI_CH_SetWordLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | word_length
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
word_length Number of bits to be configured for a data word.
Range: 1 to 16.
Returns
None
Description
Defines the data word length.

Sets the number of bits to represent a data word. Frame length should be a multiple of word length.
Related APIs:
XMC_SPI_CH_SetFrameLength()
void XMC_SPI_CH_Start ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Set the selected USIC channel to operate in SPI mode, by setting CCR.MODE bits.

It should be executed after XMC_SPI_CH_Init() during initialization. By invoking XMC_SPI_CH_Stop(), the MODE is set to IDLE state. Call XMC_SPI_CH_Start() to set the SPI mode again, as needed later in the program.
Related APIs:
XMC_SPI_CH_Init(), XMC_SPI_CH_Stop()
XMC_SPI_CH_STATUS_t XMC_SPI_CH_Stop ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
XMC_SPI_CH_STATUS_t Status of the SPI driver after the request for stopping is processed.
XMC_SPI_CH_STATUS_OK- If the USIC channel is successfully put to IDLE mode.
XMC_SPI_CH_STATUS_BUSY- If the USIC channel is busy transmitting data.
Description:
Set the selected SPI channel to IDLE mode, by clearing CCR.MODE bits.

After calling XMC_SPI_CH_Stop, channel is IDLE mode. So no communication is supported. XMC_SPI_CH_Start() has to be invoked to start the communication again.
Related APIs:
XMC_SPI_CH_Start()
void XMC_SPI_CH_Transmit | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data,
 |  | const XMC_SPI_CH_MODE_t | mode
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
data | Data to be transmitted
mode Communication mode of the SPI, based on this mode TCI(Transmit control information)is updated.
Refer XMC_SPI_CH_MODE_t for valid values.
Returns
None
Description:
Puts the data into FIFO, if FIFO mode is enabled or else into standard buffer, by setting the proper mode.

In Dual and Quad modes, hardware port control(CCR.HPCEN) mode is enabled. By enabling this the direction of the data pin is updated by hardware itself. TCI(Transmit Control Information) allows dynamic control of both the data shift mode and pin direction during data transfers by writing to SCTR.DSM and SCTR.HPCDIR bit fields. To support this auto update, TCSR.HPCMD(Hardware Port control) will be enabled during the initialization using XMC_SPI_CH_Init() for all modes.
Related APIs:
XMC_SPI_CH_Receive()
void XMC_SPI_CH_TriggerServiceRequest | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | service_request_line
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Parameters
service_request_line service request number of the event to be triggered.
Range: 0 to 5.
Returns
None
Description
Trigger a SPI interrupt service request.

When the SPI service request is triggered, the NVIC interrupt associated with it will be generated if enabled.
Related APIs:
XMC_SPI_CH_SelectInterruptNodePointer()

Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_SPI_CH_CONFIG_t Struct Reference

Data Fields
XMC_SPI_CH_CONFIG_t Struct Reference
XMC Peripheral Library » SPI

#include <xmc_spi.h>

Data Fields

uint32_t baudrate
XMC_SPI_CH_BUS_MODE_t bus_mode
XMC_USIC_CH_PARITY_MODE_t parity_mode
XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t selo_inversion

Detailed Description

Structure for initializing SPI channel.

Field Documentation

uint32_t baudrate

Module baud rate for communication

XMC_SPI_CH_BUS_MODE_t bus_mode

Bus mode: Master/Slave

XMC_USIC_CH_PARITY_MODE_t parity_mode

Enable parity check for transmit and received data

XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t selo_inversion

Enable inversion of Slave select signal relative to the internal MSLS signal

The documentation for this struct was generated from the following file:
  • xmc_spi.h


XMC Peripheral Library for XMC4000 Family: UART

Data Structures | Macros | Enumerations | Functions
UART
XMC Peripheral Library

Data Structures

struct XMC_UART_CH_CONFIG_t

Macros

#define | XMC_UART0_CH0 XMC_USIC0_CH0
#define | XMC_UART0_CH1 XMC_USIC0_CH1
#define | XMC_UART1_CH0 XMC_USIC1_CH0
#define | XMC_UART1_CH1 XMC_USIC1_CH1
#define | XMC_UART2_CH0 XMC_USIC2_CH0
#define | XMC_UART2_CH1 XMC_USIC2_CH1

Enumerations

Functions

void | XMC_UART_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, const uint32_t flag)
void | XMC_UART_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_UART_CH_DisableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_DisableInputSync (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_UART_CH_EnableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_EnableInputSync (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
uint16_t | XMC_UART_CH_GetReceivedData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_UART_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_Init (XMC_USIC_CH_t *const channel, const XMC_UART_CH_CONFIG_t *const config)
void | XMC_UART_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_UART_CH_STATUS_t | XMC_UART_CH_SetBaudrate (XMC_USIC_CH_t *const channel, uint32_t rate, uint32_t oversampling)
void | XMC_UART_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_UART_CH_SetInputSamplingFreq (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input, const XMC_UART_CH_INPUT_SAMPLING_FREQ_t sampling_freq)
void | XMC_UART_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input, const uint8_t source)
void | XMC_UART_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_UART_CH_SetPulseLength (XMC_USIC_CH_t *const channel, const uint8_t pulse_length)
void | XMC_UART_CH_SetSamplePoint (XMC_USIC_CH_t *const channel, const uint32_t sample_point)
void | XMC_UART_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_UART_CH_Start (XMC_USIC_CH_t *const channel)
XMC_UART_CH_STATUS_t | XMC_UART_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_Transmit (XMC_USIC_CH_t *const channel, const uint16_t data)
void | XMC_UART_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)

Detailed Description

The UART driver uses Universal Serial Interface Channel(USIC) module to implement UART protocol. It provides APIs to configure USIC channel for UART communication. The driver enables the user in getting the status of UART protocol events, configuring interrupt service requests, protocol related parameter configuration etc.

UART driver features:

  1. Configuration structure XMC_UART_CH_CONFIG_t and initialization function XMC_UART_CH_Init()
  2. Enumeration of events with their bit masks XMC_UART_CH_EVENT_t, XMC_UART_CH_STATUS_FLAG_t
  3. Allows the selection of input source for the DX0 input stage using the API XMC_UART_CH_SetInputSource()
  4. Allows configuration of baudrate using XMC_UART_CH_SetBaudrate() and configuration of data length using XMC_UART_CH_SetWordLength() and XMC_UART_CH_SetFrameLength()
  5. Provides the status of UART protocol events, XMC_UART_CH_GetStatusFlag()
  6. Allows transmission of data using XMC_UART_CH_Transmit() and gets received data using XMC_UART_CH_GetReceivedData()

Macro Definition Documentation

#define XMC_UART0_CH0 XMC_USIC0_CH0

USIC0 channel 0 base address

#define XMC_UART0_CH1 XMC_USIC0_CH1

USIC0 channel 1 base address

#define XMC_UART1_CH0 XMC_USIC1_CH0

USIC1 channel 0 base address

#define XMC_UART1_CH1 XMC_USIC1_CH1

USIC1 channel 1 base address

#define XMC_UART2_CH0 XMC_USIC2_CH0

USIC2 channel 0 base address

#define XMC_UART2_CH1 XMC_USIC2_CH1

USIC2 channel 1 base address

Enumeration Type Documentation

enum XMC_UART_CH_EVENT_t

UART configuration events. The enums can be used for configuring events using the CCR register.

Enumerator
XMC_UART_CH_EVENT_RECEIVE_START | Receive start event
XMC_UART_CH_EVENT_DATA_LOST | Data lost event
XMC_UART_CH_EVENT_TRANSMIT_SHIFT | Transmit shift event
XMC_UART_CH_EVENT_TRANSMIT_BUFFER | Transmit buffer event
XMC_UART_CH_EVENT_STANDARD_RECEIVE | Receive event
XMC_UART_CH_EVENT_ALTERNATIVE_RECEIVE | Alternate receive event
XMC_UART_CH_EVENT_BAUD_RATE_GENERATOR | Baudrate generator event
XMC_UART_CH_EVENT_SYNCHRONIZATION_BREAK | Event synchronization break
XMC_UART_CH_EVENT_COLLISION | Event collision
XMC_UART_CH_EVENT_RECEIVER_NOISE | Event receiver noise
XMC_UART_CH_EVENT_FORMAT_ERROR | Event format error
XMC_UART_CH_EVENT_FRAME_FINISHED | Event frame finished
enum XMC_UART_CH_INPUT_SAMPLING_FREQ_t

UART Input sampling frequency options

Enumerator
XMC_UART_CH_INPUT_SAMPLING_FREQ_FPERIPH | Sampling frequency input fperiph
XMC_UART_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER | Sampling frequency input fractional divider
enum XMC_UART_CH_INPUT_t

UART input stages

Enumerator
XMC_UART_CH_INPUT_RXD | UART input stage DX0
XMC_UART_CH_INPUT_RXD1 | UART input stage DX3
XMC_UART_CH_INPUT_RXD2 | UART input stage DX5
enum XMC_UART_CH_INTERRUPT_NODE_POINTER_t

UART channel interrupt node pointers

Enumerator
XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT | Node pointer for transmit shift interrupt
XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER | Node pointer for transmit buffer interrupt
XMC_UART_CH_INTERRUPT_NODE_POINTER_RECEIVE | Node pointer for receive interrupt
XMC_UART_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE | Node pointer for alternate receive interrupt
XMC_UART_CH_INTERRUPT_NODE_POINTER_PROTOCOL | Node pointer for protocol related interrupts
enum XMC_UART_CH_STATUS_FLAG_t

UART portocol status. The enum values can be used for getting the status of UART channel.

Enumerator
XMC_UART_CH_STATUS_FLAG_TRANSMISSION_IDLE | UART Protocol Status transmit IDLE
XMC_UART_CH_STATUS_FLAG_RECEPTION_IDLE | UART Protocol Status receive IDLE
XMC_UART_CH_STATUS_FLAG_SYNCHRONIZATION_BREAK_DETECTED | UART Protocol Status synchronization break detected
XMC_UART_CH_STATUS_FLAG_COLLISION_DETECTED | UART Protocol Status collision detected
XMC_UART_CH_STATUS_FLAG_RECEIVER_NOISE_DETECTED | UART Protocol Status receiver noise detected
XMC_UART_CH_STATUS_FLAG_FORMAT_ERROR_IN_STOP_BIT_0 | UART Protocol Status format error in stop bit 0
XMC_UART_CH_STATUS_FLAG_FORMAT_ERROR_IN_STOP_BIT_1 | UART Protocol Status format error in stop bit 1
XMC_UART_CH_STATUS_FLAG_RECEIVE_FRAME_FINISHED | UART Protocol Status receive frame finished
XMC_UART_CH_STATUS_FLAG_TRANSMITTER_FRAME_FINISHED | UART Protocol Status transmit frame finished
XMC_UART_CH_STATUS_FLAG_TRANSFER_STATUS_BUSY | UART Protocol Status transfer status busy
XMC_UART_CH_STATUS_FLAG_RECEIVER_START_INDICATION | UART Protocol Status receive start indication flag
XMC_UART_CH_STATUS_FLAG_DATA_LOST_INDICATION | UART Protocol Status data lost indication flag
XMC_UART_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION | UART Protocol Status transmit shift indication flag
XMC_UART_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION | UART Protocol Status transmit buffer indication flag
XMC_UART_CH_STATUS_FLAG_RECEIVE_INDICATION | UART Protocol Status receive indication flag
XMC_UART_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION | UART Protocol Status alternative receive indication flag
XMC_UART_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION | UART Protocol Status baudrate generator indication flag
enum XMC_UART_CH_STATUS_t

UART driver status

Enumerator
XMC_UART_CH_STATUS_OK | UART driver status : OK
XMC_UART_CH_STATUS_ERROR | UART driver status : ERROR
XMC_UART_CH_STATUS_BUSY | UART driver status : BUSY

Function Documentation

void XMC_UART_CH_ClearStatusFlag | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | flag
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
flag UART events to be cleared.
Range: Use XMC_UART_CH_STATUS_FLAG_t enumerations for event bitmasks. XMC_UART_CH_STATUS_FLAG_TRANSMISSION_IDLE, XMC_UART_CH_STATUS_FLAG_RECEPTION_IDLE, XMC_UART_CH_STATUS_FLAG_SYNCHRONIZATION_BREAK_DETECTED etc.
Returns
None
Description
Clears the status of UART channel events.

Multiple events can be combined using the bitwise OR operation and configured in one function call. XMC_UART_CH_STATUS_FLAG_t enumerates multiple event bitmasks. These enumerations can be used as input to the API. Events are cleared by setting the bitmask to the PSCR register.
Related APIs:
XMC_UART_CH_DisableEvent(), XMC_UART_CH_GetStatusFlag()

void XMC_UART_CH_DisableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Returns
None
Description
Disable data transmission.

Use this function in combination with XMC_UART_CH_EnableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Related APIs:
XMC_UART_CH_EnableDataTransmission()

void XMC_UART_CH_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
event Bitmask of events to disable. Use the type XMC_UART_CH_EVENT_t for naming events.
Range: XMC_UART_CH_EVENT_RECEIVE_START, XMC_UART_CH_EVENT_DATA_LOST, XMC_UART_CH_EVENT_TRANSMIT_SHIFT, XMC_UART_CH_EVENT_TRANSMIT_BUFFER, etc.
Returns
None
Description
Disables the interrupt events by clearing the bits in CCR register.

Multiple events can be combined using the bitwise OR operation and configured in one function call. XMC_UART_CH_EVENT_FLAG_t enumerates multiple event bitmasks. These enumerations can be used as input to the API.
Related APIs:
XMC_UART_CH_ClearStatusFlag(), XMC_UART_CH_EnableEvent()

void XMC_UART_CH_DisableInputDigitalFilter | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
Returns
None
Description
Disables the digital filter for UART input stage.

Related APIs:
XMC_UART_CH_EnableInputDigitalFilter()

void XMC_UART_CH_DisableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
Returns
None
Description
Disables input inversion for UART input data signal.

Resets the input data polarity for the UART input data signal.
Related APIs:
XMC_UART_CH_EnableInputInversion()

void XMC_UART_CH_DisableInputSync | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
Returns
None
Description
Disables synchronous input for the UART input stage.

Related APIs:
XMC_UART_CH_EnableInputSync(), XMC_UART_CH_EnableInputDigitalFilter()

void XMC_UART_CH_EnableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Returns
None
Description
Enable data transmission.

Use this function in combination with XMC_UART_CH_DisableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Note
If you need more control over the start of transmission use XMC_USIC_CH_SetStartTransmisionMode()
Related APIs:
XMC_UART_CH_DisableDataTransmission()

void XMC_UART_CH_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
event Event bitmasks to enable. Use the type XMC_UART_CH_EVENT_t for naming events.
Range: XMC_UART_CH_EVENT_RECEIVE_START, XMC_UART_CH_EVENT_DATA_LOST, XMC_UART_CH_EVENT_TRANSMIT_SHIFT, XMC_UART_CH_EVENT_TRANSMIT_BUFFER, etc.
Returns
None
Description
Enables interrupt events for UART communication.

Multiple events can be combined using the bitwise OR operation and configured in one function call. XMC_UART_CH_EVENT_t enumerates multiple event bitmasks. These enumerations can be used as input to the API. Events are configured by setting bits in the CCR register.
Related APIs:
XMC_UART_CH_DisableEvent(), XMC_UART_CH_SetInterruptNodePointer(), XMC_UART_CH_GetStatusFlag()

void XMC_UART_CH_EnableInputDigitalFilter | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
Returns
None
Description
Enables the digital filter for UART input stage.

Related APIs:
XMC_UART_CH_DisableInputDigitalFilter()

void XMC_UART_CH_EnableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
Returns
None
Description
Enables input inversion for UART input data signal.

Polarity of the input source can be changed to provide inverted data input.
Related APIs:
XMC_UART_CH_DisableInputInversion()

void XMC_UART_CH_EnableInputSync | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
Returns
None
Description
Enables synchronous input for the UART input stage.

Related APIs:
XMC_UART_CH_DisableInputSync(), XMC_UART_CH_EnableInputDigitalFilter()

uint16_t XMC_UART_CH_GetReceivedData ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Returns
uint16_t Received data over UART communication channel.
Description
Provides one word of data received over UART communication channel.

Based on the channel configuration, data is either read from the receive FIFO or RBUF register. Before returning the value, there is no check for data validity. User should check the appropriate data receive flags(standard receive/alternative receive/FIFO standard receive/FIFO alternative receive) before executing the API. Reading from an empty receive FIFO can generate a receive error event.
Related APIs:
XMC_UART_CH_GetStatusFlag(), XMC_UART_CH_Transmit()

uint32_t XMC_UART_CH_GetStatusFlag ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Returns
Status of UART channel events.
Range: Use XMC_UART_CH_STATUS_FLAG_t enumerations for event bitmasks. XMC_UART_CH_STATUS_FLAG_TRANSMISSION_IDLE, XMC_UART_CH_STATUS_FLAG_RECEPTION_IDLE, XMC_UART_CH_STATUS_FLAG_SYNCHRONIZATION_BREAK_DETECTED etc.
Description
Provides the status of UART channel events.

Status provided by the API represents the status of multiple events at their bit positions. The bitmasks can be obtained using the enumeration XMC_UART_CH_STATUS_FLAG_t. Event status is obtained by reading the register PSR_ASCMode.
Related APIs:
XMC_UART_CH_EnableEvent(), XMC_UART_CH_ClearStatusFlag()

void XMC_UART_CH_Init | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_CONFIG_t *const | config
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0, XMC_UART1_CH1,XMC_UART2_CH0, XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
config Constant pointer to UART configuration structure of type XMC_UART_CH_CONFIG_t.
Returns
XMC_UART_CH_STATUS_t Status of initializing the USIC channel for UART protocol.
Range: XMC_UART_CH_STATUS_OK if initialization is successful.
XMC_UART_CH_STATUS_ERROR if configuration of baudrate failed.
Description
Initializes the USIC channel for UART protocol.

During the initialization, USIC channel is enabled, baudrate is configured with the defined oversampling value in the intialization structure. If the oversampling value is set to 0 in the structure, the default oversampling of 16 is considered. Sampling point for each symbol is configured at the half of sampling period. Symbol value is decided by the majority decision among 3 samples. Word length is configured with the number of data bits. If the value of frame_length is 0, then USIC channel frame length is set to the same value as word length. If frame_length is greater than 0, it is set as the USIC channel frame length. Parity mode is set to the value configured for parity_mode. The USIC channel should be set to UART mode by calling the XMC_UART_CH_Start() API after the initialization.
Related APIs:
XMC_UART_CH_Start(), XMC_UART_CH_Stop(), XMC_UART_CH_Transmit()

void XMC_UART_CH_SelectInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
interrupt_node Interrupt node pointer to be configured.
Range: XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT, XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER etc.
service_request Service request number.
Range: 0 to 5.
Returns
None
Description
Sets the interrupt node for USIC channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so.
Note: NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_UART_CH_EnableEvent()

XMC_UART_CH_STATUS_t XMC_UART_CH_SetBaudrate | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | rate,
 |  | uint32_t | oversampling
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1 ,XMC_UART1_CH0, XMC_UART1_CH1, XMC_UART2_CH0, XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
rate Desired baudrate.
Range: minimum value = 100, maximum value depends on the peripheral clock frequency
and oversampling. Maximum baudrate can be derived using the formula: (fperiph * 1023)/(1024 * oversampling)
oversampling Required oversampling. The value indicates the number of time quanta for one symbol of data.
This can be related to the number of samples for each logic state of the data signal.
Range: 4 to 32. Value should be chosen based on the protocol used.
Returns
XMC_UART_CH_STATUS_t Status indicating the baudrate configuration.
Range: XMC_USIC_CH_STATUS_OK if baudrate is successfully configured, XMC_USIC_CH_STATUS_ERROR if desired baudrate or oversampling is invalid.
Description:
Sets the bus speed in bits per second.

Derives the values of STEP and PDIV to arrive at the optimum realistic speed possible. oversampling is the number of samples to be taken for each symbol of UART protocol. Default oversampling of 16 is considered if the input oversampling is less than 4. It is recommended to keep a minimum oversampling of 4 for UART.
Related APIs:
XMC_UART_CH_Init(), XMC_UART_CH_Stop()
void XMC_UART_CH_SetFrameLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | frame_length
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
frame_length Number of data bits in each UART frame.
Range: minimum= 1, maximum= 64.
Returns
None
Description
Sets the number of data bits for UART communication.

The frame length is configured by setting the input value to SCTR register. The value of frame_length will be decremented by 1, before setting it to the register. Frame length should not be set to 64 for UART communication.
Related APIs:
XMC_UART_CH_SetWordLength()

void XMC_UART_CH_SetInputSamplingFreq | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input,
 |  | const XMC_UART_CH_INPUT_SAMPLING_FREQ_t | sampling_freq
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
sampling_freq Input sampling frequency.
Range: XMC_UART_CH_INPUT_SAMPLING_FREQ_FPERIPH, XMC_UART_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER.
Returns
None
Description
Sets the sampling frequency for the UART input stage.

Related APIs:
XMC_UART_CH_EnableInputSync(), XMC_UART_CH_EnableInputDigitalFilter()

void XMC_UART_CH_SetInputSource | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input,
 |  | const uint8_t | source
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
source Input source select for the input stage. The table provided below maps the decimal value with the input source.
0 | DXnA
1 | DXnB
2 | DXnC
3 | DXnD
4 | DXnE
5 | DXnF
6 | DXnG
7 | Always 1
Returns
None
Description
Sets input soource for the UART communication.

It is used for configuring the input stage for data reception. Selects the input data signal source among DXnA, DXnB.. DXnG for the input stage. The API can be used for the input stages DX0, DX3 and DX5.
Related APIs:
XMC_UART_CH_EnableInputInversion()

void XMC_UART_CH_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | service_request
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
service_request Service request number for generating protocol interrupts.
Range: 0 to 5.
Returns
None
Description
Sets the interrupt node for UART channel protocol events.

For all the protocol events enlisted in the enumeration XMC_UART_CH_EVENT_t, one common interrupt gets generated. The service request connects the interrupt node to the UART protocol events. Note: NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_UART_CH_EnableEvent()

void XMC_UART_CH_SetPulseLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | pulse_length
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
pulse_length Length of the zero pulse in number of time quanta.
Range: 0 to 7.
Returns
None
Description
Sets the length of zero pulse in number of time quanta. Value 0 indicates one time quanta.

Maximum possible is 8 time quanta with the value configured as 7.
The value is set to PCR_ASCMode register.
Related APIs:
XMC_UART_CH_EnableInputInversion(), XMC_UART_CH_SetSamplePoint()

void XMC_UART_CH_SetSamplePoint | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | sample_point
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
sample_point Sample point among the number of samples.
Range: minimum= 0, maximum= oversampling (DCTQ).
Returns
None
Description
Sets the sample point among the multiple samples for each UART symbol.

The sample point is the one sample among number of samples set as oversampling. The value should be less than the oversampling value. XMC_UART_CH_Init() sets the sample point to the sample at the centre. For example if the oversampling is 16, then the sample point is set to 9.
Related APIs:
XMC_UART_CH_EnableInputInversion(), XMC_UART_CH_SetSamplePoint()

void XMC_UART_CH_SetWordLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | word_length
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
word_length Data word length.
Range: minimum= 1, maximum= 16.
Returns
None
Description
Sets the data word length in number of bits.

Word length can range from 1 to 16. It indicates the number of data bits in a data word. The value of word_length will be decremented by 1 before setting the value to SCTR register. If the UART data bits is more than 16, then the frame length should be set to the actual number of bits and word length should be configured with the number of bits expected in each transaction. For example, if number of data bits for UART communication is 20 bits, then the frame length should be set as 20. Word length can be set based on the transmit and receive handling. If data is stored as 8bit array, then the word length can be set to 8. In this case, a full message of UART data should be transmitted/ received as 3 data words.
Related APIs:
XMC_UART_CH_SetFrameLength()

void XMC_UART_CH_Start ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Returns
None
Description
Sets the USIC channel operation mode to UART mode.

CCR register bitfield Mode is set to 2(UART mode). This API should be called after configuring the USIC channel. Transmission and reception can happen only when the UART mode is set. This is an inline function.
Related APIs:
XMC_UART_CH_Stop(), XMC_UART_CH_Transmit()

XMC_UART_CH_STATUS_t XMC_UART_CH_Stop ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Returns
XMC_UART_CH_STATUS_t Status to indicate if the communication channel is stopped successfully.
XMC_UART_CH_STATUS_OK if the communication channel is stopped. XMC_UART_CH_STATUS_BUSY if the communication channel is busy.
Description
Stops the UART communication.

CCR register bitfield Mode is reset. This disables the communication. Before starting the communication again, the channel has to be reconfigured.
Related APIs:
XMC_UART_CH_Init()

void XMC_UART_CH_Transmit | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
data Data to be transmitted.
Range: 16 bit unsigned data within the range 0 to 65535. Actual size of data transmitted depends on the configured number of bits for the UART protocol in the register SCTR.
Returns
None
Description
Transmits data over serial communication channel using UART protocol.

Based on the channel configuration, data is either put to the transmit FIFO or to TBUF register. Before putting data to TBUF, the API waits for TBUF to finish shifting its contents to shift register. So user can continuously execute the API without checking for TBUF busy status. Based on the number of data bits configured, the lower significant bits will be extracted for transmission.

Note: When FIFO is not configured, the API waits for the TBUF to be available. This makes the execution a blocking call.

Related APIs:
XMC_UART_CH_GetReceivedData()

void XMC_UART_CH_TriggerServiceRequest | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | service_request_line
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
service_request_line service request number of the event to be triggered.
Range: 0 to 5.
Returns
None
Description
Trigger a UART interrupt service request.

When the UART service request is triggered, the NVIC interrupt associated with it will be generated if enabled.
Related APIs:
XMC_UART_CH_SelectInterruptNodePointer()

Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_UART_CH_CONFIG_t Struct Reference

Data Fields
XMC_UART_CH_CONFIG_t Struct Reference
XMC Peripheral Library » UART

#include <xmc_uart.h>

Data Fields

uint32_t | baudrate
uint8_t | data_bits
uint8_t | frame_length
uint8_t | oversampling
XMC_USIC_CH_PARITY_MODE_t parity_mode
uint8_t | stop_bits

Detailed Description

UART initialization structure

Field Documentation

uint32_t baudrate

Desired baudrate. Range: minimum= 100, maximum= (fPERIPH * 1023)/(1024 * oversampling)

uint8_t data_bits

Number of bits for the data field. Value configured as USIC channel word length.
Range: minimum= 1, maximum= 16

uint8_t frame_length

Indicates nmber of bits in a frame. Configured as USIC channel frame length.
Range: minimum= 1, maximum= 63

uint8_t oversampling

Number of samples for a symbol(DCTQ).Range: minimum= 1, maximum= 32

XMC_USIC_CH_PARITY_MODE_t parity_mode

Parity mode. Range: XMC_USIC_CH_PARITY_MODE_NONE, XMC_USIC_CH_PARITY_MODE_EVEN,
XMC_USIC_CH_PARITY_MODE_ODD

uint8_t stop_bits

Number of stop bits. Range: minimum= 1, maximum= 2

The documentation for this struct was generated from the following file:
  • xmc_uart.h


XMC Peripheral Library for XMC4000 Family: USBD

Data Structures | Macros | Typedefs | Enumerations | Functions | Variables
USBD
XMC Peripheral Library

Data Structures

struct | XMC_USBD_CAPABILITIES_t
struct | XMC_USBD_DEVICE_t
struct | XMC_USBD_DRIVER_t
struct | XMC_USBD_EP_t
struct | XMC_USBD_STATE_t
struct | XMC_USBD_t

Macros

#define | XMC_USBD_ENDPOINT_DIRECTION_MASK (0x80U)
#define | XMC_USBD_ENDPOINT_MAX_PACKET_SIZE_MASK (0x07FFU)
#define | XMC_USBD_ENDPOINT_NUMBER_MASK (0x0FU)
#define | XMC_USBD_EP_DIR_MASK (0x80U)
#define | XMC_USBD_EP_NUM_MASK (0x0FU)
#define | XMC_USBD_MAX_FIFO_SIZE (2048U)
#define | XMC_USBD_MAX_PACKET_SIZE (64U)
#define | XMC_USBD_MAX_TRANSFER_SIZE_EP0 (64U)
#define | XMC_USBD_NUM_EPS (7U)
#define | XMC_USBD_NUM_TX_FIFOS (7U)
#define | XMC_USBD_SETUP_COUNT (3U)
#define | XMC_USBD_SETUP_SIZE (8U)
#define | XMC_USBD_SPEED_FULL (1U)

Typedefs

typedef void(* | XMC_USBD_SignalDeviceEvent_t) (XMC_USBD_EVENT_t event)
typedef void(* | XMC_USBD_SignalEndpointEvent_t) (uint8_t ep_addr, XMC_USBD_EP_EVENT_t ep_event)

Enumerations

Functions

void | XMC_USBD_ClearEvent (XMC_USBD_EVENT_t event)
void | XMC_USBD_ClearEventINEP (uint32_t event, uint8_t ep_num)
void | XMC_USBD_ClearEventOUTEP (uint32_t event, uint8_t ep_num)
XMC_USBD_STATUS_t | XMC_USBD_DeviceConnect (void)
XMC_USBD_STATUS_t | XMC_USBD_DeviceDisconnect (void)
XMC_USBD_STATE_t | XMC_USBD_DeviceGetState (const XMC_USBD_t *const obj)
XMC_USBD_STATUS_t | XMC_USBD_DeviceSetAddress (uint8_t address, XMC_USBD_SET_ADDRESS_STAGE_t stage)
void | XMC_USBD_Disable (void)
void | XMC_USBD_Enable (void)
void | XMC_USBD_EnableEventINEP (uint32_t event)
void | XMC_USBD_EnableEventOUTEP (uint32_t event)
XMC_USBD_STATUS_t | XMC_USBD_EndpointAbort (uint8_t ep_addr)
XMC_USBD_STATUS_t | XMC_USBD_EndpointConfigure (uint8_t ep_addr, XMC_USBD_ENDPOINT_TYPE_t ep_type, uint16_t ep_max_packet_size)
int32_t | XMC_USBD_EndpointRead (const uint8_t ep_addr, uint8_t *buffer, uint32_t length)
XMC_USBD_STATUS_t | XMC_USBD_EndpointReadStart (const uint8_t ep_addr, uint32_t size)
XMC_USBD_STATUS_t | XMC_USBD_EndpointStall (uint8_t ep_addr, bool stall)
XMC_USBD_STATUS_t | XMC_USBD_EndpointUnconfigure (uint8_t ep_addr)
int32_t | XMC_USBD_EndpointWrite (const uint8_t ep_addr, const uint8_t *buffer, uint32_t length)
XMC_USBD_CAPABILITIES_t | XMC_USBD_GetCapabilities (void)
uint16_t | XMC_USBD_GetFrameNumber (void)
XMC_USBD_STATUS_t | XMC_USBD_Init (XMC_USBD_t *obj)
void | XMC_USBD_IRQHandler (const XMC_USBD_t *const obj)
uint32_t | XMC_USBD_IsEnumDone (void)
XMC_USBD_STATUS_t | XMC_USBD_Uninitialize (void)

Variables

const XMC_USBD_DRIVER_t Driver_USBD0
XMC_USBD_DEVICE_t xmc_device

Detailed Description

The USBD is the device driver for the USB0 hardware module on XMC4000 family of microcontrollers. The USB0 module can be used to establish a USB interface between outside world and XMC4000 family of controllers. The USB module includes the following features in device mode:

  1. Complies with the USB 2.0 Specification.
  2. Support for the Full-Speed (12-Mbps) mode.
  3. Supports up to 7 bidirectional endpoints, including control endpoint 0.
  4. Supports SOFs in Full-Speed modes.
  5. Supports clock gating for power saving.
  6. Supports USB suspend/resume.
  7. Supports USB soft disconnect.
  8. Supports DMA mode.
  9. Supports FIFO mode.

The below figure shows the overview of USB0 module in XMC4 microntroller.

The below figure shows the USB device connection of USB0 module.

The USBD device driver supports the following features:

  1. Initialize/Uninitialize the USB0 module on XMC4000 device.
  2. Connect the USB device to host.
  3. Get USB device state.
  4. Set the USB device address.
  5. Configure/Unconfigure the USB endpoints.
  6. Stall/Abort the USB endpoints.
  7. USB IN transfers on EP0 and non EP0 endpoints.
  8. USB OUT transfers on EP0 and non EP0 endpoints.

The USBD device driver provides the configuration structure XMC_USBD_t which user need to configure before initializing the USB.
The following elements of configuration structure need to be initialized before calling the XMC_USBD_Init API:

  1. cb_xmc_device_event of type XMC_USBD_SignalDeviceEvent_t.
  2. cb_endpoint_event of type XMC_USBD_SignalEndpointEvent_t.
  3. usbd_max_num_eps of type XMC_USBD_MAX_NUM_EPS_t.
  4. usbd_transfer_mode of type XMC_USBD_TRANSFER_MODE_t.

Macro Definition Documentation

#define XMC_USBD_ENDPOINT_DIRECTION_MASK (0x80U)

USB Endpoint direction mask to get the EP direction from address.

#define XMC_USBD_ENDPOINT_MAX_PACKET_SIZE_MASK (0x07FFU)

USB Endpoint Maximum Packet Size mask

#define XMC_USBD_ENDPOINT_NUMBER_MASK (0x0FU)

USB Endpoint number mask to get the EP number from address.

#define XMC_USBD_EP_DIR_MASK (0x80U)

USB Endpoint direction mask

#define XMC_USBD_EP_NUM_MASK (0x0FU)

USB Endpoint number mask.

#define XMC_USBD_MAX_FIFO_SIZE (2048U)

Maximum USBD endpoint fifo size

#define XMC_USBD_MAX_PACKET_SIZE (64U)

Maximum packet size for all endpoints (including ep0) Maximum transfer size for endpoints.

It's based on the maximum payload, due to the fact, that we only can transfer 2^10 - 1 packets and this is less than the transfer size field can hold.

#define XMC_USBD_MAX_TRANSFER_SIZE_EP0 (64U)

Maximum transfer size for endpoint 0

#define XMC_USBD_NUM_EPS (7U)

Number of hardware endpoints

#define XMC_USBD_NUM_TX_FIFOS (7U)

Number of hardware transmission endpoint fifos

#define XMC_USBD_SETUP_COUNT (3U)

The number of USB setup packets

#define XMC_USBD_SETUP_SIZE (8U)

The size of USB setup data

#define XMC_USBD_SPEED_FULL (1U)

Speed Mode. Full Speed

Typedef Documentation

typedef void(* XMC_USBD_SignalDeviceEvent_t) (XMC_USBD_EVENT_t event)

USB device/endpoint event function pointersPointer to USB device event call back. Uses type XMC_USBD_EVENT_t as the argument of callback.

typedef void(* XMC_USBD_SignalEndpointEvent_t) (uint8_t ep_addr, XMC_USBD_EP_EVENT_t ep_event)

Pointer to USB endpoint event call back. Uses type XMC_USBD_EP_EVENT_t and EP address as the argument of callback.

Enumeration Type Documentation

enum XMC_USBD_ENDPOINT_TYPE_t

Defines the options for the USB endpoint type. The values are from the USB 2.0 specification. Use type XMC_USBD_ENDPOINT_TYPE_t for this enum.

Enumerator
XMC_USBD_ENDPOINT_TYPE_CONTROL | Control endpoint
XMC_USBD_ENDPOINT_TYPE_ISOCHRONOUS | Isochronous endpoint
XMC_USBD_ENDPOINT_TYPE_BULK | Bulk endpoint
XMC_USBD_ENDPOINT_TYPE_INTERRUPT | Interrupt endpoint
enum XMC_USBD_EP_EVENT_t

Defines the generic USB endpoint events. Use type XMC_USBD_EP_EVENT_t for this enum.

Enumerator
XMC_USBD_EP_EVENT_SETUP | SETUP packet
XMC_USBD_EP_EVENT_OUT | OUT packet
XMC_USBD_EP_EVENT_IN | IN packet
enum XMC_USBD_EVENT_IN_EP_t

Defines the USB IN endpoint events. Use type XMC_USBD_EVENT_IN_EP_t for this enum.

Enumerator
XMC_USBD_EVENT_IN_EP_TX_COMPLET | USB IN ep transmission complete
XMC_USBD_EVENT_IN_EP_DISABLED | USB IN ep disabled
XMC_USBD_EVENT_IN_EP_AHB_ERROR | USB IN ep AHB error
XMC_USBD_EVENT_IN_EP_TIMEOUT | USB IN ep timeout
enum XMC_USBD_EVENT_OUT_EP_t

Defines the USB OUT endpoint events. Use type XMC_USBD_EVENT_OUT_EP_t for this enum.

Enumerator
XMC_USBD_EVENT_OUT_EP_TX_COMPLET | USB OUT ep transmission complete
XMC_USBD_EVENT_OUT_EP_DISABLED | USB OUT ep disabled
XMC_USBD_EVENT_OUT_EP_AHB_ERROR | USB OUT ep AHB error
XMC_USBD_EVENT_OUT_EP_SETUP | USB OUT ep setup
enum XMC_USBD_EVENT_t

Defines the USB Device events. Use type XMC_USBD_EVENT_t for this enum.

Enumerator
XMC_USBD_EVENT_POWER_ON | USB Device Power On
XMC_USBD_EVENT_POWER_OFF | USB Device Power Off
XMC_USBD_EVENT_CONNECT | USB Device connected
XMC_USBD_EVENT_DISCONNECT | USB Device disconnected
XMC_USBD_EVENT_RESET | USB Reset occurred
XMC_USBD_EVENT_HIGH_SPEED | USB switch to High Speed occurred
XMC_USBD_EVENT_SUSPEND | USB Suspend occurred
XMC_USBD_EVENT_RESUME | USB Resume occurred
XMC_USBD_EVENT_REMOTE_WAKEUP | USB Remote wakeup
XMC_USBD_EVENT_SOF | USB Start of frame event
XMC_USBD_EVENT_EARLYSUSPEND | USB Early suspend
XMC_USBD_EVENT_ENUMDONE | USB enumeration done
XMC_USBD_EVENT_ENUMNOTDONE | USB enumeration not done
XMC_USBD_EVENT_OUTEP | USB OUT endpoint
XMC_USBD_EVENT_INEP | USB IN endpoint
enum XMC_USBD_GRXSTS_PKTSTS_t

Defines the options for the global receive fifo packet status. Use type XMC_USBD_GRXSTS_PKTSTS_t for this enum.

Enumerator
XMC_USBD_GRXSTS_PKTSTS_GOUTNAK | Global out nack send ( triggers an interrupt )
XMC_USBD_GRXSTS_PKTSTS_OUTDATA | OUT data packet received
XMC_USBD_GRXSTS_PKTSTS_OUTCMPL | OUT transfer completed (triggers an interrupt)
XMC_USBD_GRXSTS_PKTSTS_SETUPCMPL | SETUP transaction completed (triggers an interrupt)
XMC_USBD_GRXSTS_PKTSTS_SETUP | SETUP data packet received
enum XMC_USBD_MAX_NUM_EPS_t

Defines the options for the maximum number of endpoints used. Use type XMC_USBD_MAX_NUM_EPS_t for this enum.

Enumerator
XMC_USBD_MAX_NUM_EPS_1 | Maximum 1 endpoint used
XMC_USBD_MAX_NUM_EPS_2 | Maximum 2 endpoints used
XMC_USBD_MAX_NUM_EPS_3 | Maximum 3 endpoints used
XMC_USBD_MAX_NUM_EPS_4 | Maximum 4 endpoints used
XMC_USBD_MAX_NUM_EPS_5 | Maximum 5 endpoints used
XMC_USBD_MAX_NUM_EPS_6 | Maximum 6 endpoints used
XMC_USBD_MAX_NUM_EPS_7 | Maximum 2 endpoints used
enum XMC_USBD_SET_ADDRESS_STAGE_t

Defines the options for USB device state while setting the address. Use type XMC_USBD_SET_ADDRESS_STAGE_t for this enum.

Enumerator
XMC_USBD_SET_ADDRESS_STAGE_SETUP | Setup address
XMC_USBD_SET_ADDRESS_STAGE_STATUS | Status address
enum XMC_USBD_STATUS_t

Defines the USB Device Status of executed operation. Use type XMC_USBD_STATUS_t for this enum.

Enumerator
XMC_USBD_STATUS_OK | USBD Status: Operation succeeded
XMC_USBD_STATUS_BUSY | Driver is busy and cannot handle request
XMC_USBD_STATUS_ERROR | USBD Status: Unspecified error
enum XMC_USBD_TRANSFER_MODE_t

Defines the options for the USB data transfer modes. Use type XMC_USBD_TRANSFER_MODE_t for this enum.

Enumerator
XMC_USBD_USE_DMA | Transfer by DMA
XMC_USBD_USE_FIFO | Transfer by FIFO

Function Documentation

void XMC_USBD_ClearEvent ( XMC_USBD_EVENT_t event )
Parameters
event The single event that needs to be cleared. Use XMC_USBD_EVENT_t as argument.
Returns
None.
Description:
Clears the selected USBD event.
It clears the event by writing to the GINTSTS register.
Note:
This API is called inside the USB interrupt handler to clear the event XMC_USBD_EVENT_t and maintain the device state machine.
Related APIs:
XMC_USBD_ClearEventOUTEP(),XMC_USBD_ClearEventINEP()
void XMC_USBD_ClearEventINEP | ( | uint32_t | event,
 |  | uint8_t | ep_num
 | ) |  |
Parameters
event | The single event or multiple events that need to be cleared.
ep_num | The IN endpoint number on which the events to be cleared.
Returns
None.
Description:
Clears the single event or multiple events of the selected IN endpoint.
The multiple events can be selected by the bitwise OR operation of XMC_USBD_EVENT_IN_EP_t elements.
It clears the event by programming DIEPINT register.
Note:
This API is called inside the USB IN EP interrupt handler to clear the XMC_USBD_EVENT_IN_EP_t event and maintain the device state machine.
Related APIs:
XMC_USBD_ClearEventOUTEP()
void XMC_USBD_ClearEventOUTEP | ( | uint32_t | event,
 |  | uint8_t | ep_num
 | ) |  |
Parameters
event | The single event or multiple events that need to be cleared.
ep_num | The OUT endpoint number on which the events to be cleared.
Returns
None.
Description:
Clears the single event or multiple events of the selected OUT endpoint.
The multiple events can be selected by the bitwise OR operation of XMC_USBD_EVENT_OUT_EP_t elements. It clears the event by writing to DOEPINT register.
Note:
This API is called inside the USB OUT EP interrupt handler to clear the XMC_USBD_EVENT_OUT_EP_t event and maintain the device state machine.
Related APIs:
XMC_USBD_ClearEventINEP()
XMC_USBD_STATUS_t XMC_USBD_DeviceConnect ( void )
Parameters
None.
Returns
XMC_USBD_STATUS_t.
Description:
Connects the USB device to host and triggers the USB enumeration.
Connects the USB device to host by programming DCTL register.
It resets the soft disconnect bit, which activates the speed pull up at d+ line of USB. XMC_USBD_Init() should be called before calling this API.
Note:
Once this API is called, USB host starts the enumeration process and the device should handle the descriptor requests.
Related APIs:
XMC_USBD_Init()
XMC_USBD_STATUS_t XMC_USBD_DeviceDisconnect ( void )
Parameters
None.
Returns
XMC_USBD_STATUS_t.
Description:
Disconnects the USB device from host.
By programming DCTL register, it sets the soft disconnect bit, which deactivates
the speed pull up at d+ line of USB.
Note:
Once this API is called, USB device will not be accessible from host.
Related APIs:
XMC_USBD_DeviceConnect()
XMC_USBD_STATE_t XMC_USBD_DeviceGetState ( const XMC_USBD_t *const obj )
Parameters
obj The pointer to the USB device handle structure XMC_USBD_t.
Returns
XMC_USBD_STATE_t.
Description:
Retrieves the current USB device state.
Power,active,speed and connection status data are retrieved.
Note:
Before calling this API, USB should be initialized with XMC_USBD_Init.
Related APIs:
XMC_USBD_Init()
XMC_USBD_STATUS_t XMC_USBD_DeviceSetAddress | ( | uint8_t | address,
 |  | XMC_USBD_SET_ADDRESS_STAGE_t | stage
 | ) |  |
Parameters
address | The address to be set for the USB device .
stage | The device request stage-setup or status XMC_USBD_SET_ADDRESS_STAGE_t.
Returns
XMC_USBD_STATUS_t.
Description:
Sets the USB device address.
The device address is programmed in the DCFG register.

The address should be more than 0; as 0 is the default USB device address at the starting of enumeration. As part of enumeration, host sends the control request to the device to set the USB address; and in turn,
in the USB device event call back handler, user has to set the address using this API for the set address request.

The stage parameter should be XMC_USBD_SET_ADDRESS_STAGE_SETUP from the enum XMC_USBD_SET_ADDRESS_STAGE_t.

Note:
Before calling this API, USB should be initialized with XMC_USBD_Init () and connected to USB host using XMC_USBD_DeviceConnect()
Related APIs:
XMC_USBD_Init(), XMC_USBD_DeviceConnect()
void XMC_USBD_Disable ( void )
Parameters
None.
Returns
None.
Description:
Disables the USB module in the XMC controller.
It asserts the peripheral reset on USB0 module and disables the USB power.
Related APIs:
XMC_USBD_Enable()
void XMC_USBD_Enable ( void )
Parameters
None.
Returns
None.
Description:
Enables the USB module in the XMC controller.
It de-asserts the peripheral reset on USB0 module and enables the USB power.
Note:
This API is called inside the XMC_USBD_Init().
Related APIs:
XMC_USBD_Disable()
void XMC_USBD_EnableEventINEP ( uint32_t event )
Parameters
event The single event or multiple events that need to be enabled.
Returns
None.
Description:
Enables the event or multiple events of the USB IN endpoints.
The multiple events can be selected by the bitwise OR operation of XMC_USBD_EVENT_IN_EP_t elements. It enables the event by programming DIEPMSK register.
Note:
This API is called inside the XMC_USBD_Init() to enable the IN EP interrupts.
Related APIs:
XMC_USBD_EnableEventOUTEP()
void XMC_USBD_EnableEventOUTEP ( uint32_t event )
Parameters
event The single event or multiple events that need to be enabled.
Returns
None.
Description:
Enables the event or multiple events of the OUT endpoints.
The multiple events can be selected by the bitwise OR operation of XMC_USBD_EVENT_OUT_EP_t elements. It enables the event by programming DOEPMSK register.
Note:
This API is called inside the XMC_USBD_Init() to enable the OUT EP interrupts.
Related APIs:
XMC_USBD_EnableEventINEP()
XMC_USBD_STATUS_t XMC_USBD_EndpointAbort ( uint8_t ep_addr )
Parameters
ep_addr The address of the USB endpoint, on which the data need to be aborted.
Returns
XMC_USBD_STATUS_t
Description:
Abort the transfer on endpoint ep_addr.
On any failure with the USB transmission user can reset the endpoint into default state and clear all assigned buffers, to start from a clean point. The endpoint will not be unconfigured or disabled.
Related APIs:
XMC_USBD_EndpointUnconfigure()
XMC_USBD_STATUS_t XMC_USBD_EndpointConfigure | ( | uint8_t | ep_addr,
 |  | XMC_USBD_ENDPOINT_TYPE_t | ep_type,
 |  | uint16_t | ep_max_packet_size
 | ) |  |
Parameters
ep_addr | The address of the USB endpoint, which needs to be configured.
ep_type | The XMC_USBD_ENDPOINT_TYPE_t.
ep_max_packet_size | The maximum packet size of endpoint in USB full speed.
Returns
XMC_USBD_STATUS_t.
Description:
Configures the USB endpoint.
The endpoint is configured by programming the DAINT,DIEPCTL and DOEPCTL registers.

Configures the EP type, FIFO number,maximum packet size, enables endpoint and sets the DATA0 PID. This function also initializes the internal buffer handling for the specified endpoint, but does not start any transfers.

As part of enumeration, host sends the control request to the device to set the configuration; and in turn,
in the USB device event call back handler, user has to set the configuration and configure the endpoints
required for the device.

Note:
This API should only be used as part of enumeration.
Related APIs:
XMC_USBD_Init(),XMC_USBD_DeviceConnect(),XMC_USBD_EndpointUnconfigure()
int32_t XMC_USBD_EndpointRead | ( | const uint8_t | ep_addr,
 |  | uint8_t * | buffer,
 |  | uint32_t | length
 | ) |  |
Parameters
ep_addr | The address of the USB OUT endpoint, from which data need to be read.
buffer | The pointer to the user buffer,in which data need to be received.
length | The number of bytes to be read from OUT EP.
Returns

The actual number of bytes received.
Description:
Read length number of bytes from an OUT endpoint ep_addr.
If data has been received for this endpoint, it gets copied into the user buffer until its full or no data is left in the driver buffer.
Note:
For preparing the next OUT token, use XMC_USBD_EndpointReadStart() after XMC_USBD_EndpointRead().
Related APIs:
XMC_USBD_EndpointReadStart()
XMC_USBD_STATUS_t XMC_USBD_EndpointReadStart | ( | const uint8_t | ep_addr,
 |  | uint32_t | size
 | ) |  |
Parameters
ep_addr | The address of the USB endpoint, from which data need to be read.
size | The number of bytes to be read.
Returns
XMC_USBD_STATUS_t.
Description:
Prepares an endpoint to receive OUT tokens from the USB host.
The selected endpoint gets configured, so that it receives the specified amount of data from the host. As part of streaming of OUT data, after reading the current OUT buffer using XMC_USBD_EndpointRead(),
user can prepare endpoint for the next OUT packet by using XMC_USBD_EndpointReadStart().

The registers DOEPDMA,DOEPTSIZ and DOEPCTL are programmed to start a new read request.

Note:
For the data received on OUT EP buffer, use XMC_USBD_EndpointRead().
Related APIs:
XMC_USBD_EndpointRead()
XMC_USBD_STATUS_t XMC_USBD_EndpointStall | ( | uint8_t | ep_addr,
 |  | bool | stall
 | ) |  |
Parameters
ep_addr | The address of the USB endpoint, on which stall needs to be set or cleared.
stall | The boolean variable to decide on set or clear of stall on EP.
Returns
XMC_USBD_STATUS_t.
Description:
Set or Clear stall on the USB endpoint ep_addr, based on stall parameter.

By programming stall bit in the doepctl and diepctl, it sets or clears the stall on the endpoint. The endpoint can be stalled when a non supported request comes from the USB host. The XMC_USBD_EndpointStall() should be called with stall set to 0, in the clear feature standard request in the USB device event call back handler. *

Note:
The host should clear the stall set on the endpoint by sending the clear feature standard request on the non EP0 endpoints. On EP0, the stall will automatically gets cleared on the next control request.
Related APIs:
XMC_USBD_EndpointAbort()
XMC_USBD_STATUS_t XMC_USBD_EndpointUnconfigure ( uint8_t ep_addr )
Parameters
ep_addr The address of the USB endpoint, which needs to be unconfigured.
Returns
XMC_USBD_STATUS_t.
Description:
Unconfigures the USB endpoint.
The endpoint is unconfigured by programming the DAINT,DIEPCTL and DOEPCTL registers.
Disables the endpoint, unassign the fifo, deactivate it and only send nacks.
Waits until the endpoint has finished operation and disables it. All (eventuallly) allocated buffers gets freed. Forces the endpoint to stop immediately, any pending transfers are killed(Can cause device reset).
Related APIs:
XMC_USBD_EndpointConfigure()
int32_t XMC_USBD_EndpointWrite | ( | const uint8_t | ep_addr,
 |  | const uint8_t * | buffer,
 |  | uint32_t | length
 | ) |  |
Parameters
ep_addr | The address of the USB IN endpoint, on which data should be sent.
buffer | The pointer to the data buffer, to write to the endpoint.
length | The number of bytes to be written to IN EP.
Returns

The actual amount of data written to the endpoint buffer.
Description:
Write the length bytes of data to an IN endpoint ep_addr.
The User data gets copied into the driver buffer or will be send directly based on the buffer concept selected in the XMC_USBD_TRANSFER_MODE_t configuration.

Then the endpoint is set up to transfer the data to the host.
DIEPDMA,DIEPTSIZ and DIEPCTL registers are programmed to start the IN transfer.

Related APIs:
XMC_USBD_EndpointRead()
XMC_USBD_CAPABILITIES_t XMC_USBD_GetCapabilities ( void )
Parameters
None.
Returns
XMC_USBD_CAPABILITIES_t.
Description:
Retrieves the USB device capabilities of type XMC_USBD_CAPABILITIES_t
The USB device capabilities supported by the USBD driver, like power on/off, connect/disconnect, reset,suspend/resume,USB speed etc are retrieved.

It can be called after initializing the USB device to get the information on the USBD capabilities.

uint16_t XMC_USBD_GetFrameNumber ( void )
Parameters
None.
Returns
The 16 bit current USB frame number.
Description:
Read the current USB frame number.
* Reads the device status register (DSTS) and returns the SOFFN field.
XMC_USBD_STATUS_t XMC_USBD_Init ( XMC_USBD_t * obj )
Parameters
obj The pointer to the USB device handle XMC_USBD_t.
Returns
XMC_USBD_STATUS_t The USB device status of type XMC_USBD_STATUS_t.
Description:
Initializes the USB device to get ready for connect to USB host.
Enables the USB module,sets the EP buffer sizes,registers the device and EP event call backs. Initializes the global,device and FIFO register base addresses. Configures the global AHB,enables the global interrupt and DMA by programming GAHBCFG register. Configures the USB in to device mode and enables the session request protocol by programming GUSBCFG register. Configures the USB device speed to full speed by programming DCFG register. Disconnects the USB device by programming DCTL register. Enables the USB common and device interrupts by programming GINTMSK register.
Note:
This API makes the USB device ready to connect to host.The user has to explicitly call the XMC_USBD_DeviceConnect() after the USB initialization to connect to USB host.
Related APIs:
XMC_USBD_DeviceConnect()
void XMC_USBD_IRQHandler ( const XMC_USBD_t *const obj )
Parameters
obj The pointer to the USB device handle structure.
Returns
None.
Description:
USB device default IRQ handler.
USBD Peripheral LLD provides default implementation of ISR. The user needs to explicitly either use our default implementation or use its own one using the LLD APIs.

For example: XMC_USBD_t *obj; void USB0_0_IRQHandler(void) { XMC_USBD_IRQHandler(obj); }

Note:
The user should initialize the XMC USB device configuration structure before calling XMC_USBD_IRQHandler() in the actual USB0 IRQ handler.
uint32_t XMC_USBD_IsEnumDone ( void )
Parameters
None.
Returns
Returns 1, if the speed enumeration is done and 0 otherwise.
Description:
Gets the speed enumeration completion status of the USB device.
Note:
This should not be used for the actual USB enumeration completion status. For the actual USB enumeration status, the application layer should check for the completion of USB standard request 'Set configuration'.
XMC_USBD_STATUS_t XMC_USBD_Uninitialize ( void )
Parameters
None.
Returns
XMC_USBD_STATUS_t.
Description:
Uninitialises the USB device.
Disconnects the USB device by programming DCTL register and resets the XMC USB device data.
Note:
Once this API is called, USB device will not be accessible from host.
Related APIs:
XMC_USBD_Init()

Variable Documentation

const XMC_USBD_DRIVER_t Driver_USBD0

Defines the driver interface function table. To access the XMC device controller driver interface use this table of functions.

XMC_USBD_DEVICE_t xmc_device

Defines the XMC USB device data The instance of XMC_USBD_DEVICE_t structure describing the XMC device.

Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_USBD_CAPABILITIES_t Struct Reference

Data Fields
XMC_USBD_CAPABILITIES_t Struct Reference
XMC Peripheral Library » USBD

#include <xmc_usbd.h>

Data Fields

uint32_t | event_connect: 1
uint32_t | event_disconnect: 1
uint32_t | event_high_speed: 1
uint32_t | event_power_off: 1
uint32_t | event_power_on: 1
uint32_t | event_remote_wakeup: 1
uint32_t | event_reset: 1
uint32_t | event_resume: 1
uint32_t | event_suspend: 1
uint32_t | reserved: 23

Detailed Description

Describes the USB Device Driver Capabilities.

Field Documentation

uint32_t event_connect

Signal Connect event

uint32_t event_disconnect

Signal Disconnect event

uint32_t event_high_speed

Signal switch to High-speed event

uint32_t event_power_off

Signal Power Off event

uint32_t event_power_on

Signal Power On event

uint32_t event_remote_wakeup

Signal Remote Wake up event

uint32_t event_reset

Signal Reset event

uint32_t event_resume

Signal Resume event

uint32_t event_suspend

Signal Suspend event

uint32_t reserved

Reserved for future use

The documentation for this struct was generated from the following file:
  • xmc_usbd.h


XMC Peripheral Library for XMC4000 Family: XMC_USBD_DEVICE_t Struct Reference

Data Fields
XMC_USBD_DEVICE_t Struct Reference
XMC Peripheral Library » USBD

#include <xmc_usbd.h>

Data Fields

dwc_otg_device_global_regs_t * | device_register
XMC_USBD_SignalDeviceEvent_t DeviceEvent_cb
dwc_otg_dev_in_ep_regs_t * | endpoint_in_register [(uint8_t)(7U)]
dwc_otg_dev_out_ep_regs_t * | endpoint_out_register [(uint8_t)(7U)]
XMC_USBD_SignalEndpointEvent_t EndpointEvent_cb
XMC_USBD_EP_t | ep [8]
volatile uint32_t * | fifo [(uint8_t)(7U)]
dwc_otg_core_global_regs_t * | global_register
uint32_t | IsActive: 1
uint32_t | IsConnected: 1
uint32_t | IsPowered: 1
uint16_t | txfifomsk

Detailed Description

Describes the XMC USB device

All information to control an XMC USB device is stored in this structure. It contains register, callbacks, information about the endpoints and the status of the device.

Field Documentation

dwc_otg_device_global_regs_t* device_register

Device register interface

XMC_USBD_SignalDeviceEvent_t DeviceEvent_cb

The USB device event callback.

dwc_otg_dev_in_ep_regs_t* endpoint_in_register[(uint8_t)(7U) ]

IN Endpoint register interface

dwc_otg_dev_out_ep_regs_t* endpoint_out_register[(uint8_t)(7U) ]

OUT Endpoint register interface

XMC_USBD_SignalEndpointEvent_t EndpointEvent_cb

The USB endpoint event callback.

XMC_USBD_EP_t ep[8]

Endpoints of the USB device. It is of type XMC_USBD_EP_t

volatile uint32_t* fifo[(uint8_t)(7U) ]

Transmit fifo interface

dwc_otg_core_global_regs_t* global_register

Global register interface

uint32_t IsActive

Sets if device is currently active

uint32_t IsConnected

Sets if device is connected

uint32_t IsPowered

Sets if device is powered by Vbus

uint16_t txfifomsk

Mask of used TX fifos

The documentation for this struct was generated from the following file:
  • xmc_usbd.h


XMC Peripheral Library for XMC4000 Family: XMC_USBD_DRIVER_t Struct Reference

Data Fields
XMC_USBD_DRIVER_t Struct Reference
XMC Peripheral Library » USBD

#include <xmc_usbd.h>

Data Fields

XMC_USBD_STATUS_t(* | DeviceConnect )(void)
XMC_USBD_STATUS_t(* | DeviceDisconnect )(void)
XMC_USBD_STATE_t(* | DeviceGetState )(const XMC_USBD_t *const obj)
XMC_USBD_STATUS_t(* | DeviceSetAddress )(uint8_t dev_addr, XMC_USBD_SET_ADDRESS_STAGE_t stage)
XMC_USBD_STATUS_t(* | EndpointAbort )(uint8_t ep_addr)
XMC_USBD_STATUS_t(* | EndpointConfigure )(uint8_t ep_addr, XMC_USBD_ENDPOINT_TYPE_t ep_type, uint16_t ep_max_packet_size)
int32_t(* | EndpointRead )(uint8_t ep_addr, uint8_t *buf, uint32_t len)
XMC_USBD_STATUS_t(* | EndpointReadStart )(uint8_t ep_addr, uint32_t len)
XMC_USBD_STATUS_t(* | EndpointStall )(uint8_t ep_addr, bool stall)
XMC_USBD_STATUS_t(* | EndpointUnconfigure )(uint8_t ep_addr)
int32_t(* | EndpointWrite )(uint8_t ep_addr, const uint8_t *buf, uint32_t len)
XMC_USBD_CAPABILITIES_t(* | GetCapabilities )(void)
uint16_t(* | GetFrameNumber )(void)
XMC_USBD_STATUS_t(* | Initialize )(XMC_USBD_t *obj)
uint32_t(* | IsEnumDone )(void)
XMC_USBD_STATUS_t(* | Uninitialize )(void)

Detailed Description

Defines the access structure of the USB Device Driver.

Field Documentation

XMC_USBD_STATUS_t(* DeviceConnect) (void)

Pointer to XMC_USBD_DeviceConnect : Connect USB Device.

XMC_USBD_STATUS_t(* DeviceDisconnect) (void)

Pointer to XMC_USBD_DeviceDisconnect : Disconnect USB Device.

XMC_USBD_STATE_t(* DeviceGetState) (const XMC_USBD_t *const obj)

Pointer to XMC_USBD_DeviceGetState : Get current USB Device State.

XMC_USBD_STATUS_t(* DeviceSetAddress) (uint8_t dev_addr, XMC_USBD_SET_ADDRESS_STAGE_t stage)

Pointer to XMC_USBD_DeviceSetAddress : Set USB Device Address.

XMC_USBD_STATUS_t(* EndpointAbort) (uint8_t ep_addr)

Pointer to XMC_USBD_EndpointAbort : Abort current USB Endpoint transfer.

XMC_USBD_STATUS_t(* EndpointConfigure) (uint8_t ep_addr, XMC_USBD_ENDPOINT_TYPE_t ep_type, uint16_t ep_max_packet_size)

Pointer to XMC_USBD_EndpointConfigure : Configure USB Endpoint.

int32_t(* EndpointRead) (uint8_t ep_addr, uint8_t *buf, uint32_t len)

Pointer to XMC_USBD_EndpointRead : Read data from USB Endpoint.

XMC_USBD_STATUS_t(* EndpointReadStart) (uint8_t ep_addr, uint32_t len)

Pointer to XMC_USBD_EndpointReadStart : Start USB Endpoint Read operation.

XMC_USBD_STATUS_t(* EndpointStall) (uint8_t ep_addr, bool stall)

Pointer to XMC_USBD_EndpointStall : Set/Clear Stall for USB Endpoint.

XMC_USBD_STATUS_t(* EndpointUnconfigure) (uint8_t ep_addr)

Pointer to XMC_USBD_EndpointUnconfigure : Unconfigure USB Endpoint.

int32_t(* EndpointWrite) (uint8_t ep_addr, const uint8_t *buf, uint32_t len)

Pointer to XMC_USBD_EndpointWrite : Write data to USB Endpoint.

XMC_USBD_CAPABILITIES_t(* GetCapabilities) (void)

Pointer to XMC_USBD_GetCapabilities : Get driver capabilities.

uint16_t(* GetFrameNumber) (void)

Pointer to XMC_USBD_GetFrameNumber : Get current USB Frame Number.

XMC_USBD_STATUS_t(* Initialize) (XMC_USBD_t *obj)

Pointer to XMC_USBD_Init : Initialize USB Device Interface.

uint32_t(* IsEnumDone) (void)

Pointer to XMC_USBD_IsEnumDone : Is enumeration done in Host?.

XMC_USBD_STATUS_t(* Uninitialize) (void)

Pointer to XMC_USBD_Uninitialize : De-initialize USB Device Interface.

The documentation for this struct was generated from the following file:
  • xmc_usbd.h


XMC Peripheral Library for XMC4000 Family: XMC_USBD_EP_t Struct Reference

Data Fields
XMC_USBD_EP_t Struct Reference
XMC Peripheral Library » USBD

#include <xmc_usbd.h>

Data Fields

uint8_t * | inBuffer
uint32_t | inBufferSize
volatile uint32_t | inInUse: 1
uint32_t | isConfigured: 1
uint32_t | isStalled: 1
uint32_t | maxPacketSize: 7
uint32_t | maxTransferSize: 19
uint8_t * | outBuffer
uint32_t | outBufferSize
uint32_t | outBytesAvailable
volatile uint32_t | outInUse: 1
uint32_t | outOffset
uint32_t | sendZeroLengthPacket: 1
uint32_t | txFifoNum: 4
uint32_t | type: 2
uint8_t * | xferBuffer
uint32_t | xferCount
uint32_t | xferLength
uint32_t | xferTotal
uint32_t | address: 8
uint32_t | direction: 1
uint32_t | number: 4
uint32_t | pading: 3

Detailed Description

Describes a USB endpoint

All information to control an endpoint is stored in this structure. It contains information about the endpoints and the status of the device.

Field Documentation

uint32_t address

The endpoint address including the direction

uint32_t direction

The endpoint direction

uint8_t* inBuffer

The buffer for operation as IN endpoint

uint32_t inBufferSize

The size of the EP IN buffer

volatile uint32_t inInUse

Sets if the selected USB IN endpoint is currently in use

uint32_t isConfigured

The flag showing, if the endpoint is configured

uint32_t isStalled

Sets if the selected USB endpoint is stalled.

uint32_t maxPacketSize

The maximum size of packet for USB endpoint ( due to FS Speed device only 64 Byte )

uint32_t maxTransferSize

The maximum amount of data the core can send at once.

uint32_t number

The endpoint number.It can be from 0 to 6

uint8_t* outBuffer

The buffer for operation as OUT endpoint

uint32_t outBufferSize

The size of the EP OUT buffer

uint32_t outBytesAvailable

The number of bytes available in the EP OUT buffer

volatile uint32_t outInUse

Sets if the selected USB OUT endpoint is currently in use

uint32_t outOffset

The read offset of the EP OUT buffer

uint32_t pading

Padding between number and direction

uint32_t sendZeroLengthPacket

If set, a zero length packet will be send at the end of the transfer

uint32_t txFifoNum

Endpoint transmit Fifo Number

uint32_t type

The endpoint type

uint8_t* xferBuffer

The buffer of the current transfer

uint32_t xferCount

Bytes transfered of the current USB data transfer

uint32_t xferLength

The length of the current transfer

uint32_t xferTotal

The length of total data in buffer

The documentation for this struct was generated from the following file:
  • xmc_usbd.h


XMC Peripheral Library for XMC4000 Family: XMC_USBD_STATE_t Struct Reference

Data Fields
XMC_USBD_STATE_t Struct Reference
XMC Peripheral Library » USBD

#include <xmc_usbd.h>

Data Fields

uint32_t | active: 1
uint32_t | connected: 1
uint32_t | powered: 1
uint32_t | speed: 2

Detailed Description

Describes the current USB Device State.

Field Documentation

uint32_t active

USB Device active lag

uint32_t connected

USB Device connected flag

uint32_t powered

USB Device powered flag

uint32_t speed

USB Device speed

The documentation for this struct was generated from the following file:
  • xmc_usbd.h


XMC Peripheral Library for XMC4000 Family: XMC_USBD_t Struct Reference

Data Fields
XMC_USBD_t Struct Reference
XMC Peripheral Library » USBD

#include <xmc_usbd.h>

Data Fields

XMC_USBD_SignalEndpointEvent_t cb_endpoint_event
XMC_USBD_SignalDeviceEvent_t cb_xmc_device_event
USB0_GLOBAL_TypeDef *const usbd
XMC_USBD_MAX_NUM_EPS_t usbd_max_num_eps
XMC_USBD_TRANSFER_MODE_t usbd_transfer_mode

Detailed Description

USB device initialization structure

Field Documentation

XMC_USBD_SignalEndpointEvent_t cb_endpoint_event

USB endpoint event callback. Use XMC_USBD_SignalEndpointEvent_t type of function pointer.

XMC_USBD_SignalDeviceEvent_t cb_xmc_device_event

USB device event callback. Use XMC_USBD_SignalDeviceEvent_t type of function pointer.

USB0_GLOBAL_TypeDef* const usbd

USB Module Pointer. The USB0 module base address.

XMC_USBD_MAX_NUM_EPS_t usbd_max_num_eps

Maximum number of end points used. The maximum range can be 7.

XMC_USBD_TRANSFER_MODE_t usbd_transfer_mode

USB data transfer mode.Use XMC_USBD_TRANSFER_MODE_t type to specify the transfer mode.

The documentation for this struct was generated from the following file:
  • xmc_usbd.h


XMC Peripheral Library for XMC4000 Family: USBH

Data Structures | Macros | Typedefs | Functions
USBH
XMC Peripheral Library

Data Structures

struct | XMC_USBH0_DEVICE_t
struct | XMC_USBH0_pipe_t
struct | XMC_USBH_CAPABILITIES_t
struct | XMC_USBH_DRIVER_t
struct | XMC_USBH_DRIVER_VERSION_t
struct | XMC_USBH_PORT_STATE_t

Macros

#define | USB_CH_HCCHARx_DEVADDR(x) (((uint32_t) x << USB_CH_HCCHAR_DevAddr_Pos) & (uint32_t)USB_CH_HCCHAR_DevAddr_Msk)
#define | USB_CH_HCCHARx_EPDIR(x) (((uint32_t) x << USB_CH_HCCHAR_EPDir_Pos) & (uint32_t)USB_CH_HCCHAR_EPDir_Msk)
#define | USB_CH_HCCHARx_EPNUM(x) (((uint32_t) x << USB_CH_HCCHAR_EPNum_Pos) & (uint32_t)USB_CH_HCCHAR_EPNum_Msk)
#define | USB_CH_HCCHARx_EPTYPE(x) (((uint32_t) x << USB_CH_HCCHAR_EPType_Pos) & (uint32_t)USB_CH_HCCHAR_EPType_Msk)
#define | USB_CH_HCCHARx_MCEC(x) (((uint32_t) x << USB_CH_HCCHAR_MC_EC_Pos) & (uint32_t)USB_CH_HCCHAR_MC_EC_Msk)
#define | USB_CH_HCCHARx_MPS(x) (((uint32_t) x ) & (uint32_t)USB_CH_HCCHAR_MPS_Msk)
#define | USB_CH_HCFG_FSLSPCS(x) (((uint32_t) x ) & USB_HCFG_FSLSPclkSel_Msk)
#define | USB_CH_HCFG_FSLSSUP(x) (((uint32_t) x << USB_HCFG_FSLSSupp_Pos) & USB_HCFG_FSLSSupp_Msk)
#define | USB_CH_HCINTx_ALL
#define | USB_CH_HCINTx_ERRORS
#define | USB_CH_HCTSIZx_DPID(x) (((uint32_t) x << USB_CH_HCTSIZ_BUFFERMODE_Pid_Pos) & (uint32_t)USB_CH_HCTSIZ_BUFFERMODE_Pid_Msk)
#define | USB_CH_HCTSIZx_DPID_DATA0 (USB_CH_HCTSIZx_DPID(0U))
#define | USB_CH_HCTSIZx_DPID_DATA1 (USB_CH_HCTSIZx_DPID(2U))
#define | USB_CH_HCTSIZx_DPID_DATA2 (USB_CH_HCTSIZx_DPID(1U))
#define | USB_CH_HCTSIZx_DPID_MDATA (USB_CH_HCTSIZx_DPID(3U))
#define | USB_CH_HCTSIZx_DPID_SETUP (USB_CH_HCTSIZx_DPID(3U))
#define | USB_GRXSTSR_HOSTMODE_PktSts_IN_DATA_PKT 0x2
#define | USB_GRXSTSR_HOSTMODE_PktSts_IN_TRSF_CPL 0x3
#define | USBH0_MAX_PIPE_NUM (14U)
#define | USBH_PIPE_GET_INDEX(handle) (((uint32_t)handle - (uint32_t)USB0_CH0_BASE)/(0x20U))
#define | XMC_USB_DRIVE_PORT1 P3_2
#define | XMC_USB_DRIVE_PORT2 P0_1
#define | XMC_USBH_API_VERSION ((uint16_t)((uint16_t)XMC_LIB_MAJOR_VERSION << 8U) |XMC_LIB_MINOR_VERSION)
#define | XMC_USBH_CLOCK_GATING_DISABLE 0
#define | XMC_USBH_CLOCK_GATING_ENABLE 1
#define | XMC_USBH_DRIVER_ERROR -1
#define | XMC_USBH_DRIVER_ERROR_BUSY -2
#define | XMC_USBH_DRIVER_ERROR_PARAMETER -5
#define | XMC_USBH_DRIVER_ERROR_SPECIFIC -6
#define | XMC_USBH_DRIVER_ERROR_TIMEOUT -3
#define | XMC_USBH_DRIVER_ERROR_UNSUPPORTED -4
#define | XMC_USBH_DRIVER_OK 0
#define | XMC_USBH_ENDPOINT_BULK 2
#define | XMC_USBH_ENDPOINT_CONTROL 0
#define | XMC_USBH_ENDPOINT_INTERRUPT 3
#define | XMC_USBH_ENDPOINT_ISOCHRONOUS 1
#define | XMC_USBH_EP_HANDLE XMC_USBH_PIPE_HANDLE
#define | XMC_USBH_EVENT_BUS_ERROR (1UL << 6)
#define | XMC_USBH_EVENT_CONNECT (1UL << 0)
#define | XMC_USBH_EVENT_DISCONNECT (1UL << 1)
#define | XMC_USBH_EVENT_HANDSHAKE_ERR (1UL << 5)
#define | XMC_USBH_EVENT_HANDSHAKE_MDATA (1UL << 3)
#define | XMC_USBH_EVENT_HANDSHAKE_NAK (1UL << 1)
#define | XMC_USBH_EVENT_HANDSHAKE_NYET (1UL << 2)
#define | XMC_USBH_EVENT_HANDSHAKE_STALL (1UL << 4)
#define | XMC_USBH_EVENT_OVERCURRENT (1UL << 2)
#define | XMC_USBH_EVENT_REMOTE_WAKEUP (1UL << 6)
#define | XMC_USBH_EVENT_RESET (1UL << 3)
#define | XMC_USBH_EVENT_RESUME (1UL << 5)
#define | XMC_USBH_EVENT_SUSPEND (1UL << 4)
#define | XMC_USBH_EVENT_TRANSFER_COMPLETE (1UL << 0)
#define | XMC_USBH_PACKET_CSPLIT (0x0CUL << XMC_USBH_PACKET_SPLIT_Pos)
#define | XMC_USBH_PACKET_DATA0 (0x01UL << XMC_USBH_PACKET_DATA_Pos)
#define | XMC_USBH_PACKET_DATA1 (0x02UL << XMC_USBH_PACKET_DATA_Pos)
#define | XMC_USBH_PACKET_DATA_Msk (0x0FUL << XMC_USBH_PACKET_DATA_Pos)
#define | XMC_USBH_PACKET_DATA_Pos 4
#define | XMC_USBH_PACKET_IN (0x03UL << XMC_USBH_PACKET_TOKEN_Pos)
#define | XMC_USBH_PACKET_OUT (0x02UL << XMC_USBH_PACKET_TOKEN_Pos)
#define | XMC_USBH_PACKET_PING (0x04UL << XMC_USBH_PACKET_TOKEN_Pos)
#define | XMC_USBH_PACKET_PRE (1UL << 12)
#define | XMC_USBH_PACKET_SETUP (0x01UL << XMC_USBH_PACKET_TOKEN_Pos)
#define | XMC_USBH_PACKET_SSPLIT (0x08UL << XMC_USBH_PACKET_SPLIT_Pos)
#define | XMC_USBH_PACKET_SSPLIT_E (0x0AUL << XMC_USBH_PACKET_SPLIT_Pos)
#define | XMC_USBH_PACKET_SSPLIT_S (0x09UL << XMC_USBH_PACKET_SPLIT_Pos)
#define | XMC_USBH_PACKET_SSPLIT_S_E (0x0BUL << XMC_USBH_PACKET_SPLIT_Pos)
#define | XMC_USBH_PACKET_TOKEN_Msk (0x0FUL << XMC_USBH_PACKET_TOKEN_Pos)
#define | XMC_USBH_PACKET_TOKEN_Pos 0
#define | XMC_USBH_SignalEndpointEvent_t XMC_USBH_SignalPipeEvent_t
#define | XMC_USBH_SPEED_FULL 1U
#define | XMC_USBH_SPEED_HIGH 2U
#define | XMC_USBH_SPEED_LOW 0U

Typedefs

typedef void(* | XMC_USBH_SignalPipeEvent_t) (XMC_USBH_PIPE_HANDLE pipe_hndl, uint32_t event)
typedef void(* | XMC_USBH_SignalPortEvent_t) (uint8_t port, uint32_t event)

Functions

uint32_t | XMC_USBH_GetInterruptStatus (void)
void | XMC_USBH_HandleIrq (uint32_t gintsts)
uint8_t | XMC_USBH_osDelay (uint32_t ms)
void | XMC_USBH_Select_VBUS (XMC_GPIO_PORT_t *port, uint32_t pin)
void | XMC_USBH_TurnOffResumeBit (void)

Detailed Description

The USBH is the host mode device driver for the USB0 hardware module on XMC4000 family of microcontrollers. The USB0 module can be used to establish a USB interface between outside world and XMC4000 family of controllers. The USB module includes the following features in host mode:

  1. Complies with the USB 2.0 Specification.
  2. Supports up to 14 bidirectional pipes, including control pipe 0.
  3. Supports SOFs in Full-Speed modes.
  4. Supports clock gating for power saving.
  5. Supports FIFO mode data transaction.

The below figure shows the overview of USB0 module in XMC4 microntroller.

The USBH device driver supports the following features:

  1. Initialize/Uninitialize the USB0 module on XMC4000 device.
  2. Control VBUS state.
  3. Reset USB port.
  4. Set the USB device address.
  5. Allocate pipe for new endpoint communication.
  6. Modify an existing pipe.
  7. Transfer data on selected pipe.
  8. Abort ongoing data transaction.
  9. Handle multi packet data transaction by updating toggle information.

The USBH device driver expects registration of callback functions XMC_USBH_SignalPortEvent_t and XMC_USBH_SignalPipeEvent_t to be executed when there is port event interrupt and pipe event interrupt respectively.
The USBH driver is CMSIS API compatible. Please use Driver_USBH0 to access the USBH API.
For example, to initialize the USB host controller, use Driver_USBH0.Initialize().

Macro Definition Documentation

#define USB_CH_HCCHARx_DEVADDR ( x ) (((uint32_t) x << USB_CH_HCCHAR_DevAddr_Pos) & (uint32_t)USB_CH_HCCHAR_DevAddr_Msk)

Shifts the value to the position of endpoint type(EPType) in the HCCHAR register

#define USB_CH_HCCHARx_EPDIR ( x ) (((uint32_t) x << USB_CH_HCCHAR_EPDir_Pos) & (uint32_t)USB_CH_HCCHAR_EPDir_Msk)

Shifts the value to the position of endpoint direction(EPDir) in the HCCHAR register

#define USB_CH_HCCHARx_EPNUM ( x ) (((uint32_t) x << USB_CH_HCCHAR_EPNum_Pos) & (uint32_t)USB_CH_HCCHAR_EPNum_Msk)

Shifts the value to the position of endpoint number(EPNum) in the HCCHAR register

#define USB_CH_HCCHARx_EPTYPE ( x ) (((uint32_t) x << USB_CH_HCCHAR_EPType_Pos) & (uint32_t)USB_CH_HCCHAR_EPType_Msk)

Shifts the value to the position of endpoint type(EPType) in the HCCHAR register

#define USB_CH_HCCHARx_MCEC ( x ) (((uint32_t) x << USB_CH_HCCHAR_MC_EC_Pos) & (uint32_t)USB_CH_HCCHAR_MC_EC_Msk)

Shifts the value to the position of multi-count(MC_EC) field in the HCCHAR register

#define USB_CH_HCCHARx_MPS ( x ) (((uint32_t) x ) & (uint32_t)USB_CH_HCCHAR_MPS_Msk)

Masks maximum packet size information from the HCCHAR register value provided as input

#define USB_CH_HCFG_FSLSPCS ( x ) (((uint32_t) x ) & USB_HCFG_FSLSPclkSel_Msk)

Provides register value to update PHY clock selection in register HCFG

#define USB_CH_HCFG_FSLSSUP ( x ) (((uint32_t) x << USB_HCFG_FSLSSupp_Pos) & USB_HCFG_FSLSSupp_Msk)

Provides register value to update USB full speed related mask FLSSupp of register HCFG

#define USB_CH_HCINTx_ALL
Value:
(USB_CH_HCINTMSK_XferComplMsk_Msk | \
USB_CH_HCINTMSK_ChHltdMsk_Msk | \
USB_CH_HCINTMSK_StallMsk_Msk | \
USB_CH_HCINTMSK_NakMsk_Msk | \
USB_CH_HCINTMSK_AckMsk_Msk | \
USB_CH_HCINTMSK_XactErrMsk_Msk | \
USB_CH_HCINTMSK_BblErrMsk_Msk | \
USB_CH_HCINTMSK_FrmOvrunMsk_Msk | \
USB_CH_HCINTMSK_DataTglErrMsk_Msk)

Mask for selecting all channel related events

#define USB_CH_HCINTx_ERRORS
Value:
(USB_CH_HCINTMSK_XactErrMsk_Msk | \
USB_CH_HCINTMSK_BblErrMsk_Msk | \
USB_CH_HCINTMSK_FrmOvrunMsk_Msk | \
USB_CH_HCINTMSK_DataTglErrMsk_Msk)

Mask for selecting all channel error related events

#define USB_CH_HCTSIZx_DPID ( x ) (((uint32_t) x << USB_CH_HCTSIZ_BUFFERMODE_Pid_Pos) & (uint32_t)USB_CH_HCTSIZ_BUFFERMODE_Pid_Msk)

Shifts the value to the position of packet ID (PID) in the HCTSIZ register

#define USB_CH_HCTSIZx_DPID_DATA0 (USB_CH_HCTSIZx_DPID(0U))

Represents DATA toggle DATA0 as in HCTSIZ register

#define USB_CH_HCTSIZx_DPID_DATA1 (USB_CH_HCTSIZx_DPID(2U))

Represents DATA toggle DATA1 as in HCTSIZ register

#define USB_CH_HCTSIZx_DPID_DATA2 (USB_CH_HCTSIZx_DPID(1U))

Represents DATA toggle DATA2 as in HCTSIZ register

#define USB_CH_HCTSIZx_DPID_MDATA (USB_CH_HCTSIZx_DPID(3U))

Represents DATA toggle MDATA as in HCTSIZ register

#define USB_CH_HCTSIZx_DPID_SETUP (USB_CH_HCTSIZx_DPID(3U))

Represents SETUP token as in HCTSIZ register

#define USB_GRXSTSR_HOSTMODE_PktSts_IN_DATA_PKT 0x2

Represents IN data token as in receive status pop register(GRXSTSP)

#define USB_GRXSTSR_HOSTMODE_PktSts_IN_TRSF_CPL 0x3

Represents paket status information as in receive status pop register(GRXSTSP)

#define USBH0_MAX_PIPE_NUM (14U)

Representation of number of pipes available

#define USBH_PIPE_GET_INDEX ( handle ) (((uint32_t)handle - (uint32_t)USB0_CH0_BASE)/(0x20U))

Macro provides index of the USB channel based on its base address

#define XMC_USB_DRIVE_PORT1 P3_2

Default port(PORT3, pin 2) used to enable VBUS voltage regulator on the board

#define XMC_USB_DRIVE_PORT2 P0_1

Alternate port that can be used to enable VBUS voltage regulator(PORT0, pin 1)

#define XMC_USBH_API_VERSION ((uint16_t)((uint16_t)XMC_LIB_MAJOR_VERSION << 8U) |XMC_LIB_MINOR_VERSION)

USBH low level driver API version

#define XMC_USBH_CLOCK_GATING_DISABLE 0

Used to disable clock gating when the driver is fully powered

#define XMC_USBH_CLOCK_GATING_ENABLE 1

Used to enable clock gating when the driver is powered down

#define XMC_USBH_DRIVER_ERROR -1

Unspecified error

#define XMC_USBH_DRIVER_ERROR_BUSY -2

Driver is busy

#define XMC_USBH_DRIVER_ERROR_PARAMETER -5

Parameter error

#define XMC_USBH_DRIVER_ERROR_SPECIFIC -6

Start of driver specific errors

#define XMC_USBH_DRIVER_ERROR_TIMEOUT -3

Timeout occurred

#define XMC_USBH_DRIVER_ERROR_UNSUPPORTED -4

Operation not supported

#define XMC_USBH_DRIVER_OK 0

Operation succeeded

#define XMC_USBH_ENDPOINT_BULK 2

Bulk Endpoint

#define XMC_USBH_ENDPOINT_CONTROL 0

Control Endpoint

#define XMC_USBH_ENDPOINT_INTERRUPT 3

Interrupt Endpoint

#define XMC_USBH_ENDPOINT_ISOCHRONOUS 1

Isochronous Endpoint

#define XMC_USBH_EP_HANDLE XMC_USBH_PIPE_HANDLE

Legacy name for pipe handle used by CMSIS

#define XMC_USBH_EVENT_BUS_ERROR (1UL << 6)

Bus Error detected

#define XMC_USBH_EVENT_CONNECT (1UL << 0)

USB Device Connected to Port

#define XMC_USBH_EVENT_DISCONNECT (1UL << 1)

USB Device Disconnected from Port

#define XMC_USBH_EVENT_HANDSHAKE_ERR (1UL << 5)

ERR Handshake received

#define XMC_USBH_EVENT_HANDSHAKE_MDATA (1UL << 3)

MDATA Handshake received

#define XMC_USBH_EVENT_HANDSHAKE_NAK (1UL << 1)

NAK Handshake received

#define XMC_USBH_EVENT_HANDSHAKE_NYET (1UL << 2)

NYET Handshake received

#define XMC_USBH_EVENT_HANDSHAKE_STALL (1UL << 4)

STALL Handshake received

#define XMC_USBH_EVENT_OVERCURRENT (1UL << 2)

USB Device caused Overcurrent

#define XMC_USBH_EVENT_REMOTE_WAKEUP (1UL << 6)

USB Device activated Remote Wakeup

#define XMC_USBH_EVENT_RESET (1UL << 3)

USB Reset completed

#define XMC_USBH_EVENT_RESUME (1UL << 5)

USB Resume occurred

#define XMC_USBH_EVENT_SUSPEND (1UL << 4)

USB Suspend occurred

#define XMC_USBH_EVENT_TRANSFER_COMPLETE (1UL << 0)

Transfer completed

#define XMC_USBH_PACKET_CSPLIT (0x0CUL << XMC_USBH_PACKET_SPLIT_Pos)

CSPLIT Packet

#define XMC_USBH_PACKET_DATA0 (0x01UL << XMC_USBH_PACKET_DATA_Pos)

DATA0 PID

#define XMC_USBH_PACKET_DATA1 (0x02UL << XMC_USBH_PACKET_DATA_Pos)

DATA1 PID

#define XMC_USBH_PACKET_DATA_Msk (0x0FUL << XMC_USBH_PACKET_DATA_Pos)

Packet data PID mask

#define XMC_USBH_PACKET_DATA_Pos 4

Packet data PID position

#define XMC_USBH_PACKET_IN (0x03UL << XMC_USBH_PACKET_TOKEN_Pos)

IN Packet

#define XMC_USBH_PACKET_OUT (0x02UL << XMC_USBH_PACKET_TOKEN_Pos)

OUT Packet

#define XMC_USBH_PACKET_PING (0x04UL << XMC_USBH_PACKET_TOKEN_Pos)

PING Packet

#define XMC_USBH_PACKET_PRE (1UL << 12)

PRE Token

#define XMC_USBH_PACKET_SETUP (0x01UL << XMC_USBH_PACKET_TOKEN_Pos)

SETUP Packet

#define XMC_USBH_PACKET_SSPLIT (0x08UL << XMC_USBH_PACKET_SPLIT_Pos)

SSPLIT Packet

#define XMC_USBH_PACKET_SSPLIT_E (0x0AUL << XMC_USBH_PACKET_SPLIT_Pos)

SSPLIT Packet: Data End

#define XMC_USBH_PACKET_SSPLIT_S (0x09UL << XMC_USBH_PACKET_SPLIT_Pos)

SSPLIT Packet: Data Start

#define XMC_USBH_PACKET_SSPLIT_S_E (0x0BUL << XMC_USBH_PACKET_SPLIT_Pos)

SSPLIT Packet: Data All

#define XMC_USBH_PACKET_TOKEN_Msk (0x0FUL << XMC_USBH_PACKET_TOKEN_Pos)

Packet token mask

#define XMC_USBH_PACKET_TOKEN_Pos 0

Packet token position

#define XMC_USBH_SignalEndpointEvent_t XMC_USBH_SignalPipeEvent_t

Legacy name for the pipe event handler

#define XMC_USBH_SPEED_FULL 1U

Full-speed USB

#define XMC_USBH_SPEED_HIGH 2U

High-speed USB

#define XMC_USBH_SPEED_LOW 0U

Low-speed USB

Typedef Documentation

typedef void(* XMC_USBH_SignalPipeEvent_t) (XMC_USBH_PIPE_HANDLE pipe_hndl, uint32_t event)

Pointer to ARM_USBH_SignalPipeEvent : Signal Pipe Event.

typedef void(* XMC_USBH_SignalPortEvent_t) (uint8_t port, uint32_t event)

Pointer to ARM_USBH_SignalPortEvent : Signal Root HUB Port Event.

Enumeration Type Documentation

enum XMC_USBH_POWER_STATE_t

General power states of USB peripheral driver.

Enumerator
XMC_USBH_POWER_OFF | Power off: no operation possible
XMC_USBH_POWER_LOW | Low Power mode: retain state, detect and signal wake-up events
XMC_USBH_POWER_FULL | Power on: full operation at maximum performance

Function Documentation

uint32_t XMC_USBH_GetInterruptStatus ( void )
Returns
USB host mode interrupt status. Bit field USB0_BASE->GINTSTS_HOSTMODE
Description:
Provides USB host global interrupt status.
This value can be used to provide interrupt status to the IRQ handler function XMC_USBH_HandleIrq().
void XMC_USBH_HandleIrq ( uint32_t gintsts )
Parameters
gintsts USB global interrupt status.
Returns
None.
Description:
Updates logical state of the USB host driver based on the input status value. It handles port interrupt and channel interrupt. It responsible for updating data toggle information for multi-packet data transmission. It executes the callback function on transfer completion and reception of data. It also does error management and calls the relevant callback functions to indicate it to the application.
uint8_t XMC_USBH_osDelay ( uint32_t ms )
Parameters
ms Delay in milliseconds.
Returns
uint8_t Value has no significance for the low level driver.
Description:
Function implements time delay logic. The USB host low level driver provides a weak definition for delay which has to re-implemented with time delay logic. The low level driver expects blocking implementation of the delay.
void XMC_USBH_Select_VBUS | ( | XMC_GPIO_PORT_t * | port,
 |  | uint32_t | pin
 | ) |  |
Parameters
port | Address of the port which has the pin used to enable VBUS charge pump.
pin | Pin number in the port selected in previous argument using which the VBUS charge pump has to be enabled.
Returns
None
Description:
Configures the port pin with alternate output function 1. VBUS enabling pins work with alternate output function 1.
Note:The input port pin should support USB VBUS as an alternate function.
Typical ports that support VBUS enable are: P3_2 and P0_1.
void XMC_USBH_TurnOffResumeBit ( void )
Returns
None
Description:
De-asserts resume bit.
The function shall be called 20ms after detecting port remote wakeup event.
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_USBH0_DEVICE_t Struct Reference

Data Fields
XMC_USBH0_DEVICE_t Struct Reference
XMC Peripheral Library » USBH

Data Fields

USB0_GLOBAL_TypeDef * | global_register
USB0_CH_TypeDef * | host_channel_registers
bool | init_done
bool | port_reset_active
XMC_USBH_POWER_STATE_t power_state
XMC_USBH_SignalPipeEvent_t SignalPipeEvent_cb
XMC_USBH_SignalPortEvent_t SignalPortEvent_cb

Field Documentation

USB0_GLOBAL_TypeDef* global_register

Global register interface

USB0_CH_TypeDef* host_channel_registers

Host channel interface

bool init_done

init status

bool port_reset_active

Port reset state

XMC_USBH_POWER_STATE_t power_state

USB Power status

XMC_USBH_SignalPipeEvent_t SignalPipeEvent_cb

Pipe event callback; set during init

XMC_USBH_SignalPortEvent_t SignalPortEvent_cb

Port event callback; set during init

The documentation for this struct was generated from the following file:
  • xmc_usbh.h


XMC Peripheral Library for XMC4000 Family: XMC_USBH0_pipe_t Struct Reference

Data Fields
XMC_USBH0_pipe_t Struct Reference
XMC Peripheral Library » USBH

#include <xmc_usbh.h>

Data Fields

uint8_t * | data
uint16_t | ep_max_packet_size
uint8_t | ep_type
uint8_t | event
uint8_t | in_use
uint8_t | interrupt_triggered
uint16_t | interval
uint16_t | interval_reload
uint32_t | num
uint32_t | num_transferred_total
uint32_t | num_transferring
uint32_t | packet
uint8_t | transfer_active

Field Documentation

uint8_t* data

Holds address of data buffer. It represents source buffer for OUT or SETUP transfer and destination address for IN transfer

uint16_t ep_max_packet_size

Maximum packet size for the selected pipe

uint8_t ep_type

Endpoint type for selected pipe

uint8_t event

Holds pipe specific event flags

uint8_t in_use

Set to true when transfer is in progress and reset only after the /ref num of bytes is transferred

uint8_t interrupt_triggered

For INTERRUPT or ISOCHRONOUS pipe, indicates if retransmit timeout has occurred

uint16_t interval

For INTERRUPT or ISOCHRONOUS pipe, it represents the decrementing count to reach 0 for initiating retransmission

uint16_t interval_reload

For INTERRUPT or ISOCHRONOUS pipe, it represents the period for repeated transfer

uint32_t num

Number of bytes of data to be transmitted

uint32_t num_transferred_total

Number of bytes transmitted or received at the moment

uint32_t num_transferring

Number of bytes being transmitted currently

uint32_t packet

Holds packet token and PID information of ongoing data packet transaction

uint8_t transfer_active

Set to true when a transfer has been initiated and reset when event for transfer complete occurs

The documentation for this struct was generated from the following file:
  • xmc_usbh.h


XMC Peripheral Library for XMC4000 Family: XMC_USBH_CAPABILITIES_t Struct Reference

Data Fields
XMC_USBH_CAPABILITIES_t Struct Reference
XMC Peripheral Library » USBH

#include <xmc_usbh.h>

Data Fields

uint32_t | auto_split: 1
uint32_t | event_connect: 1
uint32_t | event_disconnect: 1
uint32_t | event_overcurrent: 1
uint32_t | port_mask: 15

Field Documentation

uint32_t auto_split

Automatic SPLIT packet handling

uint32_t event_connect

Signal Connect event

uint32_t event_disconnect

Signal Disconnect event

uint32_t event_overcurrent

Signal Overcurrent event

uint32_t port_mask

Root HUB available Ports Mask

The documentation for this struct was generated from the following file:
  • xmc_usbh.h


XMC Peripheral Library for XMC4000 Family: XMC_USBH_DRIVER_t Struct Reference

Data Fields
XMC_USBH_DRIVER_t Struct Reference
XMC Peripheral Library » USBH

#include <xmc_usbh.h>

Data Fields

XMC_USBH_CAPABILITIES_t(* | GetCapabilities )(void)
uint16_t(* | GetFrameNumber )(void)
XMC_USBH_DRIVER_VERSION_t(* | GetVersion )(void)
int32_t(* | Initialize )(XMC_USBH_SignalPortEvent_t cb_port_event, XMC_USBH_SignalPipeEvent_t cb_pipe_event)
XMC_USBH_PIPE_HANDLE(* | PipeCreate )(uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_max_packet_size, uint8_t ep_interval)
int32_t(* | PipeDelete )(XMC_USBH_PIPE_HANDLE pipe_hndl)
int32_t(* | PipeModify )(XMC_USBH_PIPE_HANDLE pipe_hndl, uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint16_t ep_max_packet_size)
int32_t(* | PipeReset )(XMC_USBH_PIPE_HANDLE pipe_hndl)
int32_t(* | PipeTransfer )(XMC_USBH_PIPE_HANDLE pipe_hndl, uint32_t packet, uint8_t *data, uint32_t num)
int32_t(* | PipeTransferAbort )(XMC_USBH_PIPE_HANDLE pipe_hndl)
uint32_t(* | PipeTransferGetResult )(XMC_USBH_PIPE_HANDLE pipe_hndl)
XMC_USBH_PORT_STATE_t(* | PortGetState )(uint8_t port)
int32_t(* | PortReset )(uint8_t port)
int32_t(* | PortResume )(uint8_t port)
int32_t(* | PortSuspend )(uint8_t port)
int32_t(* | PortVbusOnOff )(uint8_t port, bool vbus)
int32_t(* | PowerControl )(XMC_USBH_POWER_STATE_t state)
int32_t(* | Uninitialize )(void)

Field Documentation

XMC_USBH_CAPABILITIES_t(* GetCapabilities) (void)

Pointer to ARM_USBH_GetCapabilities : Get driver capabilities.

uint16_t(* GetFrameNumber) (void)

Pointer to ARM_USBH_GetFrameNumber : Get current USB Frame Number.

XMC_USBH_DRIVER_VERSION_t(* GetVersion) (void)

Pointer to ARM_USBH_GetVersion : Get driver version.

int32_t(* Initialize) (XMC_USBH_SignalPortEvent_t cb_port_event, XMC_USBH_SignalPipeEvent_t cb_pipe_event)

Pointer to ARM_USBH_Initialize : Initialize USB Host Interface.

XMC_USBH_PIPE_HANDLE(* PipeCreate) (uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_max_packet_size, uint8_t ep_interval)

Pointer to ARM_USBH_PipeCreate : Create Pipe in System.

int32_t(* PipeDelete) (XMC_USBH_PIPE_HANDLE pipe_hndl)

Pointer to ARM_USBH_PipeDelete : Delete Pipe from System.

int32_t(* PipeModify) (XMC_USBH_PIPE_HANDLE pipe_hndl, uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint16_t ep_max_packet_size)

Pointer to ARM_USBH_PipeModify : Modify Pipe in System.

int32_t(* PipeReset) (XMC_USBH_PIPE_HANDLE pipe_hndl)

Pointer to ARM_USBH_PipeReset : Reset Pipe.

int32_t(* PipeTransfer) (XMC_USBH_PIPE_HANDLE pipe_hndl, uint32_t packet, uint8_t *data, uint32_t num)

Pointer to ARM_USBH_PipeTransfer : Transfer packets through USB Pipe.

int32_t(* PipeTransferAbort) (XMC_USBH_PIPE_HANDLE pipe_hndl)

Pointer to ARM_USBH_PipeTransferAbort : Abort current USB Pipe transfer.

uint32_t(* PipeTransferGetResult) (XMC_USBH_PIPE_HANDLE pipe_hndl)

Pointer to ARM_USBH_PipeTransferGetResult : Get result of USB Pipe transfer.

XMC_USBH_PORT_STATE_t(* PortGetState) (uint8_t port)

Pointer to ARM_USBH_PortGetState : Get current Root HUB Port State.

int32_t(* PortReset) (uint8_t port)

Pointer to ARM_USBH_PortReset : Do Root HUB Port Reset.

int32_t(* PortResume) (uint8_t port)

Pointer to ARM_USBH_PortResume : Resume Root HUB Port (start generating SOFs).

int32_t(* PortSuspend) (uint8_t port)

Pointer to ARM_USBH_PortSuspend : Suspend Root HUB Port (stop generating SOFs).

int32_t(* PortVbusOnOff) (uint8_t port, bool vbus)

Pointer to ARM_USBH_PortVbusOnOff : Root HUB Port VBUS on/off.

int32_t(* PowerControl) (XMC_USBH_POWER_STATE_t state)

Pointer to ARM_USBH_PowerControl : Control USB Host Interface Power.

int32_t(* Uninitialize) (void)

Pointer to ARM_USBH_Uninitialize : De-initialize USB Host Interface.

The documentation for this struct was generated from the following file:
  • xmc_usbh.h


XMC Peripheral Library for XMC4000 Family: XMC_USBH_DRIVER_VERSION_t Struct Reference

Data Fields
XMC_USBH_DRIVER_VERSION_t Struct Reference
XMC Peripheral Library » USBH

#include <xmc_usbh.h>

Data Fields

uint16_t | api
uint16_t | drv

Field Documentation

uint16_t api

API version

uint16_t drv

Driver version

The documentation for this struct was generated from the following file:
  • xmc_usbh.h


XMC Peripheral Library for XMC4000 Family: XMC_USBH_PORT_STATE_t Struct Reference

Data Fields
XMC_USBH_PORT_STATE_t Struct Reference
XMC Peripheral Library » USBH

#include <xmc_usbh.h>

Data Fields

uint32_t | connected: 1
uint32_t | overcurrent: 1
uint32_t | speed: 2

Field Documentation

uint32_t connected

USB Host Port connected flag

uint32_t overcurrent

USB Host Port overcurrent flag

uint32_t speed

USB Host Port speed setting (ARM_USB_SPEED_xxx)

The documentation for this struct was generated from the following file:
  • xmc_usbh.h


XMC Peripheral Library for XMC4000 Family: USIC

Data Structures | Macros | Typedefs | Enumerations | Functions
USIC
XMC Peripheral Library

Data Structures

struct XMC_USIC_CH_t

Macros

#define | USIC_CH_DXCR_CM_Msk USIC_CH_DX0CR_CM_Msk
#define | USIC_CH_DXCR_CM_Pos USIC_CH_DX0CR_CM_Pos
#define | USIC_CH_DXCR_DFEN_Msk USIC_CH_DX0CR_DFEN_Msk
#define | USIC_CH_DXCR_DPOL_Msk USIC_CH_DX0CR_DPOL_Msk
#define | USIC_CH_DXCR_DSEL_Msk USIC_CH_DX0CR_DSEL_Msk
#define | USIC_CH_DXCR_DSEL_Pos USIC_CH_DX0CR_DSEL_Pos
#define | USIC_CH_DXCR_DSEN_Msk USIC_CH_DX0CR_DSEN_Msk
#define | USIC_CH_DXCR_INSW_Msk USIC_CH_DX0CR_INSW_Msk
#define | USIC_CH_DXCR_INSW_pos USIC_CH_DX0CR_INSW_Pos
#define | USIC_CH_DXCR_SFSEL_Msk USIC_CH_DX0CR_SFSEL_Msk
#define | USIC_CH_DXCR_SFSEL_Pos USIC_CH_DX0CR_SFSEL_Pos
#define | XMC_USIC0 ((XMC_USIC_t *)USIC0_BASE)
#define | XMC_USIC0_CH0 ((XMC_USIC_CH_t *)USIC0_CH0_BASE)
#define | XMC_USIC0_CH1 ((XMC_USIC_CH_t *)USIC0_CH1_BASE)
#define | XMC_USIC1 ((XMC_USIC_t *)USIC1_BASE)
#define | XMC_USIC1_CH0 ((XMC_USIC_CH_t *)USIC1_CH0_BASE)
#define | XMC_USIC1_CH1 ((XMC_USIC_CH_t *)USIC1_CH1_BASE)
#define | XMC_USIC2 ((XMC_USIC_t *)USIC2_BASE)
#define | XMC_USIC2_CH0 ((XMC_USIC_CH_t *)USIC2_CH0_BASE)
#define | XMC_USIC2_CH1 ((XMC_USIC_CH_t *)USIC2_CH1_BASE)

Typedefs

typedef USIC_GLOBAL_TypeDef XMC_USIC_t

Enumerations

Functions

void | XMC_USIC_CH_ConfigExternalInputSignalToBRG (XMC_USIC_CH_t *const channel, const uint16_t pdiv, const uint32_t oversampling, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_USIC_CH_ConfigureShiftClockOutput (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t passive_level, const XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_t clock_output)
void | XMC_USIC_CH_ConnectInputDataShiftToDataInput (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_ConnectInputDataShiftToPPP (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_Disable (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_DisableFrameLengthControl (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_DisableInputSync (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_DisableTBUFDataValidTrigger (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableTimeMeasurement (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_Enable (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_EnableFrameLengthControl (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_EnableInputSync (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_EnableTBUFDataValidTrigger (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableTimeMeasurement (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_GetCaptureTimerValue (const XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_GetReceiveBufferStatus (XMC_USIC_CH_t *const channel)
XMC_USIC_CH_TBUF_STATUS_t | XMC_USIC_CH_GetTransmitBufferStatus (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_RXFIFO_ClearEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_RXFIFO_Configure (XMC_USIC_CH_t *const channel, const uint32_t data_pointer, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
void | XMC_USIC_CH_RXFIFO_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_RXFIFO_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_RXFIFO_Flush (XMC_USIC_CH_t *const channel)
uint16_t | XMC_USIC_CH_RXFIFO_GetData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_RXFIFO_GetEvent (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_RXFIFO_GetLevel (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_RXFIFO_IsEmpty (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_RXFIFO_IsFull (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_RXFIFO_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
void | XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
XMC_USIC_CH_STATUS_t | XMC_USIC_CH_SetBaudrate (XMC_USIC_CH_t *const channel, uint32_t rate, uint32_t oversampling)
void | XMC_USIC_CH_SetBRGInputClockSource (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_CLOCK_SOURCE_t clock_source)
void | XMC_USIC_CH_SetDataOutputMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_DATA_OUTPUT_MODE_t data_output_mode)
void | XMC_USIC_CH_SetFractionalDivider (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t mode, const uint16_t step)
void | XMC_USIC_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_USIC_CH_SetInputSamplingFreq (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input, const XMC_USIC_CH_INPUT_SAMPLING_FREQ_t sampling_freq)
void | XMC_USIC_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input, const uint8_t source)
void | XMC_USIC_CH_SetInputTriggerCombinationMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_USIC_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
void | XMC_USIC_CH_SetMclkOutputPassiveLevel (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_t passive_level)
void | XMC_USIC_CH_SetMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_OPERATING_MODE_t mode)
void | XMC_USIC_CH_SetPassiveDataLevel (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_PASSIVE_DATA_LEVEL_t passive_level)
void | XMC_USIC_CH_SetShiftDirection (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_SHIFT_DIRECTION_t shift_direction)
void | XMC_USIC_CH_SetStartTransmisionMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_START_TRANSMISION_MODE_t start_transmision_mode)
void | XMC_USIC_CH_SetTransmitBufferStatus (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_TBUF_STATUS_SET_t transmit_buffer_status)
void | XMC_USIC_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_USIC_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)
void | XMC_USIC_CH_TXFIFO_ClearEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_TXFIFO_Configure (XMC_USIC_CH_t *const channel, const uint32_t data_pointer, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
void | XMC_USIC_CH_TXFIFO_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_TXFIFO_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_TXFIFO_Flush (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_TXFIFO_GetEvent (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_TXFIFO_GetLevel (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_TXFIFO_IsEmpty (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_TXFIFO_IsFull (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_TXFIFO_PutData (XMC_USIC_CH_t *const channel, const uint16_t data)
void | XMC_USIC_CH_TXFIFO_PutDataFLEMode (XMC_USIC_CH_t *const channel, const uint16_t data, const uint32_t frame_length)
void | XMC_USIC_CH_TXFIFO_PutDataHPCMode (XMC_USIC_CH_t *const channel, const uint16_t data, const uint32_t frame_length)
void | XMC_USIC_CH_TXFIFO_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
void | XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
void | XMC_USIC_CH_WriteToTBUF (XMC_USIC_CH_t *const channel, const uint16_t data)
void | XMC_USIC_CH_WriteToTBUFTCI (XMC_USIC_CH_t *const channel, const uint16_t data, const uint32_t transmit_control_information)
void | XMC_USIC_Disable (XMC_USIC_t *const usic)
void | XMC_USIC_Enable (XMC_USIC_t *const usic)

Detailed Description

The Universal Serial Interface Channel(USIC) module is a flexible interface module covering several serial communication protocols. A USIC module contains two independent communication channels named USICx_CH0 and USICx_CH1, with x being the number of the USIC module. The user can program, during run-time, which protocol will be handled by each communication channel and which pins are used. The driver provides APIs, configuration structures and enumerations to configure common features of multiple serial communication protocols.

USIC driver features:

  1. Allows configuration of FIFO for transmit and receive functions.
  2. Provides a structure type XMC_USIC_CH_t to represent the USIC channel registers in a programmer friendly format.
  3. Allows configuration of automatic update for frame length, word length, slave select or slave address.
  4. Allows transmission of data to FIFO using XMC_USIC_CH_TXFIFO_PutData() and XMC_USIC_CH_TXFIFO_PutDataFLEMode()
  5. Allows reading of received data in FIFO using XMC_USIC_CH_RXFIFO_GetData()
  6. Allows configuration of baudrate using XMC_USIC_CH_SetBaudrate()
  7. Provides API to trigger interrupts using XMC_USIC_CH_TriggerServiceRequest()

Macro Definition Documentation

#define USIC_CH_DXCR_CM_Msk USIC_CH_DX0CR_CM_Msk

Common mask for CM bitfield mask in DXnCR register

#define USIC_CH_DXCR_CM_Pos USIC_CH_DX0CR_CM_Pos

Common mask for CM bitfield position in DXnCR register

#define USIC_CH_DXCR_DFEN_Msk USIC_CH_DX0CR_DFEN_Msk

Common mask for DFEN bitfield mask in DXnCR register

#define USIC_CH_DXCR_DPOL_Msk USIC_CH_DX0CR_DPOL_Msk

Common mask for DPOL bitfield mask in DXnCR register

#define USIC_CH_DXCR_DSEL_Msk USIC_CH_DX0CR_DSEL_Msk

Common mask for DSEL bitfield mask in DXnCR register

#define USIC_CH_DXCR_DSEL_Pos USIC_CH_DX0CR_DSEL_Pos

Common mask for DSEL bitfield position in DXnCR register

#define USIC_CH_DXCR_DSEN_Msk USIC_CH_DX0CR_DSEN_Msk

Common mask for DSEN bitfield mask in DXnCR register

#define USIC_CH_DXCR_INSW_Msk USIC_CH_DX0CR_INSW_Msk

Common mask for INSW bitfield mask in DXnCR register

#define USIC_CH_DXCR_INSW_pos USIC_CH_DX0CR_INSW_Pos

Common mask for INSW bitfield position in DXnCR register

#define USIC_CH_DXCR_SFSEL_Msk USIC_CH_DX0CR_SFSEL_Msk

Common mask for SFSEL bitfield mask in DXnCR register

#define USIC_CH_DXCR_SFSEL_Pos USIC_CH_DX0CR_SFSEL_Pos

Common mask for SFSEL bitfield position in DXnCR register

#define XMC_USIC0 ((XMC_USIC_t *)USIC0_BASE)

USIC0 module base address

#define XMC_USIC0_CH0 ((XMC_USIC_CH_t *)USIC0_CH0_BASE)

USIC0 channel 0 base address

#define XMC_USIC0_CH1 ((XMC_USIC_CH_t *)USIC0_CH1_BASE)

USIC0 channel 1 base address

#define XMC_USIC1 ((XMC_USIC_t *)USIC1_BASE)

USIC1 module base address

#define XMC_USIC1_CH0 ((XMC_USIC_CH_t *)USIC1_CH0_BASE)

USIC1 channel 0 base address

#define XMC_USIC1_CH1 ((XMC_USIC_CH_t *)USIC1_CH1_BASE)

USIC1 channel 1 base address

#define XMC_USIC2 ((XMC_USIC_t *)USIC2_BASE)

USIC2 module base address

#define XMC_USIC2_CH0 ((XMC_USIC_CH_t *)USIC2_CH0_BASE)

USIC2 channel 0 base address

#define XMC_USIC2_CH1 ((XMC_USIC_CH_t *)USIC2_CH1_BASE)

USIC2 channel 1 base address

Typedef Documentation

typedef USIC_GLOBAL_TypeDef XMC_USIC_t

USIC module structure

Enumeration Type Documentation

enum XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t

USIC channel baudrate generator divider mode

Enumerator
XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_DISABLED | Baudrate generator clock divider: Disabled
XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_NORMAL | Baudrate generator clock divider: Normal mode
XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_FRACTIONAL | Baudrate generator clock divider: Fractional mode
enum XMC_USIC_CH_BRG_CLOCK_SOURCE_t

USIC channel baudrate generator clock source

Enumerator
XMC_USIC_CH_BRG_CLOCK_SOURCE_DIVIDER | Baudrate generator clock source : Source divider. (Internal clock source)
XMC_USIC_CH_BRG_CLOCK_SOURCE_DX1T | Baudrate generator clock source : DX1T. (External clock source)
enum XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_t

USIC channel baudrate generator master clock passive level

Enumerator
XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_0 | Baudrate generator master clock passive level(idle mode signal level) 0
XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_1 | Baudrate generator master clock passive level((idle mode signal level)) 1
enum XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_t

USIC channel baudrate generator shift clock output

Enumerator
XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK | Baudrate generator shift clock output: SCL.(Internally generated shift clock)
XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 | Baudrate generator shift clock output: DX1. (External input shift clock)
enum XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t

USIC channel baudrate generator shift clock passive level

Enumerator
XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED | Shift clock passive level 0, delay disabled
XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED | Shift clock passive level 1, delay disabled
XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED | Shift clock passive level 0, delay enabled
XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_ENABLED | Shift clock passive level 1, delay enabled
enum XMC_USIC_CH_DATA_OUTPUT_MODE_t

USIC channel data output mode

Enumerator
XMC_USIC_CH_DATA_OUTPUT_MODE_NORMAL | Data output normal mode
XMC_USIC_CH_DATA_OUTPUT_MODE_INVERTED | Data output inverted mode
enum XMC_USIC_CH_EVENT_t

USIC channel events

Enumerator
XMC_USIC_CH_EVENT_RECEIVE_START | Receive start event
XMC_USIC_CH_EVENT_DATA_LOST | Data lost event
XMC_USIC_CH_EVENT_TRANSMIT_SHIFT | Transmit shift event
XMC_USIC_CH_EVENT_TRANSMIT_BUFFER | Transmit buffer event
XMC_USIC_CH_EVENT_STANDARD_RECEIVE | Receive event
XMC_USIC_CH_EVENT_ALTERNATIVE_RECEIVE | Alternate receive event
XMC_USIC_CH_EVENT_BAUD_RATE_GENERATOR | Baudrate generator event
enum XMC_USIC_CH_FIFO_SIZE_t

USIC channel receive FIFO size

Enumerator
XMC_USIC_CH_FIFO_DISABLED | FIFO Disabled
XMC_USIC_CH_FIFO_SIZE_2WORDS | FIFO size: 2 words
XMC_USIC_CH_FIFO_SIZE_4WORDS | FIFO size: 4 words
XMC_USIC_CH_FIFO_SIZE_8WORDS | FIFO size: 8 words
XMC_USIC_CH_FIFO_SIZE_16WORDS | FIFO size: 16 words
XMC_USIC_CH_FIFO_SIZE_32WORDS | FIFO size: 32 words
XMC_USIC_CH_FIFO_SIZE_64WORDS | FIFO size: 64 words
enum XMC_USIC_CH_INPUT_COMBINATION_MODE_t

USIC channel input combination mode

Enumerator
XMC_USIC_CH_INPUT_COMBINATION_MODE_TRIGGER_DISABLED | The trigger activation is disabled.
XMC_USIC_CH_INPUT_COMBINATION_MODE_RISING_EDGE | A rising edge activates DXnT
XMC_USIC_CH_INPUT_COMBINATION_MODE_FALLING_EDGE | A falling edge activates DXnT
XMC_USIC_CH_INPUT_COMBINATION_MODE_BOTH_EDGES | Both edges activate DXnT
enum XMC_USIC_CH_INPUT_SAMPLING_FREQ_t

USIC channel input source sampling frequency

Enumerator
XMC_USIC_CH_INPUT_SAMPLING_FREQ_FPERIPH | Use fperiph frequency for input source sampling
XMC_USIC_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER | Common mask for SFSEL bitfield position in DXnCR register Use fFD(fractional divider) frequency for input source sampling
enum XMC_USIC_CH_INPUT_t

USIC channel inputs

Enumerator
XMC_USIC_CH_INPUT_DX0 | DX0 input
XMC_USIC_CH_INPUT_DX1 | DX1 input
XMC_USIC_CH_INPUT_DX2 | DX2 input
XMC_USIC_CH_INPUT_DX3 | DX3 input
XMC_USIC_CH_INPUT_DX4 | DX4 input
XMC_USIC_CH_INPUT_DX5 | DX5 input
enum XMC_USIC_CH_INTERRUPT_NODE_POINTER_t

USIC channel interrupt node pointers

Enumerator
XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT | Node pointer for transmit shift interrupt
XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER | Node pointer for transmit buffer interrupt
XMC_USIC_CH_INTERRUPT_NODE_POINTER_RECEIVE | Node pointer for receive interrupt
XMC_USIC_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE | Node pointer for alternate receive interrupt
XMC_USIC_CH_INTERRUPT_NODE_POINTER_PROTOCOL | Node pointer for protocol related interrupts
enum XMC_USIC_CH_KERNEL_MODE_t

USIC channel kernel mode

Enumerator
XMC_USIC_CH_KERNEL_MODE_RUN_0 | Run mode 0 (transmission and reception possible)
XMC_USIC_CH_KERNEL_MODE_RUN_1 | Run mode 1 (transmission and reception possible)
XMC_USIC_CH_KERNEL_MODE_STOP_0 | Stop mode 0 (no transmission, but reception possible)
XMC_USIC_CH_KERNEL_MODE_STOP_1 | Stop mode 1 (both transmission and reception not possible)
enum XMC_USIC_CH_OPERATING_MODE_t

USIC channel operating mode

Enumerator
XMC_USIC_CH_OPERATING_MODE_IDLE | USIC channel idle
XMC_USIC_CH_OPERATING_MODE_SPI | SPI mode
XMC_USIC_CH_OPERATING_MODE_UART | UART mode
XMC_USIC_CH_OPERATING_MODE_I2S | I2S mode
XMC_USIC_CH_OPERATING_MODE_I2C | I2C mode
enum XMC_USIC_CH_PARITY_MODE_t

USIC channel parity mode

Enumerator
XMC_USIC_CH_PARITY_MODE_NONE | Disable parity mode
XMC_USIC_CH_PARITY_MODE_EVEN | Enable even parity mode
XMC_USIC_CH_PARITY_MODE_ODD | Enable odd parity mode
enum XMC_USIC_CH_PASSIVE_DATA_LEVEL_t

USIC channel output signal passive data level

Enumerator
XMC_USIC_CH_PASSIVE_DATA_LEVEL0 | Passive level(idle mode signal level) 0
XMC_USIC_CH_PASSIVE_DATA_LEVEL1 | Passive level(idle mode signal level) 1
enum XMC_USIC_CH_RBUF_STATUS_t

USIC channel receive buffer status

Enumerator
XMC_USIC_CH_RBUF_STATUS_DATA_VALID0 | RBUF0 data has not yet been read out
XMC_USIC_CH_RBUF_STATUS_DATA_VALID1 | RBUF1 data has not yet been read out
enum XMC_USIC_CH_RXFIFO_EVENT_CONF_t

USIC channel receive FIFO event configuration

Enumerator
XMC_USIC_CH_RXFIFO_EVENT_CONF_STANDARD | Enable FIFO standard receive interrupt
XMC_USIC_CH_RXFIFO_EVENT_CONF_ERROR | Enable receive FIFO error interrupt
XMC_USIC_CH_RXFIFO_EVENT_CONF_ALTERNATE | Enable FIFO alternative receive interrupt
enum XMC_USIC_CH_RXFIFO_EVENT_t

USIC channel receive FIFO status

Enumerator
XMC_USIC_CH_RXFIFO_EVENT_STANDARD | Receive FIFO status: Standard event
XMC_USIC_CH_RXFIFO_EVENT_ERROR | Receive FIFO status: Error event
XMC_USIC_CH_RXFIFO_EVENT_ALTERNATE | Receive FIFO status: Alternative event
enum XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_t

USIC channel receive FIFO interrupt node pointers

Enumerator
XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_STANDARD | Node pointer for FIFO standard receive interrupt
XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE | Node pointer for FIFO alternative receive interrupt
enum XMC_USIC_CH_SHIFT_DIRECTION_t

USIC channel shift direction. Defines the shift direction of the data words for transmission and reception

Enumerator
XMC_USIC_CH_SHIFT_DIRECTION_LSB_FIRST | Shift LSB first. The first data bit of a data word is located at bit position 0.
XMC_USIC_CH_SHIFT_DIRECTION_MSB_FIRST | Shift MSB first. The first data bit of a data word is located at the bit position given by the configured word length.
enum XMC_USIC_CH_START_TRANSMISION_MODE_t

USIC channel data transmission start modes. Data shifted out of the transmit pin depends on the value configured for the TDEN bitfield of the TCSR register. Following enum values are used for configuring the TCSR->TDEN bitfield.

Enumerator
XMC_USIC_CH_START_TRANSMISION_DISABLED | Passive data level is sent out on transmission.
XMC_USIC_CH_START_TRANSMISION_ON_TDV | Transmission of the data word in TBUF can be started if TDV = 1
XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_0 | Transmission of the data word in TBUF can be started if TDV = 1 while DX2S_0
XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_1 | Transmission of the data word in TBUF can be started if TDV = 1 while DX2S_1
enum XMC_USIC_CH_STATUS_t

USIC channel driver status

Enumerator
XMC_USIC_CH_STATUS_OK | USIC driver status : OK
XMC_USIC_CH_STATUS_ERROR | USIC driver status : ERROR
XMC_USIC_CH_STATUS_BUSY | USIC driver status : BUSY
enum XMC_USIC_CH_TBUF_STATUS_SET_t

USIC channel data transmit buffer status modification

Enumerator
XMC_USIC_CH_TBUF_STATUS_SET_BUSY | Set Transfer buffer status to busy
XMC_USIC_CH_TBUF_STATUS_SET_IDLE | Set Transfer buffer status to idle
enum XMC_USIC_CH_TBUF_STATUS_t

USIC channel data transmit buffer status

Enumerator
XMC_USIC_CH_TBUF_STATUS_IDLE | Transfer buffer is currently idle
XMC_USIC_CH_TBUF_STATUS_BUSY | Transfer buffer is currently busy
enum XMC_USIC_CH_TXFIFO_EVENT_CONF_t

USIC channel transmit FIFO event configuration

Enumerator
XMC_USIC_CH_TXFIFO_EVENT_CONF_STANDARD | Enable FIFO standard transmit interrupt
XMC_USIC_CH_TXFIFO_EVENT_CONF_ERROR | Enable transmit FIFO error interrupt
enum XMC_USIC_CH_TXFIFO_EVENT_t

USIC channel transmit FIFO status

Enumerator
XMC_USIC_CH_TXFIFO_EVENT_STANDARD | Transmit FIFO status: Standard event
XMC_USIC_CH_TXFIFO_EVENT_ERROR | Transmit FIFO status: Error event
enum XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_t

USIC channel transmit FIFO interrupt node pointers

Enumerator
XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_STANDARD | Node pointer for FIFO standard transmit interrupt
XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE | Node pointer for transmit FIFO error interrupt

Function Documentation

void XMC_USIC_CH_ConfigExternalInputSignalToBRG | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | pdiv,
 |  | const uint32_t | oversampling,
 |  | const XMC_USIC_CH_INPUT_COMBINATION_MODE_t | combination_mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
pdiv Desired divider for the external frequency input. Range: minimum value = 1, maximum value = 1024
oversampling Required oversampling. The value indicates the number of time quanta for one symbol of data.
This can be related to the number of samples for each logic state of the data signal.
Range: 1 to 32. Value should be chosen based on the protocol used.
combination_mode Selects which edge of the synchronized(and optionally filtered) signal DXnS actives the trigger output DXnT of the input stage.
Returns
None
Description
Enables the external frequency input for the Baudrate Generator and configures the divider, oversampling and the combination mode of the USIC channel.

Related APIs:
XMC_USIC_CH_SetBRGInputClockSource(), XMC_USIC_CH_SetInputTriggerCombinationMode()

void XMC_USIC_CH_ConfigureShiftClockOutput | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t | passive_level,
 |  | const XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_t | clock_output
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
passive_level Passive level for the clock output.
Range: XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED, XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED, XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED, XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_ENABLED,
clock_output Shift clock source selection.
Range: Use XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK, XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1
Returns
None
Description
Sets the idle mode shift clock output level and selects the shift clock source.

Shift clock idle mode output level can be set to logic high or low. Shift clock output can be configured to have a delay of half shift clock period. Both the configurations are available as enumeration values defined with type XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t. This value should be configured based on the slave device requirement. Shift clock source can be selected between internal clock(master) and external input(slave).
void XMC_USIC_CH_ConnectInputDataShiftToDataInput | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
The input of the data shift unit is connected to the selected data input line.

This setting is used if the signals are directly derived from an input pin without treatment by the protocol preprocessor.
Related APIs:
XMC_USIC_CH_ConnectInputDataShiftToPPP()

< Common mask for INSW bitfield mask in DXnCR register

void XMC_USIC_CH_ConnectInputDataShiftToPPP | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
The input of the data shift unit is controlled by the protocol pre-processor.

Related APIs:
XMC_USIC_CH_ConnectInputDataShiftToDataInput()

< Common mask for INSW bitfield mask in DXnCR register

void XMC_USIC_CH_Disable ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Disables the USIC channel.

USIC channel is disabled by setting the module enable bit(MDEN) to 0 in the register KSCFG.
Related APIs:
XMC_USIC_CH_Enable(), XMC_USIC_Disable()

void XMC_USIC_CH_DisableDelayCompensation ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Disables delay compensation..

Related APIs:
XMC_USIC_CH_EnableDelayCompensation()

void XMC_USIC_CH_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Bit mask of the channel events to be disabled. Use XMC_USIC_CH_EVENT_t for the bit masks.
Range: XMC_USIC_CH_EVENT_RECEIVE_START, XMC_USIC_CH_EVENT_DATA_LOST etc. Multiple events can be combined using OR operation.
Returns
None
Description
Disable the channel interrupt events.

Multiple events can be combined using the bitwise OR operation and configured in one function call. XMC_USIC_CH_EVENT_t enumerates multiple protocol event bitmasks. These enumerations can be used as input to the API.
Related APIs:
XMC_USIC_CH_EnableEvent(), XMC_USIC_CH_SetInterruptNodePointer()

void XMC_USIC_CH_DisableFrameLengthControl ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Disables automatic update of frame length.

When automatic update of frame length is disabled, frame length has to configured explicitly. Frame length remains fixed until it is changed again.
Related APIs:
XMC_USIC_CH_DisableFrameLengthControl(), XMC_USIC_CH_SetFrameLength()

void XMC_USIC_CH_DisableInputDigitalFilter | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
Disables the input digital filter for USIC channel input data signal.

Input data signal from the selected multiplexer will not be digitally filtered.
Related APIs:
XMC_USIC_CH_EnableInputDigitalFilter()

< Common mask for DFEN bitfield mask in DXnCR register

void XMC_USIC_CH_DisableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
Disables input inversion for USIC channel.

Resets the input data polarity for the USIC channel input data signal.
Related APIs:
XMC_USIC_CH_EnableInputInversion()

< Common mask for DPOL bitfield mask in DXnCR register

void XMC_USIC_CH_DisableInputSync | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
Disables input synchronization for the USIC channel input data signal.

Input data signal from the selected multiplexer will not be synchronized.
Related APIs:
XMC_USIC_CH_EnableInputSync(), XMC_USIC_CH_DisableInputDigitalFilter()

< Common mask for DSEN bitfield mask in DXnCR register

void XMC_USIC_CH_DisableTBUFDataValidTrigger ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Disables the trigger of TDV depending on DX2T signal.

Bit TCSR.TE is permanently set.
Related APIs:
XMC_USIC_CH_EnableTBUFDataValidTrigger()

void XMC_USIC_CH_DisableTimeMeasurement ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Disables time measurement using the capture mode timer.

Time measurement is disabled by clearing the timer enable flag in BRG register.
Related APIs:
XMC_USIC_CH_EnableTimeMeasurement()

void XMC_USIC_CH_Enable ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Enables the USIC channel.

USIC channel is enabled by setting the module enable bit in KSCFG register bitfield MODEN. On enabling, the channel is set to idle mode.
Related APIs:
XMC_USIC_CH_Disable(), XMC_USIC_Enable()

void XMC_USIC_CH_EnableDelayCompensation ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Enables delay compensation.

Delay compensation can be applied to the receive path.
Related APIs:
XMC_USIC_CH_DisableDelayCompensation()

void XMC_USIC_CH_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Bit mask of the channel events to be enabled. Use XMC_USIC_CH_EVENT_t for the bit masks.
Range: XMC_USIC_CH_EVENT_RECEIVE_START, XMC_USIC_CH_EVENT_DATA_LOST etc. Multiple events can be combined using OR operation.
Returns
None
Description
Enable the channel interrupt events.

Common channel events related to serial communication can be configured using this API. Multiple events can be combined using the bitwise OR operation and configured in one function call. XMC_USIC_CH_EVENT_t enumerates multiple protocol event bitmasks. These enumerations can be used as input to the API.
Related APIs:
XMC_USIC_CH_DisableEvent(), XMC_USIC_CH_SetInterruptNodePointer()

void XMC_USIC_CH_EnableFrameLengthControl ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Enables automatic update of frame length.

When the automatic update of frame length is enabled, frame length is configured based on the index of the TBUF[]/IN[] register array. When the data is written to TBUF[x], frame length is configured with the mask value of x at the last 5 bit positions. Same logic is applicable if data is written to IN[x] register.
Related APIs:
XMC_USIC_CH_DisableFrameLengthControl(), XMC_USIC_CH_TXFIFO_PutDataFLEMode()

void XMC_USIC_CH_EnableInputDigitalFilter | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
Enables the input digital filter for USIC channel input data signal.

Input data signal from the selected multiplexer will be digitally filtered.
Related APIs:
XMC_USIC_CH_DisableInputDigitalFilter()

< Common mask for DFEN bitfield mask in DXnCR register

void XMC_USIC_CH_EnableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
Enables input inversion for USIC channel input data signal.

Polarity of the input source can be changed to provide inverted data input.
Related APIs:
XMC_USIC_CH_DisableInputInversion()

< Common mask for DPOL bitfield mask in DXnCR register

void XMC_USIC_CH_EnableInputSync | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
Enables input synchronization for the USIC channel input data signal.

Input data signal from the selected multiplexer will be synchronized with fPERIPH. A noisy signal can be synchronized and filtered by enabling the digital filter.
Related APIs:
XMC_USIC_CH_DisableInputSync(), XMC_USIC_CH_EnableInputDigitalFilter()

< Common mask for DSEN bitfield mask in DXnCR register

void XMC_USIC_CH_EnableTBUFDataValidTrigger ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Bit TCSR.TE is set if DX2T becomes active while TDV = 1.

Enables the transfer trigger unit to set bit TCSR.TE if the trigger signal DX2T becomes active for event driven transfer starts.
Related APIs:
XMC_USIC_CH_DisableTBUFDataValidTrigger()

void XMC_USIC_CH_EnableTimeMeasurement ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Enables time measurement using the capture mode timer.

Time measurement is enabled by setting the timer enable flag in BRG register.
Related APIs:
XMC_USIC_CH_DisableTimeMeasurement()

uint32_t XMC_USIC_CH_GetCaptureTimerValue ( const XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Captured counter value
Description
The value of the counter is captured if one of the trigger signals DX0T or DX1T are activated by the corresponding input stage.
uint32_t XMC_USIC_CH_GetReceiveBufferStatus ( XMC_USIC_CH_t *const channel )

API to get receive buffer status.

Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status of data validity check for RBUF0 and RBUF1.
Returned value should be masked with RDV0 and RDV1 bits to know the status.
Range: XMC_USIC_CH_RBUF_STATUS_DATA_VALID0, XMC_USIC_CH_RBUF_STATUS_DATA_VALID1.
Description
Checks if RBUF0 and RBUF1 have valid unread data.

It checks the bits RDV0 and RDV1 of the RBUFSR register. Returns the value of RBUFSR masked with bitmasks of RDV0 and RDV1. It can be used to decide whether 2bytes has to be read from RBUF or 1 byte. If both bitmasks XMC_USIC_CH_RBUF_STATUS_DATA_VALID0 and XMC_USIC_CH_RBUF_STATUS_DATA_VALID1 are set, then 2 bytes can be read from RBUF. If only either of them is set, then only one byte can be read from RBUF.
Related APIs:
XMC_USIC_CH_GetTransmitBufferStatus()

XMC_USIC_CH_TBUF_STATUS_t XMC_USIC_CH_GetTransmitBufferStatus ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Stataus XMC_USIC_CH_TBUF_STATUS_IDLE if transmit buffer is free, XMC_USIC_CH_TBUF_STATUS_BUSY if transmit buffer is busy.
Description
Gets transmit buffer status.

Status indicates whether the transmit buffer is free, or busy transmitting data. The status depends on the value of TDV flag in TCSR register. This status can be used while transmitting data. Transmit data when the transmit buffer status is XMC_USIC_CH_TBUF_STATUS_IDLE.
Related APIs:
XMC_USIC_CH_SetDataOutputMode()

void XMC_USIC_CH_RXFIFO_ClearEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Receive FIFO events to be cleared.
Range: XMC_USIC_CH_RXFIFO_EVENT_STANDARD, XMC_USIC_CH_RXFIFO_EVENT_ERROR, XMC_USIC_CH_RXFIFO_EVENT_ALTERNATE.
Returns
None
Description
Clears the receive FIFO event flags in the status register.

USIC channel peripheral does not clear the event flags after they are read. This API clears the events provided in the mask value. XMC_USIC_CH_RXFIFO_EVENT enumeration can be used as input. Multiple events can be cleared by providing a mask value obtained by bitwise OR operation of multiple event enumerations.
Related APIs:
XMC_USIC_CH_RXFIFO_GetEvent()

void XMC_USIC_CH_RXFIFO_Configure | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | data_pointer,
 |  | const XMC_USIC_CH_FIFO_SIZE_t | size,
 |  | const uint32_t | limit
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data_pointer Start position inside the FIFO buffer.
Range: 0 to 63.
size Required size of the receive FIFO.
Range: XMC_USIC_CH_FIFO_DISABLED, XMC_USIC_CH_FIFO_SIZE_2WORDS.. XMC_USIC_CH_FIFO_SIZE_64WORDS
limit Threshold of receive FIFO filling level to be considered for generating events.
Range: 0 to size -1.
Returns
None
Description
Configures the receive FIFO.

Receive FIFO is the subset of a common FIFO sized 64 words. This FIFO is shared between 2 channels of the USIC module. Each channel can share the FIFO for transmission and reception. data_pointer represents the start index in the common FIFO, from where received data can be put. size represents the size of receive FIFO as a multiple of 2. Since the FIFO is shared between 2 USIC channels, FIFO size should be carefully selected. A FIFO standard receive buffer event or alternative receive buffer event is generated when the FIFO filling level exceeds the limit value.
Related APIs:
XMC_USIC_CH_RXFIFO_EnableEvent(), XMC_USIC_CH_RXFIFO_SetInterruptNodePointer()

void XMC_USIC_CH_RXFIFO_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Events to be disabled.
Range: XMC_USIC_CH_RXFIFO_EVENT_CONF_STANDARD, XMC_USIC_CH_RXFIFO_EVENT_CONF_ERROR, XMC_USIC_CH_RXFIFO_EVENT_CONF_ALTERNATE.
Returns
None
Description
Disables the selected interrupt events related to receive FIFO.

By disabling the interrupt events, generation of interrupt is stopped. User can poll the event flags from the status register using the API XMC_USIC_CH_RXFIFO_GetEvent(). Event bitmasks can be constructed using the enumeration XMC_USIC_CH_RXFIFO_EVENT_CONF. For providing multiple events, combine the events using bitwise OR operation.
Related APIs:
XMC_USIC_CH_RXFIFO_GetEvent(), XMC_USIC_CH_RXFIFO_EnableEvent()

void XMC_USIC_CH_RXFIFO_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Events to be enabled. Multiple events can be bitwise OR combined. XMC_USIC_CH_RXFIFO_EVENT_CONF_t
Returns
None
Description
Enables the interrupt events related to transmit FIFO.

Event bitmasks can be constructed using the enumeration XMC_USIC_CH_RXFIFO_EVENT_CONF_t. Multiple events can be enabled by providing multiple events in a single call. For providing multiple events, combine the events using bitwise OR operation.

Note: API only enables the events. For interrupt generation, interrupt node must be configured and NVIC node must be enabled.

Related APIs:
XMC_USIC_CH_RXFIFO_SetInterruptNodePointer()

void XMC_USIC_CH_RXFIFO_Flush ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Clears the contents of receive FIFO.

Receive FIFO contents will be cleared and the filling level will be reset to 0.
Related APIs:
XMC_USIC_CH_RXFIFO_GetLevel()

uint16_t XMC_USIC_CH_RXFIFO_GetData ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Value read from the receive FIFO.
Range: 16bit data. Length of data depends on the word length configuration.
Description
Gets data from the receive FIFO.

Receive FIFO should be read only if data is availble in the FIFO. This can be checked using the API XMC_USIC_CH_RXFIFO_IsEmpty(). Receive FIFO error flag will be set if an attempt is made to read from an empty receive FIFO. To read all the received data, user should keep reading data until receive FIFO is empty.
Related APIs:
XMC_USIC_CH_RXFIFO_ClearEvent()

uint32_t XMC_USIC_CH_RXFIFO_GetEvent ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status of standard receive buffer, alternative receive buffer and receive buffer error events.
Range: XMC_USIC_CH_RXFIFO_EVENT_STANDARD, XMC_USIC_CH_RXFIFO_EVENT_ERROR, XMC_USIC_CH_RXFIFO_EVENT_ALTERNATE.
Description
Gets the receive FIFO events' status.

Gives the status of receive FIFO standard receive buffer event, alternative receive buffer event and receive buffer error event. The status bits are located at their bitpositions in the TRBSR register in the returned value. User can make use of the XMC_USIC_CH_RXFIFO_EVENT enumeration for checking the status of return value. The status can be found by using the bitwise AND operation on the returned value with the enumerated value.

Note: Event status flags should be cleared by the user explicitly.

Related APIs:
XMC_USIC_CH_RXFIFO_ClearEvent()

uint32_t XMC_USIC_CH_RXFIFO_GetLevel ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
uint32_t Receive FIFO filling level.
Range: minimum= 0(FIFO empty), maximum= receive FIFO size.
Description
Gets the receive FIFO filling level.

For every word received, the filling level is incremented. The API gives the value of this filling level. The filling level is decremented when the data is read out of the receive FIFO.
Related APIs:
XMC_USIC_CH_RXFIFO_Flush(), XMC_USIC_CH_RXFIFO_PutData()

bool XMC_USIC_CH_RXFIFO_IsEmpty ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status true if receive FIFO is empty, false if receive FIFO has some data.
Description
Checks if receive FIFO is empty.

When the receive FIFO is empty, received data will be put in receive FIFO. When the last received word in the FIFO is read, FIFO empty flag is set. Any attempt to read from an empty receive FIFO will set the receive FIFO error flag.
Related APIs:
XMC_USIC_CH_RXFIFO_Flush(), XMC_USIC_CH_RXFIFO_PutData()

bool XMC_USIC_CH_RXFIFO_IsFull ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status true if receive FIFO is full false if receive FIFO is not full.
Description
Checks if receive FIFO is full.

When the receive FIFO filling level reaches the configured size, FIFO full flag is set. Any data received when the receive FIFO is full, is lost.
Related APIs:
XMC_USIC_CH_RXFIFO_IsEmpty(), XMC_USIC_CH_RXFIFO_Flush()

void XMC_USIC_CH_RXFIFO_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
interrupt_node Node pointer representing the receive FIFO events.
Range: XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_STANDARD, XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE
service_request The service request to be used for interrupt generation.
Range: 0 to 5.
Returns
None
Description
Sets an interrupt node for the receive FIFO events.

A node pointer represents one or more interrupt events. Service request represents the interrupt node to be used among the 6 interrupt nodes available for USIC module. API configures the service request to be used for interrupt generation for the events selected. A receive FIFO event can generate an interrupt only if the interrupt node is configured for the event and the interrupt generation is enabled for the event. For example, transmit FIFO standard transmit buffer interrupt is generated if the interrupt node for the same is set and interrupt is enabled.

Note: NVIC node should be explicitly enabled for the interrupt generation.

Related APIs:
XMC_USIC_CH_RXFIFO_EnableEvent()

void XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_FIFO_SIZE_t | size,
 |  | const uint32_t | limit
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
size Required size of the receive FIFO.
Range: XMC_USIC_CH_FIFO_DISABLED, XMC_USIC_CH_FIFO_SIZE_2WORDS.. XMC_USIC_CH_FIFO_SIZE_64WORDS
limit Threshold for receive FIFO filling level to be considered for generating events.
Range: 0 to size -1.
Returns
None
Description
Sets the size and trigger limit for the receive FIFO.

The API is not to be called for initializing the receive FIFO. The API shall be used for the runtime change of receive FIFO trigger limit. FIFO start position will not be affected on execution.
Related APIs:
XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit()\ n

XMC_USIC_CH_STATUS_t XMC_USIC_CH_SetBaudrate | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | rate,
 |  | uint32_t | oversampling
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
rate Desired baudrate. Range: minimum value = 100, maximum value depends on the peripheral clock frequency
and oversampling. Maximum baudrate can be derived using the formula: (fperiph * 1023)/(1024 * oversampling)
oversampling Required oversampling. The value indicates the number of time quanta for one symbol of data.
This can be related to the number of samples for each logic state of the data signal.
Range: 1 to 32. Value should be chosen based on the protocol used.
Returns
Status indicating the baudrate configuration.
Range: XMC_USIC_CH_STATUS_OK if baudrate is successfully configured, XMC_USIC_CH_STATUS_ERROR if desired baudrate or oversampling is invalid.
Description
Configures the baudrate of the USIC channel.

Baudrate is configured by considering the peripheral frequency and the desired baudrate. Optimum values of FDR->STEP and BRG->PDIV are calulated and used for generating the desired baudrate.
Related APIs:
XMC_USIC_CH_SetStartTransmisionMode(), XMC_USIC_CH_SetInputSource()

void XMC_USIC_CH_SetBRGInputClockSource | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_BRG_CLOCK_SOURCE_t | clock_source
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
clock_source clock source for the BRG.
Returns
None
Description
Sets the clock source for the BRG.

Related APIs:
XMC_USIC_CH_SetInputTriggerCombinationMode(), XMC_USIC_CH_SetExternalClockBRGDivider()

void XMC_USIC_CH_SetDataOutputMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_DATA_OUTPUT_MODE_t | data_output_mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data_output_mode Data output mode.
Range: XMC_USIC_CH_DATA_OUTPUT_MODE_NORMAL, XMC_USIC_CH_DATA_OUTPUT_MODE_INVERTED
Returns
None
Description
Configures the mode for data output.

USIC channel can be configured to shift inverted data or direct data based on the input to the API.
Related APIs:
XMC_USIC_CH_SetStartTransmisionMode()

void XMC_USIC_CH_SetFractionalDivider | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t | mode,
 |  | const uint16_t | step
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
mode divider mode XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t
step divider
XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_NORMAL resulting divider = 1023 - step
XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_FRACTIONAL resulting divider = 1023 / step
Returns
None
Description
The fractional divider generates its output frequency fFD by either dividing the input frequency fPERIPH by an integer factor n or by multiplication of n/1024.
void XMC_USIC_CH_SetFrameLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | frame_length
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
frame_length Number of bits in a frame.
Range: minimum= 1, maximum= 0x3f. The maximum value for fixed frame size is 0x3f.
e.g: For a frame length of 16, frame_length should be provided as 16.
Returns
None
Description
Define the data frame length.

Set the number of bits to be serially transmitted in a frame. The frame length should be multiples of word length. If the value is set to 0x40, the frame length has to be controlled explicitly.
Related APIs:
XMC_USIC_CH_SetWordLength(), XMC_USIC_CH_EnableFrameLengthControl()

void XMC_USIC_CH_SetInputSamplingFreq | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input,
 |  | const XMC_USIC_CH_INPUT_SAMPLING_FREQ_t | sampling_freq
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support..
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
sampling_freq Sampling frequency value of type XMC_USIC_CH_INPUT_SAMPLING_FREQ_t.
Returns
None
Description
Sets sampling frequency for USIC channel input data signal.

Related APIs:
XMC_USIC_CH_SetInputSource(), XMC_USIC_CH_EnableInputSync(), XMC_USIC_CH_EnableInputDigitalFilter()

< Common mask for SFSEL bitfield mask in DXnCR register

void XMC_USIC_CH_SetInputSource | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input,
 |  | const uint8_t | source
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
source Input source select for the input stage. The table below maps the enum value with the input channel.
0 | DXnA
1 | DXnB
2 | DXnC
3 | DXnD
4 | DXnE
5 | DXnF
6 | DXnG
7 | Always 1
Returns
None
Description
Selects the data source for USIC input stage.

Selects the input data signal source among DXnA, DXnB.. DXnG for the input stage. The API can be used for all the input stages like DX0CR, DX1CR etc.
Related APIs:
XMC_USIC_CH_EnableInputInversion(), XMC_USIC_CH_EnableInputDigitalFilter(), XMC_USIC_CH_EnableInputSync(), XMC_USIC_CH_SetInputSamplingFreq()

< Common mask for DSEL bitfield mask in DXnCR register

< Common mask for DSEL bitfield position in DXnCR register

void XMC_USIC_CH_SetInputTriggerCombinationMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input,
 |  | const XMC_USIC_CH_INPUT_COMBINATION_MODE_t | combination_mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support..
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
combination_mode Combination mode value of type XMC_USIC_CH_INPUT_COMBINATION_MODE_t.
Returns
None
Description
Selects which edge of the synchronized signal DXnS activates the trigger output DXnT of the input stage.

Related APIs:
XMC_USIC_CH_SetInputSource(), XMC_USIC_CH_EnableInputSync(), XMC_USIC_CH_EnableInputDigitalFilter()

< Common mask for CM bitfield mask in DXnCR register

< Common mask for CM bitfield position in DXnCR register

void XMC_USIC_CH_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
interrupt_node Interrupt node pointer to be configured.
Range: XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT, XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER etc.
service_request Service request number.
Range: 0 to 5.
Returns
None
Description
Sets the interrupt node for USIC channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so.
Note: NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_USIC_CH_EnableEvent()

void XMC_USIC_CH_SetMclkOutputPassiveLevel | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_t | passive_level
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
passive_level Passive level for the master clock output.
Range: XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_0, XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_1.
Returns
None
Description
Sets the idle mode pin level for the master clock output.
void XMC_USIC_CH_SetMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_OPERATING_MODE_t | mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
mode USIC channel operation mode.
Range: XMC_USIC_CH_OPERATING_MODE_IDLE, XMC_USIC_CH_OPERATING_MODE_SPI, XMC_USIC_CH_OPERATING_MODE_UART, XMC_USIC_CH_OPERATING_MODE_I2S, XMC_USIC_CH_OPERATING_MODE_I2C.
Returns
None
Description
Sets the USIC channel operation mode.

A USIC channel can support multiple serial communication protocols like UART, SPI, I2C and I2S. The API sets the input operation mode to the USIC channel.
Related APIs:
XMC_USIC_Enable(), XMC_USIC_CH_Enable()

void XMC_USIC_CH_SetPassiveDataLevel | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_PASSIVE_DATA_LEVEL_t | passive_level
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
passive_level Value of passive level for the channel.
Range: XMC_USIC_CH_PASSIVE_DATA_LEVEL0, XMC_USIC_CH_PASSIVE_DATA_LEVEL1
Returns
None
Description
Set the passive data level of the output signal.

When the USIC channel transmit stage is idle, the output signal level stays at the configured passive level.
Related APIs:
XMC_USIC_CH_GetTransmitBufferStatus(), XMC_USIC_CH_SetStartTransmisionMode()

void XMC_USIC_CH_SetShiftDirection | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_SHIFT_DIRECTION_t | shift_direction
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
word_length Number of bits to be configured for a data word.
Range: minimum= 1, maximum= 16.
e.g: For word length of 8, word_length should be provided as 8.
Returns
None
Description
Sets the data word length in number of bits.

Sets the number of bits to represent a data word. Frame length should be a multiple of word length.
Related APIs:
XMC_USIC_CH_SetFrameLength()

void XMC_USIC_CH_SetStartTransmisionMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_START_TRANSMISION_MODE_t | start_transmision_mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
start_transmision_mode Transmission mode to be enabled.
Range: XMC_USIC_CH_START_TRANSMISION_DISABLED, XMC_USIC_CH_START_TRANSMISION_ON_TDV, XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_0, XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_1
Returns
None
Description
Configures data transmission.

The configuration affects the data shifted on the DOUT0 pin.
Related APIs:
XMC_USIC_CH_GetTransmitBufferStatus(), XMC_USIC_CH_SetDataOutputMode()

void XMC_USIC_CH_SetTransmitBufferStatus | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_TBUF_STATUS_SET_t | transmit_buffer_status
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
transmit_buffer_status clearing or setting the TDV flag.
Returns
None
Description
Modify TCSR.TDV and TCSR.TE to control the start of a data word transmission by software.
Related APIs:
XMC_USIC_CH_GetTransmitBufferStatus()

void XMC_USIC_CH_SetWordLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | word_length
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
word_length Number of bits to be configured for a data word.
Range: minimum= 1, maximum= 16.
e.g: For word length of 8, word_length should be provided as 8.
Returns
None
Description
Sets the data word length in number of bits.

Sets the number of bits to represent a data word. Frame length should be a multiple of word length.
Related APIs:
XMC_USIC_CH_SetFrameLength()

void XMC_USIC_CH_TriggerServiceRequest | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | service_request_line
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
service_request_line service request number of the event to be triggered.
Range: 0 to 5.
Returns
None
Description
Trigger a USIC interrupt service request.

When the USIC service request is triggered, the NVIC interrupt associated with it will be generated if enabled.
Related APIs:
XMC_USIC_CH_SetInterruptNodePointer()

void XMC_USIC_CH_TXFIFO_ClearEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Transmit FIFO events to be cleared.
Range: XMC_USIC_CH_TXFIFO_EVENT_STANDARD, XMC_USIC_CH_TXFIFO_EVENT_ERROR.
Returns
None
Description
Clears the transmit FIFO event flags in the status register.

USIC channel peripheral does not clear the event flags after they are read. This API clears the events provided in the mask value. XMC_USIC_CH_TXFIFO_EVENT enumeration can be used as input. Multiple events can be cleared by providing a mask value obtained by bitwise OR operation of multiple event enumerations.
Related APIs:
XMC_USIC_CH_TXFIFO_GetEvent()

void XMC_USIC_CH_TXFIFO_Configure | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | data_pointer,
 |  | const XMC_USIC_CH_FIFO_SIZE_t | size,
 |  | const uint32_t | limit
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data_pointer Start position inside the FIFO buffer.
Range: 0 to 63.
size Required size of the transmit FIFO.
Range: XMC_USIC_CH_FIFO_DISABLED, XMC_USIC_CH_FIFO_SIZE_2WORDS.. XMC_USIC_CH_FIFO_SIZE_64WORDS
limit Threshold of transmit FIFO filling level to be considered for generating events.
Range: 0 to size -1.
Returns
None
Description
Initializes the transmit FIFO.

Transmit FIFO is a subset of a common FIFO sized 64 words. This FIFO is shared between 2 channels of the USIC module. Each channel can share the FIFO for transmission and reception. data_pointer represents the start index in the common FIFO, from where transmit data can be put, for the selected USIC channel. size represents the size of transmit FIFO as a multiple of
  1. Since the FIFO is shared between 2 USIC channels, FIFO size should be carefully selected. A FIFO standard transmit buffer event is generated when the FIFO filling level falls below the limit value.
Related APIs:
XMC_USIC_CH_TXFIFO_EnableEvent(), XMC_USIC_CH_TXFIFO_SetInterruptNodePointer()

void XMC_USIC_CH_TXFIFO_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Events to be disabled. XMC_USIC_CH_TXFIFO_EVENT_CONF_t
Returns
None
Description
Disables the interrupt events related to transmit FIFO.

By disabling the interrupt events, generation of interrupt is stopped. User can poll the event flags from the status register using the API XMC_USIC_CH_TXFIFO_GetEvent(). Event bitmasks can be constructed using the enumeration XMC_USIC_CH_TXFIFO_EVENT_CONF_t. For providing multiple events, combine the events using bitwise OR operation.
Related APIs:
XMC_USIC_CH_TXFIFO_GetEvent(), XMC_USIC_CH_TXFIFO_EnableEvent()

void XMC_USIC_CH_TXFIFO_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Events to be enabled. Multiple events can be bitwise OR combined. XMC_USIC_CH_TXFIFO_EVENT_CONF_t
Returns
None
Description
Enables the interrupt events related to transmit FIFO.

Event bitmasks can be constructed using the enumeration XMC_USIC_CH_TXFIFO_EVENT_CONF_t. Multiple events can be enabled by providing multiple events in a single call. For providing multiple events, combine the events using bitwise OR operation. Events are configured in the TBCTR register.

Note: API only enables the events. For interrupt generation, interrupt node must be configured and NVIC node must be enabled.

Related APIs:
XMC_USIC_CH_TXFIFO_SetInterruptNodePointer()

void XMC_USIC_CH_TXFIFO_Flush ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Clears the contents of transmit FIFO.

Transmit FIFO contents will be cleared and the filling level will be reset to 0.
Related APIs:
XMC_USIC_CH_TXFIFO_GetLevel()

uint32_t XMC_USIC_CH_TXFIFO_GetEvent ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status of standard transmit and transmit buffer error events. XMC_USIC_CH_TXFIFO_EVENT_t
Description
Gets the transmit FIFO event status.

Gives the status of transmit FIFO standard transmit buffer event and transmit buffer error event. The status bits are located at their bit positions in the TRBSR register in the returned value. User can make use of the XMC_USIC_CH_TXFIFO_EVENT_t enumeration for checking the status of return value. The status can be found by using the bitwise AND operation on the returned value with the enumerated value.

Note: Event status flags should be cleared by the user explicitly.

Related APIs:
XMC_USIC_CH_TXFIFO_ClearEvent()

uint32_t XMC_USIC_CH_TXFIFO_GetLevel ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Transmit FIFO filling level.
Range: minimum= 0(FIFO empty), maximum= transmit FIFO size.
Description
Gets the transmit FIFO filling level.

For every word written to the FIFO, filling level is updated. The API gives the value of this filling level.
Related APIs:
XMC_USIC_CH_TXFIFO_Flush(), XMC_USIC_CH_TXFIFO_PutData()

bool XMC_USIC_CH_TXFIFO_IsEmpty ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status true if transmit FIFO is empty false if transmit FIFO has some data.
Description
Checks if transmit FIFO is empty.

When the transmit FIFO is empty, data can be written to FIFO. When the last written word to the transmit FIFO is transmitted out of the FIFO, FIFO empty flag is set.
Related APIs:
XMC_USIC_CH_TXFIFO_Flush(), XMC_USIC_CH_TXFIFO_PutData()

bool XMC_USIC_CH_TXFIFO_IsFull ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status true if transmit FIFO is full false if transmit FIFO is not full.
Description
Checks if transmit FIFO is full.

When the transmit FIFO filling level reaches the configured size, FIFO full flag is set. User should not write to the FIFO when the transmit FIFO is full.
Related APIs:
XMC_USIC_CH_TXFIFO_IsEmpty(), XMC_USIC_CH_TXFIFO_Flush()

void XMC_USIC_CH_TXFIFO_PutData | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data Data to be transmitted.
Range: 16bit unsigned data. minimum= 0, maximum= 65535
Returns
None
Description
Writes data into the transmit FIFO.

The data provided is placed in the transmit FIFO. The transmit FIFO should be configured before calling this API.
Related APIs:
XMC_USIC_CH_TXFIFO_EnableEvent()

void XMC_USIC_CH_TXFIFO_PutDataFLEMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data,
 |  | const uint32_t | frame_length
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data Data to be transmitted.
frame_length Frame length to be configured while transmitting the data.
Range: minimum= 0, maximum= 31. e.g: For a frame length of 16, set frame_length as 15.
Returns
None
Description
Writes data to the transmit FIFO in frame length control mode.

When frame length control is enabled for dynamic update of frame length, this API can be used. frame_length represents the frame length to be updated by the peripheral. frame_length is used as index for the IN[] register array.
Related APIs:
XMC_USIC_CH_EnableFrameLengthControl()

void XMC_USIC_CH_TXFIFO_PutDataHPCMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data,
 |  | const uint32_t | frame_length
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data Data to be transmitted.
frame_length Frame length to be configured while transmitting the data.
Range: minimum= 0, maximum= 31. e.g: For a frame length of 16, set frame_length as 15.
Returns
None
Description
Writes data to the transmit FIFO in hardware port control mode.

When hardware port control is enabled for dynamic update of frame length, this API can be used. frame_length represents the frame length to be updated by the peripheral. frame_length is used as index for the IN[] register array.
Related APIs:
XMC_USIC_CH_EnableFrameLengthControl()

void XMC_USIC_CH_TXFIFO_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
interrupt_node Node pointer representing the transmit FIFO events.
Range: XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_STANDARD, XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE
service_request The service request to be used for interrupt generation.
Range: 0 to 5.
Returns
None
Description
Sets an interrupt node for the transmit FIFO events.

A node pointer represents one or more interrupt events. Service request represents the interrupt node to be used among the 6 interrupt nodes available for USIC module. API configures the service request to be used for interrupt generation for the events selected. A transmit FIFO event can generate an interrupt only if the interrupt node is configured for the event and the interrupt generation is enabled for the event. For example, transmit FIFO standard transmit buffer interrupt is generated if the interrupt node for the same is set and interrupt is enabled.

Note: NVIC node should be explicitly enabled for the interrupt generation.

Related APIs:
XMC_USIC_CH_TXFIFO_EnableEvent()

void XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_FIFO_SIZE_t | size,
 |  | const uint32_t | limit
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
size Required size of the transmit FIFO.
Range: XMC_USIC_CH_FIFO_DISABLED, XMC_USIC_CH_FIFO_SIZE_2WORDS.. XMC_USIC_CH_FIFO_SIZE_64WORDS
limit Threshold for transmit FIFO filling level to be considered for generating events.
Range: 0 to size -1.
Returns
None
Description
Sets the size and trigger limit for the transmit FIFO.

The API is not to be called for initializing the transmit FIFO. The API shall be used for the runtime change of transmit FIFO trigger limit. FIFO start position will not be affected on execution.
Related APIs:
XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit()

void XMC_USIC_CH_WriteToTBUF | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data Data to be transmitted.
Range: 16bit unsigned data. minimum= 0, maximum= 65535
Returns
None
Description
Writes data into the transmit buffer.

The data provided is placed in TBUF[0U].
Related APIs:
XMC_USIC_CH_WriteToTBUFTCI()

void XMC_USIC_CH_WriteToTBUFTCI | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data,
 |  | const uint32_t | transmit_control_information
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data Data to be transmitted.
transmit_control_information transmit control information to be configured while transmitting the data.
Range: minimum= 0, maximum= 31.
Returns
None
Description
Writes data to the transmit buffer in a control mode.

When the respective control mode is enabled , this API can be used.
Related APIs:
XMC_USIC_CH_WriteToTBUF()

void XMC_USIC_Disable ( XMC_USIC_t *const usic )
Parameters
usic Pointer to USIC module handler of type XMC_USIC_t.
Range: XMC_USIC0 to XMC_USIC2 based on device support.
Returns
None
Description
Disables the USIC module.

Disables the clock for the USIC module by following the clock disabling sequence for the selected device.
Related APIs:
XMC_USIC_CH_Disable(), XMC_USIC_Enable()

void XMC_USIC_Enable ( XMC_USIC_t *const usic )
Parameters
usic Pointer to USIC module handler of type XMC_USIC_t.
Range: XMC_USIC0 to XMC_USIC2 based on device support.
Returns
None
Description
Enables the USIC module.

Enables the clock for the USIC module by following the clock enabling sequence for the selected device.
Related APIs:
XMC_USIC_CH_Enable(), XMC_USIC_Disable()

bool XMC_USIC_IsChannelValid ( const XMC_USIC_CH_t *const channel )

< USIC0 channel 0 base address

< USIC0 channel 1 base address

< USIC1 channel 0 base address

< USIC1 channel 1 base address

< USIC2 channel 0 base address

< USIC2 channel 1 base address

bool XMC_USIC_IsModuleValid ( const XMC_USIC_t *const module )

< USIC0 module base address

< USIC1 module base address

< USIC2 module base address

Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_USIC_CH_t Struct Reference

Data Fields
XMC_USIC_CH_t Struct Reference
XMC Peripheral Library » USIC

#include <xmc_usic.h>

Data Fields

__IO uint32_t | BRG
__IO uint32_t | BYP
__IO uint32_t | BYPCR
__I uint32_t | CCFG
__IO uint32_t | CCR
__IO uint32_t | CMTR
__IO uint32_t | DXCR [6]
__IO uint32_t | FDR
__O uint32_t | FMR
__O uint32_t | IN [32]
__IO uint32_t | INPR
__IO uint32_t | KSCFG
__I uint32_t | OUTDR
__I uint32_t | OUTR
__O uint32_t | PSCR
__IO uint32_t | RBCTR
__I uint32_t | RBUF
__I uint32_t | RBUF0
__I uint32_t | RBUF01SR
__I uint32_t | RBUF1
__I uint32_t | RBUFD
__I uint32_t | RBUFSR
__IO uint32_t | SCTR
__IO uint32_t | TBCTR
__IO uint32_t | TBUF [32]
__I uint32_t | TRBPTR
__O uint32_t | TRBSCR
__IO uint32_t | TRBSR
__IO uint32_t | PCR
__IO uint32_t | PCR_ASCMode
__IO uint32_t | PCR_IICMode
__IO uint32_t | PCR_IISMode
__IO uint32_t | PCR_SSCMode
__IO uint32_t | PSR
__IO uint32_t | PSR_ASCMode
__IO uint32_t | PSR_IICMode
__IO uint32_t | PSR_IISMode
__IO uint32_t | PSR_SSCMode

Detailed Description

USIC channel structure.
The members of the structure are same as in the device header file, except for some registers. DX0CR, DX1CR, DX2CR, DX3CR, DX4CR and DX5CR are replaced with the array DXCR[6]. TBUF0 to TBUF31 are replaced with TBUF[32]. IN0 to IN31 are replaced with IN[32].

Field Documentation

__IO uint32_t BRG

Baud rate generator register

__IO uint32_t BYP

FIFO bypass register

__IO uint32_t BYPCR

FIFO bypass control register

__I uint32_t CCFG

Channel configuration register

__IO uint32_t CCR

Channel control register

__IO uint32_t CMTR

Capture mode timer register

__IO uint32_t DXCR[6]

Input control registers DX0 to DX5.

__IO uint32_t FDR

Fractional divider configuration register

__O uint32_t FMR

Flag modification register

__O uint32_t IN[32]

Transmit FIFO input register

__IO uint32_t INPR

Interrupt node pointer register

__IO uint32_t KSCFG

Kernel state configuration register

__I uint32_t OUTDR

Receive FIFO debug output register

__I uint32_t OUTR

Receive FIFO output register

__IO uint32_t PCR

Protocol configuration register

__IO uint32_t PCR_ASCMode

UART protocol configuration register

__IO uint32_t PCR_IICMode

I2C protocol configuration register

__IO uint32_t PCR_IISMode

I2S protocol configuration register

__IO uint32_t PCR_SSCMode

SPI protocol configuration register

__O uint32_t PSCR

Protocol status clear register

__IO uint32_t PSR

Protocol status register

__IO uint32_t PSR_ASCMode

UART protocol status register

__IO uint32_t PSR_IICMode

I2C protocol status register

__IO uint32_t PSR_IISMode

I2S protocol status register

__IO uint32_t PSR_SSCMode

SPI protocol status register

__IO uint32_t RBCTR

Receive FIFO control register

__I uint32_t RBUF

Receive buffer register

__I uint32_t RBUF0

Receive buffer 0

__I uint32_t RBUF01SR

Receive buffer status register

__I uint32_t RBUF1

Receive buffer 1

__I uint32_t RBUFD

Debug mode receive buffer register

__I uint32_t RBUFSR

Receive buffer status register

__IO uint32_t SCTR

Shift control register

__IO uint32_t TBCTR

Transmit FIFO control register

__IO uint32_t TBUF[32]

Tranmsit buffer registers

__I uint32_t TRBPTR

Transmit/recive buffer pointer register

__O uint32_t TRBSCR

Transmit/receive buffer status clear register

__IO uint32_t TRBSR

Transmit/receive buffer status register

The documentation for this struct was generated from the following file:
  • xmc_usic.h


XMC Peripheral Library for XMC4000 Family: VADC

Data Structures | Macros | Typedefs | Enumerations | Functions
VADC
XMC Peripheral Library

Data Structures

struct | XMC_VADC_CHANNEL_CONFIG_t
struct | XMC_VADC_DETAILED_RESULT_t
struct | XMC_VADC_GLOBAL_CLASS_t
struct | XMC_VADC_GLOBAL_CLOCK_t
struct | XMC_VADC_GLOBAL_CONFIG_t
struct | XMC_VADC_GROUP_CLASS_t
struct | XMC_VADC_GROUP_CONFIG_t
struct | XMC_VADC_GROUP_EMUXCFG_t
struct | XMC_VADC_QUEUE_CONFIG_t
struct | XMC_VADC_QUEUE_ENTRY_t
struct | XMC_VADC_RESULT_CONFIG_t
struct | XMC_VADC_SCAN_CONFIG_t

Macros

#define XMC_VADC_NUM_CHANNELS_PER_GROUP (8U)

Typedefs

typedef XMC_VADC_SCAN_CONFIG_t | XMC_VADC_BACKGROUND_CONFIG_t
typedef VADC_GLOBAL_TypeDef | XMC_VADC_GLOBAL_t
typedef VADC_G_TypeDef | XMC_VADC_GROUP_t
typedef uint16_t | XMC_VADC_RESULT_SIZE_t

Enumerations

Functions

void | XMC_VADC_GLOBAL_BackgndAddMultipleChannels (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_mask)
void | XMC_VADC_GLOBAL_BackgndRemoveMultipleChannels (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_mask)
void | XMC_VADC_GLOBAL_BackgroundAbortSequence (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundAddChannelToSequence (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_num)
void | XMC_VADC_GLOBAL_BackgroundClearReqSrcEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundDisableContinuousMode (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundDisableEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundEnableContinuousMode (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundEnableEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger (XMC_VADC_GLOBAL_t *const global_ptr)
uint32_t | XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending (XMC_VADC_GLOBAL_t *const global_ptr)
bool | XMC_VADC_GLOBAL_BackgroundGetReqSrcEventStatus (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_BACKGROUND_CONFIG_t *config)
bool | XMC_VADC_GLOBAL_BackgroundIsChannelPending (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_num)
void | XMC_VADC_GLOBAL_BackgroundRemoveChannelFromSequence (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_num)
void | XMC_VADC_GLOBAL_BackgroundSelectGating (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t input_num)
void | XMC_VADC_GLOBAL_BackgroundSelectTrigger (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t input_num)
void | XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
void | XMC_VADC_GLOBAL_BackgroundSetGatingMode (XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_GATEMODE_t mode_sel)
void | XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode (XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_SR_t sr)
void | XMC_VADC_GLOBAL_BackgroundTriggerConversion (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundTriggerReqSrcEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BindGroupToEMux (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t emuxif, const uint32_t group)
void | XMC_VADC_GLOBAL_ClearEvent (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t event_type)
void | XMC_VADC_GLOBAL_ClockInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CLOCK_t *config)
void | XMC_VADC_GLOBAL_DisableModule (void)
void | XMC_VADC_GLOBAL_DisableModuleClock (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_DisablePostCalibration (XMC_VADC_GLOBAL_t *const global_ptr, uint32_t group_number)
void | XMC_VADC_GLOBAL_DisableSleepMode (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_DisableStartupCalibration (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_EnableModule (void)
void | XMC_VADC_GLOBAL_EnableModuleClock (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_EnablePostCalibration (XMC_VADC_GLOBAL_t *const global_ptr, uint32_t group_number)
void | XMC_VADC_GLOBAL_EnableSleepMode (XMC_VADC_GLOBAL_t *const global_ptr)
XMC_VADC_FAST_COMPARE_t | XMC_VADC_GLOBAL_GetCompareResult (XMC_VADC_GLOBAL_t *const global_ptr)
uint32_t | XMC_VADC_GLOBAL_GetDetailedResult (XMC_VADC_GLOBAL_t *const global_ptr)
XMC_VADC_RESULT_SIZE_t | XMC_VADC_GLOBAL_GetResult (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_Init (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CONFIG_t *config)
void | XMC_VADC_GLOBAL_InputClassInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CLASS_t config, const XMC_VADC_GROUP_CONV_t conv_type, const uint32_t set_num)
void | XMC_VADC_GLOBAL_ResultInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_RESULT_CONFIG_t *config)
void | XMC_VADC_GLOBAL_SetBoundaries (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t boundary0, const uint32_t boundary1)
void | XMC_VADC_GLOBAL_SetCompareValue (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_RESULT_SIZE_t compare_val)
void | XMC_VADC_GLOBAL_SetIndividualBoundary (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_CHANNEL_BOUNDARY_t selection, const uint16_t boundary_value)
void | XMC_VADC_GLOBAL_SetResultEventInterruptNode (XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_SR_t sr)
void | XMC_VADC_GLOBAL_StartupCalibration (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_TriggerEvent (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t event_type)
void | XMC_VADC_GROUP_AddResultToFifo (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_BackgroundDisableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_BackgroundEnableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ChannelClearEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
uint32_t | XMC_VADC_GROUP_ChannelGetAssertedEvents (XMC_VADC_GROUP_t *const group_ptr)
XMC_VADC_CHANNEL_CONV_t | XMC_VADC_GROUP_ChannelGetInputClass (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
XMC_VADC_RESULT_ALIGN_t | XMC_VADC_GROUP_ChannelGetResultAlignment (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
uint8_t | XMC_VADC_GROUP_ChannelGetResultRegister (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ChannelInit (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_CONFIG_t *config)
bool | XMC_VADC_GROUP_ChannelIsResultOutOfBounds (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ChannelSetBoundarySelection (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, XMC_VADC_BOUNDARY_SELECT_t boundary_sel, XMC_VADC_CHANNEL_BOUNDARY_t selection)
void | XMC_VADC_GROUP_ChannelSetEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_ChannelSetIclass (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_CONV_t conversion_class)
void | XMC_VADC_GROUP_ChannelSetInputReference (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_REF_t ref)
void | XMC_VADC_GROUP_ChannelSetResultRegister (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const uint32_t result_reg_num)
void | XMC_VADC_GROUP_ChannelTriggerEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ChannelTriggerEventGenCriteria (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_EVGEN_t criteria)
void | XMC_VADC_GROUP_CheckSlaveReadiness (XMC_VADC_GROUP_t *const group_ptr, uint32_t slave_group)
void | XMC_VADC_GROUP_ClearResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_DisableChannelSyncRequest (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_DisableResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_EnableChannelSyncRequest (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_EnableResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_ExternalMuxControlInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_EMUXCFG_t emux_cfg)
uint32_t | XMC_VADC_GROUP_GetAlias (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_GetAssertedResultEvents (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_GetDetailedResult (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
XMC_VADC_FAST_COMPARE_t | XMC_VADC_GROUP_GetFastCompareResult (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
XMC_VADC_GROUP_CLASS_t | XMC_VADC_GROUP_GetInputClass (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_CHANNEL_CONV_t conv_class)
XMC_VADC_RESULT_SIZE_t | XMC_VADC_GROUP_GetResult (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
uint32_t | XMC_VADC_GROUP_GetResultFifoHead (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
uint32_t | XMC_VADC_GROUP_GetResultFifoTail (XMC_VADC_GROUP_t *const group_ptr, uint32_t res_reg)
uint32_t | XMC_VADC_GROUP_GetSyncReadySignal (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_IgnoreSlaveReadiness (XMC_VADC_GROUP_t *const group_ptr, uint32_t slave_group)
void | XMC_VADC_GROUP_Init (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_CONFIG_t *config)
void | XMC_VADC_GROUP_InputClassInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_CLASS_t config, const XMC_VADC_GROUP_CONV_t conv_type, const uint32_t set_num)
XMC_VADC_GROUP_STATE_t | XMC_VADC_GROUP_IsConverterBusy (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_IsResultRegisterFifoHead (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
bool | XMC_VADC_GROUP_IsResultRegisterInFifo (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_QueueAbortSequence (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueClearReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueDisableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueDisableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueEnableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueEnableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueFlushEntries (XMC_VADC_GROUP_t *const group_ptr)
int32_t | XMC_VADC_GROUP_QueueGetInterruptedChannel (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_QueueGetLength (XMC_VADC_GROUP_t *const group_ptr)
int32_t | XMC_VADC_GROUP_QueueGetNextChannel (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_QueueGetReqSrcEventStatus (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_QUEUE_CONFIG_t *config)
void | XMC_VADC_GROUP_QueueInsertChannel (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_QUEUE_ENTRY_t entry)
bool | XMC_VADC_GROUP_QueueIsArbitrationSlotEnabled (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueRemoveChannel (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueSelectGating (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GATE_INPUT_SELECT_t input_num)
void | XMC_VADC_GROUP_QueueSelectTrigger (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_INPUT_SELECT_t input_num)
void | XMC_VADC_GROUP_QueueSelectTriggerEdge (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
void | XMC_VADC_GROUP_QueueSetGatingMode (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_GATEMODE_t mode_sel)
void | XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_QueueTriggerConversion (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueTriggerReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ResultInit (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg_num, const XMC_VADC_RESULT_CONFIG_t *config)
void | XMC_VADC_GROUP_ScanAddChannelToSequence (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ScanAddMultipleChannels (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_mask)
void | XMC_VADC_GROUP_ScanClearReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableContinuousMode (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableContinuousMode (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_ScanGetNumChannelsPending (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_ScanGetReqSrcEventStatus (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SCAN_CONFIG_t *config)
bool | XMC_VADC_GROUP_ScanIsArbitrationSlotEnabled (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_ScanIsChannelPending (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ScanRemoveChannel (XMC_VADC_GROUP_t *const group_ptr, const uint32_t channel_num)
void | XMC_VADC_GROUP_ScanSelectGating (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_GATE_INPUT_SELECT_t gating_input)
void | XMC_VADC_GROUP_ScanSelectTrigger (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_TRIGGER_INPUT_SELECT_t trigger_input)
void | XMC_VADC_GROUP_ScanSelectTriggerEdge (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
void | XMC_VADC_GROUP_ScanSequenceAbort (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanSetGatingMode (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_GATEMODE_t mode_sel)
void | XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_ScanTriggerConversion (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanTriggerReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_SetBoundaries (XMC_VADC_GROUP_t *const group_ptr, const uint32_t boundary0, const uint32_t boundary1)
void | XMC_VADC_GROUP_SetBoundaryEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const uint8_t boundary_flag_num, const XMC_VADC_BOUNDARY_NODE_t node)
void | XMC_VADC_GROUP_SetChannelAlias (XMC_VADC_GROUP_t *const group_ptr, const uint32_t src_ch_num, const uint32_t alias_ch_num)
void | XMC_VADC_GROUP_SetIndividualBoundary (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_CHANNEL_BOUNDARY_t selection, const uint16_t boundary_value)
void | XMC_VADC_GROUP_SetPowerMode (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_POWERMODE_t power_mode)
void | XMC_VADC_GROUP_SetResultFastCompareValue (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg, const XMC_VADC_RESULT_SIZE_t compare_val)
void | XMC_VADC_GROUP_SetResultInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_SetResultSubtractionValue (XMC_VADC_GROUP_t *const group_ptr, const uint16_t subtraction_val)
void | XMC_VADC_GROUP_SetSyncMaster (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_SetSyncReadySignal (XMC_VADC_GROUP_t *const group_ptr, uint32_t mask)
void | XMC_VADC_GROUP_SetSyncSlave (XMC_VADC_GROUP_t *const group_ptr, uint32_t master_grp, uint32_t slave_group)
void | XMC_VADC_GROUP_SetSyncSlaveReadySignal (XMC_VADC_GROUP_t *const group_ptr, uint32_t eval_waiting_group, uint32_t eval_origin_group)
void | XMC_VADC_GROUP_TriggerResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_TriggerServiceRequest (XMC_VADC_GROUP_t *const group_ptr, const uint32_t sr_num, const XMC_VADC_GROUP_IRQ_t type)

Detailed Description

The XMC microcontroller provides a series of analog input channels connected to a cluster of Analog/Digital Converters using the Successive Approximation Register (SAR) principle to convert analog input values (voltages) to discrete digital values.

Each converter of the ADC cluster can operate independent of the others, controlled by a dedicated set of registers and triggered by a dedicated group request source. The results of each channel can be stored in a dedicated channel-specific result register or in a group-specific result register.

The Versatile Analog to Digital Converter module (VADC) of the XMC comprises a set of converter blocks that can be operated either independently or via a common request source that emulates a background converter. Each converter block is equipped with a dedicated input multiplexer and dedicated request sources, which together build separate groups.

The VADC LLD is split into GLOBAL and GROUP related APIs.
GLOBAL:

  • Global APIs act on the entire ADC module. Configures global configuration registers
  • Allows configuration of the background request source of the VADC.
  • The clock related configurations for the VADC module are configured in the Global APIs/
  • The Global API names are prefixed by the XMC_VADC_GLOBAL_ and they accept XMC_VADC_GLOBAL_t as one of its arguments.
  • Configures the background request source of the VADC. The APIs which act on the background related registers are prefixed by XMC_VADC_GLOBAL_Background
  • Configures the sample and hold unit of the VADC. The APIs which act on the SHS related registers are prefixed by XMC_VADC_GLOBAL_SHS_

GROUP:

  • Group APIs act on a VADC group. Configures the group configuration registers
  • Configures the queue request source of the VADC. The APIs which act on the queue related registers are prefixed by XMC_VADC_GROUP_Queue
  • Configures the scan request source of the VADC. The APIs which act on the scan related registers are prefixed by XMC_VADC_GROUP_Scan
  • Configuration of the channels of each group are done by the API which have a prefix as XMC_VADC_GROUP_Channel.
  • The Group API names are prefixed by the XMC_VADC_GROUP_ and they accept XMC_VADC_GROUP_t as one of its arguments.

Macro Definition Documentation

#define XMC_VADC_NUM_CHANNELS_PER_GROUP (8U)

Defines the number of ADC channels per group

Typedef Documentation

typedef XMC_VADC_SCAN_CONFIG_t XMC_VADC_BACKGROUND_CONFIG_t

Type defined the scan configuration structure for background Request Source

typedef VADC_GLOBAL_TypeDef XMC_VADC_GLOBAL_t

Type defined the device header file vadc global register structure type to VADC type

typedef VADC_G_TypeDef XMC_VADC_GROUP_t

Type defined the device header file vadc group register structure type to VADC Group type

typedef uint16_t XMC_VADC_RESULT_SIZE_t

Type defined the converted result size to unsigned 16 bit integer

Enumeration Type Documentation

enum XMC_VADC_BOUNDARY_NODE_t

Provides possible routing values for the boundary flag.

Enumerator
XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_0 | Route the Group boundary flag to Common boundary flag 0
XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_1 | Route the Group boundary flag to Common boundary flag 1
XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_2 | Route the Group boundary flag to Common boundary flag 2
XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_3 | Route the Group boundary flag to Common boundary flag 3
XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_0 | Route the Group boundary flag to Common Service Request line 0
XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_1 | Route the Group boundary flag to Common Service Request line 1
XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_2 | Route the Group boundary flag to Common Service Request line 2
XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_3 | Route the Group boundary flag to Common Service Request line 3
enum XMC_VADC_BOUNDARY_SELECT_t

Defines the boundary select for Channel. Use XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t for this enumeration.

Enumerator
XMC_VADC_BOUNDARY_SELECT_LOWER_BOUND | Select the lower boundary
XMC_VADC_BOUNDARY_SELECT_UPPER_BOUND | Selects the upper boundary
enum XMC_VADC_CHANNEL_ALIAS_t

Defines channel alias. All enum items are available for channels 0 and 1. Other Channels can accept only XMC_VADC_CHANNEL_ALIAS_DISABLED.

enum XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t

Defines the criteria for boundary flag assertion. Use XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t for this enumeration.

Enumerator
XMC_VADC_CHANNEL_BOUNDARY_CONDITION_ABOVE_BAND | Set Boundary condition criteria to assert above the band
XMC_VADC_CHANNEL_BOUNDARY_CONDITION_BELOW_BAND | Set Boundary condition criteria to assert below the band
enum XMC_VADC_CHANNEL_BOUNDARY_t

Defines the references to boundary values used for limit checking feature. Each of these can be assigned as either an upper bound or a lower bound. Use XMC_VADC_CHANNEL_BOUNDARY_t for this enumeration.

Enumerator
XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND0 | Group specific Boundary-0 value
XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND1 | Group specific Boundary-1 value
XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND0 | Module wide Boundary-0 value
XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND1 | Module wide Boundary-1 value
enum XMC_VADC_CHANNEL_BWDCH_t

Defines the voltage which the capacitor is charged to. Used in Broken wire detection feature. Use XMC_VADC_CHANNEL_BWDCH_t for this enumeration.

Enumerator
XMC_VADC_CHANNEL_BWDCH_VAGND | Capacitor pre-charged to ground
XMC_VADC_CHANNEL_BWDCH_VAREF | Capacitor pre-charged to reference voltage
enum XMC_VADC_CHANNEL_CONV_t

Defines the conversion classes that can be selected for each channel. The enumeration members holds the group or global classes. The conversion classes decides the properties of conversion, like resolution, sampling time etc Use XMC_VADC_CHANNEL_CONV_t for this enumeration.

Enumerator
XMC_VADC_CHANNEL_CONV_GROUP_CLASS0 | Conversion property set-0 specific to the group
XMC_VADC_CHANNEL_CONV_GROUP_CLASS1 | Conversion property set-1 specific to the group
XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS0 | Conversion property set-0, Module wide
XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS1 | Conversion property set-1, Module wide
enum XMC_VADC_CHANNEL_EVGEN_t

Defines the criteria for event generation by the channel. Use XMC_VADC_CHANNEL_EVGEN_t for this enumeration.

Enumerator
XMC_VADC_CHANNEL_EVGEN_NEVER | No event generated
XMC_VADC_CHANNEL_EVGEN_INBOUND | Event generated when the result is within the normal range
XMC_VADC_CHANNEL_EVGEN_COMPHIGH | Event generated when the result of fast compare operation is high
XMC_VADC_CHANNEL_EVGEN_OUTBOUND | Event generated when the result is outside the normal range
XMC_VADC_CHANNEL_EVGEN_COMPLOW | Event generated when the result result of fast compare operation is low
XMC_VADC_CHANNEL_EVGEN_ALWAYS | Event generated always after conversion - unconditionally
enum XMC_VADC_CHANNEL_REF_t

Defines the reference voltage selection for conversion. Use XMC_VADC_CHANNEL_REF_t for this enumeration.

Enumerator
XMC_VADC_CHANNEL_REF_INTREF | Internal VARef
XMC_VADC_CHANNEL_REF_ALT_CH0 | External voltage available on Channel-0 of the perticular group
enum XMC_VADC_CONVMODE_t

Defines the conversion mode. It defines the resolution of conversion. Use XMC_VADC_CONVMODE_t for this enumeration.

Enumerator
XMC_VADC_CONVMODE_12BIT | Results of conversion are 12bits wide
XMC_VADC_CONVMODE_10BIT | Results of conversion are 10bits wide
XMC_VADC_CONVMODE_8BIT | Results of conversion are 8bits wide
XMC_VADC_CONVMODE_FASTCOMPARE | Input signal compared with a preset range
enum XMC_VADC_DMM_t

Defines the conversion result handling mode. Use XMC_VADC_DMM_t for this enumeration.

Enumerator
XMC_VADC_DMM_REDUCTION_MODE | Standard Data reduction mode
XMC_VADC_DMM_FILTERING_MODE | Provide option to select Finite Impulse Response Filter (FIR) or Infinite Impulse Response Filter (IIR)
XMC_VADC_DMM_DIFFERENCE_MODE | Difference mode is selected
enum XMC_VADC_FAST_COMPARE_t

Defines the output of a fast compare mode. Use XMC_VADC_FAST_COMPARE_t for this enumeration.

Enumerator
XMC_VADC_FAST_COMPARE_LOW | Input lower than than programmed reference
XMC_VADC_FAST_COMPARE_HIGH | Input higher than than programmed reference
XMC_VADC_FAST_COMPARE_UNKNOWN | Unknown, Conversion probably still ongoing
enum XMC_VADC_GATE_INPUT_SELECT_t

Defines the external gating input selection possibilities, to gate the conversion requests. Refer the VADC interconnects section of the reference manual for details of peripherals which can be used. Also refer xmc_vadc_map.h file for detailed definitions of the peripherals which can take the control of these enumeration items. Use XMC_VADC_GATE_INPUT_SELECT_t for this enumeration.

Enumerator
XMC_VADC_REQ_GT_A | Gating select signal A
XMC_VADC_REQ_GT_B | Gating select signal B
XMC_VADC_REQ_GT_C | Gating select signal C
XMC_VADC_REQ_GT_D | Gating select signal D
XMC_VADC_REQ_GT_E | Gating select signal E
XMC_VADC_REQ_GT_F | Gating select signal F
XMC_VADC_REQ_GT_G | Gating select signal G
XMC_VADC_REQ_GT_H | Gating select signal H
XMC_VADC_REQ_GT_I | Gating select signal I
XMC_VADC_REQ_GT_J | Gating select signal J
XMC_VADC_REQ_GT_K | Gating select signal K
XMC_VADC_REQ_GT_L | Gating select signal L
XMC_VADC_REQ_GT_M | Gating select signal M
XMC_VADC_REQ_GT_N | Gating select signal N
XMC_VADC_REQ_GT_O | Gating select signal O
XMC_VADC_REQ_GT_P | Gating select signal P
enum XMC_VADC_GATEMODE_t

Defines the condition for gating the conversion requests. It can be used to set the ENGT field of ASMR/BSMR/QMR register respectively for auto_scan/background_scan/queue request sources. Use XMC_VADC_GATEMODE_t for this enumeration.

Enumerator
XMC_VADC_GATEMODE_BLOCK | External triggers are permanently blocked
XMC_VADC_GATEMODE_IGNORE | External triggers are unconditionally passed
XMC_VADC_GATEMODE_ACTIVEHIGH | External trigger is passed only if the gate signal is high
XMC_VADC_GATEMODE_ACTIVELOW | External trigger is passed only if the gate signal is low
enum XMC_VADC_GLOBAL_EVENT_t

Defines the event which can lead to a global service request assertion. Use XMC_VADC_GLOBAL_EVENT_t for this enumeration.

Enumerator
XMC_VADC_GLOBAL_EVENT_BKGNDSOURCE | Background scan request source event
XMC_VADC_GLOBAL_EVENT_RESULT | Global result event
enum XMC_VADC_GROUP_ARBMODE_t

Defines the request source arbiter behavior. Use XMC_VADC_GROUP_ARBMODE_t for this enumeration.

Enumerator
XMC_VADC_GROUP_ARBMODE_ALWAYS | Arbiter runs all the time
XMC_VADC_GROUP_ARBMODE_ONDEMAND | Arbiter runs only if a conversion request is asserted by any of the request sources
enum XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t

Defines the various modes for the boundary flag. Use XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t for this enumeration.

Enumerator
XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_DISABLED | Disable boundary flag
XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED | Always enable boundary
XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED_ACTIVE_LOW | Enable boundary flag when gate level is 0
XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED_ACTIVE_HIGH | Enable boundary flag when gate level is 1
enum XMC_VADC_GROUP_CONV_t

Defines the reference to sample time and conversion mode settings. Use XMC_VADC_GROUP_CONV_t for this enumeration.

Enumerator
XMC_VADC_GROUP_CONV_STD | Settings pertaining to channels directly attached to VADC module
XMC_VADC_GROUP_CONV_EMUX | Settings pertaining to channels connected to VADC via EMUX
enum XMC_VADC_GROUP_EMUXCODE_t

Defines the EMUX channel selection encoding scheme. Use XMC_VADC_GROUP_EMUXCODE_t for this enumeration.

Enumerator
XMC_VADC_GROUP_EMUXCODE_BINARY | A linearly incrementing code serves are MUX-SEL
XMC_VADC_GROUP_EMUXCODE_GRAY | The MUX-SEL is gray encoded
enum XMC_VADC_GROUP_EMUXMODE_t

Defines the EMUX mode of operation. Use XMC_VADC_GROUP_EMUXMODE_t for this enumeration.

Enumerator
XMC_VADC_GROUP_EMUXMODE_SWCTRL | Perform EMUX in Software control mode
XMC_VADC_GROUP_EMUXMODE_STEADYMODE | Perform EMUX in Steady mode (Use EMUX set value)
XMC_VADC_GROUP_EMUXMODE_SINGLEMODE | Perform EMUX in Single step mode
XMC_VADC_GROUP_EMUXMODE_SEQUENCEMODE | Perform EMUX in Sequence mode
enum XMC_VADC_GROUP_INDEX_t

Defines the group indices. Use XMC_VADC_GROUP_INDEX_t for this enumeration.

enum XMC_VADC_GROUP_IRQ_t

Defines the service request set used. Use XMC_VADC_GROUP_IRQ_t for this enumeration.

Enumerator
XMC_VADC_GROUP_IRQ_KERNEL | Refers to Group specific service request
XMC_VADC_GROUP_IRQ_SHARED | Refers to Module wide service request
enum XMC_VADC_GROUP_POWERMODE_t

Defines the power modes of a VADC Group. Use XMC_VADC_GROUP_POWERMODE_t for this enumeration.

Enumerator
XMC_VADC_GROUP_POWERMODE_OFF | Group is powered down
XMC_VADC_GROUP_POWERMODE_RESERVED1 | Reserved
XMC_VADC_GROUP_POWERMODE_RESERVED2 | Reserved
XMC_VADC_GROUP_POWERMODE_NORMAL | Group is powered up
enum XMC_VADC_GROUP_RS_PRIORITY_t

Defines the request source arbitration priority. Use XMC_VADC_GROUP_RS_PRIORITY_t for this enumeration.

Enumerator
XMC_VADC_GROUP_RS_PRIORITY_0 | Lowest priority for the request source
XMC_VADC_GROUP_RS_PRIORITY_1 | Second lowest priority for the request source
XMC_VADC_GROUP_RS_PRIORITY_2 | Second highest priority for the request source
XMC_VADC_GROUP_RS_PRIORITY_3 | Highest priority for the request source
enum XMC_VADC_GROUP_STATE_t

Defines the status of a VADC group (also known as kernel). Use XMC_VADC_GROUP_STATE_t for this enumeration.

Enumerator
XMC_VADC_GROUP_STATE_IDLE | Idle and can convert if requested
XMC_VADC_GROUP_STATE_BUSY | Busy with an ongoing conversion
enum XMC_VADC_RESULT_ALIGN_t

Defines the alignment of the converted result. Use XMC_VADC_RESULT_ALIGN_t for this enumeration.

Enumerator
XMC_VADC_RESULT_ALIGN_LEFT | Always align result to left
XMC_VADC_RESULT_ALIGN_RIGHT | Always align result to right
enum XMC_VADC_RESULT_SUBTRATION_t
Enumerator
XMC_VADC_RESULT_SUBTRATION_12BIT_LEFT_ALIGN | Always align result to left
XMC_VADC_RESULT_SUBTRATION_12BIT_RIGHT_ALIGN | Always align result to right
XMC_VADC_RESULT_SUBTRATION_10BIT_LEFT_ALIGN | Always align result to left
XMC_VADC_RESULT_SUBTRATION_10BIT_RIGHT_ALIGN | Always align result to right
XMC_VADC_RESULT_SUBTRATION_8BIT_LEFT_ALIGN | Always align result to left
XMC_VADC_RESULT_SUBTRATION_8BIT_RIGHT_ALIGN | Always align result to right
enum XMC_VADC_SCAN_LOAD_t

Defines the behavior of load event for the scan request source. Use XMC_VADC_SCAN_LOAD_t for this enumeration.

Enumerator
XMC_VADC_SCAN_LOAD_OVERWRITE | The old set of channels is discarded in favor of the new set awaiting conversion
XMC_VADC_SCAN_LOAD_COMBINE | The new set of channels are combined with the pending channels from previous set
enum XMC_VADC_SCAN_TYPE_t

Defines the type of scan request source to be used. It can choose between auto scan and background scan request source methods. Use XMC_VADC_SCAN_TYPE_t for this enumeration.

Enumerator
XMC_VADC_SCAN_TYPE_GROUPSCAN | Auto scan mode of operation selected. Also called as Group scan
XMC_VADC_SCAN_TYPE_BACKGROUND | Background scan mode of operation selected. Also called as Global scan
enum XMC_VADC_SR_t

Defines the various service requests lines. Each group can raise up to 4 service requests independently. While all groups together have the possibility of raising 4 module wide service requests. Use XMC_VADC_SR_t for this enumeration.

Enumerator
XMC_VADC_SR_GROUP_SR0 | Group specific Service Request-0
XMC_VADC_SR_GROUP_SR1 | Group specific Service Request-1
XMC_VADC_SR_GROUP_SR2 | Group specific Service Request-2
XMC_VADC_SR_GROUP_SR3 | Group specific Service Request-3
XMC_VADC_SR_SHARED_SR0 | Module Wide Common Service Request-0
XMC_VADC_SR_SHARED_SR1 | Module Wide Common Service Request-1
XMC_VADC_SR_SHARED_SR2 | Module Wide Common Service Request-2
XMC_VADC_SR_SHARED_SR3 | Module Wide Common Service Request-3
enum XMC_VADC_STARTMODE_t

Defines the mode of operation of a channel, when an ongoing conversion gets interrupted in between. Use XMC_VADC_STARTMODE_t for this enumeration.

Enumerator
XMC_VADC_STARTMODE_WFS | An ongoing conversion completes without interruption
XMC_VADC_STARTMODE_CIR | An ongoing conversion can be interrupted and resumed later
XMC_VADC_STARTMODE_CNR | An ongoing conversion can be interrupted and never resumed
enum XMC_VADC_STATUS_t

Defines the return status after execution of VADC specific API's. Use XMC_VADC_STATUS_t for this enumeration.

Enumerator
XMC_VADC_STATUS_SUCCESS | Returned when the API has been able to fulfill the callers request
XMC_VADC_STATUS_ERROR | Returned when the API cannot fulfill the request
enum XMC_VADC_SYNCTR_EVAL_t

Defines the ready signal selection

Enumerator
XMC_VADC_SYNCTR_EVAL_1

Mask to set the EVAL1 bits of SYNCTR

enum XMC_VADC_TRIGGER_EDGE_t

Defines the edge sensitivity of the trigger signal which can assert a conversion. Use XMC_VADC_TRIGGER_EDGE_t for this enumeration.

Enumerator
XMC_VADC_TRIGGER_EDGE_NONE | No external trigger. Conversion request can be asserted by software
XMC_VADC_TRIGGER_EDGE_FALLING | The falling edge of the external trigger can assert conversion request
XMC_VADC_TRIGGER_EDGE_RISING | The rising edge of the external trigger can assert conversion request
XMC_VADC_TRIGGER_EDGE_ANY | Both the edges can assert conversion request
enum XMC_VADC_TRIGGER_INPUT_SELECT_t

Defines the external trigger input selection possibilities, to assert a conversion. Refer the VADC interconnects section of the reference manual for details of peripherals which can be used. Also refer xmc_vadc_map.h file for detailed definitions of the peripherals which can take the control of these enumeration items. Use XMC_VADC_TRIGGER_INPUT_SELECT_t for this enumeration.

Enumerator
XMC_VADC_REQ_TR_A | Trigger select signal A
XMC_VADC_REQ_TR_B | Trigger select signal B
XMC_VADC_REQ_TR_C | Trigger select signal C
XMC_VADC_REQ_TR_D | Trigger select signal D
XMC_VADC_REQ_TR_E | Trigger select signal E
XMC_VADC_REQ_TR_F | Trigger select signal F
XMC_VADC_REQ_TR_G | Trigger select signal G
XMC_VADC_REQ_TR_H | Trigger select signal H
XMC_VADC_REQ_TR_I | Trigger select signal I
XMC_VADC_REQ_TR_J | Trigger select signal J
XMC_VADC_REQ_TR_K | Trigger select signal K
XMC_VADC_REQ_TR_L | Trigger select signal L
XMC_VADC_REQ_TR_M | Trigger select signal M
XMC_VADC_REQ_TR_N | Trigger select signal N
XMC_VADC_REQ_TR_O | Trigger select signal O
XMC_VADC_REQ_TR_P | Trigger select signal P

Function Documentation

void XMC_VADC_GLOBAL_BackgndAddMultipleChannels | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | grp_num,
 |  | const uint32_t | ch_mask
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
grp_num | ID of the VADC group whose unprioritized channels have been assigned to background scan
ch_mask Mask word indicating channels which form part of scan conversion sequence Bit location 0/1/2/3/4/5/6/7 represents channels-0/1/2/3/4/5/6/7 respectively. To Add the channel to the scan sequence enable the respective bit. Passing a 0x0 will clear all the previously selected channels
Range: [0x0 to 0xFF]
Returns
None
Description:
Adds multiple channels to the scan sequence.

Call this API to insert a multiple channels into the scan request source. This will be added to a scan sequence. The added channels will be a part of the conversion sequence when the next load event occurs. A call to this API would configure the register bit fields of BRSSEL.
Related APIs:
XMC_VADC_GLOBAL_BackgroundAddChannelToSequence()
void XMC_VADC_GLOBAL_BackgndRemoveMultipleChannels | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | grp_num,
 |  | const uint32_t | ch_mask
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
grp_num | ID of the VADC group whose unprioritized channels have been assigned to background scan
ch_mask Mask word indicating channels which form part of scan conversion sequence Bit location 0/1/2/3/4/5/6/7 represents channels-0/1/2/3/4/5/6/7 respectively. To Add the channel to the scan sequence enable the respective bit. Passing a 0x0 will clear all the previously selected channels
Range: [0x0 to 0xFF]
Returns
None
Description:
Removes multiple channels to the scan sequence.

Call this API to insert a multiple channels into the scan request source. This will be added to a scan sequence. The added channels will be a part of the conversion sequence when the next load event occurs. A call to this API would configure the register bit fields of BRSSEL.
Related APIs:
XMC_VADC_GLOBAL_BackgroundAddChannelToSequence()
void XMC_VADC_GLOBAL_BackgroundAbortSequence ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Aborts an ongoing background scan conversion(sequence).

An ongoing sequence can be aborted at any time. The scan unit picks the pending channels one by one from a pending register and requests for their conversion. This API essentially clears the channel pending register thus creating an illusion that there are no more channels left in the sequence. A call to this API would configure the registers BRSMR, BRSCTRL, GxARBPR(if group is available) to abort the current scan sequence.
Related APIs:
None.
void XMC_VADC_GLOBAL_BackgroundAddChannelToSequence | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | grp_num,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
grp_num | ID of the VADC group whose unprioritized channels have been assigned to background scan Request source
ch_num The unprioritized channel meant to be added to the scan sequence
Range: [0x0 to 0x7]
Returns
None
Description:
Adds a channel to the background scan sequence.

Call this API to insert a new single channel into the background scan request source. This will be added to the scan sequence. The added channel will be part of the conversion sequence when the next load event occurs. A call to this API would configure the register bit fields of BRSSEL.
Related APIs:
XMC_VADC_GLOBAL_BackgroundAddMultipleChannels()
void XMC_VADC_GLOBAL_BackgroundClearReqSrcEvent ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Acknowledges the background scan conversion complete request source event.

This API will clear the request source event that occurred. This will clear a interrupt if it was raised. A call to this API would configure the register bit field GLOBEFLAG.SEVGLB
Related APIs:
XMC_VADC_GLOBAL_BackgroundTriggerReqSrcEvent()
void XMC_VADC_GLOBAL_BackgroundDisableContinuousMode ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Disables continuous conversion mode.

Typically for a Background request source to generate conversion request, either a hardware trigger or a software request is a pre-requisite. Using autoscan feature it is possible to start the conversion once and allow the sequence to repeat without any further triggers. Once all channels belonging to a Background request source have been converted, a request source completion event is generated. Generation of this event can restart the Background sequence. By invoking this API the Autoscan mode of operations is disabled. A call to this API would configure the register bit field BRSMR.SCAN.
Related APIs:
XMC_VADC_GLOBAL_BackgroundEnableContinuousMode()
void XMC_VADC_GLOBAL_BackgroundDisableEvent ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Disables the background scan request source event .
By using this API the request source event will be deactivated for the background scan request source. Other configurations w.r.t service node pointer are not done in this API. A call to this API would configure the register bit field BRSMR.ENSI.
Related APIs:
XMC_VADC_GROUP_BackgroundEnableEvent(),
XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode()
void XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Disables the trigger for background scan request source.
By using this API the trigger will be deactivated for the background scan request source. This will just deactivate the H/W trigger for the background scan request source. If any configuration was done to select the trigger input in BRSCTRL will be not be effected. A call to this API would configure the register bit field BRSMR.ENTR.
Related APIs:
XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger()
void XMC_VADC_GLOBAL_BackgroundEnableContinuousMode ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Enables continuous conversion mode.

Typically for a Background request source to generate conversion request, either a hardware trigger or a software request is needed. Using autoscan (continuous conversion)feature it is possible to start the conversion once and allow the sequence to repeat without any further triggers. Once all channels belonging to a Background request source have been converted, a request source completion event is generated. Generation of this event can restart the Background configure sequence. Every request source event will cause a load event to occur. A call to this API would access the register bit field BRSMR.SCAN.
Related APIs:
XMC_VADC_GROUP_BackgroundDisableContinuousMode()
void XMC_VADC_GLOBAL_BackgroundEnableEvent ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Enables the background scan request source event .
By using this API the request source event will be activated for the background scan request source. Other configurations w.r.t service node pointer are not done in this API. A call to this API would configure the register bit field BRSMR.ENSI.
Related APIs:
XMC_VADC_GLOBAL_BackgroundEnableEvent(),
XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode()
void XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Enables the trigger for background scan request source.

By using this API the trigger will be activated for the scan request source. The trigger signal and trigger edge will be selected from the BRSCTRL register. The Selection of a input will be done by XMC_VADC_GLOBAL_BackgroundSelectTrigger(). A call to this API would configure the register bit field BRSMR.ENTR.
Related APIs:
XMC_VADC_GLOBAL_BackgroundSelectTrigger()
XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger()
uint32_t XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns

uint32_t Returns the total channels pending for conversion.
Range: [0x0 to (0x8*number of groups)]
Description:
Returns the number of pending channels.

This API will read the pending channels register and will return the number of channels that are awaiting conversion. When a load event occurs the scan sequence is pushed to a pending conversion register. From the pending register the channels are taken up by the converter. When the API is called it would return the total number of channels pending (BRSPND[grp_num]).
Related APIs:
XMC_VADC_GLOBAL_BackgroundIsChannelPending()
bool XMC_VADC_GLOBAL_BackgroundGetReqSrcEventStatus ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
bool returns true if the service request event is raised. returns false if the service request event was not raised.
Description:
Determines if the request source event is asserted.
This API will get the status of the background scan request source event. Will return a true if the event has occurred for background scan. A call to this API would configure the register bit field GLOBEFLAG.SEVGLB.
Related APIs:
None.
void XMC_VADC_GLOBAL_BackgroundInit | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_BACKGROUND_CONFIG_t * | config
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
config | Pointer to initialization data structure
Description:
Initializes the Background scan functional block.

The BACKGROUND SCAN request source functional block converts channels of all VADC groups that have not been assigned as a priority channel (priority channels can be converted only by queue and scan). Background Scan request source converts the unprioritized channels. Unprioritized channels however can also be used with queue and scan. But a channel which is prioritized can not be used with background request source.
Related APIs:
XMC_VADC_GROUP_BackgroundEnableArbitrationSlot()
XMC_VADC_GROUP_BackgroundDisableArbitrationSlot()
XMC_VADC_GLOBAL_BackgroundSelectTrigger()
XMC_VADC_GLOBAL_BackgroundSelectGating()
bool XMC_VADC_GLOBAL_BackgroundIsChannelPending | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | grp_num,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
grp_num | ID of the VADC group whose unprioritized channels have been assigned to background scan RS
ch_num The channel being audited for completion of conversion
Range: [0x0 to 0x7]
Returns
bool returns true if the channel is pending conversion else returns false
Description:
Determine if the channel is pending.

This API will check if the Channel in question is awaiting conversion in the current arbitration round. When a load event occurs the scan sequence is pushed to a pending conversion register. From the pending register the channels are taken up by the converter. This API would return true if the channel is found in the pending register (BRSPND[grp_num]).
Related APIs:
XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending()
void XMC_VADC_GLOBAL_BackgroundRemoveChannelFromSequence | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | grp_num,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
grp_num | ID of the VADC group whose unprioritized channels have been assigned to background scan Request source
ch_num The unprioritized channel meant to be added to the scan sequence
Range: [0x0 to 0x7]
Returns
None
Description:
Removes a channel to the background scan sequence.

Call this API to insert a new single channel into the background scan request source. This will be added to the scan sequence. The added channel will be part of the conversion sequence when the next load event occurs. A call to this API would configure the register bit fields of BRSSEL.
Related APIs:
XMC_VADC_GLOBAL_BackgroundAddChannelToSequence()
void XMC_VADC_GLOBAL_BackgroundSelectGating | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | input_num
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
input_num | Module input signal meant to be selected as gating input Accepts enum XMC_VADC_GATE_INPUT_SELECT_t
Returns
None
Description:
Select Gating signal for Background request source.

Passage of the trigger input to the request source can be controlled via a gating signal. Any one of the 16 input lines can be chosen as a gating signal. Trigger signal can be given to the Background request source only when the gating signal's active level is detected. Additionally the GxBRSMR.ENGT has to be configured for the gating signal's active level. A call to this API would configure the register bit field BRSCTRL.GTSEL.
Related APIs:
XMC_VADC_GLOBAL_BackgroundSelectTrigger()
void XMC_VADC_GLOBAL_BackgroundSelectTrigger | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | input_num
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
input_num | Choice of the input earmarked as a trigger line Accepts enum XMC_VADC_TRIGGER_INPUT_SELECT_t
Returns
None
Description:
Select Trigger signal for Background request source.

A Background request source will raise conversion request only if there were either a request from application or occurrence of a hardware trigger. This API selects one of the 16 input lines as a trigger line. This is needed when a hardware trigger is needed for the conversion of the Background request source. Refer to the reference manual to determine the signal that needs to be connected. A call to this API would configure the register bit field BRSCTRL.XTSEL.
Related APIs:
XMC_VADC_GLOBAL_BackgroundSelectGating()
XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger()
void XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_TRIGGER_EDGE_t | trigger_edge
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
trigger_edge | Select the trigger edge
Returns
None
Description:
Select Trigger edge for Background request source.

A Background request source will raise conversion request only if there were either a request from application or occurrence of a hardware trigger. This API selects one of the 4 possible values for the trigger edge. This is needed when a hardware trigger is needed for the conversion of the Background request source. A call to this API would configure the register bit field BRSCTRL.XTMODE.
Related APIs:
XMC_VADC_GLOBAL_BackgroundSelectGating()
XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger()
void XMC_VADC_GLOBAL_BackgroundSetGatingMode | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | XMC_VADC_GATEMODE_t | mode_sel
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
mode_sel | Select how the gating is applied to the background scan request source
Returns
None

Details of function
Selects the gating mode of background request source.

Passage of the trigger input to the request source can be controlled via a gating signal. This API determines how the gating signal behaves, either active low or active high. If gating signal needs to ignored XMC_VADC_GATEMODE_IGNORE should be used as the mode_sel. A call to this API would configure the register bit field BRSMR.ENGT.

Related APIs:
XMC_VADC_GLOBAL_BackgroundSelectGating();
void XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | XMC_VADC_SR_t | sr
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module
sr | The service request to which the global request source event is connected. Refer XMC_VADC_SR_t enum
Returns
None
Description:
Binds the background request source event to one of the 4 shared service requests.

This API binds the background request source event to one of the 4 module wide shared service requests. Sets GLOBEVNP register with the corresponding sr line.
Related APIs:
XMC_VADC_GLOBAL_SetResultEventInterruptNode()
void XMC_VADC_GLOBAL_BackgroundTriggerConversion ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Generates conversion request (Software initiated conversion).

A conversion request can be raised either upon detection of a hardware trigger, or by software. This API forces the scan unit to generate a conversion request to the analog converter. It is assumed that the background scan has already been filled up with entries. A call to this API would set the register bit field BRSMR.LDEV.
Related APIs:
None.
void XMC_VADC_GLOBAL_BackgroundTriggerReqSrcEvent ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Manually asserts the conversion complete request source event.

This API will set the request source event for background scan. This will trigger a interrupt if the service node pointer for the scan has been configured. A call to this API would configure the register bit field GLOBEFLAG.SEVGLB.
Related APIs:
None.
void XMC_VADC_GLOBAL_BindGroupToEMux | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | emuxif,
 |  | const uint32_t | group
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module
emuxif The EMUX interface
Range[0x0 - 0x1]
group | The VADC group which must be bound to the desired emux
Returns
None
Description:
Binds a VADC group to an EMUX interface specified in emuxif.

Selects which group's scan request source will control the EMUX interface (set of control select lines for the EMUX). By passing group it would configure that group's scan request source to control the EMUX select lines of the set emuxif.
Related APIs:
None
void XMC_VADC_GLOBAL_ClearEvent | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | event_type
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module
event_type | Event that must be acknowledged Use the enum XMC_VADC_GLOBAL_EVENT_t to create a mask to be used with this argument
Returns
None
Description:
Acknowledges an event that has been asserted manually or automatically.

This API acknowledges the requested event by clearing GLOBEFLAG sticky flag.
Related APIs:
None
void XMC_VADC_GLOBAL_ClockInit | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_GLOBAL_CLOCK_t * | config
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module.
config | Pointer to the data structure containing clock configuration data
Returns
None
Description:
Configures the VADC clock.

Sets up the clock configuration of the VADC module using the config structure pointed by config. The clock to the analog converter and to the request source arbiter is configured by setting the GLOBCFG register.
Related APIs:
None
void XMC_VADC_GLOBAL_DisableModule ( void )
Parameters
None
Returns
None
Description:
Disables the VADC module.

This API would gate the clock to the VADC module (if applicable). Also this API would put the VADC module into the reset state(if applicable) by asserting the appropriate registers. This API would invoke XMC_SCU_CLOCK_GatePeripheralClock() and XMC_SCU_RESET_AssertPeripheralReset() if needed.
Related APIs:
XMC_VADC_GLOBAL_EnableModule().
void XMC_VADC_GLOBAL_DisableModuleClock ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
None
Description:
Disables the VADC module clock.

After this API call, no conversion will occur. Call XMC_VADC_GLOBAL_EnableModuleClock() to enable the VADC module later in the program.
Related APIs:
XMC_VADC_GLOBAL_Init()
void XMC_VADC_GLOBAL_DisablePostCalibration | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | uint32_t | group_number
 | ) |  |
Parameters
global_ptr Constant pointer to the VADC module
group_number group number whose post calibration feature is to be disabled.
Range[0x0 to 0x3] Accepts the enum XMC_VADC_GROUP_INDEX_t
Returns
None
Description:
Disables the post calibration for a particular group specified as group_number.

It configures the DPCAL0 bit of GLOBCFG register to disable the post calibration feature. Call XMC_VADC_GLOBAL_Enable() and XMC_VADC_GLOBAL_ClockInit() before calling this API in sequence. Calling the API XMC_VADC_GLOBAL_EnablePostCalibration() can enable back the calibration feature at runtime.
Related APIs:
XMC_VADC_GLOBAL_Enable()
XMC_VADC_GLOBAL_ClockInit()
XMC_VADC_GLOBAL_DisablePostCalibration()
None
void XMC_VADC_GLOBAL_DisableSleepMode ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
None
Description:
Ignores the sleep mode request for the VADC.

With the sleep feature enabled, the module will respond to sleep requests by going into a low power mode. It resets the EDIS bit of CLC register for enabling the sleep mode.
Related APIs:
XMC_VADC_GLOBAL_EnableSleepMode().
void XMC_VADC_GLOBAL_DisableStartupCalibration ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
None
Description:
Disables the startup calibration feature of the VADC module.

It configures the SUCAL bit of GLOBCFG register to disable the startup calibration feature. Calling the API XMC_VADC_GLOBAL_EnsableStartupCalibration() can enable the calibration feature at runtime.
Related APIs:
None
void XMC_VADC_GLOBAL_EnableModule ( void )
Parameters
None
Returns
None
Description:
Enables the VADC module.

This API would ungate the clock to the VADC module (if applicable). Also this API would bring the VADC module out of reset state(if applicable), by asserting the appropriate registers. This API would invoke XMC_SCU_CLOCK_UngatePeripheralClock() and XMC_SCU_RESET_DeassertPeripheralReset() if needed. Directly accessed register is COMPARATOR.ORCCTRL (Refer to the errata for XMC1100).
Related APIs:
XMC_VADC_GLOBAL_DisableModule().
void XMC_VADC_GLOBAL_EnableModuleClock ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
None
Description:
Enables the VADC module clock.

Call this API before any further configuration of VADC. It sets the DISR bit of CLC register to enable.
Related APIs:
XMC_VADC_GLOBAL_Init()
void XMC_VADC_GLOBAL_EnablePostCalibration | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | uint32_t | group_number
 | ) |  |
Parameters
global_ptr Constant pointer to the VADC module
group_number group number whose post calibration feature is to be enabled.
Range[0x0 to 0x3] Accepts the enum XMC_VADC_GROUP_INDEX_t
Returns
None
Description:
Enables the post calibration for a particular group specified as group_number.

It configures the DPCAL0 bit of GLOBCFG register to enable the post calibration feature. Calling the API XMC_VADC_GLOBAL_DisablePostCalibration() can disable the calibration feature at runtime.
Related APIs:
XMC_VADC_GLOBAL_DisablePostCalibration()
None
void XMC_VADC_GLOBAL_EnableSleepMode ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
None
Description:
Enables VADC module to sleep if a sleep request comes.

It resets the EDIS bit of CLC register for enabling the sleep mode.
Related APIs:
XMC_VADC_GLOBAL_DisableSleepMode().
XMC_VADC_FAST_COMPARE_t XMC_VADC_GLOBAL_GetCompareResult ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module
Returns
compare high or low. Refer XMC_VADC_FAST_COMPARE_t enum
None
Description:
Determines the result of fast compare operation.

This API returns the result of fast compare operation provided the valid flag in the global result register GLOBRES is set.
Related APIs:
None
uint32_t XMC_VADC_GLOBAL_GetDetailedResult ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
uint32_t Complete global result register value GLOBRES
Description:
Retrieves the complete result from the global result register associated with the global_ptr.

This API audits the result register GLOBRES for the validity of the data. If the validity is assured, data is first read the global result register, cached locally next and subsequently returned to the caller.
Related APIs:
XMC_VADC_GLOBAL_GetResult()
XMC_VADC_RESULT_SIZE_t XMC_VADC_GLOBAL_GetResult ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
XMC_VADC_RESULT_SIZE_t 16 bit result register value.
Range[0x0 - 0X0FFF]
Description:
Retrieves the conversion result from the global result register associated with the global_ptr.

This is a lightweight version of XMC_VADC_GLOBAL_GetDetailedResult(). The behavior is exactly the same, just that it is only the 16 bit numeric result returned back to the application instead of the complete GLOBRES register value.
Related APIs:
XMC_VADC_GLOBAL_GetDetailedResult()
void XMC_VADC_GLOBAL_Init | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_GLOBAL_CONFIG_t * | config
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module.
config | Pointer to initialization data structure
Returns
None
Description:
Initializes the VADC global module with the associated configuration structure pointed by config.

It enables the global access to registers by configuring reset and clock un-gating for selected devices. It initializes global class, boundary , result resources by setting GLOBICLASS,GLOBBOUND,GLOBRCR registers. It also configures the global analog and digital clock dividers by setting GLOBCFG register. Refer related API's to change the configurations later in the program.
Related APIs:
XMC_VADC_GLOBAL_ClockInit()
void XMC_VADC_GLOBAL_InputClassInit | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_GLOBAL_CLASS_t | config,
 |  | const XMC_VADC_GROUP_CONV_t | conv_type,
 |  | const uint32_t | set_num
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module.
config | Conversion class parameter structure
conv_type | configure the input call for either standard conversion or EMUX related conversion.
set_num Conversion class set
Range: [0x0, 0x1]
Description:
Configures the ADC conversion settings like sample time and resolution.

Sets up the conversion settings for vadc global resource associated with config structure. It configures the conversion class properties like sampling time and resolution for selected conv_type channels. It initializes the GLOBALICLASS register specified by set_num with the required settings.
Related APIs:
None
void XMC_VADC_GLOBAL_ResultInit | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_RESULT_CONFIG_t * | config
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC global module
config | Pointer to result configuration data structure
Returns
None
Description:
Initializes global result register.

Initializes Global Result Register with specified settings configured in the config structure.

This API results in configuration of GLOBRCR register. This helps in configuring the Data reduction mode, global result event , wait for read mode on the GLOBRES register.
Related APIs:
None
void XMC_VADC_GLOBAL_SetBoundaries | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | boundary0,
 |  | const uint32_t | boundary1
 | ) |  |
Parameters
global_ptr Constant pointer to the VADC module.
boundary0 Boundary-0 Value
Range[0 - 4095]
boundary1 Boundary-1 Value
Range[0 - 4095]
Returns
None
Description:
Programs the boundaries with boundary0 and boundary1 for result comparison.

These two boundaries can serve as absolute boundaries. They define a range against which the result of a conversion can be compared. In the fast compare mode, the two boundaries provide hysteresis capability to a compare value. In any case, these boundary values entered here form a boundary pallete. There are dedicated upper and lower boundary registers GLOBBOUND0 and GLOBBOUND1 who will derive their values from this palette.
Related APIs:
None
void XMC_VADC_GLOBAL_SetCompareValue | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_RESULT_SIZE_t | compare_val
 | ) |  |
Parameters
global_ptr Constant pointer to the VADC module
compare_val Compare value which the result of a conversion will be compared against.
Range[0x0 - 0X0FFF]
Returns
None
Description:
Set compare value in the global result register for fast compare mode.

The result of a conversion will directly be compared to the compare value entered as part of compare_val. The prerequisite is that the channel associated with this global register must select an ICLASS which has the conversion mode configured as fast compare mode. Call XMC_VADC_GLOBAL_GetCompareResult() after this API to
Related APIs:
None
void XMC_VADC_GLOBAL_SetIndividualBoundary | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_CHANNEL_BOUNDARY_t | selection,
 |  | const uint16_t | boundary_value
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module.
selection | The boundary value selected for boundary_value.
boundary_value Boundary Value
Range[0 - 4095]
Returns
None
Description:
Programs either the boundary 0 or boundary 1 for result comparison.

This defines a range against which the result of a conversion can be compared. In the fast compare mode, the two boundaries provide hysteresis capability to a compare value.
Related APIs:
None
void XMC_VADC_GLOBAL_SetResultEventInterruptNode | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | XMC_VADC_SR_t | sr
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module
sr | The service request to which the global result event is connected. Refer XMC_VADC_SR_t enum
Returns
None
Description:
Binds the global result event to one of the 4 shared service requests.

This API binds the global result event to one of the 4 module wide shared service requests .Sets GLOBEVNP register with the corresponding sr line.
Related APIs:
XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode()
void XMC_VADC_GLOBAL_StartupCalibration ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
None
Description:
Enables the startup calibration feature of the VADC module.

It configures the SUCAL bit of GLOBCFG register to enable the startup calibration feature. After turning it on, it loops until all active groups finish calibration. Call XMC_VADC_GLOBAL_Enable() and XMC_VADC_GLOBAL_ClockInit() before calling this API in sequence. Calling the API XMC_VADC_GLOBAL_DisableStartupCalibration() can disable the calibration feature at runtime.
Related APIs:
XMC_VADC_GLOBAL_Enable()
XMC_VADC_GLOBAL_ClockInit()
None
void XMC_VADC_GLOBAL_TriggerEvent | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | event_type
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module
event_type | Desired event that must be manually asserted Use the enum XMC_VADC_GLOBAL_EVENT_t to create a mask to be used with this argument
Returns
None
Description:
Manually asserts an event that can lead to an interrupt.

This API manually asserts the requested event (Background request source event or a global result event) by setting the GLOBEVFLAG register with the specified event_type.
Related APIs:
None
void XMC_VADC_GROUP_AddResultToFifo | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Register which is required to be a part of results FIFO
Range: [0x0 to 0xF]
Returns
None
Description:
Adds result register to Result FIFO.

Sometimes, the rate of consumption of results by application software may not match the rate at which the results are produced. A Result FIFO thus helps a slow consumer to read out results without loss of data. When a result register is added to fifo, it is in fact chained to its higher numbered neighbor. For example, if Result Register-5 is to be added to FIFO, it gets chained to Result Register-6. Results are written to Register-6 while the same can be read out of Register-5 leisurely by software. A call to this API would configure the register bit field GxRCR.FEN.
Note:
The FIFO is always read by the software with the lowest numbered result register. The hardware will write the results from the highest numbered result register.
Related APIs:
None.
void XMC_VADC_GROUP_BackgroundDisableArbitrationSlot ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group which may receive a conversion request from background request source
Returns
None
Description:
Disables arbitration slot of the Background request source.

If the Background request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the Background channel can only be converted when the arbiter comes to the Background slot.A call to this API will lead to all conversions request by Background to be blocked. A call to this API would configure the register bit field GxARBPR.ASEN2
Related APIs:
XMC_VADC_GROUP_BackgroundEnableArbitrationSlot()
void XMC_VADC_GROUP_BackgroundEnableArbitrationSlot ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group which may receive a conversion request from background request source
Returns
None
Description:
Enables arbitration slot of the Background request source.

If the Background request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the Background channel can only be converted when the arbiter comes to the Background slot. Thus this must be enabled if any conversion need to take place. A call to this API would configure the register bit field GxARBPR.ASEN2.
Related APIs:
XMC_VADC_GROUP_BackgroundDisableArbitrationSlot()
void XMC_VADC_GROUP_ChannelClearEvent | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num Channel whose channel event is to be acknowledged
Range: [0x0 to 0x7]
Returns
None
Description:
Acknowledges a Channel event.

When a channel event is raised after the conversion of that channel, it has to be cleared. This API would clear the Channel event of a particular channel if it has occurred. A call to this API would configure the register bit fields of GxCEFCLR.
Related APIs:
XMC_VADC_GROUP_ChannelTriggerEvent().
uint32_t XMC_VADC_GROUP_ChannelGetAssertedEvents ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
uint32_t returns the asserted channel events
Description:
Returns the Channel event flag register.

The return is merely the channel events which are asserted. A call to this API would read the register bit fields of GxCEFLAG.
Related APIs:
XMC_VADC_GROUP_ChannelClearEvent().
XMC_VADC_CHANNEL_CONV_t XMC_VADC_GROUP_ChannelGetInputClass | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num Channel whose result alignment is to be returned
Range: [0x0 to 0x7]
Returns
XMC_VADC_CHANNEL_CONV_t Returns the configured input class for the ch_num
Description:
Returns the channel's input class for conversion for the required channel.

The sampling time and resolution can be taken from any of the 4 possible Input class registers. This API would return the input class register that is taken up by ch_num for conversion. A call to this API would read the register bit field GxCHCTR.RESPOS.
Related APIs:
XMC_VADC_GROUP_ChannelSetIclass().
XMC_VADC_RESULT_ALIGN_t XMC_VADC_GROUP_ChannelGetResultAlignment | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num Channel whose result alignment is to be returned
Range: [0x0 to 0x7]
Returns
XMC_VADC_RESULT_ALIGN_LEFT if the result are aligned to the left XMC_VADC_RESULT_ALIGN_RIGHT if the result are aligned to the right
Description:
Returns the channel result alignment.

The results are aligned either to the left or to the right. A left aligned 10bit resolution has its LSB at bit2 where as a left aligned 8bit resolution starts at bit4. A call to this API would return the currently configured alignment value. A call to this API would read the register bit field GxCHCTR.RESPOS.
Related APIs:
None.
uint8_t XMC_VADC_GROUP_ChannelGetResultRegister | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num Channel whose associated result register is to be found
Range: [0x0 to 0x7]
Returns
uint8_t returns the Group result register to which it is linked to.
Range: [0x0 to 0xF]
Description:
Returns the result register associated with this channel.

There are upto 16 result registers which a channel can choose from to store the results of conversion. This returns only the group related result registers. A call to this API would access the register bit field GxCHCTR.RESREG.
Related APIs:
None.
void XMC_VADC_GROUP_ChannelInit | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | const XMC_VADC_CHANNEL_CONFIG_t * | config
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num The channel being initialized
Range: [0x0 to 0x7]
config | Pointer to initialization data
Returns
None
Description:
Initializes the ADC channel for conversion.

This API will do the channel related initializations. This includes configuration of the CHCTR settings and boundary flag settings. This must be called in the application in order to enable the conversion of a channel. After a request source has been initialized this API has to be called for each channel that has to be converted. A call to this API would configure the registers GxCHCTR GxBFL GxALIAS GxCHASS GxBFLC(depending on device) in order to configure the channel.
Related APIs:
None.
bool XMC_VADC_GROUP_ChannelIsResultOutOfBounds | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num Channel whose input was converted
Range: [0x0 to 0x7]
Returns
bool Returns true if there was violation w.r.t the specified boundaries.
Description:
Determines if the result of the channel confines with the specified boundaries.

An application may not necessarily always need to know the exact value of the converted result, but merely an indication if the generated result is within stipulated boundaries. Generation of Channel event can be subject to channel event generation criteria (Generate always, Never generate, Generate if result is out of bounds, Generate if result is within bounds). When interrupts are not enabled, this API can be used to determine the nature of the result. A call to this API would access the registers GxCHCTR and GxCEFLAG in order to determine if a violation has occured.
Related APIs:
None
void XMC_VADC_GROUP_ChannelSetBoundarySelection | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | XMC_VADC_BOUNDARY_SELECT_t | boundary_sel,
 |  | XMC_VADC_CHANNEL_BOUNDARY_t | selection
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num Channel whose channel event is being configured
Range: [0x0 to 0x7]
boundary_sel | Select the upper/lower boundary configuration .
selection | The boundary value selected for boundary_sel.
Returns
None
Description:
Configure the boundary selection for the given channel

The channel event can be generated under the following conditions - Always, Never, Result Out of bounds and Result inside the boundaries. The boundary values to which results are compared can be selected from several sources. A call to this API would configure the register bit field GxCHCTR.BNDSELL or GxCHCTR.BNDSELU .
Related APIs:
None.
void XMC_VADC_GROUP_ChannelSetEventInterruptNode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | const XMC_VADC_SR_t | sr
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num Channel whose channel event is to be connected to a service request line
Range: [0x0 to 0x7]
sr | The service request line to which the channel event is to be connected
Returns
None
Description:
Binds a channel event to a requested Service Request line.

The channel event is connected to a service request line. For an event to result in an interrupt, this service request line must be enabled in VADC and the NVIC node which this service request line is connected to must have interrupt generation enabled. A call to this API would configure the register bit fields of GxCEVNP0.
Related APIs:
XMC_VADC_GROUP_ChannelTriggerEvent()
XMC_VADC_GROUP_ChannelClearEvent()
void XMC_VADC_GROUP_ChannelSetIclass | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | const XMC_VADC_CHANNEL_CONV_t | conversion_class
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num Channel whose conversion class is to be configured
Range: [0x0 to 0x7]
conversion_class | conversion property to be associated with this channel
Returns
None
Description:
Selects the conversion class registers.

It configures the channel to have a particular conversion class properties like sampling time and resolution. A call to this API would configure the register bit field GxCHCTR.ICLSEL.
Related APIs:
XMC_VADC_GROUP_ChannelGetInputClass().
void XMC_VADC_GROUP_ChannelSetInputReference | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | const XMC_VADC_CHANNEL_REF_t | ref
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num Channel whose input is to be converted
Range: [0x0 to 0x7]
ref | Reference voltage
Returns
None
Description:
Selects the reference voltage for conversion.

An internal voltage reference (VARef) or an external voltage reference fed to Ch-0 can serve as a voltage reference for conversions. A call to this API would configure the register bit field GxCHCTR.REFSEL.
Related APIs:
None.
void XMC_VADC_GROUP_ChannelSetResultRegister | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | const uint32_t | result_reg_num
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num Channel whose i/p is to be converted
Range: [0x0 to 0x7]
result_reg_num | Result Register associated with this channel
Returns
None
Description:
Selects the target result register.

There are upto 16 result registers which a channel can choose from to store the results of conversion. This selects only the group related result registers. A call to this API would configure the register bit field GxCHCTR.RESREG.
Related APIs:
None.
void XMC_VADC_GROUP_ChannelTriggerEvent | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num Channel whose channel event is to be asserted
Range: [0x0 to 0x7]
Returns
None
Description:
Manually asserts a Channel event.

It is merely the channel event which is asserted. For this asserted event to lead to an interrupt, it must have been bound to an SR and that SR must have been enabled. It can potentially lead to an interrupt if the SR line is connected to an NVIC node. A call to this API would configure the register bit fields of GxCEFLAG.
Related APIs:
XMC_VADC_GROUP_ChannelClearEvent().
void XMC_VADC_GROUP_ChannelTriggerEventGenCriteria | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | const XMC_VADC_CHANNEL_EVGEN_t | criteria
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num Channel whose channel event is being configured
Range: [0x0 to 0x7]
criteria | The condition under which the channel may assert its channel event
Returns
None
Description:
Defines the conditions under which a channel may assert its channel event.

The channel event can be generated under the following conditions - Always, Never, Result Out of bounds and Result inside the boundaries. A call to this API would configure the register bit field GxCHCTR.CHEVMODE.
Related APIs:
XMC_VADC_GROUP_ChannelTriggerEvent()
XMC_VADC_GROUP_ChannelClearEvent()
XMC_VADC_GROUP_ChannelSetEventInterruptNode()
void XMC_VADC_GROUP_CheckSlaveReadiness | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | uint32_t | slave_group
 | ) |  |
Parameters
group_ptr Pointer to the master VADC Group
slave_group The slave VADC Group number
Range: [0x0 to 0x3]
Returns
None
Description:
Configures the ready signal for master group.

This API would read the slave_group number and determine which EVAL configuration to apply for the given master slave set. Checks the readiness of slaves in synchronized conversions. Conversion of identically numbered channels across groups can be synchronized. For example, when the trigger to convert CH-1 of Group-2 is received, it is possible to simultaneously request conversion of CH-1 of Group-0 and Group-3. Group-2 in this example is therefore the master group while Groups-0 and 3 are the slave groups. Before the master can request its slaves for synchronized conversion, it has the option of checking the readiness of the slaves.
Related APIs:
XMC_VADC_GROUP_IgnoreSlaveReadiness()
XMC_VADC_GROUP_SetSyncMaster()
void XMC_VADC_GROUP_ClearResultEvent | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register for which the result event is being acknowledged
Range: [0x0 to 0xF]
Returns
None
Description:
Acknowledges a Result event.

When a Result event is raised after the conversion of that associated channel has produced a result and it has to be cleared. This API would clear the Channel event of a particular channel if it has occurred. A call to this API would access the register bit fields of GxREFCLR.
Related APIs:
XMC_VADC_GROUP_ChannelTriggerEvent().
void XMC_VADC_GROUP_DisableChannelSyncRequest | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr | Pointer to the master VADC Group
ch_num | Channel whose conversion triggers conversion in slave groups
Returns
None
Description:
Disable the synchronization request for the particular channel specified as ch_num. To enable the synchronization call the API XMC_VADC_GROUP_EnableChannelSyncRequest().
Related APIs:
None
void XMC_VADC_GROUP_DisableResultEvent | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register for which event generation is to be disabled
Range: [0x0 to 0xF]
Returns
None
Description:
Disable result event generation.

This would just disable the event. It would not alter anything w.r.t the SR line if it was configured. A call to this API would configure the register bit field GxRCR.SRGEN.
Related APIs:
XMC_VADC_GROUP_EnableResultEvent().
void XMC_VADC_GROUP_EnableChannelSyncRequest | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr | Constant pointer to the master VADC Group
ch_num | Channel whose conversion triggers conversion in slave groups
Returns
None
Description:
Sets up a channel for synchronized conversion.

Conversion of identically numbered channels across groups can be synchronized. For example, when the trigger to convert CH-1 of Group-2 is received, it is possible to simultaneously request conversion of CH-1 of Group-0 and Group-3. Group-2 in this example is therefore the master group while Groups-0 and 3 are the slave groups.
Before the master can request its slaves for synchronized conversion, it has the option of checking the readiness of the slaves.
Related APIs:
None
void XMC_VADC_GROUP_EnableResultEvent | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register for which event generation is to be enabled
Range: [0x0 to 0xF]
Returns
None
Description:
Enables result event generation.

Once the results of conversion are available, the result event (which is being enabled in this function) if connected to a service request line(Group or Shared service request) can lead to an interrupt. It is therefore not only necessary to enable the event, but also to connect it to a service request line. The service request generation capability must also be enabled and so should the corresponding NVIC node. A call to this API would configure the register bit field GxRCR.SRGEN.
Related APIs:
XMC_VADC_GROUP_SetResultInterruptNode().
void XMC_VADC_GROUP_ExternalMuxControlInit | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_GROUP_EMUXCFG_t | emux_cfg
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
emux_cfg | EMUX configuration structure
Returns
None
Description:
Configures group EMUX parameters associated with the emux_cfg configuration structure.

An external emux interface allows additional channels to be connected to a VADC group. The conversion properties of such channels can be different from the standard channels which are directly connected to the VADC group. This API configures conversion properties of channels connected via EMUX interface.
Related APIs:
None
uint32_t XMC_VADC_GROUP_GetAlias ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
uint32_t The complete GxALIAS register
Description:
Returns the ALIAS values.
The ALIAS value that is configured for Channel-0 and channel-1 are returned.
Related APIs:
None.
uint32_t XMC_VADC_GROUP_GetAssertedResultEvents ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
uint32_t returns the asserted result events
Description:
Returns the Result event flag register.

The return is merely the result events which are asserted. A call to this API would read the register bit fields of GxREFLAG.
Related APIs:
XMC_VADC_GROUP_TriggerResultEvent().
uint32_t XMC_VADC_GROUP_GetDetailedResult | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register from which the result of conversion is to be read out
Range: [0x0 to 0xF]
Returns
uint32_t returns the complete result register GxRESy.
Description:
Returns the result register completely (result of conversion as well as other info).

The Result register will have information regarding the channel that is requesting the conversion, if the result is valid, if the fast compare bit, Data Reduction Counter, and the request source information. All these information will be returned back. And if the user is polling for the result he can use the result if the valid bit is set. A call to this API would return the complete register GxRES.
Related APIs:
XMC_VADC_GROUP_GetResult().
XMC_VADC_FAST_COMPARE_t XMC_VADC_GROUP_GetFastCompareResult | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register for which the compare value is being set
Range: [0x0 to 0xF]
Returns
XMC_VADC_FAST_COMPARE_t If the input is greater or lower than the compare value returns the appropriate enum. if the valid flag was not set then it would return XMC_VADC_FAST_COMPARE_UNKNOWN.
Description:
Determines the input is greater/lower than the compare value.

This API determines if the input is greater/lower than the preset compare value. A call to this API would access the register bit field GxRES.FCM.
Related APIs:
XMC_VADC_GROUP_SetResultFastCompareValue().
XMC_VADC_GROUP_CLASS_t XMC_VADC_GROUP_GetInputClass | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_CHANNEL_CONV_t | conv_class
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
conv_class | conversion property to be extracted
Returns
XMC_VADC_GROUP_CLASS_t The complete GxICLASSy register
Description:
Returns the input class configuration values.
This returns the sampling time configuration and resolution configured in the appropriate group input class conv_class. A call to this API would return the register GxICLASSy.
Related APIs:
None.
XMC_VADC_RESULT_SIZE_t XMC_VADC_GROUP_GetResult | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register from which the result of conversion is to be read out
Range: [0x0 to 0xF]
Returns
XMC_VADC_RESULT_SIZE_t Result register values.
Range:0x0 to 0xFFF
Description:
Returns the result of the conversion.

This API will only return the result of the conversion and will strip out the other information that is present in the result register. A call to this API would access the register bit field GxRES.RESULT.
Related APIs:
XMC_VADC_GROUP_GetDetailedResult().
uint32_t XMC_VADC_GROUP_GetResultFifoHead | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register which forms a part of fifo
Range: [0x0 to 0xF]
Returns
uint32_t returns the Result register number which is the head of the FIFO,res_reg is apart of this FIFO.
Description:
Returns the the FIFO head (register to which the results are written by H/W).

The analog converter writes to the head of the FIFO. It is the head of the FIFO which is bound to the channel. Applications read the result from the tail of the FIFO. This API would just return the head of the FIFO from where the results are being added to the FIFO. A call to this API would access the register bit field GxRCR.FEN.
Related APIs:
XMC_VADC_GROUP_GetResultFifoHead()
uint32_t XMC_VADC_GROUP_GetResultFifoTail | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register which forms a part of FIFO
Range: [0x0 to 0xF]
Returns
uint32_t returns the Result register number which is the tail of the FIFO,res_reg is apart of this FIFO.
Description:
Returns the the FIFO tail (register from where to read the results).

The analog converter writes to the head of the FIFO. It is the head of the FIFO which is bound to the channel. Applications read the result from the tail of the FIFO. This API would return the result register from where a user can call the API XMC_VADC_GROUP_GetResult() to read the result stored in the FIFO. A call to this API would access the register bit field GxRCR.FEN.
Related APIs:
XMC_VADC_GROUP_GetResultFifoHead()
uint32_t XMC_VADC_GROUP_GetSyncReadySignal ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant Pointer to the VADC Group
Returns
uint32_t EVAL bits for the group
Description:
Get the Eval bits of the group.

For Synchronized conversion the master's ready signal configuration must be copied onto the slaves. A call to this API would return the Sync EVAL Bits (GxSYNCTR.EVALy) which can be used to set in the slaves.
Related APIs:
XMC_VADC_GROUP_CheckSlaveReadiness()
XMC_VADC_GROUP_IgnoreSlaveReadiness()
void XMC_VADC_GROUP_IgnoreSlaveReadiness | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | uint32_t | slave_group
 | ) |  |
Parameters
group_ptr | Constant Pointer to the master VADC Group
slave_group | The slave VADC Group number
Returns
None
Description:
Clears the ready signal for master group.

Ignores the readiness of slaves in synchronized conversions.This API would read the slave_group number and determine which EVAL configuration to apply for the given master slave set. Then clears the configuration if present. This API is called when the master should issue the conversion request without waiting for the slave to assert a ready signal. The ready signal is asserted by the slave group(s) when the conversion is completed in these channels.
Related APIs:
XMC_VADC_GROUP_CheckSlaveReadiness()
XMC_VADC_GROUP_SetSyncMaster()
void XMC_VADC_GROUP_Init | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_GROUP_CONFIG_t * | config
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group.
config | Pointer to the initialization data structure
Returns
None
Description:
Initializes the VADC group module with the associated configuration structure pointed by config.

It initializes the group specified as part of the group_ptr. It initializes group conversion class, arbiter configuration , boundary configuration by setting GxICLASS,GxARBCFG,GxBOUND, registers. It also configures the EMUX control register if applicable. Refer related API's to change the configurations later in the program.
Related APIs:
XMC_VADC_GROUP_InputClassInit()
XMC_VADC_GROUP_SetPowerMode()
XMC_VADC_GROUP_SetBoundaries()
XMC_VADC_GROUP_ExternalMuxControlInit()
void XMC_VADC_GROUP_InputClassInit | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_GROUP_CLASS_t | config,
 |  | const XMC_VADC_GROUP_CONV_t | conv_type,
 |  | const uint32_t | set_num
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group.
config | group related conversion class parameter structure
conv_type | Use direct channels or EMUX channels. Refer XMC_VADC_GROUP_CONV_t enum
set_num Conversion class set
Range[0x0, 0x1]
Returns
None
Description:
Sets up the conversion settings for vadc group resource associated with config structure. It configures the conversion class properties like sampling time and resolution for selected conv_type channels. It initializes the G_ICLASS register specified by set_num with the required settings.
Related APIs:
XMC_VADC_GROUP_Init()
XMC_VADC_GROUP_STATE_t XMC_VADC_GROUP_IsConverterBusy ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group.
Returns
retuns IDLE if converter is free else returns busy. Refer XMC_VADC_GROUP_STATE_t enum
Description:
Checks the live status of the analog to digital converter. The converter can either idle doing nothing or busy sampling + converting.
Related APIs:
None
bool XMC_VADC_GROUP_IsResultRegisterFifoHead | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register in question
Range: [0x0 to 0xF]
Returns
bool returns true if the res_reg is the FIFO head.
Description:
Determines if the requested register is the head of a FIFO.

The analog converter writes to the head of the FIFO. It is the head of the FIFO which is bound to the channel. Applications read the result from the tail of the FIFO. A call to this API would access the register bit field GxRCR.FEN.
Related APIs:
XMC_VADC_GROUP_GetResultFifoHead()
bool XMC_VADC_GROUP_IsResultRegisterInFifo | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register number

Range: [0x0 to 0xF]
Returns
bool returns true if the res_reg is the FIFO member, else false.
Description:
Determines whether the specified register is a FIFO member or not.

The analog converter writes to the head of the FIFO. It is the head of the FIFO which is bound to the channel. Applications read the result from the tail of the FIFO. A call to this API would access the register bit field GxRCR.FEN.
void XMC_VADC_GROUP_QueueAbortSequence ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Aborts an ongoing conversion by flushing the queue.

This API will flush the queue buffer. Ongoing conversion of the Queue request source will not be effected by this API. This would clear all the contents that are present in the queue buffer. A call to this API would configure the registers GxQCTRL0, GxQMR0, GxARBPR in order to abort the queue sequence.
Related APIs:
XMC_VADC_GROUP_QueueRemoveChannel()
XMC_VADC_GROUP_QueueFlushEntries()
void XMC_VADC_GROUP_QueueClearReqSrcEvent ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Acknowledges the conversion complete request source event.

This API will clear the request source event that occurred. This will clear a interrupt if it was raised. A call to this API would configure the register bit field GxSEFCLR.SEV0.
Related APIs:
XMC_VADC_GROUP_QueueTriggerReqSrcEvent()
void XMC_VADC_GROUP_QueueDisableArbitrationSlot ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Disables arbitration slot of the queue request source.

If the QUEUE request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the queue channel can only be converted when the arbiter comes to the queue slot.A call to this API will lead to all conversions request by queue to be blocked. A call to this API would configure the register bit field GxARBPR.ASEN0.
Related APIs:
XMC_VADC_GROUP_QueueEnableArbitrationSlot()
void XMC_VADC_GROUP_QueueDisableExternalTrigger ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Disables the trigger for queue request source.
By using this API the trigger will be deactivated for the queue request source. This will just deactivate the H/W trigger for the queue request source. If any configuration was done to select the trigger input in GxQCTRL0 will be not be effected. A call to this API would configure the register bit field GxQMR0.ENTR
Related APIs:
XMC_VADC_GROUP_QueueEnableExternalTrigger()
void XMC_VADC_GROUP_QueueEnableArbitrationSlot ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Enables arbitration slot of the queue request source.

If the QUEUE request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the queue channel can only be converted when the arbiter comes to the queue slot. Thus this must be enabled if any conversion need to take place. A call to this API would configure the register bit field GxARBPR.ASEN0.
Related APIs:
XMC_VADC_GROUP_QueueDisableArbitrationSlot()
void XMC_VADC_GROUP_QueueEnableExternalTrigger ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Enables the trigger for queue request source.

By using this API the trigger will be activated for the queue request source. The trigger signal and trigger edge will be selected from the QCTRL register. The Selection of a input will be done by XMC_VADC_GROUP_QueueSelectTrigger(). A call to this API would configure the register bit field GxQMR0.ENTR
Related APIs:
XMC_VADC_GROUP_QueueSelectTrigger()
XMC_VADC_GROUP_QueueDisableExternalTrigger()
void XMC_VADC_GROUP_QueueFlushEntries ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Flushing the queue Entry.

This API will flush one entry in the queue buffer. Ongoing conversion of the Queue request source will not be effected by this API. This would clear all the contents that are present in the queue buffer. A call to this API would configure the registers GxQMR0. This is a Blocking API, i.e will only exit when all the entries are removed from the queue.
Related APIs:
XMC_VADC_GROUP_QueueRemoveChannel()
XMC_VADC_GROUP_QueueAbortSequence(0
int32_t XMC_VADC_GROUP_QueueGetInterruptedChannel ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
int32_t Returns -1 if there is no channel that have been interrupted. Else would return the channel that is interrupted.
Range: [0x0 to 0x8]
Description:
Identifies the channel whose conversion was suspended.

When using cancel inject repeat mode the canceled conversion will be placed in the backup register. This API will return the valid queue channel number from the backup register. This happens when ever there is a high priority conversion interrupts the conversion of queue request source. This forces the channel to goto the backup register. A call to this API would access the register GxQBUR0 to determine the interrupted channel.
Related APIs:
None.
uint32_t XMC_VADC_GROUP_QueueGetLength ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
uint32_t returns the total number of channels.
Range: [0x0 to 0x8]
Description:
Returns the number of channels present in the queue.

This API will return the queue buffer size. This buffer will be consisting of valid queue entries which will be converted when a trigger event occurs. All the entries that are loaded onto the GxQINR0 will be added to the queue buffer. Hence if an application needs to get the number of valid queue entries this API would provide the interface. A call to this API would access the registers GxQBUR0, GxQSR0 in order to determine the queue length.
Related APIs:
XMC_VADC_GROUP_QueueInsertChannel()
int32_t XMC_VADC_GROUP_QueueGetNextChannel ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
int32_t Returns -1 if there are no channels for conversion Else would return the next valid channel for conversion.
Range: [0x0 to 0x8]
Description:
Returns the next entry in the queue request source for conversion.

Identifies the channel in the queue lined up for conversion next. API will return a valid queue entry from the queue buffer. First checks for the valid channel entry in the backup register and returns if present. If the valid entry has not been found in the backup register then the queue buffer is searched for a valid entry. A call to this API would access the registers GxQ0R0, GxQBUR0 to determine the next channel.
Related APIs:
XMC_VADC_GROUP_QueueRemoveChannel()
XMC_VADC_GROUP_QueueInsertChannel()
bool XMC_VADC_GROUP_QueueGetReqSrcEventStatus ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
bool returns true if the service request event is raised. returns false if the service request event was not raised.
Description:
Determines if the request source event is asserted.
This API will get the status of the queue request source event. Will return a true if the event has occurred for queue. A call to this API would acces the register bit field GxSEFLAG.SEV0.
Related APIs:
None.
void XMC_VADC_GROUP_QueueInit | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_QUEUE_CONFIG_t * | config
 | ) |  |
Parameters
group_ptr | Pointer to the VADC group
config | Pointer to initialization data structure
Returns
None
Description:
Initializes VADC QUEUE functional block.

The QUEUE request source functional block converts channels stored in a queue. The first channel entered into the queue is converted first. A channel once converted, can be placed back into the queue if desired(refill). A call to this API will first disable the arbitration slot for queue (XMC_VADC_GROUP_QueueEnableArbitrationSlot()) and then it would configure all the related registers with the required configuration values. The arbitration slot is re-enabled at the end of init by invoking XMC_VADC_GROUP_QueueDisableArbitrationSlot(). A call to this API would configure the registers GxARBPR, GxQCTRL0, GxQMR0 to configure the queue request source.
Related APIs:
XMC_VADC_GROUP_QueueEnableArbitrationSlot()
XMC_VADC_GROUP_QueueDisableArbitrationSlot()
XMC_VADC_GROUP_QueueSelectTrigger()
XMC_VADC_GROUP_QueueSelectGating()
void XMC_VADC_GROUP_QueueInsertChannel | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_QUEUE_ENTRY_t | entry
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
entry | Details of the node being added
Returns
None
Description:
Inserts a queue entry to the tail of the queue buffer.

This API will insert a new channel into the queue buffer. The Queue will start conversion of the channels from the head of the buffer. This Insert will place the entry after the last valid entry. If no valid entries are present then this API will place the Queue entry at the head of the buffer. Then the successive call to the insert will place the new entry after the last entry. A call to this API would configure the register GxQINR0 for a single queue entry.
Related APIs:
XMC_VADC_GROUP_QueueRemoveChannel()
bool XMC_VADC_GROUP_QueueIsArbitrationSlotEnabled ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
bool returns true if the arbitration is enabled else returns false.
Description:
Returns the arbitration status of the queue request source.

If the queue request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the queue channel can only be converted when the arbiter comes to the queue slot. A call to this API would return the status of the arbitration slot of queue. A call to this API would read the register bit field GxARBPR.ASEN1.
Related APIs:
XMC_VADC_GROUP_QueueEnableArbitrationSlot(),
XMC_VADC_GROUP_QueueDisableArbitrationSlot()
void XMC_VADC_GROUP_QueueRemoveChannel ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Clears the next valid channel in the queue buffer.

A queue entry lined up for conversion can be removed and replaced by its successor. The call to this API will first check if a valid queue entry is present in the queue backup register if present would clear its valid flag. If no valid queue entries are present in the backup then the first channel present in the queue buffer would be cleared. A call to this API would configure the registers GxQCTRL0, GxQMR0, GxARBPR in order to clear a channel from the queue.
Related APIs:
XMC_VADC_GROUP_QueueInsertChannel()
void XMC_VADC_GROUP_QueueSelectGating | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_GATE_INPUT_SELECT_t | input_num
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
input_num | Choice of the input earmarked as the gating line
Returns
None
Description:
Select Gating signal for queue request source.

Passage of the trigger input to the request source can be controlled via a gating signal. Any one of the 16 input lines can be chosen as a gating signal. Trigger signal can be given to the queue request source only when the gating signal's active level is detected. Additionally the GxQMR0.ENGT has to be configured for the gating signal's active level. A call to this API would configure the register bit field GxQCTRL0.GTSEL.
Related APIs:
XMC_VADC_GROUP_QueueSelectTrigger()
void XMC_VADC_GROUP_QueueSelectTrigger | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_TRIGGER_INPUT_SELECT_t | input_num
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
input_num | Choice of the input earmarked as a trigger line
Returns
None
Description:
Select Trigger signal for queue request source.

A queue request source will raise conversion request only if there were either a request from application or occurrence of a hardware trigger. This API selects one of the 16 input lines as a trigger line. This is needed when a hardware trigger is needed for the conversion of the queue request source. Refer to the reference manual to determine the signal that needs to be connected. A call to this API would configure the register bit field GxQCTRL0.XTSEL.
Related APIs:
XMC_VADC_GROUP_QueueSelectGating()
XMC_VADC_GROUP_QueueEnableExternalTrigger()
void XMC_VADC_GROUP_QueueSelectTriggerEdge | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_TRIGGER_EDGE_t | trigger_edge
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
trigger_edge | Choice of the trigger edge
Returns
None
Description:
Select Trigger signal edge for queue request source.

A queue request source will raise conversion request only if there were either a request from application or occurrence of a hardware trigger. This API selects one of the 4 trigger edges. This is needed when a hardware trigger is needed for the conversion of the queue request source. Refer to the reference manual to determine the signal that needs to be connected. A call to this API would configure the register bit field GxQCTRL0.XTMODE.
Related APIs:
XMC_VADC_GROUP_QueueSelectGating()
XMC_VADC_GROUP_QueueEnableExternalTrigger()
void XMC_VADC_GROUP_QueueSetGatingMode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | XMC_VADC_GATEMODE_t | mode_sel
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
mode_sel | Select how the gating is applied to the queue request source
Returns
None

Details of function
Selects the gating mode of queue request source.

Passage of the trigger input to the request source can be controlled via a gating signal. This API determines how the gating signal behaves, either active low or active high. If gating signal needs to ignored XMC_VADC_GATEMODE_IGNORE should be used as the mode_sel. A call to this API would configure the register bit field GxQMR0.ENGT.

Related APIs:
XMC_VADC_GROUP_QueueSelectGating();
void XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_SR_t | sr
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
sr | The service request line (Common SR lines, Group specific SR lines)
Returns
None
Description:
Connects the event to the SR line of VADC.

This API will connect a Service Request line(SR) to a queue request source event. Hence to get a interrupt on this Service request line one has to enable the required NVIC node. A call to this API would configure the register bit field GxSEVNP.SEVNP0.
Related APIs:
None.
void XMC_VADC_GROUP_QueueTriggerConversion ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Generates conversion request (Software initiated conversion).
A conversion request can be raised either upon detection of a hardware trigger, or by software. This API forces the queue unit to generate a conversion request to the analog converter. It is assumed that the queue has already been filled up with entries. A call to this API would configure the register bit field GxQMR0.TREV.
Note:
The conversion of queue entry will start immediately after the entry has been loaded into GxQINR0. This happens only if the queue entry has been loaded into the register without the need for the H/W trigger.
If a H/W Trigger is selected while loading the entry, the conversion will occur in one of the 2 ways:
  • The H/W generates a trigger needed for the queue request source.
  • The Conversion is triggered manually by calling this API.
Related APIs:
XMC_VADC_GROUP_QueueInsertChannel()
void XMC_VADC_GROUP_QueueTriggerReqSrcEvent ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Manually asserts the conversion complete request source event.

This API will set the request source event for queue. This will trigger a interrupt if the service node pointer for the scan has been configured. A call to this API would configure the register bit field GxSEFLAG.SEV0.
Related APIs:
XMC_VADC_GROUP_QueueClearReqSrcEvent()
void XMC_VADC_GROUP_ResultInit | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg_num,
 |  | const XMC_VADC_RESULT_CONFIG_t * | config
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
res_reg_num Result register which is intended to be initialized
Range: [0x0 to 0xF]
config | Pointer to initialization data
Returns
None
Description:
Initializes a Group Result Register.
Various options needed for the working of the result result will be configured with this API. This would determine the result handling of the group registers. This API must be called after the channel Init (XMC_VADC_GROUP_ChannelInit())to initialize the result register that is selected for the channel. This API would also determine if the result register that is being configured has to a part of a FIFO buffer. In this API one can also configure the various result handling options line FIR/IIR filters and it order. Also configures the Data reduction to accumulate 2/3/4 results need to be done. This API will also configure the result event generation. A call to this API would configure the register GxRCR with the config .
Related APIs:
XMC_VADC_GROUP_AddResultToFifo()
XMC_VADC_GROUP_EnableResultEvent()
XMC_VADC_GROUP_DisableResultEvent()
void XMC_VADC_GROUP_ScanAddChannelToSequence | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num The channel meant to be added to scan sequence
Range: [0x0 to 0x7]
Returns
None
Description:
Adds a channel to the scan sequence.

Call this API to insert a new single channel into the scan request source. This will be added to the scan sequence. The added channel will be part of the conversion sequence when the next load event occurs. A call to this API would configure the register bit fields of GxASSEL.
Related APIs:
XMC_VADC_GROUP_ScanAddMultipleChannels()
void XMC_VADC_GROUP_ScanAddMultipleChannels | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_mask
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_mask Mask word indicating channels which form part of scan conversion sequence Bit location 0/1/2/3/4/5/6/7 represents channels-0/1/2/3/4/5/6/7 respectively. To Add the channel to the scan sequence enable the respective bit. Passing a 0x0 will clear all the selected channels
Range: [0x0 to 0xFF]
Returns
None
Description:
Adds multiple channels to the scan sequence.

Call this API to insert a multiple channels into the scan request source. This will be added to a scan sequence. The added channels will be a part of the conversion sequence when the next load event occurs. A call to this API would configure the register bit fields of GxASSEL.
Related APIs:
XMC_VADC_GROUP_ScanAddChannelToSequence()
void XMC_VADC_GROUP_ScanClearReqSrcEvent ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Acknowledges the scan conversion complete request source event.

This API will clear the request source event that occurred. This will clear a interrupt if it was raised. A call to this API would configure the register bit field GxSEFLAG.SEV1.
Related APIs:
XMC_VADC_GROUP_ScanTriggerReqSrcEvent()
void XMC_VADC_GROUP_ScanDisableArbitrationSlot ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Disables arbitration slot of the scan request source.

If the scan request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the scan channel can only be converted when the arbiter comes to the scan slot.A call to this API will lead to all conversions request by scan to be blocked. A call to this API would configure the register bit field GxARBPR.ASEN1.
Related APIs:
XMC_VADC_GROUP_ScanEnableArbitrationSlot()
void XMC_VADC_GROUP_ScanDisableContinuousMode ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Disables continuous conversion mode.

Typically for a scan request source to generate conversion request, either a hardware trigger or a software request is a pre-requisite. Using autoscan feature it is possible to start the conversion once and allow the sequence to repeat without any further triggers. Once all channels belonging to a scan request source have been converted, a request source completion event is generated. Generation of this event can restart the scan sequence. By invoking this feature the Autoscan mode of operations is disabled. A call to this API would configure the register bit field GxASMR.SCAN.
Related APIs:
XMC_VADC_GROUP_ScanEnableContinuousMode()
void XMC_VADC_GROUP_ScanDisableEvent ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Disables the scan request source event .
By using this API the request source event will be deactivated for the scan request source. Other configurations w.r.t service node pointer are not done in this API. A call to this API would configure the register bit field GxASMR.ENSI.
Related APIs:
XMC_VADC_GROUP_ScanEnableEvent(),
XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode()
void XMC_VADC_GROUP_ScanDisableExternalTrigger ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Disables the trigger for scan request source.
By using this API the trigger will be deactivated for the scan request source. This will just deactivate the H/W trigger for the scan request source. If any configuration were done to select the trigger input in GxASCTRL, it will be not be effected by this API. A call to this API would configure the register bit field GxASMR.ENTR.
Related APIs:
XMC_VADC_GROUP_ScanEnableExternalTrigger()
void XMC_VADC_GROUP_ScanEnableArbitrationSlot ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Enables arbitration slot of the scan request source.

If the scan request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the scan channel can only be converted when the arbiter comes to the scan slot. Thus this must be enabled if any conversion need to take place. A call to this API would configure the register bit field GxARBPR.ASEN1.
Related APIs:
XMC_VADC_GROUP_ScanDisableArbitrationSlot()
void XMC_VADC_GROUP_ScanEnableContinuousMode ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Enables continuous conversion mode.

Typically for a scan request source to generate conversion request, either a hardware trigger or a software request is a pre-requisite. Using autoscan feature it is possible to start the conversion once and allow the sequence to repeat without any further triggers. Once all channels belonging to a scan request source have been converted, a request source completion event is generated. Generation of this event can restart the scan sequence. Every request source event will cause a load event to occur. A call to this API would configure the register bit field GxASMR.SCAN.
Related APIs:
XMC_VADC_GROUP_ScanDisableContinuousMode()
void XMC_VADC_GROUP_ScanEnableEvent ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Enables the scan request source event .
By using this API the request source event will be activated for the scan request source. Other configurations w.r.t service node pointer are not done in this API. A call to this API would configure the register bit field GxASMR.ENSI.
Related APIs:
XMC_VADC_GROUP_ScanDisableEvent(),
XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode()
void XMC_VADC_GROUP_ScanEnableExternalTrigger ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Enables the trigger for scan request source.

By using this API, the trigger signal will be activated for the scan request source. The trigger signal and trigger edge will be selected from the ASCTRL register. The Selection of a input will be done by XMC_VADC_GROUP_ScanSelectTrigger(). A call to this API would configure the register bit field GxASMR.ENTR.
Related APIs:
XMC_VADC_GROUP_ScanSelectTrigger()
XMC_VADC_GROUP_ScanDisableExternalTrigger()
uint32_t XMC_VADC_GROUP_ScanGetNumChannelsPending ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns

uint32_t Returns the total channels pending for conversion.
Range: [0x0 to 0x8]
Description:
Returns the total number of pending channels.

This API will read the pending channels register and will return the number of channels that are awaiting conversion. When a load event occurs the scan sequence is pushed to a pending conversion register. From the pending register the channels are taken up by the converter. When the API is called it would return the total number of channels pending (GxASPND).
Related APIs:
XMC_VADC_GROUP_ScanIsChannelPending()
bool XMC_VADC_GROUP_ScanGetReqSrcEventStatus ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
bool returns true if the service request event is raised. returns false if the service request event was not raised.
Description:
Determines if the request source event is asserted.
This API will get the status of the scan request source event. Will return a true if the event has occurred for scan. A call to this API would access the register bit field GxSEFLAG.SEV1.
Related APIs:
None.
void XMC_VADC_GROUP_ScanInit | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_SCAN_CONFIG_t * | config
 | ) |  |
Parameters
group_ptr | Pointer to the VADC group
config | Pointer to Scan configuration
Returns
None
Description:
Initializes the VADC SCAN functional block.

The GROUP SCAN request source functional block converts channels sequentially starting with the highest numbered channel to the lowest. Channels must register themselves as being part of the the scan sequence. A call to this API will first disable the arbitration slot for queue (XMC_VADC_GROUP_ScanEnableArbitrationSlot()) and then it would configure all the related registers with the required configuration values. The arbitration slot is re-enabled at the end of init by invoking XMC_VADC_GROUP_ScanDisableArbitrationSlot(). A call to this API would configure the registers GxARBPR, GxASCTRL, GxASMR needed scan request source.
Related APIs:
XMC_VADC_GROUP_ScanEnableArbitrationSlot()
XMC_VADC_GROUP_ScanDisableArbitrationSlot()
XMC_VADC_GROUP_ScanSelectTrigger()
XMC_VADC_GROUP_ScanSelectGating()
bool XMC_VADC_GROUP_ScanIsArbitrationSlotEnabled ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
bool returns true if the arbitration is enabled else returns false.
Description:
Returns the arbitration status of the scan request source.

If the scan request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the scan channel can only be converted when the arbiter comes to the scan slot. A call to this API would return the status of the arbitration slot of scan. A call to this API would read the register bit field GxARBPR.ASEN1.
Related APIs:
XMC_VADC_GROUP_ScanEnableArbitrationSlot(),
XMC_VADC_GROUP_ScanDisableArbitrationSlot()
bool XMC_VADC_GROUP_ScanIsChannelPending | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num The channel being audited for completion of conversion
Range: [0x0 to 0x7]
Returns
bool returns true if the channel is pending conversion else returns false
Description:
Determine if the channel is pending for conversion.

This API will check if the Channel in question is awaiting conversion in the current arbitration round. When a load event occurs the scan sequence is pushed to a pending conversion register. From the pending register the channels are taken up by the converter. This API would return true if the channel is found in the pending register (GxASPND).
Related APIs:
XMC_VADC_GROUP_ScanGetNumChannelsPending()
void XMC_VADC_GROUP_ScanRemoveChannel | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | channel_num
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
channel_num | channel number to be removed from the scan sequence.
Returns
None
Description:
Removes a channel from the scan sequence.
By using this API the it is possible to remove a single channel from the conversion sequence. The remaining channels will continue however they are. A call to this API would configure the register GxASSEL.
Related APIs:
None.
void XMC_VADC_GROUP_ScanSelectGating | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | XMC_VADC_GATE_INPUT_SELECT_t | gating_input
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
gating_input | Module input signal meant to be selected as gating input
Returns
None
Description:
Select Gating signal for scan request source.

Passage of the trigger input to the request source can be controlled via a gating signal. Any one of the 16 input lines can be chosen as a gating signal. Trigger signal can be given to the scan request source only when the gating signal's active level is detected. Additionally the GxASMR.ENGT has to be configured for the gating signal's active level. A call to this API would configure the register bit field GxASCTRL.GTSEL.
Related APIs:
XMC_VADC_GROUP_ScanSelectTrigger()
void XMC_VADC_GROUP_ScanSelectTrigger | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | XMC_VADC_TRIGGER_INPUT_SELECT_t | trigger_input
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
trigger_input | Choice of the input earmarked as a trigger line
Returns
None
Description:
Select Trigger signal for scan request source.

A scan request source will raise conversion request only if there were either a request from application or occurrence of a hardware trigger. This API selects one of the 16 input lines as a trigger line. This is needed when a hardware trigger is needed for the conversion of the scan request source. Refer to the reference manual to determine the signal that needs to be connected. A call to this API would configure the register bit field GxASCTRL.XTSEL.
Related APIs:
XMC_VADC_GROUP_ScanSelectGating()
XMC_VADC_GROUP_ScanEnableExternalTrigger()
void XMC_VADC_GROUP_ScanSelectTriggerEdge | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_TRIGGER_EDGE_t | trigger_edge
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
trigger_edge | Trigger edge selection
Returns
None
Description:
Selects the trigger edge for scan request source.

A scan request source will raise conversion request only if there were either a request from application or occurrence of a hardware trigger. This API selects one of the 4 possible trigger edges. This is needed when a hardware trigger is needed for the conversion of the scan request source. A call to this API would configure the register bit field GxASCTRL.XTMODE.
Related APIs:
XMC_VADC_GROUP_ScanSelectTrigger()
void XMC_VADC_GROUP_ScanSequenceAbort ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Aborts an ongoing scan sequence conversion.

An ongoing sequence can be aborted at any time. The scan unit picks the pending channels one by one from a pending register and requests for their conversion. This API essentially clears the channel pending register thus creating an illusion that there are no more channels left in the sequence. A call to this API would configure the registers GxASMR, GxASCTRL, GxARBPR to achieve the sequence abort.
Related APIs:
None.
void XMC_VADC_GROUP_ScanSetGatingMode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | XMC_VADC_GATEMODE_t | mode_sel
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
mode_sel | Select how the gating is applied to the scan request source
Returns
None
Description:
Selects the gating mode of scan request source.

Passage of the trigger input to the request source can be controlled via a gating signal. This API determines how the gating signal behaves, either active low or active high. If gating signal needs to ignored XMC_VADC_GATEMODE_IGNORE should be used as the mode_sel.
Related APIs:
XMC_VADC_GROUP_ScanSelectGating();
void XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_SR_t | sr
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
sr | Service Request Id
Returns
None
Description:
Connects the scan request source event to the SR line of VADC.

This API will connect a Service Request line(SR) to a scan request source event. Hence to get a interrupt on this Service request line one has to enable the required NVIC node. A call to this API would configure the register bit field GxSEVNP.SEV1NP .
Related APIs:
None.
void XMC_VADC_GROUP_ScanTriggerConversion ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Generates conversion request (Software initiated conversion).

A conversion request can be raised either upon detection of a hardware trigger, or by software. This API forces the scan unit to generate a conversion request to the analog converter. It is assumed that the scan has already been filled up with entries. A call to this API would configure the register bit field GxASMR.LDEV.
Related APIs:
None.
void XMC_VADC_GROUP_ScanTriggerReqSrcEvent ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Manually asserts the conversion complete request source event.

This API will set the request source event for scan. This will trigger a interrupt if the service node pointer for the scan has been configured. A call to this API would configure the register bit field GxSEFLAG.SEV1.
Related APIs:
None.
void XMC_VADC_GROUP_SetBoundaries | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | boundary0,
 |  | const uint32_t | boundary1
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group whose global boundary registers are to be programmed
boundary0 Boundary-0 Value
Range: [0x0 - 0x0FFF]
boundary1 Boundary-1 Value
Range: [0x0 - 0x0FFF]
Returns
None
Description:
Programs the boundaries with boundary0 and boundary1 for result comparison.

These two boundaries can serve as absolute boundaries. They defines a range against which the result of a conversion can be compared. In the fast compare mode, the two boundaries provide hysteresis capability to a compare value. In any case, these boundary values entered here form a boundary pallete. There are dedicated upper and lower boundary registers G_BOUND0 and G_BOUND1 who will derive their values from this palette.
Related APIs:
None
void XMC_VADC_GROUP_SetBoundaryEventInterruptNode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint8_t | boundary_flag_num,
 |  | const XMC_VADC_BOUNDARY_NODE_t | node
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
boundary_flag_num | The Boundary flag for which the interrupt node needs to be configured. Range: [0x0 to 0x3]
node | Service Request node Id
Returns
None
Description:
Connects the boundary event to the SR line of VADC or to a common boundary flag.

This API will connect a Service Request line(SR) to a boundary event. Hence to get a interrupt on this Service request line one has to enable the required NVIC node. A call to this API would configure the register bit field GxBFLNP.BFLxNP.
Related APIs:
None.
void XMC_VADC_GROUP_SetChannelAlias | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | src_ch_num,
 |  | const uint32_t | alias_ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
src_ch_num Channel which will be converted by alias_ch_num, when called by the request source.
Range:[0x0 to 0x7]
alias_ch_num This is the alias channel (Ch-0 or Ch-1)
Range:[0x0, 0x1]
Returns
None
Description:
Sets the Alias channel(alias_ch_num) to convert from the source channel(src_ch_num).

When a alias configuration takes place the request source(queue/scan/background) will not call channel src_ch_num. The Request sources will call the channel alias_ch_num , this would invoke the conversion of the pin associated with src_ch_num. The configuration of the alias channel (alias_ch_num) will be used for the conversion.
When an alias channel (Ch-0 or Ch-1) receives a trigger, it converts the aliased channel (src_ch_num). The properties of Ch-0 or Ch-1 (as indicated in alias_ch_num ) apply when src_ch_num is converted. A call to this API would configure the register GxALIAS.
Note:
Alias Channel (alias_ch_num) and the source channel (src_ch_num) cannot be the same. If they are, that alias feature is not used for the conversion. In order to Reset the alias feature that was previously selected this method can be used.
Related APIs:
None.
void XMC_VADC_GROUP_SetIndividualBoundary | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_CHANNEL_BOUNDARY_t | selection,
 |  | const uint16_t | boundary_value
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
selection | The boundary value selected for boundary_value.
boundary_value | Select the boundary value.
Returns
None
Description:
Programs the boundary with boundary_value for result comparison.

This defines a range against which the result of a conversion can be compared. In the fast compare mode, the two boundaries provide hysteresis capability to a compare value.
Related APIs:
None.
void XMC_VADC_GROUP_SetPowerMode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_GROUP_POWERMODE_t | power_mode
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC Group.
power_mode | Desired power mode
Returns
None
Description:
Configures the power mode of a VADC group.

For a VADC group to actually convert an analog signal, its analog converter must be turned on.
Related APIs:
None
void XMC_VADC_GROUP_SetResultFastCompareValue | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg,
 |  | const XMC_VADC_RESULT_SIZE_t | compare_val
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register for which the compare value is being set
Range: [0x0 to 0xF]
compare_val The compare value itself
Range: [0x0 to 0xFFF]
Returns
None
Description:
Configures the compare value (relevant to the Fast Compare Mode).

A channel input can be converted and its value stored in its result register. Alternatively, the channel input can be converted and compared against a compare value. This is the fast compare mode typically utilized by applications that are not interested in absolute converted value of an analog input, but rather a binary decision on how the input fares against a preset compare value. The channel should have had already chosen the correct ICLASS with the fast compare mode enabled. compare_val would be the compare value on which FCM bit in the result register will be set. The FCM bit will be set if the analog voltage is greater than the compare value. A call to this API would configure the register bit field GxRES.RESULT.
Related APIs:
XMC_VADC_GROUP_GetFastCompareResult().
void XMC_VADC_GROUP_SetResultInterruptNode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg,
 |  | const XMC_VADC_SR_t | sr
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
res_reg Result Register for which the result event is being asserted
Range: [0x0 to 0xF]
sr | The SR line to which the result event must be connected
Returns
None
Description:
Binds a result event to a requested Service Request line.

The result event is connected to a service request line. For an event to result in an interrupt, this service request line must be enabled in VADC and the NVIC node which this service request line is connected to must have interrupt generation enabled. A call to this API would access the registers GxREVNP0 GxREVNP1.
Related APIs:
XMC_VADC_GROUP_TriggerResultEvent()
XMC_VADC_GROUP_ClearResultEvent()
void XMC_VADC_GROUP_SetResultSubtractionValue | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint16_t | subtraction_val
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
subtraction_val 12 bit subtraction value
Range: [0x0 to 0xFFF]
Returns
None
Description:
Configures the subtraction value (relevant to the Difference Mode).

A channel input can be converted and its value stored in its result register. Alternatively, the channel input can be converted and subtracted with the value stored in GxRES[0]. This Difference Mode typically utilized by applications that are not interested in absolute converted value of an analog input, but rather a difference of converted values. Subtraction value will always be present in the GxRES[0] and thus this API would configure that register.
Related APIs:
None.
void XMC_VADC_GROUP_SetSyncMaster ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group.
Returns
None
Description:
Configures a VADC Group as a master group.

Conversion of identically numbered channels across groups can be synchronized. For example, when the trigger to convert CH-1 of Group-2 is received, it is possible to simultaneously request conversion of CH-1 of Group-0 and Group-3. Group-2 in this example is therefore the master group while Groups-0 and 3 are the slave groups.
Related APIs:
None
void XMC_VADC_GROUP_SetSyncReadySignal | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | uint32_t | mask
 | ) |  |
Parameters
group_ptr | Constant Pointer to the VADC Group
eval_mask | mask to configure the eval bits Use XMC_VADC_SYNCTR_EVAL_t to create the mask.
Returns
None
Description:
Set the Eval bits of the group.

For Synchronized conversion the master's ready signal configuration must be copied onto the slaves. A call to this API would configure the Sync EVAL Bits (GxSYNCTR.EVALy).
Related APIs:
XMC_VADC_GROUP_CheckSlaveReadiness()
XMC_VADC_GROUP_IgnoreSlaveReadiness()
void XMC_VADC_GROUP_SetSyncSlave | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | uint32_t | master_grp,
 |  | uint32_t | slave_group
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC Group which must be set as a slave
master_grp The master group number
Range: [0x0 - 0x3]
slave_group The slave group number
Range: [0x0 - 0x3]
Returns
None
Description:
Configures a VADC Group as a slave group.

Conversion of identically numbered channels across groups can be synchronized. For example, when the trigger to convert CH-1 of Group-2 is received, it is possible to simultaneously request conversion of CH-1 of Group-0 and Group-3. Group-2 in this example is therefore the master group while Groups-0 and 3 are the slave groups. It uses the SYNCCTR register for the configuration settings.
Related APIs:
XMC_VADC_GROUP_SetSyncMaster()
XMC_VADC_GROUP_CheckSlaveReadiness()
XMC_VADC_GROUP_EnableChannelSyncRequest()
void XMC_VADC_GROUP_SetSyncSlaveReadySignal | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | uint32_t | eval_waiting_group,
 |  | uint32_t | eval_origin_group
 | ) |  |
Parameters
group_ptr | Constant Pointer to the VADC Group waiting for ready signal
eval_waiting_group | The VADC Group which expects a ready signal to start it's conversion.
eval_origin_group | The VADC Group from which the eval_waiting_group will expect a ready signal
Returns
None
Description:
Sets the ready signal in the eval_waiting_group .

For Synchronized conversion all the slaves participating need to configure the ready signal. A slave group will also need to configure the ready signals coming from the other slave groups. A call to this API would configure the Sync.slave's EVAL Bits (GxSYNCTR.EVALy).
Related APIs:
XMC_VADC_GROUP_CheckSlaveReadiness()
XMC_VADC_GROUP_IgnoreSlaveReadiness()
void XMC_VADC_GROUP_TriggerResultEvent | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register for which the result event is being asserted
Range: [0x0 to 0xF]
Returns
None
Description:
Manually asserts the result event.

The result event must necessarily be connected to a SR line. The SR in turn must have been enabled along with the corresponding NVIC node. Only then will the assertion of RES event lead to an interrupt. A call to this API would access the register bit fieldS OF GxREFLAG.
Related APIs:
XMC_VADC_GROUP_ClearResultEvent().
void XMC_VADC_GROUP_TriggerServiceRequest | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | sr_num,
 |  | const XMC_VADC_GROUP_IRQ_t | type
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
sr_num | The service request number (0 through 3)
type | IRQ type (Kernel specific interrupt vs Module wide shared interrupt )
Returns
None
Description:
Activates a Service Request line(manually trigger).

VADC provides few SR lines for each group and a few more which is shared across all the groups. These SR lines can be connected to an NVIC node which in-turn would generate an interrupt. This API would manually trigger the given SR line. Could be used for evaluation and testing purposes.
Related APIs:
None
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_VADC_CHANNEL_CONFIG_t Struct Reference

Data Fields
XMC_VADC_CHANNEL_CONFIG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Data Fields

int8_t | alias_channel
bool | channel_priority
uint32_t | alternate_reference: 1
uint32_t | boundary_flag_mode_ch0: 4
uint32_t | boundary_flag_mode_ch1: 4
uint32_t | boundary_flag_mode_ch2: 4
uint32_t | boundary_flag_mode_ch3: 4
uint32_t | broken_wire_detect: 1
uint32_t | broken_wire_detect_channel: 2
uint32_t | event_gen_criteria: 2
uint32_t | flag_output_condition_ch0: 1
uint32_t | flag_output_condition_ch1: 1
uint32_t | flag_output_condition_ch2: 1
uint32_t | flag_output_condition_ch3: 1
uint32_t | input_class: 2
uint32_t | invert_boundary_flag_ch0: 1
uint32_t | invert_boundary_flag_ch1: 1
uint32_t | invert_boundary_flag_ch2: 1
uint32_t | invert_boundary_flag_ch3: 1
uint32_t | lower_boundary_select: 2
uint32_t | result_alignment: 1
uint32_t | result_reg_number: 4
uint32_t | sync_conversion: 1
uint32_t | upper_boundary_select: 2
uint32_t | use_global_result: 1

Detailed Description

Structure initializing the VADC channel. Use type XMC_VADC_CHANNEL_CONFIG_t for this enumeration.

Field Documentation

int8_t alias_channel

Specifies the channel which has to be aliased with CH0/CH1 (which ever is applicable). Force the value to (int8_t)-1 to bypass alias feature. Uses XMC_VADC_CHANNEL_ALIAS_t for configuration.

uint32_t alternate_reference

Input reference voltage selection either VARef or CH-0. Uses XMC_VADC_CHANNEL_REF_t

uint32_t boundary_flag_mode_ch0

Specify the basic operation of boundary flag 0 Uses XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t

uint32_t boundary_flag_mode_ch1

Specify the basic operation of boundary flag 1 Uses XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t

uint32_t boundary_flag_mode_ch2

Specify the basic operation of boundary flag 2 Uses XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t

uint32_t boundary_flag_mode_ch3

Specify the basic operation of boundary flag 3 Uses XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t

uint32_t broken_wire_detect

Configures extra phase before the capacitor is sampled.

uint32_t broken_wire_detect_channel

Source to be used to charge the capacitor for BWD feature. Uses XMC_VADC_CHANNEL_BWDCH_t.

bool channel_priority

Only non priority channels can be converted by Background Request Source

uint32_t event_gen_criteria

When should an event be generated? Uses XMC_VADC_CHANNEL_EVGEN_t

uint32_t flag_output_condition_ch0

Condition for which the boundary flag should change. Uses XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t

uint32_t flag_output_condition_ch1

Condition for which the boundary flag should change. Uses XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t

uint32_t flag_output_condition_ch2

Condition for which the boundary flag should change. Uses XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t

uint32_t flag_output_condition_ch3

Condition for which the boundary flag should change. Uses XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t

uint32_t input_class

Input conversion class selection. Uses XMC_VADC_CHANNEL_CONV_t

uint32_t invert_boundary_flag_ch0

Inverts boundary flag output.

uint32_t invert_boundary_flag_ch1

Inverts boundary flag output.

uint32_t invert_boundary_flag_ch2

Inverts boundary flag output.

uint32_t invert_boundary_flag_ch3

Inverts boundary flag output.

uint32_t lower_boundary_select

Which boundary register serves as lower bound? Accepts enum XMC_VADC_CHANNEL_BOUNDARY_t

uint32_t result_alignment

Alignment of the results read in the result register. Uses XMC_VADC_RESULT_ALIGN_t

uint32_t result_reg_number

Group result register number

uint32_t sync_conversion

Enables synchronous conversion for the configured channel

uint32_t upper_boundary_select

Which boundary register serves as upper bound? Accepts enum XMC_VADC_CHANNEL_BOUNDARY_t

uint32_t use_global_result

Use global result register for background request source channels

The documentation for this struct was generated from the following file:
  • xmc_vadc.h


XMC Peripheral Library for XMC4000 Family: XMC_VADC_DETAILED_RESULT_t Struct Reference

XMC_VADC_DETAILED_RESULT_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

Detailed result structure

Field Documentation

uint32_t channel_number

Converted channel number

uint32_t converted_request_source

Converted request source

uint32_t data_reduction_counter

Results reduction counter value

uint32_t emux_channel_number

Converted external multiplexer channel number. Only applicable for GxRES[0] result register

uint32_t fast_compare_result

Fast compare result if conversion mode is fast compare mode.

uint32_t result

Result of the Analog to digital conversion

uint32_t vaild_result

Valid flag is set when a new result is available

The documentation for this struct was generated from the following file:
  • xmc_vadc.h


XMC Peripheral Library for XMC4000 Family: XMC_VADC_GLOBAL_CLASS_t Struct Reference

XMC_VADC_GLOBAL_CLASS_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

Structure to initialize the global input class configuration. Configured parameters are sample time and conversion Mode.

Field Documentation

uint32_t conversion_mode_emux

Conversion mode for channels connected via EMUX to VADC. Uses XMC_VADC_CONVMODE_t

uint32_t conversion_mode_standard

Conversion mode for channels directly connected to VADC. Uses XMC_VADC_CONVMODE_t

uint32_t sample_time_std_conv

Sample time for channels directly connected to VADC
Range: [0x0 to 0x1F]

uint32_t sampling_phase_emux_channel

Sample time for channels connected via EMUX
Range: [0x0 to 0x1F]

The documentation for this struct was generated from the following file:
  • xmc_vadc.h


XMC Peripheral Library for XMC4000 Family: XMC_VADC_GLOBAL_CLOCK_t Struct Reference

XMC_VADC_GLOBAL_CLOCK_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

Structure to initialize converter and arbiter clock configuration

Field Documentation

uint32_t analog_clock_divider

Clock for the converter.
Range: [0x0 to 0x1F]

uint32_t arbiter_clock_divider

Request source arbiter clock divider.
Range: [0x0 to 0x3]

uint32_t msb_conversion_clock

Additional clock cycle for analog converter

The documentation for this struct was generated from the following file:
  • xmc_vadc.h


XMC Peripheral Library for XMC4000 Family: XMC_VADC_GLOBAL_CONFIG_t Struct Reference

Data Fields
XMC_VADC_GLOBAL_CONFIG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Data Fields

XMC_VADC_GLOBAL_CLASS_t class0
XMC_VADC_GLOBAL_CLASS_t class1
XMC_VADC_GLOBAL_CLOCK_t clock_config
uint32_t | boundary0: 12
uint32_t | boundary1: 12
uint32_t | data_reduction_control: 4
uint32_t | disable_sleep_mode_control: 1
uint32_t | event_gen_enable: 1
uint32_t | module_disable: 1
uint32_t | wait_for_read_mode: 1

Detailed Description

Structure to initialize the VADC Global functions

Field Documentation

uint32_t boundary0

Boundary value for results comparison

uint32_t boundary1

Boundary value for results comparison

XMC_VADC_GLOBAL_CLASS_t class0

ADC input conversion configurations for GLOBICLASS[0]

XMC_VADC_GLOBAL_CLASS_t class1

ADC input conversion configurations for GLOBICLASS[1]

XMC_VADC_GLOBAL_CLOCK_t clock_config

ADC clock configurations

uint32_t data_reduction_control

Data reduction stages

uint32_t disable_sleep_mode_control

Set it to true in order to disable the Sleep mode

uint32_t event_gen_enable

Generates an event on availability of new result.

uint32_t module_disable

Disables the module clock.

uint32_t wait_for_read_mode

Results of the next conversion will not be overwritten in the result register until the previous value is read

The documentation for this struct was generated from the following file:
  • xmc_vadc.h


XMC Peripheral Library for XMC4000 Family: XMC_VADC_GROUP_CLASS_t Struct Reference

XMC_VADC_GROUP_CLASS_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

Structure to initialize the group input class configuration. Configured parameters are sample time and conversion Mode.

Field Documentation

uint32_t conversion_mode_emux

Conversion mode for channels connected via EMUX to VADC. Uses XMC_VADC_CONVMODE_t

uint32_t conversion_mode_standard

Conversion mode for channels directly connected to VADC. Uses XMC_VADC_CONVMODE_t

uint32_t sample_time_std_conv

Sample time for channels directly connected to VADC
Range: [0x0 to 0x1F]

uint32_t sampling_phase_emux_channel

Sample time for channels connected via EMUX
Range: [0x0 to 0x1F]

The documentation for this struct was generated from the following file:
  • xmc_vadc.h


XMC Peripheral Library for XMC4000 Family: XMC_VADC_GROUP_CONFIG_t Struct Reference

Data Fields
XMC_VADC_GROUP_CONFIG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Data Fields

XMC_VADC_GROUP_CLASS_t class0
XMC_VADC_GROUP_CLASS_t class1
XMC_VADC_GROUP_EMUXCFG_t emux_config
uint32_t | arbiter_mode: 1
uint32_t | arbitration_round_length: 2
uint32_t | boundary0: 12
uint32_t | boundary1: 12

Detailed Description

Group Configuration Data Structures

Field Documentation

uint32_t arbiter_mode

Arbiter mode - Select either Continuous mode or Demand based. Uses XMC_VADC_GROUP_ARBMODE_t

uint32_t arbitration_round_length

Number of arbiter slots to be considered

uint32_t boundary0

Boundary value for results comparison

uint32_t boundary1

Boundary value for results comparison

XMC_VADC_GROUP_CLASS_t class0

ADC input conversion configurations for GxICLASS[0]

XMC_VADC_GROUP_CLASS_t class1

ADC input conversion configurations for GxICLASS[1]

XMC_VADC_GROUP_EMUXCFG_t emux_config

External multiplexer related configurations

The documentation for this struct was generated from the following file:
  • xmc_vadc.h


XMC Peripheral Library for XMC4000 Family: XMC_VADC_GROUP_EMUXCFG_t Struct Reference

XMC_VADC_GROUP_EMUXCFG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

EMUX related configuration structure.

Field Documentation

uint32_t connected_channel

The Channel to which the EMUX is connected.

uint32_t emux_coding

Select Binary or Gray coding. Uses XMC_VADC_GROUP_EMUXCODE_t

uint32_t emux_mode

Selects the external multiplexer modes: Steady, Single Mode, step etc Uses XMC_VADC_GROUP_EMUXMODE_t

uint32_t starting_external_channel

External channel number to which the VADC will generate a control signal (needed to select the analog input in the analog multiplexer)

uint32_t stce_usage

Use STCE for each conversion of an external channel

The documentation for this struct was generated from the following file:
  • xmc_vadc.h


XMC Peripheral Library for XMC4000 Family: XMC_VADC_QUEUE_CONFIG_t Struct Reference

Data Fields
XMC_VADC_QUEUE_CONFIG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Data Fields

uint32_t | conv_start_mode: 2
uint32_t | req_src_priority: 2
uint32_t | external_trigger: 1
uint32_t | gate_signal: 4
uint32_t | src_specific_result_reg: 4
uint32_t | timer_mode: 1
uint32_t | trigger_edge: 2
uint32_t | trigger_signal: 4

Detailed Description

Structure initializing a VADC queue request source. Use type XMC_VADC_QUEUE_CONFIG_t.

Field Documentation

uint32_t conv_start_mode

One converter is shared between the queue and scan request sources of the same group. This field determines how queue request source would request for conversion. Uses XMC_VADC_STARTMODE_t

uint32_t external_trigger

Are external triggers supported?

uint32_t gate_signal

Select one of the 16 possibilities for gating. Uses XMC_VADC_GATE_INPUT_SELECT_t

uint32_t req_src_priority

Request source priority for the arbiter.Uses XMC_VADC_GROUP_RS_PRIORITY_t

uint32_t src_specific_result_reg

Uses any one Group related result register as the destination for all conversions results. To use the individual result register from each channel configuration, configure this field with 0x0

uint32_t timer_mode

Timer mode for equi-distant sampling shall be activated or not?

uint32_t trigger_edge

Edge selection for trigger signal. Uses XMC_VADC_TRIGGER_EDGE_t

uint32_t trigger_signal

Select one of the 16 possibilities for trigger. Uses XMC_VADC_TRIGGER_INPUT_SELECT_t

The documentation for this struct was generated from the following file:
  • xmc_vadc.h


XMC Peripheral Library for XMC4000 Family: XMC_VADC_QUEUE_ENTRY_t Struct Reference

XMC_VADC_QUEUE_ENTRY_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

Structure to initialize a queue entry. Use type XMC_VADC_QUEUE_ENTRY_t.

Field Documentation

uint32_t channel_num

Channel number associated with this queue entry.
Range:[0x0 to 0x7]

uint32_t external_trigger

Conversion requests are raised on an external trigger.

uint32_t generate_interrupt

Generates a queue request source event

uint32_t refill_needed

Conversion completed channel gets inserted back into the queue

The documentation for this struct was generated from the following file:
  • xmc_vadc.h


XMC Peripheral Library for XMC4000 Family: XMC_VADC_RESULT_CONFIG_t Struct Reference

XMC_VADC_RESULT_CONFIG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

Structure to initialize VADC Group result register.

Field Documentation

uint32_t data_reduction_control

Configures the data reduction stages

uint32_t event_gen_enable

Generates an event on availability of new result.

uint32_t part_of_fifo

Make the result register a part of Result FIFO?

uint32_t post_processing_mode

Result data processing mode. Uses XMC_VADC_DMM_t For normal operation select XMC_VADC_DMM_t::XMC_VADC_DMM_REDUCTION_MODE and data_reduction_control as 0

uint32_t wait_for_read_mode

Allow the conversion only after previous results are read

The documentation for this struct was generated from the following file:
  • xmc_vadc.h


XMC Peripheral Library for XMC4000 Family: XMC_VADC_SCAN_CONFIG_t Struct Reference

Data Fields
XMC_VADC_SCAN_CONFIG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Data Fields

uint32_t | conv_start_mode: 2
uint32_t | req_src_priority: 2
uint32_t | enable_auto_scan: 1
uint32_t | external_trigger: 1
uint32_t | gate_signal: 4
uint32_t | load_mode: 1
uint32_t | req_src_interrupt: 1
uint32_t | src_specific_result_reg: 4
uint32_t | timer_mode: 1
uint32_t | trigger_edge: 2
uint32_t | trigger_signal: 4

Detailed Description

Structure initializing the VADC scan request source. Use type XMC_VADC_SCAN_CONFIG_t for this structure.

Field Documentation

uint32_t conv_start_mode

One converter is shared between the queue and scan request sources of the same group. This field determines how scan request source would request for conversion. Uses XMC_VADC_STARTMODE_t

uint32_t enable_auto_scan

Enables the continuous conversion mode. Conversion completion of the last channel in a scan sequence will cause a load event.

uint32_t external_trigger

Conversions be initiated by external hardware trigger

uint32_t gate_signal

Select one of the 16 possibilities for gating. Uses XMC_VADC_GATE_INPUT_SELECT_t

uint32_t load_mode

Selects load event mode. Uses XMC_VADC_SCAN_LOAD_t

uint32_t req_src_interrupt

Request source event can be generated after a conversion sequence

uint32_t req_src_priority

Request source priority for the arbiter. If the Conversion start mode has been selected as Cancel inject repeat/Never mode then this field would determine the priority of scan request source. Uses XMC_VADC_GROUP_RS_PRIORITY_t

uint32_t src_specific_result_reg

Use any one Group related result register as the destination for all conversions results. To use the individual result register from each channel configuration, configure this field with 0x0

uint32_t timer_mode

Decides whether timer mode for equi-distant sampling shall be activated or not.

uint32_t trigger_edge

Edge selection for trigger signal. Uses XMC_VADC_TRIGGER_EDGE_t

uint32_t trigger_signal

Select one of the 16 possibilities for trigger. Uses XMC_VADC_TRIGGER_INPUT_SELECT_t enumeration

The documentation for this struct was generated from the following file:
  • xmc_vadc.h


XMC Peripheral Library for XMC4000 Family: WDT

Data Structures | Enumerations | Functions
WDT
XMC Peripheral Library

Data Structures

struct XMC_WDT_CONFIG_t

Enumerations

Functions

void | XMC_WDT_ClearAlarm (void)
void | XMC_WDT_Disable (void)
void | XMC_WDT_Enable (void)
uint32_t | XMC_WDT_GetCounter (void)
void | XMC_WDT_Init (const XMC_WDT_CONFIG_t *const config)
void | XMC_WDT_Service (void)
void | XMC_WDT_SetDebugMode (const XMC_WDT_DEBUG_MODE_t debug_mode)
void | XMC_WDT_SetMode (XMC_WDT_MODE_t mode)
void | XMC_WDT_SetServicePulseWidth (uint8_t service_pulse_width)
void | XMC_WDT_SetWindowBounds (uint32_t lower_bound, uint32_t upper_bound)
void | XMC_WDT_Start (void)
void | XMC_WDT_Stop (void)

Detailed Description

The watchdog unit (WDT) improves the system integrity, by triggering the system reset request to bring the system back from the unresponsive state to normal operation.

This LLD provides the Configuration structure XMC_WDT_CONFIG_t and initialization function XMC_WDT_Init().
It can be used to:

  1. Start or Stop the watchdog timer. (XMC_WDT_Start() and XMC_WDT_Stop())
  2. Service the watchdog timer. (XMC_WDT_Service())
  3. Configure the service window upper bound and lower bound timing values. (XMC_WDT_SetWindowBounds())
  4. Enable the generation of the pre-warning event for the first overflow of the timer. (XMC_WDT_SetMode())
  5. Clear the pre-warning alarm event. It is mandatory to clear the flag during pre-warning alarm ISR, to stop generating reset request for the second overflow of the timer. (XMC_WDT_ClearAlarm())
  6. Suspend the watchdog timer during Debug HALT mode. (XMC_WDT_SetDebugMode())
  7. Configure service indication pulse width.(XMC_WDT_SetServicePulseWidth())

Enumeration Type Documentation

enum XMC_WDT_DEBUG_MODE_t

Defines debug behaviour of watchdog when the CPU enters HALT mode. Use type XMC_WDT_DEBUG_MODE_t for this enum.

Enumerator
XMC_WDT_DEBUG_MODE_STOP | Watchdog counter is paused during debug halt.
XMC_WDT_DEBUG_MODE_RUN | Watchdog counter is not paused during debug halt.
enum XMC_WDT_MODE_t

Defines working modes for watchdog. Use type XMC_WDT_MODE_t for this enum.

Enumerator
XMC_WDT_MODE_TIMEOUT | Generates reset request as soon as the timer overflow occurs.
XMC_WDT_MODE_PREWARNING | Generates an alarm event for the first overflow. And reset request after subsequent overflow, if not serviced after first overflow.

Function Documentation

void XMC_WDT_ClearAlarm ( void )
Parameters
None
Returns
None
Description:
Clears pre-warning alarm by setting ALMC bit in WDTCLR register.
In pre-warning mode, first overflow of the timer upper window bound fires the pre-warning alarm. XMC_WDT_ClearAlarm() must be invoked to clear the alarm alarm. After clearing of the alarm, watchdog timer must be serviced within valid time window. Otherwise watchdog timer triggers the reset request up on crossing the upper bound value in a subsequent cycle.
Related APIs:
XMC_WDT_Service(), XMC_WDT_SetMode()
void XMC_WDT_Disable ( void )
Parameters
None
Returns
None
Description:
Disables the clock and resets watchdog timer.
Note:
  1. Resets the registers with default values. So XMC_WDT_Init() has to be invoked again to configure the watchdog.
Related APIs:
XMC_WDT_Enable()
void XMC_WDT_Enable ( void )
Parameters
None
Returns
None
Description:
Enables watchdog clock and releases watchdog reset.
This API is invoked by XMC_WDT_Init() and therefore no need to call it explicitly during watchdog initialization sequence. Invoke this API to enable watchdog once again if the watchdog is disabled by invoking XMC_WDT_Disable().
Note:
  1. It is required to configure the watchdog, again after invoking XMC_WDT_Disable(). Since all the registers are reset with default values.
Related APIs:
XMC_WDT_Init(), XMC_WDT_Disable()
uint32_t XMC_WDT_GetCounter ( void )
Parameters
None
Returns
uint32_t Current count value of watchdog timer register (TIM). Range: [0H to FFFFFFFFH]
Description:
Reads current count of timer register (TIM).
Invoke this API before servicing or feeding the watchdog to check whether count is between lower and upper window bounds.
Related APIs:
XMC_WDT_Service()
void XMC_WDT_Init ( const XMC_WDT_CONFIG_t *const config )
Parameters
config pointer to a constant watchdog configuration data structure. Refer data structure XMC_WDT_CONFIG_t for detail.
Returns
None
Description:
Initializes and configures watchdog with configuration data pointed by config.
It invokes XMC_WDT_Enable() to enable clock and release reset. Then configures the lower and upper window bounds, working mode (timeout/pre-warning), debug behaviour and service request indication pulse width.
Note:
  1. With out invoking this XMC_WDT_Init() or XMC_WDT_Enable(), invocation of other APIs like XMC_WDT_SetWindowBounds(), XMC_WDT_SetMode(), XMC_WDT_SetServicePulseWidth(), XMC_WDT_SetDebugMode(), XMC_WDT_Start(), XMC_WDT_GetCounter(), XMC_WDT_Service(), XMC_WDT_ClearAlarm() has no affect.
void XMC_WDT_Service ( void )
Parameters
None
Returns
None
Description:
Services or feeds the watchdog by writing the Magic word in SRV register.
Service watchdog when count value of watchdog timer is between lower and upper window bounds. Successful servicing will reset watchdog timer (TIM register) to 0H and generate service indication pulse.
Note:
  1. invoking this API when count value of watchdog timer is less than window lower bound results wrong servicing and immediately triggers reset request.
Related APIs:
XMC_WDT_GetCounter(), XMC_WDT_SetWindowBounds(), XMC_WDT_SetServicePulseWidth()
void XMC_WDT_SetDebugMode ( const XMC_WDT_DEBUG_MODE_t debug_mode )
Parameters
debug_mode running state of watchdog during debug halt mode. Refer XMC_WDT_DEBUG_MODE_t for valid values.
Returns
None
Description:
Sets debug behaviour of watchdog by modifying DSP bit of CTR register.
Depending upon DSP bit, the watchdog timer stops when CPU is in HALT mode. The debug behaviour is initially set as XMC_WDT_DEBUG_MODE_STOP during initialization in XMC_WDT_Init(). Invoke this API to change the debug behaviour as needed later in the program.
void XMC_WDT_SetMode ( XMC_WDT_MODE_t mode )
Parameters
mode is one of the working modes of the watchdog timer, i.e timeout or pre-warning. Refer XMC_WDT_MODE_t for valid values.
Returns
None
Description:
Sets watchdog working mode (timeout or pre-warning) by updating PRE bit of CTR register.
The working mode is set during initialization in XMC_WDT_Init(). Invoke this API to alter the mode as needed later in the program.
void XMC_WDT_SetServicePulseWidth ( uint8_t service_pulse_width )
Parameters
service_pulse_width specifies Service indication pulse width in terms of fwdt. Range: [0H – FFH].
Returns
None
Description:
Sets service indication pulse width by updating SPW bit field of CTR register.
The service indication pulse (with width service_pulse_width + 1 in fwdt cycles) is generated on successful servicing or feeding of watchdog. The pulse width is initially set during initialization in XMC_WDT_Init(). Invoke this API to alter the width as needed later in the program.
void XMC_WDT_SetWindowBounds | ( | uint32_t | lower_bound,
 |  | uint32_t | upper_bound
 | ) |  |
Parameters
lower_bound | specifies watchdog window lower bound in terms of watchdog clock (fWDT) cycles. Range: [0H to FFFFFFFFH].
upper_bound | specifies watchdog window upper bound in terms of watchdog clock (fWDT) cycles. Range: [0H to FFFFFFFFH].
Returns
None
Description:
Sets watchdog window lower and upper bounds by updating WLB and WUB registers.
Window lower and upper bounds are set during initialization in XMC_WDT_Init(). Invoke this API to alter the values as needed later in the program. This upper bound and lower bound can be calculated by using the below formula
upper_bound or lower_bound = desired_boundary_time(sec) * fwdt(hz)
Note:
  1. Always ensure that upper_bound is greater than the lower_bound value. If not, whenever timer crosses the upper_bound value it triggers the reset(wdt_rst_req) of the controller.
void XMC_WDT_Start ( void )
Parameters
None
Returns
None
Description:
Start the watchdog timer by setting ENB bit of CTR register.
Invoke this API to start the watchdog after initialization, or to resume the watchdog when paused by invoking XMC_WDT_Stop().
Related APIs:
XMC_WDT_Init(), XMC_WDT_Stop()
void XMC_WDT_Stop ( void )
Parameters
None
Returns
None
Description:
Pauses watchdog timer by resetting ENB bit of CTR register.
Invoke this API to pause the watchdog as needed in the program e.g. debugging through software control.
Related APIs:
XMC_WDT_Init(), XMC_WDT_Stop()
Generated on Mon Aug 7 2017 11:33:57 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: XMC_WDT_CONFIG_t Struct Reference

Data Fields
XMC_WDT_CONFIG_t Struct Reference
XMC Peripheral Library » WDT

#include <xmc_wdt.h>

Data Fields

uint32_t | window_lower_bound
uint32_t | window_upper_bound
uint32_t | prewarn_mode: 1
uint32_t | run_in_debug_mode: 1
uint32_t | service_pulse_width: 8

Detailed Description

Structure for initializing watchdog timer. Use type XMC_WDT_CONFIG_t for this structure.

Field Documentation

uint32_t prewarn_mode

Pre-warning mode (PRE). This accepts boolean values as input.

uint32_t run_in_debug_mode

Watchdog timer behaviour during debug (DSP). This accepts boolean values as input.

uint32_t service_pulse_width

Service Indication Pulse Width (SPW). Generated Pulse width is of (SPW+1), in fwdt cycles.
Range: [0H to FFH]

uint32_t window_lower_bound

Lower bound for servicing window (WLB). Setting the lower bound to 0H disables the window mechanism.
Range: [0H to FFFFFFFFH]

uint32_t window_upper_bound

Upper bound for service window (WUB). Reset request is generated up on overflow of timer. ALways upper bound value has to be more than lower bound value. If it is set lower than WLB, triggers a system reset after timer crossed upper bound value.
Range: [0H to FFFFFFFFH]

The documentation for this struct was generated from the following file:
  • xmc_wdt.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: File List

  • File List
  • Globals
File List
Here is a list of all documented files with brief descriptions:
xmc4_flash.h
xmc4_gpio.h
xmc4_rtc.h
xmc4_scu.h
xmc_can.h
xmc_ccu4.h
xmc_ccu8.h
xmc_dac.h
xmc_dma.h
xmc_dsd.h
xmc_ebu.h
xmc_ecat.h
xmc_eru.h
xmc_eth_mac.h
xmc_eth_mac_map.h
xmc_eth_phy.h
xmc_fce.h
xmc_flash.h
xmc_gpio.h
xmc_hrpwm.h
xmc_i2c.h
xmc_i2s.h
xmc_ledts.h
xmc_posif.h
xmc_rtc.h
xmc_scu.h
xmc_sdmmc.h
xmc_spi.h
xmc_uart.h
xmc_usbd.h
xmc_usbh.h
xmc_usic.h
xmc_vadc.h
xmc_wdt.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc4_flash.h File Reference

  • File List
  • Globals
  • inc
Macros | Enumerations | Functions
xmc4_flash.h File Reference
#include "xmc_common.h"
Include dependency graph for xmc4_flash.h:

Macros

#define | XMC_FLASH_BYTES_PER_PAGE (256UL)
#define | XMC_FLASH_BYTES_PER_UCB (1024UL)
#define | XMC_FLASH_PHY_SECTOR_0 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x00000UL)
#define | XMC_FLASH_PHY_SECTOR_10 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x80000UL)
#define | XMC_FLASH_PHY_SECTOR_11 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0xC0000UL)
#define | XMC_FLASH_PHY_SECTOR_12 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x100000UL)
#define | XMC_FLASH_PHY_SECTOR_13 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x140000UL)
#define | XMC_FLASH_PHY_SECTOR_14 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x180000UL)
#define | XMC_FLASH_PHY_SECTOR_15 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x1C0000UL)
#define | XMC_FLASH_PHY_SECTOR_4 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x10000UL)
#define | XMC_FLASH_PHY_SECTOR_8 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x20000UL)
#define | XMC_FLASH_PHY_SECTOR_9 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x40000UL)
#define | XMC_FLASH_SECTOR_0 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x00000UL)
#define | XMC_FLASH_SECTOR_1 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x04000UL)
#define | XMC_FLASH_SECTOR_10 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x80000UL)
#define | XMC_FLASH_SECTOR_11 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0xC0000UL)
#define | XMC_FLASH_SECTOR_12 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x100000UL)
#define | XMC_FLASH_SECTOR_13 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x140000UL)
#define | XMC_FLASH_SECTOR_14 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x180000UL)
#define | XMC_FLASH_SECTOR_15 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x1C0000UL)
#define | XMC_FLASH_SECTOR_2 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x08000UL)
#define | XMC_FLASH_SECTOR_3 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x0C000UL)
#define | XMC_FLASH_SECTOR_4 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x10000UL)
#define | XMC_FLASH_SECTOR_5 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x14000UL)
#define | XMC_FLASH_SECTOR_6 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x18000UL)
#define | XMC_FLASH_SECTOR_7 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x1C000UL)
#define | XMC_FLASH_SECTOR_8 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x20000UL)
#define | XMC_FLASH_SECTOR_9 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x40000UL)
#define | XMC_FLASH_UCB0 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x0000UL)
#define | XMC_FLASH_UCB1 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x0400UL)
#define | XMC_FLASH_UCB2 (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x0800UL)
#define | XMC_FLASH_UNCACHED_BASE (0x0C000000U)
#define | XMC_FLASH_WORDS_PER_PAGE (64UL)

Enumerations

Functions

void | XMC_FLASH_ConfirmProtection (uint8_t user)
void | XMC_FLASH_DisableDoubleBitErrorTrap (void)
void | XMC_FLASH_DisableDynamicIdle (void)
void | XMC_FLASH_DisableSleepRequest (void)
void | XMC_FLASH_DisableWaitStateForECC (void)
void | XMC_FLASH_EnableDoubleBitErrorTrap (void)
void | XMC_FLASH_EnableDynamicIdle (void)
void | XMC_FLASH_EnableSleepRequest (void)
void | XMC_FLASH_EnableWaitStateForECC (void)
void | XMC_FLASH_ErasePhysicalSector (uint32_t *sector_start_address)
void | XMC_FLASH_EraseUCB (uint32_t *ucb_sector_start_address)
void | XMC_FLASH_InstallProtection (uint8_t user, uint32_t protection_mask, uint32_t password_0, uint32_t password_1)
void | XMC_FLASH_RepairPhysicalSector (void)
void | XMC_FLASH_Reset (void)
void | XMC_FLASH_ResumeProtection (void)
void | XMC_FLASH_SetMargin (const XMC_FLASH_MARGIN_t margin)
void | XMC_FLASH_SetWaitStates (uint32_t num_wait_states)
bool | XMC_FLASH_VerifyReadProtection (uint32_t password_0, uint32_t password_1)
bool | XMC_FLASH_VerifyWriteProtection (uint32_t user, uint32_t protection_mask, uint32_t password_0, uint32_t password_1)
void | XMC_PREFETCH_DisableInstructionBuffer (void)
void | XMC_PREFETCH_EnableInstructionBuffer (void)
void | XMC_PREFETCH_InvalidateInstructionBuffer (void)

Detailed Description

Date
2016-03-22
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc4_gpio.h File Reference

  • File List
  • Globals
  • inc
Data Structures | Enumerations | Functions
xmc4_gpio.h File Reference
#include "xmc_common.h"
#include "xmc4_gpio_map.h"
Include dependency graph for xmc4_gpio.h:

Data Structures

struct | XMC_GPIO_CONFIG_t
struct | XMC_GPIO_PORT_t

Enumerations

Functions

void XMC_GPIO_SetOutputStrength (XMC_GPIO_PORT_t *const port, const uint8_t pin, XMC_GPIO_OUTPUT_STRENGTH_t strength)

Detailed Description

Date
2015-10-09
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc4_rtc.h File Reference

  • File List
  • Globals
  • inc
Enumerations | Functions
xmc4_rtc.h File Reference

Enumerations

Functions

void | XMC_RTC_DisableHibernationWakeUp (const uint32_t event)
void | XMC_RTC_EnableHibernationWakeUp (const uint32_t event)

Detailed Description

Date
2015-05-20
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc4_scu.h File Reference

  • File List
  • Globals
  • inc
Data Structures | Macros | Typedefs | Enumerations | Functions
xmc4_scu.h File Reference
#include "xmc_common.h"
Include dependency graph for xmc4_scu.h:

Data Structures

struct | XMC_SCU_CLOCK_CONFIG_t
struct | XMC_SCU_CLOCK_SYSPLL_CONFIG_t

Macros

#define | XMC_SCU_INTERRUPT_EVENT_DLR_OVERRUN SCU_INTERRUPT_SRSTAT_DLROVR_Msk
#define | XMC_SCU_INTERRUPT_EVENT_HDCLR_UPDATED SCU_INTERRUPT_SRSTAT_HDCLR_Msk
#define | XMC_SCU_INTERRUPT_EVENT_HDCR_UPDATED SCU_INTERRUPT_SRSTAT_HDCR_Msk
#define | XMC_SCU_INTERRUPT_EVENT_HDSET_UPDATED SCU_INTERRUPT_SRSTAT_HDSET_Msk
#define | XMC_SCU_INTERRUPT_EVENT_OSCSICTRL_UPDATED SCU_INTERRUPT_SRSTAT_OSCSICTRL_Msk
#define | XMC_SCU_INTERRUPT_EVENT_OSCULCTRL_UPDATED SCU_INTERRUPT_SRSTAT_OSCULCTRL_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RMX_UPDATED SCU_INTERRUPT_SRSTAT_RMX_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTC_ALARM SCU_INTERRUPT_SRSTAT_AI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTC_PERIODIC SCU_INTERRUPT_SRSTAT_PI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCATIM0_UPDATED SCU_INTERRUPT_SRSTAT_RTC_ATIM0_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCATIM1_UPDATED SCU_INTERRUPT_SRSTAT_RTC_ATIM1_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCCTR_UPDATED SCU_INTERRUPT_SRSTAT_RTC_CTR_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCTIM0_UPDATED SCU_INTERRUPT_SRSTAT_RTC_TIM0_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCTIM1_UPDATED SCU_INTERRUPT_SRSTAT_RTC_TIM1_Msk
#define | XMC_SCU_INTERRUPT_EVENT_WDT_WARN SCU_INTERRUPT_SRSTAT_PRWARN_Msk

Typedefs

typedef uint32_t XMC_SCU_INTERRUPT_EVENT_t

Enumerations

Functions

void | XMC_SCU_CalibrateTemperatureSensor (uint32_t offset, uint32_t gain)
void | XMC_SCU_CLOCK_DisableClock (const XMC_SCU_CLOCK_t clock)
void | XMC_SCU_CLOCK_DisableHighPerformanceOscillator (void)
void | XMC_SCU_CLOCK_DisableHighPerformanceOscillatorGeneralPurposeInput (void)
void | XMC_SCU_CLOCK_DisableLowPowerOscillator (void)
void | XMC_SCU_CLOCK_DisableLowPowerOscillatorGeneralPurposeInput (void)
void | XMC_SCU_CLOCK_DisableSystemPll (void)
void | XMC_SCU_CLOCK_DisableUsbPll (void)
void | XMC_SCU_CLOCK_EnableClock (const XMC_SCU_CLOCK_t clock)
void | XMC_SCU_CLOCK_EnableHighPerformanceOscillator (void)
void | XMC_SCU_CLOCK_EnableHighPerformanceOscillatorGeneralPurposeInput (void)
void | XMC_SCU_CLOCK_EnableLowPowerOscillator (void)
void | XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput (void)
void | XMC_SCU_CLOCK_EnableSystemPll (void)
void | XMC_SCU_CLOCK_EnableUsbPll (void)
uint32_t | XMC_SCU_CLOCK_GetCcuClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetCcuClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetCpuClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetEbuClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetEbuClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetECATClockDivider (void)
XMC_SCU_CLOCK_ECATCLKSRC_t | XMC_SCU_CLOCK_GetECATClockSource (void)
uint32_t | XMC_SCU_CLOCK_GetEthernetClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetExternalOutputClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetExternalOutputClockFrequency (void)
XMC_SCU_CLOCK_EXTOUTCLKSRC_t | XMC_SCU_CLOCK_GetExternalOutputClockSource (void)
uint32_t | XMC_SCU_CLOCK_GetHighPerformanceOscillatorGeneralPurposeInputStatus (void)
uint32_t | XMC_SCU_CLOCK_GetLowPowerOscillatorGeneralPurposeInputStatus (void)
uint32_t | XMC_SCU_CLOCK_GetPeripheralClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetSystemClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetSystemClockFrequency (void)
XMC_SCU_CLOCK_SYSCLKSRC_t | XMC_SCU_CLOCK_GetSystemClockSource (void)
uint32_t | XMC_SCU_CLOCK_GetSystemPllClockFrequency (void)
XMC_SCU_CLOCK_SYSPLLCLKSRC_t | XMC_SCU_CLOCK_GetSystemPllClockSource (void)
uint32_t | XMC_SCU_CLOCK_GetSystemPllClockSourceFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetUsbClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetUsbClockFrequency (void)
XMC_SCU_CLOCK_USBCLKSRC_t | XMC_SCU_CLOCK_GetUsbClockSource (void)
uint32_t | XMC_SCU_CLOCK_GetUsbPllClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetWdtClockDivider (void)
uint32_t | XMC_SCU_CLOCK_GetWdtClockFrequency (void)
XMC_SCU_CLOCK_WDTCLKSRC_t | XMC_SCU_CLOCK_GetWdtClockSource (void)
bool | XMC_SCU_CLOCK_IsClockEnabled (const XMC_SCU_CLOCK_t clock)
bool | XMC_SCU_CLOCK_IsHighPerformanceOscillatorStable (void)
bool | XMC_SCU_CLOCK_IsLowPowerOscillatorStable (void)
bool | XMC_SCU_CLOCK_IsSystemPllLocked (void)
bool | XMC_SCU_CLOCK_IsUsbPllLocked (void)
void | XMC_SCU_CLOCK_SetBackupClockCalibrationMode (XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_t mode)
void | XMC_SCU_CLOCK_SetCcuClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetCpuClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetDeepSleepConfig (int32_t config)
void | XMC_SCU_CLOCK_SetEbuClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetECATClockDivider (const uint32_t divider)
void | XMC_SCU_CLOCK_SetECATClockSource (const XMC_SCU_CLOCK_ECATCLKSRC_t source)
void | XMC_SCU_CLOCK_SetExternalOutputClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetExternalOutputClockSource (const XMC_SCU_CLOCK_EXTOUTCLKSRC_t clock)
void | XMC_SCU_CLOCK_SetPeripheralClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetSleepConfig (int32_t config)
void | XMC_SCU_CLOCK_SetSystemClockDivider (const uint32_t divider)
void | XMC_SCU_CLOCK_SetSystemClockSource (const XMC_SCU_CLOCK_SYSCLKSRC_t source)
void | XMC_SCU_CLOCK_SetSystemPllClockSource (const XMC_SCU_CLOCK_SYSPLLCLKSRC_t source)
void | XMC_SCU_CLOCK_SetUsbClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetUsbClockSource (const XMC_SCU_CLOCK_USBCLKSRC_t source)
void | XMC_SCU_CLOCK_SetWdtClockDivider (const uint32_t ratio)
void | XMC_SCU_CLOCK_SetWdtClockSource (const XMC_SCU_CLOCK_WDTCLKSRC_t source)
void | XMC_SCU_CLOCK_StartSystemPll (XMC_SCU_CLOCK_SYSPLLCLKSRC_t source, XMC_SCU_CLOCK_SYSPLL_MODE_t mode, uint32_t pdiv, uint32_t ndiv, uint32_t kdiv)
void | XMC_SCU_CLOCK_StartUsbPll (uint32_t pdiv, uint32_t ndiv)
void | XMC_SCU_CLOCK_StepSystemPllFrequency (uint32_t kdiv)
void | XMC_SCU_CLOCK_StopSystemPll (void)
void | XMC_SCU_CLOCK_StopUsbPll (void)
void | XMC_SCU_DisableOutOfRangeComparator (const uint32_t group, const uint32_t channel)
void | XMC_SCU_DisableTemperatureSensor (void)
void | XMC_SCU_EnableOutOfRangeComparator (const uint32_t group, const uint32_t channel)
void | XMC_SCU_EnableTemperatureSensor (void)
uint32_t | XMC_SCU_GetBootMode (void)
uint32_t | XMC_SCU_GetTemperatureMeasurement (void)
void | XMC_SCU_HIB_ClearEventStatus (int32_t event)
void | XMC_SCU_HIB_ClearWakeupEventDetectionStatus (void)
void | XMC_SCU_HIB_DisableEvent (int32_t event)
void | XMC_SCU_HIB_DisableHibernateDomain (void)
void | XMC_SCU_HIB_DisableInternalSlowClock (void)
void | XMC_SCU_HIB_EnableEvent (int32_t event)
void | XMC_SCU_HIB_EnableHibernateDomain (void)
void | XMC_SCU_HIB_EnableInternalSlowClock (void)
void | XMC_SCU_HIB_EnterHibernateState (void)
void | XMC_SCU_HIB_EnterHibernateStateEx (XMC_SCU_HIB_HIBERNATE_MODE_t mode)
int32_t | XMC_SCU_HIB_GetEventStatus (void)
int32_t | XMC_SCU_HIB_GetHibernateControlStatus (void)
XMC_SCU_HIB_RTCCLKSRC_t | XMC_SCU_HIB_GetRtcClockSource (void)
XMC_SCU_HIB_RTCCLKSRC_t | XMC_SCU_HIB_GetStdbyClockSource (void)
bool | XMC_SCU_HIB_IsHibernateDomainEnabled (void)
bool | XMC_SCU_HIB_IsWakeupEventDetected (void)
void | XMC_SCU_HIB_LPAC_ClearStatus (int32_t status)
int32_t | XMC_SCU_HIB_LPAC_GetStatus (void)
void | XMC_SCU_HIB_LPAC_SetHIBIO0Thresholds (uint8_t lower, uint8_t upper)
void | XMC_SCU_HIB_LPAC_SetHIBIO1Thresholds (uint8_t lower, uint8_t upper)
void | XMC_SCU_HIB_LPAC_SetInput (XMC_SCU_HIB_LPAC_INPUT_t input)
void | XMC_SCU_HIB_LPAC_SetTiming (bool enable_delay, uint16_t interval_count, uint8_t settle_count)
void | XMC_SCU_HIB_LPAC_SetTrigger (XMC_SCU_HIB_LPAC_TRIGGER_t trigger)
void | XMC_SCU_HIB_LPAC_SetVBATThresholds (uint8_t lower, uint8_t upper)
void | XMC_SCU_HIB_LPAC_TriggerCompare (XMC_SCU_HIB_LPAC_INPUT_t input)
void | XMC_SCU_HIB_SetInput0 (XMC_SCU_HIB_IO_t pin)
void | XMC_SCU_HIB_SetPinMode (XMC_SCU_HIB_IO_t pin, XMC_SCU_HIB_PIN_MODE_t mode)
void | XMC_SCU_HIB_SetPinOutputLevel (XMC_SCU_HIB_IO_t pin, XMC_SCU_HIB_IO_OUTPUT_LEVEL_t level)
void | XMC_SCU_HIB_SetRtcClockSource (const XMC_SCU_HIB_RTCCLKSRC_t source)
void | XMC_SCU_HIB_SetSR0Input (XMC_SCU_HIB_SR0_INPUT_t input)
void | XMC_SCU_HIB_SetStandbyClockSource (const XMC_SCU_HIB_STDBYCLKSRC_t source)
void | XMC_SCU_HIB_SetWakeupTriggerInput (XMC_SCU_HIB_IO_t pin)
void | XMC_SCU_HIB_TriggerEvent (int32_t event)
bool | XMC_SCU_HighTemperature (void)
void | XMC_SCU_INTERRUPT_DisableNmiRequest (const uint32_t request)
void | XMC_SCU_INTERRUPT_EnableNmiRequest (const uint32_t request)
bool | XMC_SCU_IsTemperatureSensorBusy (void)
bool | XMC_SCU_IsTemperatureSensorEnabled (void)
bool | XMC_SCU_IsTemperatureSensorReady (void)
bool | XMC_SCU_LowTemperature (void)
void | XMC_SCU_PARITY_ClearStatus (const uint32_t memory)
void | XMC_SCU_PARITY_Disable (const uint32_t memory)
void | XMC_SCU_PARITY_DisableTrapGeneration (const uint32_t memory)
void | XMC_SCU_PARITY_Enable (const uint32_t memory)
void | XMC_SCU_PARITY_EnableTrapGeneration (const uint32_t memory)
uint32_t | XMC_SCU_PARITY_GetStatus (void)
void | XMC_SCU_POWER_DisableMonitor (void)
void | XMC_SCU_POWER_DisableUsb (void)
void | XMC_SCU_POWER_EnableMonitor (uint8_t threshold, uint8_t interval)
void | XMC_SCU_POWER_EnableUsb (void)
float | XMC_SCU_POWER_GetEVR13Voltage (void)
float | XMC_SCU_POWER_GetEVR33Voltage (void)
int32_t | XMC_SCU_POWER_GetEVRStatus (void)
void | XMC_SCU_POWER_WaitForEvent (XMC_SCU_POWER_MODE_t mode)
void | XMC_SCU_POWER_WaitForInterrupt (XMC_SCU_POWER_MODE_t mode, bool sleep_on_exit)
uint32_t | XMC_SCU_ReadFromRetentionMemory (uint32_t address)
uint32_t | XMC_SCU_ReadGPR (const uint32_t index)
void | XMC_SCU_RESET_AssertPeripheralReset (const XMC_SCU_PERIPHERAL_RESET_t peripheral)
void | XMC_SCU_RESET_DeassertPeripheralReset (const XMC_SCU_PERIPHERAL_RESET_t peripheral)
bool | XMC_SCU_RESET_IsPeripheralResetAsserted (const XMC_SCU_PERIPHERAL_RESET_t peripheral)
void | XMC_SCU_SetBootMode (const XMC_SCU_BOOTMODE_t mode)
void | XMC_SCU_SetRawTempLimits (const uint32_t lower_temp, const uint32_t upper_temp)
XMC_SCU_STATUS_t | XMC_SCU_StartTemperatureMeasurement (void)
void | XMC_SCU_TRAP_ClearStatus (const uint32_t trap)
void | XMC_SCU_TRAP_Disable (const uint32_t trap)
void | XMC_SCU_TRAP_Enable (const uint32_t trap)
uint32_t | XMC_SCU_TRAP_GetStatus (void)
void | XMC_SCU_TRAP_Trigger (const uint32_t trap)
void | XMC_SCU_WriteGPR (const uint32_t index, const uint32_t data)
void | XMC_SCU_WriteToRetentionMemory (uint32_t address, uint32_t data)

Detailed Description

Date
2016-06-15
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_can.h File Reference

  • File List
  • Globals
  • inc
Data Structures | Macros | Typedefs | Enumerations | Functions
xmc_can.h File Reference
#include "xmc_common.h"
#include "xmc_scu.h"
#include "xmc_can_map.h"
#include <string.h>
Include dependency graph for xmc_can.h:

Data Structures

struct | XMC_CAN_FIFO_CONFIG_t
struct | XMC_CAN_GATEWAY_CONFIG_t
struct | XMC_CAN_MO_t
struct | XMC_CAN_NODE_FRAME_COUNTER_t
struct | XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t

Macros

#define | CAN_MO_MOIPR_Msk (0x7U)
#define | CAN_NODE_NIPR_Msk (0x7UL)
#define | XMC_CAN_MO_MOAR_STDID_Msk ((0x000007FFUL) << XMC_CAN_MO_MOAR_STDID_Pos)
#define | XMC_CAN_MO_MOAR_STDID_Pos (18U)

Typedefs

typedef CAN_NODE_TypeDef | XMC_CAN_NODE_t
typedef CAN_GLOBAL_TypeDef | XMC_CAN_t

Enumerations

Functions

void | XMC_CAN_AllocateMOtoNodeList (XMC_CAN_t *const obj, const uint8_t node_num, const uint8_t mo_num)
void | XMC_CAN_Disable (XMC_CAN_t *const obj)
void | XMC_CAN_Enable (XMC_CAN_t *const obj)
void | XMC_CAN_EventTrigger (XMC_CAN_t *const obj, const XMC_CAN_NODE_INTERRUPT_TRIGGER_t service_requestr)
void | XMC_CAN_FIFO_DisableForeingRemoteRequest (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_DisableRemoteMonitoring (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_DisableSingleDataTransfer (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_EnableForeignRemoteRequest (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_EnableRemoteMonitoring (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_EnableSingleDataTransfer (const XMC_CAN_MO_t *const can_mo)
uint8_t | XMC_CAN_FIFO_GetCurrentMO (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_SetSELMO (const XMC_CAN_MO_t *const can_mo, const uint8_t select_pointer)
void | XMC_CAN_GATEWAY_InitDesObject (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_GATEWAY_InitSourceObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_GATEWAY_CONFIG_t can_gateway)
void | XMC_CAN_Init (XMC_CAN_t *const obj, uint32_t can_frequency)
bool | XMC_CAN_IsPanelControlReady (XMC_CAN_t *const obj)
void | XMC_CAN_MO_AcceptOnlyMatchingIDE (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_AcceptStandardAndExtendedID (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_Config (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_DataLengthCode (const XMC_CAN_MO_t *const can_mo, const uint8_t data_length_code)
void | XMC_CAN_MO_DisableEvent (const XMC_CAN_MO_t *const can_mo, const uint32_t event)
void | XMC_CAN_MO_DisableSingleTransmitTrial (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_EnableEvent (const XMC_CAN_MO_t *const can_mo, const uint32_t event)
void | XMC_CAN_MO_EnableSingleTransmitTrial (const XMC_CAN_MO_t *const can_mo)
uint32_t | XMC_CAN_MO_GetAcceptanceMask (const XMC_CAN_MO_t *const can_mo)
uint8_t | XMC_CAN_MO_GetDataLengthCode (const XMC_CAN_MO_t *const can_mo)
uint32_t | XMC_CAN_MO_GetIdentifier (const XMC_CAN_MO_t *const can_mo)
uint32_t | XMC_CAN_MO_GetStatus (const XMC_CAN_MO_t *const can_mo)
XMC_CAN_STATUS_t | XMC_CAN_MO_Receive (XMC_CAN_MO_t *can_mo)
XMC_CAN_STATUS_t | XMC_CAN_MO_ReceiveData (XMC_CAN_MO_t *can_mo)
void | XMC_CAN_MO_ResetStatus (const XMC_CAN_MO_t *const can_mo, const uint32_t mask)
void | XMC_CAN_MO_SetAcceptanceMask (XMC_CAN_MO_t *const can_mo, const uint32_t can_id_mask)
void | XMC_CAN_MO_SetDataLengthCode (XMC_CAN_MO_t *const can_mo, const uint8_t data_length_code)
void | XMC_CAN_MO_SetEventNodePointer (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_MO_POINTER_EVENT_t can_mo_ptr_int, const uint32_t service_request)
void | XMC_CAN_MO_SetExtendedID (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_SetIdentifier (XMC_CAN_MO_t *const can_mo, const uint32_t can_identifier)
void | XMC_CAN_MO_SetStandardID (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_SetStatus (const XMC_CAN_MO_t *const can_mo, const uint32_t mask)
XMC_CAN_STATUS_t | XMC_CAN_MO_Transmit (const XMC_CAN_MO_t *const can_mo)
XMC_CAN_STATUS_t | XMC_CAN_MO_UpdateData (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_NODE_ClearStatus (XMC_CAN_NODE_t *const can_node, XMC_CAN_NODE_STATUS_t can_node_status)
void | XMC_CAN_NODE_Disable (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_DisableConfigurationChange (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_DisableEvent (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_EVENT_t event)
void | XMC_CAN_NODE_DisableLoopBack (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_Enable (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_EnableConfigurationChange (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_EnableEvent (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_EVENT_t event)
void | XMC_CAN_NODE_EnableLoopBack (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_EnableSuspend (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_FrameCounterConfigure (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_FRAME_COUNTER_t *const can_node_init)
uint16_t | XMC_CAN_NODE_GetCANFrameCounter (XMC_CAN_NODE_t *const can_node)
uint8_t | XMC_CAN_NODE_GetErrorWarningLevel (XMC_CAN_NODE_t *const can_node)
XMC_CAN_NODE_LAST_ERROR_DIR_t | XMC_CAN_NODE_GetLastErrTransferDir (XMC_CAN_NODE_t *const node)
XMC_CAN_NODE_LAST_ERROR_INC_t | XMC_CAN_NODE_GetLastErrTransferInc (XMC_CAN_NODE_t *const node)
uint8_t | XMC_CAN_NODE_GetReceiveErrorCounter (XMC_CAN_NODE_t *const can_node)
uint32_t | XMC_CAN_NODE_GetStatus (XMC_CAN_NODE_t *const can_node)
uint8_t | XMC_CAN_NODE_GetTransmitErrorCounter (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_NominalBitTimeConfigure (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t *const can_bit_time)
void | XMC_CAN_NODE_ReSetAnalyzerMode (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_ResetInitBit (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_SetAnalyzerMode (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_SetErrorWarningLevel (XMC_CAN_NODE_t *const can_node, uint8_t error_warning_level)
void | XMC_CAN_NODE_SetEventNodePointer (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_POINTER_EVENT_t ptr_event, const uint32_t service_request)
void | XMC_CAN_NODE_SetInitBit (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_SetReceiveErrorCounter (XMC_CAN_NODE_t *const can_node, uint8_t can_rec)
void | XMC_CAN_NODE_SetReceiveInput (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_RECEIVE_INPUT_t input)
void | XMC_CAN_NODE_SetTransmitErrorCounter (XMC_CAN_NODE_t *const can_node, uint8_t can_tec)
void | XMC_CAN_PanelControl (XMC_CAN_t *const obj, const XMC_CAN_PANCMD_t pancmd, const uint8_t arg1, const uint8_t arg2)
void | XMC_CAN_RXFIFO_ConfigMOBaseObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_FIFO_CONFIG_t can_fifo)
void | XMC_CAN_RXFIFO_ConfigMOSlaveObject (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_TXFIFO_ConfigMOBaseObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_FIFO_CONFIG_t can_fifo)
void | XMC_CAN_TXFIFO_ConfigMOSlaveObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_FIFO_CONFIG_t can_fifo)
XMC_CAN_STATUS_t | XMC_CAN_TXFIFO_Transmit (const XMC_CAN_MO_t *const can_mo)

Detailed Description

Date
2016-06-07
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_ccu4.h File Reference

  • File List
  • Globals
  • inc
Data Structures | Typedefs | Enumerations | Functions
xmc_ccu4.h File Reference
#include "xmc_common.h"
#include "xmc1_ccu4_map.h"
#include "xmc4_ccu4_map.h"
Include dependency graph for xmc_ccu4.h:

Data Structures

struct | XMC_CCU4_SLICE_CAPTURE_CONFIG_t
struct | XMC_CCU4_SLICE_COMPARE_CONFIG_t
struct | XMC_CCU4_SLICE_EVENT_CONFIG_t

Typedefs

typedef CCU4_GLOBAL_TypeDef | XMC_CCU4_MODULE_t
typedef uint8_t | XMC_CCU4_SLICE_INPUT_t
typedef CCU4_CC4_TypeDef | XMC_CCU4_SLICE_t

Enumerations

Functions

void | XMC_CCU4_DisableClock (XMC_CCU4_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU4_DisableModule (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_EnableClock (XMC_CCU4_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU4_EnableModule (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_EnableMultipleClocks (XMC_CCU4_MODULE_t *const module, const uint8_t clock_mask)
void | XMC_CCU4_EnableShadowTransfer (XMC_CCU4_MODULE_t *const module, const uint32_t shadow_transfer_msk)
void | XMC_CCU4_Init (XMC_CCU4_MODULE_t *const module, const XMC_CCU4_SLICE_MCMS_ACTION_t mcs_action)
bool | XMC_CCU4_IsPrescalerRunning (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_SetModuleClock (XMC_CCU4_MODULE_t *const module, const XMC_CCU4_CLOCK_t clock)
void | XMC_CCU4_SetMultiChannelShadowTransferMode (XMC_CCU4_MODULE_t *const module, const uint32_t slice_mode_msk)
void | XMC_CCU4_SLICE_Capture0Config (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_Capture1Config (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_CaptureInit (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_CAPTURE_CONFIG_t *const capture_init)
void | XMC_CCU4_SLICE_ClearEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_ClearTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_CompareInit (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_COMPARE_CONFIG_t *const compare_init)
void | XMC_CCU4_SLICE_ConfigureEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_EVENT_CONFIG_t *const config)
void | XMC_CCU4_SLICE_ConfigureStatusBitOverrideEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_CONFIG_t *const ev1_config, const XMC_CCU4_SLICE_EVENT_CONFIG_t *const ev2_config)
void | XMC_CCU4_SLICE_CountConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_DirectionConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_DisableAutomaticShadowTransferRequest (XMC_CCU4_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU4_SLICE_DisableCascadedShadowTransfer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableDithering (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_DisableFloatingPrescaler (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableMultiChannelMode (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableMultipleEvents (XMC_CCU4_SLICE_t *const slice, const uint16_t mask)
void | XMC_CCU4_SLICE_DisableTrap (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableAutomaticShadowTransferRequest (XMC_CCU4_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU4_SLICE_EnableCascadedShadowTransfer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableDithering (XMC_CCU4_SLICE_t *const slice, const bool period_dither, const bool duty_dither, const uint8_t spread)
void | XMC_CCU4_SLICE_EnableEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_EnableFloatingPrescaler (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableMultiChannelMode (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableMultipleEvents (XMC_CCU4_SLICE_t *const slice, const uint16_t intr_mask)
void | XMC_CCU4_SLICE_EnableTrap (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_GateConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
uint32_t | XMC_CCU4_SLICE_GetCapturedValueFromFifo (const XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_CAP_REG_SET_t set)
uint32_t | XMC_CCU4_SLICE_GetCaptureRegisterValue (const XMC_CCU4_SLICE_t *const slice, const uint8_t reg_num)
XMC_CCU4_SLICE_TIMER_COUNT_DIR_t | XMC_CCU4_SLICE_GetCountingDir (const XMC_CCU4_SLICE_t *const slice)
bool | XMC_CCU4_SLICE_GetEvent (const XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
XMC_CCU4_STATUS_t | XMC_CCU4_SLICE_GetLastCapturedTimerValue (const XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_CAP_REG_SET_t set, uint32_t *val_ptr)
XMC_CCU4_SLICE_MODE_t | XMC_CCU4_SLICE_GetSliceMode (const XMC_CCU4_SLICE_t *const slice)
uint16_t | XMC_CCU4_SLICE_GetTimerCompareMatch (const XMC_CCU4_SLICE_t *const slice)
XMC_CCU4_SLICE_TIMER_COUNT_MODE_t | XMC_CCU4_SLICE_GetTimerCountingMode (const XMC_CCU4_SLICE_t *const slice)
uint16_t | XMC_CCU4_SLICE_GetTimerPeriodMatch (const XMC_CCU4_SLICE_t *const slice)
XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t | XMC_CCU4_SLICE_GetTimerRepeatMode (const XMC_CCU4_SLICE_t *const slice)
uint16_t | XMC_CCU4_SLICE_GetTimerValue (const XMC_CCU4_SLICE_t *const slice)
bool | XMC_CCU4_SLICE_IsExtendedCapReadEnabled (const XMC_CCU4_SLICE_t *const slice)
bool | XMC_CCU4_SLICE_IsTimerRunning (const XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_LoadConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_ModulationConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_MODULATION_MODE_t mod_mode, const bool synch_with_pwm)
void | XMC_CCU4_SLICE_SetDitherCompareValue (XMC_CCU4_SLICE_t *const slice, const uint8_t comp_val)
void | XMC_CCU4_SLICE_SetEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue (XMC_CCU4_SLICE_t *const slice, const uint8_t cmp_val)
void | XMC_CCU4_SLICE_SetInput (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_INPUT_t input)
void | XMC_CCU4_SLICE_SetInterruptNode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event, const XMC_CCU4_SLICE_SR_ID_t sr)
void | XMC_CCU4_SLICE_SetPassiveLevel (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t level)
void | XMC_CCU4_SLICE_SetPrescaler (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_PRESCALER_t div_val)
void | XMC_CCU4_SLICE_SetShadowTransferMode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t shadow_transfer_mode)
void | XMC_CCU4_SLICE_SetTimerCompareMatch (XMC_CCU4_SLICE_t *const slice, const uint16_t compare_val)
void | XMC_CCU4_SLICE_SetTimerCountingMode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_TIMER_COUNT_MODE_t mode)
void | XMC_CCU4_SLICE_SetTimerPeriodMatch (XMC_CCU4_SLICE_t *const slice, const uint16_t period_val)
void | XMC_CCU4_SLICE_SetTimerRepeatMode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t mode)
void | XMC_CCU4_SLICE_SetTimerValue (XMC_CCU4_SLICE_t *const slice, const uint16_t timer_val)
void | XMC_CCU4_SLICE_StartConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_START_MODE_t start_mode)
void | XMC_CCU4_SLICE_StartTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_StatusBitOverrideConfig (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_StopClearTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_StopConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_END_MODE_t end_mode)
void | XMC_CCU4_SLICE_StopTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_TrapConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_TRAP_EXIT_MODE_t exit_mode, bool synch_with_pwm)
void | XMC_CCU4_SLICE_WriteCoherentlyWithPWMCycle (XMC_CCU4_SLICE_t *const slice, const uint32_t coherent_write)
void | XMC_CCU4_SLICE_WriteImmediateAfterShadowTransfer (XMC_CCU4_SLICE_t *const slice, const uint32_t immediate_write)
void | XMC_CCU4_StartPrescaler (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_StopPrescaler (XMC_CCU4_MODULE_t *const module)

Detailed Description

Date
2017-04-27
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_ccu8.h File Reference

  • File List
  • Globals
  • inc
Data Structures | Typedefs | Enumerations | Functions
xmc_ccu8.h File Reference
#include "xmc_common.h"
#include "xmc1_ccu8_map.h"
#include "xmc4_ccu8_map.h"
Include dependency graph for xmc_ccu8.h:

Data Structures

struct | XMC_CCU8_SLICE_CAPTURE_CONFIG_t
struct | XMC_CCU8_SLICE_COMPARE_CONFIG_t
struct | XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t
struct | XMC_CCU8_SLICE_EVENT_CONFIG_t

Typedefs

typedef CCU8_GLOBAL_TypeDef | XMC_CCU8_MODULE_t
typedef uint8_t | XMC_CCU8_SLICE_INPUT_t
typedef CCU8_CC8_TypeDef | XMC_CCU8_SLICE_t

Enumerations

Functions

void | XMC_CCU8_DisableClock (XMC_CCU8_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU8_DisableModule (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_EnableClock (XMC_CCU8_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU8_EnableModule (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_EnableMultipleClocks (XMC_CCU8_MODULE_t *const module, const uint8_t clock_mask)
void | XMC_CCU8_EnableShadowTransfer (XMC_CCU8_MODULE_t *const module, const uint32_t shadow_transfer_msk)
void | XMC_CCU8_Init (XMC_CCU8_MODULE_t *const module, const XMC_CCU8_SLICE_MCMS_ACTION_t mcs_action)
bool | XMC_CCU8_IsPrescalerRunning (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_SetModuleClock (XMC_CCU8_MODULE_t *const module, const XMC_CCU8_CLOCK_t clock)
void | XMC_CCU8_SetMultiChannelShadowTransferMode (XMC_CCU8_MODULE_t *const module, const uint32_t slice_mode_msk)
void | XMC_CCU8_SLICE_Capture0Config (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_Capture1Config (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_CaptureInit (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_CAPTURE_CONFIG_t *const capture_init)
void | XMC_CCU8_SLICE_ClearEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_ClearTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_CompareInit (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CONFIG_t *const compare_init)
void | XMC_CCU8_SLICE_ConfigureDeadTime (XMC_CCU8_SLICE_t *const slice, const uint8_t mask)
void | XMC_CCU8_SLICE_ConfigureEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_EVENT_CONFIG_t *config)
void | XMC_CCU8_SLICE_ConfigureStatusBitOutput (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_STATUS_t channel)
void | XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_CONFIG_t *const ev1_config, const XMC_CCU8_SLICE_EVENT_CONFIG_t *const ev2_config)
void | XMC_CCU8_SLICE_CountConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_DeadTimeInit (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t *const config)
void | XMC_CCU8_SLICE_DirectionConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest (XMC_CCU8_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU8_SLICE_DisableCascadedShadowTransfer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_DisableDithering (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_DisableEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_DisableFloatingPrescaler (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_DisableMultiChannelMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
void | XMC_CCU8_SLICE_DisableMultipleEvents (XMC_CCU8_SLICE_t *const slice, const uint16_t mask)
void | XMC_CCU8_SLICE_DisableTrap (XMC_CCU8_SLICE_t *const slice, const uint32_t out_mask)
void | XMC_CCU8_SLICE_EnableAsymmetricCompareMode (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest (XMC_CCU8_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU8_SLICE_EnableCascadedShadowTransfer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableDithering (XMC_CCU8_SLICE_t *const slice, const bool period_dither, const bool duty_dither, const uint8_t spread)
void | XMC_CCU8_SLICE_EnableEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_EnableFloatingPrescaler (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableMultiChannelMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
void | XMC_CCU8_SLICE_EnableMultipleEvents (XMC_CCU8_SLICE_t *const slice, const uint16_t mask)
void | XMC_CCU8_SLICE_EnableSymmetricCompareMode (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableTrap (XMC_CCU8_SLICE_t *const slice, const uint32_t out_mask)
void | XMC_CCU8_SLICE_GateConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
uint32_t | XMC_CCU8_SLICE_GetCapturedValueFromFifo (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_CAP_REG_SET_t set)
uint32_t | XMC_CCU8_SLICE_GetCaptureRegisterValue (const XMC_CCU8_SLICE_t *const slice, const uint8_t reg_num)
XMC_CCU8_SLICE_TIMER_COUNT_DIR_t | XMC_CCU8_SLICE_GetCountingDir (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_GetEvent (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
XMC_CCU8_STATUS_t | XMC_CCU8_SLICE_GetLastCapturedTimerValue (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_CAP_REG_SET_t set, uint32_t *val_ptr)
XMC_CCU8_SLICE_MODE_t | XMC_CCU8_SLICE_GetSliceMode (const XMC_CCU8_SLICE_t *const slice)
uint16_t | XMC_CCU8_SLICE_GetTimerCompareMatch (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel)
XMC_CCU8_SLICE_TIMER_COUNT_MODE_t | XMC_CCU8_SLICE_GetTimerCountingMode (const XMC_CCU8_SLICE_t *const slice)
uint16_t | XMC_CCU8_SLICE_GetTimerPeriodMatch (const XMC_CCU8_SLICE_t *const slice)
XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t | XMC_CCU8_SLICE_GetTimerRepeatMode (const XMC_CCU8_SLICE_t *const slice)
uint16_t | XMC_CCU8_SLICE_GetTimerValue (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsDeadTimeCntr1Running (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsDeadTimeCntr2Running (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsExtendedCapReadEnabled (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsTimerRunning (const XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_LoadConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_LoadSelector (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
void | XMC_CCU8_SLICE_ModulationConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_MODULATION_MODE_t mod_mode, const XMC_CCU8_SLICE_MODULATION_CHANNEL_t channel, const bool synch_with_pwm)
void | XMC_CCU8_SLICE_SetDeadTimePrescaler (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_DTC_DIV_t div_val)
void | XMC_CCU8_SLICE_SetDeadTimeValue (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel, const uint8_t rise_value, const uint8_t fall_value)
void | XMC_CCU8_SLICE_SetDitherCompareValue (XMC_CCU8_SLICE_t *const slice, const uint8_t comp_val)
void | XMC_CCU8_SLICE_SetEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue (XMC_CCU8_SLICE_t *const slice, const uint8_t cmp_val)
void | XMC_CCU8_SLICE_SetInput (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_INPUT_t input)
void | XMC_CCU8_SLICE_SetInterruptNode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event, const XMC_CCU8_SLICE_SR_ID_t sr)
void | XMC_CCU8_SLICE_SetOutPath (XMC_CCU8_SLICE_t *const slice, const uint32_t out_path_msk)
void | XMC_CCU8_SLICE_SetPassiveLevel (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_OUTPUT_t out, const XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t level)
void | XMC_CCU8_SLICE_SetPrescaler (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_PRESCALER_t div_val)
void | XMC_CCU8_SLICE_SetShadowTransferMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t shadow_transfer_mode)
void | XMC_CCU8_SLICE_SetTimerCompareMatch (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel, const uint16_t compare_val)
void | XMC_CCU8_SLICE_SetTimerCompareMatchChannel1 (XMC_CCU8_SLICE_t *const slice, const uint16_t compare_val)
void | XMC_CCU8_SLICE_SetTimerCompareMatchChannel2 (XMC_CCU8_SLICE_t *const slice, const uint16_t compare_val)
void | XMC_CCU8_SLICE_SetTimerCountingMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TIMER_COUNT_MODE_t mode)
void | XMC_CCU8_SLICE_SetTimerPeriodMatch (XMC_CCU8_SLICE_t *const slice, const uint16_t period_val)
void | XMC_CCU8_SLICE_SetTimerRepeatMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t mode)
void | XMC_CCU8_SLICE_SetTimerValue (XMC_CCU8_SLICE_t *const slice, const uint16_t timer_val)
void | XMC_CCU8_SLICE_StartConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_START_MODE_t start_mode)
void | XMC_CCU8_SLICE_StartTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_StatusBitOverrideConfig (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_StopClearTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_StopConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_END_MODE_t end_mode)
void | XMC_CCU8_SLICE_StopTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_TrapConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TRAP_EXIT_MODE_t exit_mode, bool synch_with_pwm)
void | XMC_CCU8_SLICE_WriteCoherentlyWithPWMCycle (XMC_CCU8_SLICE_t *const slice, const uint32_t coherent_write)
void | XMC_CCU8_SLICE_WriteImmediateAfterShadowTransfer (XMC_CCU8_SLICE_t *const slice, const uint32_t immediate_write)
void | XMC_CCU8_StartPrescaler (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_StopPrescaler (XMC_CCU8_MODULE_t *const module)

Detailed Description

Date
2017-04-27
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_dac.h File Reference

  • File List
  • Globals
  • inc
Data Structures | Macros | Enumerations | Functions
xmc_dac.h File Reference
#include <xmc_common.h>
Include dependency graph for xmc_dac.h:

Data Structures

struct | XMC_DAC_CH_CONFIG_t
struct | XMC_DAC_t

Macros

#define | XMC_DAC0 ((XMC_DAC_t *)DAC_BASE)
#define | XMC_DAC_NO_CHANNELS (2U)
#define | XMC_DAC_PATTERN_RECTANGLE {31U, 31U, 31U, 31U, 31U, 31U, 31U, 31U, 31U}
#define | XMC_DAC_PATTERN_SINE {0U, 6U, 12U, 17U, 22U, 26U, 29U, 30U, 31U}
#define | XMC_DAC_PATTERN_TRIANGLE {0U, 4U, 8U, 12U, 16U, 19U, 23U, 27U, 31U}
#define | XMC_DAC_SAMPLES_PER_PERIOD (32U)

Enumerations

Functions

void | XMC_DAC_CH_DisableEvent (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_DisableOutput (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_DisableOutputNegation (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_DisablePatternSignOutput (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_EnableEvent (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_EnableOutput (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_EnableOutputNegation (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_EnablePatternSignOutput (XMC_DAC_t *const dac, const uint8_t channel)
XMC_DAC_CH_OUTPUT_SCALE_t | XMC_DAC_CH_GetOutputScale (XMC_DAC_t *const dac, const uint8_t channel)
uint16_t | XMC_DAC_CH_GetRampStart (XMC_DAC_t *const dac, const uint8_t channel)
uint16_t | XMC_DAC_CH_GetRampStop (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_Init (XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_CONFIG_t *const config)
bool | XMC_DAC_CH_IsFifoEmpty (const XMC_DAC_t *const dac, const uint8_t channel)
bool | XMC_DAC_CH_IsFifoFull (const XMC_DAC_t *const dac, const uint8_t channel)
bool | XMC_DAC_CH_IsOutputEnabled (const XMC_DAC_t *const dac, const uint8_t channel)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_SetFrequency (XMC_DAC_t *const dac, const uint8_t channel, const uint32_t frequency)
void | XMC_DAC_CH_SetMode (XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_MODE_t mode)
void | XMC_DAC_CH_SetOutputOffset (XMC_DAC_t *const dac, const uint8_t channel, const uint8_t offset)
void | XMC_DAC_CH_SetOutputScale (XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_OUTPUT_SCALE_t scale)
void | XMC_DAC_CH_SetPattern (XMC_DAC_t *const dac, const uint8_t channel, const uint8_t *const pattern)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_SetPatternFrequency (XMC_DAC_t *const dac, const uint8_t channel, const uint32_t frequency)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_SetRampFrequency (XMC_DAC_t *const dac, const uint8_t channel, const uint32_t frequency)
void | XMC_DAC_CH_SetRampStart (XMC_DAC_t *const dac, const uint8_t channel, const uint16_t start)
void | XMC_DAC_CH_SetRampStop (XMC_DAC_t *const dac, const uint8_t channel, const uint16_t stop)
void | XMC_DAC_CH_SetSignedDataType (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_SetTrigger (XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_TRIGGER_t trigger)
void | XMC_DAC_CH_SetUnsignedDataType (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_SoftwareTrigger (XMC_DAC_t *const dac, const uint8_t channel)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_StartDataMode (XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_TRIGGER_t trigger, const uint32_t frequency)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_StartNoiseMode (XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_TRIGGER_t trigger, const uint32_t frequency)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_StartPatternMode (XMC_DAC_t *const dac, const uint8_t channel, const uint8_t *const pattern, const XMC_DAC_CH_PATTERN_SIGN_OUTPUT_t sign_output, const XMC_DAC_CH_TRIGGER_t trigger, const uint32_t frequency)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_StartRampMode (XMC_DAC_t *const dac, const uint8_t channel, const uint16_t start, const uint16_t stop, const XMC_DAC_CH_TRIGGER_t trigger, const uint32_t frequency)
XMC_DAC_CH_STATUS_t | XMC_DAC_CH_StartSingleValueMode (XMC_DAC_t *const dac, const uint8_t channel)
void | XMC_DAC_CH_Write (XMC_DAC_t *const dac, const uint8_t channel, const uint16_t data)
void | XMC_DAC_Disable (XMC_DAC_t *const dac)
void | XMC_DAC_DisableSimultaneousDataMode (XMC_DAC_t *const dac)
void | XMC_DAC_Enable (XMC_DAC_t *const dac)
void | XMC_DAC_EnableSimultaneousDataMode (XMC_DAC_t *const dac)
bool | XMC_DAC_IsEnabled (const XMC_DAC_t *const dac)
void | XMC_DAC_SimultaneousWrite (XMC_DAC_t *const dac, const uint16_t data0, const uint16_t data1)

Detailed Description

Date
2015-08-31
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_dma.h File Reference

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xmc_dma.h File Reference
#include "xmc_common.h"
#include "xmc_dma_map.h"
Include dependency graph for xmc_dma.h:

Data Structures

struct | GPDMA_CH_t
struct | XMC_DMA_CH_CONFIG_t
struct | XMC_DMA_LLI_t
struct | XMC_DMA_t

Macros

#define | XMC_DMA0 ((XMC_DMA_t *)GPDMA0_CH0_BASE)
#define | XMC_DMA1 ((XMC_DMA_t *)GPDMA1_CH0_BASE)

Typedefs

typedef void(* | XMC_DMA_CH_EVENT_HANDLER_t) (XMC_DMA_CH_EVENT_t event)
typedef XMC_DMA_LLI_t ** | XMC_DMA_LIST_t

Enumerations

Functions

void | XMC_DMA_CH_ClearDestinationPeripheralRequest (XMC_DMA_t *const dma, uint8_t channel)
void | XMC_DMA_CH_ClearEventStatus (XMC_DMA_t *const dma, const uint8_t channel, const uint32_t event)
void | XMC_DMA_CH_ClearSourcePeripheralRequest (XMC_DMA_t *const dma, uint8_t channel)
void | XMC_DMA_CH_Disable (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_DisableDestinationAddressReload (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_DisableDestinationScatter (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_DisableEvent (XMC_DMA_t *const dma, const uint8_t channel, const uint32_t event)
void | XMC_DMA_CH_DisableSourceAddressReload (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_DisableSourceGather (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_Enable (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_EnableDestinationAddressReload (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_EnableDestinationScatter (XMC_DMA_t *const dma, const uint8_t channel, uint32_t interval, uint16_t count)
void | XMC_DMA_CH_EnableEvent (XMC_DMA_t *const dma, const uint8_t channel, const uint32_t event)
void | XMC_DMA_CH_EnableSourceAddressReload (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_EnableSourceGather (XMC_DMA_t *const dma, const uint8_t channel, uint32_t interval, uint16_t count)
uint32_t | XMC_DMA_CH_GetEventStatus (XMC_DMA_t *const dma, const uint8_t channel)
XMC_DMA_CH_STATUS_t | XMC_DMA_CH_Init (XMC_DMA_t *const dma, const uint8_t channel, const XMC_DMA_CH_CONFIG_t *const config)
bool | XMC_DMA_CH_IsEnabled (XMC_DMA_t *const dma, const uint8_t channel)
bool | XMC_DMA_CH_IsSuspended (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_RequestLastMultiblockTransfer (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_Resume (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_SetBlockSize (XMC_DMA_t *const dma, const uint8_t channel, uint32_t block_size)
void | XMC_DMA_CH_SetDestinationAddress (XMC_DMA_t *const dma, const uint8_t channel, uint32_t addr)
void | XMC_DMA_CH_SetEventHandler (XMC_DMA_t *const dma, const uint8_t channel, XMC_DMA_CH_EVENT_HANDLER_t event_handler)
void | XMC_DMA_CH_SetLinkedListPointer (XMC_DMA_t *const dma, const uint8_t channel, XMC_DMA_LLI_t *ll_ptr)
void | XMC_DMA_CH_SetSourceAddress (XMC_DMA_t *const dma, const uint8_t channel, uint32_t addr)
void | XMC_DMA_CH_Suspend (XMC_DMA_t *const dma, const uint8_t channel)
void | XMC_DMA_CH_TriggerDestinationRequest (XMC_DMA_t *const dma, const uint8_t channel, const XMC_DMA_CH_TRANSACTION_TYPE_t type, bool last)
void | XMC_DMA_CH_TriggerSourceRequest (XMC_DMA_t *const dma, const uint8_t channel, const XMC_DMA_CH_TRANSACTION_TYPE_t type, bool last)
void | XMC_DMA_ClearOverrunStatus (XMC_DMA_t *const dma, const uint8_t line)
void | XMC_DMA_ClearRequestLine (XMC_DMA_t *const dma, uint8_t line)
void | XMC_DMA_Disable (XMC_DMA_t *const dma)
void | XMC_DMA_DisableRequestLine (XMC_DMA_t *const dma, uint8_t line)
void | XMC_DMA_Enable (XMC_DMA_t *const dma)
void | XMC_DMA_EnableRequestLine (XMC_DMA_t *const dma, uint8_t line, uint8_t peripheral)
uint32_t | XMC_DMA_GetChannelsBlockCompleteStatus (XMC_DMA_t *const dma)
uint32_t | XMC_DMA_GetChannelsDestinationTransactionCompleteStatus (XMC_DMA_t *const dma)
uint32_t | XMC_DMA_GetChannelsErrorStatus (XMC_DMA_t *const dma)
uint32_t | XMC_DMA_GetChannelsSourceTransactionCompleteStatus (XMC_DMA_t *const dma)
uint32_t | XMC_DMA_GetChannelsTransferCompleteStatus (XMC_DMA_t *const dma)
uint32_t | XMC_DMA_GetEventStatus (XMC_DMA_t *const dma)
bool | XMC_DMA_GetOverrunStatus (XMC_DMA_t *const dma, const uint8_t line)
void | XMC_DMA_Init (XMC_DMA_t *const dma)
void | XMC_DMA_IRQHandler (XMC_DMA_t *const dma)
bool | XMC_DMA_IsEnabled (const XMC_DMA_t *const dma)

Detailed Description

Date
2016-10-28
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_dsd.h File Reference

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xmc_dsd.h File Reference
#include <xmc_common.h>
#include <xmc_scu.h>
Include dependency graph for xmc_dsd.h:

Data Structures

struct | XMC_DSD_CH_AUX_FILTER_CONFIG_t
struct | XMC_DSD_CH_CONFIG_t
struct | XMC_DSD_CH_FILTER_CONFIG_t
struct | XMC_DSD_CH_INTEGRATOR_CONFIG_t
struct | XMC_DSD_CH_RECTIFY_CONFIG_t
struct | XMC_DSD_CH_TIMESTAMP_CONFIG_t
struct | XMC_DSD_GENERATOR_CONFIG_t

Typedefs

typedef DSD_CH_TypeDef | XMC_DSD_CH_t
typedef DSD_GLOBAL_TypeDef | XMC_DSD_t

Enumerations

Functions

void | XMC_DSD_CH_AuxFilter_DisableEvent (XMC_DSD_CH_t *const channel)
void | XMC_DSD_CH_AuxFilter_EnableEvent (XMC_DSD_CH_t *const channel, XMC_DSD_CH_AUX_EVENT_t event)
void | XMC_DSD_CH_AuxFilter_Init (XMC_DSD_CH_t *const channel, const XMC_DSD_CH_AUX_FILTER_CONFIG_t *const init)
void | XMC_DSD_CH_AuxFilter_SetBoundary (XMC_DSD_CH_t *const channel, const int16_t lower_boundary, const int16_t upper_boundary)
void | XMC_DSD_CH_GetRectifyDelay (XMC_DSD_CH_t *const channel, uint8_t *delay)
void | XMC_DSD_CH_GetResult (XMC_DSD_CH_t *const channel, int16_t *dsd_Result)
void | XMC_DSD_CH_GetResult_AUX (XMC_DSD_CH_t *const channel, int16_t *dsd_Result)
void | XMC_DSD_CH_GetResult_TS (XMC_DSD_CH_t *const channel, int16_t *dsd_Result, uint8_t *dsd_filter_loop, uint8_t *dsd_integration_loop)
void | XMC_DSD_CH_GetResult_TS_Time (XMC_DSD_CH_t *const channel, int16_t *dsd_Result, uint32_t *time)
XMC_DSD_STATUS_t | XMC_DSD_CH_Init (XMC_DSD_CH_t *const channel, const XMC_DSD_CH_CONFIG_t *const init)
void | XMC_DSD_CH_Integrator_Init (XMC_DSD_CH_t *const channel, const XMC_DSD_CH_INTEGRATOR_CONFIG_t *const init)
void | XMC_DSD_CH_MainFilter_DisableEvent (XMC_DSD_CH_t *const channel)
void | XMC_DSD_CH_MainFilter_EnableEvent (XMC_DSD_CH_t *const channel)
void | XMC_DSD_CH_MainFilter_Init (XMC_DSD_CH_t *const channel, const XMC_DSD_CH_FILTER_CONFIG_t *const init)
void | XMC_DSD_CH_MainFilter_SetOffset (XMC_DSD_CH_t *const channel, const int16_t offset)
void | XMC_DSD_CH_Rectify_Init (XMC_DSD_CH_t *const channel, const XMC_DSD_CH_RECTIFY_CONFIG_t *const init)
void | XMC_DSD_CH_Timestamp_Init (XMC_DSD_CH_t *const channel, const XMC_DSD_CH_TIMESTAMP_CONFIG_t *const init)
void | XMC_DSD_ClearAlarmEventFlag (XMC_DSD_t *const dsd, const uint32_t channel_id)
void | XMC_DSD_ClearResultEventFlag (XMC_DSD_t *const dsd, const uint32_t channel_id)
void | XMC_DSD_Disable (XMC_DSD_t *const dsd)
void | XMC_DSD_DisableClock (XMC_DSD_t *const dsd)
void | XMC_DSD_Enable (XMC_DSD_t *const dsd)
void | XMC_DSD_EnableClock (XMC_DSD_t *const dsd)
void | XMC_DSD_Generator_Init (XMC_DSD_t *const dsd, const XMC_DSD_GENERATOR_CONFIG_t *const init)
void | XMC_DSD_Generator_Start (XMC_DSD_t *const dsd, const XMC_DSD_GENERATOR_CONFIG_t *const config)
void | XMC_DSD_Generator_Stop (XMC_DSD_t *const dsd)
void | XMC_DSD_Init (XMC_DSD_t *const dsd)
bool | XMC_DSD_IsChannelStarted (XMC_DSD_t *const dsd, const XMC_DSD_CH_ID_t channel)
bool | XMC_DSD_IsEnabled (XMC_DSD_t *const dsd)
void | XMC_DSD_SetAlarmEventFlag (XMC_DSD_t *const dsd, const uint32_t channel_id)
void | XMC_DSD_SetResultEventFlag (XMC_DSD_t *const dsd, const uint32_t channel_id)
void | XMC_DSD_Start (XMC_DSD_t *const dsd, const uint32_t channel)
void | XMC_DSD_Stop (XMC_DSD_t *const dsd, const uint32_t channel)

Detailed Description

Date
2015-09-18
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_ebu.h File Reference

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xmc_ebu.h File Reference
#include <xmc_common.h>
#include <xmc_scu.h>
Include dependency graph for xmc_ebu.h:

Data Structures

struct | XMC_EBU_BUS_READ_CONFIG_t
struct | XMC_EBU_BUS_WRITE_CONFIG_t
struct | XMC_EBU_CLK_CONFIG_t
struct | XMC_EBU_CONFIG_t
struct | XMC_EBU_FREE_PINS_TO_GPIO_t
struct | XMC_EBU_MODE_CONFIG_t
struct | XMC_EBU_REGION_READ_CONFIG_t
struct | XMC_EBU_REGION_t
struct | XMC_EBU_REGION_WRITE_CONFIG_t
struct | XMC_EBU_SDRAM_CONFIG_t
struct | XMC_EBU_t

Macros

#define XMC_EBU ((XMC_EBU_t *)EBU_BASE)

Enumerations

Functions

void | XMC_EBU_AddressSelectDisable (XMC_EBU_t *const ebu, uint32_t ebu_addr_select_dis, const uint32_t ebu_region_n)
void | XMC_EBU_AddressSelectEnable (XMC_EBU_t *const ebu, uint32_t ebu_addr_select_en, const uint32_t ebu_region_n)
void | XMC_EBU_CLKDivideRatio (XMC_EBU_t *ebu, XMC_EBU_CLOCK_DIVIDE_RATIO_t clock_divide_ratio)
void | XMC_EBU_ConfigureRegion (XMC_EBU_t *const ebu, const XMC_EBU_REGION_t *const region)
void | XMC_EBU_ConfigureSdram (XMC_EBU_t *const ebu, const XMC_EBU_SDRAM_CONFIG_t *const config)
void | XMC_EBU_Disable (XMC_EBU_t *const ebu)
void | XMC_EBU_Enable (XMC_EBU_t *const ebu)
uint32_t | XMC_EBU_GetBusWriteConfStatus (XMC_EBU_t *const ebu, const XMC_EBU_BUSWCON_SELECT_t ebu_buswcon_status, const uint32_t ebu_region_n)
uint32_t | XMC_EBU_GetCLKStatus (XMC_EBU_t *const ebu, const XMC_EBU_CLK_STATUS_t clk_status)
XMC_EBU_STATUS_t | XMC_EBU_Init (XMC_EBU_t *const ebu, const XMC_EBU_CONFIG_t *const config)
bool | XMC_EBU_IsBusAribitrationSelected (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramDisableAutomaticSelfRefresh (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramDisableAutoRefreshSelfRefreshExit (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramEnableAutomaticSelfRefresh (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramEnableAutoRefreshSelfRefreshExit (XMC_EBU_t *const ebu)
uint32_t | XMC_EBU_SdramGetRefreshStatus (XMC_EBU_t *const ebu, const XMC_EBU_SDRAM_RFRSH_STATUS_t sdram_rfrsh_status)
uint32_t | XMC_EBU_SdramGetStatus (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramResetSelfRefreshEntry (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramResetSelfRefreshExit (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramSetSelfRefreshEntry (XMC_EBU_t *const ebu)
void | XMC_EBU_SdramSetSelfRefreshExit (XMC_EBU_t *const ebu)

Detailed Description

Date
2017-06-24
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_ecat.h File Reference

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xmc_ecat.h File Reference
#include "xmc_common.h"
#include "xmc_ecat_map.h"
Include dependency graph for xmc_ecat.h:

Data Structures

union | XMC_ECAT_CONFIG_t
struct | XMC_ECAT_PORT_CTRL_t

Enumerations

Functions

void | XMC_ECAT_Disable (void)
void | XMC_ECAT_DisableEvent (uint32_t event)
void | XMC_ECAT_DisableSyncManChannel (const uint8_t channel)
void | XMC_ECAT_Enable (void)
void | XMC_ECAT_EnableEvent (uint32_t event)
void | XMC_ECAT_EnableSyncManChannel (const uint8_t channel)
uint16_t | XMC_ECAT_GetALEventMask (void)
uint16_t | XMC_ECAT_GetALEventRegister (void)
uint32_t | XMC_ECAT_GetEventStatus (void)
void | XMC_ECAT_Init (XMC_ECAT_CONFIG_t *const config)
XMC_ECAT_STATUS_t | XMC_ECAT_ReadPhy (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
void | XMC_ECAT_SetALEventMask (uint16_t intMask)
void | XMC_ECAT_SetPortControl (const XMC_ECAT_PORT_CTRL_t port_ctrl)
XMC_ECAT_STATUS_t | XMC_ECAT_WritePhy (uint8_t phy_addr, uint8_t reg_addr, uint16_t data)

Detailed Description

Date
2015-12-27
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_eru.h File Reference

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xmc_eru.h File Reference
#include "xmc_common.h"
#include "xmc1_eru_map.h"
#include "xmc4_eru_map.h"
Include dependency graph for xmc_eru.h:

Data Structures

struct | XMC_ERU_ETL_CONFIG_t
union | XMC_ERU_OGU_CONFIG_t
struct | XMC_ERU_t

Enumerations

Functions

void | XMC_ERU_Disable (XMC_ERU_t *const eru)
void | XMC_ERU_Enable (XMC_ERU_t *const eru)
void | XMC_ERU_ETL_ClearStatusFlag (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_DisableOutputTrigger (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_EnableOutputTrigger (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t trigger)
XMC_ERU_ETL_EDGE_DETECTION_t | XMC_ERU_ETL_GetEdgeDetection (XMC_ERU_t *const eru, const uint8_t channel)
uint32_t | XMC_ERU_ETL_GetStatusFlag (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_Init (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_CONFIG_t *const config)
void | XMC_ERU_ETL_SetEdgeDetection (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_EDGE_DETECTION_t edge_detection)
void | XMC_ERU_ETL_SetInput (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_INPUT_A_t input_a, const XMC_ERU_ETL_INPUT_B_t input_b)
void | XMC_ERU_ETL_SetSource (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_SOURCE_t source)
void | XMC_ERU_ETL_SetStatusFlag (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_SetStatusFlagMode (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_STATUS_FLAG_MODE_t mode)
void | XMC_ERU_OGU_DisablePatternDetection (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_OGU_DisablePeripheralTrigger (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_OGU_EnablePatternDetection (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t input)
void | XMC_ERU_OGU_EnablePeripheralTrigger (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_PERIPHERAL_TRIGGER_t peripheral_trigger)
uint32_t | XMC_ERU_OGU_GetPatternDetectionStatus (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_OGU_Init (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_CONFIG_t *const config)
void | XMC_ERU_OGU_SetServiceRequestMode (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_SERVICE_REQUEST_t mode)

Detailed Description

Date
2016-03-10
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_eth_mac.h File Reference

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xmc_eth_mac.h File Reference
#include "xmc_common.h"
#include "xmc_eth_mac_map.h"
Include dependency graph for xmc_eth_mac.h:

Data Structures

struct | XMC_ETH_MAC_DMA_DESC_t
union | XMC_ETH_MAC_PORT_CTRL_t
struct | XMC_ETH_MAC_t
struct | XMC_ETH_MAC_TIME_t

Macros

#define | ETH_MAC_DMA_RDES0_AFM (0x40000000U)
#define | ETH_MAC_DMA_RDES0_CE (0x00000002U)
#define | ETH_MAC_DMA_RDES0_DBE (0x00000004U)
#define | ETH_MAC_DMA_RDES0_DE (0x00004000U)
#define | ETH_MAC_DMA_RDES0_ES (0x00008000U)
#define | ETH_MAC_DMA_RDES0_ESA (0x00000001U)
#define | ETH_MAC_DMA_RDES0_FL (0x3FFF0000U)
#define | ETH_MAC_DMA_RDES0_FS (0x00000200U)
#define | ETH_MAC_DMA_RDES0_FT (0x00000020U)
#define | ETH_MAC_DMA_RDES0_LC (0x00000040U)
#define | ETH_MAC_DMA_RDES0_LE (0x00001000U)
#define | ETH_MAC_DMA_RDES0_LS (0x00000100U)
#define | ETH_MAC_DMA_RDES0_OE (0x00000800U)
#define | ETH_MAC_DMA_RDES0_OWN (0x80000000U)
#define | ETH_MAC_DMA_RDES0_RE (0x00000008U)
#define | ETH_MAC_DMA_RDES0_RWT (0x00000010U)
#define | ETH_MAC_DMA_RDES0_SAF (0x00002000U)
#define | ETH_MAC_DMA_RDES0_TSA (0x00000080U)
#define | ETH_MAC_DMA_RDES0_VLAN (0x00000400U)
#define | ETH_MAC_DMA_TDES0_CC (0x00000078U)
#define | ETH_MAC_DMA_TDES0_CIC (0x00C00000U)
#define | ETH_MAC_DMA_TDES0_DB (0x00000001U)
#define | ETH_MAC_DMA_TDES0_DC (0x08000000U)
#define | ETH_MAC_DMA_TDES0_DP (0x04000000U)
#define | ETH_MAC_DMA_TDES0_EC (0x00000100U)
#define | ETH_MAC_DMA_TDES0_ED (0x00000004U)
#define | ETH_MAC_DMA_TDES0_ES (0x00008000U)
#define | ETH_MAC_DMA_TDES0_FF (0x00002000U)
#define | ETH_MAC_DMA_TDES0_FS (0x10000000U)
#define | ETH_MAC_DMA_TDES0_IC (0x40000000U)
#define | ETH_MAC_DMA_TDES0_IHE (0x00010000U)
#define | ETH_MAC_DMA_TDES0_IPE (0x00001000U)
#define | ETH_MAC_DMA_TDES0_JT (0x00004000U)
#define | ETH_MAC_DMA_TDES0_LC (0x00000200U)
#define | ETH_MAC_DMA_TDES0_LOC (0x00000800U)
#define | ETH_MAC_DMA_TDES0_LS (0x20000000U)
#define | ETH_MAC_DMA_TDES0_NC (0x00000400U)
#define | ETH_MAC_DMA_TDES0_OWN (0x80000000U)
#define | ETH_MAC_DMA_TDES0_TCH (0x00100000U)
#define | ETH_MAC_DMA_TDES0_TER (0x00200000U)
#define | ETH_MAC_DMA_TDES0_TTSE (0x02000000U)
#define | ETH_MAC_DMA_TDES0_TTSS (0x00020000U)
#define | ETH_MAC_DMA_TDES0_UF (0x00000002U)
#define | ETH_MAC_DMA_TDES0_VF (0x00000080U)
#define | XMC_ETH_MAC_BUF_SIZE (1524)
#define | XMC_ETH_MAC_PHY_MAX_RETRIES (0xffffUL)
#define | XMC_ETH_WAKEUP_REGISTER_LENGTH (8U)

Enumerations

Functions

void | XMC_ETH_MAC_AdjustPTPClock (XMC_ETH_MAC_t *const eth_mac, uint32_t correction)
void | XMC_ETH_MAC_ClearEventStatus (XMC_ETH_MAC_t *const eth_mac, uint32_t event)
void | XMC_ETH_MAC_Disable (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableDestinationAddressInverseFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableEvent (XMC_ETH_MAC_t *const eth_mac, uint32_t event)
void | XMC_ETH_MAC_DisableFrameBurst (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableFrameFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableJumboFrame (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableLoopback (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableMulticastHashFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisablePowerDownMode (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisablePowerManagmentEvent (XMC_ETH_MAC_t *const eth_mac, uint32_t event)
void | XMC_ETH_MAC_DisablePromiscuousMode (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisablePTPAlarm (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableReceptionBroadcastFrames (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableReceptionMulticastFrames (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableRx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableRxOwn (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableRxWatchdog (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableSourceAddressFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableSourceAddressInverseFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableTx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableTxJabber (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_DisableUnicastHashFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_Enable (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableDestinationAddressInverseFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableEvent (XMC_ETH_MAC_t *const eth_mac, uint32_t event)
void | XMC_ETH_MAC_EnableFrameBurst (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableFrameFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableHashPerfectFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableJumboFrame (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableLoopback (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableMulticastHashFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnablePerfectFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnablePowerDownMode (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnablePowerManagmentEvent (XMC_ETH_MAC_t *const eth_mac, uint32_t event)
void | XMC_ETH_MAC_EnablePromiscuousMode (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnablePTPAlarm (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableReceptionBroadcastFrames (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableReceptionMulticastFrames (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableRx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableRxOwn (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableRxWatchdog (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableSourceAddressFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableSourceAddressInverseFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableTx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableTxJabber (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_EnableUnicastHashFilter (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_FlushRx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_FlushTx (XMC_ETH_MAC_t *const eth_mac)
uint64_t | XMC_ETH_MAC_GetAddress (XMC_ETH_MAC_t *const eth_mac)
uint32_t | XMC_ETH_MAC_GetEventStatus (const XMC_ETH_MAC_t *const eth_mac)
uint32_t | XMC_ETH_MAC_GetPTPStatus (const XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_GetPTPTime (XMC_ETH_MAC_t *const eth_mac, XMC_ETH_MAC_TIME_t *const time)
uint8_t * | XMC_ETH_MAC_GetRxBuffer (XMC_ETH_MAC_t *const eth_mac)
uint32_t | XMC_ETH_MAC_GetRxFrameSize (XMC_ETH_MAC_t *const eth_mac)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_GetRxTimeStamp (XMC_ETH_MAC_t *const eth_mac, XMC_ETH_MAC_TIME_t *const time)
uint8_t * | XMC_ETH_MAC_GetTxBuffer (XMC_ETH_MAC_t *const eth_mac)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_GetTxTimeStamp (XMC_ETH_MAC_t *const eth_mac, XMC_ETH_MAC_TIME_t *const time)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_Init (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_InitPTP (XMC_ETH_MAC_t *const eth_mac, uint32_t config)
void | XMC_ETH_MAC_InitPTPEx (XMC_ETH_MAC_t *const eth_mac, uint32_t config, XMC_ETH_MAC_TIME_t *const time)
void | XMC_ETH_MAC_InitRxDescriptors (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_InitTxDescriptors (XMC_ETH_MAC_t *const eth_mac)
bool | XMC_ETH_MAC_IsEnabled (const XMC_ETH_MAC_t *const eth_mac)
bool | XMC_ETH_MAC_IsMagicPacketReceived (XMC_ETH_MAC_t *const eth_mac)
bool | XMC_ETH_MAC_IsRxDescriptorOwnedByDma (XMC_ETH_MAC_t *const eth_mac)
bool | XMC_ETH_MAC_IsTxDescriptorOwnedByDma (XMC_ETH_MAC_t *const eth_mac)
bool | XMC_ETH_MAC_IsWakeupFrameReceived (XMC_ETH_MAC_t *const eth_mac)
uint32_t | XMC_ETH_MAC_ReadFrame (XMC_ETH_MAC_t *const eth_mac, uint8_t *const frame, uint32_t len)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_ReadPhy (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
void | XMC_ETH_MAC_Reset (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_ResumeRx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_ResumeTx (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_ReturnRxDescriptor (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_ReturnTxDescriptor (XMC_ETH_MAC_t *const eth_mac)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_SendFrame (XMC_ETH_MAC_t *const eth_mac, const uint8_t *frame, uint32_t len, uint32_t flags)
void | XMC_ETH_MAC_SetAddress (XMC_ETH_MAC_t *const eth_mac, uint64_t addr)
void | XMC_ETH_MAC_SetAddressHashFilter (XMC_ETH_MAC_t *const eth_mac, const uint64_t hash)
void | XMC_ETH_MAC_SetAddressPerfectFilter (XMC_ETH_MAC_t *const eth_mac, uint8_t index, const uint64_t addr, uint32_t flags)
void | XMC_ETH_MAC_SetLink (XMC_ETH_MAC_t *const eth_mac, XMC_ETH_LINK_SPEED_t speed, XMC_ETH_LINK_DUPLEX_t duplex)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_SetManagmentClockDivider (XMC_ETH_MAC_t *const eth_mac)
void | XMC_ETH_MAC_SetPortControl (XMC_ETH_MAC_t *const eth_mac, const XMC_ETH_MAC_PORT_CTRL_t port_ctrl)
void | XMC_ETH_MAC_SetPTPAlarm (XMC_ETH_MAC_t *const eth_mac, const XMC_ETH_MAC_TIME_t *const time)
void | XMC_ETH_MAC_SetPTPTime (XMC_ETH_MAC_t *const eth_mac, XMC_ETH_MAC_TIME_t *const time)
void | XMC_ETH_MAC_SetTxBufferSize (XMC_ETH_MAC_t *const eth_mac, uint32_t size)
void | XMC_ETH_MAC_SetVLANTag (XMC_ETH_MAC_t *const eth_mac, uint16_t tag)
void | XMC_ETH_MAC_SetWakeUpFrameFilter (XMC_ETH_MAC_t *const eth_mac, const uint32_t(*const filter)[(8U)])
void | XMC_ETH_MAC_UpdateAddend (XMC_ETH_MAC_t *const eth_mac, uint32_t addend)
void | XMC_ETH_MAC_UpdatePTPTime (XMC_ETH_MAC_t *const eth_mac, const XMC_ETH_MAC_TIME_t *const time)
XMC_ETH_MAC_STATUS_t | XMC_ETH_MAC_WritePhy (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr, uint8_t reg_addr, uint16_t data)

Detailed Description

Date
2017-08-07
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_eth_mac_map.h File Reference

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Enumerations
xmc_eth_mac_map.h File Reference

Enumerations

Detailed Description

Date
2015-06-20

Enumeration Type Documentation

enum XMC_ETH_MAC_PORT_CTRL_CLK_RMII_t

ETH MAC PHY clock

Enumerator
XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P2_1 | XMC_ETH_RMIIA PHY clock
XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P0_0 | XMC_ETH_RMIIB PHY clock
XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P15_8 | XMC_ETH_RMIIC PHY clock
XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P6_5 | XMC_ETH_RMIID PHY clock
enum XMC_ETH_MAC_PORT_CTRL_CLK_TX_t

ETH PHY transmit clock

Enumerator
XMC_ETH_MAC_PORT_CTRL_CLK_TX_P5_10 | XMC_ETH_CLK_TXA PHY transmit clock
XMC_ETH_MAC_PORT_CTRL_CLK_TX_P6_6 | XMC_ETH_CLK_TXB PHY transmit clock
enum XMC_ETH_MAC_PORT_CTRL_COL_t

ETH MAC collision detection

Enumerator
XMC_ETH_MAC_PORT_CTRL_COL_P2_15 | XMC_ETH_COLA collision detection
XMC_ETH_MAC_PORT_CTRL_COL_P5_5 | XMC_ETH_COLD collision detection
enum XMC_ETH_MAC_PORT_CTRL_CRS_DV_t

ETH MAC carrier sense data valid

Enumerator
XMC_ETH_MAC_PORT_CTRL_CRS_DV_P2_5 | XMC_ETH_CRS_DVA carrier sense data valid
XMC_ETH_MAC_PORT_CTRL_CRS_DV_P0_1 | XMC_ETH_CRS_DVB carrier sense data valid
XMC_ETH_MAC_PORT_CTRL_CRS_DV_P15_9 | XMC_ETH_CRS_DVC carrier sense data valid
XMC_ETH_MAC_PORT_CTRL_CRS_DV_P5_2 | XMC_ETH_CRS_DVD carrier sense data valid
enum XMC_ETH_MAC_PORT_CTRL_CRS_t

ETH MAC carrier sense

Enumerator
XMC_ETH_MAC_PORT_CTRL_CRS_P5_11 | XMC_ETH_CRSA carrier sense
XMC_ETH_MAC_PORT_CTRL_CRS_P5_4 | XMC_ETH_CRSD carrier sense
enum XMC_ETH_MAC_PORT_CTRL_MDIO_t

ETH management data I/O

Enumerator
XMC_ETH_MAC_PORT_CTRL_MDIO_P0_9 | XMC_ETH_MDIOA management data I/O
XMC_ETH_MAC_PORT_CTRL_MDIO_P2_0 | XMC_ETH_MDIOB management data I/O
XMC_ETH_MAC_PORT_CTRL_MDIO_P1_11 | XMC_ETH_MDIOC management data I/O
enum XMC_ETH_MAC_PORT_CTRL_MODE_t

ETH MAC interface mode

Enumerator
XMC_ETH_MAC_PORT_CTRL_MODE_MII | MII mode
XMC_ETH_MAC_PORT_CTRL_MODE_RMII | RMII mode
enum XMC_ETH_MAC_PORT_CTRL_RXD0_t

ETH MAC receive data 0 line

Enumerator
XMC_ETH_MAC_PORT_CTRL_RXD0_P2_2 | RXD0A receive data line
XMC_ETH_MAC_PORT_CTRL_RXD0_P0_2 | RXD0B receive data line
XMC_ETH_MAC_PORT_CTRL_RXD0_P14_8 | RXD0C receive data line
XMC_ETH_MAC_PORT_CTRL_RXD0_P5_0 | RXD0D receive data line
enum XMC_ETH_MAC_PORT_CTRL_RXD1_t

ETH MAC receive data 1 line

Enumerator
XMC_ETH_MAC_PORT_CTRL_RXD1_P2_3 | RXD1A receive data line
XMC_ETH_MAC_PORT_CTRL_RXD1_P0_3 | RXD1B receive data line
XMC_ETH_MAC_PORT_CTRL_RXD1_P14_9 | RXD1C receive data line
XMC_ETH_MAC_PORT_CTRL_RXD1_P5_1 | RXD1D receive data line
enum XMC_ETH_MAC_PORT_CTRL_RXD2_t

ETH MAC receive data 2 line

Enumerator
XMC_ETH_MAC_PORT_CTRL_RXD2_P5_8 | RXD2A receive data line
XMC_ETH_MAC_PORT_CTRL_RXD2_P6_4 | RXD2B receive data line
enum XMC_ETH_MAC_PORT_CTRL_RXD3_t

ETH MAC receive data 3 line

Enumerator
XMC_ETH_MAC_PORT_CTRL_RXD3_P5_9 | RXD3A Receive data line
XMC_ETH_MAC_PORT_CTRL_RXD3_P6_3 | RXD3B Receive data line
enum XMC_ETH_MAC_PORT_CTRL_RXER_t

ETH MAC receive error

Enumerator
XMC_ETH_MAC_PORT_CTRL_RXER_P2_4 | XMC_ETH_RXERA carrier sense
XMC_ETH_MAC_PORT_CTRL_RXER_P0_11 | XMC_ETH_RXERB carrier sense
XMC_ETH_MAC_PORT_CTRL_RXER_P5_3 | XMC_ETH_RXERD carrier sense
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_eth_phy.h File Reference

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Data Structures | Enumerations | Functions
xmc_eth_phy.h File Reference
#include <xmc_eth_mac.h>
Include dependency graph for xmc_eth_phy.h:

Data Structures

struct XMC_ETH_PHY_CONFIG_t

Enumerations

Functions

int32_t | XMC_ETH_PHY_ExitPowerDown (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)
XMC_ETH_LINK_DUPLEX_t | XMC_ETH_PHY_GetLinkDuplex (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)
XMC_ETH_LINK_SPEED_t | XMC_ETH_PHY_GetLinkSpeed (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)
XMC_ETH_LINK_STATUS_t | XMC_ETH_PHY_GetLinkStatus (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)
int32_t | XMC_ETH_PHY_Init (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr, const XMC_ETH_PHY_CONFIG_t *const config)
bool | XMC_ETH_PHY_IsAutonegotiationCompleted (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)
int32_t | XMC_ETH_PHY_PowerDown (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)
int32_t | XMC_ETH_PHY_Reset (XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr)

Detailed Description

Date
2015-12-15
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_fce.h File Reference

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xmc_fce.h File Reference
#include <xmc_common.h>
Include dependency graph for xmc_fce.h:

Data Structures

struct | XMC_FCE_CONFIG_t
struct | XMC_FCE_t

Macros

#define | XMC_FCE_CRC16 FCE_KE2
#define | XMC_FCE_CRC32_0 FCE_KE0
#define | XMC_FCE_CRC32_1 FCE_KE1
#define | XMC_FCE_CRC8 FCE_KE3
#define | XMC_FCE_INVSEL_RESET (0U)
#define | XMC_FCE_INVSEL_SET (1U)
#define | XMC_FCE_REFIN_RESET (0U)
#define | XMC_FCE_REFIN_SET (1U)
#define | XMC_FCE_REFOUT_RESET (0U)
#define | XMC_FCE_REFOUT_SET (1U)

Typedefs

typedef FCE_KE_TypeDef XMC_FCE_Kernel_t

Enumerations

Functions

XMC_FCE_STATUS_t | XMC_FCE_CalculateCRC16 (const XMC_FCE_t *const engine, const uint16_t *data, uint32_t length, uint16_t *result)
XMC_FCE_STATUS_t | XMC_FCE_CalculateCRC32 (const XMC_FCE_t *const engine, const uint32_t *data, uint32_t length, uint32_t *result)
XMC_FCE_STATUS_t | XMC_FCE_CalculateCRC8 (const XMC_FCE_t *const engine, const uint8_t *data, uint32_t length, uint8_t *result)
void | XMC_FCE_ClearEvent (const XMC_FCE_t *const engine, XMC_FCE_STS_FLAG_t event)
void | XMC_FCE_Disable (void)
void | XMC_FCE_DisableCRCAlgorithm (const XMC_FCE_t *const engine, uint32_t algo)
void | XMC_FCE_DisableEvent (const XMC_FCE_t *const engine, uint32_t event)
void | XMC_FCE_DisableOperation (const XMC_FCE_t *const engine, uint32_t operation)
void | XMC_FCE_Enable (void)
void | XMC_FCE_EnableCRCAlgorithm (const XMC_FCE_t *const engine, uint32_t algo)
void | XMC_FCE_EnableEvent (const XMC_FCE_t *const engine, uint32_t event)
void | XMC_FCE_EnableOperation (const XMC_FCE_t *const engine, uint32_t operation)
bool | XMC_FCE_Get_DisableStatus (void)
void | XMC_FCE_GetCRCResult (const XMC_FCE_t *const engine, uint32_t *result)
bool | XMC_FCE_GetEventStatus (const XMC_FCE_t *const engine, XMC_FCE_STS_FLAG_t event)
XMC_FCE_STATUS_t | XMC_FCE_Init (const XMC_FCE_t *const engine)
void | XMC_FCE_InitializeSeedValue (const XMC_FCE_t *const engine, uint32_t seedvalue)
void | XMC_FCE_LittleEndian16bit (uint8_t *inbuffer, uint16_t *outbuffer, uint16_t length)
void | XMC_FCE_LittleEndian32bit (uint8_t *inbuffer, uint32_t *outbuffer, uint16_t length)
uint32_t | XMC_FCE_ReadModuleNumber (void)
uint32_t | XMC_FCE_ReadModuleRev (void)
uint32_t | XMC_FCE_ReadModuleType (void)
void | XMC_FCE_TriggerMismatch (const XMC_FCE_t *const engine, XMC_FCE_CTR_TEST_t test)
void | XMC_FCE_UpdateCRCCheck (const XMC_FCE_t *const engine, const uint32_t checkvalue)
void | XMC_FCE_UpdateLength (const XMC_FCE_t *const engine, const uint32_t checklength)

Detailed Description

Date
2015-06-20
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_flash.h File Reference

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Functions
xmc_flash.h File Reference
#include "xmc_common.h"
#include "xmc1_flash.h"
#include "xmc4_flash.h"
Include dependency graph for xmc_flash.h:

Functions

void | XMC_FLASH_ClearStatus (void)
void | XMC_FLASH_DisableEvent (const uint32_t event_msk)
void | XMC_FLASH_EnableEvent (const uint32_t event_msk)
void | XMC_FLASH_EraseSector (uint32_t *address)
uint32_t | XMC_FLASH_GetStatus (void)
bool | XMC_FLASH_IsBusy (void)
void | XMC_FLASH_ProgramPage (uint32_t *address, const uint32_t *data)

Detailed Description

Date
2015-06-20
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_gpio.h File Reference

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Enumerations | Functions
xmc_gpio.h File Reference
#include "xmc_common.h"
#include "xmc1_gpio.h"
Include dependency graph for xmc_gpio.h:

Enumerations

Functions

void | XMC_GPIO_DisableDigitalInput (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_DisablePowerSaveMode (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_EnableDigitalInput (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_EnablePowerSaveMode (XMC_GPIO_PORT_t *const port, const uint8_t pin)
uint32_t | XMC_GPIO_GetInput (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_Init (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_CONFIG_t *const config)
void | XMC_GPIO_SetHardwareControl (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_HWCTRL_t hwctrl)
void | XMC_GPIO_SetMode (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_MODE_t mode)
void | XMC_GPIO_SetOutputHigh (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_SetOutputLevel (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_OUTPUT_LEVEL_t level)
void | XMC_GPIO_SetOutputLow (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_ToggleOutput (XMC_GPIO_PORT_t *const port, const uint8_t pin)

Detailed Description

Date
2015-06-20
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_hrpwm.h File Reference

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xmc_hrpwm.h File Reference
#include <xmc_common.h>
#include <xmc_hrpwm_map.h>
Include dependency graph for xmc_hrpwm.h:

Data Structures

struct | XMC_HRPWM_CSG_CMP_t
struct | XMC_HRPWM_CSG_CONFIG_t
struct | XMC_HRPWM_CSG_DAC_t
struct | XMC_HRPWM_CSG_INPUT_CONFIG_t
struct | XMC_HRPWM_CSG_SGEN_t
struct | XMC_HRPWM_HRC_CONFIG_t
struct | XMC_HRPWM_HRC_SRC_CONFIG_t

Typedefs

typedef HRPWM0_CSG_Type | XMC_HRPWM_CSG_t
typedef HRPWM0_HRC_Type | XMC_HRPWM_HRC_t
typedef HRPWM0_Type | XMC_HRPWM_t

Enumerations

Functions

void | XMC_HRPWM_ClampComparatorOutput (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_ClearPreScaler (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_CSG_ClrEventSW (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_IRQ_ID_t event)
void | XMC_HRPWM_CSG_DACRefValSwitchingConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_DisableEvent (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_IRQ_ID_t event)
void | XMC_HRPWM_CSG_EnableEvent (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_IRQ_ID_t event)
uint32_t | XMC_HRPWM_CSG_GetEventStatus (XMC_HRPWM_CSG_t *const csg, const uint32_t mask)
void | XMC_HRPWM_CSG_Init (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_CONFIG_t *const config)
void | XMC_HRPWM_CSG_SelBlankingInput (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_SelClampingInput (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_SelSlopeGenClkInput (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_CLK_INPUT_t input_clk)
void | XMC_HRPWM_CSG_SetCMPInput (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_CMP_INPUT_t input)
void | XMC_HRPWM_CSG_SetEventSW (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_IRQ_ID_t event)
void | XMC_HRPWM_CSG_SetSRNode (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_IRQ_ID_t event, const XMC_HRPWM_CSG_IRQ_SR_LINE_t sr)
void | XMC_HRPWM_CSG_StartSlopeGenConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_StopSlopeGenConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_TriggerDACConvConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_TriggerShadowXferConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
void | XMC_HRPWM_CSG_UpdateBlankingValue (XMC_HRPWM_CSG_t *const csg, uint8_t value)
void | XMC_HRPWM_CSG_UpdateDACPrescaler (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_PRESCALER_DIVISION_t div_value)
void | XMC_HRPWM_CSG_UpdateDACRefDSV1 (XMC_HRPWM_CSG_t *const csg, uint32_t value)
void | XMC_HRPWM_CSG_UpdateDACRefDSV2 (XMC_HRPWM_CSG_t *const csg, uint32_t value)
void | XMC_HRPWM_CSG_UpdateDACStepGain (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_SLOPE_STEP_GAIN_t gain)
void | XMC_HRPWM_CSG_UpdateFilterWindow (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_CMP_FILTER_WINDOW_t window)
void | XMC_HRPWM_CSG_UpdatePulseClk (XMC_HRPWM_CSG_t *const csg, uint32_t value)
void | XMC_HRPWM_DisableBias (XMC_HRPWM_t *const hrpwm)
void | XMC_HRPWM_DisableComparatorShadowTransfer (XMC_HRPWM_t *const hrpwm, uint32_t mask)
void | XMC_HRPWM_DisableCsgClock (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_DisableGlobalHR (XMC_HRPWM_t *const hrpwm)
void | XMC_HRPWM_DisableHighResolutionPath (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_DisableHighResolutionShadowTransfer (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_DisableHRPowerMode (XMC_HRPWM_t *const hrpwm)
void | XMC_HRPWM_DisableLowResolutionPath (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_EnableBias (XMC_HRPWM_t *const hrpwm)
void | XMC_HRPWM_EnableComparatorShadowTransfer (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_EnableGlobalHR (XMC_HRPWM_t *const hrpwm)
void | XMC_HRPWM_EnableHighResolutionPath (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_EnableHighResolutionShadowTransfer (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_EnableHRPowerMode (XMC_HRPWM_t *const hrpwm)
void | XMC_HRPWM_EnableLowResolutionPath (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
uint32_t | XMC_HRPWM_GetCMPInput (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
uint32_t | XMC_HRPWM_GetComparatorShadowTransferStatus (XMC_HRPWM_t *const hrpwm)
uint32_t | XMC_HRPWM_GetHighResolutionShadowTransferStatus (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
XMC_HRPWM_HR_LOGIC_t | XMC_HRPWM_GetHRGenReadyStatus (XMC_HRPWM_t *const hrpwm)
uint32_t | XMC_HRPWM_GetRunBitStatus (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_HRC_ConfigSourceSelect0 (XMC_HRPWM_HRC_t *const hrc, const XMC_HRPWM_HRC_SRC_CONFIG_t *const config)
void | XMC_HRPWM_HRC_ConfigSourceSelect1 (XMC_HRPWM_HRC_t *const hrc, const XMC_HRPWM_HRC_SRC_CONFIG_t *const config)
void | XMC_HRPWM_HRC_Init (XMC_HRPWM_HRC_t *const hrc, const XMC_HRPWM_HRC_CONFIG_t *const config)
void | XMC_HRPWM_HRC_Set_HR_Source (XMC_HRPWM_HRC_t *const hrc, XMC_HRPWM_HRC_SOURCE_t source)
void | XMC_HRPWM_HRC_SetCompare1 (XMC_HRPWM_HRC_t *const hrc, const uint8_t cr1_value)
void | XMC_HRPWM_HRC_SetCompare2 (XMC_HRPWM_HRC_t *const hrc, const uint8_t cr2_value)
void | XMC_HRPWM_HRC_SetDeadTimeFalling (XMC_HRPWM_HRC_t *const hrc, uint16_t dcf_value)
void | XMC_HRPWM_HRC_SetDeadTimeRising (XMC_HRPWM_HRC_t *const hrc, uint16_t dcr_value)
XMC_HRPWM_STATUS_t | XMC_HRPWM_Init (XMC_HRPWM_t *const hrpwm)
uint32_t | XMC_HRPWM_IsComparatorClamped (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
bool | XMC_HRPWM_IsComparatorRunning (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
uint32_t | XMC_HRPWM_IsDacRunning (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
uint32_t | XMC_HRPWM_IsPrescalerRunning (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
bool | XMC_HRPWM_IsSlopeGenerationRunning (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_ModuleClkFreq (XMC_HRPWM_t *const hrpwm, const XMC_HRPWM_CLK_FREQ_t clk_freq)
void | XMC_HRPWM_SetCsgPowerMode (XMC_HRPWM_t *const hrpwm, const XMC_HRPWM_CSG_SLICE_t slice, const XMC_HRPWM_CSG_POWER_MODE_t power_mode)
void | XMC_HRPWM_StartComparator (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_StartDac (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_StartSlopeGeneration (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_StopComparator (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_StopDac (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_StopSlopeGeneration (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
void | XMC_HRPWM_UnClampComparatorOutput (XMC_HRPWM_t *const hrpwm, const uint32_t mask)

Detailed Description

Date
2015-06-20
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_i2c.h File Reference

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xmc_i2c.h File Reference
#include "xmc_usic.h"
Include dependency graph for xmc_i2c.h:

Data Structures

struct XMC_I2C_CH_CONFIG_t

Macros

#define | XMC_I2C0_CH0 XMC_USIC0_CH0
#define | XMC_I2C0_CH1 XMC_USIC0_CH1
#define | XMC_I2C1_CH0 XMC_USIC1_CH0
#define | XMC_I2C1_CH1 XMC_USIC1_CH1
#define | XMC_I2C2_CH0 XMC_USIC2_CH0
#define | XMC_I2C2_CH1 XMC_USIC2_CH1
#define | XMC_I2C_10BIT_ADDR_GROUP (0x7800U)

Enumerations

Functions

void | XMC_I2C_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, uint32_t flag)
void | XMC_I2C_CH_ConfigExternalInputSignalToBRG (XMC_USIC_CH_t *const channel, const uint16_t pdiv, const uint32_t oversampling, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_I2C_CH_DisableAcknowledgeAddress0 (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_DisableEvent (XMC_USIC_CH_t *const channel, uint32_t event)
void | XMC_I2C_CH_EnableAcknowledgeAddress0 (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_EnableEvent (XMC_USIC_CH_t *const channel, uint32_t event)
uint8_t | XMC_I2C_CH_GetReceivedData (const XMC_USIC_CH_t *const channel)
uint8_t | XMC_I2C_CH_GetReceiverStatusFlag (XMC_USIC_CH_t *const channel)
uint16_t | XMC_I2C_CH_GetSlaveAddress (const XMC_USIC_CH_t *const channel)
uint32_t | XMC_I2C_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_Init (XMC_USIC_CH_t *const channel, const XMC_I2C_CH_CONFIG_t *const config)
void | XMC_I2C_CH_MasterReceiveAck (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_MasterReceiveNack (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_MasterRepeatedStart (XMC_USIC_CH_t *const channel, const uint16_t addr, const XMC_I2C_CH_CMD_t command)
void | XMC_I2C_CH_MasterStart (XMC_USIC_CH_t *const channel, const uint16_t addr, const XMC_I2C_CH_CMD_t command)
void | XMC_I2C_CH_MasterStop (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_MasterTransmit (XMC_USIC_CH_t *const channel, const uint8_t data)
void | XMC_I2C_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_I2C_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_I2C_CH_STATUS_t | XMC_I2C_CH_SetBaudrate (XMC_USIC_CH_t *const channel, const uint32_t rate)
void | XMC_I2C_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_I2C_CH_INPUT_t input, const uint8_t source)
void | XMC_I2C_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_I2C_CH_SetSlaveAddress (XMC_USIC_CH_t *const channel, const uint16_t address)
void | XMC_I2C_CH_SlaveTransmit (XMC_USIC_CH_t *const channel, const uint8_t data)
void | XMC_I2C_CH_Start (XMC_USIC_CH_t *const channel)
XMC_I2C_CH_STATUS_t | XMC_I2C_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)

Detailed Description

Date
2016-05-20
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_i2s.h File Reference

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xmc_i2s.h File Reference
#include "xmc_usic.h"
Include dependency graph for xmc_i2s.h:

Data Structures

struct XMC_I2S_CH_CONFIG_t

Macros

#define | XMC_I2S0_CH0 XMC_USIC0_CH0
#define | XMC_I2S0_CH1 XMC_USIC0_CH1
#define | XMC_I2S1_CH0 XMC_USIC1_CH0
#define | XMC_I2S1_CH1 XMC_USIC1_CH1
#define | XMC_I2S2_CH0 XMC_USIC2_CH0
#define | XMC_I2S2_CH1 XMC_USIC2_CH1

Functions

void | XMC_I2S_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, const uint32_t flag)
void | XMC_I2S_CH_ConfigureShiftClockOutput (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t clock_output)
void | XMC_I2S_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_DisableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_I2S_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INPUT_t input)
void | XMC_I2S_CH_DisableMasterClock (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_EnableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_I2S_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INPUT_t input)
void | XMC_I2S_CH_EnableMasterClock (XMC_USIC_CH_t *const channel)
uint16_t | XMC_I2S_CH_GetReceivedData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_I2S_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_Init (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_CONFIG_t *const config)
void | XMC_I2S_CH_Receive (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_CHANNEL_t channel_number)
void | XMC_I2S_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_I2S_CH_STATUS_t | XMC_I2S_CH_SetBaudrate (XMC_USIC_CH_t *const channel, const uint32_t rate)
void | XMC_I2S_CH_SetBitOrderLsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_SetBitOrderMsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_I2S_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INPUT_t input, const uint8_t source)
void | XMC_I2S_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_I2S_CH_SetSystemWordLength (XMC_USIC_CH_t *const channel, uint32_t sclk_cycles_system_word_length)
void | XMC_I2S_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_I2S_CH_Start (XMC_USIC_CH_t *const channel)
XMC_I2S_CH_STATUS_t | XMC_I2S_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_Transmit (XMC_USIC_CH_t *const channel, const uint16_t data, const XMC_I2S_CH_CHANNEL_t channel_number)
void | XMC_I2S_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)
void | XMC_I2S_CH_WordAddressSignalPolarity (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_WA_POLARITY_t wa_inversion)

Detailed Description

Date
2016-06-30
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_ledts.h File Reference

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xmc_ledts.h File Reference
#include <xmc_common.h>
#include "xmc_scu.h"
Include dependency graph for xmc_ledts.h:

Data Structures

struct | XMC_LEDTS_GLOBAL_CONFIG_t
struct | XMC_LEDTS_GLOBAL_t
struct | XMC_LEDTS_LED_CONFIG_t
struct | XMC_LEDTS_TS_CONFIG_ADVANCED_t
struct | XMC_LEDTS_TS_CONFIG_BASIC_t

Macros

#define | XMC_LEDTS0 ((XMC_LEDTS_GLOBAL_t *) LEDTS0)
#define | XMC_LEDTS0 ((XMC_LEDTS_GLOBAL_t *) LEDTS0)

Typedefs

typedef XMC_LEDTS_GLOBAL_t XMC_LEDTS_t

Enumerations

Functions

void | XMC_LEDTS_ClearInterruptFlag (XMC_LEDTS_t *const ledts, uint32_t interrupt_mask)
void | XMC_LEDTS_DisableInterrupt (XMC_LEDTS_t *const ledts, uint32_t interrupt_mask)
void | XMC_LEDTS_EnableInterrupt (XMC_LEDTS_t *const ledts, uint32_t interrupt_mask)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitGlobal (XMC_LEDTS_t *const ledts, const XMC_LEDTS_GLOBAL_CONFIG_t *config)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitLED (XMC_LEDTS_t *const ledts, const XMC_LEDTS_LED_CONFIG_t *config)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitTSAdvanced (XMC_LEDTS_t *const ledts, const XMC_LEDTS_TS_CONFIG_ADVANCED_t *config)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitTSBasic (XMC_LEDTS_t *const ledts, const XMC_LEDTS_TS_CONFIG_BASIC_t *config)
uint32_t | XMC_LEDTS_ReadFNCOL (XMC_LEDTS_t *const ledts)
uint32_t | XMC_LEDTS_ReadInterruptFlag (XMC_LEDTS_t *const ledts)
uint16_t | XMC_LEDTS_ReadTSVAL (XMC_LEDTS_t *const ledts)
void | XMC_LEDTS_SetActivePADNo (XMC_LEDTS_t *const ledts, XMC_LEDTS_NUMBER_TS_INPUT_t pad_num)
void | XMC_LEDTS_SetColumnBrightness (XMC_LEDTS_t *const ledts, XMC_LEDTS_LED_COLUMN_t column, const uint8_t brightness)
void | XMC_LEDTS_SetCommonOscillationWindow (XMC_LEDTS_t *const ledts, const uint8_t common_size)
void | XMC_LEDTS_SetLEDLinePattern (XMC_LEDTS_t *const ledts, XMC_LEDTS_LED_COLUMN_t column, const uint8_t pattern)
void | XMC_LEDTS_SetNumOfLEDColumns (XMC_LEDTS_t *const ledts, uint8_t count)
void | XMC_LEDTS_SetOscillationWindow (XMC_LEDTS_t *const ledts, XMC_LEDTS_NUMBER_TS_INPUT_t touchpad, const uint8_t size)
void | XMC_LEDTS_StartCounter (XMC_LEDTS_t *const ledts, const uint16_t prescaler)
void | XMC_LEDTS_StopCounter (XMC_LEDTS_t *const ledts)

Detailed Description

Date
2015-06-20
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_posif.h File Reference

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xmc_posif.h File Reference
#include <xmc_common.h>
#include <xmc_scu.h>
#include "xmc_posif_map.h"
Include dependency graph for xmc_posif.h:

Data Structures

struct | XMC_POSIF_CONFIG_t
struct | XMC_POSIF_HSC_CONFIG_t
struct | XMC_POSIF_MCM_CONFIG_t
struct | XMC_POSIF_QD_CONFIG_t

Typedefs

typedef POSIF_GLOBAL_TypeDef XMC_POSIF_t

Enumerations

Functions

void | XMC_POSIF_ClearEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
void | XMC_POSIF_Disable (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_DisableEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
void | XMC_POSIF_Enable (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_EnableEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
uint8_t | XMC_POSIF_GetEventStatus (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
uint8_t | XMC_POSIF_HSC_GetCurrentPattern (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_HSC_GetExpectedPattern (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_HSC_GetLastSampledPattern (XMC_POSIF_t *const peripheral)
XMC_POSIF_STATUS_t | XMC_POSIF_HSC_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_HSC_CONFIG_t *const config)
void | XMC_POSIF_HSC_SetCurrentPattern (XMC_POSIF_t *const peripheral, const uint8_t pattern)
void | XMC_POSIF_HSC_SetExpectedPattern (XMC_POSIF_t *const peripheral, const uint8_t pattern)
void | XMC_POSIF_HSC_SetHallPatterns (XMC_POSIF_t *const peripheral, const uint8_t pattern_mask)
void | XMC_POSIF_HSC_UpdateHallPattern (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_CONFIG_t *const config)
bool | XMC_POSIF_IsRunning (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_MCM_EnableMultiChannelPatternUpdate (XMC_POSIF_t *const peripheral)
uint16_t | XMC_POSIF_MCM_GetMultiChannelPattern (XMC_POSIF_t *const peripheral)
uint16_t | XMC_POSIF_MCM_GetShadowMultiChannelPattern (XMC_POSIF_t *const peripheral)
XMC_POSIF_STATUS_t | XMC_POSIF_MCM_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_MCM_CONFIG_t *const config)
void | XMC_POSIF_MCM_SetMultiChannelPattern (XMC_POSIF_t *const peripheral, const uint16_t pattern)
void | XMC_POSIF_MCM_UpdateMultiChannelPattern (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_QD_GetCurrentIndexValue (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_QD_GetCurrentState (XMC_POSIF_t *const peripheral)
XMC_POSIF_QD_DIR_t | XMC_POSIF_QD_GetDirection (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_QD_GetPreviousState (XMC_POSIF_t *const peripheral)
XMC_POSIF_STATUS_t | XMC_POSIF_QD_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_QD_CONFIG_t *const config)
void | XMC_POSIF_SelectInputSource (XMC_POSIF_t *const peripheral, const XMC_POSIF_INPUT_PORT_t input0, const XMC_POSIF_INPUT_PORT_t input1, const XMC_POSIF_INPUT_PORT_t input2)
void | XMC_POSIF_SetEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
void | XMC_POSIF_SetInterruptNode (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event, const XMC_POSIF_SR_ID_t sr)
void | XMC_POSIF_SetMode (XMC_POSIF_t *const peripheral, const XMC_POSIF_MODE_t mode)
void | XMC_POSIF_Start (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_Stop (XMC_POSIF_t *const peripheral)

Detailed Description

Date
2017-06-24
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_rtc.h File Reference

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xmc_rtc.h File Reference
#include <xmc_common.h>
#include <time.h>
#include "xmc1_rtc.h"
#include "xmc4_rtc.h"
Include dependency graph for xmc_rtc.h:

Data Structures

struct | XMC_RTC_ALARM_t
struct | XMC_RTC_CONFIG_t
struct | XMC_RTC_TIME_t

Enumerations

Functions

void | XMC_RTC_ClearEvent (const uint32_t event)
void | XMC_RTC_Disable (void)
void | XMC_RTC_DisableEvent (const uint32_t event)
void | XMC_RTC_Enable (void)
void | XMC_RTC_EnableEvent (const uint32_t event)
void | XMC_RTC_GetAlarm (XMC_RTC_ALARM_t *const alarm)
void | XMC_RTC_GetAlarmStdFormat (struct tm *const stdtime)
uint32_t | XMC_RTC_GetEventStatus (void)
uint32_t | XMC_RTC_GetPrescaler (void)
void | XMC_RTC_GetTime (XMC_RTC_TIME_t *const time)
void | XMC_RTC_GetTimeStdFormat (struct tm *const stdtime)
XMC_RTC_STATUS_t | XMC_RTC_Init (const XMC_RTC_CONFIG_t *const config)
bool | XMC_RTC_IsEnabled (void)
bool | XMC_RTC_IsRunning (void)
void | XMC_RTC_SetAlarm (const XMC_RTC_ALARM_t *const alarm)
void | XMC_RTC_SetAlarmStdFormat (const struct tm *const stdtime)
void | XMC_RTC_SetPrescaler (uint16_t prescaler)
void | XMC_RTC_SetTime (const XMC_RTC_TIME_t *const timeval)
void | XMC_RTC_SetTimeStdFormat (const struct tm *const stdtime)
void | XMC_RTC_Start (void)
void | XMC_RTC_Stop (void)

Detailed Description

Date
2016-05-19
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_scu.h File Reference

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xmc_scu.h File Reference
#include <xmc_common.h>
#include <xmc1_scu.h>
Include dependency graph for xmc_scu.h:

Typedefs

typedef void(* XMC_SCU_INTERRUPT_EVENT_HANDLER_t) (void)

Enumerations

Functions

void | XMC_SCU_CLOCK_GatePeripheralClock (const XMC_SCU_PERIPHERAL_CLOCK_t peripheral)
uint32_t | XMC_SCU_CLOCK_GetCpuClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetPeripheralClockFrequency (void)
void | XMC_SCU_CLOCK_Init (const XMC_SCU_CLOCK_CONFIG_t *const config)
bool | XMC_SCU_CLOCK_IsPeripheralClockGated (const XMC_SCU_PERIPHERAL_CLOCK_t peripheral)
void | XMC_SCU_CLOCK_UngatePeripheralClock (const XMC_SCU_PERIPHERAL_CLOCK_t peripheral)
uint32_t | XMC_SCU_GetMirrorStatus (void)
void | XMC_SCU_INTERRUPT_ClearEventStatus (const XMC_SCU_INTERRUPT_EVENT_t event)
void | XMC_SCU_INTERRUPT_DisableEvent (const XMC_SCU_INTERRUPT_EVENT_t event)
void | XMC_SCU_INTERRUPT_EnableEvent (const XMC_SCU_INTERRUPT_EVENT_t event)
XMC_SCU_STATUS_t | XMC_SCU_INTERRUPT_SetEventHandler (const XMC_SCU_INTERRUPT_EVENT_t event, const XMC_SCU_INTERRUPT_EVENT_HANDLER_t handler)
void | XMC_SCU_INTERRUPT_TriggerEvent (const XMC_SCU_INTERRUPT_EVENT_t event)
XMC_SCU_INTERRUPT_EVENT_t | XMC_SCU_INTERUPT_GetEventStatus (void)
void | XMC_SCU_IRQHandler (uint32_t sr_num)
void | XMC_SCU_RESET_ClearDeviceResetReason (void)
uint32_t | XMC_SCU_RESET_GetDeviceResetReason (void)
void | XMC_SCU_SetCcuTriggerHigh (const uint32_t trigger)
void | XMC_SCU_SetCcuTriggerLow (const uint32_t trigger)

Detailed Description

Date
2016-03-09
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_sdmmc.h File Reference

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Data Structures | Macros | Enumerations | Functions
xmc_sdmmc.h File Reference
#include "xmc_common.h"
Include dependency graph for xmc_sdmmc.h:

Data Structures

union | XMC_SDMMC_COMMAND_t
struct | XMC_SDMMC_CONFIG_t
union | XMC_SDMMC_PRESENT_STATE_t
struct | XMC_SDMMC_RESPONSE_t
struct | XMC_SDMMC_t
struct | XMC_SDMMC_TRANSFER_MODE_t

Macros

#define XMC_SDMMC ((XMC_SDMMC_t *)SDMMC_BASE)

Enumerations

Functions

void | XMC_SDMMC_BusPowerOff (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_BusPowerOn (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_ClearEvent (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_Disable (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_DisableDelayCmdDatLines (void)
void | XMC_SDMMC_DisableEvent (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_DisableEventStatus (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_DisableHighSpeed (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_DisableInterruptAtBlockGap (XMC_SDMMC_t *const sdmmc, const XMC_SDMMC_CONFIG_t *config)
void | XMC_SDMMC_DisableWakeupEvent (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_Enable (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_EnableDelayCmdDatLines (void)
void | XMC_SDMMC_EnableEvent (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_EnableEventStatus (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_EnableHighSpeed (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_EnableInterruptAtBlockGap (XMC_SDMMC_t *const sdmmc, const XMC_SDMMC_CONFIG_t *config)
void | XMC_SDMMC_EnableWakeupEvent (XMC_SDMMC_t *const sdmmc, uint32_t event)
bool | XMC_SDMMC_GetACMDErrStatus (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_ACMD_ERR_t error)
uint32_t | XMC_SDMMC_GetAutoCommandResponse (const XMC_SDMMC_t *const sdmmc)
bool | XMC_SDMMC_GetClockStability (XMC_SDMMC_t *const sdmmc)
uint32_t | XMC_SDMMC_GetCommandResponse (XMC_SDMMC_t *const sdmmc)
bool | XMC_SDMMC_GetContinueRequest (XMC_SDMMC_t *const sdmmc)
bool | XMC_SDMMC_GetEvent (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_EVENT_t event)
bool | XMC_SDMMC_GetPowerStatus (XMC_SDMMC_t *const sdmmc)
XMC_SDMMC_PRESENT_STATE_t | XMC_SDMMC_GetPresentState (const XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_GetR2Response (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_RESPONSE_t *const response)
uint32_t | XMC_SDMMC_GetSWResetStatus (XMC_SDMMC_t *const sdmmc)
uint32_t | XMC_SDMMC_GetTransferBlocksNum (XMC_SDMMC_t *const sdmmc)
XMC_SDMMC_STATUS_t | XMC_SDMMC_Init (XMC_SDMMC_t *const sdmmc, const XMC_SDMMC_CONFIG_t *config)
bool | XMC_SDMMC_IsAllDataLinesHigh (XMC_SDMMC_t *const sdmmc)
bool | XMC_SDMMC_IsAnyErrorEvent (XMC_SDMMC_t *const sdmmc)
bool | XMC_SDMMC_IsCommandLineBusy (XMC_SDMMC_t *const sdmmc)
bool | XMC_SDMMC_IsDataLineBusy (XMC_SDMMC_t *const sdmmc)
uint32_t | XMC_SDMMC_ReadFIFO (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_SDClockDisable (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_SDClockEnable (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_SDClockFreqSelect (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_SDCLK_FREQ_SEL_t clk)
XMC_SDMMC_STATUS_t | XMC_SDMMC_SendCommand (XMC_SDMMC_t *const sdmmc, const XMC_SDMMC_COMMAND_t *command, uint32_t arg)
void | XMC_SDMMC_SetBusVoltage (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_BUS_VOLTAGE_t bus_voltage)
void | XMC_SDMMC_SetCardDetectionSource (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_CD_SOURCE_t source)
void | XMC_SDMMC_SetCardDetectionStatus (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_CD_STATUS_t status)
void | XMC_SDMMC_SetContinueRequest (XMC_SDMMC_t *const sdmmc, bool enabled)
void | XMC_SDMMC_SetDataLineTimeout (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_DAT_TIMEOUT_COUNTER_t timeout)
void | XMC_SDMMC_SetDataTransferDirection (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_DATA_TRANSFER_DIR_t dir)
void | XMC_SDMMC_SetDataTransferMode (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_TRANSFER_MODE_t *const transfer_mode)
void | XMC_SDMMC_SetDataTransferWidth (XMC_SDMMC_t *const sdmmc, XMC_SDMMC_DATA_LINES_t lines)
void | XMC_SDMMC_SetDelay (uint8_t tapdel)
void | XMC_SDMMC_SetReadWaitControl (XMC_SDMMC_t *const sdmmc, bool enabled)
void | XMC_SDMMC_SetStopAtBlockGap (XMC_SDMMC_t *const sdmmc, bool enabled)
void | XMC_SDMMC_SetSWReset (XMC_SDMMC_t *const sdmmc, uint32_t reset_mode)
void | XMC_SDMMC_Start (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_Stop (XMC_SDMMC_t *const sdmmc)
void | XMC_SDMMC_TriggerACMDErr (XMC_SDMMC_t *const sdmmc, uint32_t error)
void | XMC_SDMMC_TriggerEvent (XMC_SDMMC_t *const sdmmc, uint32_t event)
void | XMC_SDMMC_WriteFIFO (XMC_SDMMC_t *const sdmmc, uint32_t *data)

Detailed Description

Date
2017-02-14
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_spi.h File Reference

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xmc_spi.h File Reference
#include "xmc_usic.h"
Include dependency graph for xmc_spi.h:

Data Structures

struct XMC_SPI_CH_CONFIG_t

Macros

#define | XMC_SPI0_CH0 XMC_USIC0_CH0
#define | XMC_SPI0_CH1 XMC_USIC0_CH1
#define | XMC_SPI1_CH0 XMC_USIC1_CH0
#define | XMC_SPI1_CH1 XMC_USIC1_CH1
#define | XMC_SPI2_CH0 XMC_USIC2_CH0
#define | XMC_SPI2_CH1 XMC_USIC2_CH1

Enumerations

Functions

void | XMC_SPI_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, const uint32_t flag)
void | XMC_SPI_CH_ConfigExternalInputSignalToBRG (XMC_USIC_CH_t *const channel, const uint16_t pdiv, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_SPI_CH_ConfigureShiftClockOutput (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t passive_level, const XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t clock_output)
void | XMC_SPI_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableEOF (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_SPI_CH_DisableFEM (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INPUT_t input)
void | XMC_SPI_CH_DisableInterwordDelay (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableMasterClock (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableSlaveSelect (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableSlaveSelectCodedMode (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableSOF (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableEOF (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_SPI_CH_EnableFEM (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INPUT_t input)
void | XMC_SPI_CH_EnableInterwordDelay (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableMasterClock (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableSlaveSelect (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_SLAVE_SELECT_t slave)
void | XMC_SPI_CH_EnableSlaveSelectCodedMode (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableSOF (XMC_USIC_CH_t *const channel)
uint16_t | XMC_SPI_CH_GetReceivedData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_SPI_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_Init (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_CONFIG_t *const config)
void | XMC_SPI_CH_Receive (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_MODE_t mode)
void | XMC_SPI_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_SPI_CH_STATUS_t | XMC_SPI_CH_SetBaudrate (XMC_USIC_CH_t *const channel, const uint32_t rate)
void | XMC_SPI_CH_SetBitOrderLsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_SetBitOrderMsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_SPI_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INPUT_t input, const uint8_t source)
void | XMC_SPI_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_SPI_CH_SetInterwordDelay (XMC_USIC_CH_t *const channel, uint32_t tinterword_delay_ns)
void | XMC_SPI_CH_SetInterwordDelaySCLK (XMC_USIC_CH_t *const channel, uint32_t sclk_period)
void | XMC_SPI_CH_SetSlaveSelectDelay (XMC_USIC_CH_t *const channel, uint32_t sclk_period)
void | XMC_SPI_CH_SetSlaveSelectPolarity (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t selo_inversion)
void | XMC_SPI_CH_SetTransmitMode (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_MODE_t mode)
void | XMC_SPI_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_SPI_CH_Start (XMC_USIC_CH_t *const channel)
XMC_SPI_CH_STATUS_t | XMC_SPI_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_Transmit (XMC_USIC_CH_t *const channel, const uint16_t data, const XMC_SPI_CH_MODE_t mode)
void | XMC_SPI_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)

Detailed Description

Date
2016-05-20
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_uart.h File Reference

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xmc_uart.h File Reference
#include "xmc_usic.h"
Include dependency graph for xmc_uart.h:

Data Structures

struct XMC_UART_CH_CONFIG_t

Macros

#define | XMC_UART0_CH0 XMC_USIC0_CH0
#define | XMC_UART0_CH1 XMC_USIC0_CH1
#define | XMC_UART1_CH0 XMC_USIC1_CH0
#define | XMC_UART1_CH1 XMC_USIC1_CH1
#define | XMC_UART2_CH0 XMC_USIC2_CH0
#define | XMC_UART2_CH1 XMC_USIC2_CH1

Enumerations

Functions

void | XMC_UART_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, const uint32_t flag)
void | XMC_UART_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_UART_CH_DisableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_DisableInputSync (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_UART_CH_EnableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_EnableInputSync (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
uint16_t | XMC_UART_CH_GetReceivedData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_UART_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_Init (XMC_USIC_CH_t *const channel, const XMC_UART_CH_CONFIG_t *const config)
void | XMC_UART_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_UART_CH_STATUS_t | XMC_UART_CH_SetBaudrate (XMC_USIC_CH_t *const channel, uint32_t rate, uint32_t oversampling)
void | XMC_UART_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_UART_CH_SetInputSamplingFreq (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input, const XMC_UART_CH_INPUT_SAMPLING_FREQ_t sampling_freq)
void | XMC_UART_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input, const uint8_t source)
void | XMC_UART_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_UART_CH_SetPulseLength (XMC_USIC_CH_t *const channel, const uint8_t pulse_length)
void | XMC_UART_CH_SetSamplePoint (XMC_USIC_CH_t *const channel, const uint32_t sample_point)
void | XMC_UART_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_UART_CH_Start (XMC_USIC_CH_t *const channel)
XMC_UART_CH_STATUS_t | XMC_UART_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_Transmit (XMC_USIC_CH_t *const channel, const uint16_t data)
void | XMC_UART_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)

Detailed Description

Date
2016-05-20
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_usbd.h File Reference

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xmc_usbd.h File Reference
#include "xmc_common.h"
#include <stdlib.h>
#include <string.h>
#include "xmc_usbd_regs.h"
#include "xmc_scu.h"
Include dependency graph for xmc_usbd.h:

Data Structures

struct | XMC_USBD_CAPABILITIES_t
struct | XMC_USBD_DEVICE_t
struct | XMC_USBD_DRIVER_t
struct | XMC_USBD_EP_t
struct | XMC_USBD_STATE_t
struct | XMC_USBD_t

Macros

#define | XMC_USBD_ENDPOINT_DIRECTION_MASK (0x80U)
#define | XMC_USBD_ENDPOINT_MAX_PACKET_SIZE_MASK (0x07FFU)
#define | XMC_USBD_ENDPOINT_NUMBER_MASK (0x0FU)
#define | XMC_USBD_EP_DIR_MASK (0x80U)
#define | XMC_USBD_EP_NUM_MASK (0x0FU)
#define | XMC_USBD_MAX_FIFO_SIZE (2048U)
#define | XMC_USBD_MAX_PACKET_SIZE (64U)
#define | XMC_USBD_MAX_TRANSFER_SIZE_EP0 (64U)
#define | XMC_USBD_NUM_EPS (7U)
#define | XMC_USBD_NUM_TX_FIFOS (7U)
#define | XMC_USBD_SETUP_COUNT (3U)
#define | XMC_USBD_SETUP_SIZE (8U)
#define | XMC_USBD_SPEED_FULL (1U)

Typedefs

typedef void(* | XMC_USBD_SignalDeviceEvent_t) (XMC_USBD_EVENT_t event)
typedef void(* | XMC_USBD_SignalEndpointEvent_t) (uint8_t ep_addr, XMC_USBD_EP_EVENT_t ep_event)

Enumerations

Functions

void | XMC_USBD_ClearEvent (XMC_USBD_EVENT_t event)
void | XMC_USBD_ClearEventINEP (uint32_t event, uint8_t ep_num)
void | XMC_USBD_ClearEventOUTEP (uint32_t event, uint8_t ep_num)
XMC_USBD_STATUS_t | XMC_USBD_DeviceConnect (void)
XMC_USBD_STATUS_t | XMC_USBD_DeviceDisconnect (void)
XMC_USBD_STATE_t | XMC_USBD_DeviceGetState (const XMC_USBD_t *const obj)
XMC_USBD_STATUS_t | XMC_USBD_DeviceSetAddress (uint8_t address, XMC_USBD_SET_ADDRESS_STAGE_t stage)
void | XMC_USBD_Disable (void)
void | XMC_USBD_Enable (void)
void | XMC_USBD_EnableEventINEP (uint32_t event)
void | XMC_USBD_EnableEventOUTEP (uint32_t event)
XMC_USBD_STATUS_t | XMC_USBD_EndpointAbort (uint8_t ep_addr)
XMC_USBD_STATUS_t | XMC_USBD_EndpointConfigure (uint8_t ep_addr, XMC_USBD_ENDPOINT_TYPE_t ep_type, uint16_t ep_max_packet_size)
int32_t | XMC_USBD_EndpointRead (const uint8_t ep_addr, uint8_t *buffer, uint32_t length)
XMC_USBD_STATUS_t | XMC_USBD_EndpointReadStart (const uint8_t ep_addr, uint32_t size)
XMC_USBD_STATUS_t | XMC_USBD_EndpointStall (uint8_t ep_addr, bool stall)
XMC_USBD_STATUS_t | XMC_USBD_EndpointUnconfigure (uint8_t ep_addr)
int32_t | XMC_USBD_EndpointWrite (const uint8_t ep_addr, const uint8_t *buffer, uint32_t length)
XMC_USBD_CAPABILITIES_t | XMC_USBD_GetCapabilities (void)
uint16_t | XMC_USBD_GetFrameNumber (void)
XMC_USBD_STATUS_t | XMC_USBD_Init (XMC_USBD_t *obj)
void | XMC_USBD_IRQHandler (const XMC_USBD_t *const obj)
uint32_t | XMC_USBD_IsEnumDone (void)
XMC_USBD_STATUS_t | XMC_USBD_Uninitialize (void)

Variables

const XMC_USBD_DRIVER_t Driver_USBD0
XMC_USBD_DEVICE_t xmc_device

Detailed Description

Date
2015-06-20

XMClib v2.1.16 - XMC Peripheral Driver Library

Copyright (c) 2015-2017, Infineon Technologies AG All rights reserved.

Redistribution and use in source and binary forms, with or without modification,are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.

Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.

Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with Infineon Technologies AG dave@.nosp@m.infi.nosp@m.neon..nosp@m.com).

Change History

2015-02-16:

  • Initial Version.
    2015-03-18:
  • Updated the doxygen comments for documentation.
  • Updated the XMC_USBD_PATCH_VERSION to 4.

2015-06-20:

  • Removed version macros and declaration of GetDriverVersion API.
  • Updated the doxygen comments for API XMC_USBD_IsEnumDone().
  • Updated the copy right in the file header.
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_usbh.h File Reference

  • File List
  • Globals
  • inc
Data Structures | Macros | Typedefs | Functions
xmc_usbh.h File Reference
#include <stdint.h>
#include "xmc_common.h"
#include "xmc_scu.h"
#include "xmc_gpio.h"
Include dependency graph for xmc_usbh.h:

Data Structures

struct | XMC_USBH0_DEVICE_t
struct | XMC_USBH0_pipe_t
struct | XMC_USBH_CAPABILITIES_t
struct | XMC_USBH_DRIVER_t
struct | XMC_USBH_DRIVER_VERSION_t
struct | XMC_USBH_PORT_STATE_t

Macros

#define | USB_CH_HCCHARx_DEVADDR(x) (((uint32_t) x << USB_CH_HCCHAR_DevAddr_Pos) & (uint32_t)USB_CH_HCCHAR_DevAddr_Msk)
#define | USB_CH_HCCHARx_EPDIR(x) (((uint32_t) x << USB_CH_HCCHAR_EPDir_Pos) & (uint32_t)USB_CH_HCCHAR_EPDir_Msk)
#define | USB_CH_HCCHARx_EPNUM(x) (((uint32_t) x << USB_CH_HCCHAR_EPNum_Pos) & (uint32_t)USB_CH_HCCHAR_EPNum_Msk)
#define | USB_CH_HCCHARx_EPTYPE(x) (((uint32_t) x << USB_CH_HCCHAR_EPType_Pos) & (uint32_t)USB_CH_HCCHAR_EPType_Msk)
#define | USB_CH_HCCHARx_MCEC(x) (((uint32_t) x << USB_CH_HCCHAR_MC_EC_Pos) & (uint32_t)USB_CH_HCCHAR_MC_EC_Msk)
#define | USB_CH_HCCHARx_MPS(x) (((uint32_t) x ) & (uint32_t)USB_CH_HCCHAR_MPS_Msk)
#define | USB_CH_HCFG_FSLSPCS(x) (((uint32_t) x ) & USB_HCFG_FSLSPclkSel_Msk)
#define | USB_CH_HCFG_FSLSSUP(x) (((uint32_t) x << USB_HCFG_FSLSSupp_Pos) & USB_HCFG_FSLSSupp_Msk)
#define | USB_CH_HCINTx_ALL
#define | USB_CH_HCINTx_ERRORS
#define | USB_CH_HCTSIZx_DPID(x) (((uint32_t) x << USB_CH_HCTSIZ_BUFFERMODE_Pid_Pos) & (uint32_t)USB_CH_HCTSIZ_BUFFERMODE_Pid_Msk)
#define | USB_CH_HCTSIZx_DPID_DATA0 (USB_CH_HCTSIZx_DPID(0U))
#define | USB_CH_HCTSIZx_DPID_DATA1 (USB_CH_HCTSIZx_DPID(2U))
#define | USB_CH_HCTSIZx_DPID_DATA2 (USB_CH_HCTSIZx_DPID(1U))
#define | USB_CH_HCTSIZx_DPID_MDATA (USB_CH_HCTSIZx_DPID(3U))
#define | USB_CH_HCTSIZx_DPID_SETUP (USB_CH_HCTSIZx_DPID(3U))
#define | USB_GRXSTSR_HOSTMODE_PktSts_IN_DATA_PKT 0x2
#define | USB_GRXSTSR_HOSTMODE_PktSts_IN_TRSF_CPL 0x3
#define | USBH0_MAX_PIPE_NUM (14U)
#define | USBH_PIPE_GET_INDEX(handle) (((uint32_t)handle - (uint32_t)USB0_CH0_BASE)/(0x20U))
#define | XMC_USB_DRIVE_PORT1 P3_2
#define | XMC_USB_DRIVE_PORT2 P0_1
#define | XMC_USBH_API_VERSION ((uint16_t)((uint16_t)XMC_LIB_MAJOR_VERSION << 8U) |XMC_LIB_MINOR_VERSION)
#define | XMC_USBH_CLOCK_GATING_DISABLE 0
#define | XMC_USBH_CLOCK_GATING_ENABLE 1
#define | XMC_USBH_DRIVER_ERROR -1
#define | XMC_USBH_DRIVER_ERROR_BUSY -2
#define | XMC_USBH_DRIVER_ERROR_PARAMETER -5
#define | XMC_USBH_DRIVER_ERROR_SPECIFIC -6
#define | XMC_USBH_DRIVER_ERROR_TIMEOUT -3
#define | XMC_USBH_DRIVER_ERROR_UNSUPPORTED -4
#define | XMC_USBH_DRIVER_OK 0
#define | XMC_USBH_ENDPOINT_BULK 2
#define | XMC_USBH_ENDPOINT_CONTROL 0
#define | XMC_USBH_ENDPOINT_INTERRUPT 3
#define | XMC_USBH_ENDPOINT_ISOCHRONOUS 1
#define | XMC_USBH_EP_HANDLE XMC_USBH_PIPE_HANDLE
#define | XMC_USBH_EVENT_BUS_ERROR (1UL << 6)
#define | XMC_USBH_EVENT_CONNECT (1UL << 0)
#define | XMC_USBH_EVENT_DISCONNECT (1UL << 1)
#define | XMC_USBH_EVENT_HANDSHAKE_ERR (1UL << 5)
#define | XMC_USBH_EVENT_HANDSHAKE_MDATA (1UL << 3)
#define | XMC_USBH_EVENT_HANDSHAKE_NAK (1UL << 1)
#define | XMC_USBH_EVENT_HANDSHAKE_NYET (1UL << 2)
#define | XMC_USBH_EVENT_HANDSHAKE_STALL (1UL << 4)
#define | XMC_USBH_EVENT_OVERCURRENT (1UL << 2)
#define | XMC_USBH_EVENT_REMOTE_WAKEUP (1UL << 6)
#define | XMC_USBH_EVENT_RESET (1UL << 3)
#define | XMC_USBH_EVENT_RESUME (1UL << 5)
#define | XMC_USBH_EVENT_SUSPEND (1UL << 4)
#define | XMC_USBH_EVENT_TRANSFER_COMPLETE (1UL << 0)
#define | XMC_USBH_PACKET_CSPLIT (0x0CUL << XMC_USBH_PACKET_SPLIT_Pos)
#define | XMC_USBH_PACKET_DATA0 (0x01UL << XMC_USBH_PACKET_DATA_Pos)
#define | XMC_USBH_PACKET_DATA1 (0x02UL << XMC_USBH_PACKET_DATA_Pos)
#define | XMC_USBH_PACKET_DATA_Msk (0x0FUL << XMC_USBH_PACKET_DATA_Pos)
#define | XMC_USBH_PACKET_DATA_Pos 4
#define | XMC_USBH_PACKET_IN (0x03UL << XMC_USBH_PACKET_TOKEN_Pos)
#define | XMC_USBH_PACKET_OUT (0x02UL << XMC_USBH_PACKET_TOKEN_Pos)
#define | XMC_USBH_PACKET_PING (0x04UL << XMC_USBH_PACKET_TOKEN_Pos)
#define | XMC_USBH_PACKET_PRE (1UL << 12)
#define | XMC_USBH_PACKET_SETUP (0x01UL << XMC_USBH_PACKET_TOKEN_Pos)
#define | XMC_USBH_PACKET_SSPLIT (0x08UL << XMC_USBH_PACKET_SPLIT_Pos)
#define | XMC_USBH_PACKET_SSPLIT_E (0x0AUL << XMC_USBH_PACKET_SPLIT_Pos)
#define | XMC_USBH_PACKET_SSPLIT_S (0x09UL << XMC_USBH_PACKET_SPLIT_Pos)
#define | XMC_USBH_PACKET_SSPLIT_S_E (0x0BUL << XMC_USBH_PACKET_SPLIT_Pos)
#define | XMC_USBH_PACKET_TOKEN_Msk (0x0FUL << XMC_USBH_PACKET_TOKEN_Pos)
#define | XMC_USBH_PACKET_TOKEN_Pos 0
#define | XMC_USBH_SignalEndpointEvent_t XMC_USBH_SignalPipeEvent_t
#define | XMC_USBH_SPEED_FULL 1U
#define | XMC_USBH_SPEED_HIGH 2U
#define | XMC_USBH_SPEED_LOW 0U

Typedefs

typedef void(* | XMC_USBH_SignalPipeEvent_t) (XMC_USBH_PIPE_HANDLE pipe_hndl, uint32_t event)
typedef void(* | XMC_USBH_SignalPortEvent_t) (uint8_t port, uint32_t event)

Functions

uint32_t | XMC_USBH_GetInterruptStatus (void)
void | XMC_USBH_HandleIrq (uint32_t gintsts)
uint8_t | XMC_USBH_osDelay (uint32_t ms)
void | XMC_USBH_Select_VBUS (XMC_GPIO_PORT_t *port, uint32_t pin)
void | XMC_USBH_TurnOffResumeBit (void)

Detailed Description

Date
2016-06-30

XMClib v2.1.16 - XMC Peripheral Driver Library

Copyright (c) 2015-2017, Infineon Technologies AG All rights reserved.

Redistribution and use in source and binary forms, with or without modification,are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.

Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.

Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with Infineon Technologies AG dave@.nosp@m.infi.nosp@m.neon..nosp@m.com).

Change History

2016-06-30:

  • Initial Version.
    2016-09-01:
  • Removed Keil specific inclusions and macros
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_usic.h File Reference

  • File List
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  • inc
Data Structures | Macros | Typedefs | Enumerations | Functions
xmc_usic.h File Reference
#include "xmc_common.h"
#include "xmc1_usic_map.h"
#include "xmc4_usic_map.h"
Include dependency graph for xmc_usic.h:

Data Structures

struct XMC_USIC_CH_t

Macros

#define | USIC_CH_DXCR_CM_Msk USIC_CH_DX0CR_CM_Msk
#define | USIC_CH_DXCR_CM_Pos USIC_CH_DX0CR_CM_Pos
#define | USIC_CH_DXCR_DFEN_Msk USIC_CH_DX0CR_DFEN_Msk
#define | USIC_CH_DXCR_DPOL_Msk USIC_CH_DX0CR_DPOL_Msk
#define | USIC_CH_DXCR_DSEL_Msk USIC_CH_DX0CR_DSEL_Msk
#define | USIC_CH_DXCR_DSEL_Pos USIC_CH_DX0CR_DSEL_Pos
#define | USIC_CH_DXCR_DSEN_Msk USIC_CH_DX0CR_DSEN_Msk
#define | USIC_CH_DXCR_INSW_Msk USIC_CH_DX0CR_INSW_Msk
#define | USIC_CH_DXCR_INSW_pos USIC_CH_DX0CR_INSW_Pos
#define | USIC_CH_DXCR_SFSEL_Msk USIC_CH_DX0CR_SFSEL_Msk
#define | USIC_CH_DXCR_SFSEL_Pos USIC_CH_DX0CR_SFSEL_Pos
#define | XMC_USIC0 ((XMC_USIC_t *)USIC0_BASE)
#define | XMC_USIC0_CH0 ((XMC_USIC_CH_t *)USIC0_CH0_BASE)
#define | XMC_USIC0_CH1 ((XMC_USIC_CH_t *)USIC0_CH1_BASE)
#define | XMC_USIC1 ((XMC_USIC_t *)USIC1_BASE)
#define | XMC_USIC1_CH0 ((XMC_USIC_CH_t *)USIC1_CH0_BASE)
#define | XMC_USIC1_CH1 ((XMC_USIC_CH_t *)USIC1_CH1_BASE)
#define | XMC_USIC2 ((XMC_USIC_t *)USIC2_BASE)
#define | XMC_USIC2_CH0 ((XMC_USIC_CH_t *)USIC2_CH0_BASE)
#define | XMC_USIC2_CH1 ((XMC_USIC_CH_t *)USIC2_CH1_BASE)

Typedefs

typedef USIC_GLOBAL_TypeDef XMC_USIC_t

Enumerations

Functions

void | XMC_USIC_CH_ConfigExternalInputSignalToBRG (XMC_USIC_CH_t *const channel, const uint16_t pdiv, const uint32_t oversampling, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_USIC_CH_ConfigureShiftClockOutput (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t passive_level, const XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_t clock_output)
void | XMC_USIC_CH_ConnectInputDataShiftToDataInput (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_ConnectInputDataShiftToPPP (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_Disable (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_DisableFrameLengthControl (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_DisableInputSync (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_DisableTBUFDataValidTrigger (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableTimeMeasurement (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_Enable (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_EnableFrameLengthControl (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_EnableInputSync (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_EnableTBUFDataValidTrigger (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableTimeMeasurement (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_GetCaptureTimerValue (const XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_GetReceiveBufferStatus (XMC_USIC_CH_t *const channel)
XMC_USIC_CH_TBUF_STATUS_t | XMC_USIC_CH_GetTransmitBufferStatus (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_RXFIFO_ClearEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_RXFIFO_Configure (XMC_USIC_CH_t *const channel, const uint32_t data_pointer, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
void | XMC_USIC_CH_RXFIFO_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_RXFIFO_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_RXFIFO_Flush (XMC_USIC_CH_t *const channel)
uint16_t | XMC_USIC_CH_RXFIFO_GetData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_RXFIFO_GetEvent (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_RXFIFO_GetLevel (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_RXFIFO_IsEmpty (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_RXFIFO_IsFull (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_RXFIFO_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
void | XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
XMC_USIC_CH_STATUS_t | XMC_USIC_CH_SetBaudrate (XMC_USIC_CH_t *const channel, uint32_t rate, uint32_t oversampling)
void | XMC_USIC_CH_SetBRGInputClockSource (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_CLOCK_SOURCE_t clock_source)
void | XMC_USIC_CH_SetDataOutputMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_DATA_OUTPUT_MODE_t data_output_mode)
void | XMC_USIC_CH_SetFractionalDivider (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t mode, const uint16_t step)
void | XMC_USIC_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_USIC_CH_SetInputSamplingFreq (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input, const XMC_USIC_CH_INPUT_SAMPLING_FREQ_t sampling_freq)
void | XMC_USIC_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input, const uint8_t source)
void | XMC_USIC_CH_SetInputTriggerCombinationMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_USIC_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
void | XMC_USIC_CH_SetMclkOutputPassiveLevel (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_t passive_level)
void | XMC_USIC_CH_SetMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_OPERATING_MODE_t mode)
void | XMC_USIC_CH_SetPassiveDataLevel (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_PASSIVE_DATA_LEVEL_t passive_level)
void | XMC_USIC_CH_SetShiftDirection (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_SHIFT_DIRECTION_t shift_direction)
void | XMC_USIC_CH_SetStartTransmisionMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_START_TRANSMISION_MODE_t start_transmision_mode)
void | XMC_USIC_CH_SetTransmitBufferStatus (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_TBUF_STATUS_SET_t transmit_buffer_status)
void | XMC_USIC_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_USIC_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)
void | XMC_USIC_CH_TXFIFO_ClearEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_TXFIFO_Configure (XMC_USIC_CH_t *const channel, const uint32_t data_pointer, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
void | XMC_USIC_CH_TXFIFO_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_TXFIFO_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_TXFIFO_Flush (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_TXFIFO_GetEvent (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_TXFIFO_GetLevel (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_TXFIFO_IsEmpty (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_TXFIFO_IsFull (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_TXFIFO_PutData (XMC_USIC_CH_t *const channel, const uint16_t data)
void | XMC_USIC_CH_TXFIFO_PutDataFLEMode (XMC_USIC_CH_t *const channel, const uint16_t data, const uint32_t frame_length)
void | XMC_USIC_CH_TXFIFO_PutDataHPCMode (XMC_USIC_CH_t *const channel, const uint16_t data, const uint32_t frame_length)
void | XMC_USIC_CH_TXFIFO_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
void | XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
void | XMC_USIC_CH_WriteToTBUF (XMC_USIC_CH_t *const channel, const uint16_t data)
void | XMC_USIC_CH_WriteToTBUFTCI (XMC_USIC_CH_t *const channel, const uint16_t data, const uint32_t transmit_control_information)
void | XMC_USIC_Disable (XMC_USIC_t *const usic)
void | XMC_USIC_Enable (XMC_USIC_t *const usic)

Detailed Description

Date
2017-02-10
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_vadc.h File Reference

  • File List
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  • inc
Data Structures | Macros | Typedefs | Enumerations | Functions
xmc_vadc.h File Reference
#include <xmc_common.h>
#include <xmc_scu.h>
#include <xmc_vadc_map.h>
Include dependency graph for xmc_vadc.h:

Data Structures

struct | XMC_VADC_CHANNEL_CONFIG_t
struct | XMC_VADC_DETAILED_RESULT_t
struct | XMC_VADC_GLOBAL_CLASS_t
struct | XMC_VADC_GLOBAL_CLOCK_t
struct | XMC_VADC_GLOBAL_CONFIG_t
struct | XMC_VADC_GROUP_CLASS_t
struct | XMC_VADC_GROUP_CONFIG_t
struct | XMC_VADC_GROUP_EMUXCFG_t
struct | XMC_VADC_QUEUE_CONFIG_t
struct | XMC_VADC_QUEUE_ENTRY_t
struct | XMC_VADC_RESULT_CONFIG_t
struct | XMC_VADC_SCAN_CONFIG_t

Macros

#define XMC_VADC_NUM_CHANNELS_PER_GROUP (8U)

Typedefs

typedef XMC_VADC_SCAN_CONFIG_t | XMC_VADC_BACKGROUND_CONFIG_t
typedef VADC_GLOBAL_TypeDef | XMC_VADC_GLOBAL_t
typedef VADC_G_TypeDef | XMC_VADC_GROUP_t
typedef uint16_t | XMC_VADC_RESULT_SIZE_t

Enumerations

Functions

void | XMC_VADC_GLOBAL_BackgndAddMultipleChannels (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_mask)
void | XMC_VADC_GLOBAL_BackgndRemoveMultipleChannels (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_mask)
void | XMC_VADC_GLOBAL_BackgroundAbortSequence (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundAddChannelToSequence (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_num)
void | XMC_VADC_GLOBAL_BackgroundClearReqSrcEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundDisableContinuousMode (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundDisableEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundEnableContinuousMode (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundEnableEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger (XMC_VADC_GLOBAL_t *const global_ptr)
uint32_t | XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending (XMC_VADC_GLOBAL_t *const global_ptr)
bool | XMC_VADC_GLOBAL_BackgroundGetReqSrcEventStatus (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_BACKGROUND_CONFIG_t *config)
bool | XMC_VADC_GLOBAL_BackgroundIsChannelPending (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_num)
void | XMC_VADC_GLOBAL_BackgroundRemoveChannelFromSequence (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_num)
void | XMC_VADC_GLOBAL_BackgroundSelectGating (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t input_num)
void | XMC_VADC_GLOBAL_BackgroundSelectTrigger (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t input_num)
void | XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
void | XMC_VADC_GLOBAL_BackgroundSetGatingMode (XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_GATEMODE_t mode_sel)
void | XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode (XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_SR_t sr)
void | XMC_VADC_GLOBAL_BackgroundTriggerConversion (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundTriggerReqSrcEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BindGroupToEMux (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t emuxif, const uint32_t group)
void | XMC_VADC_GLOBAL_ClearEvent (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t event_type)
void | XMC_VADC_GLOBAL_ClockInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CLOCK_t *config)
void | XMC_VADC_GLOBAL_DisableModule (void)
void | XMC_VADC_GLOBAL_DisableModuleClock (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_DisablePostCalibration (XMC_VADC_GLOBAL_t *const global_ptr, uint32_t group_number)
void | XMC_VADC_GLOBAL_DisableSleepMode (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_DisableStartupCalibration (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_EnableModule (void)
void | XMC_VADC_GLOBAL_EnableModuleClock (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_EnablePostCalibration (XMC_VADC_GLOBAL_t *const global_ptr, uint32_t group_number)
void | XMC_VADC_GLOBAL_EnableSleepMode (XMC_VADC_GLOBAL_t *const global_ptr)
XMC_VADC_FAST_COMPARE_t | XMC_VADC_GLOBAL_GetCompareResult (XMC_VADC_GLOBAL_t *const global_ptr)
uint32_t | XMC_VADC_GLOBAL_GetDetailedResult (XMC_VADC_GLOBAL_t *const global_ptr)
XMC_VADC_RESULT_SIZE_t | XMC_VADC_GLOBAL_GetResult (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_Init (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CONFIG_t *config)
void | XMC_VADC_GLOBAL_InputClassInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CLASS_t config, const XMC_VADC_GROUP_CONV_t conv_type, const uint32_t set_num)
void | XMC_VADC_GLOBAL_ResultInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_RESULT_CONFIG_t *config)
void | XMC_VADC_GLOBAL_SetBoundaries (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t boundary0, const uint32_t boundary1)
void | XMC_VADC_GLOBAL_SetCompareValue (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_RESULT_SIZE_t compare_val)
void | XMC_VADC_GLOBAL_SetIndividualBoundary (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_CHANNEL_BOUNDARY_t selection, const uint16_t boundary_value)
void | XMC_VADC_GLOBAL_SetResultEventInterruptNode (XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_SR_t sr)
void | XMC_VADC_GLOBAL_StartupCalibration (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_TriggerEvent (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t event_type)
void | XMC_VADC_GROUP_AddResultToFifo (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_BackgroundDisableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_BackgroundEnableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ChannelClearEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
uint32_t | XMC_VADC_GROUP_ChannelGetAssertedEvents (XMC_VADC_GROUP_t *const group_ptr)
XMC_VADC_CHANNEL_CONV_t | XMC_VADC_GROUP_ChannelGetInputClass (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
XMC_VADC_RESULT_ALIGN_t | XMC_VADC_GROUP_ChannelGetResultAlignment (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
uint8_t | XMC_VADC_GROUP_ChannelGetResultRegister (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ChannelInit (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_CONFIG_t *config)
bool | XMC_VADC_GROUP_ChannelIsResultOutOfBounds (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ChannelSetBoundarySelection (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, XMC_VADC_BOUNDARY_SELECT_t boundary_sel, XMC_VADC_CHANNEL_BOUNDARY_t selection)
void | XMC_VADC_GROUP_ChannelSetEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_ChannelSetIclass (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_CONV_t conversion_class)
void | XMC_VADC_GROUP_ChannelSetInputReference (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_REF_t ref)
void | XMC_VADC_GROUP_ChannelSetResultRegister (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const uint32_t result_reg_num)
void | XMC_VADC_GROUP_ChannelTriggerEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ChannelTriggerEventGenCriteria (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_EVGEN_t criteria)
void | XMC_VADC_GROUP_CheckSlaveReadiness (XMC_VADC_GROUP_t *const group_ptr, uint32_t slave_group)
void | XMC_VADC_GROUP_ClearResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_DisableChannelSyncRequest (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_DisableResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_EnableChannelSyncRequest (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_EnableResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_ExternalMuxControlInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_EMUXCFG_t emux_cfg)
uint32_t | XMC_VADC_GROUP_GetAlias (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_GetAssertedResultEvents (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_GetDetailedResult (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
XMC_VADC_FAST_COMPARE_t | XMC_VADC_GROUP_GetFastCompareResult (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
XMC_VADC_GROUP_CLASS_t | XMC_VADC_GROUP_GetInputClass (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_CHANNEL_CONV_t conv_class)
XMC_VADC_RESULT_SIZE_t | XMC_VADC_GROUP_GetResult (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
uint32_t | XMC_VADC_GROUP_GetResultFifoHead (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
uint32_t | XMC_VADC_GROUP_GetResultFifoTail (XMC_VADC_GROUP_t *const group_ptr, uint32_t res_reg)
uint32_t | XMC_VADC_GROUP_GetSyncReadySignal (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_IgnoreSlaveReadiness (XMC_VADC_GROUP_t *const group_ptr, uint32_t slave_group)
void | XMC_VADC_GROUP_Init (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_CONFIG_t *config)
void | XMC_VADC_GROUP_InputClassInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_CLASS_t config, const XMC_VADC_GROUP_CONV_t conv_type, const uint32_t set_num)
XMC_VADC_GROUP_STATE_t | XMC_VADC_GROUP_IsConverterBusy (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_IsResultRegisterFifoHead (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
bool | XMC_VADC_GROUP_IsResultRegisterInFifo (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_QueueAbortSequence (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueClearReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueDisableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueDisableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueEnableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueEnableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueFlushEntries (XMC_VADC_GROUP_t *const group_ptr)
int32_t | XMC_VADC_GROUP_QueueGetInterruptedChannel (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_QueueGetLength (XMC_VADC_GROUP_t *const group_ptr)
int32_t | XMC_VADC_GROUP_QueueGetNextChannel (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_QueueGetReqSrcEventStatus (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_QUEUE_CONFIG_t *config)
void | XMC_VADC_GROUP_QueueInsertChannel (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_QUEUE_ENTRY_t entry)
bool | XMC_VADC_GROUP_QueueIsArbitrationSlotEnabled (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueRemoveChannel (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueSelectGating (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GATE_INPUT_SELECT_t input_num)
void | XMC_VADC_GROUP_QueueSelectTrigger (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_INPUT_SELECT_t input_num)
void | XMC_VADC_GROUP_QueueSelectTriggerEdge (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
void | XMC_VADC_GROUP_QueueSetGatingMode (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_GATEMODE_t mode_sel)
void | XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_QueueTriggerConversion (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueTriggerReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ResultInit (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg_num, const XMC_VADC_RESULT_CONFIG_t *config)
void | XMC_VADC_GROUP_ScanAddChannelToSequence (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ScanAddMultipleChannels (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_mask)
void | XMC_VADC_GROUP_ScanClearReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableContinuousMode (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableContinuousMode (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_ScanGetNumChannelsPending (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_ScanGetReqSrcEventStatus (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SCAN_CONFIG_t *config)
bool | XMC_VADC_GROUP_ScanIsArbitrationSlotEnabled (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_ScanIsChannelPending (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ScanRemoveChannel (XMC_VADC_GROUP_t *const group_ptr, const uint32_t channel_num)
void | XMC_VADC_GROUP_ScanSelectGating (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_GATE_INPUT_SELECT_t gating_input)
void | XMC_VADC_GROUP_ScanSelectTrigger (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_TRIGGER_INPUT_SELECT_t trigger_input)
void | XMC_VADC_GROUP_ScanSelectTriggerEdge (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
void | XMC_VADC_GROUP_ScanSequenceAbort (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanSetGatingMode (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_GATEMODE_t mode_sel)
void | XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_ScanTriggerConversion (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanTriggerReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_SetBoundaries (XMC_VADC_GROUP_t *const group_ptr, const uint32_t boundary0, const uint32_t boundary1)
void | XMC_VADC_GROUP_SetBoundaryEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const uint8_t boundary_flag_num, const XMC_VADC_BOUNDARY_NODE_t node)
void | XMC_VADC_GROUP_SetChannelAlias (XMC_VADC_GROUP_t *const group_ptr, const uint32_t src_ch_num, const uint32_t alias_ch_num)
void | XMC_VADC_GROUP_SetIndividualBoundary (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_CHANNEL_BOUNDARY_t selection, const uint16_t boundary_value)
void | XMC_VADC_GROUP_SetPowerMode (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_POWERMODE_t power_mode)
void | XMC_VADC_GROUP_SetResultFastCompareValue (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg, const XMC_VADC_RESULT_SIZE_t compare_val)
void | XMC_VADC_GROUP_SetResultInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_SetResultSubtractionValue (XMC_VADC_GROUP_t *const group_ptr, const uint16_t subtraction_val)
void | XMC_VADC_GROUP_SetSyncMaster (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_SetSyncReadySignal (XMC_VADC_GROUP_t *const group_ptr, uint32_t mask)
void | XMC_VADC_GROUP_SetSyncSlave (XMC_VADC_GROUP_t *const group_ptr, uint32_t master_grp, uint32_t slave_group)
void | XMC_VADC_GROUP_SetSyncSlaveReadySignal (XMC_VADC_GROUP_t *const group_ptr, uint32_t eval_waiting_group, uint32_t eval_origin_group)
void | XMC_VADC_GROUP_TriggerResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_TriggerServiceRequest (XMC_VADC_GROUP_t *const group_ptr, const uint32_t sr_num, const XMC_VADC_GROUP_IRQ_t type)

Detailed Description

Date
2017-06-24
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: xmc_wdt.h File Reference

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xmc_wdt.h File Reference
#include "xmc_common.h"
#include "xmc_scu.h"
Include dependency graph for xmc_wdt.h:

Data Structures

struct XMC_WDT_CONFIG_t

Enumerations

Functions

void | XMC_WDT_ClearAlarm (void)
void | XMC_WDT_Disable (void)
void | XMC_WDT_Enable (void)
uint32_t | XMC_WDT_GetCounter (void)
void | XMC_WDT_Init (const XMC_WDT_CONFIG_t *const config)
void | XMC_WDT_Service (void)
void | XMC_WDT_SetDebugMode (const XMC_WDT_DEBUG_MODE_t debug_mode)
void | XMC_WDT_SetMode (XMC_WDT_MODE_t mode)
void | XMC_WDT_SetServicePulseWidth (uint8_t service_pulse_width)
void | XMC_WDT_SetWindowBounds (uint32_t lower_bound, uint32_t upper_bound)
void | XMC_WDT_Start (void)
void | XMC_WDT_Stop (void)

Detailed Description

Date
2015-08-06
Generated on Mon Aug 7 2017 11:33:56 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

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Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- c -

  • CAN_MO_MOIPR_Msk : xmc_can.h
  • CAN_NODE_NIPR_Msk : xmc_can.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

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Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

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  • Driver_USBD0 : xmc_usbd.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

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Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

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  • ETH_MAC_DMA_RDES0_AFM : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_CE : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_DBE : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_DE : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_ES : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_ESA : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_FL : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_FS : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_FT : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_LC : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_LE : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_LS : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_OE : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_OWN : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_RE : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_RWT : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_SAF : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_TSA : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_VLAN : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_CC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_CIC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_DB : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_DC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_DP : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_EC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_ED : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_ES : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_FF : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_FS : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_IC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_IHE : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_IPE : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_JT : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_LC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_LOC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_LS : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_NC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_OWN : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_TCH : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_TER : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_TTSE : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_TTSS : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_UF : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_VF : xmc_eth_mac.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • c
  • d
  • e
  • u
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- u -

  • USB_CH_HCCHARx_DEVADDR : xmc_usbh.h
  • USB_CH_HCCHARx_EPDIR : xmc_usbh.h
  • USB_CH_HCCHARx_EPNUM : xmc_usbh.h
  • USB_CH_HCCHARx_EPTYPE : xmc_usbh.h
  • USB_CH_HCCHARx_MCEC : xmc_usbh.h
  • USB_CH_HCCHARx_MPS : xmc_usbh.h
  • USB_CH_HCFG_FSLSPCS : xmc_usbh.h
  • USB_CH_HCFG_FSLSSUP : xmc_usbh.h
  • USB_CH_HCINTx_ALL : xmc_usbh.h
  • USB_CH_HCINTx_ERRORS : xmc_usbh.h
  • USB_CH_HCTSIZx_DPID : xmc_usbh.h
  • USB_CH_HCTSIZx_DPID_DATA0 : xmc_usbh.h
  • USB_CH_HCTSIZx_DPID_DATA1 : xmc_usbh.h
  • USB_CH_HCTSIZx_DPID_DATA2 : xmc_usbh.h
  • USB_CH_HCTSIZx_DPID_MDATA : xmc_usbh.h
  • USB_CH_HCTSIZx_DPID_SETUP : xmc_usbh.h
  • USB_GRXSTSR_HOSTMODE_PktSts_IN_DATA_PKT : xmc_usbh.h
  • USB_GRXSTSR_HOSTMODE_PktSts_IN_TRSF_CPL : xmc_usbh.h
  • USBH0_MAX_PIPE_NUM : xmc_usbh.h
  • USBH_PIPE_GET_INDEX : xmc_usbh.h
  • USIC_CH_DXCR_CM_Msk : xmc_usic.h
  • USIC_CH_DXCR_CM_Pos : xmc_usic.h
  • USIC_CH_DXCR_DFEN_Msk : xmc_usic.h
  • USIC_CH_DXCR_DPOL_Msk : xmc_usic.h
  • USIC_CH_DXCR_DSEL_Msk : xmc_usic.h
  • USIC_CH_DXCR_DSEL_Pos : xmc_usic.h
  • USIC_CH_DXCR_DSEN_Msk : xmc_usic.h
  • USIC_CH_DXCR_INSW_Msk : xmc_usic.h
  • USIC_CH_DXCR_INSW_pos : xmc_usic.h
  • USIC_CH_DXCR_SFSEL_Msk : xmc_usic.h
  • USIC_CH_DXCR_SFSEL_Pos : xmc_usic.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • c
  • d
  • e
  • u
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- x -

  • XMC_CAN_AllocateMOtoNodeList() : xmc_can.h
  • XMC_CAN_ARBITRATION_MODE_IDE_DIR_BASED_PRIO_2 : xmc_can.h
  • XMC_CAN_ARBITRATION_MODE_ORDER_BASED_PRIO_1 : xmc_can.h
  • XMC_CAN_ARBITRATION_MODE_ORDER_BASED_PRIO_3 : xmc_can.h
  • XMC_CAN_ARBITRATION_MODE_t : xmc_can.h
  • XMC_CAN_CANCLKSRC_t : xmc_can.h
  • XMC_CAN_Disable() : xmc_can.h
  • XMC_CAN_DM_FRACTIONAL : xmc_can.h
  • XMC_CAN_DM_NORMAL : xmc_can.h
  • XMC_CAN_DM_OFF : xmc_can.h
  • XMC_CAN_DM_t : xmc_can.h
  • XMC_CAN_Enable() : xmc_can.h
  • XMC_CAN_EventTrigger() : xmc_can.h
  • XMC_CAN_FIFO_DisableForeingRemoteRequest() : xmc_can.h
  • XMC_CAN_FIFO_DisableRemoteMonitoring() : xmc_can.h
  • XMC_CAN_FIFO_DisableSingleDataTransfer() : xmc_can.h
  • XMC_CAN_FIFO_EnableForeignRemoteRequest() : xmc_can.h
  • XMC_CAN_FIFO_EnableRemoteMonitoring() : xmc_can.h
  • XMC_CAN_FIFO_EnableSingleDataTransfer() : xmc_can.h
  • XMC_CAN_FIFO_GetCurrentMO() : xmc_can.h
  • XMC_CAN_FIFO_SetSELMO() : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE_BIT_TIMING : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE_t : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE_TIME_STAMP : xmc_can.h
  • XMC_CAN_FRAME_TYPE_EXTENDED_29BITS : xmc_can.h
  • XMC_CAN_FRAME_TYPE_STANDARD_11BITS : xmc_can.h
  • XMC_CAN_FRAME_TYPE_t : xmc_can.h
  • XMC_CAN_GATEWAY_InitDesObject() : xmc_can.h
  • XMC_CAN_GATEWAY_InitSourceObject() : xmc_can.h
  • XMC_CAN_Init() : xmc_can.h
  • XMC_CAN_IsPanelControlReady() : xmc_can.h
  • XMC_CAN_LOOKBACKMODE_DISABLED : xmc_can.h
  • XMC_CAN_LOOKBACKMODE_ENABLED : xmc_can.h
  • XMC_CAN_LOOKBACKMODE_t : xmc_can.h
  • XMC_CAN_MO_AcceptOnlyMatchingIDE() : xmc_can.h
  • XMC_CAN_MO_AcceptStandardAndExtendedID() : xmc_can.h
  • XMC_CAN_MO_Config() : xmc_can.h
  • XMC_CAN_MO_DataLengthCode() : xmc_can.h
  • XMC_CAN_MO_DisableEvent() : xmc_can.h
  • XMC_CAN_MO_DisableSingleTransmitTrial() : xmc_can.h
  • XMC_CAN_MO_EnableEvent() : xmc_can.h
  • XMC_CAN_MO_EnableSingleTransmitTrial() : xmc_can.h
  • XMC_CAN_MO_EVENT_OVERFLOW : xmc_can.h
  • XMC_CAN_MO_EVENT_RECEIVE : xmc_can.h
  • XMC_CAN_MO_EVENT_t : xmc_can.h
  • XMC_CAN_MO_EVENT_TRANSMIT : xmc_can.h
  • XMC_CAN_MO_GetAcceptanceMask() : xmc_can.h
  • XMC_CAN_MO_GetDataLengthCode() : xmc_can.h
  • XMC_CAN_MO_GetIdentifier() : xmc_can.h
  • XMC_CAN_MO_GetStatus() : xmc_can.h
  • XMC_CAN_MO_MOAR_STDID_Msk : xmc_can.h
  • XMC_CAN_MO_MOAR_STDID_Pos : xmc_can.h
  • XMC_CAN_MO_POINTER_EVENT_RECEIVE : xmc_can.h
  • XMC_CAN_MO_POINTER_EVENT_t : xmc_can.h
  • XMC_CAN_MO_POINTER_EVENT_TRANSMIT : xmc_can.h
  • XMC_CAN_MO_Receive() : xmc_can.h
  • XMC_CAN_MO_ReceiveData() : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_MESSAGE_DIRECTION : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_MESSAGE_LOST : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_MESSAGE_VALID : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_NEW_DATA : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_ENABLE : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_PENDING : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_TX_SELECTED : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_UPDATING : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_t : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_ENABLE0 : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_ENABLE1 : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_PENDING : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_REQUEST : xmc_can.h
  • XMC_CAN_MO_ResetStatus() : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_MESSAGE_DIRECTION : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_MESSAGE_LOST : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_MESSAGE_VALID : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_NEW_DATA : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_ENABLE : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_PENDING : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_TX_SELECTED : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_UPDATING : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_t : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_ENABLE0 : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_ENABLE1 : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_PENDING : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_REQUEST : xmc_can.h
  • XMC_CAN_MO_SetAcceptanceMask() : xmc_can.h
  • XMC_CAN_MO_SetDataLengthCode() : xmc_can.h
  • XMC_CAN_MO_SetEventNodePointer() : xmc_can.h
  • XMC_CAN_MO_SetExtendedID() : xmc_can.h
  • XMC_CAN_MO_SetIdentifier() : xmc_can.h
  • XMC_CAN_MO_SetStandardID() : xmc_can.h
  • XMC_CAN_MO_SetStatus() : xmc_can.h
  • XMC_CAN_MO_STATUS_LIST : xmc_can.h
  • XMC_CAN_MO_STATUS_MESSAGE_DIRECTION : xmc_can.h
  • XMC_CAN_MO_STATUS_MESSAGE_LOST : xmc_can.h
  • XMC_CAN_MO_STATUS_MESSAGE_VALID : xmc_can.h
  • XMC_CAN_MO_STATUS_NEW_DATA : xmc_can.h
  • XMC_CAN_MO_STATUS_POINTER_TO_NEXT_MO : xmc_can.h
  • XMC_CAN_MO_STATUS_POINTER_TO_PREVIOUS_MO : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_ENABLE : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_PENDING : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_TX_SELECTED : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_UPDATING : xmc_can.h
  • XMC_CAN_MO_STATUS_t : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_ENABLE0 : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_ENABLE1 : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_PENDING : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_REQUEST : xmc_can.h
  • XMC_CAN_MO_Transmit() : xmc_can.h
  • XMC_CAN_MO_TYPE_RECMSGOBJ : xmc_can.h
  • XMC_CAN_MO_TYPE_t : xmc_can.h
  • XMC_CAN_MO_TYPE_TRANSMSGOBJ : xmc_can.h
  • XMC_CAN_MO_UpdateData() : xmc_can.h
  • XMC_CAN_NODE_ClearStatus() : xmc_can.h
  • XMC_CAN_NODE_CONTROL_ALERT_INT_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_CAN_ANALYZER_NODEDE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_CAN_DISABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_CONF_CHANGE_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_LEC_INT_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_NODE_INIT : xmc_can.h
  • XMC_CAN_NODE_CONTROL_SUSPENDED_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_t : xmc_can.h
  • XMC_CAN_NODE_CONTROL_TX_INT_ENABLE : xmc_can.h
  • XMC_CAN_NODE_Disable() : xmc_can.h
  • XMC_CAN_NODE_DisableConfigurationChange() : xmc_can.h
  • XMC_CAN_NODE_DisableEvent() : xmc_can.h
  • XMC_CAN_NODE_DisableLoopBack() : xmc_can.h
  • XMC_CAN_NODE_Enable() : xmc_can.h
  • XMC_CAN_NODE_EnableConfigurationChange() : xmc_can.h
  • XMC_CAN_NODE_EnableEvent() : xmc_can.h
  • XMC_CAN_NODE_EnableLoopBack() : xmc_can.h
  • XMC_CAN_NODE_EnableSuspend() : xmc_can.h
  • XMC_CAN_NODE_EVENT_ALERT : xmc_can.h
  • XMC_CAN_NODE_EVENT_CFCIE : xmc_can.h
  • XMC_CAN_NODE_EVENT_LEC : xmc_can.h
  • XMC_CAN_NODE_EVENT_t : xmc_can.h
  • XMC_CAN_NODE_EVENT_TX_INT : xmc_can.h
  • XMC_CAN_NODE_FrameCounterConfigure() : xmc_can.h
  • XMC_CAN_NODE_GetCANFrameCounter() : xmc_can.h
  • XMC_CAN_NODE_GetErrorWarningLevel() : xmc_can.h
  • XMC_CAN_NODE_GetLastErrTransferDir() : xmc_can.h
  • XMC_CAN_NODE_GetLastErrTransferInc() : xmc_can.h
  • XMC_CAN_NODE_GetReceiveErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_GetStatus() : xmc_can.h
  • XMC_CAN_NODE_GetTransmitErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_INTERRUPT_TRIGGER_t : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_DIR_t : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_DIR_WHILE_NODE_RECEPCION : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_DIR_WHILE_NODE_TRANSMISSION : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_INC_1 : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_INC_8 : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_INC_t : xmc_can.h
  • XMC_CAN_NODE_NominalBitTimeConfigure() : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_ALERT : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_FRAME_COUNTER : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_LEC : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_t : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_TRANSFER_OK : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCA : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCB : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCC : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCD : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCE : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCF : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCG : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCH : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_t : xmc_can.h
  • XMC_CAN_NODE_ReSetAnalyzerMode() : xmc_can.h
  • XMC_CAN_NODE_ResetInitBit() : xmc_can.h
  • XMC_CAN_NODE_SetAnalyzerMode() : xmc_can.h
  • XMC_CAN_NODE_SetErrorWarningLevel() : xmc_can.h
  • XMC_CAN_NODE_SetEventNodePointer() : xmc_can.h
  • XMC_CAN_NODE_SetInitBit() : xmc_can.h
  • XMC_CAN_NODE_SetReceiveErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_SetReceiveInput() : xmc_can.h
  • XMC_CAN_NODE_SetTransmitErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_STATUS_ALERT_WARNING : xmc_can.h
  • XMC_CAN_NODE_STATUS_BUS_OFF : xmc_can.h
  • XMC_CAN_NODE_STATUS_ERROR_WARNING_STATUS : xmc_can.h
  • XMC_CAN_NODE_STATUS_LAST_ERROR_CODE : xmc_can.h
  • XMC_CAN_NODE_STATUS_LIST_LENGTH_ERROR : xmc_can.h
  • XMC_CAN_NODE_STATUS_LIST_OBJECT_ERROR : xmc_can.h
  • XMC_CAN_NODE_STATUS_RX_OK : xmc_can.h
  • XMC_CAN_NODE_STATUS_SUSPENDED_ACK : xmc_can.h
  • XMC_CAN_NODE_STATUS_t : xmc_can.h
  • XMC_CAN_NODE_STATUS_TX_OK : xmc_can.h
  • XMC_CAN_NODE_t : xmc_can.h
  • XMC_CAN_PANCMD_DYNAMIC_ALLOCATE : xmc_can.h
  • XMC_CAN_PANCMD_DYNAMIC_INSERT_BEFORE : xmc_can.h
  • XMC_CAN_PANCMD_DYNAMIC_INSERT_BEHIND : xmc_can.h
  • XMC_CAN_PANCMD_INIT_LIST : xmc_can.h
  • XMC_CAN_PANCMD_STATIC_ALLOCATE : xmc_can.h
  • XMC_CAN_PANCMD_STATIC_INSERT_BEFORE : xmc_can.h
  • XMC_CAN_PANCMD_STATIC_INSERT_BEHIND : xmc_can.h
  • XMC_CAN_PANCMD_t : xmc_can.h
  • XMC_CAN_PanelControl() : xmc_can.h
  • XMC_CAN_RXFIFO_ConfigMOBaseObject() : xmc_can.h
  • XMC_CAN_RXFIFO_ConfigMOSlaveObject() : xmc_can.h
  • XMC_CAN_STATUS_BUSY : xmc_can.h
  • XMC_CAN_STATUS_ERROR : xmc_can.h
  • XMC_CAN_STATUS_MO_DISABLED : xmc_can.h
  • XMC_CAN_STATUS_MO_NOT_ACCEPTABLE : xmc_can.h
  • XMC_CAN_STATUS_SUCCESS : xmc_can.h
  • XMC_CAN_STATUS_t : xmc_can.h
  • XMC_CAN_t : xmc_can.h
  • XMC_CAN_TXFIFO_ConfigMOBaseObject() : xmc_can.h
  • XMC_CAN_TXFIFO_ConfigMOSlaveObject() : xmc_can.h
  • XMC_CAN_TXFIFO_Transmit() : xmc_can.h
  • XMC_CCU4_CLOCK_EXTERNAL_A : xmc_ccu4.h
  • XMC_CCU4_CLOCK_EXTERNAL_B : xmc_ccu4.h
  • XMC_CCU4_CLOCK_EXTERNAL_C : xmc_ccu4.h
  • XMC_CCU4_CLOCK_SCU : xmc_ccu4.h
  • XMC_CCU4_CLOCK_t : xmc_ccu4.h
  • XMC_CCU4_DisableClock() : xmc_ccu4.h
  • XMC_CCU4_DisableModule() : xmc_ccu4.h
  • XMC_CCU4_EnableClock() : xmc_ccu4.h
  • XMC_CCU4_EnableModule() : xmc_ccu4.h
  • XMC_CCU4_EnableMultipleClocks() : xmc_ccu4.h
  • XMC_CCU4_EnableShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_Init() : xmc_ccu4.h
  • XMC_CCU4_IsPrescalerRunning() : xmc_ccu4.h
  • XMC_CCU4_MODULE_t : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE0 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE1 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE2 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE3 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE0 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE1 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE2 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE3 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_t : xmc_ccu4.h
  • XMC_CCU4_SetModuleClock() : xmc_ccu4.h
  • XMC_CCU4_SetMultiChannelShadowTransferMode() : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_COMPARE_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_DITHER_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_FLOATING_PRESCALER_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PASSIVE_LEVEL : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PERIOD_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_CAP_REG_SET_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_CAP_REG_SET_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_CAP_REG_SET_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_Capture0Config() : xmc_ccu4.h
  • XMC_CCU4_SLICE_Capture1Config() : xmc_ccu4.h
  • XMC_CCU4_SLICE_CaptureInit() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ClearEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ClearTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_CompareInit() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ConfigureEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ConfigureStatusBitOverrideEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_CountConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DirectionConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableAutomaticShadowTransferRequest() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableCascadedShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableDithering() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableFloatingPrescaler() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableMultiChannelMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableMultipleEvents() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableTrap() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableAutomaticShadowTransferRequest() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableCascadedShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableDithering() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableFloatingPrescaler() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableMultiChannelMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableMultipleEvents() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableTrap() : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_TIMER_CLEAR : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_TIMER_STOP : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_TIMER_STOP_CLEAR : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_NONE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_3_CYCLES : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_5_CYCLES : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_7_CYCLES : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_DISABLED : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_NONE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_CAPTURE_EVENT0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_CAPTURE_EVENT1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_COUNT : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_DIRECTION : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_GATING : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_LOAD : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_MODULATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_OVERRIDE : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_START : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_STOP : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_TRAP : xmc_ccu4.h
  • XMC_CCU4_SLICE_GateConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetCapturedValueFromFifo() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetCaptureRegisterValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetCountingDir() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetLastCapturedTimerValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetSliceMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerCompareMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerCountingMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerPeriodMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerRepeatMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_INPUT_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_COMPARE_MATCH_DOWN : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_COMPARE_MATCH_UP : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_EVENT0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_EVENT1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_EVENT2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_PERIOD_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_TRAP : xmc_ccu4.h
  • XMC_CCU4_SLICE_IsExtendedCapReadEnabled() : xmc_ccu4.h
  • XMC_CCU4_SLICE_IsTimerRunning() : xmc_ccu4.h
  • XMC_CCU4_SLICE_LoadConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODE_CAPTURE : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODE_COMPARE : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODULATION_MODE_CLEAR_OUT : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODULATION_MODE_CLEAR_ST_OUT : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODULATION_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_ModulationConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_PERIOD_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_1024 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_128 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_16 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_16384 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_2048 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_256 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_32 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_32768 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_4 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_4096 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_512 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_64 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_8 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_8192 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_MODE_FLOAT : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_MODE_NORMAL : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetDitherCompareValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetInput() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetInterruptNode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetPassiveLevel() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetPrescaler() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetShadowTransferMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerCompareMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerCountingMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerPeriodMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerRepeatMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_IN_PERIOD_MATCH_AND_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_PERIOD_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_3 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_START_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_START_MODE_TIMER_START : xmc_ccu4.h
  • XMC_CCU4_SLICE_START_MODE_TIMER_START_CLEAR : xmc_ccu4.h
  • XMC_CCU4_SLICE_StartConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StartTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StatusBitOverrideConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StopClearTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StopConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StopTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_ALWAYS : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_CAP_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_CAP_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_NEVER : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_DIR_DOWN : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_DIR_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_DIR_UP : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_MODE_CA : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_MODE_EA : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_REPEAT_MODE_REPEAT : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_REPEAT_MODE_SINGLE : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TRAP_EXIT_MODE_AUTOMATIC : xmc_ccu4.h
  • XMC_CCU4_SLICE_TRAP_EXIT_MODE_SW : xmc_ccu4.h
  • XMC_CCU4_SLICE_TRAP_EXIT_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TrapConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_COMPARE_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_DITHER_VALUE_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_FLOATING_PRESCALER_VALUE_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_PASSIVE_LEVEL_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_PERIOD_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_WriteCoherentlyWithPWMCycle() : xmc_ccu4.h
  • XMC_CCU4_SLICE_WriteImmediateAfterShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_StartPrescaler() : xmc_ccu4.h
  • XMC_CCU4_STATUS_ERROR : xmc_ccu4.h
  • XMC_CCU4_STATUS_IDLE : xmc_ccu4.h
  • XMC_CCU4_STATUS_OK : xmc_ccu4.h
  • XMC_CCU4_STATUS_RUNNING : xmc_ccu4.h
  • XMC_CCU4_STATUS_t : xmc_ccu4.h
  • XMC_CCU4_StopPrescaler() : xmc_ccu4.h
  • XMC_CCU8_CLOCK_EXTERNAL_A : xmc_ccu8.h
  • XMC_CCU8_CLOCK_EXTERNAL_B : xmc_ccu8.h
  • XMC_CCU8_CLOCK_EXTERNAL_C : xmc_ccu8.h
  • XMC_CCU8_CLOCK_SCU : xmc_ccu8.h
  • XMC_CCU8_CLOCK_t : xmc_ccu8.h
  • XMC_CCU8_DisableClock() : xmc_ccu8.h
  • XMC_CCU8_DisableModule() : xmc_ccu8.h
  • XMC_CCU8_EnableClock() : xmc_ccu8.h
  • XMC_CCU8_EnableModule() : xmc_ccu8.h
  • XMC_CCU8_EnableMultipleClocks() : xmc_ccu8.h
  • XMC_CCU8_EnableShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_Init() : xmc_ccu8.h
  • XMC_CCU8_IsPrescalerRunning() : xmc_ccu8.h
  • XMC_CCU8_MODULE_t : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE0 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE1 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE2 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE3 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE0 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE1 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE2 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE3 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_t : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT0_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT0_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT1_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT1_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT2_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT2_ST2 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT3_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT3_ST2 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_t : xmc_ccu8.h
  • XMC_CCU8_SetModuleClock() : xmc_ccu8.h
  • XMC_CCU8_SetMultiChannelShadowTransferMode() : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_CAP_REG_SET_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_CAP_REG_SET_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_CAP_REG_SET_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_Capture0Config() : xmc_ccu8.h
  • XMC_CCU8_SLICE_Capture1Config() : xmc_ccu8.h
  • XMC_CCU8_SLICE_CaptureInit() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ClearEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ClearTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_COMPARE_CHANNEL_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_COMPARE_CHANNEL_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_COMPARE_CHANNEL_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_CompareInit() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureDeadTime() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureStatusBitOutput() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_CountConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DeadTimeInit() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DirectionConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableCascadedShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableDithering() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableFloatingPrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableMultiChannelMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableMultipleEvents() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableTrap() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_4 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_8 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableAsymmetricCompareMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableCascadedShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableDithering() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableFloatingPrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableMultiChannelMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableMultipleEvents() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableSymmetricCompareMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableTrap() : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_TIMER_CLEAR : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_TIMER_STOP : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_TIMER_STOP_CLEAR : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_NONE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_3_CYCLES : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_5_CYCLES : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_7_CYCLES : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_DISABLED : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_NONE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_COUNT : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_DIRECTION : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_GATING : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_LOAD : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_MODULATION : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_OVERRIDE : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_START : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_STOP : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_TRAP : xmc_ccu8.h
  • XMC_CCU8_SLICE_GateConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetCapturedValueFromFifo() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetCaptureRegisterValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetCountingDir() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetLastCapturedTimerValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetSliceMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerCompareMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerCountingMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerPeriodMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerRepeatMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_INPUT_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_EVENT0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_EVENT1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_EVENT2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_PERIOD_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_TRAP : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsDeadTimeCntr1Running() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsDeadTimeCntr2Running() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsExtendedCapReadEnabled() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsTimerRunning() : xmc_ccu8.h
  • XMC_CCU8_SLICE_LoadConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_LoadSelector() : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODE_CAPTURE : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODE_COMPARE : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_1_AND_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_NONE : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_OUT : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_ST_OUT : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_ModulationConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_PERIOD_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_1024 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_128 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_16 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_16384 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_2048 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_256 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_32 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_32768 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_4 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_4096 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_512 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_64 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_8 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_8192 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_MODE_FLOAT : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_MODE_NORMAL : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetDeadTimePrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetDeadTimeValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetDitherCompareValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetInput() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetInterruptNode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetOutPath() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetPassiveLevel() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetPrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetShadowTransferMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCompareMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCompareMatchChannel1() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCompareMatchChannel2() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCountingMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerPeriodMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerRepeatMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_IN_PERIOD_MATCH_AND_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_PERIOD_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_START_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_START_MODE_TIMER_START : xmc_ccu8.h
  • XMC_CCU8_SLICE_START_MODE_TIMER_START_CLEAR : xmc_ccu8.h
  • XMC_CCU8_SLICE_StartConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StartTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_1_AND_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_1_OR_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_StatusBitOverrideConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StopClearTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StopConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StopTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_ALWAYS : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_NEVER : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_DIR_DOWN : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_DIR_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_DIR_UP : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_MODE_CA : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_MODE_EA : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_REPEAT_MODE_REPEAT : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_REPEAT_MODE_SINGLE : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TRAP_EXIT_MODE_AUTOMATIC : xmc_ccu8.h
  • XMC_CCU8_SLICE_TRAP_EXIT_MODE_SW : xmc_ccu8.h
  • XMC_CCU8_SLICE_TRAP_EXIT_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TrapConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_WriteCoherentlyWithPWMCycle() : xmc_ccu8.h
  • XMC_CCU8_SLICE_WriteImmediateAfterShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_t : xmc_ccu8.h
  • XMC_CCU8_StartPrescaler() : xmc_ccu8.h
  • XMC_CCU8_STATUS_ERROR : xmc_ccu8.h
  • XMC_CCU8_STATUS_IDLE : xmc_ccu8.h
  • XMC_CCU8_STATUS_OK : xmc_ccu8.h
  • XMC_CCU8_STATUS_RUNNING : xmc_ccu8.h
  • XMC_CCU8_STATUS_t : xmc_ccu8.h
  • XMC_CCU8_StopPrescaler() : xmc_ccu8.h
  • XMC_DAC0 : xmc_dac.h
  • XMC_DAC_CH_DATA_TYPE_SIGNED : xmc_dac.h
  • XMC_DAC_CH_DATA_TYPE_t : xmc_dac.h
  • XMC_DAC_CH_DATA_TYPE_UNSIGNED : xmc_dac.h
  • XMC_DAC_CH_DisableEvent() : xmc_dac.h
  • XMC_DAC_CH_DisableOutput() : xmc_dac.h
  • XMC_DAC_CH_DisableOutputNegation() : xmc_dac.h
  • XMC_DAC_CH_DisablePatternSignOutput() : xmc_dac.h
  • XMC_DAC_CH_EnableEvent() : xmc_dac.h
  • XMC_DAC_CH_EnableOutput() : xmc_dac.h
  • XMC_DAC_CH_EnableOutputNegation() : xmc_dac.h
  • XMC_DAC_CH_EnablePatternSignOutput() : xmc_dac.h
  • XMC_DAC_CH_GetOutputScale() : xmc_dac.h
  • XMC_DAC_CH_GetRampStart() : xmc_dac.h
  • XMC_DAC_CH_GetRampStop() : xmc_dac.h
  • XMC_DAC_CH_Init() : xmc_dac.h
  • XMC_DAC_CH_IsFifoEmpty() : xmc_dac.h
  • XMC_DAC_CH_IsFifoFull() : xmc_dac.h
  • XMC_DAC_CH_IsOutputEnabled() : xmc_dac.h
  • XMC_DAC_CH_MODE_DATA : xmc_dac.h
  • XMC_DAC_CH_MODE_IDLE : xmc_dac.h
  • XMC_DAC_CH_MODE_NOISE : xmc_dac.h
  • XMC_DAC_CH_MODE_PATTERN : xmc_dac.h
  • XMC_DAC_CH_MODE_RAMP : xmc_dac.h
  • XMC_DAC_CH_MODE_SINGLE : xmc_dac.h
  • XMC_DAC_CH_MODE_t : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_NEGATION_DISABLED : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_NEGATION_ENABLED : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_NEGATION_t : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_128 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_16 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_2 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_32 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_4 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_64 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_8 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_128 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_16 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_2 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_32 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_4 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_64 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_8 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_NONE : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_t : xmc_dac.h
  • XMC_DAC_CH_PATTERN_SIGN_OUTPUT_DISABLED : xmc_dac.h
  • XMC_DAC_CH_PATTERN_SIGN_OUTPUT_ENABLED : xmc_dac.h
  • XMC_DAC_CH_PATTERN_SIGN_OUTPUT_t : xmc_dac.h
  • XMC_DAC_CH_SetFrequency() : xmc_dac.h
  • XMC_DAC_CH_SetMode() : xmc_dac.h
  • XMC_DAC_CH_SetOutputOffset() : xmc_dac.h
  • XMC_DAC_CH_SetOutputScale() : xmc_dac.h
  • XMC_DAC_CH_SetPattern() : xmc_dac.h
  • XMC_DAC_CH_SetPatternFrequency() : xmc_dac.h
  • XMC_DAC_CH_SetRampFrequency() : xmc_dac.h
  • XMC_DAC_CH_SetRampStart() : xmc_dac.h
  • XMC_DAC_CH_SetRampStop() : xmc_dac.h
  • XMC_DAC_CH_SetSignedDataType() : xmc_dac.h
  • XMC_DAC_CH_SetTrigger() : xmc_dac.h
  • XMC_DAC_CH_SetUnsignedDataType() : xmc_dac.h
  • XMC_DAC_CH_SoftwareTrigger() : xmc_dac.h
  • XMC_DAC_CH_StartDataMode() : xmc_dac.h
  • XMC_DAC_CH_StartNoiseMode() : xmc_dac.h
  • XMC_DAC_CH_StartPatternMode() : xmc_dac.h
  • XMC_DAC_CH_StartRampMode() : xmc_dac.h
  • XMC_DAC_CH_StartSingleValueMode() : xmc_dac.h
  • XMC_DAC_CH_STATUS_BUSY : xmc_dac.h
  • XMC_DAC_CH_STATUS_ERROR : xmc_dac.h
  • XMC_DAC_CH_STATUS_ERROR_FREQ2HIGH : xmc_dac.h
  • XMC_DAC_CH_STATUS_ERROR_FREQ2LOW : xmc_dac.h
  • XMC_DAC_CH_STATUS_OK : xmc_dac.h
  • XMC_DAC_CH_STATUS_t : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_CCU40_SR1 : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_CCU41_SR1 : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_CCU80_SR1 : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_P2_8 : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_P2_9 : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_U0C0_DX1INS : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_U1C0_DX1INS : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_INTERNAL : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_SOFTWARE : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_t : xmc_dac.h
  • XMC_DAC_CH_Write() : xmc_dac.h
  • XMC_DAC_Disable() : xmc_dac.h
  • XMC_DAC_DisableSimultaneousDataMode() : xmc_dac.h
  • XMC_DAC_Enable() : xmc_dac.h
  • XMC_DAC_EnableSimultaneousDataMode() : xmc_dac.h
  • XMC_DAC_IsEnabled() : xmc_dac.h
  • XMC_DAC_NO_CHANNELS : xmc_dac.h
  • XMC_DAC_PATTERN_RECTANGLE : xmc_dac.h
  • XMC_DAC_PATTERN_SINE : xmc_dac.h
  • XMC_DAC_PATTERN_TRIANGLE : xmc_dac.h
  • XMC_DAC_SAMPLES_PER_PERIOD : xmc_dac.h
  • XMC_DAC_SimultaneousWrite() : xmc_dac.h
  • xmc_device : xmc_usbd.h
  • XMC_DMA0 : xmc_dma.h
  • XMC_DMA1 : xmc_dma.h
  • XMC_DMA_CH_ADDRESS_COUNT_MODE_DECREMENT : xmc_dma.h
  • XMC_DMA_CH_ADDRESS_COUNT_MODE_INCREMENT : xmc_dma.h
  • XMC_DMA_CH_ADDRESS_COUNT_MODE_NO_CHANGE : xmc_dma.h
  • XMC_DMA_CH_ADDRESS_COUNT_MODE_t : xmc_dma.h
  • XMC_DMA_CH_BURST_LENGTH_1 : xmc_dma.h
  • XMC_DMA_CH_BURST_LENGTH_4 : xmc_dma.h
  • XMC_DMA_CH_BURST_LENGTH_8 : xmc_dma.h
  • XMC_DMA_CH_BURST_LENGTH_t : xmc_dma.h
  • XMC_DMA_CH_ClearDestinationPeripheralRequest() : xmc_dma.h
  • XMC_DMA_CH_ClearEventStatus() : xmc_dma.h
  • XMC_DMA_CH_ClearSourcePeripheralRequest() : xmc_dma.h
  • XMC_DMA_CH_Disable() : xmc_dma.h
  • XMC_DMA_CH_DisableDestinationAddressReload() : xmc_dma.h
  • XMC_DMA_CH_DisableDestinationScatter() : xmc_dma.h
  • XMC_DMA_CH_DisableEvent() : xmc_dma.h
  • XMC_DMA_CH_DisableSourceAddressReload() : xmc_dma.h
  • XMC_DMA_CH_DisableSourceGather() : xmc_dma.h
  • XMC_DMA_CH_DST_HANDSHAKING_HARDWARE : xmc_dma.h
  • XMC_DMA_CH_DST_HANDSHAKING_SOFTWARE : xmc_dma.h
  • XMC_DMA_CH_DST_HANDSHAKING_t : xmc_dma.h
  • XMC_DMA_CH_Enable() : xmc_dma.h
  • XMC_DMA_CH_EnableDestinationAddressReload() : xmc_dma.h
  • XMC_DMA_CH_EnableDestinationScatter() : xmc_dma.h
  • XMC_DMA_CH_EnableEvent() : xmc_dma.h
  • XMC_DMA_CH_EnableSourceAddressReload() : xmc_dma.h
  • XMC_DMA_CH_EnableSourceGather() : xmc_dma.h
  • XMC_DMA_CH_EVENT_BLOCK_TRANSFER_COMPLETE : xmc_dma.h
  • XMC_DMA_CH_EVENT_DST_TRANSACTION_COMPLETE : xmc_dma.h
  • XMC_DMA_CH_EVENT_ERROR : xmc_dma.h
  • XMC_DMA_CH_EVENT_HANDLER_t : xmc_dma.h
  • XMC_DMA_CH_EVENT_SRC_TRANSACTION_COMPLETE : xmc_dma.h
  • XMC_DMA_CH_EVENT_t : xmc_dma.h
  • XMC_DMA_CH_EVENT_TRANSFER_COMPLETE : xmc_dma.h
  • XMC_DMA_CH_GetEventStatus() : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_0 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_1 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_2 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_3 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_4 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_5 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_6 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_7 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_t : xmc_dma.h
  • XMC_DMA_CH_Init() : xmc_dma.h
  • XMC_DMA_CH_IsEnabled() : xmc_dma.h
  • XMC_DMA_CH_IsSuspended() : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_0 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_1 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_2 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_3 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_4 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_5 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_6 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_7 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_t : xmc_dma.h
  • XMC_DMA_CH_RequestLastMultiblockTransfer() : xmc_dma.h
  • XMC_DMA_CH_Resume() : xmc_dma.h
  • XMC_DMA_CH_SetBlockSize() : xmc_dma.h
  • XMC_DMA_CH_SetDestinationAddress() : xmc_dma.h
  • XMC_DMA_CH_SetEventHandler() : xmc_dma.h
  • XMC_DMA_CH_SetLinkedListPointer() : xmc_dma.h
  • XMC_DMA_CH_SetSourceAddress() : xmc_dma.h
  • XMC_DMA_CH_SRC_HANDSHAKING_HARDWARE : xmc_dma.h
  • XMC_DMA_CH_SRC_HANDSHAKING_SOFTWARE : xmc_dma.h
  • XMC_DMA_CH_SRC_HANDSHAKING_t : xmc_dma.h
  • XMC_DMA_CH_STATUS_BUSY : xmc_dma.h
  • XMC_DMA_CH_STATUS_ERROR : xmc_dma.h
  • XMC_DMA_CH_STATUS_OK : xmc_dma.h
  • XMC_DMA_CH_STATUS_t : xmc_dma.h
  • XMC_DMA_CH_Suspend() : xmc_dma.h
  • XMC_DMA_CH_TRANSACTION_TYPE_BURST : xmc_dma.h
  • XMC_DMA_CH_TRANSACTION_TYPE_SINGLE : xmc_dma.h
  • XMC_DMA_CH_TRANSACTION_TYPE_t : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_M2M_DMA : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_M2P_DMA : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_M2P_PER : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_P2M_DMA : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_P2M_PER : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_P2P_DMA : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_P2P_DSTPER : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_P2P_SRCPER : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_t : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_CONTIGUOUS_DSTADR_LINKED : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_CONTIGUOUS_DSTADR_RELOAD : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_LINKED_DSTADR_CONTIGUOUS : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_LINKED_DSTADR_LINKED : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_LINKED_DSTADR_RELOAD : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_RELOAD_DSTADR_CONTIGUOUS : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_RELOAD_DSTADR_LINKED : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_RELOAD_DSTADR_RELOAD : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_SINGLE_BLOCK : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_t : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_WIDTH_16 : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_WIDTH_32 : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_WIDTH_8 : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_WIDTH_t : xmc_dma.h
  • XMC_DMA_CH_TriggerDestinationRequest() : xmc_dma.h
  • XMC_DMA_CH_TriggerSourceRequest() : xmc_dma.h
  • XMC_DMA_ClearOverrunStatus() : xmc_dma.h
  • XMC_DMA_ClearRequestLine() : xmc_dma.h
  • XMC_DMA_Disable() : xmc_dma.h
  • XMC_DMA_DisableRequestLine() : xmc_dma.h
  • XMC_DMA_Enable() : xmc_dma.h
  • XMC_DMA_EnableRequestLine() : xmc_dma.h
  • XMC_DMA_GetChannelsBlockCompleteStatus() : xmc_dma.h
  • XMC_DMA_GetChannelsDestinationTransactionCompleteStatus() : xmc_dma.h
  • XMC_DMA_GetChannelsErrorStatus() : xmc_dma.h
  • XMC_DMA_GetChannelsSourceTransactionCompleteStatus() : xmc_dma.h
  • XMC_DMA_GetChannelsTransferCompleteStatus() : xmc_dma.h
  • XMC_DMA_GetEventStatus() : xmc_dma.h
  • XMC_DMA_GetOverrunStatus() : xmc_dma.h
  • XMC_DMA_Init() : xmc_dma.h
  • XMC_DMA_IRQHandler() : xmc_dma.h
  • XMC_DMA_IsEnabled() : xmc_dma.h
  • XMC_DMA_LIST_t : xmc_dma.h
  • XMC_DSD_CH_AUX_EVENT_CAPTURE_SIGN_DELAY : xmc_dsd.h
  • XMC_DSD_CH_AUX_EVENT_DISABLED : xmc_dsd.h
  • XMC_DSD_CH_AUX_EVENT_EVERY_NEW_RESULT : xmc_dsd.h
  • XMC_DSD_CH_AUX_EVENT_INSIDE_BOUNDARY : xmc_dsd.h
  • XMC_DSD_CH_AUX_EVENT_OUTSIDE_BOUNDARY : xmc_dsd.h
  • XMC_DSD_CH_AUX_EVENT_t : xmc_dsd.h
  • XMC_DSD_CH_AuxFilter_DisableEvent() : xmc_dsd.h
  • XMC_DSD_CH_AuxFilter_EnableEvent() : xmc_dsd.h
  • XMC_DSD_CH_AuxFilter_Init() : xmc_dsd.h
  • XMC_DSD_CH_AuxFilter_SetBoundary() : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_10 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_12 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_14 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_16 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_18 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_2 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_20 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_22 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_24 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_26 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_28 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_30 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_32 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_4 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_6 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_8 : xmc_dsd.h
  • XMC_DSD_CH_CLK_t : xmc_dsd.h
  • XMC_DSD_CH_CLOCK_SOURCE_A : xmc_dsd.h
  • XMC_DSD_CH_CLOCK_SOURCE_B : xmc_dsd.h
  • XMC_DSD_CH_CLOCK_SOURCE_C : xmc_dsd.h
  • XMC_DSD_CH_CLOCK_SOURCE_D : xmc_dsd.h
  • XMC_DSD_CH_CLOCK_SOURCE_INTERN : xmc_dsd.h
  • XMC_DSD_CH_CLOCK_SOURCE_t : xmc_dsd.h
  • XMC_DSD_CH_DATA_SOURCE_A_DIRECT : xmc_dsd.h
  • XMC_DSD_CH_DATA_SOURCE_A_INVERTED : xmc_dsd.h
  • XMC_DSD_CH_DATA_SOURCE_B_DIRECT : xmc_dsd.h
  • XMC_DSD_CH_DATA_SOURCE_B_INVERTED : xmc_dsd.h
  • XMC_DSD_CH_DATA_SOURCE_DISCONNECT : xmc_dsd.h
  • XMC_DSD_CH_DATA_SOURCE_t : xmc_dsd.h
  • XMC_DSD_CH_FILTER_TYPE_CIC1 : xmc_dsd.h
  • XMC_DSD_CH_FILTER_TYPE_CIC2 : xmc_dsd.h
  • XMC_DSD_CH_FILTER_TYPE_CIC3 : xmc_dsd.h
  • XMC_DSD_CH_FILTER_TYPE_CICF : xmc_dsd.h
  • XMC_DSD_CH_FILTER_TYPE_t : xmc_dsd.h
  • XMC_DSD_CH_GetRectifyDelay() : xmc_dsd.h
  • XMC_DSD_CH_GetResult() : xmc_dsd.h
  • XMC_DSD_CH_GetResult_AUX() : xmc_dsd.h
  • XMC_DSD_CH_GetResult_TS() : xmc_dsd.h
  • XMC_DSD_CH_GetResult_TS_Time() : xmc_dsd.h
  • XMC_DSD_CH_ID_0 : xmc_dsd.h
  • XMC_DSD_CH_ID_1 : xmc_dsd.h
  • XMC_DSD_CH_ID_2 : xmc_dsd.h
  • XMC_DSD_CH_ID_3 : xmc_dsd.h
  • XMC_DSD_CH_ID_t : xmc_dsd.h
  • XMC_DSD_CH_Init() : xmc_dsd.h
  • XMC_DSD_CH_Integrator_Init() : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_START_ALLWAYS_ON : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_START_OFF : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_START_t : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_START_TRIGGER_FALL : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_START_TRIGGER_RISE : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_STOP_END_OF_LOOPS : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_STOP_ENDLESS_OR_INVERSE_TRIGGER : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_STOP_t : xmc_dsd.h
  • XMC_DSD_CH_MainFilter_DisableEvent() : xmc_dsd.h
  • XMC_DSD_CH_MainFilter_EnableEvent() : xmc_dsd.h
  • XMC_DSD_CH_MainFilter_Init() : xmc_dsd.h
  • XMC_DSD_CH_MainFilter_SetOffset() : xmc_dsd.h
  • XMC_DSD_CH_Rectify_Init() : xmc_dsd.h
  • XMC_DSD_CH_RESULT_EVENT_DISABLE : xmc_dsd.h
  • XMC_DSD_CH_RESULT_EVENT_ENABLE : xmc_dsd.h
  • XMC_DSD_CH_RESULT_EVENT_t : xmc_dsd.h
  • XMC_DSD_CH_SIGN_SOURCE_EXTERNAL_A : xmc_dsd.h
  • XMC_DSD_CH_SIGN_SOURCE_EXTERNAL_B : xmc_dsd.h
  • XMC_DSD_CH_SIGN_SOURCE_NEXT_CHANNEL : xmc_dsd.h
  • XMC_DSD_CH_SIGN_SOURCE_ON_CHIP_GENERATOR : xmc_dsd.h
  • XMC_DSD_CH_SIGN_SOURCE_t : xmc_dsd.h
  • XMC_DSD_CH_STROBE_t : xmc_dsd.h
  • XMC_DSD_CH_t : xmc_dsd.h
  • XMC_DSD_CH_Timestamp_Init() : xmc_dsd.h
  • XMC_DSD_CH_TIMESTAMP_TRIGGER_BOTH_EDGES : xmc_dsd.h
  • XMC_DSD_CH_TIMESTAMP_TRIGGER_DISABLE : xmc_dsd.h
  • XMC_DSD_CH_TIMESTAMP_TRIGGER_FALL : xmc_dsd.h
  • XMC_DSD_CH_TIMESTAMP_TRIGGER_RISE : xmc_dsd.h
  • XMC_DSD_CH_TIMESTAMP_TRIGGER_t : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_A : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_B : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_C : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_D : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_E : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_F : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_G : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_H : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_t : xmc_dsd.h
  • XMC_DSD_ClearAlarmEventFlag() : xmc_dsd.h
  • XMC_DSD_ClearResultEventFlag() : xmc_dsd.h
  • XMC_DSD_Disable() : xmc_dsd.h
  • XMC_DSD_DisableClock() : xmc_dsd.h
  • XMC_DSD_Enable() : xmc_dsd.h
  • XMC_DSD_EnableClock() : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_10240 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_12288 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_14336 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_16384 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_18432 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_2048 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_20480 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_22528 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_24576 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_26624 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_28672 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_30720 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_32768 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_4096 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_6144 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_8192 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_t : xmc_dsd.h
  • XMC_DSD_Generator_Init() : xmc_dsd.h
  • XMC_DSD_GENERATOR_MODE_RECTANGLE : xmc_dsd.h
  • XMC_DSD_GENERATOR_MODE_SINE : xmc_dsd.h
  • XMC_DSD_GENERATOR_MODE_STOPPED : xmc_dsd.h
  • XMC_DSD_GENERATOR_MODE_t : xmc_dsd.h
  • XMC_DSD_GENERATOR_MODE_TRIANGLE : xmc_dsd.h
  • XMC_DSD_Generator_Start() : xmc_dsd.h
  • XMC_DSD_Generator_Stop() : xmc_dsd.h
  • XMC_DSD_Init() : xmc_dsd.h
  • XMC_DSD_IsChannelStarted() : xmc_dsd.h
  • XMC_DSD_IsEnabled() : xmc_dsd.h
  • XMC_DSD_SetAlarmEventFlag() : xmc_dsd.h
  • XMC_DSD_SetResultEventFlag() : xmc_dsd.h
  • XMC_DSD_Start() : xmc_dsd.h
  • XMC_DSD_STATUS_ERROR : xmc_dsd.h
  • XMC_DSD_STATUS_OK : xmc_dsd.h
  • XMC_DSD_STATUS_t : xmc_dsd.h
  • XMC_DSD_Stop() : xmc_dsd.h
  • XMC_DSD_t : xmc_dsd.h
  • XMC_EBU : xmc_ebu.h
  • XMC_EBU_ADDRESS_SELECT_ALTERNATE_REGION_ENABLE : xmc_ebu.h
  • XMC_EBU_ADDRESS_SELECT_MEMORY_REGION_ENABLE : xmc_ebu.h
  • XMC_EBU_ADDRESS_SELECT_MEMORY_REGION_WRITE_PROTECT : xmc_ebu.h
  • XMC_EBU_ADDRESS_SELECT_t : xmc_ebu.h
  • XMC_EBU_AddressSelectDisable() : xmc_ebu.h
  • XMC_EBU_AddressSelectEnable() : xmc_ebu.h
  • XMC_EBU_ALE_MODE_t : xmc_ebu.h
  • XMC_EBU_ALE_OUTPUT_IS_ALE : xmc_ebu.h
  • XMC_EBU_ALE_OUTPUT_IS_INV_ADV : xmc_ebu.h
  • XMC_EBU_ARB_MODE_ARBITER_MODE : xmc_ebu.h
  • XMC_EBU_ARB_MODE_NOT_SELECTED : xmc_ebu.h
  • XMC_EBU_ARB_MODE_PARTICIPANT_MODE : xmc_ebu.h
  • XMC_EBU_ARB_MODE_SOLE_MASTER_MODE : xmc_ebu.h
  • XMC_EBU_ARB_MODE_t : xmc_ebu.h
  • XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_CLOCK_ENABLED_AFTER_ADDRESS_PHASE : xmc_ebu.h
  • XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_CLOCK_ENABLED_AT_BEGINNING_OF_ACCESS : xmc_ebu.h
  • XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_t : xmc_ebu.h
  • XMC_EBU_BURST_ADDRESS_WRAPPING_DISABLED : xmc_ebu.h
  • XMC_EBU_BURST_ADDRESS_WRAPPING_ENABLED : xmc_ebu.h
  • XMC_EBU_BURST_ADDRESS_WRAPPING_t : xmc_ebu.h
  • XMC_EBU_BURST_BUFFER_SYNC_LENGTH_SYNC_ENABLE : xmc_ebu.h
  • XMC_EBU_BURST_BUFFER_SYNC_MODE_t : xmc_ebu.h
  • XMC_EBU_BURST_BUFFER_SYNC_SINGLE_MODE : xmc_ebu.h
  • XMC_EBU_BURST_FLASH_CLOCK_FEEDBACK_DISABLE : xmc_ebu.h
  • XMC_EBU_BURST_FLASH_CLOCK_FEEDBACK_ENABLE : xmc_ebu.h
  • XMC_EBU_BURST_FLASH_CLOCK_FEEDBACK_t : xmc_ebu.h
  • XMC_EBU_BURST_FLASH_CLOCK_MODE_DISABLED_BETWEEN_ACCESSES : xmc_ebu.h
  • XMC_EBU_BURST_FLASH_CLOCK_MODE_RUN_CONTINUOSLY : xmc_ebu.h
  • XMC_EBU_BURST_FLASH_CLOCK_MODE_t : xmc_ebu.h
  • XMC_EBU_BURST_LENGTH_SYNC_1_DATA_ACCESS : xmc_ebu.h
  • XMC_EBU_BURST_LENGTH_SYNC_2_DATA_ACCESSES : xmc_ebu.h
  • XMC_EBU_BURST_LENGTH_SYNC_4_DATA_ACCESSES : xmc_ebu.h
  • XMC_EBU_BURST_LENGTH_SYNC_8_DATA_ACCESSES : xmc_ebu.h
  • XMC_EBU_BURST_LENGTH_SYNC_t : xmc_ebu.h
  • XMC_EBU_BURST_SIGNAL_SYNC_BURST_ADV_DELAYED : xmc_ebu.h
  • XMC_EBU_BURST_SIGNAL_SYNC_BURST_ADV_NOT_DELAYED : xmc_ebu.h
  • XMC_EBU_BURST_SIGNAL_SYNC_BURST_t : xmc_ebu.h
  • XMC_EBU_BUSWCON_SELECT_DEVICE_ADDRESSING_MODE : xmc_ebu.h
  • XMC_EBU_BUSWCON_SELECT_NAN_WORKAROUND : xmc_ebu.h
  • XMC_EBU_BUSWCON_SELECT_t : xmc_ebu.h
  • XMC_EBU_BYTE_CONTROL_FOLLOWS_CHIP_SELECT_TIMMING : xmc_ebu.h
  • XMC_EBU_BYTE_CONTROL_FOLLOWS_CONTROL_SIGNAL_TIMMING : xmc_ebu.h
  • XMC_EBU_BYTE_CONTROL_FOLLOWS_WRITE_ENABLE_SIGNAL_TIMMING : xmc_ebu.h
  • XMC_EBU_BYTE_CONTROL_t : xmc_ebu.h
  • XMC_EBU_CLK_MODE_ASYNCHRONOUS_TO_AHB : xmc_ebu.h
  • XMC_EBU_CLK_MODE_SYNCHRONOUS_TO_CPU : xmc_ebu.h
  • XMC_EBU_CLK_MODE_t : xmc_ebu.h
  • XMC_EBU_CLK_STATUS_DISABLE_BIT : xmc_ebu.h
  • XMC_EBU_CLK_STATUS_DIV2_MODE : xmc_ebu.h
  • XMC_EBU_CLK_STATUS_DIV_RATIO : xmc_ebu.h
  • XMC_EBU_CLK_STATUS_MODE : xmc_ebu.h
  • XMC_EBU_CLK_STATUS_t : xmc_ebu.h
  • XMC_EBU_CLKDivideRatio() : xmc_ebu.h
  • XMC_EBU_CLOCK_DIVIDE_RATIO_t : xmc_ebu.h
  • XMC_EBU_CLOCK_DIVIDED_BY_1 : xmc_ebu.h
  • XMC_EBU_CLOCK_DIVIDED_BY_2 : xmc_ebu.h
  • XMC_EBU_CLOCK_DIVIDED_BY_3 : xmc_ebu.h
  • XMC_EBU_CLOCK_DIVIDED_BY_4 : xmc_ebu.h
  • XMC_EBU_ConfigureRegion() : xmc_ebu.h
  • XMC_EBU_ConfigureSdram() : xmc_ebu.h
  • XMC_EBU_DEVICE_ADDRESSING_MODE_16_BITS : xmc_ebu.h
  • XMC_EBU_DEVICE_ADDRESSING_MODE_32_BITS_MULTIPLEXED : xmc_ebu.h
  • XMC_EBU_DEVICE_ADDRESSING_MODE_t : xmc_ebu.h
  • XMC_EBU_DEVICE_ADDRESSING_MODE_TWIN_16_BITS_MULTIPLEXED : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_DEMUXED_ASYNCHRONOUS_TYPE : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_DEMUXED_BURST_TYPE : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_DEMUXED_CELLULAR_RAM : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_DEMUXED_PAGE_MODE : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_MUXED_ASYNCHRONOUS_TYPE : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_MUXED_BURST_TYPE : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_MUXED_CELLULAR_RAM : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_NAND_FLASH : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_SDRAM : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_t : xmc_ebu.h
  • XMC_EBU_Disable() : xmc_ebu.h
  • XMC_EBU_DIV2_CLK_MODE_OFF : xmc_ebu.h
  • XMC_EBU_DIV2_CLK_MODE_ON : xmc_ebu.h
  • XMC_EBU_DIV2_CLK_MODE_t : xmc_ebu.h
  • XMC_EBU_EARLY_CHIP_SELECT_DELAYED : xmc_ebu.h
  • XMC_EBU_EARLY_CHIP_SELECT_NOT_DELAYED : xmc_ebu.h
  • XMC_EBU_EARLY_CHIP_SELECT_SYNC_BURST_t : xmc_ebu.h
  • XMC_EBU_Enable() : xmc_ebu.h
  • XMC_EBU_EXT_DATA_OUTPUT_EVERY_1_BFCLK_CYCLES : xmc_ebu.h
  • XMC_EBU_EXT_DATA_OUTPUT_EVERY_2_BFCLK_CYCLES : xmc_ebu.h
  • XMC_EBU_EXT_DATA_OUTPUT_EVERY_4_BFCLK_CYCLES : xmc_ebu.h
  • XMC_EBU_EXT_DATA_OUTPUT_EVERY_8_BFCLK_CYCLES : xmc_ebu.h
  • XMC_EBU_EXT_DATA_t : xmc_ebu.h
  • XMC_EBU_FLASH_NON_ARRAY_ACCESS_DISNABLE : xmc_ebu.h
  • XMC_EBU_FLASH_NON_ARRAY_ACCESS_ENABLE : xmc_ebu.h
  • XMC_EBU_FLASH_NON_ARRAY_ACCESS_t : xmc_ebu.h
  • XMC_EBU_FREQ_EXT_CLK_PIN_EQUAL_TO_INT_CLK : xmc_ebu.h
  • XMC_EBU_FREQ_EXT_CLK_PIN_HALF_OF_INT_CLK : xmc_ebu.h
  • XMC_EBU_FREQ_EXT_CLK_PIN_QUARTER_OF_INT_CLK : xmc_ebu.h
  • XMC_EBU_FREQ_EXT_CLK_PIN_t : xmc_ebu.h
  • XMC_EBU_FREQ_EXT_CLK_PIN_THIRD_OF_INT_CLK : xmc_ebu.h
  • XMC_EBU_GetBusWriteConfStatus() : xmc_ebu.h
  • XMC_EBU_GetCLKStatus() : xmc_ebu.h
  • XMC_EBU_Init() : xmc_ebu.h
  • XMC_EBU_IsBusAribitrationSelected() : xmc_ebu.h
  • XMC_EBU_LOCK_CHIP_SELECT_DISABLED : xmc_ebu.h
  • XMC_EBU_LOCK_CHIP_SELECT_ENABLED : xmc_ebu.h
  • XMC_EBU_LOCK_CHIP_SELECT_t : xmc_ebu.h
  • XMC_EBU_READ_STAGES_SYNC_ONE : xmc_ebu.h
  • XMC_EBU_READ_STAGES_SYNC_t : xmc_ebu.h
  • XMC_EBU_READ_STAGES_SYNC_TWO : xmc_ebu.h
  • XMC_EBU_SDRAM_BURST_LENGTH_16_LOCATION : xmc_ebu.h
  • XMC_EBU_SDRAM_BURST_LENGTH_1_LOCATION : xmc_ebu.h
  • XMC_EBU_SDRAM_BURST_LENGTH_2_LOCATION : xmc_ebu.h
  • XMC_EBU_SDRAM_BURST_LENGTH_4_LOCATION : xmc_ebu.h
  • XMC_EBU_SDRAM_BURST_LENGTH_8_LOCATION : xmc_ebu.h
  • XMC_EBU_SDRAM_BURST_LENGTH_t : xmc_ebu.h
  • XMC_EBU_SDRAM_CAS_LATENCY_2_CLKS : xmc_ebu.h
  • XMC_EBU_SDRAM_CAS_LATENCY_3_CLKS : xmc_ebu.h
  • XMC_EBU_SDRAM_CAS_LATENCY_t : xmc_ebu.h
  • XMC_EBU_SDRAM_CLK_MODE_CONTINUOUSLY_RUNS : xmc_ebu.h
  • XMC_EBU_SDRAM_CLK_MODE_DISABLED_BETWEEN_ACCESSES : xmc_ebu.h
  • XMC_EBU_SDRAM_CLK_MODE_t : xmc_ebu.h
  • XMC_EBU_SDRAM_CLK_OUTPUT_DISABLED : xmc_ebu.h
  • XMC_EBU_SDRAM_CLK_OUTPUT_ENABLED : xmc_ebu.h
  • XMC_EBU_SDRAM_CLK_OUTPUT_t : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_21_to_20 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_22_to_21 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_23_to_22 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_24_to_23 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_25_to_24 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_26 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_26_to_25 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_t : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_10 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_11 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_12 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_13 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_9 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_t : xmc_ebu.h
  • XMC_EBU_SDRAM_PWR_MODE_ACTIVE_PWR_DOWN : xmc_ebu.h
  • XMC_EBU_SDRAM_PWR_MODE_AUTO_PRECHARGE_BEFORE_CLK_STOP : xmc_ebu.h
  • XMC_EBU_SDRAM_PWR_MODE_CLK_STOP_PWR_DOWN : xmc_ebu.h
  • XMC_EBU_SDRAM_PWR_MODE_PRECHARGE_BEFORE_CLK_STOP : xmc_ebu.h
  • XMC_EBU_SDRAM_PWR_MODE_t : xmc_ebu.h
  • XMC_EBU_SDRAM_RFRSH_STATUS_SELF_REFRESH_ENTRY_STATUS : xmc_ebu.h
  • XMC_EBU_SDRAM_RFRSH_STATUS_SELF_REFRESH_EXIT_STATUS : xmc_ebu.h
  • XMC_EBU_SDRAM_RFRSH_STATUS_t : xmc_ebu.h
  • XMC_EBU_SDRAM_STATUS_BUSY : xmc_ebu.h
  • XMC_EBU_SDRAM_STATUS_REFRESH_ERROR : xmc_ebu.h
  • XMC_EBU_SDRAM_STATUS_RX_ERROR : xmc_ebu.h
  • XMC_EBU_SDRAM_STATUS_t : xmc_ebu.h
  • XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_10_to_0 : xmc_ebu.h
  • XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_8_to_0 : xmc_ebu.h
  • XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_9_to_0 : xmc_ebu.h
  • XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_t : xmc_ebu.h
  • XMC_EBU_SdramDisableAutomaticSelfRefresh() : xmc_ebu.h
  • XMC_EBU_SdramDisableAutoRefreshSelfRefreshExit() : xmc_ebu.h
  • XMC_EBU_SdramEnableAutomaticSelfRefresh() : xmc_ebu.h
  • XMC_EBU_SdramEnableAutoRefreshSelfRefreshExit() : xmc_ebu.h
  • XMC_EBU_SdramGetRefreshStatus() : xmc_ebu.h
  • XMC_EBU_SdramGetStatus() : xmc_ebu.h
  • XMC_EBU_SdramResetSelfRefreshEntry() : xmc_ebu.h
  • XMC_EBU_SdramResetSelfRefreshExit() : xmc_ebu.h
  • XMC_EBU_SdramSetSelfRefreshEntry() : xmc_ebu.h
  • XMC_EBU_SdramSetSelfRefreshExit() : xmc_ebu.h
  • XMC_EBU_STATUS_BUSY : xmc_ebu.h
  • XMC_EBU_STATUS_ERROR : xmc_ebu.h
  • XMC_EBU_STATUS_OK : xmc_ebu.h
  • XMC_EBU_STATUS_t : xmc_ebu.h
  • XMC_EBU_WAIT_CONTROL_OFF : xmc_ebu.h
  • XMC_EBU_WAIT_CONTROL_SYNC_ABORT_AND_RETRY_ACCESS : xmc_ebu.h
  • XMC_EBU_WAIT_CONTROL_SYNC_EARLY_WAIT_ASYNC_ASYNC_INPUT_AT_WAIT : xmc_ebu.h
  • XMC_EBU_WAIT_CONTROL_SYNC_WAIT_WITH_DATA_ASYNC_SYNC_INPUT_AT_WAIT : xmc_ebu.h
  • XMC_EBU_WAIT_CONTROL_t : xmc_ebu.h
  • XMC_EBU_WAIT_SIGNAL_POLARITY_PIN_ACTIVE_HIGH : xmc_ebu.h
  • XMC_EBU_WAIT_SIGNAL_POLARITY_PIN_ACTIVE_LOW : xmc_ebu.h
  • XMC_EBU_WAIT_SIGNAL_POLARITY_t : xmc_ebu.h
  • XMC_ECAT_Disable() : xmc_ecat.h
  • XMC_ECAT_DisableEvent() : xmc_ecat.h
  • XMC_ECAT_DisableSyncManChannel() : xmc_ecat.h
  • XMC_ECAT_Enable() : xmc_ecat.h
  • XMC_ECAT_EnableEvent() : xmc_ecat.h
  • XMC_ECAT_EnableSyncManChannel() : xmc_ecat.h
  • XMC_ECAT_EVENT_AL_CONTROL : xmc_ecat.h
  • XMC_ECAT_EVENT_DC_LATCH : xmc_ecat.h
  • XMC_ECAT_EVENT_DC_SYNC0 : xmc_ecat.h
  • XMC_ECAT_EVENT_DC_SYNC1 : xmc_ecat.h
  • XMC_ECAT_EVENT_EEPROM : xmc_ecat.h
  • XMC_ECAT_EVENT_SM0 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM1 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM2 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM3 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM4 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM5 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM6 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM7 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM_ACTIVATION_REGISTER : xmc_ecat.h
  • XMC_ECAT_EVENT_t : xmc_ecat.h
  • XMC_ECAT_EVENT_WATCHDOG : xmc_ecat.h
  • XMC_ECAT_GetALEventMask() : xmc_ecat.h
  • XMC_ECAT_GetALEventRegister() : xmc_ecat.h
  • XMC_ECAT_GetEventStatus() : xmc_ecat.h
  • XMC_ECAT_Init() : xmc_ecat.h
  • XMC_ECAT_ReadPhy() : xmc_ecat.h
  • XMC_ECAT_SetALEventMask() : xmc_ecat.h
  • XMC_ECAT_SetPortControl() : xmc_ecat.h
  • XMC_ECAT_STATUS_BUSY : xmc_ecat.h
  • XMC_ECAT_STATUS_ERROR : xmc_ecat.h
  • XMC_ECAT_STATUS_OK : xmc_ecat.h
  • XMC_ECAT_STATUS_t : xmc_ecat.h
  • XMC_ECAT_WritePhy() : xmc_ecat.h
  • XMC_ERU_Disable() : xmc_eru.h
  • XMC_ERU_Enable() : xmc_eru.h
  • XMC_ERU_ETL_ClearStatusFlag() : xmc_eru.h
  • XMC_ERU_ETL_DisableOutputTrigger() : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_BOTH : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_DISABLED : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_FALLING : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_RISING : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_t : xmc_eru.h
  • XMC_ERU_ETL_EnableOutputTrigger() : xmc_eru.h
  • XMC_ERU_ETL_GetEdgeDetection() : xmc_eru.h
  • XMC_ERU_ETL_GetStatusFlag() : xmc_eru.h
  • XMC_ERU_ETL_Init() : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A0 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A1 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A2 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A3 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A_t : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B0 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B1 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B2 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B3 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B_t : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL0 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL1 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL2 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL3 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_DISABLED : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_ENABLED : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_t : xmc_eru.h
  • XMC_ERU_ETL_SetEdgeDetection() : xmc_eru.h
  • XMC_ERU_ETL_SetInput() : xmc_eru.h
  • XMC_ERU_ETL_SetSource() : xmc_eru.h
  • XMC_ERU_ETL_SetStatusFlag() : xmc_eru.h
  • XMC_ERU_ETL_SetStatusFlagMode() : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_AND_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_AND_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_OR_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_OR_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_AND_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_AND_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_OR_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_OR_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_t : xmc_eru.h
  • XMC_ERU_ETL_STATUS_FLAG_MODE_HWCTRL : xmc_eru.h
  • XMC_ERU_ETL_STATUS_FLAG_MODE_SWCTRL : xmc_eru.h
  • XMC_ERU_ETL_STATUS_FLAG_MODE_t : xmc_eru.h
  • XMC_ERU_OGU_DisablePatternDetection() : xmc_eru.h
  • XMC_ERU_OGU_DisablePeripheralTrigger() : xmc_eru.h
  • XMC_ERU_OGU_EnablePatternDetection() : xmc_eru.h
  • XMC_ERU_OGU_EnablePeripheralTrigger() : xmc_eru.h
  • XMC_ERU_OGU_GetPatternDetectionStatus() : xmc_eru.h
  • XMC_ERU_OGU_Init() : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_DISABLED : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_ENABLED : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT0 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT1 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT2 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT3 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_t : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER1 : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER2 : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER3 : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER_t : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_DISABLED : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MATCH : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MISMATCH : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_t : xmc_eru.h
  • XMC_ERU_OGU_SetServiceRequestMode() : xmc_eru.h
  • XMC_ETH_LINK_DUPLEX_FULL : xmc_eth_mac.h
  • XMC_ETH_LINK_DUPLEX_HALF : xmc_eth_mac.h
  • XMC_ETH_LINK_DUPLEX_t : xmc_eth_mac.h
  • XMC_ETH_LINK_INTERFACE_MII : xmc_eth_mac.h
  • XMC_ETH_LINK_INTERFACE_RMII : xmc_eth_mac.h
  • XMC_ETH_LINK_INTERFACE_t : xmc_eth_mac.h
  • XMC_ETH_LINK_SPEED_100M : xmc_eth_mac.h
  • XMC_ETH_LINK_SPEED_10M : xmc_eth_mac.h
  • XMC_ETH_LINK_SPEED_t : xmc_eth_mac.h
  • XMC_ETH_LINK_STATUS_DOWN : xmc_eth_mac.h
  • XMC_ETH_LINK_STATUS_t : xmc_eth_mac.h
  • XMC_ETH_LINK_STATUS_UP : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE0 : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE1 : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE2 : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE3 : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE4 : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE5 : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_SA : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_t : xmc_eth_mac.h
  • XMC_ETH_MAC_AdjustPTPClock() : xmc_eth_mac.h
  • XMC_ETH_MAC_BUF_SIZE : xmc_eth_mac.h
  • XMC_ETH_MAC_ClearEventStatus() : xmc_eth_mac.h
  • XMC_ETH_MAC_Disable() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableDestinationAddressInverseFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableEvent() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableFrameBurst() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableFrameFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableJumboFrame() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableLoopback() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableMulticastHashFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisablePowerDownMode() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisablePowerManagmentEvent() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisablePromiscuousMode() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisablePTPAlarm() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableReceptionBroadcastFrames() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableReceptionMulticastFrames() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableRx() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableRxOwn() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableRxWatchdog() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableSourceAddressFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableSourceAddressInverseFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableTx() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableTxJabber() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableUnicastHashFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_Enable() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableDestinationAddressInverseFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableEvent() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableFrameBurst() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableFrameFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableHashPerfectFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableJumboFrame() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableLoopback() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableMulticastHashFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnablePerfectFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnablePowerDownMode() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnablePowerManagmentEvent() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnablePromiscuousMode() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnablePTPAlarm() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableReceptionBroadcastFrames() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableReceptionMulticastFrames() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableRx() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableRxOwn() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableRxWatchdog() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableSourceAddressFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableSourceAddressInverseFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableTx() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableTxJabber() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableUnicastHashFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_BUS_ERROR : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_EARLY_RECEIVE : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_EARLY_TRANSMIT : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_PMT : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_RECEIVE : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_RECEIVE_BUFFER_UNAVAILABLE : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_RECEIVE_OVERFLOW : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_RECEIVE_PROCESS_STOPPED : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_RECEIVE_WATCHDOG_TIMEOUT : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_t : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_TIMESTAMP : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_TRANSMIT : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_TRANSMIT_BUFFER_UNAVAILABLE : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_TRANSMIT_JABBER_TIMEOUT : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_TRANSMIT_PROCESS_STOPPED : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_TRANSMIT_UNDERFLOW : xmc_eth_mac.h
  • XMC_ETH_MAC_FlushRx() : xmc_eth_mac.h
  • XMC_ETH_MAC_FlushTx() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetAddress() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetEventStatus() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetPTPStatus() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetPTPTime() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetRxBuffer() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetRxFrameSize() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetRxTimeStamp() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetTxBuffer() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetTxTimeStamp() : xmc_eth_mac.h
  • XMC_ETH_MAC_Init() : xmc_eth_mac.h
  • XMC_ETH_MAC_InitPTP() : xmc_eth_mac.h
  • XMC_ETH_MAC_InitPTPEx() : xmc_eth_mac.h
  • XMC_ETH_MAC_InitRxDescriptors() : xmc_eth_mac.h
  • XMC_ETH_MAC_InitTxDescriptors() : xmc_eth_mac.h
  • XMC_ETH_MAC_IsEnabled() : xmc_eth_mac.h
  • XMC_ETH_MAC_IsMagicPacketReceived() : xmc_eth_mac.h
  • XMC_ETH_MAC_IsRxDescriptorOwnedByDma() : xmc_eth_mac.h
  • XMC_ETH_MAC_IsTxDescriptorOwnedByDma() : xmc_eth_mac.h
  • XMC_ETH_MAC_IsWakeupFrameReceived() : xmc_eth_mac.h
  • XMC_ETH_MAC_PHY_MAX_RETRIES : xmc_eth_mac.h
  • XMC_ETH_MAC_PMT_EVENT_ON_MAGIC_PACKET : xmc_eth_mac.h
  • XMC_ETH_MAC_PMT_EVENT_ON_UNICAST_FRAME_FILTER : xmc_eth_mac.h
  • XMC_ETH_MAC_PMT_EVENT_ON_WAKEUP_FRAME : xmc_eth_mac.h
  • XMC_ETH_MAC_PMT_EVENT_t : xmc_eth_mac.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P0_0 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P15_8 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P2_1 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P6_5 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_RMII_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_TX_P5_10 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_TX_P6_6 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_TX_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_COL_P2_15 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_COL_P5_5 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_COL_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_DV_P0_1 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_DV_P15_9 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_DV_P2_5 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_DV_P5_2 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_DV_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_P5_11 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_P5_4 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MDIO_P0_9 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MDIO_P1_11 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MDIO_P2_0 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MDIO_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MODE_MII : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MODE_RMII : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MODE_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD0_P0_2 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD0_P14_8 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD0_P2_2 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD0_P5_0 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD0_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD1_P0_3 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD1_P14_9 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD1_P2_3 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD1_P5_1 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD1_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD2_P5_8 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD2_P6_4 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD2_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD3_P5_9 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD3_P6_3 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD3_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXER_P0_11 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXER_P2_4 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXER_P5_3 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXER_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_ReadFrame() : xmc_eth_mac.h
  • XMC_ETH_MAC_ReadPhy() : xmc_eth_mac.h
  • XMC_ETH_MAC_Reset() : xmc_eth_mac.h
  • XMC_ETH_MAC_ResumeRx() : xmc_eth_mac.h
  • XMC_ETH_MAC_ResumeTx() : xmc_eth_mac.h
  • XMC_ETH_MAC_ReturnRxDescriptor() : xmc_eth_mac.h
  • XMC_ETH_MAC_ReturnTxDescriptor() : xmc_eth_mac.h
  • XMC_ETH_MAC_SendFrame() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetAddress() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetAddressHashFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetAddressPerfectFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetLink() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetManagmentClockDivider() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetPortControl() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetPTPAlarm() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetPTPTime() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetTxBufferSize() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetVLANTag() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetWakeUpFrameFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_STATUS_BUSY : xmc_eth_mac.h
  • XMC_ETH_MAC_STATUS_ERROR : xmc_eth_mac.h
  • XMC_ETH_MAC_STATUS_OK : xmc_eth_mac.h
  • XMC_ETH_MAC_STATUS_t : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_ALL_FRAMES : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_MAC_ADDRESS_FILTER : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_PTP_OVER_ETHERNET : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_PTP_OVER_IPV4 : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_PTP_OVER_IPV6 : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_PTPV2 : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_TS_INTERRUPT : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_FINE_UPDATE : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_t : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_STATUS_SECONDS_OVERFLOW : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_STATUS_t : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_STATUS_TARGET_TIME_REACHED : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_STATUS_TARGET_TIMER_ERROR : xmc_eth_mac.h
  • XMC_ETH_MAC_TX_FRAME_EVENT : xmc_eth_mac.h
  • XMC_ETH_MAC_TX_FRAME_FRAGMENT : xmc_eth_mac.h
  • XMC_ETH_MAC_TX_FRAME_t : xmc_eth_mac.h
  • XMC_ETH_MAC_TX_FRAME_TIMESTAMP : xmc_eth_mac.h
  • XMC_ETH_MAC_UpdateAddend() : xmc_eth_mac.h
  • XMC_ETH_MAC_UpdatePTPTime() : xmc_eth_mac.h
  • XMC_ETH_MAC_WritePhy() : xmc_eth_mac.h
  • XMC_ETH_PHY_ExitPowerDown() : xmc_eth_phy.h
  • XMC_ETH_PHY_GetLinkDuplex() : xmc_eth_phy.h
  • XMC_ETH_PHY_GetLinkSpeed() : xmc_eth_phy.h
  • XMC_ETH_PHY_GetLinkStatus() : xmc_eth_phy.h
  • XMC_ETH_PHY_Init() : xmc_eth_phy.h
  • XMC_ETH_PHY_IsAutonegotiationCompleted() : xmc_eth_phy.h
  • XMC_ETH_PHY_PowerDown() : xmc_eth_phy.h
  • XMC_ETH_PHY_Reset() : xmc_eth_phy.h
  • XMC_ETH_PHY_STATUS_BUSY : xmc_eth_phy.h
  • XMC_ETH_PHY_STATUS_ERROR : xmc_eth_phy.h
  • XMC_ETH_PHY_STATUS_ERROR_DEVICE_ID : xmc_eth_phy.h
  • XMC_ETH_PHY_STATUS_ERROR_TIMEOUT : xmc_eth_phy.h
  • XMC_ETH_PHY_STATUS_OK : xmc_eth_phy.h
  • XMC_ETH_PHY_STATUS_t : xmc_eth_phy.h
  • XMC_ETH_WAKEUP_REGISTER_LENGTH : xmc_eth_mac.h
  • XMC_FCE_CalculateCRC16() : xmc_fce.h
  • XMC_FCE_CalculateCRC32() : xmc_fce.h
  • XMC_FCE_CalculateCRC8() : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_ALR : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_BEI : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_CCE : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_CEI : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_CMI : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_LEI : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_REFIN : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_REFOUT : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_XSEL : xmc_fce.h
  • XMC_FCE_ClearEvent() : xmc_fce.h
  • XMC_FCE_CONFIG_ALGO_t : xmc_fce.h
  • XMC_FCE_CONFIG_INTERRUPT_t : xmc_fce.h
  • XMC_FCE_CONFIG_OPERATION_t : xmc_fce.h
  • XMC_FCE_CRC16 : xmc_fce.h
  • XMC_FCE_CRC32_0 : xmc_fce.h
  • XMC_FCE_CRC32_1 : xmc_fce.h
  • XMC_FCE_CRC8 : xmc_fce.h
  • XMC_FCE_CTR_MISMATCH_CFG : xmc_fce.h
  • XMC_FCE_CTR_MISMATCH_CHECK : xmc_fce.h
  • XMC_FCE_CTR_MISMATCH_CRC : xmc_fce.h
  • XMC_FCE_CTR_TEST_t : xmc_fce.h
  • XMC_FCE_Disable() : xmc_fce.h
  • XMC_FCE_DisableCRCAlgorithm() : xmc_fce.h
  • XMC_FCE_DisableEvent() : xmc_fce.h
  • XMC_FCE_DisableOperation() : xmc_fce.h
  • XMC_FCE_Enable() : xmc_fce.h
  • XMC_FCE_EnableCRCAlgorithm() : xmc_fce.h
  • XMC_FCE_EnableEvent() : xmc_fce.h
  • XMC_FCE_EnableOperation() : xmc_fce.h
  • XMC_FCE_Get_DisableStatus() : xmc_fce.h
  • XMC_FCE_GetCRCResult() : xmc_fce.h
  • XMC_FCE_GetEventStatus() : xmc_fce.h
  • XMC_FCE_Init() : xmc_fce.h
  • XMC_FCE_InitializeSeedValue() : xmc_fce.h
  • XMC_FCE_INVSEL_RESET : xmc_fce.h
  • XMC_FCE_INVSEL_SET : xmc_fce.h
  • XMC_FCE_Kernel_t : xmc_fce.h
  • XMC_FCE_LittleEndian16bit() : xmc_fce.h
  • XMC_FCE_LittleEndian32bit() : xmc_fce.h
  • XMC_FCE_ReadModuleNumber() : xmc_fce.h
  • XMC_FCE_ReadModuleRev() : xmc_fce.h
  • XMC_FCE_ReadModuleType() : xmc_fce.h
  • XMC_FCE_REFIN_RESET : xmc_fce.h
  • XMC_FCE_REFIN_SET : xmc_fce.h
  • XMC_FCE_REFOUT_RESET : xmc_fce.h
  • XMC_FCE_REFOUT_SET : xmc_fce.h
  • XMC_FCE_STATUS_BUSY : xmc_fce.h
  • XMC_FCE_STATUS_ERROR : xmc_fce.h
  • XMC_FCE_STATUS_OK : xmc_fce.h
  • XMC_FCE_STATUS_t : xmc_fce.h
  • XMC_FCE_STS_BUS_ERROR : xmc_fce.h
  • XMC_FCE_STS_CONFIG_ERROR : xmc_fce.h
  • XMC_FCE_STS_FLAG_t : xmc_fce.h
  • XMC_FCE_STS_LENGTH_ERROR : xmc_fce.h
  • XMC_FCE_STS_MISMATCH_CRC : xmc_fce.h
  • XMC_FCE_TriggerMismatch() : xmc_fce.h
  • XMC_FCE_UpdateCRCCheck() : xmc_fce.h
  • XMC_FCE_UpdateLength() : xmc_fce.h
  • XMC_FLASH_BYTES_PER_PAGE : xmc4_flash.h
  • XMC_FLASH_BYTES_PER_UCB : xmc4_flash.h
  • XMC_FLASH_ClearStatus() : xmc_flash.h
  • XMC_FLASH_ConfirmProtection() : xmc4_flash.h
  • XMC_FLASH_DisableDoubleBitErrorTrap() : xmc4_flash.h
  • XMC_FLASH_DisableDynamicIdle() : xmc4_flash.h
  • XMC_FLASH_DisableEvent() : xmc_flash.h
  • XMC_FLASH_DisableSleepRequest() : xmc4_flash.h
  • XMC_FLASH_DisableWaitStateForECC() : xmc4_flash.h
  • XMC_FLASH_EnableDoubleBitErrorTrap() : xmc4_flash.h
  • XMC_FLASH_EnableDynamicIdle() : xmc4_flash.h
  • XMC_FLASH_EnableEvent() : xmc_flash.h
  • XMC_FLASH_EnableSleepRequest() : xmc4_flash.h
  • XMC_FLASH_EnableWaitStateForECC() : xmc4_flash.h
  • XMC_FLASH_ErasePhysicalSector() : xmc4_flash.h
  • XMC_FLASH_EraseSector() : xmc_flash.h
  • XMC_FLASH_EraseUCB() : xmc4_flash.h
  • XMC_FLASH_EVENT_COMMAND_SEQUENCE_ERROR : xmc4_flash.h
  • XMC_FLASH_EVENT_DOUBLE_BIT_ERROR : xmc4_flash.h
  • XMC_FLASH_EVENT_END_OF_BUSY : xmc4_flash.h
  • XMC_FLASH_EVENT_PROTECTION_ERROR : xmc4_flash.h
  • XMC_FLASH_EVENT_SINGLE_BIT_ERROR : xmc4_flash.h
  • XMC_FLASH_EVENT_t : xmc4_flash.h
  • XMC_FLASH_EVENT_VERIFY_AND_OPERATION_ERROR : xmc4_flash.h
  • XMC_FLASH_GetStatus() : xmc_flash.h
  • XMC_FLASH_InstallProtection() : xmc4_flash.h
  • XMC_FLASH_IsBusy() : xmc_flash.h
  • XMC_FLASH_MARGIN_DEFAULT : xmc4_flash.h
  • XMC_FLASH_MARGIN_t : xmc4_flash.h
  • XMC_FLASH_MARGIN_TIGHT0 : xmc4_flash.h
  • XMC_FLASH_MARGIN_TIGHT1 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_0 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_10 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_11 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_12 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_13 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_14 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_15 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_4 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_8 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_9 : xmc4_flash.h
  • XMC_FLASH_ProgramPage() : xmc_flash.h
  • XMC_FLASH_PROTECTION_READ_GLOBAL : xmc4_flash.h
  • XMC_FLASH_PROTECTION_t : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_0 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_1 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_2 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_3 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_4 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_5 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_6 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_7 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_8 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_9 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTORS_10_11 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTORS_12_13 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTORS_14_15 : xmc4_flash.h
  • XMC_FLASH_RepairPhysicalSector() : xmc4_flash.h
  • XMC_FLASH_Reset() : xmc4_flash.h
  • XMC_FLASH_ResumeProtection() : xmc4_flash.h
  • XMC_FLASH_SECTOR_0 : xmc4_flash.h
  • XMC_FLASH_SECTOR_1 : xmc4_flash.h
  • XMC_FLASH_SECTOR_10 : xmc4_flash.h
  • XMC_FLASH_SECTOR_11 : xmc4_flash.h
  • XMC_FLASH_SECTOR_12 : xmc4_flash.h
  • XMC_FLASH_SECTOR_13 : xmc4_flash.h
  • XMC_FLASH_SECTOR_14 : xmc4_flash.h
  • XMC_FLASH_SECTOR_15 : xmc4_flash.h
  • XMC_FLASH_SECTOR_2 : xmc4_flash.h
  • XMC_FLASH_SECTOR_3 : xmc4_flash.h
  • XMC_FLASH_SECTOR_4 : xmc4_flash.h
  • XMC_FLASH_SECTOR_5 : xmc4_flash.h
  • XMC_FLASH_SECTOR_6 : xmc4_flash.h
  • XMC_FLASH_SECTOR_7 : xmc4_flash.h
  • XMC_FLASH_SECTOR_8 : xmc4_flash.h
  • XMC_FLASH_SECTOR_9 : xmc4_flash.h
  • XMC_FLASH_SetMargin() : xmc4_flash.h
  • XMC_FLASH_SetWaitStates() : xmc4_flash.h
  • XMC_FLASH_STATUS_BUSY : xmc4_flash.h
  • XMC_FLASH_STATUS_COMMAND_SEQUENCE_ERROR : xmc4_flash.h
  • XMC_FLASH_STATUS_DOUBLE_BIT_ERROR : xmc4_flash.h
  • XMC_FLASH_STATUS_ERASE_STATE : xmc4_flash.h
  • XMC_FLASH_STATUS_OK : xmc4_flash.h
  • XMC_FLASH_STATUS_OPERATION_ERROR : xmc4_flash.h
  • XMC_FLASH_STATUS_PAGE_MODE : xmc4_flash.h
  • XMC_FLASH_STATUS_PROGRAMMING_STATE : xmc4_flash.h
  • XMC_FLASH_STATUS_PROTECTION_ERROR : xmc4_flash.h
  • XMC_FLASH_STATUS_PROTECTION_INSTALLED : xmc4_flash.h
  • XMC_FLASH_STATUS_READ_PROTECTION_DISABLED_STATE : xmc4_flash.h
  • XMC_FLASH_STATUS_READ_PROTECTION_INSTALLED : xmc4_flash.h
  • XMC_FLASH_STATUS_SINGLE_BIT_ERROR_AND_CORRECTION : xmc4_flash.h
  • XMC_FLASH_STATUS_SLEEP_MODE : xmc4_flash.h
  • XMC_FLASH_STATUS_t : xmc4_flash.h
  • XMC_FLASH_STATUS_VERIFY_ERROR : xmc4_flash.h
  • XMC_FLASH_STATUS_WRITE_PROTECTION_DISABLED_UCB0 : xmc4_flash.h
  • XMC_FLASH_STATUS_WRITE_PROTECTION_DISABLED_UCB1 : xmc4_flash.h
  • XMC_FLASH_STATUS_WRITE_PROTECTION_INSTALLED_UCB0 : xmc4_flash.h
  • XMC_FLASH_STATUS_WRITE_PROTECTION_INSTALLED_UCB1 : xmc4_flash.h
  • XMC_FLASH_STATUS_WRITE_PROTECTION_INSTALLED_UCB2 : xmc4_flash.h
  • XMC_FLASH_UCB0 : xmc4_flash.h
  • XMC_FLASH_UCB1 : xmc4_flash.h
  • XMC_FLASH_UCB2 : xmc4_flash.h
  • XMC_FLASH_UNCACHED_BASE : xmc4_flash.h
  • XMC_FLASH_VerifyReadProtection() : xmc4_flash.h
  • XMC_FLASH_VerifyWriteProtection() : xmc4_flash.h
  • XMC_FLASH_WORDS_PER_PAGE : xmc4_flash.h
  • XMC_GPIO_DisableDigitalInput() : xmc_gpio.h
  • XMC_GPIO_DisablePowerSaveMode() : xmc_gpio.h
  • XMC_GPIO_EnableDigitalInput() : xmc_gpio.h
  • XMC_GPIO_EnablePowerSaveMode() : xmc_gpio.h
  • XMC_GPIO_GetInput() : xmc_gpio.h
  • XMC_GPIO_HWCTRL_DISABLED : xmc_gpio.h
  • XMC_GPIO_HWCTRL_PERIPHERAL1 : xmc_gpio.h
  • XMC_GPIO_HWCTRL_PERIPHERAL2 : xmc_gpio.h
  • XMC_GPIO_HWCTRL_t : xmc_gpio.h
  • XMC_GPIO_Init() : xmc_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_PULL_DOWN : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_PULL_UP : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_SAMPLING : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_TRISTATE : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_PULL_DOWN : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_PULL_UP : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_SAMPLING : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_TRISTATE : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT1 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT2 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT3 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT4 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT3 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4 : xmc4_gpio.h
  • XMC_GPIO_MODE_t : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_LEVEL_HIGH : xmc_gpio.h
  • XMC_GPIO_OUTPUT_LEVEL_LOW : xmc_gpio.h
  • XMC_GPIO_OUTPUT_LEVEL_t : xmc_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_MEDIUM : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_STRONG_SHARP_EDGE : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_STRONG_SLOW_EDGE : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_t : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_WEAK : xmc4_gpio.h
  • XMC_GPIO_SetHardwareControl() : xmc_gpio.h
  • XMC_GPIO_SetMode() : xmc_gpio.h
  • XMC_GPIO_SetOutputHigh() : xmc_gpio.h
  • XMC_GPIO_SetOutputLevel() : xmc_gpio.h
  • XMC_GPIO_SetOutputLow() : xmc_gpio.h
  • XMC_GPIO_SetOutputStrength() : xmc4_gpio.h
  • XMC_GPIO_ToggleOutput() : xmc_gpio.h
  • XMC_HRPWM_ClampComparatorOutput() : xmc_hrpwm.h
  • XMC_HRPWM_ClearPreScaler() : xmc_hrpwm.h
  • XMC_HRPWM_CLK_FREQ_120MHZ : xmc_hrpwm.h
  • XMC_HRPWM_CLK_FREQ_180MHZ : xmc_hrpwm.h
  • XMC_HRPWM_CLK_FREQ_80MHZ : xmc_hrpwm.h
  • XMC_HRPWM_CLK_FREQ_NONE : xmc_hrpwm.h
  • XMC_HRPWM_CLK_FREQ_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_CSG0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_CSG1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_CSG2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_INPUT_ECLKA : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_INPUT_ECLKB : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_INPUT_ECLKC : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_INPUT_MCLK : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_INPUT_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_ClrEventSW() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_10_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_11_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_12_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_13_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_14_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_15_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_16_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_2_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_32_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_3_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_4_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_5_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_6_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_7_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_8_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_9_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INPUT_CINA : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INPUT_CINB : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INPUT_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INVERTING_INPUT_CMP0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INVERTING_INPUT_CMP1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INVERTING_INPUT_CMP2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INVERTING_INPUT_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_DACRefValSwitchingConfig() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_DisableEvent() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_EDGE_SEL_BOTH_EDGE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_EDGE_SEL_DISABLED : xmc_hrpwm.h
  • XMC_HRPWM_CSG_EDGE_SEL_FALLING_EDGE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_EDGE_SEL_RISING_EDGE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_EDGE_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_EnableEvent() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_GetEventStatus() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_Init() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IA : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IB : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IC : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_ID : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IF : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IG : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IH : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_II : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IJ : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IK : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IL : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IM : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IN : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IO : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IP : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_CFSE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_CRSE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_CSEE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_STD : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_STPS : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_STRS : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_TRGS : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_VLS1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_VLS2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_SR_LINE_0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_SR_LINE_1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_SR_LINE_2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_SR_LINE_3 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_SR_LINE_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_LVL_SEL_DISABLED : xmc_hrpwm.h
  • XMC_HRPWM_CSG_LVL_SEL_HIGH : xmc_hrpwm.h
  • XMC_HRPWM_CSG_LVL_SEL_LOW : xmc_hrpwm.h
  • XMC_HRPWM_CSG_LVL_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_POWER_MODE_HI_SPEED : xmc_hrpwm.h
  • XMC_HRPWM_CSG_POWER_MODE_LOW_SPEED : xmc_hrpwm.h
  • XMC_HRPWM_CSG_POWER_MODE_OFF : xmc_hrpwm.h
  • XMC_HRPWM_CSG_POWER_MODE_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_CLR_CSG0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_CLR_CSG1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_CLR_CSG2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_CLR_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_4 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_8 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_DIVISION_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_START_CLR : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_START_CLR_N_STRT : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_START_IGNORE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_START_STRT : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_START_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_STOP_CLR : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_STOP_CLR_N_STOP : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_STOP_IGNORE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_STOP_STP : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_STOP_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_START_CSG0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_START_CSG1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_START_CSG2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_START_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STATUS_CSG0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STATUS_CSG1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STATUS_CSG2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STATUS_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STOP_CSG0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STOP_CSG1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STOP_CSG2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STOP_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_CMP0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_CMP0_PSL : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_CMP1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_CMP1_PSL : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_CMP2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_CMP2_PSL : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_DAC0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_DAC1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_DAC2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SelBlankingInput() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SelClampingInput() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SelSlopeGenClkInput() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SetCMPInput() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SetEventSW() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SetSRNode() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLICE_0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLICE_1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLICE_2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLICE_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_CTRL_MODE_DEC_GEN : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_CTRL_MODE_INC_GEN : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_CTRL_MODE_STATIC : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_CTRL_MODE_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_CTRL_MODE_TRIANGULAR : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_START_IGNORE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_START_RESUME : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_START_STRT : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_START_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_STOP_FREEZE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_STOP_IGNORE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_STOP_STP : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_STOP_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_START_DAC0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_START_DAC1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_START_DAC2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_START_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_4 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_8 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STEP_GAIN_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STOP_DAC0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STOP_DAC1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STOP_DAC2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STOP_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_StartSlopeGenConfig() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_StopSlopeGenConfig() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWITCH_CMP_INPUT_CMP0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWITCH_CMP_INPUT_CMP1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWITCH_CMP_INPUT_CMP2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWITCH_CMP_INPUT_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWSM_DSV1_NO_TRIGGER : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWSM_DSV1_W_TRIGGER : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWSM_DSV2_NO_TRIGGER : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWSM_DSV2_W_TRIGGER : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWSM_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_TriggerDACConvConfig() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_TriggerShadowXferConfig() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdateBlankingValue() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdateDACPrescaler() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdateDACRefDSV1() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdateDACRefDSV2() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdateDACStepGain() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdateFilterWindow() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdatePulseClk() : xmc_hrpwm.h
  • XMC_HRPWM_DAC_SLOPE_GEN_STATUS_DAC0 : xmc_hrpwm.h
  • XMC_HRPWM_DAC_SLOPE_GEN_STATUS_DAC1 : xmc_hrpwm.h
  • XMC_HRPWM_DAC_SLOPE_GEN_STATUS_DAC2 : xmc_hrpwm.h
  • XMC_HRPWM_DAC_SLOPE_GEN_STATUS_t : xmc_hrpwm.h
  • XMC_HRPWM_DisableBias() : xmc_hrpwm.h
  • XMC_HRPWM_DisableComparatorShadowTransfer() : xmc_hrpwm.h
  • XMC_HRPWM_DisableCsgClock() : xmc_hrpwm.h
  • XMC_HRPWM_DisableGlobalHR() : xmc_hrpwm.h
  • XMC_HRPWM_DisableHighResolutionPath() : xmc_hrpwm.h
  • XMC_HRPWM_DisableHighResolutionShadowTransfer() : xmc_hrpwm.h
  • XMC_HRPWM_DisableHRPowerMode() : xmc_hrpwm.h
  • XMC_HRPWM_DisableLowResolutionPath() : xmc_hrpwm.h
  • XMC_HRPWM_EnableBias() : xmc_hrpwm.h
  • XMC_HRPWM_EnableComparatorShadowTransfer() : xmc_hrpwm.h
  • XMC_HRPWM_EnableGlobalHR() : xmc_hrpwm.h
  • XMC_HRPWM_EnableHighResolutionPath() : xmc_hrpwm.h
  • XMC_HRPWM_EnableHighResolutionShadowTransfer() : xmc_hrpwm.h
  • XMC_HRPWM_EnableHRPowerMode() : xmc_hrpwm.h
  • XMC_HRPWM_EnableLowResolutionPath() : xmc_hrpwm.h
  • XMC_HRPWM_FUNC_STATUS_DISABLE : xmc_hrpwm.h
  • XMC_HRPWM_FUNC_STATUS_ENABLE : xmc_hrpwm.h
  • XMC_HRPWM_FUNC_STATUS_t : xmc_hrpwm.h
  • XMC_HRPWM_GetCMPInput() : xmc_hrpwm.h
  • XMC_HRPWM_GetComparatorShadowTransferStatus() : xmc_hrpwm.h
  • XMC_HRPWM_GetHighResolutionShadowTransferStatus() : xmc_hrpwm.h
  • XMC_HRPWM_GetHRGenReadyStatus() : xmc_hrpwm.h
  • XMC_HRPWM_GetRunBitStatus() : xmc_hrpwm.h
  • XMC_HRPWM_HR_LOGIC_NOT_WORKING : xmc_hrpwm.h
  • XMC_HRPWM_HR_LOGIC_t : xmc_hrpwm.h
  • XMC_HRPWM_HR_LOGIC_WORKING : xmc_hrpwm.h
  • XMC_HRPWM_HR_PATH_HRC0 : xmc_hrpwm.h
  • XMC_HRPWM_HR_PATH_HRC1 : xmc_hrpwm.h
  • XMC_HRPWM_HR_PATH_HRC2 : xmc_hrpwm.h
  • XMC_HRPWM_HR_PATH_HRC3 : xmc_hrpwm.h
  • XMC_HRPWM_HR_PATH_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_CMP_SEL_CSG0 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_CMP_SEL_CSG1 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_CMP_SEL_CSG2 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_CMP_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_ConfigSourceSelect0() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_ConfigSourceSelect1() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_DT_TR_SEL_OVERFLOW : xmc_hrpwm.h
  • XMC_HRPWM_HRC_DT_TR_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_DT_TR_SEL_TIMER : xmc_hrpwm.h
  • XMC_HRPWM_HRC_HR_EDGE_SEL_BOTH : xmc_hrpwm.h
  • XMC_HRPWM_HRC_HR_EDGE_SEL_FALLING : xmc_hrpwm.h
  • XMC_HRPWM_HRC_HR_EDGE_SEL_NONE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_HR_EDGE_SEL_RISING : xmc_hrpwm.h
  • XMC_HRPWM_HRC_HR_EDGE_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_Init() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_OUT_PASSIVE_LVL_HIGH : xmc_hrpwm.h
  • XMC_HRPWM_HRC_OUT_PASSIVE_LVL_LOW : xmc_hrpwm.h
  • XMC_HRPWM_HRC_OUT_PASSIVE_LVL_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_Set_HR_Source() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SetCompare1() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SetCompare2() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SetDeadTimeFalling() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SetDeadTimeRising() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC0_DT_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC0_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC1_DT_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC1_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC2_DT_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC2_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC3_DT_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC3_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SOURCE_0 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SOURCE_1 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SOURCE_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_EDGE_SEL_BOTH : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_EDGE_SEL_DISABLED : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_EDGE_SEL_FALLING : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_EDGE_SEL_RISING : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_EDGE_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_INPUT_CCU : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_INPUT_CSG : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_INPUT_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_TIMER_SEL_CCU_CC0 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_TIMER_SEL_CCU_CC1 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_TIMER_SEL_CCU_CC2 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_TIMER_SEL_CCU_CC3 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_TIMER_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_Init() : xmc_hrpwm.h
  • XMC_HRPWM_IsComparatorClamped() : xmc_hrpwm.h
  • XMC_HRPWM_IsComparatorRunning() : xmc_hrpwm.h
  • XMC_HRPWM_IsDacRunning() : xmc_hrpwm.h
  • XMC_HRPWM_IsPrescalerRunning() : xmc_hrpwm.h
  • XMC_HRPWM_IsSlopeGenerationRunning() : xmc_hrpwm.h
  • XMC_HRPWM_LR_PATH_HRC0 : xmc_hrpwm.h
  • XMC_HRPWM_LR_PATH_HRC1 : xmc_hrpwm.h
  • XMC_HRPWM_LR_PATH_HRC2 : xmc_hrpwm.h
  • XMC_HRPWM_LR_PATH_HRC3 : xmc_hrpwm.h
  • XMC_HRPWM_LR_PATH_t : xmc_hrpwm.h
  • XMC_HRPWM_ModuleClkFreq() : xmc_hrpwm.h
  • XMC_HRPWM_SetCsgPowerMode() : xmc_hrpwm.h
  • XMC_HRPWM_SHADOW_TX_DAC0 : xmc_hrpwm.h
  • XMC_HRPWM_SHADOW_TX_DAC1 : xmc_hrpwm.h
  • XMC_HRPWM_SHADOW_TX_DAC2 : xmc_hrpwm.h
  • XMC_HRPWM_SHADOW_TX_DAC_t : xmc_hrpwm.h
  • XMC_HRPWM_StartComparator() : xmc_hrpwm.h
  • XMC_HRPWM_StartDac() : xmc_hrpwm.h
  • XMC_HRPWM_StartSlopeGeneration() : xmc_hrpwm.h
  • XMC_HRPWM_STATUS_BUSY : xmc_hrpwm.h
  • XMC_HRPWM_STATUS_ERROR : xmc_hrpwm.h
  • XMC_HRPWM_STATUS_OK : xmc_hrpwm.h
  • XMC_HRPWM_STATUS_t : xmc_hrpwm.h
  • XMC_HRPWM_StopComparator() : xmc_hrpwm.h
  • XMC_HRPWM_StopDac() : xmc_hrpwm.h
  • XMC_HRPWM_StopSlopeGeneration() : xmc_hrpwm.h
  • XMC_HRPWM_t : xmc_hrpwm.h
  • XMC_HRPWM_UnClampComparatorOutput() : xmc_hrpwm.h
  • XMC_I2C0_CH0 : xmc_i2c.h
  • XMC_I2C0_CH1 : xmc_i2c.h
  • XMC_I2C1_CH0 : xmc_i2c.h
  • XMC_I2C1_CH1 : xmc_i2c.h
  • XMC_I2C2_CH0 : xmc_i2c.h
  • XMC_I2C2_CH1 : xmc_i2c.h
  • XMC_I2C_10BIT_ADDR_GROUP : xmc_i2c.h
  • XMC_I2C_CH_ClearStatusFlag() : xmc_i2c.h
  • XMC_I2C_CH_CMD_READ : xmc_i2c.h
  • XMC_I2C_CH_CMD_t : xmc_i2c.h
  • XMC_I2C_CH_CMD_WRITE : xmc_i2c.h
  • XMC_I2C_CH_ConfigExternalInputSignalToBRG() : xmc_i2c.h
  • XMC_I2C_CH_DisableAcknowledgeAddress0() : xmc_i2c.h
  • XMC_I2C_CH_DisableDataTransmission() : xmc_i2c.h
  • XMC_I2C_CH_DisableEvent() : xmc_i2c.h
  • XMC_I2C_CH_EnableAcknowledgeAddress0() : xmc_i2c.h
  • XMC_I2C_CH_EnableDataTransmission() : xmc_i2c.h
  • XMC_I2C_CH_EnableEvent() : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ACK : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ARBITRATION_LOST : xmc_i2c.h
  • XMC_I2C_CH_EVENT_BAUD_RATE_GENERATOR : xmc_i2c.h
  • XMC_I2C_CH_EVENT_DATA_LOST : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ERROR : xmc_i2c.h
  • XMC_I2C_CH_EVENT_NACK : xmc_i2c.h
  • XMC_I2C_CH_EVENT_RECEIVE_START : xmc_i2c.h
  • XMC_I2C_CH_EVENT_REPEATED_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_EVENT_SLAVE_READ_REQUEST : xmc_i2c.h
  • XMC_I2C_CH_EVENT_STANDARD_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_EVENT_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_EVENT_STOP_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_EVENT_t : xmc_i2c.h
  • XMC_I2C_CH_EVENT_TRANSMIT_BUFFER : xmc_i2c.h
  • XMC_I2C_CH_EVENT_TRANSMIT_SHIFT : xmc_i2c.h
  • XMC_I2C_CH_GetReceivedData() : xmc_i2c.h
  • XMC_I2C_CH_GetReceiverStatusFlag() : xmc_i2c.h
  • XMC_I2C_CH_GetSlaveAddress() : xmc_i2c.h
  • XMC_I2C_CH_GetStatusFlag() : xmc_i2c.h
  • XMC_I2C_CH_Init() : xmc_i2c.h
  • XMC_I2C_CH_INPUT_SCL : xmc_i2c.h
  • XMC_I2C_CH_INPUT_SDA : xmc_i2c.h
  • XMC_I2C_CH_INPUT_t : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_t : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_i2c.h
  • XMC_I2C_CH_MasterReceiveAck() : xmc_i2c.h
  • XMC_I2C_CH_MasterReceiveNack() : xmc_i2c.h
  • XMC_I2C_CH_MasterRepeatedStart() : xmc_i2c.h
  • XMC_I2C_CH_MasterStart() : xmc_i2c.h
  • XMC_I2C_CH_MasterStop() : xmc_i2c.h
  • XMC_I2C_CH_MasterTransmit() : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_ACK : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_ADR : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_ERR : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_FIN : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_MODE : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_t : xmc_i2c.h
  • XMC_I2C_CH_SelectInterruptNodePointer() : xmc_i2c.h
  • XMC_I2C_CH_SetBaudrate() : xmc_i2c.h
  • XMC_I2C_CH_SetInputSource() : xmc_i2c.h
  • XMC_I2C_CH_SetInterruptNodePointer() : xmc_i2c.h
  • XMC_I2C_CH_SetSlaveAddress() : xmc_i2c.h
  • XMC_I2C_CH_SlaveTransmit() : xmc_i2c.h
  • XMC_I2C_CH_Start() : xmc_i2c.h
  • XMC_I2C_CH_STATUS_BUSY : xmc_i2c.h
  • XMC_I2C_CH_STATUS_ERROR : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ACK_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ARBITRATION_LOST : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ERROR : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_NACK_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_REPEATED_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_SLAVE_READ_REQUESTED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_SLAVE_SELECT : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_STOP_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_t : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_WRONG_TDF_CODE_FOUND : xmc_i2c.h
  • XMC_I2C_CH_STATUS_OK : xmc_i2c.h
  • XMC_I2C_CH_STATUS_t : xmc_i2c.h
  • XMC_I2C_CH_Stop() : xmc_i2c.h
  • XMC_I2C_CH_TriggerServiceRequest() : xmc_i2c.h
  • XMC_I2S0_CH0 : xmc_i2s.h
  • XMC_I2S0_CH1 : xmc_i2s.h
  • XMC_I2S1_CH0 : xmc_i2s.h
  • XMC_I2S1_CH1 : xmc_i2s.h
  • XMC_I2S2_CH0 : xmc_i2s.h
  • XMC_I2S2_CH1 : xmc_i2s.h
  • XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 : xmc_i2s.h
  • XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK : xmc_i2s.h
  • XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t : xmc_i2s.h
  • XMC_I2S_CH_BUS_MODE_MASTER : xmc_i2s.h
  • XMC_I2S_CH_BUS_MODE_SLAVE : xmc_i2s.h
  • XMC_I2S_CH_BUS_MODE_t : xmc_i2s.h
  • XMC_I2S_CH_CHANNEL_1_LEFT : xmc_i2s.h
  • XMC_I2S_CH_CHANNEL_2_RIGHT : xmc_i2s.h
  • XMC_I2S_CH_CHANNEL_t : xmc_i2s.h
  • XMC_I2S_CH_ClearStatusFlag() : xmc_i2s.h
  • XMC_I2S_CH_ConfigureShiftClockOutput() : xmc_i2s.h
  • XMC_I2S_CH_DisableDataTransmission() : xmc_i2s.h
  • XMC_I2S_CH_DisableDelayCompensation() : xmc_i2s.h
  • XMC_I2S_CH_DisableEvent() : xmc_i2s.h
  • XMC_I2S_CH_DisableInputInversion() : xmc_i2s.h
  • XMC_I2S_CH_DisableMasterClock() : xmc_i2s.h
  • XMC_I2S_CH_EnableDataTransmission() : xmc_i2s.h
  • XMC_I2S_CH_EnableDelayCompensation() : xmc_i2s.h
  • XMC_I2S_CH_EnableEvent() : xmc_i2s.h
  • XMC_I2S_CH_EnableInputInversion() : xmc_i2s.h
  • XMC_I2S_CH_EnableMasterClock() : xmc_i2s.h
  • XMC_I2S_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_EVENT_BAUD_RATE_GENERATOR : xmc_i2s.h
  • XMC_I2S_CH_EVENT_DATA_LOST : xmc_i2s.h
  • XMC_I2S_CH_EVENT_DX2TIEN_ACTIVATED : xmc_i2s.h
  • XMC_I2S_CH_EVENT_RECEIVE_START : xmc_i2s.h
  • XMC_I2S_CH_EVENT_STANDARD_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_EVENT_t : xmc_i2s.h
  • XMC_I2S_CH_EVENT_TRANSMIT_BUFFER : xmc_i2s.h
  • XMC_I2S_CH_EVENT_TRANSMIT_SHIFT : xmc_i2s.h
  • XMC_I2S_CH_EVENT_WA_FALLING_EDGE : xmc_i2s.h
  • XMC_I2S_CH_EVENT_WA_GENERATION_END : xmc_i2s.h
  • XMC_I2S_CH_EVENT_WA_RISING_EDGE : xmc_i2s.h
  • XMC_I2S_CH_GetReceivedData() : xmc_i2s.h
  • XMC_I2S_CH_GetStatusFlag() : xmc_i2s.h
  • XMC_I2S_CH_Init() : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN0 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN1 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN2 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN3 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_SLAVE_SCLKIN : xmc_i2s.h
  • XMC_I2S_CH_INPUT_SLAVE_WA : xmc_i2s.h
  • XMC_I2S_CH_INPUT_t : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_t : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_i2s.h
  • XMC_I2S_CH_Receive() : xmc_i2s.h
  • XMC_I2S_CH_SelectInterruptNodePointer() : xmc_i2s.h
  • XMC_I2S_CH_SetBaudrate() : xmc_i2s.h
  • XMC_I2S_CH_SetBitOrderLsbFirst() : xmc_i2s.h
  • XMC_I2S_CH_SetBitOrderMsbFirst() : xmc_i2s.h
  • XMC_I2S_CH_SetFrameLength() : xmc_i2s.h
  • XMC_I2S_CH_SetInputSource() : xmc_i2s.h
  • XMC_I2S_CH_SetInterruptNodePointer() : xmc_i2s.h
  • XMC_I2S_CH_SetSystemWordLength() : xmc_i2s.h
  • XMC_I2S_CH_SetWordLength() : xmc_i2s.h
  • XMC_I2S_CH_Start() : xmc_i2s.h
  • XMC_I2S_CH_STATUS_BUSY : xmc_i2s.h
  • XMC_I2S_CH_STATUS_ERROR : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_DX2S : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_DX2T_EVENT_DETECTED : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_t : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WA_FALLING_EDGE_EVENT : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WA_GENERATION_END : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WA_RISING_EDGE_EVENT : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WORD_ADDRESS : xmc_i2s.h
  • XMC_I2S_CH_STATUS_OK : xmc_i2s.h
  • XMC_I2S_CH_STATUS_t : xmc_i2s.h
  • XMC_I2S_CH_Stop() : xmc_i2s.h
  • XMC_I2S_CH_Transmit() : xmc_i2s.h
  • XMC_I2S_CH_TriggerServiceRequest() : xmc_i2s.h
  • XMC_I2S_CH_WA_POLARITY_DIRECT : xmc_i2s.h
  • XMC_I2S_CH_WA_POLARITY_INVERTED : xmc_i2s.h
  • XMC_I2S_CH_WA_POLARITY_t : xmc_i2s.h
  • XMC_I2S_CH_WordAddressSignalPolarity() : xmc_i2s.h
  • XMC_LEDTS0 : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_10_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_11_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_12_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_13_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_14_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_15_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_16_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_1_TIME : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_2_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_3_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_4_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_5_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_6_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_7_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_8_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_9_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_t : xmc_ledts.h
  • XMC_LEDTS_ACTIVE_LEVEL_LED_COL_HIGH : xmc_ledts.h
  • XMC_LEDTS_ACTIVE_LEVEL_LED_COL_LOW : xmc_ledts.h
  • XMC_LEDTS_ACTIVE_LEVEL_LED_COL_t : xmc_ledts.h
  • XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_ACTIVE : xmc_ledts.h
  • XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_INACTIVE : xmc_ledts.h
  • XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_t : xmc_ledts.h
  • XMC_LEDTS_ClearInterruptFlag() : xmc_ledts.h
  • XMC_LEDTS_CLOCK_TYPE_MASTER : xmc_ledts.h
  • XMC_LEDTS_CLOCK_TYPE_SLAVE : xmc_ledts.h
  • XMC_LEDTS_CLOCK_TYPE_t : xmc_ledts.h
  • XMC_LEDTS_COMMON_COMPARE_DISABLE : xmc_ledts.h
  • XMC_LEDTS_COMMON_COMPARE_ENABLE : xmc_ledts.h
  • XMC_LEDTS_COMMON_COMPARE_t : xmc_ledts.h
  • XMC_LEDTS_DisableInterrupt() : xmc_ledts.h
  • XMC_LEDTS_EnableInterrupt() : xmc_ledts.h
  • XMC_LEDTS_EXT_PULLUP_COLA_DISABLE : xmc_ledts.h
  • XMC_LEDTS_EXT_PULLUP_COLA_ENABLE : xmc_ledts.h
  • XMC_LEDTS_EXT_PULLUP_COLA_t : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_16_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_1_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_4_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_8_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_t : xmc_ledts.h
  • XMC_LEDTS_FLAG_STATUS_NO : xmc_ledts.h
  • XMC_LEDTS_FLAG_STATUS_t : xmc_ledts.h
  • XMC_LEDTS_FLAG_STATUS_YES : xmc_ledts.h
  • XMC_LEDTS_InitGlobal() : xmc_ledts.h
  • XMC_LEDTS_InitLED() : xmc_ledts.h
  • XMC_LEDTS_InitTSAdvanced() : xmc_ledts.h
  • XMC_LEDTS_InitTSBasic() : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TIMEFRAME : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TIMEPERIOD : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TIMESLICE : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TSCOUNTER_OVERFLOW : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_t : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_TIMEFRAME : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_TIMEPERIOD : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_TIMESLICE : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_0 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_1 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_2 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_3 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_4 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_5 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_6 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_A : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_t : xmc_ledts.h
  • XMC_LEDTS_LED_FUNC_DISABLE : xmc_ledts.h
  • XMC_LEDTS_LED_FUNC_ENABLE : xmc_ledts.h
  • XMC_LEDTS_LED_FUNC_t : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_1 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_2 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_3 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_4 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_5 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_6 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_7 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_8 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_t : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_1 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_2 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_3 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_4 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_5 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_6 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_7 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_8 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_t : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_0 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_1 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_2 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_3 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_4 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_5 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_6 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_7 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_SW_CONTROL_t : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_t : xmc_ledts.h
  • XMC_LEDTS_ReadFNCOL() : xmc_ledts.h
  • XMC_LEDTS_ReadInterruptFlag() : xmc_ledts.h
  • XMC_LEDTS_ReadTSVAL() : xmc_ledts.h
  • XMC_LEDTS_SetActivePADNo() : xmc_ledts.h
  • XMC_LEDTS_SetColumnBrightness() : xmc_ledts.h
  • XMC_LEDTS_SetCommonOscillationWindow() : xmc_ledts.h
  • XMC_LEDTS_SetLEDLinePattern() : xmc_ledts.h
  • XMC_LEDTS_SetNumOfLEDColumns() : xmc_ledts.h
  • XMC_LEDTS_SetOscillationWindow() : xmc_ledts.h
  • XMC_LEDTS_StartCounter() : xmc_ledts.h
  • XMC_LEDTS_STATUS_ERROR : xmc_ledts.h
  • XMC_LEDTS_STATUS_IDLE : xmc_ledts.h
  • XMC_LEDTS_STATUS_RUNNING : xmc_ledts.h
  • XMC_LEDTS_STATUS_SUCCESS : xmc_ledts.h
  • XMC_LEDTS_STATUS_t : xmc_ledts.h
  • XMC_LEDTS_StopCounter() : xmc_ledts.h
  • XMC_LEDTS_SUSPEND_DISABLE : xmc_ledts.h
  • XMC_LEDTS_SUSPEND_ENABLE : xmc_ledts.h
  • XMC_LEDTS_SUSPEND_t : xmc_ledts.h
  • XMC_LEDTS_SW_CONTROL_DISABLE : xmc_ledts.h
  • XMC_LEDTS_SW_CONTROL_ENABLE : xmc_ledts.h
  • XMC_LEDTS_t : xmc_ledts.h
  • XMC_LEDTS_TF_INTERRUPT_FLAG_ACTIVE : xmc_ledts.h
  • XMC_LEDTS_TF_INTERRUPT_FLAG_INACTIVE : xmc_ledts.h
  • XMC_LEDTS_TF_INTERRUPT_FLAG_t : xmc_ledts.h
  • XMC_LEDTS_TF_VALIDATION_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TF_VALIDATION_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TF_VALIDATION_t : xmc_ledts.h
  • XMC_LEDTS_TP_SYNC_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TP_SYNC_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TP_SYNC_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_AUTO_RESET_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_AUTO_RESET_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_AUTO_RESET_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_1_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_2_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_3_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_4_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_5_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_6_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_7_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_8_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_NO : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_YES : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_SATURATION_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_SATURATION_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_SATURATION_t : xmc_ledts.h
  • XMC_LEDTS_TS_FUNC_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TS_FUNC_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_FUNC_t : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_0 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_1 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_2 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_3 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_4 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_5 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_6 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_7 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_t : xmc_ledts.h
  • XMC_LEDTS_TS_INTERRUPT_FLAG_t : xmc_ledts.h
  • XMC_POSIF_ClearEvent() : xmc_posif.h
  • XMC_POSIF_Disable() : xmc_posif.h
  • XMC_POSIF_DisableEvent() : xmc_posif.h
  • XMC_POSIF_Enable() : xmc_posif.h
  • XMC_POSIF_EnableEvent() : xmc_posif.h
  • XMC_POSIF_FILTER_16_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_1_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_2_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_32_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_4_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_64_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_8_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_DISABLED : xmc_posif.h
  • XMC_POSIF_FILTER_t : xmc_posif.h
  • XMC_POSIF_GetEventStatus() : xmc_posif.h
  • XMC_POSIF_HSC_GetCurrentPattern() : xmc_posif.h
  • XMC_POSIF_HSC_GetExpectedPattern() : xmc_posif.h
  • XMC_POSIF_HSC_GetLastSampledPattern() : xmc_posif.h
  • XMC_POSIF_HSC_Init() : xmc_posif.h
  • XMC_POSIF_HSC_SetCurrentPattern() : xmc_posif.h
  • XMC_POSIF_HSC_SetExpectedPattern() : xmc_posif.h
  • XMC_POSIF_HSC_SetHallPatterns() : xmc_posif.h
  • XMC_POSIF_HSC_TRIGGER_EDGE_FALLING : xmc_posif.h
  • XMC_POSIF_HSC_TRIGGER_EDGE_RISING : xmc_posif.h
  • XMC_POSIF_HSC_TRIGGER_EDGE_t : xmc_posif.h
  • XMC_POSIF_HSC_UpdateHallPattern() : xmc_posif.h
  • XMC_POSIF_Init() : xmc_posif.h
  • XMC_POSIF_INPUT_ACTIVE_LEVEL_HIGH : xmc_posif.h
  • XMC_POSIF_INPUT_ACTIVE_LEVEL_LOW : xmc_posif.h
  • XMC_POSIF_INPUT_ACTIVE_LEVEL_t : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_A : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_B : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_C : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_D : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_E : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_F : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_G : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_H : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_t : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_CHE : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_CNT : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_DIR : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_ERR : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_HALL_INPUT : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_INDX : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_MCP_SHADOW_TRANSFER : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_PCLK : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_t : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_WHE : xmc_posif.h
  • XMC_POSIF_IsRunning() : xmc_posif.h
  • XMC_POSIF_MCM_EnableMultiChannelPatternUpdate() : xmc_posif.h
  • XMC_POSIF_MCM_GetMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MCM_GetShadowMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MCM_Init() : xmc_posif.h
  • XMC_POSIF_MCM_SetMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MCM_UpdateMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MODE_HALL_SENSOR : xmc_posif.h
  • XMC_POSIF_MODE_MCM : xmc_posif.h
  • XMC_POSIF_MODE_MCM_QD : xmc_posif.h
  • XMC_POSIF_MODE_QD : xmc_posif.h
  • XMC_POSIF_MODE_t : xmc_posif.h
  • XMC_POSIF_QD_DIR_CLOCKWISE : xmc_posif.h
  • XMC_POSIF_QD_DIR_COUNTERCLOCKWISE : xmc_posif.h
  • XMC_POSIF_QD_DIR_t : xmc_posif.h
  • XMC_POSIF_QD_GetCurrentIndexValue() : xmc_posif.h
  • XMC_POSIF_QD_GetCurrentState() : xmc_posif.h
  • XMC_POSIF_QD_GetDirection() : xmc_posif.h
  • XMC_POSIF_QD_GetPreviousState() : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_ALWAYS : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_NEVER : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_ONCE : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_t : xmc_posif.h
  • XMC_POSIF_QD_Init() : xmc_posif.h
  • XMC_POSIF_QD_MODE_DIRECTION_COUNT : xmc_posif.h
  • XMC_POSIF_QD_MODE_QUADRATURE : xmc_posif.h
  • XMC_POSIF_QD_MODE_t : xmc_posif.h
  • XMC_POSIF_SelectInputSource() : xmc_posif.h
  • XMC_POSIF_SetEvent() : xmc_posif.h
  • XMC_POSIF_SetInterruptNode() : xmc_posif.h
  • XMC_POSIF_SetMode() : xmc_posif.h
  • XMC_POSIF_SR_ID_0 : xmc_posif.h
  • XMC_POSIF_SR_ID_1 : xmc_posif.h
  • XMC_POSIF_SR_ID_t : xmc_posif.h
  • XMC_POSIF_Start() : xmc_posif.h
  • XMC_POSIF_STATUS_ERROR : xmc_posif.h
  • XMC_POSIF_STATUS_OK : xmc_posif.h
  • XMC_POSIF_STATUS_t : xmc_posif.h
  • XMC_POSIF_Stop() : xmc_posif.h
  • XMC_POSIF_t : xmc_posif.h
  • XMC_PREFETCH_DisableInstructionBuffer() : xmc4_flash.h
  • XMC_PREFETCH_EnableInstructionBuffer() : xmc4_flash.h
  • XMC_PREFETCH_InvalidateInstructionBuffer() : xmc4_flash.h
  • XMC_RTC_ClearEvent() : xmc_rtc.h
  • XMC_RTC_Disable() : xmc_rtc.h
  • XMC_RTC_DisableEvent() : xmc_rtc.h
  • XMC_RTC_DisableHibernationWakeUp() : xmc4_rtc.h
  • XMC_RTC_Enable() : xmc_rtc.h
  • XMC_RTC_EnableEvent() : xmc_rtc.h
  • XMC_RTC_EnableHibernationWakeUp() : xmc4_rtc.h
  • XMC_RTC_EVENT_ALARM : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_DAYS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_HOURS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_MINUTES : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_MONTHS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_SECONDS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_YEARS : xmc_rtc.h
  • XMC_RTC_EVENT_t : xmc_rtc.h
  • XMC_RTC_GetAlarm() : xmc_rtc.h
  • XMC_RTC_GetAlarmStdFormat() : xmc_rtc.h
  • XMC_RTC_GetEventStatus() : xmc_rtc.h
  • XMC_RTC_GetPrescaler() : xmc_rtc.h
  • XMC_RTC_GetTime() : xmc_rtc.h
  • XMC_RTC_GetTimeStdFormat() : xmc_rtc.h
  • XMC_RTC_Init() : xmc_rtc.h
  • XMC_RTC_IsEnabled() : xmc_rtc.h
  • XMC_RTC_IsRunning() : xmc_rtc.h
  • XMC_RTC_MONTH_t : xmc_rtc.h
  • XMC_RTC_SetAlarm() : xmc_rtc.h
  • XMC_RTC_SetAlarmStdFormat() : xmc_rtc.h
  • XMC_RTC_SetPrescaler() : xmc_rtc.h
  • XMC_RTC_SetTime() : xmc_rtc.h
  • XMC_RTC_SetTimeStdFormat() : xmc_rtc.h
  • XMC_RTC_Start() : xmc_rtc.h
  • XMC_RTC_STATUS_BUSY : xmc_rtc.h
  • XMC_RTC_STATUS_ERROR : xmc_rtc.h
  • XMC_RTC_STATUS_OK : xmc_rtc.h
  • XMC_RTC_STATUS_t : xmc_rtc.h
  • XMC_RTC_Stop() : xmc_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_ALARM : xmc4_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_DAYS : xmc4_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_HOURS : xmc4_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_MINUTES : xmc4_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_MONTHS : xmc4_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_SECONDS : xmc4_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_YEARS : xmc4_rtc.h
  • XMC_RTC_WAKEUP_EVENT_t : xmc4_rtc.h
  • XMC_RTC_WEEKDAY_t : xmc_rtc.h
  • XMC_SCU_BOOTMODE_ABM0 : xmc4_scu.h
  • XMC_SCU_BOOTMODE_ABM1 : xmc4_scu.h
  • XMC_SCU_BOOTMODE_ASC_BSL : xmc4_scu.h
  • XMC_SCU_BOOTMODE_BMI : xmc4_scu.h
  • XMC_SCU_BOOTMODE_CAN_BSL : xmc4_scu.h
  • XMC_SCU_BOOTMODE_FABM : xmc4_scu.h
  • XMC_SCU_BOOTMODE_NORMAL : xmc4_scu.h
  • XMC_SCU_BOOTMODE_PSRAM_BOOT : xmc4_scu.h
  • XMC_SCU_BOOTMODE_t : xmc4_scu.h
  • XMC_SCU_CalibrateTemperatureSensor() : xmc4_scu.h
  • XMC_SCU_CCU_TRIGGER_CCU40 : xmc4_scu.h
  • XMC_SCU_CCU_TRIGGER_CCU80 : xmc4_scu.h
  • XMC_SCU_CCU_TRIGGER_t : xmc4_scu.h
  • XMC_SCU_CLOCK_CCU : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_CCU : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_EBU : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_ETH : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_SDMMC : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_USB : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_WDT : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_CCU : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_EBU : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_ETH : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_SDMMC : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_USB : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_WDT : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_FLASH_POWERDOWN : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_PLL_POWERDOWN : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_SYSCLK_FOFI : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_SYSCLK_FPLL : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_t : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_VCO_POWERDOWN : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableClock() : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableHighPerformanceOscillator() : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableHighPerformanceOscillatorGeneralPurposeInput() : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableLowPowerOscillator() : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableLowPowerOscillatorGeneralPurposeInput() : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableSystemPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableUsbPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_EBU : xmc4_scu.h
  • XMC_SCU_CLOCK_ECATCLKSRC_SYSPLL : xmc4_scu.h
  • XMC_SCU_CLOCK_ECATCLKSRC_t : xmc4_scu.h
  • XMC_SCU_CLOCK_ECATCLKSRC_USBPLL : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableClock() : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableHighPerformanceOscillator() : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableHighPerformanceOscillatorGeneralPurposeInput() : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableLowPowerOscillator() : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput() : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableSystemPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableUsbPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_ETH : xmc4_scu.h
  • XMC_SCU_CLOCK_EXTOUTCLKSRC_PLL : xmc4_scu.h
  • XMC_SCU_CLOCK_EXTOUTCLKSRC_SYS : xmc4_scu.h
  • XMC_SCU_CLOCK_EXTOUTCLKSRC_t : xmc4_scu.h
  • XMC_SCU_CLOCK_EXTOUTCLKSRC_USB : xmc4_scu.h
  • XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_AUTOMATIC : xmc4_scu.h
  • XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_FACTORY : xmc4_scu.h
  • XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_t : xmc4_scu.h
  • XMC_SCU_CLOCK_GatePeripheralClock() : xmc_scu.h
  • XMC_SCU_CLOCK_GetCcuClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetCcuClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetCpuClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetCpuClockFrequency() : xmc_scu.h
  • XMC_SCU_CLOCK_GetEbuClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetEbuClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetECATClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetECATClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetEthernetClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetExternalOutputClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetExternalOutputClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetExternalOutputClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetHighPerformanceOscillatorGeneralPurposeInputStatus() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetLowPowerOscillatorGeneralPurposeInputStatus() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetPeripheralClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetPeripheralClockFrequency() : xmc_scu.h
  • XMC_SCU_CLOCK_GetSystemClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetSystemClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetSystemClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetSystemPllClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetSystemPllClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetSystemPllClockSourceFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetUsbClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetUsbClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetUsbClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetUsbPllClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetWdtClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetWdtClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetWdtClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_Init() : xmc_scu.h
  • XMC_SCU_CLOCK_IsClockEnabled() : xmc4_scu.h
  • XMC_SCU_CLOCK_IsHighPerformanceOscillatorStable() : xmc4_scu.h
  • XMC_SCU_CLOCK_IsLowPowerOscillatorStable() : xmc4_scu.h
  • XMC_SCU_CLOCK_IsPeripheralClockGated() : xmc_scu.h
  • XMC_SCU_CLOCK_IsSystemPllLocked() : xmc4_scu.h
  • XMC_SCU_CLOCK_IsUsbPllLocked() : xmc4_scu.h
  • XMC_SCU_CLOCK_MMC : xmc4_scu.h
  • XMC_SCU_CLOCK_SetBackupClockCalibrationMode() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetCcuClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetCpuClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetDeepSleepConfig() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetEbuClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetECATClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetECATClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetExternalOutputClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetExternalOutputClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetPeripheralClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetSleepConfig() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetSystemClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetSystemClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetSystemPllClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetUsbClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetUsbClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetWdtClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetWdtClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLE_EBU : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLE_ETH : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLE_SDMMC : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLE_USB : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLED_CCU : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLED_WDT : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_CCU : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_EBU : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_ETH : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_SDMMC : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_USB : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_WDT : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_SYSCLK_FOFI : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_SYSCLK_FPLL : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_t : xmc4_scu.h
  • XMC_SCU_CLOCK_StartSystemPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_StartUsbPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_StepSystemPllFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_StopSystemPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_StopUsbPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSCLKSRC_OFI : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSCLKSRC_PLL : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSCLKSRC_t : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLL_MODE_DISABLED : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLL_MODE_NORMAL : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLL_MODE_PRESCALAR : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLL_MODE_t : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLLCLKSRC_OFI : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLLCLKSRC_OSCHP : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLLCLKSRC_t : xmc4_scu.h
  • XMC_SCU_CLOCK_t : xmc4_scu.h
  • XMC_SCU_CLOCK_UngatePeripheralClock() : xmc_scu.h
  • XMC_SCU_CLOCK_USB : xmc4_scu.h
  • XMC_SCU_CLOCK_USBCLKSRC_SYSPLL : xmc4_scu.h
  • XMC_SCU_CLOCK_USBCLKSRC_t : xmc4_scu.h
  • XMC_SCU_CLOCK_USBCLKSRC_USBPLL : xmc4_scu.h
  • XMC_SCU_CLOCK_WDT : xmc4_scu.h
  • XMC_SCU_CLOCK_WDTCLKSRC_OFI : xmc4_scu.h
  • XMC_SCU_CLOCK_WDTCLKSRC_PLL : xmc4_scu.h
  • XMC_SCU_CLOCK_WDTCLKSRC_STDBY : xmc4_scu.h
  • XMC_SCU_CLOCK_WDTCLKSRC_t : xmc4_scu.h
  • XMC_SCU_DisableOutOfRangeComparator() : xmc4_scu.h
  • XMC_SCU_DisableTemperatureSensor() : xmc4_scu.h
  • XMC_SCU_EnableOutOfRangeComparator() : xmc4_scu.h
  • XMC_SCU_EnableTemperatureSensor() : xmc4_scu.h
  • XMC_SCU_GetBootMode() : xmc4_scu.h
  • XMC_SCU_GetMirrorStatus() : xmc_scu.h
  • XMC_SCU_GetTemperatureMeasurement() : xmc4_scu.h
  • XMC_SCU_HIB_ClearEventStatus() : xmc4_scu.h
  • XMC_SCU_HIB_ClearWakeupEventDetectionStatus() : xmc4_scu.h
  • XMC_SCU_HIB_CTRL_STATUS_ACTIVE : xmc4_scu.h
  • XMC_SCU_HIB_CTRL_STATUS_NO_ACTIVE : xmc4_scu.h
  • XMC_SCU_HIB_CTRL_STATUS_t : xmc4_scu.h
  • XMC_SCU_HIB_DisableEvent() : xmc4_scu.h
  • XMC_SCU_HIB_DisableHibernateDomain() : xmc4_scu.h
  • XMC_SCU_HIB_DisableInternalSlowClock() : xmc4_scu.h
  • XMC_SCU_HIB_EnableEvent() : xmc4_scu.h
  • XMC_SCU_HIB_EnableHibernateDomain() : xmc4_scu.h
  • XMC_SCU_HIB_EnableInternalSlowClock() : xmc4_scu.h
  • XMC_SCU_HIB_EnterHibernateState() : xmc4_scu.h
  • XMC_SCU_HIB_EnterHibernateStateEx() : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_NEGEDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_POSEDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_NEGEDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_POSEDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_LPAC_VBAT_NEGEDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_LPAC_VBAT_POSEDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_t : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_ULPWDG : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_WAKEUP_ON_NEG_EDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_WAKEUP_ON_POS_EDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_WAKEUP_ON_RTC : xmc4_scu.h
  • XMC_SCU_HIB_GetEventStatus() : xmc4_scu.h
  • XMC_SCU_HIB_GetHibernateControlStatus() : xmc4_scu.h
  • XMC_SCU_HIB_GetRtcClockSource() : xmc4_scu.h
  • XMC_SCU_HIB_GetStdbyClockSource() : xmc4_scu.h
  • XMC_SCU_HIB_HIBERNATE_MODE_EXTERNAL : xmc4_scu.h
  • XMC_SCU_HIB_HIBERNATE_MODE_INTERNAL : xmc4_scu.h
  • XMC_SCU_HIB_HIBERNATE_MODE_t : xmc4_scu.h
  • XMC_SCU_HIB_IO_0 : xmc4_scu.h
  • XMC_SCU_HIB_IO_1 : xmc4_scu.h
  • XMC_SCU_HIB_IO_OUTPUT_LEVEL_HIGH : xmc4_scu.h
  • XMC_SCU_HIB_IO_OUTPUT_LEVEL_LOW : xmc4_scu.h
  • XMC_SCU_HIB_IO_OUTPUT_LEVEL_t : xmc4_scu.h
  • XMC_SCU_HIB_IO_t : xmc4_scu.h
  • XMC_SCU_HIB_IsHibernateDomainEnabled() : xmc4_scu.h
  • XMC_SCU_HIB_IsWakeupEventDetected() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_ClearStatus() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_GetStatus() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_INPUT_DISABLED : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_INPUT_HIB_IO_0 : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_INPUT_HIB_IO_1 : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_INPUT_t : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_INPUT_VBAT : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_SetHIBIO0Thresholds() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_SetHIBIO1Thresholds() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_SetInput() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_SetTiming() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_SetTrigger() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_SetVBATThresholds() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_HIB_IO_0_ABOVE_THRESHOLD : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_HIB_IO_0_COMPARE_DONE : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_HIB_IO_1_ABOVE_THRESHOLD : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_HIB_IO_1_COMPARE_DONE : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_t : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_VBAT_ABOVE_THRESHOLD : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_VBAT_COMPARE_DONE : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_CONTINOUS : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_ON_WAKEUP_NEGATIVE_EDGE_EVENT : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_ON_WAKEUP_POSITIVE_EDGE_EVENT : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_RTC_ALARM_EVENT : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_RTC_PERIODIC_EVENT : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_SINGLE_SHOT : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_SUBSECOND_INTERVAL_COUNTER : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_t : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TriggerCompare() : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_INPUT_PULL_DOWN : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_INPUT_PULL_NONE : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_INPUT_PULL_UP : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_OUTPUT_OPEN_DRAIN_GPIO : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_OUTPUT_OPEN_DRAIN_HIBCTRL : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_OUTPUT_OPEN_DRAIN_WDTSRV : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_OUTPUT_PUSH_PULL_GPIO : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_OUTPUT_PUSH_PULL_HIBCTRL : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_OUTPUT_PUSH_PULL_WDTSRV : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_t : xmc4_scu.h
  • XMC_SCU_HIB_RTCCLKSRC_OSI : xmc4_scu.h
  • XMC_SCU_HIB_RTCCLKSRC_t : xmc4_scu.h
  • XMC_SCU_HIB_RTCCLKSRC_ULP : xmc4_scu.h
  • XMC_SCU_HIB_SetInput0() : xmc4_scu.h
  • XMC_SCU_HIB_SetPinMode() : xmc4_scu.h
  • XMC_SCU_HIB_SetPinOutputLevel() : xmc4_scu.h
  • XMC_SCU_HIB_SetRtcClockSource() : xmc4_scu.h
  • XMC_SCU_HIB_SetSR0Input() : xmc4_scu.h
  • XMC_SCU_HIB_SetStandbyClockSource() : xmc4_scu.h
  • XMC_SCU_HIB_SetWakeupTriggerInput() : xmc4_scu.h
  • XMC_SCU_HIB_SR0_INPUT_ACMP0 : xmc4_scu.h
  • XMC_SCU_HIB_SR0_INPUT_HIB_IO_0 : xmc4_scu.h
  • XMC_SCU_HIB_SR0_INPUT_HIB_IO_1 : xmc4_scu.h
  • XMC_SCU_HIB_SR0_INPUT_t : xmc4_scu.h
  • XMC_SCU_HIB_STDBYCLKSRC_OSCULP : xmc4_scu.h
  • XMC_SCU_HIB_STDBYCLKSRC_OSI : xmc4_scu.h
  • XMC_SCU_HIB_STDBYCLKSRC_t : xmc4_scu.h
  • XMC_SCU_HIB_TriggerEvent() : xmc4_scu.h
  • XMC_SCU_HighTemperature() : xmc4_scu.h
  • XMC_SCU_INTERRUPT_ClearEventStatus() : xmc_scu.h
  • XMC_SCU_INTERRUPT_DisableEvent() : xmc_scu.h
  • XMC_SCU_INTERRUPT_DisableNmiRequest() : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EnableEvent() : xmc_scu.h
  • XMC_SCU_INTERRUPT_EnableNmiRequest() : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_DLR_OVERRUN : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_HANDLER_t : xmc_scu.h
  • XMC_SCU_INTERRUPT_EVENT_HDCLR_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_HDCR_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_HDSET_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_OSCSICTRL_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_OSCULCTRL_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RMX_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTC_ALARM : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTC_PERIODIC : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCATIM0_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCATIM1_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCCTR_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCTIM0_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCTIM1_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_t : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_WDT_WARN : xmc4_scu.h
  • XMC_SCU_INTERRUPT_SetEventHandler() : xmc_scu.h
  • XMC_SCU_INTERRUPT_TriggerEvent() : xmc_scu.h
  • XMC_SCU_INTERUPT_GetEventStatus() : xmc_scu.h
  • XMC_SCU_IRQHandler() : xmc_scu.h
  • XMC_SCU_IsTemperatureSensorBusy() : xmc4_scu.h
  • XMC_SCU_IsTemperatureSensorEnabled() : xmc4_scu.h
  • XMC_SCU_IsTemperatureSensorReady() : xmc4_scu.h
  • XMC_SCU_LowTemperature() : xmc4_scu.h
  • XMC_SCU_NMIREQ_ERU0_0 : xmc4_scu.h
  • XMC_SCU_NMIREQ_ERU0_1 : xmc4_scu.h
  • XMC_SCU_NMIREQ_ERU0_2 : xmc4_scu.h
  • XMC_SCU_NMIREQ_ERU0_3 : xmc4_scu.h
  • XMC_SCU_NMIREQ_RTC_AI : xmc4_scu.h
  • XMC_SCU_NMIREQ_RTC_PI : xmc4_scu.h
  • XMC_SCU_NMIREQ_t : xmc4_scu.h
  • XMC_SCU_NMIREQ_WDT_WARN : xmc4_scu.h
  • XMC_SCU_PARITY_ClearStatus() : xmc4_scu.h
  • XMC_SCU_PARITY_Disable() : xmc4_scu.h
  • XMC_SCU_PARITY_DisableTrapGeneration() : xmc4_scu.h
  • XMC_SCU_PARITY_DSRAM1_MEM : xmc4_scu.h
  • XMC_SCU_PARITY_Enable() : xmc4_scu.h
  • XMC_SCU_PARITY_EnableTrapGeneration() : xmc4_scu.h
  • XMC_SCU_PARITY_GetStatus() : xmc4_scu.h
  • XMC_SCU_PARITY_MCAN_MEM : xmc4_scu.h
  • XMC_SCU_PARITY_PMU_MEM : xmc4_scu.h
  • XMC_SCU_PARITY_PSRAM_MEM : xmc4_scu.h
  • XMC_SCU_PARITY_t : xmc4_scu.h
  • XMC_SCU_PARITY_USB_MEM : xmc4_scu.h
  • XMC_SCU_PARITY_USIC0_MEM : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_CCU40 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_CCU80 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_DAC : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_DSD : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_EBU : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_ECAT0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_ERU1 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_ETH0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_FCE : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_GPDMA0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_GPDMA1 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_HRPWM0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_LEDTS0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_MCAN : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_PORTS : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_POSIF0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_SDMMC : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_t : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_USB0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_USIC0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_USIC1 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_USIC2 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_VADC : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_WDT : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_CCU40 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_CCU80 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_DAC : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_DSD : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_EBU : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_ECAT0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_ERU1 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_ETH0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_FCE : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_GPDMA0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_GPDMA1 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_HRPWM0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_LEDTS0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_MCAN : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_PORTS : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_POSIF0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_SDMMC : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_t : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_USB0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_USIC0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_USIC1 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_USIC2 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_VADC : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_WDT : xmc4_scu.h
  • XMC_SCU_POWER_DisableMonitor() : xmc4_scu.h
  • XMC_SCU_POWER_DisableUsb() : xmc4_scu.h
  • XMC_SCU_POWER_EnableMonitor() : xmc4_scu.h
  • XMC_SCU_POWER_EnableUsb() : xmc4_scu.h
  • XMC_SCU_POWER_EVR_STATUS_EVR13_OVERVOLTAGE : xmc4_scu.h
  • XMC_SCU_POWER_EVR_STATUS_OK : xmc4_scu.h
  • XMC_SCU_POWER_EVR_STATUS_t : xmc4_scu.h
  • XMC_SCU_POWER_GetEVR13Voltage() : xmc4_scu.h
  • XMC_SCU_POWER_GetEVR33Voltage() : xmc4_scu.h
  • XMC_SCU_POWER_GetEVRStatus() : xmc4_scu.h
  • XMC_SCU_POWER_MODE_DEEPSLEEP : xmc4_scu.h
  • XMC_SCU_POWER_MODE_SLEEP : xmc4_scu.h
  • XMC_SCU_POWER_MODE_t : xmc4_scu.h
  • XMC_SCU_POWER_WaitForEvent() : xmc4_scu.h
  • XMC_SCU_POWER_WaitForInterrupt() : xmc4_scu.h
  • XMC_SCU_ReadFromRetentionMemory() : xmc4_scu.h
  • XMC_SCU_ReadGPR() : xmc4_scu.h
  • XMC_SCU_RESET_AssertPeripheralReset() : xmc4_scu.h
  • XMC_SCU_RESET_ClearDeviceResetReason() : xmc_scu.h
  • XMC_SCU_RESET_DeassertPeripheralReset() : xmc4_scu.h
  • XMC_SCU_RESET_GetDeviceResetReason() : xmc_scu.h
  • XMC_SCU_RESET_IsPeripheralResetAsserted() : xmc4_scu.h
  • XMC_SCU_RESET_REASON_LOCKUP : xmc4_scu.h
  • XMC_SCU_RESET_REASON_PARITY_ERROR : xmc4_scu.h
  • XMC_SCU_RESET_REASON_PORST : xmc4_scu.h
  • XMC_SCU_RESET_REASON_PV : xmc4_scu.h
  • XMC_SCU_RESET_REASON_SW : xmc4_scu.h
  • XMC_SCU_RESET_REASON_SWD : xmc4_scu.h
  • XMC_SCU_RESET_REASON_t : xmc4_scu.h
  • XMC_SCU_RESET_REASON_WATCHDOG : xmc4_scu.h
  • XMC_SCU_SetBootMode() : xmc4_scu.h
  • XMC_SCU_SetCcuTriggerHigh() : xmc_scu.h
  • XMC_SCU_SetCcuTriggerLow() : xmc_scu.h
  • XMC_SCU_SetRawTempLimits() : xmc4_scu.h
  • XMC_SCU_StartTemperatureMeasurement() : xmc4_scu.h
  • XMC_SCU_STATUS_BUSY : xmc_scu.h
  • XMC_SCU_STATUS_ERROR : xmc_scu.h
  • XMC_SCU_STATUS_OK : xmc_scu.h
  • XMC_SCU_STATUS_t : xmc_scu.h
  • XMC_SCU_TRAP_BROWNOUT : xmc4_scu.h
  • XMC_SCU_TRAP_ClearStatus() : xmc4_scu.h
  • XMC_SCU_TRAP_Disable() : xmc4_scu.h
  • XMC_SCU_TRAP_ECAT_RESET : xmc4_scu.h
  • XMC_SCU_TRAP_Enable() : xmc4_scu.h
  • XMC_SCU_TRAP_GetStatus() : xmc4_scu.h
  • XMC_SCU_TRAP_OSC_WDG : xmc4_scu.h
  • XMC_SCU_TRAP_PARITY_ERROR : xmc4_scu.h
  • XMC_SCU_TRAP_PER_BRIDGE0 : xmc4_scu.h
  • XMC_SCU_TRAP_PER_BRIDGE1 : xmc4_scu.h
  • XMC_SCU_TRAP_t : xmc4_scu.h
  • XMC_SCU_TRAP_Trigger() : xmc4_scu.h
  • XMC_SCU_TRAP_ULP_WDG : xmc4_scu.h
  • XMC_SCU_TRAP_USB_VCO_LOCK : xmc4_scu.h
  • XMC_SCU_TRAP_VCO_LOCK : xmc4_scu.h
  • XMC_SCU_WriteGPR() : xmc4_scu.h
  • XMC_SCU_WriteToRetentionMemory() : xmc4_scu.h
  • XMC_SDMMC : xmc_sdmmc.h
  • XMC_SDMMC_ACMD12_NOT_EXEC_ERR : xmc_sdmmc.h
  • XMC_SDMMC_ACMD_CRC_ERR : xmc_sdmmc.h
  • XMC_SDMMC_ACMD_END_BIT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_ACMD_ERR : xmc_sdmmc.h
  • XMC_SDMMC_ACMD_ERR_t : xmc_sdmmc.h
  • XMC_SDMMC_ACMD_IND_ERR : xmc_sdmmc.h
  • XMC_SDMMC_ACMD_TIMEOUT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_BLOCK_GAP_EVENT : xmc_sdmmc.h
  • XMC_SDMMC_BUFFER_READ_READY : xmc_sdmmc.h
  • XMC_SDMMC_BUFFER_WRITE_READY : xmc_sdmmc.h
  • XMC_SDMMC_BUS_VOLTAGE_t : xmc_sdmmc.h
  • XMC_SDMMC_BusPowerOff() : xmc_sdmmc.h
  • XMC_SDMMC_BusPowerOn() : xmc_sdmmc.h
  • XMC_SDMMC_CARD_ERR : xmc_sdmmc.h
  • XMC_SDMMC_CARD_INS : xmc_sdmmc.h
  • XMC_SDMMC_CARD_INT : xmc_sdmmc.h
  • XMC_SDMMC_CARD_REMOVAL : xmc_sdmmc.h
  • XMC_SDMMC_CD_SOURCE_t : xmc_sdmmc.h
  • XMC_SDMMC_CD_STATUS_t : xmc_sdmmc.h
  • XMC_SDMMC_ClearEvent() : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_1 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_128 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_16 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_2 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_256 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_32 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_4 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_64 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_8 : xmc_sdmmc.h
  • XMC_SDMMC_CMD_COMPLETE : xmc_sdmmc.h
  • XMC_SDMMC_CMD_CRC_ERR : xmc_sdmmc.h
  • XMC_SDMMC_CMD_END_BIT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_CMD_IND_ERR : xmc_sdmmc.h
  • XMC_SDMMC_CMD_NOT_ISSUED_BY_ACMD12_ERR : xmc_sdmmc.h
  • XMC_SDMMC_CMD_TIMEOUT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_RESPONSE_LONG : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_RESPONSE_NONE : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_RESPONSE_SHORT : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_RESPONSE_SHORT_BUSY : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_RESPONSE_t : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_TYPE_ABORT : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_TYPE_NORMAL : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_TYPE_RESUME : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_TYPE_SUSPEND : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_TYPE_t : xmc_sdmmc.h
  • XMC_SDMMC_CURRENT_LIMIT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_14 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_15 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_16 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_17 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_18 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_19 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_20 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_21 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_22 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_23 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_24 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_25 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_26 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_27 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_t : xmc_sdmmc.h
  • XMC_SDMMC_DATA_CRC_ERR : xmc_sdmmc.h
  • XMC_SDMMC_DATA_END_BIT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_DATA_LINES_1 : xmc_sdmmc.h
  • XMC_SDMMC_DATA_LINES_4 : xmc_sdmmc.h
  • XMC_SDMMC_DATA_LINES_8 : xmc_sdmmc.h
  • XMC_SDMMC_DATA_LINES_t : xmc_sdmmc.h
  • XMC_SDMMC_DATA_TIMEOUT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_DATA_TRANSFER_CARD_TO_HOST : xmc_sdmmc.h
  • XMC_SDMMC_DATA_TRANSFER_DIR_t : xmc_sdmmc.h
  • XMC_SDMMC_Disable() : xmc_sdmmc.h
  • XMC_SDMMC_DisableDelayCmdDatLines() : xmc_sdmmc.h
  • XMC_SDMMC_DisableEvent() : xmc_sdmmc.h
  • XMC_SDMMC_DisableEventStatus() : xmc_sdmmc.h
  • XMC_SDMMC_DisableHighSpeed() : xmc_sdmmc.h
  • XMC_SDMMC_DisableInterruptAtBlockGap() : xmc_sdmmc.h
  • XMC_SDMMC_DisableWakeupEvent() : xmc_sdmmc.h
  • XMC_SDMMC_Enable() : xmc_sdmmc.h
  • XMC_SDMMC_EnableDelayCmdDatLines() : xmc_sdmmc.h
  • XMC_SDMMC_EnableEvent() : xmc_sdmmc.h
  • XMC_SDMMC_EnableEventStatus() : xmc_sdmmc.h
  • XMC_SDMMC_EnableHighSpeed() : xmc_sdmmc.h
  • XMC_SDMMC_EnableInterruptAtBlockGap() : xmc_sdmmc.h
  • XMC_SDMMC_EnableWakeupEvent() : xmc_sdmmc.h
  • XMC_SDMMC_EVENT_t : xmc_sdmmc.h
  • XMC_SDMMC_GetACMDErrStatus() : xmc_sdmmc.h
  • XMC_SDMMC_GetAutoCommandResponse() : xmc_sdmmc.h
  • XMC_SDMMC_GetClockStability() : xmc_sdmmc.h
  • XMC_SDMMC_GetCommandResponse() : xmc_sdmmc.h
  • XMC_SDMMC_GetContinueRequest() : xmc_sdmmc.h
  • XMC_SDMMC_GetEvent() : xmc_sdmmc.h
  • XMC_SDMMC_GetPowerStatus() : xmc_sdmmc.h
  • XMC_SDMMC_GetPresentState() : xmc_sdmmc.h
  • XMC_SDMMC_GetR2Response() : xmc_sdmmc.h
  • XMC_SDMMC_GetSWResetStatus() : xmc_sdmmc.h
  • XMC_SDMMC_GetTransferBlocksNum() : xmc_sdmmc.h
  • XMC_SDMMC_Init() : xmc_sdmmc.h
  • XMC_SDMMC_IsAllDataLinesHigh() : xmc_sdmmc.h
  • XMC_SDMMC_IsAnyErrorEvent() : xmc_sdmmc.h
  • XMC_SDMMC_IsCommandLineBusy() : xmc_sdmmc.h
  • XMC_SDMMC_IsDataLineBusy() : xmc_sdmmc.h
  • XMC_SDMMC_ReadFIFO() : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_NO_RESPONSE : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_R1 : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_R1b : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_R2 : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_R3 : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_R6 : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_R7 : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_t : xmc_sdmmc.h
  • XMC_SDMMC_SDCLK_FREQ_SEL_t : xmc_sdmmc.h
  • XMC_SDMMC_SDClockDisable() : xmc_sdmmc.h
  • XMC_SDMMC_SDClockEnable() : xmc_sdmmc.h
  • XMC_SDMMC_SDClockFreqSelect() : xmc_sdmmc.h
  • XMC_SDMMC_SendCommand() : xmc_sdmmc.h
  • XMC_SDMMC_SetBusVoltage() : xmc_sdmmc.h
  • XMC_SDMMC_SetCardDetectionSource() : xmc_sdmmc.h
  • XMC_SDMMC_SetCardDetectionStatus() : xmc_sdmmc.h
  • XMC_SDMMC_SetContinueRequest() : xmc_sdmmc.h
  • XMC_SDMMC_SetDataLineTimeout() : xmc_sdmmc.h
  • XMC_SDMMC_SetDataTransferDirection() : xmc_sdmmc.h
  • XMC_SDMMC_SetDataTransferMode() : xmc_sdmmc.h
  • XMC_SDMMC_SetDataTransferWidth() : xmc_sdmmc.h
  • XMC_SDMMC_SetDelay() : xmc_sdmmc.h
  • XMC_SDMMC_SetReadWaitControl() : xmc_sdmmc.h
  • XMC_SDMMC_SetStopAtBlockGap() : xmc_sdmmc.h
  • XMC_SDMMC_SetSWReset() : xmc_sdmmc.h
  • XMC_SDMMC_Start() : xmc_sdmmc.h
  • XMC_SDMMC_STATUS_CMD_LINE_BUSY : xmc_sdmmc.h
  • XMC_SDMMC_STATUS_DAT_LINE_BUSY : xmc_sdmmc.h
  • XMC_SDMMC_STATUS_SUCCESS : xmc_sdmmc.h
  • XMC_SDMMC_STATUS_t : xmc_sdmmc.h
  • XMC_SDMMC_Stop() : xmc_sdmmc.h
  • XMC_SDMMC_SW_RESET_ALL : xmc_sdmmc.h
  • XMC_SDMMC_SW_RESET_t : xmc_sdmmc.h
  • XMC_SDMMC_SW_RST_CMD_LINE : xmc_sdmmc.h
  • XMC_SDMMC_SW_RST_DAT_LINE : xmc_sdmmc.h
  • XMC_SDMMC_TARGET_RESP_ERR : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_AUTO_CMD_12 : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_AUTO_CMD_DISABLED : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_AUTO_CMD_t : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_TYPE_INFINITE : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_TYPE_MULTIPLE : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_TYPE_SINGLE : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_TYPE_STOP_MULTIPLE : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_TYPE_t : xmc_sdmmc.h
  • XMC_SDMMC_TriggerACMDErr() : xmc_sdmmc.h
  • XMC_SDMMC_TriggerEvent() : xmc_sdmmc.h
  • XMC_SDMMC_TX_COMPLETE : xmc_sdmmc.h
  • XMC_SDMMC_WAKEUP_EN_CARD_INS : xmc_sdmmc.h
  • XMC_SDMMC_WAKEUP_EN_CARD_INT : xmc_sdmmc.h
  • XMC_SDMMC_WAKEUP_EN_CARD_REM : xmc_sdmmc.h
  • XMC_SDMMC_WAKEUP_EVENT_t : xmc_sdmmc.h
  • XMC_SDMMC_WriteFIFO() : xmc_sdmmc.h
  • XMC_SPI0_CH0 : xmc_spi.h
  • XMC_SPI0_CH1 : xmc_spi.h
  • XMC_SPI1_CH0 : xmc_spi.h
  • XMC_SPI1_CH1 : xmc_spi.h
  • XMC_SPI2_CH0 : xmc_spi.h
  • XMC_SPI2_CH1 : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t : xmc_spi.h
  • XMC_SPI_CH_BUS_MODE_MASTER : xmc_spi.h
  • XMC_SPI_CH_BUS_MODE_SLAVE : xmc_spi.h
  • XMC_SPI_CH_BUS_MODE_t : xmc_spi.h
  • XMC_SPI_CH_ClearStatusFlag() : xmc_spi.h
  • XMC_SPI_CH_ConfigExternalInputSignalToBRG() : xmc_spi.h
  • XMC_SPI_CH_ConfigureShiftClockOutput() : xmc_spi.h
  • XMC_SPI_CH_DATA_POLARITY_DIRECT : xmc_spi.h
  • XMC_SPI_CH_DATA_POLARITY_INVERT : xmc_spi.h
  • XMC_SPI_CH_DATA_POLARITY_t : xmc_spi.h
  • XMC_SPI_CH_DisableDataTransmission() : xmc_spi.h
  • XMC_SPI_CH_DisableDelayCompensation() : xmc_spi.h
  • XMC_SPI_CH_DisableEOF() : xmc_spi.h
  • XMC_SPI_CH_DisableEvent() : xmc_spi.h
  • XMC_SPI_CH_DisableFEM() : xmc_spi.h
  • XMC_SPI_CH_DisableInputInversion() : xmc_spi.h
  • XMC_SPI_CH_DisableInterwordDelay() : xmc_spi.h
  • XMC_SPI_CH_DisableMasterClock() : xmc_spi.h
  • XMC_SPI_CH_DisableSlaveSelect() : xmc_spi.h
  • XMC_SPI_CH_DisableSlaveSelectCodedMode() : xmc_spi.h
  • XMC_SPI_CH_DisableSOF() : xmc_spi.h
  • XMC_SPI_CH_EnableDataTransmission() : xmc_spi.h
  • XMC_SPI_CH_EnableDelayCompensation() : xmc_spi.h
  • XMC_SPI_CH_EnableEOF() : xmc_spi.h
  • XMC_SPI_CH_EnableEvent() : xmc_spi.h
  • XMC_SPI_CH_EnableFEM() : xmc_spi.h
  • XMC_SPI_CH_EnableInputInversion() : xmc_spi.h
  • XMC_SPI_CH_EnableInterwordDelay() : xmc_spi.h
  • XMC_SPI_CH_EnableMasterClock() : xmc_spi.h
  • XMC_SPI_CH_EnableSlaveSelect() : xmc_spi.h
  • XMC_SPI_CH_EnableSlaveSelectCodedMode() : xmc_spi.h
  • XMC_SPI_CH_EnableSOF() : xmc_spi.h
  • XMC_SPI_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_EVENT_BAUD_RATE_GENERATOR : xmc_spi.h
  • XMC_SPI_CH_EVENT_DATA_LOST : xmc_spi.h
  • XMC_SPI_CH_EVENT_DX2TIEN_ACTIVATED : xmc_spi.h
  • XMC_SPI_CH_EVENT_MSLS_CHANGE : xmc_spi.h
  • XMC_SPI_CH_EVENT_PARITY_ERROR : xmc_spi.h
  • XMC_SPI_CH_EVENT_RECEIVE_START : xmc_spi.h
  • XMC_SPI_CH_EVENT_STANDARD_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_EVENT_t : xmc_spi.h
  • XMC_SPI_CH_EVENT_TRANSMIT_BUFFER : xmc_spi.h
  • XMC_SPI_CH_EVENT_TRANSMIT_SHIFT : xmc_spi.h
  • XMC_SPI_CH_GetReceivedData() : xmc_spi.h
  • XMC_SPI_CH_GetStatusFlag() : xmc_spi.h
  • XMC_SPI_CH_Init() : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN0 : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN1 : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN2 : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN3 : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FMCLK : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FPDIV : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FPPP : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FSCLK : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_t : xmc_spi.h
  • XMC_SPI_CH_INPUT_SLAVE_SCLKIN : xmc_spi.h
  • XMC_SPI_CH_INPUT_SLAVE_SELIN : xmc_spi.h
  • XMC_SPI_CH_INPUT_t : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_t : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_spi.h
  • XMC_SPI_CH_MODE_DUAL : xmc_spi.h
  • XMC_SPI_CH_MODE_QUAD : xmc_spi.h
  • XMC_SPI_CH_MODE_STANDARD : xmc_spi.h
  • XMC_SPI_CH_MODE_STANDARD_HALFDUPLEX : xmc_spi.h
  • XMC_SPI_CH_MODE_t : xmc_spi.h
  • XMC_SPI_CH_Receive() : xmc_spi.h
  • XMC_SPI_CH_SelectInterruptNodePointer() : xmc_spi.h
  • XMC_SPI_CH_SetBaudrate() : xmc_spi.h
  • XMC_SPI_CH_SetBitOrderLsbFirst() : xmc_spi.h
  • XMC_SPI_CH_SetBitOrderMsbFirst() : xmc_spi.h
  • XMC_SPI_CH_SetFrameLength() : xmc_spi.h
  • XMC_SPI_CH_SetInputSource() : xmc_spi.h
  • XMC_SPI_CH_SetInterruptNodePointer() : xmc_spi.h
  • XMC_SPI_CH_SetInterwordDelay() : xmc_spi.h
  • XMC_SPI_CH_SetInterwordDelaySCLK() : xmc_spi.h
  • XMC_SPI_CH_SetSlaveSelectDelay() : xmc_spi.h
  • XMC_SPI_CH_SetSlaveSelectPolarity() : xmc_spi.h
  • XMC_SPI_CH_SetTransmitMode() : xmc_spi.h
  • XMC_SPI_CH_SetWordLength() : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SEL_INV_TO_MSLS : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SEL_SAME_AS_MSLS : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_0 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_1 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_2 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_3 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_4 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_5 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_6 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_7 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_t : xmc_spi.h
  • XMC_SPI_CH_Start() : xmc_spi.h
  • XMC_SPI_CH_STATUS_BUSY : xmc_spi.h
  • XMC_SPI_CH_STATUS_ERROR : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_DX2S : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_DX2T_EVENT_DETECTED : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_MSLS : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_MSLS_EVENT_DETECTED : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_PARITY_ERROR_EVENT_DETECTED : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_t : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_OK : xmc_spi.h
  • XMC_SPI_CH_STATUS_t : xmc_spi.h
  • XMC_SPI_CH_Stop() : xmc_spi.h
  • XMC_SPI_CH_Transmit() : xmc_spi.h
  • XMC_SPI_CH_TriggerServiceRequest() : xmc_spi.h
  • XMC_UART0_CH0 : xmc_uart.h
  • XMC_UART0_CH1 : xmc_uart.h
  • XMC_UART1_CH0 : xmc_uart.h
  • XMC_UART1_CH1 : xmc_uart.h
  • XMC_UART2_CH0 : xmc_uart.h
  • XMC_UART2_CH1 : xmc_uart.h
  • XMC_UART_CH_ClearStatusFlag() : xmc_uart.h
  • XMC_UART_CH_DisableDataTransmission() : xmc_uart.h
  • XMC_UART_CH_DisableEvent() : xmc_uart.h
  • XMC_UART_CH_DisableInputDigitalFilter() : xmc_uart.h
  • XMC_UART_CH_DisableInputInversion() : xmc_uart.h
  • XMC_UART_CH_DisableInputSync() : xmc_uart.h
  • XMC_UART_CH_EnableDataTransmission() : xmc_uart.h
  • XMC_UART_CH_EnableEvent() : xmc_uart.h
  • XMC_UART_CH_EnableInputDigitalFilter() : xmc_uart.h
  • XMC_UART_CH_EnableInputInversion() : xmc_uart.h
  • XMC_UART_CH_EnableInputSync() : xmc_uart.h
  • XMC_UART_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_uart.h
  • XMC_UART_CH_EVENT_BAUD_RATE_GENERATOR : xmc_uart.h
  • XMC_UART_CH_EVENT_COLLISION : xmc_uart.h
  • XMC_UART_CH_EVENT_DATA_LOST : xmc_uart.h
  • XMC_UART_CH_EVENT_FORMAT_ERROR : xmc_uart.h
  • XMC_UART_CH_EVENT_FRAME_FINISHED : xmc_uart.h
  • XMC_UART_CH_EVENT_RECEIVE_START : xmc_uart.h
  • XMC_UART_CH_EVENT_RECEIVER_NOISE : xmc_uart.h
  • XMC_UART_CH_EVENT_STANDARD_RECEIVE : xmc_uart.h
  • XMC_UART_CH_EVENT_SYNCHRONIZATION_BREAK : xmc_uart.h
  • XMC_UART_CH_EVENT_t : xmc_uart.h
  • XMC_UART_CH_EVENT_TRANSMIT_BUFFER : xmc_uart.h
  • XMC_UART_CH_EVENT_TRANSMIT_SHIFT : xmc_uart.h
  • XMC_UART_CH_GetReceivedData() : xmc_uart.h
  • XMC_UART_CH_GetStatusFlag() : xmc_uart.h
  • XMC_UART_CH_Init() : xmc_uart.h
  • XMC_UART_CH_INPUT_RXD : xmc_uart.h
  • XMC_UART_CH_INPUT_RXD1 : xmc_uart.h
  • XMC_UART_CH_INPUT_RXD2 : xmc_uart.h
  • XMC_UART_CH_INPUT_SAMPLING_FREQ_FPERIPH : xmc_uart.h
  • XMC_UART_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER : xmc_uart.h
  • XMC_UART_CH_INPUT_SAMPLING_FREQ_t : xmc_uart.h
  • XMC_UART_CH_INPUT_t : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_t : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_uart.h
  • XMC_UART_CH_SelectInterruptNodePointer() : xmc_uart.h
  • XMC_UART_CH_SetBaudrate() : xmc_uart.h
  • XMC_UART_CH_SetFrameLength() : xmc_uart.h
  • XMC_UART_CH_SetInputSamplingFreq() : xmc_uart.h
  • XMC_UART_CH_SetInputSource() : xmc_uart.h
  • XMC_UART_CH_SetInterruptNodePointer() : xmc_uart.h
  • XMC_UART_CH_SetPulseLength() : xmc_uart.h
  • XMC_UART_CH_SetSamplePoint() : xmc_uart.h
  • XMC_UART_CH_SetWordLength() : xmc_uart.h
  • XMC_UART_CH_Start() : xmc_uart.h
  • XMC_UART_CH_STATUS_BUSY : xmc_uart.h
  • XMC_UART_CH_STATUS_ERROR : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_COLLISION_DETECTED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_FORMAT_ERROR_IN_STOP_BIT_0 : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_FORMAT_ERROR_IN_STOP_BIT_1 : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVE_FRAME_FINISHED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVER_NOISE_DETECTED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEPTION_IDLE : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_SYNCHRONIZATION_BREAK_DETECTED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_t : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSFER_STATUS_BUSY : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMISSION_IDLE : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMITTER_FRAME_FINISHED : xmc_uart.h
  • XMC_UART_CH_STATUS_OK : xmc_uart.h
  • XMC_UART_CH_STATUS_t : xmc_uart.h
  • XMC_UART_CH_Stop() : xmc_uart.h
  • XMC_UART_CH_Transmit() : xmc_uart.h
  • XMC_UART_CH_TriggerServiceRequest() : xmc_uart.h
  • XMC_USB_DRIVE_PORT1 : xmc_usbh.h
  • XMC_USB_DRIVE_PORT2 : xmc_usbh.h
  • XMC_USBD_ClearEvent() : xmc_usbd.h
  • XMC_USBD_ClearEventINEP() : xmc_usbd.h
  • XMC_USBD_ClearEventOUTEP() : xmc_usbd.h
  • XMC_USBD_DeviceConnect() : xmc_usbd.h
  • XMC_USBD_DeviceDisconnect() : xmc_usbd.h
  • XMC_USBD_DeviceGetState() : xmc_usbd.h
  • XMC_USBD_DeviceSetAddress() : xmc_usbd.h
  • XMC_USBD_Disable() : xmc_usbd.h
  • XMC_USBD_Enable() : xmc_usbd.h
  • XMC_USBD_EnableEventINEP() : xmc_usbd.h
  • XMC_USBD_EnableEventOUTEP() : xmc_usbd.h
  • XMC_USBD_ENDPOINT_DIRECTION_MASK : xmc_usbd.h
  • XMC_USBD_ENDPOINT_MAX_PACKET_SIZE_MASK : xmc_usbd.h
  • XMC_USBD_ENDPOINT_NUMBER_MASK : xmc_usbd.h
  • XMC_USBD_ENDPOINT_TYPE_BULK : xmc_usbd.h
  • XMC_USBD_ENDPOINT_TYPE_CONTROL : xmc_usbd.h
  • XMC_USBD_ENDPOINT_TYPE_INTERRUPT : xmc_usbd.h
  • XMC_USBD_ENDPOINT_TYPE_ISOCHRONOUS : xmc_usbd.h
  • XMC_USBD_ENDPOINT_TYPE_t : xmc_usbd.h
  • XMC_USBD_EndpointAbort() : xmc_usbd.h
  • XMC_USBD_EndpointConfigure() : xmc_usbd.h
  • XMC_USBD_EndpointRead() : xmc_usbd.h
  • XMC_USBD_EndpointReadStart() : xmc_usbd.h
  • XMC_USBD_EndpointStall() : xmc_usbd.h
  • XMC_USBD_EndpointUnconfigure() : xmc_usbd.h
  • XMC_USBD_EndpointWrite() : xmc_usbd.h
  • XMC_USBD_EP_DIR_MASK : xmc_usbd.h
  • XMC_USBD_EP_EVENT_IN : xmc_usbd.h
  • XMC_USBD_EP_EVENT_OUT : xmc_usbd.h
  • XMC_USBD_EP_EVENT_SETUP : xmc_usbd.h
  • XMC_USBD_EP_EVENT_t : xmc_usbd.h
  • XMC_USBD_EP_NUM_MASK : xmc_usbd.h
  • XMC_USBD_EVENT_CONNECT : xmc_usbd.h
  • XMC_USBD_EVENT_DISCONNECT : xmc_usbd.h
  • XMC_USBD_EVENT_EARLYSUSPEND : xmc_usbd.h
  • XMC_USBD_EVENT_ENUMDONE : xmc_usbd.h
  • XMC_USBD_EVENT_ENUMNOTDONE : xmc_usbd.h
  • XMC_USBD_EVENT_HIGH_SPEED : xmc_usbd.h
  • XMC_USBD_EVENT_IN_EP_AHB_ERROR : xmc_usbd.h
  • XMC_USBD_EVENT_IN_EP_DISABLED : xmc_usbd.h
  • XMC_USBD_EVENT_IN_EP_t : xmc_usbd.h
  • XMC_USBD_EVENT_IN_EP_TIMEOUT : xmc_usbd.h
  • XMC_USBD_EVENT_IN_EP_TX_COMPLET : xmc_usbd.h
  • XMC_USBD_EVENT_INEP : xmc_usbd.h
  • XMC_USBD_EVENT_OUT_EP_AHB_ERROR : xmc_usbd.h
  • XMC_USBD_EVENT_OUT_EP_DISABLED : xmc_usbd.h
  • XMC_USBD_EVENT_OUT_EP_SETUP : xmc_usbd.h
  • XMC_USBD_EVENT_OUT_EP_t : xmc_usbd.h
  • XMC_USBD_EVENT_OUT_EP_TX_COMPLET : xmc_usbd.h
  • XMC_USBD_EVENT_OUTEP : xmc_usbd.h
  • XMC_USBD_EVENT_POWER_OFF : xmc_usbd.h
  • XMC_USBD_EVENT_POWER_ON : xmc_usbd.h
  • XMC_USBD_EVENT_REMOTE_WAKEUP : xmc_usbd.h
  • XMC_USBD_EVENT_RESET : xmc_usbd.h
  • XMC_USBD_EVENT_RESUME : xmc_usbd.h
  • XMC_USBD_EVENT_SOF : xmc_usbd.h
  • XMC_USBD_EVENT_SUSPEND : xmc_usbd.h
  • XMC_USBD_EVENT_t : xmc_usbd.h
  • XMC_USBD_GetCapabilities() : xmc_usbd.h
  • XMC_USBD_GetFrameNumber() : xmc_usbd.h
  • XMC_USBD_GRXSTS_PKTSTS_GOUTNAK : xmc_usbd.h
  • XMC_USBD_GRXSTS_PKTSTS_OUTCMPL : xmc_usbd.h
  • XMC_USBD_GRXSTS_PKTSTS_OUTDATA : xmc_usbd.h
  • XMC_USBD_GRXSTS_PKTSTS_SETUP : xmc_usbd.h
  • XMC_USBD_GRXSTS_PKTSTS_SETUPCMPL : xmc_usbd.h
  • XMC_USBD_GRXSTS_PKTSTS_t : xmc_usbd.h
  • XMC_USBD_Init() : xmc_usbd.h
  • XMC_USBD_IRQHandler() : xmc_usbd.h
  • XMC_USBD_IsEnumDone() : xmc_usbd.h
  • XMC_USBD_MAX_FIFO_SIZE : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_1 : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_2 : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_3 : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_4 : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_5 : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_6 : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_7 : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_t : xmc_usbd.h
  • XMC_USBD_MAX_PACKET_SIZE : xmc_usbd.h
  • XMC_USBD_MAX_TRANSFER_SIZE_EP0 : xmc_usbd.h
  • XMC_USBD_NUM_EPS : xmc_usbd.h
  • XMC_USBD_NUM_TX_FIFOS : xmc_usbd.h
  • XMC_USBD_SET_ADDRESS_STAGE_SETUP : xmc_usbd.h
  • XMC_USBD_SET_ADDRESS_STAGE_STATUS : xmc_usbd.h
  • XMC_USBD_SET_ADDRESS_STAGE_t : xmc_usbd.h
  • XMC_USBD_SETUP_COUNT : xmc_usbd.h
  • XMC_USBD_SETUP_SIZE : xmc_usbd.h
  • XMC_USBD_SignalDeviceEvent_t : xmc_usbd.h
  • XMC_USBD_SignalEndpointEvent_t : xmc_usbd.h
  • XMC_USBD_SPEED_FULL : xmc_usbd.h
  • XMC_USBD_STATUS_BUSY : xmc_usbd.h
  • XMC_USBD_STATUS_ERROR : xmc_usbd.h
  • XMC_USBD_STATUS_OK : xmc_usbd.h
  • XMC_USBD_STATUS_t : xmc_usbd.h
  • XMC_USBD_TRANSFER_MODE_t : xmc_usbd.h
  • XMC_USBD_Uninitialize() : xmc_usbd.h
  • XMC_USBD_USE_DMA : xmc_usbd.h
  • XMC_USBD_USE_FIFO : xmc_usbd.h
  • XMC_USBH_API_VERSION : xmc_usbh.h
  • XMC_USBH_CLOCK_GATING_DISABLE : xmc_usbh.h
  • XMC_USBH_CLOCK_GATING_ENABLE : xmc_usbh.h
  • XMC_USBH_DRIVER_ERROR : xmc_usbh.h
  • XMC_USBH_DRIVER_ERROR_BUSY : xmc_usbh.h
  • XMC_USBH_DRIVER_ERROR_PARAMETER : xmc_usbh.h
  • XMC_USBH_DRIVER_ERROR_SPECIFIC : xmc_usbh.h
  • XMC_USBH_DRIVER_ERROR_TIMEOUT : xmc_usbh.h
  • XMC_USBH_DRIVER_ERROR_UNSUPPORTED : xmc_usbh.h
  • XMC_USBH_DRIVER_OK : xmc_usbh.h
  • XMC_USBH_ENDPOINT_BULK : xmc_usbh.h
  • XMC_USBH_ENDPOINT_CONTROL : xmc_usbh.h
  • XMC_USBH_ENDPOINT_INTERRUPT : xmc_usbh.h
  • XMC_USBH_ENDPOINT_ISOCHRONOUS : xmc_usbh.h
  • XMC_USBH_EP_HANDLE : xmc_usbh.h
  • XMC_USBH_EVENT_BUS_ERROR : xmc_usbh.h
  • XMC_USBH_EVENT_CONNECT : xmc_usbh.h
  • XMC_USBH_EVENT_DISCONNECT : xmc_usbh.h
  • XMC_USBH_EVENT_HANDSHAKE_ERR : xmc_usbh.h
  • XMC_USBH_EVENT_HANDSHAKE_MDATA : xmc_usbh.h
  • XMC_USBH_EVENT_HANDSHAKE_NAK : xmc_usbh.h
  • XMC_USBH_EVENT_HANDSHAKE_NYET : xmc_usbh.h
  • XMC_USBH_EVENT_HANDSHAKE_STALL : xmc_usbh.h
  • XMC_USBH_EVENT_OVERCURRENT : xmc_usbh.h
  • XMC_USBH_EVENT_REMOTE_WAKEUP : xmc_usbh.h
  • XMC_USBH_EVENT_RESET : xmc_usbh.h
  • XMC_USBH_EVENT_RESUME : xmc_usbh.h
  • XMC_USBH_EVENT_SUSPEND : xmc_usbh.h
  • XMC_USBH_EVENT_TRANSFER_COMPLETE : xmc_usbh.h
  • XMC_USBH_GetInterruptStatus() : xmc_usbh.h
  • XMC_USBH_HandleIrq() : xmc_usbh.h
  • XMC_USBH_osDelay() : xmc_usbh.h
  • XMC_USBH_PACKET_CSPLIT : xmc_usbh.h
  • XMC_USBH_PACKET_DATA0 : xmc_usbh.h
  • XMC_USBH_PACKET_DATA1 : xmc_usbh.h
  • XMC_USBH_PACKET_DATA_Msk : xmc_usbh.h
  • XMC_USBH_PACKET_DATA_Pos : xmc_usbh.h
  • XMC_USBH_PACKET_IN : xmc_usbh.h
  • XMC_USBH_PACKET_OUT : xmc_usbh.h
  • XMC_USBH_PACKET_PING : xmc_usbh.h
  • XMC_USBH_PACKET_PRE : xmc_usbh.h
  • XMC_USBH_PACKET_SETUP : xmc_usbh.h
  • XMC_USBH_PACKET_SSPLIT : xmc_usbh.h
  • XMC_USBH_PACKET_SSPLIT_E : xmc_usbh.h
  • XMC_USBH_PACKET_SSPLIT_S : xmc_usbh.h
  • XMC_USBH_PACKET_SSPLIT_S_E : xmc_usbh.h
  • XMC_USBH_PACKET_TOKEN_Msk : xmc_usbh.h
  • XMC_USBH_PACKET_TOKEN_Pos : xmc_usbh.h
  • XMC_USBH_PIPE_HANDLE : xmc_usbh.h
  • XMC_USBH_POWER_FULL : xmc_usbh.h
  • XMC_USBH_POWER_LOW : xmc_usbh.h
  • XMC_USBH_POWER_OFF : xmc_usbh.h
  • XMC_USBH_POWER_STATE_t : xmc_usbh.h
  • XMC_USBH_Select_VBUS() : xmc_usbh.h
  • XMC_USBH_SignalEndpointEvent_t : xmc_usbh.h
  • XMC_USBH_SignalPipeEvent_t : xmc_usbh.h
  • XMC_USBH_SignalPortEvent_t : xmc_usbh.h
  • XMC_USBH_SPEED_FULL : xmc_usbh.h
  • XMC_USBH_SPEED_HIGH : xmc_usbh.h
  • XMC_USBH_SPEED_LOW : xmc_usbh.h
  • XMC_USBH_TurnOffResumeBit() : xmc_usbh.h
  • XMC_USIC0 : xmc_usic.h
  • XMC_USIC0_CH0 : xmc_usic.h
  • XMC_USIC0_CH1 : xmc_usic.h
  • XMC_USIC1 : xmc_usic.h
  • XMC_USIC1_CH0 : xmc_usic.h
  • XMC_USIC1_CH1 : xmc_usic.h
  • XMC_USIC2 : xmc_usic.h
  • XMC_USIC2_CH0 : xmc_usic.h
  • XMC_USIC2_CH1 : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_DISABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_FRACTIONAL : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_NORMAL : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_SOURCE_DIVIDER : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_SOURCE_DX1T : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_SOURCE_t : xmc_usic.h
  • XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_0 : xmc_usic.h
  • XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_1 : xmc_usic.h
  • XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_t : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_t : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_ENABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t : xmc_usic.h
  • XMC_USIC_CH_ConfigExternalInputSignalToBRG() : xmc_usic.h
  • XMC_USIC_CH_ConfigureShiftClockOutput() : xmc_usic.h
  • XMC_USIC_CH_ConnectInputDataShiftToDataInput() : xmc_usic.h
  • XMC_USIC_CH_ConnectInputDataShiftToPPP() : xmc_usic.h
  • XMC_USIC_CH_DATA_OUTPUT_MODE_INVERTED : xmc_usic.h
  • XMC_USIC_CH_DATA_OUTPUT_MODE_NORMAL : xmc_usic.h
  • XMC_USIC_CH_DATA_OUTPUT_MODE_t : xmc_usic.h
  • XMC_USIC_CH_Disable() : xmc_usic.h
  • XMC_USIC_CH_DisableDelayCompensation() : xmc_usic.h
  • XMC_USIC_CH_DisableEvent() : xmc_usic.h
  • XMC_USIC_CH_DisableFrameLengthControl() : xmc_usic.h
  • XMC_USIC_CH_DisableInputDigitalFilter() : xmc_usic.h
  • XMC_USIC_CH_DisableInputInversion() : xmc_usic.h
  • XMC_USIC_CH_DisableInputSync() : xmc_usic.h
  • XMC_USIC_CH_DisableTBUFDataValidTrigger() : xmc_usic.h
  • XMC_USIC_CH_DisableTimeMeasurement() : xmc_usic.h
  • XMC_USIC_CH_Enable() : xmc_usic.h
  • XMC_USIC_CH_EnableDelayCompensation() : xmc_usic.h
  • XMC_USIC_CH_EnableEvent() : xmc_usic.h
  • XMC_USIC_CH_EnableFrameLengthControl() : xmc_usic.h
  • XMC_USIC_CH_EnableInputDigitalFilter() : xmc_usic.h
  • XMC_USIC_CH_EnableInputInversion() : xmc_usic.h
  • XMC_USIC_CH_EnableInputSync() : xmc_usic.h
  • XMC_USIC_CH_EnableTBUFDataValidTrigger() : xmc_usic.h
  • XMC_USIC_CH_EnableTimeMeasurement() : xmc_usic.h
  • XMC_USIC_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_EVENT_BAUD_RATE_GENERATOR : xmc_usic.h
  • XMC_USIC_CH_EVENT_DATA_LOST : xmc_usic.h
  • XMC_USIC_CH_EVENT_RECEIVE_START : xmc_usic.h
  • XMC_USIC_CH_EVENT_STANDARD_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_EVENT_t : xmc_usic.h
  • XMC_USIC_CH_EVENT_TRANSMIT_BUFFER : xmc_usic.h
  • XMC_USIC_CH_EVENT_TRANSMIT_SHIFT : xmc_usic.h
  • XMC_USIC_CH_FIFO_DISABLED : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_16WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_2WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_32WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_4WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_64WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_8WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_t : xmc_usic.h
  • XMC_USIC_CH_GetCaptureTimerValue() : xmc_usic.h
  • XMC_USIC_CH_GetReceiveBufferStatus() : xmc_usic.h
  • XMC_USIC_CH_GetTransmitBufferStatus() : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_BOTH_EDGES : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_FALLING_EDGE : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_RISING_EDGE : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_t : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_TRIGGER_DISABLED : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX0 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX1 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX2 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX3 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX4 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX5 : xmc_usic.h
  • XMC_USIC_CH_INPUT_SAMPLING_FREQ_FPERIPH : xmc_usic.h
  • XMC_USIC_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER : xmc_usic.h
  • XMC_USIC_CH_INPUT_SAMPLING_FREQ_t : xmc_usic.h
  • XMC_USIC_CH_INPUT_t : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_t : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_RUN_0 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_RUN_1 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_STOP_0 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_STOP_1 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_t : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_I2C : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_I2S : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_IDLE : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_SPI : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_t : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_UART : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_EVEN : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_NONE : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_ODD : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_t : xmc_usic.h
  • XMC_USIC_CH_PASSIVE_DATA_LEVEL0 : xmc_usic.h
  • XMC_USIC_CH_PASSIVE_DATA_LEVEL1 : xmc_usic.h
  • XMC_USIC_CH_PASSIVE_DATA_LEVEL_t : xmc_usic.h
  • XMC_USIC_CH_RBUF_STATUS_DATA_VALID0 : xmc_usic.h
  • XMC_USIC_CH_RBUF_STATUS_DATA_VALID1 : xmc_usic.h
  • XMC_USIC_CH_RBUF_STATUS_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_ClearEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_Configure() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_DisableEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EnableEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_ERROR : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_STANDARD : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_ERROR : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_STANDARD : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_Flush() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_GetData() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_GetEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_GetLevel() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_STANDARD : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_IsEmpty() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_IsFull() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_SetInterruptNodePointer() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit() : xmc_usic.h
  • XMC_USIC_CH_SetBaudrate() : xmc_usic.h
  • XMC_USIC_CH_SetBRGInputClockSource() : xmc_usic.h
  • XMC_USIC_CH_SetDataOutputMode() : xmc_usic.h
  • XMC_USIC_CH_SetFractionalDivider() : xmc_usic.h
  • XMC_USIC_CH_SetFrameLength() : xmc_usic.h
  • XMC_USIC_CH_SetInputSamplingFreq() : xmc_usic.h
  • XMC_USIC_CH_SetInputSource() : xmc_usic.h
  • XMC_USIC_CH_SetInputTriggerCombinationMode() : xmc_usic.h
  • XMC_USIC_CH_SetInterruptNodePointer() : xmc_usic.h
  • XMC_USIC_CH_SetMclkOutputPassiveLevel() : xmc_usic.h
  • XMC_USIC_CH_SetMode() : xmc_usic.h
  • XMC_USIC_CH_SetPassiveDataLevel() : xmc_usic.h
  • XMC_USIC_CH_SetShiftDirection() : xmc_usic.h
  • XMC_USIC_CH_SetStartTransmisionMode() : xmc_usic.h
  • XMC_USIC_CH_SetTransmitBufferStatus() : xmc_usic.h
  • XMC_USIC_CH_SetWordLength() : xmc_usic.h
  • XMC_USIC_CH_SHIFT_DIRECTION_LSB_FIRST : xmc_usic.h
  • XMC_USIC_CH_SHIFT_DIRECTION_MSB_FIRST : xmc_usic.h
  • XMC_USIC_CH_SHIFT_DIRECTION_t : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_DISABLED : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_MODE_t : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_ON_TDV : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_0 : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_1 : xmc_usic.h
  • XMC_USIC_CH_STATUS_BUSY : xmc_usic.h
  • XMC_USIC_CH_STATUS_ERROR : xmc_usic.h
  • XMC_USIC_CH_STATUS_OK : xmc_usic.h
  • XMC_USIC_CH_STATUS_t : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_BUSY : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_IDLE : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_SET_BUSY : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_SET_IDLE : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_SET_t : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_t : xmc_usic.h
  • XMC_USIC_CH_TriggerServiceRequest() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_ClearEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_Configure() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_DisableEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EnableEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_CONF_ERROR : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_CONF_STANDARD : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_CONF_t : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_ERROR : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_STANDARD : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_t : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_Flush() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_GetEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_GetLevel() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_STANDARD : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_t : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_IsEmpty() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_IsFull() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_PutData() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_PutDataFLEMode() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_PutDataHPCMode() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_SetInterruptNodePointer() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit() : xmc_usic.h
  • XMC_USIC_CH_WriteToTBUF() : xmc_usic.h
  • XMC_USIC_CH_WriteToTBUFTCI() : xmc_usic.h
  • XMC_USIC_Disable() : xmc_usic.h
  • XMC_USIC_Enable() : xmc_usic.h
  • XMC_USIC_IsChannelValid() : xmc_usic.h
  • XMC_USIC_IsModuleValid() : xmc_usic.h
  • XMC_USIC_t : xmc_usic.h
  • XMC_VADC_BACKGROUND_CONFIG_t : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_0 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_1 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_2 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_3 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_0 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_1 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_2 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_3 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_t : xmc_vadc.h
  • XMC_VADC_BOUNDARY_SELECT_LOWER_BOUND : xmc_vadc.h
  • XMC_VADC_BOUNDARY_SELECT_t : xmc_vadc.h
  • XMC_VADC_BOUNDARY_SELECT_UPPER_BOUND : xmc_vadc.h
  • XMC_VADC_CHANNEL_ALIAS_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_CONDITION_ABOVE_BAND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_CONDITION_BELOW_BAND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BWDCH_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BWDCH_VAGND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BWDCH_VAREF : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GROUP_CLASS0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GROUP_CLASS1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_ALWAYS : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_COMPHIGH : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_COMPLOW : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_INBOUND : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_NEVER : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_OUTBOUND : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_REF_ALT_CH0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_REF_INTREF : xmc_vadc.h
  • XMC_VADC_CHANNEL_REF_t : xmc_vadc.h
  • XMC_VADC_CONVMODE_10BIT : xmc_vadc.h
  • XMC_VADC_CONVMODE_12BIT : xmc_vadc.h
  • XMC_VADC_CONVMODE_8BIT : xmc_vadc.h
  • XMC_VADC_CONVMODE_FASTCOMPARE : xmc_vadc.h
  • XMC_VADC_CONVMODE_t : xmc_vadc.h
  • XMC_VADC_DMM_DIFFERENCE_MODE : xmc_vadc.h
  • XMC_VADC_DMM_FILTERING_MODE : xmc_vadc.h
  • XMC_VADC_DMM_REDUCTION_MODE : xmc_vadc.h
  • XMC_VADC_DMM_t : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_HIGH : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_LOW : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_t : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_UNKNOWN : xmc_vadc.h
  • XMC_VADC_GATE_INPUT_SELECT_t : xmc_vadc.h
  • XMC_VADC_GATEMODE_ACTIVEHIGH : xmc_vadc.h
  • XMC_VADC_GATEMODE_ACTIVELOW : xmc_vadc.h
  • XMC_VADC_GATEMODE_BLOCK : xmc_vadc.h
  • XMC_VADC_GATEMODE_IGNORE : xmc_vadc.h
  • XMC_VADC_GATEMODE_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgndAddMultipleChannels() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgndRemoveMultipleChannels() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundAbortSequence() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundAddChannelToSequence() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundClearReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundDisableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundDisableEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundEnableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundEnableEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundGetReqSrcEventStatus() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundIsChannelPending() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundRemoveChannelFromSequence() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSelectGating() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSelectTrigger() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSetGatingMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundTriggerConversion() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundTriggerReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BindGroupToEMux() : xmc_vadc.h
  • XMC_VADC_GLOBAL_ClearEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_ClockInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableModule() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableModuleClock() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisablePostCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableSleepMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableStartupCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnableModule() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnableModuleClock() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnablePostCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnableSleepMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EVENT_BKGNDSOURCE : xmc_vadc.h
  • XMC_VADC_GLOBAL_EVENT_RESULT : xmc_vadc.h
  • XMC_VADC_GLOBAL_EVENT_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_GetCompareResult() : xmc_vadc.h
  • XMC_VADC_GLOBAL_GetDetailedResult() : xmc_vadc.h
  • XMC_VADC_GLOBAL_GetResult() : xmc_vadc.h
  • XMC_VADC_GLOBAL_Init() : xmc_vadc.h
  • XMC_VADC_GLOBAL_InputClassInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_ResultInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetBoundaries() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetCompareValue() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetIndividualBoundary() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetResultEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_StartupCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_TriggerEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_AddResultToFifo() : xmc_vadc.h
  • XMC_VADC_GROUP_ARBMODE_ALWAYS : xmc_vadc.h
  • XMC_VADC_GROUP_ARBMODE_ONDEMAND : xmc_vadc.h
  • XMC_VADC_GROUP_ARBMODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_BackgroundDisableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_BackgroundEnableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_DISABLED : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED_ACTIVE_HIGH : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED_ACTIVE_LOW : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelClearEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetAssertedEvents() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetInputClass() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetResultAlignment() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetResultRegister() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelInit() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelIsResultOutOfBounds() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetBoundarySelection() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetIclass() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetInputReference() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetResultRegister() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelTriggerEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelTriggerEventGenCriteria() : xmc_vadc.h
  • XMC_VADC_GROUP_CheckSlaveReadiness() : xmc_vadc.h
  • XMC_VADC_GROUP_ClearResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_CONV_EMUX : xmc_vadc.h
  • XMC_VADC_GROUP_CONV_STD : xmc_vadc.h
  • XMC_VADC_GROUP_CONV_t : xmc_vadc.h
  • XMC_VADC_GROUP_DisableChannelSyncRequest() : xmc_vadc.h
  • XMC_VADC_GROUP_DisableResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXCODE_BINARY : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXCODE_GRAY : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXCODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_SEQUENCEMODE : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_SINGLEMODE : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_STEADYMODE : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_SWCTRL : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_EnableChannelSyncRequest() : xmc_vadc.h
  • XMC_VADC_GROUP_EnableResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ExternalMuxControlInit() : xmc_vadc.h
  • XMC_VADC_GROUP_GetAlias() : xmc_vadc.h
  • XMC_VADC_GROUP_GetAssertedResultEvents() : xmc_vadc.h
  • XMC_VADC_GROUP_GetDetailedResult() : xmc_vadc.h
  • XMC_VADC_GROUP_GetFastCompareResult() : xmc_vadc.h
  • XMC_VADC_GROUP_GetInputClass() : xmc_vadc.h
  • XMC_VADC_GROUP_GetResult() : xmc_vadc.h
  • XMC_VADC_GROUP_GetResultFifoHead() : xmc_vadc.h
  • XMC_VADC_GROUP_GetResultFifoTail() : xmc_vadc.h
  • XMC_VADC_GROUP_GetSyncReadySignal() : xmc_vadc.h
  • XMC_VADC_GROUP_IgnoreSlaveReadiness() : xmc_vadc.h
  • XMC_VADC_GROUP_INDEX_t : xmc_vadc.h
  • XMC_VADC_GROUP_Init() : xmc_vadc.h
  • XMC_VADC_GROUP_InputClassInit() : xmc_vadc.h
  • XMC_VADC_GROUP_IRQ_KERNEL : xmc_vadc.h
  • XMC_VADC_GROUP_IRQ_SHARED : xmc_vadc.h
  • XMC_VADC_GROUP_IRQ_t : xmc_vadc.h
  • XMC_VADC_GROUP_IsConverterBusy() : xmc_vadc.h
  • XMC_VADC_GROUP_IsResultRegisterFifoHead() : xmc_vadc.h
  • XMC_VADC_GROUP_IsResultRegisterInFifo() : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_NORMAL : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_OFF : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_RESERVED1 : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_RESERVED2 : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_QueueAbortSequence() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueClearReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueDisableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueDisableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueEnableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueEnableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueFlushEntries() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetInterruptedChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetLength() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetNextChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetReqSrcEventStatus() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueInit() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueInsertChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueIsArbitrationSlotEnabled() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueRemoveChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSelectGating() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSelectTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSelectTriggerEdge() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSetGatingMode() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueTriggerConversion() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueTriggerReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ResultInit() : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_0 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_1 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_2 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_3 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_t : xmc_vadc.h
  • XMC_VADC_GROUP_ScanAddChannelToSequence() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanAddMultipleChannels() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanClearReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanGetNumChannelsPending() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanGetReqSrcEventStatus() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanInit() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanIsArbitrationSlotEnabled() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanIsChannelPending() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanRemoveChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSelectGating() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSelectTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSelectTriggerEdge() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSequenceAbort() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSetGatingMode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanTriggerConversion() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanTriggerReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_SetBoundaries() : xmc_vadc.h
  • XMC_VADC_GROUP_SetBoundaryEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_SetChannelAlias() : xmc_vadc.h
  • XMC_VADC_GROUP_SetIndividualBoundary() : xmc_vadc.h
  • XMC_VADC_GROUP_SetPowerMode() : xmc_vadc.h
  • XMC_VADC_GROUP_SetResultFastCompareValue() : xmc_vadc.h
  • XMC_VADC_GROUP_SetResultInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_SetResultSubtractionValue() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncMaster() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncReadySignal() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncSlave() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncSlaveReadySignal() : xmc_vadc.h
  • XMC_VADC_GROUP_STATE_BUSY : xmc_vadc.h
  • XMC_VADC_GROUP_STATE_IDLE : xmc_vadc.h
  • XMC_VADC_GROUP_STATE_t : xmc_vadc.h
  • XMC_VADC_GROUP_t : xmc_vadc.h
  • XMC_VADC_GROUP_TriggerResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_TriggerServiceRequest() : xmc_vadc.h
  • XMC_VADC_NUM_CHANNELS_PER_GROUP : xmc_vadc.h
  • XMC_VADC_REQ_GT_A : xmc_vadc.h
  • XMC_VADC_REQ_GT_B : xmc_vadc.h
  • XMC_VADC_REQ_GT_C : xmc_vadc.h
  • XMC_VADC_REQ_GT_D : xmc_vadc.h
  • XMC_VADC_REQ_GT_E : xmc_vadc.h
  • XMC_VADC_REQ_GT_F : xmc_vadc.h
  • XMC_VADC_REQ_GT_G : xmc_vadc.h
  • XMC_VADC_REQ_GT_H : xmc_vadc.h
  • XMC_VADC_REQ_GT_I : xmc_vadc.h
  • XMC_VADC_REQ_GT_J : xmc_vadc.h
  • XMC_VADC_REQ_GT_K : xmc_vadc.h
  • XMC_VADC_REQ_GT_L : xmc_vadc.h
  • XMC_VADC_REQ_GT_M : xmc_vadc.h
  • XMC_VADC_REQ_GT_N : xmc_vadc.h
  • XMC_VADC_REQ_GT_O : xmc_vadc.h
  • XMC_VADC_REQ_GT_P : xmc_vadc.h
  • XMC_VADC_REQ_TR_A : xmc_vadc.h
  • XMC_VADC_REQ_TR_B : xmc_vadc.h
  • XMC_VADC_REQ_TR_C : xmc_vadc.h
  • XMC_VADC_REQ_TR_D : xmc_vadc.h
  • XMC_VADC_REQ_TR_E : xmc_vadc.h
  • XMC_VADC_REQ_TR_F : xmc_vadc.h
  • XMC_VADC_REQ_TR_G : xmc_vadc.h
  • XMC_VADC_REQ_TR_H : xmc_vadc.h
  • XMC_VADC_REQ_TR_I : xmc_vadc.h
  • XMC_VADC_REQ_TR_J : xmc_vadc.h
  • XMC_VADC_REQ_TR_K : xmc_vadc.h
  • XMC_VADC_REQ_TR_L : xmc_vadc.h
  • XMC_VADC_REQ_TR_M : xmc_vadc.h
  • XMC_VADC_REQ_TR_N : xmc_vadc.h
  • XMC_VADC_REQ_TR_O : xmc_vadc.h
  • XMC_VADC_REQ_TR_P : xmc_vadc.h
  • XMC_VADC_RESULT_ALIGN_LEFT : xmc_vadc.h
  • XMC_VADC_RESULT_ALIGN_RIGHT : xmc_vadc.h
  • XMC_VADC_RESULT_ALIGN_t : xmc_vadc.h
  • XMC_VADC_RESULT_SIZE_t : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_10BIT_LEFT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_10BIT_RIGHT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_12BIT_LEFT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_12BIT_RIGHT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_8BIT_LEFT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_8BIT_RIGHT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_t : xmc_vadc.h
  • XMC_VADC_SCAN_LOAD_COMBINE : xmc_vadc.h
  • XMC_VADC_SCAN_LOAD_OVERWRITE : xmc_vadc.h
  • XMC_VADC_SCAN_LOAD_t : xmc_vadc.h
  • XMC_VADC_SCAN_TYPE_BACKGROUND : xmc_vadc.h
  • XMC_VADC_SCAN_TYPE_GROUPSCAN : xmc_vadc.h
  • XMC_VADC_SCAN_TYPE_t : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR0 : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR1 : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR2 : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR3 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR0 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR1 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR2 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR3 : xmc_vadc.h
  • XMC_VADC_SR_t : xmc_vadc.h
  • XMC_VADC_STARTMODE_CIR : xmc_vadc.h
  • XMC_VADC_STARTMODE_CNR : xmc_vadc.h
  • XMC_VADC_STARTMODE_t : xmc_vadc.h
  • XMC_VADC_STARTMODE_WFS : xmc_vadc.h
  • XMC_VADC_STATUS_ERROR : xmc_vadc.h
  • XMC_VADC_STATUS_SUCCESS : xmc_vadc.h
  • XMC_VADC_STATUS_t : xmc_vadc.h
  • XMC_VADC_SYNCTR_EVAL_1 : xmc_vadc.h
  • XMC_VADC_SYNCTR_EVAL_t : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_ANY : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_FALLING : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_NONE : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_RISING : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_t : xmc_vadc.h
  • XMC_VADC_TRIGGER_INPUT_SELECT_t : xmc_vadc.h
  • XMC_WDT_ClearAlarm() : xmc_wdt.h
  • XMC_WDT_DEBUG_MODE_RUN : xmc_wdt.h
  • XMC_WDT_DEBUG_MODE_STOP : xmc_wdt.h
  • XMC_WDT_DEBUG_MODE_t : xmc_wdt.h
  • XMC_WDT_Disable() : xmc_wdt.h
  • XMC_WDT_Enable() : xmc_wdt.h
  • XMC_WDT_GetCounter() : xmc_wdt.h
  • XMC_WDT_Init() : xmc_wdt.h
  • XMC_WDT_MODE_PREWARNING : xmc_wdt.h
  • XMC_WDT_MODE_t : xmc_wdt.h
  • XMC_WDT_MODE_TIMEOUT : xmc_wdt.h
  • XMC_WDT_Service() : xmc_wdt.h
  • XMC_WDT_SetDebugMode() : xmc_wdt.h
  • XMC_WDT_SetMode() : xmc_wdt.h
  • XMC_WDT_SetServicePulseWidth() : xmc_wdt.h
  • XMC_WDT_SetWindowBounds() : xmc_wdt.h
  • XMC_WDT_Start() : xmc_wdt.h
  • XMC_WDT_Stop() : xmc_wdt.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • x

- x -

  • XMC_CAN_AllocateMOtoNodeList() : xmc_can.h
  • XMC_CAN_Disable() : xmc_can.h
  • XMC_CAN_Enable() : xmc_can.h
  • XMC_CAN_EventTrigger() : xmc_can.h
  • XMC_CAN_FIFO_DisableForeingRemoteRequest() : xmc_can.h
  • XMC_CAN_FIFO_DisableRemoteMonitoring() : xmc_can.h
  • XMC_CAN_FIFO_DisableSingleDataTransfer() : xmc_can.h
  • XMC_CAN_FIFO_EnableForeignRemoteRequest() : xmc_can.h
  • XMC_CAN_FIFO_EnableRemoteMonitoring() : xmc_can.h
  • XMC_CAN_FIFO_EnableSingleDataTransfer() : xmc_can.h
  • XMC_CAN_FIFO_GetCurrentMO() : xmc_can.h
  • XMC_CAN_FIFO_SetSELMO() : xmc_can.h
  • XMC_CAN_GATEWAY_InitDesObject() : xmc_can.h
  • XMC_CAN_GATEWAY_InitSourceObject() : xmc_can.h
  • XMC_CAN_Init() : xmc_can.h
  • XMC_CAN_IsPanelControlReady() : xmc_can.h
  • XMC_CAN_MO_AcceptOnlyMatchingIDE() : xmc_can.h
  • XMC_CAN_MO_AcceptStandardAndExtendedID() : xmc_can.h
  • XMC_CAN_MO_Config() : xmc_can.h
  • XMC_CAN_MO_DataLengthCode() : xmc_can.h
  • XMC_CAN_MO_DisableEvent() : xmc_can.h
  • XMC_CAN_MO_DisableSingleTransmitTrial() : xmc_can.h
  • XMC_CAN_MO_EnableEvent() : xmc_can.h
  • XMC_CAN_MO_EnableSingleTransmitTrial() : xmc_can.h
  • XMC_CAN_MO_GetAcceptanceMask() : xmc_can.h
  • XMC_CAN_MO_GetDataLengthCode() : xmc_can.h
  • XMC_CAN_MO_GetIdentifier() : xmc_can.h
  • XMC_CAN_MO_GetStatus() : xmc_can.h
  • XMC_CAN_MO_Receive() : xmc_can.h
  • XMC_CAN_MO_ReceiveData() : xmc_can.h
  • XMC_CAN_MO_ResetStatus() : xmc_can.h
  • XMC_CAN_MO_SetAcceptanceMask() : xmc_can.h
  • XMC_CAN_MO_SetDataLengthCode() : xmc_can.h
  • XMC_CAN_MO_SetEventNodePointer() : xmc_can.h
  • XMC_CAN_MO_SetExtendedID() : xmc_can.h
  • XMC_CAN_MO_SetIdentifier() : xmc_can.h
  • XMC_CAN_MO_SetStandardID() : xmc_can.h
  • XMC_CAN_MO_SetStatus() : xmc_can.h
  • XMC_CAN_MO_Transmit() : xmc_can.h
  • XMC_CAN_MO_UpdateData() : xmc_can.h
  • XMC_CAN_NODE_ClearStatus() : xmc_can.h
  • XMC_CAN_NODE_Disable() : xmc_can.h
  • XMC_CAN_NODE_DisableConfigurationChange() : xmc_can.h
  • XMC_CAN_NODE_DisableEvent() : xmc_can.h
  • XMC_CAN_NODE_DisableLoopBack() : xmc_can.h
  • XMC_CAN_NODE_Enable() : xmc_can.h
  • XMC_CAN_NODE_EnableConfigurationChange() : xmc_can.h
  • XMC_CAN_NODE_EnableEvent() : xmc_can.h
  • XMC_CAN_NODE_EnableLoopBack() : xmc_can.h
  • XMC_CAN_NODE_EnableSuspend() : xmc_can.h
  • XMC_CAN_NODE_FrameCounterConfigure() : xmc_can.h
  • XMC_CAN_NODE_GetCANFrameCounter() : xmc_can.h
  • XMC_CAN_NODE_GetErrorWarningLevel() : xmc_can.h
  • XMC_CAN_NODE_GetLastErrTransferDir() : xmc_can.h
  • XMC_CAN_NODE_GetLastErrTransferInc() : xmc_can.h
  • XMC_CAN_NODE_GetReceiveErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_GetStatus() : xmc_can.h
  • XMC_CAN_NODE_GetTransmitErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_NominalBitTimeConfigure() : xmc_can.h
  • XMC_CAN_NODE_ReSetAnalyzerMode() : xmc_can.h
  • XMC_CAN_NODE_ResetInitBit() : xmc_can.h
  • XMC_CAN_NODE_SetAnalyzerMode() : xmc_can.h
  • XMC_CAN_NODE_SetErrorWarningLevel() : xmc_can.h
  • XMC_CAN_NODE_SetEventNodePointer() : xmc_can.h
  • XMC_CAN_NODE_SetInitBit() : xmc_can.h
  • XMC_CAN_NODE_SetReceiveErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_SetReceiveInput() : xmc_can.h
  • XMC_CAN_NODE_SetTransmitErrorCounter() : xmc_can.h
  • XMC_CAN_PanelControl() : xmc_can.h
  • XMC_CAN_RXFIFO_ConfigMOBaseObject() : xmc_can.h
  • XMC_CAN_RXFIFO_ConfigMOSlaveObject() : xmc_can.h
  • XMC_CAN_TXFIFO_ConfigMOBaseObject() : xmc_can.h
  • XMC_CAN_TXFIFO_ConfigMOSlaveObject() : xmc_can.h
  • XMC_CAN_TXFIFO_Transmit() : xmc_can.h
  • XMC_CCU4_DisableClock() : xmc_ccu4.h
  • XMC_CCU4_DisableModule() : xmc_ccu4.h
  • XMC_CCU4_EnableClock() : xmc_ccu4.h
  • XMC_CCU4_EnableModule() : xmc_ccu4.h
  • XMC_CCU4_EnableMultipleClocks() : xmc_ccu4.h
  • XMC_CCU4_EnableShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_Init() : xmc_ccu4.h
  • XMC_CCU4_IsPrescalerRunning() : xmc_ccu4.h
  • XMC_CCU4_SetModuleClock() : xmc_ccu4.h
  • XMC_CCU4_SetMultiChannelShadowTransferMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_Capture0Config() : xmc_ccu4.h
  • XMC_CCU4_SLICE_Capture1Config() : xmc_ccu4.h
  • XMC_CCU4_SLICE_CaptureInit() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ClearEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ClearTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_CompareInit() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ConfigureEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ConfigureStatusBitOverrideEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_CountConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DirectionConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableAutomaticShadowTransferRequest() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableCascadedShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableDithering() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableFloatingPrescaler() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableMultiChannelMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableMultipleEvents() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableTrap() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableAutomaticShadowTransferRequest() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableCascadedShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableDithering() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableFloatingPrescaler() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableMultiChannelMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableMultipleEvents() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableTrap() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GateConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetCapturedValueFromFifo() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetCaptureRegisterValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetCountingDir() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetLastCapturedTimerValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetSliceMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerCompareMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerCountingMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerPeriodMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerRepeatMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_IsExtendedCapReadEnabled() : xmc_ccu4.h
  • XMC_CCU4_SLICE_IsTimerRunning() : xmc_ccu4.h
  • XMC_CCU4_SLICE_LoadConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ModulationConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetDitherCompareValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetInput() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetInterruptNode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetPassiveLevel() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetPrescaler() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetShadowTransferMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerCompareMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerCountingMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerPeriodMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerRepeatMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StartConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StartTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StatusBitOverrideConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StopClearTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StopConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StopTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_TrapConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_WriteCoherentlyWithPWMCycle() : xmc_ccu4.h
  • XMC_CCU4_SLICE_WriteImmediateAfterShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_StartPrescaler() : xmc_ccu4.h
  • XMC_CCU4_StopPrescaler() : xmc_ccu4.h
  • XMC_CCU8_DisableClock() : xmc_ccu8.h
  • XMC_CCU8_DisableModule() : xmc_ccu8.h
  • XMC_CCU8_EnableClock() : xmc_ccu8.h
  • XMC_CCU8_EnableModule() : xmc_ccu8.h
  • XMC_CCU8_EnableMultipleClocks() : xmc_ccu8.h
  • XMC_CCU8_EnableShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_Init() : xmc_ccu8.h
  • XMC_CCU8_IsPrescalerRunning() : xmc_ccu8.h
  • XMC_CCU8_SetModuleClock() : xmc_ccu8.h
  • XMC_CCU8_SetMultiChannelShadowTransferMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_Capture0Config() : xmc_ccu8.h
  • XMC_CCU8_SLICE_Capture1Config() : xmc_ccu8.h
  • XMC_CCU8_SLICE_CaptureInit() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ClearEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ClearTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_CompareInit() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureDeadTime() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureStatusBitOutput() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_CountConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DeadTimeInit() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DirectionConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableCascadedShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableDithering() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableFloatingPrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableMultiChannelMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableMultipleEvents() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableTrap() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableAsymmetricCompareMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableCascadedShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableDithering() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableFloatingPrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableMultiChannelMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableMultipleEvents() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableSymmetricCompareMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableTrap() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GateConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetCapturedValueFromFifo() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetCaptureRegisterValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetCountingDir() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetLastCapturedTimerValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetSliceMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerCompareMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerCountingMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerPeriodMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerRepeatMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsDeadTimeCntr1Running() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsDeadTimeCntr2Running() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsExtendedCapReadEnabled() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsTimerRunning() : xmc_ccu8.h
  • XMC_CCU8_SLICE_LoadConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_LoadSelector() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ModulationConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetDeadTimePrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetDeadTimeValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetDitherCompareValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetInput() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetInterruptNode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetOutPath() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetPassiveLevel() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetPrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetShadowTransferMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCompareMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCompareMatchChannel1() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCompareMatchChannel2() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCountingMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerPeriodMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerRepeatMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StartConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StartTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StatusBitOverrideConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StopClearTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StopConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StopTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_TrapConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_WriteCoherentlyWithPWMCycle() : xmc_ccu8.h
  • XMC_CCU8_SLICE_WriteImmediateAfterShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_StartPrescaler() : xmc_ccu8.h
  • XMC_CCU8_StopPrescaler() : xmc_ccu8.h
  • XMC_DAC_CH_DisableEvent() : xmc_dac.h
  • XMC_DAC_CH_DisableOutput() : xmc_dac.h
  • XMC_DAC_CH_DisableOutputNegation() : xmc_dac.h
  • XMC_DAC_CH_DisablePatternSignOutput() : xmc_dac.h
  • XMC_DAC_CH_EnableEvent() : xmc_dac.h
  • XMC_DAC_CH_EnableOutput() : xmc_dac.h
  • XMC_DAC_CH_EnableOutputNegation() : xmc_dac.h
  • XMC_DAC_CH_EnablePatternSignOutput() : xmc_dac.h
  • XMC_DAC_CH_GetOutputScale() : xmc_dac.h
  • XMC_DAC_CH_GetRampStart() : xmc_dac.h
  • XMC_DAC_CH_GetRampStop() : xmc_dac.h
  • XMC_DAC_CH_Init() : xmc_dac.h
  • XMC_DAC_CH_IsFifoEmpty() : xmc_dac.h
  • XMC_DAC_CH_IsFifoFull() : xmc_dac.h
  • XMC_DAC_CH_IsOutputEnabled() : xmc_dac.h
  • XMC_DAC_CH_SetFrequency() : xmc_dac.h
  • XMC_DAC_CH_SetMode() : xmc_dac.h
  • XMC_DAC_CH_SetOutputOffset() : xmc_dac.h
  • XMC_DAC_CH_SetOutputScale() : xmc_dac.h
  • XMC_DAC_CH_SetPattern() : xmc_dac.h
  • XMC_DAC_CH_SetPatternFrequency() : xmc_dac.h
  • XMC_DAC_CH_SetRampFrequency() : xmc_dac.h
  • XMC_DAC_CH_SetRampStart() : xmc_dac.h
  • XMC_DAC_CH_SetRampStop() : xmc_dac.h
  • XMC_DAC_CH_SetSignedDataType() : xmc_dac.h
  • XMC_DAC_CH_SetTrigger() : xmc_dac.h
  • XMC_DAC_CH_SetUnsignedDataType() : xmc_dac.h
  • XMC_DAC_CH_SoftwareTrigger() : xmc_dac.h
  • XMC_DAC_CH_StartDataMode() : xmc_dac.h
  • XMC_DAC_CH_StartNoiseMode() : xmc_dac.h
  • XMC_DAC_CH_StartPatternMode() : xmc_dac.h
  • XMC_DAC_CH_StartRampMode() : xmc_dac.h
  • XMC_DAC_CH_StartSingleValueMode() : xmc_dac.h
  • XMC_DAC_CH_Write() : xmc_dac.h
  • XMC_DAC_Disable() : xmc_dac.h
  • XMC_DAC_DisableSimultaneousDataMode() : xmc_dac.h
  • XMC_DAC_Enable() : xmc_dac.h
  • XMC_DAC_EnableSimultaneousDataMode() : xmc_dac.h
  • XMC_DAC_IsEnabled() : xmc_dac.h
  • XMC_DAC_SimultaneousWrite() : xmc_dac.h
  • XMC_DMA_CH_ClearDestinationPeripheralRequest() : xmc_dma.h
  • XMC_DMA_CH_ClearEventStatus() : xmc_dma.h
  • XMC_DMA_CH_ClearSourcePeripheralRequest() : xmc_dma.h
  • XMC_DMA_CH_Disable() : xmc_dma.h
  • XMC_DMA_CH_DisableDestinationAddressReload() : xmc_dma.h
  • XMC_DMA_CH_DisableDestinationScatter() : xmc_dma.h
  • XMC_DMA_CH_DisableEvent() : xmc_dma.h
  • XMC_DMA_CH_DisableSourceAddressReload() : xmc_dma.h
  • XMC_DMA_CH_DisableSourceGather() : xmc_dma.h
  • XMC_DMA_CH_Enable() : xmc_dma.h
  • XMC_DMA_CH_EnableDestinationAddressReload() : xmc_dma.h
  • XMC_DMA_CH_EnableDestinationScatter() : xmc_dma.h
  • XMC_DMA_CH_EnableEvent() : xmc_dma.h
  • XMC_DMA_CH_EnableSourceAddressReload() : xmc_dma.h
  • XMC_DMA_CH_EnableSourceGather() : xmc_dma.h
  • XMC_DMA_CH_GetEventStatus() : xmc_dma.h
  • XMC_DMA_CH_Init() : xmc_dma.h
  • XMC_DMA_CH_IsEnabled() : xmc_dma.h
  • XMC_DMA_CH_IsSuspended() : xmc_dma.h
  • XMC_DMA_CH_RequestLastMultiblockTransfer() : xmc_dma.h
  • XMC_DMA_CH_Resume() : xmc_dma.h
  • XMC_DMA_CH_SetBlockSize() : xmc_dma.h
  • XMC_DMA_CH_SetDestinationAddress() : xmc_dma.h
  • XMC_DMA_CH_SetEventHandler() : xmc_dma.h
  • XMC_DMA_CH_SetLinkedListPointer() : xmc_dma.h
  • XMC_DMA_CH_SetSourceAddress() : xmc_dma.h
  • XMC_DMA_CH_Suspend() : xmc_dma.h
  • XMC_DMA_CH_TriggerDestinationRequest() : xmc_dma.h
  • XMC_DMA_CH_TriggerSourceRequest() : xmc_dma.h
  • XMC_DMA_ClearOverrunStatus() : xmc_dma.h
  • XMC_DMA_ClearRequestLine() : xmc_dma.h
  • XMC_DMA_Disable() : xmc_dma.h
  • XMC_DMA_DisableRequestLine() : xmc_dma.h
  • XMC_DMA_Enable() : xmc_dma.h
  • XMC_DMA_EnableRequestLine() : xmc_dma.h
  • XMC_DMA_GetChannelsBlockCompleteStatus() : xmc_dma.h
  • XMC_DMA_GetChannelsDestinationTransactionCompleteStatus() : xmc_dma.h
  • XMC_DMA_GetChannelsErrorStatus() : xmc_dma.h
  • XMC_DMA_GetChannelsSourceTransactionCompleteStatus() : xmc_dma.h
  • XMC_DMA_GetChannelsTransferCompleteStatus() : xmc_dma.h
  • XMC_DMA_GetEventStatus() : xmc_dma.h
  • XMC_DMA_GetOverrunStatus() : xmc_dma.h
  • XMC_DMA_Init() : xmc_dma.h
  • XMC_DMA_IRQHandler() : xmc_dma.h
  • XMC_DMA_IsEnabled() : xmc_dma.h
  • XMC_DSD_CH_AuxFilter_DisableEvent() : xmc_dsd.h
  • XMC_DSD_CH_AuxFilter_EnableEvent() : xmc_dsd.h
  • XMC_DSD_CH_AuxFilter_Init() : xmc_dsd.h
  • XMC_DSD_CH_AuxFilter_SetBoundary() : xmc_dsd.h
  • XMC_DSD_CH_GetRectifyDelay() : xmc_dsd.h
  • XMC_DSD_CH_GetResult() : xmc_dsd.h
  • XMC_DSD_CH_GetResult_AUX() : xmc_dsd.h
  • XMC_DSD_CH_GetResult_TS() : xmc_dsd.h
  • XMC_DSD_CH_GetResult_TS_Time() : xmc_dsd.h
  • XMC_DSD_CH_Init() : xmc_dsd.h
  • XMC_DSD_CH_Integrator_Init() : xmc_dsd.h
  • XMC_DSD_CH_MainFilter_DisableEvent() : xmc_dsd.h
  • XMC_DSD_CH_MainFilter_EnableEvent() : xmc_dsd.h
  • XMC_DSD_CH_MainFilter_Init() : xmc_dsd.h
  • XMC_DSD_CH_MainFilter_SetOffset() : xmc_dsd.h
  • XMC_DSD_CH_Rectify_Init() : xmc_dsd.h
  • XMC_DSD_CH_Timestamp_Init() : xmc_dsd.h
  • XMC_DSD_ClearAlarmEventFlag() : xmc_dsd.h
  • XMC_DSD_ClearResultEventFlag() : xmc_dsd.h
  • XMC_DSD_Disable() : xmc_dsd.h
  • XMC_DSD_DisableClock() : xmc_dsd.h
  • XMC_DSD_Enable() : xmc_dsd.h
  • XMC_DSD_EnableClock() : xmc_dsd.h
  • XMC_DSD_Generator_Init() : xmc_dsd.h
  • XMC_DSD_Generator_Start() : xmc_dsd.h
  • XMC_DSD_Generator_Stop() : xmc_dsd.h
  • XMC_DSD_Init() : xmc_dsd.h
  • XMC_DSD_IsChannelStarted() : xmc_dsd.h
  • XMC_DSD_IsEnabled() : xmc_dsd.h
  • XMC_DSD_SetAlarmEventFlag() : xmc_dsd.h
  • XMC_DSD_SetResultEventFlag() : xmc_dsd.h
  • XMC_DSD_Start() : xmc_dsd.h
  • XMC_DSD_Stop() : xmc_dsd.h
  • XMC_EBU_AddressSelectDisable() : xmc_ebu.h
  • XMC_EBU_AddressSelectEnable() : xmc_ebu.h
  • XMC_EBU_CLKDivideRatio() : xmc_ebu.h
  • XMC_EBU_ConfigureRegion() : xmc_ebu.h
  • XMC_EBU_ConfigureSdram() : xmc_ebu.h
  • XMC_EBU_Disable() : xmc_ebu.h
  • XMC_EBU_Enable() : xmc_ebu.h
  • XMC_EBU_GetBusWriteConfStatus() : xmc_ebu.h
  • XMC_EBU_GetCLKStatus() : xmc_ebu.h
  • XMC_EBU_Init() : xmc_ebu.h
  • XMC_EBU_IsBusAribitrationSelected() : xmc_ebu.h
  • XMC_EBU_SdramDisableAutomaticSelfRefresh() : xmc_ebu.h
  • XMC_EBU_SdramDisableAutoRefreshSelfRefreshExit() : xmc_ebu.h
  • XMC_EBU_SdramEnableAutomaticSelfRefresh() : xmc_ebu.h
  • XMC_EBU_SdramEnableAutoRefreshSelfRefreshExit() : xmc_ebu.h
  • XMC_EBU_SdramGetRefreshStatus() : xmc_ebu.h
  • XMC_EBU_SdramGetStatus() : xmc_ebu.h
  • XMC_EBU_SdramResetSelfRefreshEntry() : xmc_ebu.h
  • XMC_EBU_SdramResetSelfRefreshExit() : xmc_ebu.h
  • XMC_EBU_SdramSetSelfRefreshEntry() : xmc_ebu.h
  • XMC_EBU_SdramSetSelfRefreshExit() : xmc_ebu.h
  • XMC_ECAT_Disable() : xmc_ecat.h
  • XMC_ECAT_DisableEvent() : xmc_ecat.h
  • XMC_ECAT_DisableSyncManChannel() : xmc_ecat.h
  • XMC_ECAT_Enable() : xmc_ecat.h
  • XMC_ECAT_EnableEvent() : xmc_ecat.h
  • XMC_ECAT_EnableSyncManChannel() : xmc_ecat.h
  • XMC_ECAT_GetALEventMask() : xmc_ecat.h
  • XMC_ECAT_GetALEventRegister() : xmc_ecat.h
  • XMC_ECAT_GetEventStatus() : xmc_ecat.h
  • XMC_ECAT_Init() : xmc_ecat.h
  • XMC_ECAT_ReadPhy() : xmc_ecat.h
  • XMC_ECAT_SetALEventMask() : xmc_ecat.h
  • XMC_ECAT_SetPortControl() : xmc_ecat.h
  • XMC_ECAT_WritePhy() : xmc_ecat.h
  • XMC_ERU_Disable() : xmc_eru.h
  • XMC_ERU_Enable() : xmc_eru.h
  • XMC_ERU_ETL_ClearStatusFlag() : xmc_eru.h
  • XMC_ERU_ETL_DisableOutputTrigger() : xmc_eru.h
  • XMC_ERU_ETL_EnableOutputTrigger() : xmc_eru.h
  • XMC_ERU_ETL_GetEdgeDetection() : xmc_eru.h
  • XMC_ERU_ETL_GetStatusFlag() : xmc_eru.h
  • XMC_ERU_ETL_Init() : xmc_eru.h
  • XMC_ERU_ETL_SetEdgeDetection() : xmc_eru.h
  • XMC_ERU_ETL_SetInput() : xmc_eru.h
  • XMC_ERU_ETL_SetSource() : xmc_eru.h
  • XMC_ERU_ETL_SetStatusFlag() : xmc_eru.h
  • XMC_ERU_ETL_SetStatusFlagMode() : xmc_eru.h
  • XMC_ERU_OGU_DisablePatternDetection() : xmc_eru.h
  • XMC_ERU_OGU_DisablePeripheralTrigger() : xmc_eru.h
  • XMC_ERU_OGU_EnablePatternDetection() : xmc_eru.h
  • XMC_ERU_OGU_EnablePeripheralTrigger() : xmc_eru.h
  • XMC_ERU_OGU_GetPatternDetectionStatus() : xmc_eru.h
  • XMC_ERU_OGU_Init() : xmc_eru.h
  • XMC_ERU_OGU_SetServiceRequestMode() : xmc_eru.h
  • XMC_ETH_MAC_AdjustPTPClock() : xmc_eth_mac.h
  • XMC_ETH_MAC_ClearEventStatus() : xmc_eth_mac.h
  • XMC_ETH_MAC_Disable() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableDestinationAddressInverseFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableEvent() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableFrameBurst() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableFrameFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableJumboFrame() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableLoopback() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableMulticastHashFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisablePowerDownMode() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisablePowerManagmentEvent() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisablePromiscuousMode() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisablePTPAlarm() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableReceptionBroadcastFrames() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableReceptionMulticastFrames() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableRx() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableRxOwn() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableRxWatchdog() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableSourceAddressFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableSourceAddressInverseFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableTx() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableTxJabber() : xmc_eth_mac.h
  • XMC_ETH_MAC_DisableUnicastHashFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_Enable() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableDestinationAddressInverseFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableEvent() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableFrameBurst() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableFrameFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableHashPerfectFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableJumboFrame() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableLoopback() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableMulticastHashFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnablePerfectFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnablePowerDownMode() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnablePowerManagmentEvent() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnablePromiscuousMode() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnablePTPAlarm() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableReceptionBroadcastFrames() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableReceptionMulticastFrames() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableRx() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableRxOwn() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableRxWatchdog() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableSourceAddressFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableSourceAddressInverseFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableTx() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableTxJabber() : xmc_eth_mac.h
  • XMC_ETH_MAC_EnableUnicastHashFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_FlushRx() : xmc_eth_mac.h
  • XMC_ETH_MAC_FlushTx() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetAddress() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetEventStatus() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetPTPStatus() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetPTPTime() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetRxBuffer() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetRxFrameSize() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetRxTimeStamp() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetTxBuffer() : xmc_eth_mac.h
  • XMC_ETH_MAC_GetTxTimeStamp() : xmc_eth_mac.h
  • XMC_ETH_MAC_Init() : xmc_eth_mac.h
  • XMC_ETH_MAC_InitPTP() : xmc_eth_mac.h
  • XMC_ETH_MAC_InitPTPEx() : xmc_eth_mac.h
  • XMC_ETH_MAC_InitRxDescriptors() : xmc_eth_mac.h
  • XMC_ETH_MAC_InitTxDescriptors() : xmc_eth_mac.h
  • XMC_ETH_MAC_IsEnabled() : xmc_eth_mac.h
  • XMC_ETH_MAC_IsMagicPacketReceived() : xmc_eth_mac.h
  • XMC_ETH_MAC_IsRxDescriptorOwnedByDma() : xmc_eth_mac.h
  • XMC_ETH_MAC_IsTxDescriptorOwnedByDma() : xmc_eth_mac.h
  • XMC_ETH_MAC_IsWakeupFrameReceived() : xmc_eth_mac.h
  • XMC_ETH_MAC_ReadFrame() : xmc_eth_mac.h
  • XMC_ETH_MAC_ReadPhy() : xmc_eth_mac.h
  • XMC_ETH_MAC_Reset() : xmc_eth_mac.h
  • XMC_ETH_MAC_ResumeRx() : xmc_eth_mac.h
  • XMC_ETH_MAC_ResumeTx() : xmc_eth_mac.h
  • XMC_ETH_MAC_ReturnRxDescriptor() : xmc_eth_mac.h
  • XMC_ETH_MAC_ReturnTxDescriptor() : xmc_eth_mac.h
  • XMC_ETH_MAC_SendFrame() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetAddress() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetAddressHashFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetAddressPerfectFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetLink() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetManagmentClockDivider() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetPortControl() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetPTPAlarm() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetPTPTime() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetTxBufferSize() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetVLANTag() : xmc_eth_mac.h
  • XMC_ETH_MAC_SetWakeUpFrameFilter() : xmc_eth_mac.h
  • XMC_ETH_MAC_UpdateAddend() : xmc_eth_mac.h
  • XMC_ETH_MAC_UpdatePTPTime() : xmc_eth_mac.h
  • XMC_ETH_MAC_WritePhy() : xmc_eth_mac.h
  • XMC_ETH_PHY_ExitPowerDown() : xmc_eth_phy.h
  • XMC_ETH_PHY_GetLinkDuplex() : xmc_eth_phy.h
  • XMC_ETH_PHY_GetLinkSpeed() : xmc_eth_phy.h
  • XMC_ETH_PHY_GetLinkStatus() : xmc_eth_phy.h
  • XMC_ETH_PHY_Init() : xmc_eth_phy.h
  • XMC_ETH_PHY_IsAutonegotiationCompleted() : xmc_eth_phy.h
  • XMC_ETH_PHY_PowerDown() : xmc_eth_phy.h
  • XMC_ETH_PHY_Reset() : xmc_eth_phy.h
  • XMC_FCE_CalculateCRC16() : xmc_fce.h
  • XMC_FCE_CalculateCRC32() : xmc_fce.h
  • XMC_FCE_CalculateCRC8() : xmc_fce.h
  • XMC_FCE_ClearEvent() : xmc_fce.h
  • XMC_FCE_Disable() : xmc_fce.h
  • XMC_FCE_DisableCRCAlgorithm() : xmc_fce.h
  • XMC_FCE_DisableEvent() : xmc_fce.h
  • XMC_FCE_DisableOperation() : xmc_fce.h
  • XMC_FCE_Enable() : xmc_fce.h
  • XMC_FCE_EnableCRCAlgorithm() : xmc_fce.h
  • XMC_FCE_EnableEvent() : xmc_fce.h
  • XMC_FCE_EnableOperation() : xmc_fce.h
  • XMC_FCE_Get_DisableStatus() : xmc_fce.h
  • XMC_FCE_GetCRCResult() : xmc_fce.h
  • XMC_FCE_GetEventStatus() : xmc_fce.h
  • XMC_FCE_Init() : xmc_fce.h
  • XMC_FCE_InitializeSeedValue() : xmc_fce.h
  • XMC_FCE_LittleEndian16bit() : xmc_fce.h
  • XMC_FCE_LittleEndian32bit() : xmc_fce.h
  • XMC_FCE_ReadModuleNumber() : xmc_fce.h
  • XMC_FCE_ReadModuleRev() : xmc_fce.h
  • XMC_FCE_ReadModuleType() : xmc_fce.h
  • XMC_FCE_TriggerMismatch() : xmc_fce.h
  • XMC_FCE_UpdateCRCCheck() : xmc_fce.h
  • XMC_FCE_UpdateLength() : xmc_fce.h
  • XMC_FLASH_ClearStatus() : xmc_flash.h
  • XMC_FLASH_ConfirmProtection() : xmc4_flash.h
  • XMC_FLASH_DisableDoubleBitErrorTrap() : xmc4_flash.h
  • XMC_FLASH_DisableDynamicIdle() : xmc4_flash.h
  • XMC_FLASH_DisableEvent() : xmc_flash.h
  • XMC_FLASH_DisableSleepRequest() : xmc4_flash.h
  • XMC_FLASH_DisableWaitStateForECC() : xmc4_flash.h
  • XMC_FLASH_EnableDoubleBitErrorTrap() : xmc4_flash.h
  • XMC_FLASH_EnableDynamicIdle() : xmc4_flash.h
  • XMC_FLASH_EnableEvent() : xmc_flash.h
  • XMC_FLASH_EnableSleepRequest() : xmc4_flash.h
  • XMC_FLASH_EnableWaitStateForECC() : xmc4_flash.h
  • XMC_FLASH_ErasePhysicalSector() : xmc4_flash.h
  • XMC_FLASH_EraseSector() : xmc_flash.h
  • XMC_FLASH_EraseUCB() : xmc4_flash.h
  • XMC_FLASH_GetStatus() : xmc_flash.h
  • XMC_FLASH_InstallProtection() : xmc4_flash.h
  • XMC_FLASH_IsBusy() : xmc_flash.h
  • XMC_FLASH_ProgramPage() : xmc_flash.h
  • XMC_FLASH_RepairPhysicalSector() : xmc4_flash.h
  • XMC_FLASH_Reset() : xmc4_flash.h
  • XMC_FLASH_ResumeProtection() : xmc4_flash.h
  • XMC_FLASH_SetMargin() : xmc4_flash.h
  • XMC_FLASH_SetWaitStates() : xmc4_flash.h
  • XMC_FLASH_VerifyReadProtection() : xmc4_flash.h
  • XMC_FLASH_VerifyWriteProtection() : xmc4_flash.h
  • XMC_GPIO_DisableDigitalInput() : xmc_gpio.h
  • XMC_GPIO_DisablePowerSaveMode() : xmc_gpio.h
  • XMC_GPIO_EnableDigitalInput() : xmc_gpio.h
  • XMC_GPIO_EnablePowerSaveMode() : xmc_gpio.h
  • XMC_GPIO_GetInput() : xmc_gpio.h
  • XMC_GPIO_Init() : xmc_gpio.h
  • XMC_GPIO_SetHardwareControl() : xmc_gpio.h
  • XMC_GPIO_SetMode() : xmc_gpio.h
  • XMC_GPIO_SetOutputHigh() : xmc_gpio.h
  • XMC_GPIO_SetOutputLevel() : xmc_gpio.h
  • XMC_GPIO_SetOutputLow() : xmc_gpio.h
  • XMC_GPIO_SetOutputStrength() : xmc4_gpio.h
  • XMC_GPIO_ToggleOutput() : xmc_gpio.h
  • XMC_HRPWM_ClampComparatorOutput() : xmc_hrpwm.h
  • XMC_HRPWM_ClearPreScaler() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_ClrEventSW() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_DACRefValSwitchingConfig() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_DisableEvent() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_EnableEvent() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_GetEventStatus() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_Init() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SelBlankingInput() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SelClampingInput() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SelSlopeGenClkInput() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SetCMPInput() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SetEventSW() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SetSRNode() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_StartSlopeGenConfig() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_StopSlopeGenConfig() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_TriggerDACConvConfig() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_TriggerShadowXferConfig() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdateBlankingValue() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdateDACPrescaler() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdateDACRefDSV1() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdateDACRefDSV2() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdateDACStepGain() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdateFilterWindow() : xmc_hrpwm.h
  • XMC_HRPWM_CSG_UpdatePulseClk() : xmc_hrpwm.h
  • XMC_HRPWM_DisableBias() : xmc_hrpwm.h
  • XMC_HRPWM_DisableComparatorShadowTransfer() : xmc_hrpwm.h
  • XMC_HRPWM_DisableCsgClock() : xmc_hrpwm.h
  • XMC_HRPWM_DisableGlobalHR() : xmc_hrpwm.h
  • XMC_HRPWM_DisableHighResolutionPath() : xmc_hrpwm.h
  • XMC_HRPWM_DisableHighResolutionShadowTransfer() : xmc_hrpwm.h
  • XMC_HRPWM_DisableHRPowerMode() : xmc_hrpwm.h
  • XMC_HRPWM_DisableLowResolutionPath() : xmc_hrpwm.h
  • XMC_HRPWM_EnableBias() : xmc_hrpwm.h
  • XMC_HRPWM_EnableComparatorShadowTransfer() : xmc_hrpwm.h
  • XMC_HRPWM_EnableGlobalHR() : xmc_hrpwm.h
  • XMC_HRPWM_EnableHighResolutionPath() : xmc_hrpwm.h
  • XMC_HRPWM_EnableHighResolutionShadowTransfer() : xmc_hrpwm.h
  • XMC_HRPWM_EnableHRPowerMode() : xmc_hrpwm.h
  • XMC_HRPWM_EnableLowResolutionPath() : xmc_hrpwm.h
  • XMC_HRPWM_GetCMPInput() : xmc_hrpwm.h
  • XMC_HRPWM_GetComparatorShadowTransferStatus() : xmc_hrpwm.h
  • XMC_HRPWM_GetHighResolutionShadowTransferStatus() : xmc_hrpwm.h
  • XMC_HRPWM_GetHRGenReadyStatus() : xmc_hrpwm.h
  • XMC_HRPWM_GetRunBitStatus() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_ConfigSourceSelect0() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_ConfigSourceSelect1() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_Init() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_Set_HR_Source() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SetCompare1() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SetCompare2() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SetDeadTimeFalling() : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SetDeadTimeRising() : xmc_hrpwm.h
  • XMC_HRPWM_Init() : xmc_hrpwm.h
  • XMC_HRPWM_IsComparatorClamped() : xmc_hrpwm.h
  • XMC_HRPWM_IsComparatorRunning() : xmc_hrpwm.h
  • XMC_HRPWM_IsDacRunning() : xmc_hrpwm.h
  • XMC_HRPWM_IsPrescalerRunning() : xmc_hrpwm.h
  • XMC_HRPWM_IsSlopeGenerationRunning() : xmc_hrpwm.h
  • XMC_HRPWM_ModuleClkFreq() : xmc_hrpwm.h
  • XMC_HRPWM_SetCsgPowerMode() : xmc_hrpwm.h
  • XMC_HRPWM_StartComparator() : xmc_hrpwm.h
  • XMC_HRPWM_StartDac() : xmc_hrpwm.h
  • XMC_HRPWM_StartSlopeGeneration() : xmc_hrpwm.h
  • XMC_HRPWM_StopComparator() : xmc_hrpwm.h
  • XMC_HRPWM_StopDac() : xmc_hrpwm.h
  • XMC_HRPWM_StopSlopeGeneration() : xmc_hrpwm.h
  • XMC_HRPWM_UnClampComparatorOutput() : xmc_hrpwm.h
  • XMC_I2C_CH_ClearStatusFlag() : xmc_i2c.h
  • XMC_I2C_CH_ConfigExternalInputSignalToBRG() : xmc_i2c.h
  • XMC_I2C_CH_DisableAcknowledgeAddress0() : xmc_i2c.h
  • XMC_I2C_CH_DisableDataTransmission() : xmc_i2c.h
  • XMC_I2C_CH_DisableEvent() : xmc_i2c.h
  • XMC_I2C_CH_EnableAcknowledgeAddress0() : xmc_i2c.h
  • XMC_I2C_CH_EnableDataTransmission() : xmc_i2c.h
  • XMC_I2C_CH_EnableEvent() : xmc_i2c.h
  • XMC_I2C_CH_GetReceivedData() : xmc_i2c.h
  • XMC_I2C_CH_GetReceiverStatusFlag() : xmc_i2c.h
  • XMC_I2C_CH_GetSlaveAddress() : xmc_i2c.h
  • XMC_I2C_CH_GetStatusFlag() : xmc_i2c.h
  • XMC_I2C_CH_Init() : xmc_i2c.h
  • XMC_I2C_CH_MasterReceiveAck() : xmc_i2c.h
  • XMC_I2C_CH_MasterReceiveNack() : xmc_i2c.h
  • XMC_I2C_CH_MasterRepeatedStart() : xmc_i2c.h
  • XMC_I2C_CH_MasterStart() : xmc_i2c.h
  • XMC_I2C_CH_MasterStop() : xmc_i2c.h
  • XMC_I2C_CH_MasterTransmit() : xmc_i2c.h
  • XMC_I2C_CH_SelectInterruptNodePointer() : xmc_i2c.h
  • XMC_I2C_CH_SetBaudrate() : xmc_i2c.h
  • XMC_I2C_CH_SetInputSource() : xmc_i2c.h
  • XMC_I2C_CH_SetInterruptNodePointer() : xmc_i2c.h
  • XMC_I2C_CH_SetSlaveAddress() : xmc_i2c.h
  • XMC_I2C_CH_SlaveTransmit() : xmc_i2c.h
  • XMC_I2C_CH_Start() : xmc_i2c.h
  • XMC_I2C_CH_Stop() : xmc_i2c.h
  • XMC_I2C_CH_TriggerServiceRequest() : xmc_i2c.h
  • XMC_I2S_CH_ClearStatusFlag() : xmc_i2s.h
  • XMC_I2S_CH_ConfigureShiftClockOutput() : xmc_i2s.h
  • XMC_I2S_CH_DisableDataTransmission() : xmc_i2s.h
  • XMC_I2S_CH_DisableDelayCompensation() : xmc_i2s.h
  • XMC_I2S_CH_DisableEvent() : xmc_i2s.h
  • XMC_I2S_CH_DisableInputInversion() : xmc_i2s.h
  • XMC_I2S_CH_DisableMasterClock() : xmc_i2s.h
  • XMC_I2S_CH_EnableDataTransmission() : xmc_i2s.h
  • XMC_I2S_CH_EnableDelayCompensation() : xmc_i2s.h
  • XMC_I2S_CH_EnableEvent() : xmc_i2s.h
  • XMC_I2S_CH_EnableInputInversion() : xmc_i2s.h
  • XMC_I2S_CH_EnableMasterClock() : xmc_i2s.h
  • XMC_I2S_CH_GetReceivedData() : xmc_i2s.h
  • XMC_I2S_CH_GetStatusFlag() : xmc_i2s.h
  • XMC_I2S_CH_Init() : xmc_i2s.h
  • XMC_I2S_CH_Receive() : xmc_i2s.h
  • XMC_I2S_CH_SelectInterruptNodePointer() : xmc_i2s.h
  • XMC_I2S_CH_SetBaudrate() : xmc_i2s.h
  • XMC_I2S_CH_SetBitOrderLsbFirst() : xmc_i2s.h
  • XMC_I2S_CH_SetBitOrderMsbFirst() : xmc_i2s.h
  • XMC_I2S_CH_SetFrameLength() : xmc_i2s.h
  • XMC_I2S_CH_SetInputSource() : xmc_i2s.h
  • XMC_I2S_CH_SetInterruptNodePointer() : xmc_i2s.h
  • XMC_I2S_CH_SetSystemWordLength() : xmc_i2s.h
  • XMC_I2S_CH_SetWordLength() : xmc_i2s.h
  • XMC_I2S_CH_Start() : xmc_i2s.h
  • XMC_I2S_CH_Stop() : xmc_i2s.h
  • XMC_I2S_CH_Transmit() : xmc_i2s.h
  • XMC_I2S_CH_TriggerServiceRequest() : xmc_i2s.h
  • XMC_I2S_CH_WordAddressSignalPolarity() : xmc_i2s.h
  • XMC_LEDTS_ClearInterruptFlag() : xmc_ledts.h
  • XMC_LEDTS_DisableInterrupt() : xmc_ledts.h
  • XMC_LEDTS_EnableInterrupt() : xmc_ledts.h
  • XMC_LEDTS_InitGlobal() : xmc_ledts.h
  • XMC_LEDTS_InitLED() : xmc_ledts.h
  • XMC_LEDTS_InitTSAdvanced() : xmc_ledts.h
  • XMC_LEDTS_InitTSBasic() : xmc_ledts.h
  • XMC_LEDTS_ReadFNCOL() : xmc_ledts.h
  • XMC_LEDTS_ReadInterruptFlag() : xmc_ledts.h
  • XMC_LEDTS_ReadTSVAL() : xmc_ledts.h
  • XMC_LEDTS_SetActivePADNo() : xmc_ledts.h
  • XMC_LEDTS_SetColumnBrightness() : xmc_ledts.h
  • XMC_LEDTS_SetCommonOscillationWindow() : xmc_ledts.h
  • XMC_LEDTS_SetLEDLinePattern() : xmc_ledts.h
  • XMC_LEDTS_SetNumOfLEDColumns() : xmc_ledts.h
  • XMC_LEDTS_SetOscillationWindow() : xmc_ledts.h
  • XMC_LEDTS_StartCounter() : xmc_ledts.h
  • XMC_LEDTS_StopCounter() : xmc_ledts.h
  • XMC_POSIF_ClearEvent() : xmc_posif.h
  • XMC_POSIF_Disable() : xmc_posif.h
  • XMC_POSIF_DisableEvent() : xmc_posif.h
  • XMC_POSIF_Enable() : xmc_posif.h
  • XMC_POSIF_EnableEvent() : xmc_posif.h
  • XMC_POSIF_GetEventStatus() : xmc_posif.h
  • XMC_POSIF_HSC_GetCurrentPattern() : xmc_posif.h
  • XMC_POSIF_HSC_GetExpectedPattern() : xmc_posif.h
  • XMC_POSIF_HSC_GetLastSampledPattern() : xmc_posif.h
  • XMC_POSIF_HSC_Init() : xmc_posif.h
  • XMC_POSIF_HSC_SetCurrentPattern() : xmc_posif.h
  • XMC_POSIF_HSC_SetExpectedPattern() : xmc_posif.h
  • XMC_POSIF_HSC_SetHallPatterns() : xmc_posif.h
  • XMC_POSIF_HSC_UpdateHallPattern() : xmc_posif.h
  • XMC_POSIF_Init() : xmc_posif.h
  • XMC_POSIF_IsRunning() : xmc_posif.h
  • XMC_POSIF_MCM_EnableMultiChannelPatternUpdate() : xmc_posif.h
  • XMC_POSIF_MCM_GetMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MCM_GetShadowMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MCM_Init() : xmc_posif.h
  • XMC_POSIF_MCM_SetMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MCM_UpdateMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_QD_GetCurrentIndexValue() : xmc_posif.h
  • XMC_POSIF_QD_GetCurrentState() : xmc_posif.h
  • XMC_POSIF_QD_GetDirection() : xmc_posif.h
  • XMC_POSIF_QD_GetPreviousState() : xmc_posif.h
  • XMC_POSIF_QD_Init() : xmc_posif.h
  • XMC_POSIF_SelectInputSource() : xmc_posif.h
  • XMC_POSIF_SetEvent() : xmc_posif.h
  • XMC_POSIF_SetInterruptNode() : xmc_posif.h
  • XMC_POSIF_SetMode() : xmc_posif.h
  • XMC_POSIF_Start() : xmc_posif.h
  • XMC_POSIF_Stop() : xmc_posif.h
  • XMC_PREFETCH_DisableInstructionBuffer() : xmc4_flash.h
  • XMC_PREFETCH_EnableInstructionBuffer() : xmc4_flash.h
  • XMC_PREFETCH_InvalidateInstructionBuffer() : xmc4_flash.h
  • XMC_RTC_ClearEvent() : xmc_rtc.h
  • XMC_RTC_Disable() : xmc_rtc.h
  • XMC_RTC_DisableEvent() : xmc_rtc.h
  • XMC_RTC_DisableHibernationWakeUp() : xmc4_rtc.h
  • XMC_RTC_Enable() : xmc_rtc.h
  • XMC_RTC_EnableEvent() : xmc_rtc.h
  • XMC_RTC_EnableHibernationWakeUp() : xmc4_rtc.h
  • XMC_RTC_GetAlarm() : xmc_rtc.h
  • XMC_RTC_GetAlarmStdFormat() : xmc_rtc.h
  • XMC_RTC_GetEventStatus() : xmc_rtc.h
  • XMC_RTC_GetPrescaler() : xmc_rtc.h
  • XMC_RTC_GetTime() : xmc_rtc.h
  • XMC_RTC_GetTimeStdFormat() : xmc_rtc.h
  • XMC_RTC_Init() : xmc_rtc.h
  • XMC_RTC_IsEnabled() : xmc_rtc.h
  • XMC_RTC_IsRunning() : xmc_rtc.h
  • XMC_RTC_SetAlarm() : xmc_rtc.h
  • XMC_RTC_SetAlarmStdFormat() : xmc_rtc.h
  • XMC_RTC_SetPrescaler() : xmc_rtc.h
  • XMC_RTC_SetTime() : xmc_rtc.h
  • XMC_RTC_SetTimeStdFormat() : xmc_rtc.h
  • XMC_RTC_Start() : xmc_rtc.h
  • XMC_RTC_Stop() : xmc_rtc.h
  • XMC_SCU_CalibrateTemperatureSensor() : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableClock() : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableHighPerformanceOscillator() : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableHighPerformanceOscillatorGeneralPurposeInput() : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableLowPowerOscillator() : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableLowPowerOscillatorGeneralPurposeInput() : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableSystemPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_DisableUsbPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableClock() : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableHighPerformanceOscillator() : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableHighPerformanceOscillatorGeneralPurposeInput() : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableLowPowerOscillator() : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput() : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableSystemPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_EnableUsbPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_GatePeripheralClock() : xmc_scu.h
  • XMC_SCU_CLOCK_GetCcuClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetCcuClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetCpuClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetCpuClockFrequency() : xmc_scu.h
  • XMC_SCU_CLOCK_GetEbuClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetEbuClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetECATClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetECATClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetEthernetClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetExternalOutputClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetExternalOutputClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetExternalOutputClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetHighPerformanceOscillatorGeneralPurposeInputStatus() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetLowPowerOscillatorGeneralPurposeInputStatus() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetPeripheralClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetPeripheralClockFrequency() : xmc_scu.h
  • XMC_SCU_CLOCK_GetSystemClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetSystemClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetSystemClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetSystemPllClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetSystemPllClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetSystemPllClockSourceFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetUsbClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetUsbClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetUsbClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetUsbPllClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetWdtClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetWdtClockFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_GetWdtClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_Init() : xmc_scu.h
  • XMC_SCU_CLOCK_IsClockEnabled() : xmc4_scu.h
  • XMC_SCU_CLOCK_IsHighPerformanceOscillatorStable() : xmc4_scu.h
  • XMC_SCU_CLOCK_IsLowPowerOscillatorStable() : xmc4_scu.h
  • XMC_SCU_CLOCK_IsPeripheralClockGated() : xmc_scu.h
  • XMC_SCU_CLOCK_IsSystemPllLocked() : xmc4_scu.h
  • XMC_SCU_CLOCK_IsUsbPllLocked() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetBackupClockCalibrationMode() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetCcuClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetCpuClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetDeepSleepConfig() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetEbuClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetECATClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetECATClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetExternalOutputClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetExternalOutputClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetPeripheralClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetSleepConfig() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetSystemClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetSystemClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetSystemPllClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetUsbClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetUsbClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetWdtClockDivider() : xmc4_scu.h
  • XMC_SCU_CLOCK_SetWdtClockSource() : xmc4_scu.h
  • XMC_SCU_CLOCK_StartSystemPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_StartUsbPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_StepSystemPllFrequency() : xmc4_scu.h
  • XMC_SCU_CLOCK_StopSystemPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_StopUsbPll() : xmc4_scu.h
  • XMC_SCU_CLOCK_UngatePeripheralClock() : xmc_scu.h
  • XMC_SCU_DisableOutOfRangeComparator() : xmc4_scu.h
  • XMC_SCU_DisableTemperatureSensor() : xmc4_scu.h
  • XMC_SCU_EnableOutOfRangeComparator() : xmc4_scu.h
  • XMC_SCU_EnableTemperatureSensor() : xmc4_scu.h
  • XMC_SCU_GetBootMode() : xmc4_scu.h
  • XMC_SCU_GetMirrorStatus() : xmc_scu.h
  • XMC_SCU_GetTemperatureMeasurement() : xmc4_scu.h
  • XMC_SCU_HIB_ClearEventStatus() : xmc4_scu.h
  • XMC_SCU_HIB_ClearWakeupEventDetectionStatus() : xmc4_scu.h
  • XMC_SCU_HIB_DisableEvent() : xmc4_scu.h
  • XMC_SCU_HIB_DisableHibernateDomain() : xmc4_scu.h
  • XMC_SCU_HIB_DisableInternalSlowClock() : xmc4_scu.h
  • XMC_SCU_HIB_EnableEvent() : xmc4_scu.h
  • XMC_SCU_HIB_EnableHibernateDomain() : xmc4_scu.h
  • XMC_SCU_HIB_EnableInternalSlowClock() : xmc4_scu.h
  • XMC_SCU_HIB_EnterHibernateState() : xmc4_scu.h
  • XMC_SCU_HIB_EnterHibernateStateEx() : xmc4_scu.h
  • XMC_SCU_HIB_GetEventStatus() : xmc4_scu.h
  • XMC_SCU_HIB_GetHibernateControlStatus() : xmc4_scu.h
  • XMC_SCU_HIB_GetRtcClockSource() : xmc4_scu.h
  • XMC_SCU_HIB_GetStdbyClockSource() : xmc4_scu.h
  • XMC_SCU_HIB_IsHibernateDomainEnabled() : xmc4_scu.h
  • XMC_SCU_HIB_IsWakeupEventDetected() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_ClearStatus() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_GetStatus() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_SetHIBIO0Thresholds() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_SetHIBIO1Thresholds() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_SetInput() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_SetTiming() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_SetTrigger() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_SetVBATThresholds() : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TriggerCompare() : xmc4_scu.h
  • XMC_SCU_HIB_SetInput0() : xmc4_scu.h
  • XMC_SCU_HIB_SetPinMode() : xmc4_scu.h
  • XMC_SCU_HIB_SetPinOutputLevel() : xmc4_scu.h
  • XMC_SCU_HIB_SetRtcClockSource() : xmc4_scu.h
  • XMC_SCU_HIB_SetSR0Input() : xmc4_scu.h
  • XMC_SCU_HIB_SetStandbyClockSource() : xmc4_scu.h
  • XMC_SCU_HIB_SetWakeupTriggerInput() : xmc4_scu.h
  • XMC_SCU_HIB_TriggerEvent() : xmc4_scu.h
  • XMC_SCU_HighTemperature() : xmc4_scu.h
  • XMC_SCU_INTERRUPT_ClearEventStatus() : xmc_scu.h
  • XMC_SCU_INTERRUPT_DisableEvent() : xmc_scu.h
  • XMC_SCU_INTERRUPT_DisableNmiRequest() : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EnableEvent() : xmc_scu.h
  • XMC_SCU_INTERRUPT_EnableNmiRequest() : xmc4_scu.h
  • XMC_SCU_INTERRUPT_SetEventHandler() : xmc_scu.h
  • XMC_SCU_INTERRUPT_TriggerEvent() : xmc_scu.h
  • XMC_SCU_INTERUPT_GetEventStatus() : xmc_scu.h
  • XMC_SCU_IRQHandler() : xmc_scu.h
  • XMC_SCU_IsTemperatureSensorBusy() : xmc4_scu.h
  • XMC_SCU_IsTemperatureSensorEnabled() : xmc4_scu.h
  • XMC_SCU_IsTemperatureSensorReady() : xmc4_scu.h
  • XMC_SCU_LowTemperature() : xmc4_scu.h
  • XMC_SCU_PARITY_ClearStatus() : xmc4_scu.h
  • XMC_SCU_PARITY_Disable() : xmc4_scu.h
  • XMC_SCU_PARITY_DisableTrapGeneration() : xmc4_scu.h
  • XMC_SCU_PARITY_Enable() : xmc4_scu.h
  • XMC_SCU_PARITY_EnableTrapGeneration() : xmc4_scu.h
  • XMC_SCU_PARITY_GetStatus() : xmc4_scu.h
  • XMC_SCU_POWER_DisableMonitor() : xmc4_scu.h
  • XMC_SCU_POWER_DisableUsb() : xmc4_scu.h
  • XMC_SCU_POWER_EnableMonitor() : xmc4_scu.h
  • XMC_SCU_POWER_EnableUsb() : xmc4_scu.h
  • XMC_SCU_POWER_GetEVR13Voltage() : xmc4_scu.h
  • XMC_SCU_POWER_GetEVR33Voltage() : xmc4_scu.h
  • XMC_SCU_POWER_GetEVRStatus() : xmc4_scu.h
  • XMC_SCU_POWER_WaitForEvent() : xmc4_scu.h
  • XMC_SCU_POWER_WaitForInterrupt() : xmc4_scu.h
  • XMC_SCU_ReadFromRetentionMemory() : xmc4_scu.h
  • XMC_SCU_ReadGPR() : xmc4_scu.h
  • XMC_SCU_RESET_AssertPeripheralReset() : xmc4_scu.h
  • XMC_SCU_RESET_ClearDeviceResetReason() : xmc_scu.h
  • XMC_SCU_RESET_DeassertPeripheralReset() : xmc4_scu.h
  • XMC_SCU_RESET_GetDeviceResetReason() : xmc_scu.h
  • XMC_SCU_RESET_IsPeripheralResetAsserted() : xmc4_scu.h
  • XMC_SCU_SetBootMode() : xmc4_scu.h
  • XMC_SCU_SetCcuTriggerHigh() : xmc_scu.h
  • XMC_SCU_SetCcuTriggerLow() : xmc_scu.h
  • XMC_SCU_SetRawTempLimits() : xmc4_scu.h
  • XMC_SCU_StartTemperatureMeasurement() : xmc4_scu.h
  • XMC_SCU_TRAP_ClearStatus() : xmc4_scu.h
  • XMC_SCU_TRAP_Disable() : xmc4_scu.h
  • XMC_SCU_TRAP_Enable() : xmc4_scu.h
  • XMC_SCU_TRAP_GetStatus() : xmc4_scu.h
  • XMC_SCU_TRAP_Trigger() : xmc4_scu.h
  • XMC_SCU_WriteGPR() : xmc4_scu.h
  • XMC_SCU_WriteToRetentionMemory() : xmc4_scu.h
  • XMC_SDMMC_BusPowerOff() : xmc_sdmmc.h
  • XMC_SDMMC_BusPowerOn() : xmc_sdmmc.h
  • XMC_SDMMC_ClearEvent() : xmc_sdmmc.h
  • XMC_SDMMC_Disable() : xmc_sdmmc.h
  • XMC_SDMMC_DisableDelayCmdDatLines() : xmc_sdmmc.h
  • XMC_SDMMC_DisableEvent() : xmc_sdmmc.h
  • XMC_SDMMC_DisableEventStatus() : xmc_sdmmc.h
  • XMC_SDMMC_DisableHighSpeed() : xmc_sdmmc.h
  • XMC_SDMMC_DisableInterruptAtBlockGap() : xmc_sdmmc.h
  • XMC_SDMMC_DisableWakeupEvent() : xmc_sdmmc.h
  • XMC_SDMMC_Enable() : xmc_sdmmc.h
  • XMC_SDMMC_EnableDelayCmdDatLines() : xmc_sdmmc.h
  • XMC_SDMMC_EnableEvent() : xmc_sdmmc.h
  • XMC_SDMMC_EnableEventStatus() : xmc_sdmmc.h
  • XMC_SDMMC_EnableHighSpeed() : xmc_sdmmc.h
  • XMC_SDMMC_EnableInterruptAtBlockGap() : xmc_sdmmc.h
  • XMC_SDMMC_EnableWakeupEvent() : xmc_sdmmc.h
  • XMC_SDMMC_GetACMDErrStatus() : xmc_sdmmc.h
  • XMC_SDMMC_GetAutoCommandResponse() : xmc_sdmmc.h
  • XMC_SDMMC_GetClockStability() : xmc_sdmmc.h
  • XMC_SDMMC_GetCommandResponse() : xmc_sdmmc.h
  • XMC_SDMMC_GetContinueRequest() : xmc_sdmmc.h
  • XMC_SDMMC_GetEvent() : xmc_sdmmc.h
  • XMC_SDMMC_GetPowerStatus() : xmc_sdmmc.h
  • XMC_SDMMC_GetPresentState() : xmc_sdmmc.h
  • XMC_SDMMC_GetR2Response() : xmc_sdmmc.h
  • XMC_SDMMC_GetSWResetStatus() : xmc_sdmmc.h
  • XMC_SDMMC_GetTransferBlocksNum() : xmc_sdmmc.h
  • XMC_SDMMC_Init() : xmc_sdmmc.h
  • XMC_SDMMC_IsAllDataLinesHigh() : xmc_sdmmc.h
  • XMC_SDMMC_IsAnyErrorEvent() : xmc_sdmmc.h
  • XMC_SDMMC_IsCommandLineBusy() : xmc_sdmmc.h
  • XMC_SDMMC_IsDataLineBusy() : xmc_sdmmc.h
  • XMC_SDMMC_ReadFIFO() : xmc_sdmmc.h
  • XMC_SDMMC_SDClockDisable() : xmc_sdmmc.h
  • XMC_SDMMC_SDClockEnable() : xmc_sdmmc.h
  • XMC_SDMMC_SDClockFreqSelect() : xmc_sdmmc.h
  • XMC_SDMMC_SendCommand() : xmc_sdmmc.h
  • XMC_SDMMC_SetBusVoltage() : xmc_sdmmc.h
  • XMC_SDMMC_SetCardDetectionSource() : xmc_sdmmc.h
  • XMC_SDMMC_SetCardDetectionStatus() : xmc_sdmmc.h
  • XMC_SDMMC_SetContinueRequest() : xmc_sdmmc.h
  • XMC_SDMMC_SetDataLineTimeout() : xmc_sdmmc.h
  • XMC_SDMMC_SetDataTransferDirection() : xmc_sdmmc.h
  • XMC_SDMMC_SetDataTransferMode() : xmc_sdmmc.h
  • XMC_SDMMC_SetDataTransferWidth() : xmc_sdmmc.h
  • XMC_SDMMC_SetDelay() : xmc_sdmmc.h
  • XMC_SDMMC_SetReadWaitControl() : xmc_sdmmc.h
  • XMC_SDMMC_SetStopAtBlockGap() : xmc_sdmmc.h
  • XMC_SDMMC_SetSWReset() : xmc_sdmmc.h
  • XMC_SDMMC_Start() : xmc_sdmmc.h
  • XMC_SDMMC_Stop() : xmc_sdmmc.h
  • XMC_SDMMC_TriggerACMDErr() : xmc_sdmmc.h
  • XMC_SDMMC_TriggerEvent() : xmc_sdmmc.h
  • XMC_SDMMC_WriteFIFO() : xmc_sdmmc.h
  • XMC_SPI_CH_ClearStatusFlag() : xmc_spi.h
  • XMC_SPI_CH_ConfigExternalInputSignalToBRG() : xmc_spi.h
  • XMC_SPI_CH_ConfigureShiftClockOutput() : xmc_spi.h
  • XMC_SPI_CH_DisableDataTransmission() : xmc_spi.h
  • XMC_SPI_CH_DisableDelayCompensation() : xmc_spi.h
  • XMC_SPI_CH_DisableEOF() : xmc_spi.h
  • XMC_SPI_CH_DisableEvent() : xmc_spi.h
  • XMC_SPI_CH_DisableFEM() : xmc_spi.h
  • XMC_SPI_CH_DisableInputInversion() : xmc_spi.h
  • XMC_SPI_CH_DisableInterwordDelay() : xmc_spi.h
  • XMC_SPI_CH_DisableMasterClock() : xmc_spi.h
  • XMC_SPI_CH_DisableSlaveSelect() : xmc_spi.h
  • XMC_SPI_CH_DisableSlaveSelectCodedMode() : xmc_spi.h
  • XMC_SPI_CH_DisableSOF() : xmc_spi.h
  • XMC_SPI_CH_EnableDataTransmission() : xmc_spi.h
  • XMC_SPI_CH_EnableDelayCompensation() : xmc_spi.h
  • XMC_SPI_CH_EnableEOF() : xmc_spi.h
  • XMC_SPI_CH_EnableEvent() : xmc_spi.h
  • XMC_SPI_CH_EnableFEM() : xmc_spi.h
  • XMC_SPI_CH_EnableInputInversion() : xmc_spi.h
  • XMC_SPI_CH_EnableInterwordDelay() : xmc_spi.h
  • XMC_SPI_CH_EnableMasterClock() : xmc_spi.h
  • XMC_SPI_CH_EnableSlaveSelect() : xmc_spi.h
  • XMC_SPI_CH_EnableSlaveSelectCodedMode() : xmc_spi.h
  • XMC_SPI_CH_EnableSOF() : xmc_spi.h
  • XMC_SPI_CH_GetReceivedData() : xmc_spi.h
  • XMC_SPI_CH_GetStatusFlag() : xmc_spi.h
  • XMC_SPI_CH_Init() : xmc_spi.h
  • XMC_SPI_CH_Receive() : xmc_spi.h
  • XMC_SPI_CH_SelectInterruptNodePointer() : xmc_spi.h
  • XMC_SPI_CH_SetBaudrate() : xmc_spi.h
  • XMC_SPI_CH_SetBitOrderLsbFirst() : xmc_spi.h
  • XMC_SPI_CH_SetBitOrderMsbFirst() : xmc_spi.h
  • XMC_SPI_CH_SetFrameLength() : xmc_spi.h
  • XMC_SPI_CH_SetInputSource() : xmc_spi.h
  • XMC_SPI_CH_SetInterruptNodePointer() : xmc_spi.h
  • XMC_SPI_CH_SetInterwordDelay() : xmc_spi.h
  • XMC_SPI_CH_SetInterwordDelaySCLK() : xmc_spi.h
  • XMC_SPI_CH_SetSlaveSelectDelay() : xmc_spi.h
  • XMC_SPI_CH_SetSlaveSelectPolarity() : xmc_spi.h
  • XMC_SPI_CH_SetTransmitMode() : xmc_spi.h
  • XMC_SPI_CH_SetWordLength() : xmc_spi.h
  • XMC_SPI_CH_Start() : xmc_spi.h
  • XMC_SPI_CH_Stop() : xmc_spi.h
  • XMC_SPI_CH_Transmit() : xmc_spi.h
  • XMC_SPI_CH_TriggerServiceRequest() : xmc_spi.h
  • XMC_UART_CH_ClearStatusFlag() : xmc_uart.h
  • XMC_UART_CH_DisableDataTransmission() : xmc_uart.h
  • XMC_UART_CH_DisableEvent() : xmc_uart.h
  • XMC_UART_CH_DisableInputDigitalFilter() : xmc_uart.h
  • XMC_UART_CH_DisableInputInversion() : xmc_uart.h
  • XMC_UART_CH_DisableInputSync() : xmc_uart.h
  • XMC_UART_CH_EnableDataTransmission() : xmc_uart.h
  • XMC_UART_CH_EnableEvent() : xmc_uart.h
  • XMC_UART_CH_EnableInputDigitalFilter() : xmc_uart.h
  • XMC_UART_CH_EnableInputInversion() : xmc_uart.h
  • XMC_UART_CH_EnableInputSync() : xmc_uart.h
  • XMC_UART_CH_GetReceivedData() : xmc_uart.h
  • XMC_UART_CH_GetStatusFlag() : xmc_uart.h
  • XMC_UART_CH_Init() : xmc_uart.h
  • XMC_UART_CH_SelectInterruptNodePointer() : xmc_uart.h
  • XMC_UART_CH_SetBaudrate() : xmc_uart.h
  • XMC_UART_CH_SetFrameLength() : xmc_uart.h
  • XMC_UART_CH_SetInputSamplingFreq() : xmc_uart.h
  • XMC_UART_CH_SetInputSource() : xmc_uart.h
  • XMC_UART_CH_SetInterruptNodePointer() : xmc_uart.h
  • XMC_UART_CH_SetPulseLength() : xmc_uart.h
  • XMC_UART_CH_SetSamplePoint() : xmc_uart.h
  • XMC_UART_CH_SetWordLength() : xmc_uart.h
  • XMC_UART_CH_Start() : xmc_uart.h
  • XMC_UART_CH_Stop() : xmc_uart.h
  • XMC_UART_CH_Transmit() : xmc_uart.h
  • XMC_UART_CH_TriggerServiceRequest() : xmc_uart.h
  • XMC_USBD_ClearEvent() : xmc_usbd.h
  • XMC_USBD_ClearEventINEP() : xmc_usbd.h
  • XMC_USBD_ClearEventOUTEP() : xmc_usbd.h
  • XMC_USBD_DeviceConnect() : xmc_usbd.h
  • XMC_USBD_DeviceDisconnect() : xmc_usbd.h
  • XMC_USBD_DeviceGetState() : xmc_usbd.h
  • XMC_USBD_DeviceSetAddress() : xmc_usbd.h
  • XMC_USBD_Disable() : xmc_usbd.h
  • XMC_USBD_Enable() : xmc_usbd.h
  • XMC_USBD_EnableEventINEP() : xmc_usbd.h
  • XMC_USBD_EnableEventOUTEP() : xmc_usbd.h
  • XMC_USBD_EndpointAbort() : xmc_usbd.h
  • XMC_USBD_EndpointConfigure() : xmc_usbd.h
  • XMC_USBD_EndpointRead() : xmc_usbd.h
  • XMC_USBD_EndpointReadStart() : xmc_usbd.h
  • XMC_USBD_EndpointStall() : xmc_usbd.h
  • XMC_USBD_EndpointUnconfigure() : xmc_usbd.h
  • XMC_USBD_EndpointWrite() : xmc_usbd.h
  • XMC_USBD_GetCapabilities() : xmc_usbd.h
  • XMC_USBD_GetFrameNumber() : xmc_usbd.h
  • XMC_USBD_Init() : xmc_usbd.h
  • XMC_USBD_IRQHandler() : xmc_usbd.h
  • XMC_USBD_IsEnumDone() : xmc_usbd.h
  • XMC_USBD_Uninitialize() : xmc_usbd.h
  • XMC_USBH_GetInterruptStatus() : xmc_usbh.h
  • XMC_USBH_HandleIrq() : xmc_usbh.h
  • XMC_USBH_osDelay() : xmc_usbh.h
  • XMC_USBH_Select_VBUS() : xmc_usbh.h
  • XMC_USBH_TurnOffResumeBit() : xmc_usbh.h
  • XMC_USIC_CH_ConfigExternalInputSignalToBRG() : xmc_usic.h
  • XMC_USIC_CH_ConfigureShiftClockOutput() : xmc_usic.h
  • XMC_USIC_CH_ConnectInputDataShiftToDataInput() : xmc_usic.h
  • XMC_USIC_CH_ConnectInputDataShiftToPPP() : xmc_usic.h
  • XMC_USIC_CH_Disable() : xmc_usic.h
  • XMC_USIC_CH_DisableDelayCompensation() : xmc_usic.h
  • XMC_USIC_CH_DisableEvent() : xmc_usic.h
  • XMC_USIC_CH_DisableFrameLengthControl() : xmc_usic.h
  • XMC_USIC_CH_DisableInputDigitalFilter() : xmc_usic.h
  • XMC_USIC_CH_DisableInputInversion() : xmc_usic.h
  • XMC_USIC_CH_DisableInputSync() : xmc_usic.h
  • XMC_USIC_CH_DisableTBUFDataValidTrigger() : xmc_usic.h
  • XMC_USIC_CH_DisableTimeMeasurement() : xmc_usic.h
  • XMC_USIC_CH_Enable() : xmc_usic.h
  • XMC_USIC_CH_EnableDelayCompensation() : xmc_usic.h
  • XMC_USIC_CH_EnableEvent() : xmc_usic.h
  • XMC_USIC_CH_EnableFrameLengthControl() : xmc_usic.h
  • XMC_USIC_CH_EnableInputDigitalFilter() : xmc_usic.h
  • XMC_USIC_CH_EnableInputInversion() : xmc_usic.h
  • XMC_USIC_CH_EnableInputSync() : xmc_usic.h
  • XMC_USIC_CH_EnableTBUFDataValidTrigger() : xmc_usic.h
  • XMC_USIC_CH_EnableTimeMeasurement() : xmc_usic.h
  • XMC_USIC_CH_GetCaptureTimerValue() : xmc_usic.h
  • XMC_USIC_CH_GetReceiveBufferStatus() : xmc_usic.h
  • XMC_USIC_CH_GetTransmitBufferStatus() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_ClearEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_Configure() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_DisableEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EnableEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_Flush() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_GetData() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_GetEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_GetLevel() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_IsEmpty() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_IsFull() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_SetInterruptNodePointer() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit() : xmc_usic.h
  • XMC_USIC_CH_SetBaudrate() : xmc_usic.h
  • XMC_USIC_CH_SetBRGInputClockSource() : xmc_usic.h
  • XMC_USIC_CH_SetDataOutputMode() : xmc_usic.h
  • XMC_USIC_CH_SetFractionalDivider() : xmc_usic.h
  • XMC_USIC_CH_SetFrameLength() : xmc_usic.h
  • XMC_USIC_CH_SetInputSamplingFreq() : xmc_usic.h
  • XMC_USIC_CH_SetInputSource() : xmc_usic.h
  • XMC_USIC_CH_SetInputTriggerCombinationMode() : xmc_usic.h
  • XMC_USIC_CH_SetInterruptNodePointer() : xmc_usic.h
  • XMC_USIC_CH_SetMclkOutputPassiveLevel() : xmc_usic.h
  • XMC_USIC_CH_SetMode() : xmc_usic.h
  • XMC_USIC_CH_SetPassiveDataLevel() : xmc_usic.h
  • XMC_USIC_CH_SetShiftDirection() : xmc_usic.h
  • XMC_USIC_CH_SetStartTransmisionMode() : xmc_usic.h
  • XMC_USIC_CH_SetTransmitBufferStatus() : xmc_usic.h
  • XMC_USIC_CH_SetWordLength() : xmc_usic.h
  • XMC_USIC_CH_TriggerServiceRequest() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_ClearEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_Configure() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_DisableEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EnableEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_Flush() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_GetEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_GetLevel() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_IsEmpty() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_IsFull() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_PutData() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_PutDataFLEMode() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_PutDataHPCMode() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_SetInterruptNodePointer() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit() : xmc_usic.h
  • XMC_USIC_CH_WriteToTBUF() : xmc_usic.h
  • XMC_USIC_CH_WriteToTBUFTCI() : xmc_usic.h
  • XMC_USIC_Disable() : xmc_usic.h
  • XMC_USIC_Enable() : xmc_usic.h
  • XMC_USIC_IsChannelValid() : xmc_usic.h
  • XMC_USIC_IsModuleValid() : xmc_usic.h
  • XMC_VADC_GLOBAL_BackgndAddMultipleChannels() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgndRemoveMultipleChannels() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundAbortSequence() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundAddChannelToSequence() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundClearReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundDisableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundDisableEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundEnableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundEnableEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundGetReqSrcEventStatus() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundIsChannelPending() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundRemoveChannelFromSequence() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSelectGating() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSelectTrigger() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSetGatingMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundTriggerConversion() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundTriggerReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BindGroupToEMux() : xmc_vadc.h
  • XMC_VADC_GLOBAL_ClearEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_ClockInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableModule() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableModuleClock() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisablePostCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableSleepMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableStartupCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnableModule() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnableModuleClock() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnablePostCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnableSleepMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_GetCompareResult() : xmc_vadc.h
  • XMC_VADC_GLOBAL_GetDetailedResult() : xmc_vadc.h
  • XMC_VADC_GLOBAL_GetResult() : xmc_vadc.h
  • XMC_VADC_GLOBAL_Init() : xmc_vadc.h
  • XMC_VADC_GLOBAL_InputClassInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_ResultInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetBoundaries() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetCompareValue() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetIndividualBoundary() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetResultEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_StartupCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_TriggerEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_AddResultToFifo() : xmc_vadc.h
  • XMC_VADC_GROUP_BackgroundDisableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_BackgroundEnableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelClearEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetAssertedEvents() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetInputClass() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetResultAlignment() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetResultRegister() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelInit() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelIsResultOutOfBounds() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetBoundarySelection() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetIclass() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetInputReference() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetResultRegister() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelTriggerEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelTriggerEventGenCriteria() : xmc_vadc.h
  • XMC_VADC_GROUP_CheckSlaveReadiness() : xmc_vadc.h
  • XMC_VADC_GROUP_ClearResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_DisableChannelSyncRequest() : xmc_vadc.h
  • XMC_VADC_GROUP_DisableResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_EnableChannelSyncRequest() : xmc_vadc.h
  • XMC_VADC_GROUP_EnableResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ExternalMuxControlInit() : xmc_vadc.h
  • XMC_VADC_GROUP_GetAlias() : xmc_vadc.h
  • XMC_VADC_GROUP_GetAssertedResultEvents() : xmc_vadc.h
  • XMC_VADC_GROUP_GetDetailedResult() : xmc_vadc.h
  • XMC_VADC_GROUP_GetFastCompareResult() : xmc_vadc.h
  • XMC_VADC_GROUP_GetInputClass() : xmc_vadc.h
  • XMC_VADC_GROUP_GetResult() : xmc_vadc.h
  • XMC_VADC_GROUP_GetResultFifoHead() : xmc_vadc.h
  • XMC_VADC_GROUP_GetResultFifoTail() : xmc_vadc.h
  • XMC_VADC_GROUP_GetSyncReadySignal() : xmc_vadc.h
  • XMC_VADC_GROUP_IgnoreSlaveReadiness() : xmc_vadc.h
  • XMC_VADC_GROUP_Init() : xmc_vadc.h
  • XMC_VADC_GROUP_InputClassInit() : xmc_vadc.h
  • XMC_VADC_GROUP_IsConverterBusy() : xmc_vadc.h
  • XMC_VADC_GROUP_IsResultRegisterFifoHead() : xmc_vadc.h
  • XMC_VADC_GROUP_IsResultRegisterInFifo() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueAbortSequence() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueClearReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueDisableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueDisableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueEnableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueEnableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueFlushEntries() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetInterruptedChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetLength() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetNextChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetReqSrcEventStatus() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueInit() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueInsertChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueIsArbitrationSlotEnabled() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueRemoveChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSelectGating() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSelectTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSelectTriggerEdge() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSetGatingMode() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueTriggerConversion() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueTriggerReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ResultInit() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanAddChannelToSequence() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanAddMultipleChannels() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanClearReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanGetNumChannelsPending() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanGetReqSrcEventStatus() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanInit() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanIsArbitrationSlotEnabled() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanIsChannelPending() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanRemoveChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSelectGating() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSelectTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSelectTriggerEdge() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSequenceAbort() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSetGatingMode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanTriggerConversion() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanTriggerReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_SetBoundaries() : xmc_vadc.h
  • XMC_VADC_GROUP_SetBoundaryEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_SetChannelAlias() : xmc_vadc.h
  • XMC_VADC_GROUP_SetIndividualBoundary() : xmc_vadc.h
  • XMC_VADC_GROUP_SetPowerMode() : xmc_vadc.h
  • XMC_VADC_GROUP_SetResultFastCompareValue() : xmc_vadc.h
  • XMC_VADC_GROUP_SetResultInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_SetResultSubtractionValue() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncMaster() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncReadySignal() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncSlave() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncSlaveReadySignal() : xmc_vadc.h
  • XMC_VADC_GROUP_TriggerResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_TriggerServiceRequest() : xmc_vadc.h
  • XMC_WDT_ClearAlarm() : xmc_wdt.h
  • XMC_WDT_Disable() : xmc_wdt.h
  • XMC_WDT_Enable() : xmc_wdt.h
  • XMC_WDT_GetCounter() : xmc_wdt.h
  • XMC_WDT_Init() : xmc_wdt.h
  • XMC_WDT_Service() : xmc_wdt.h
  • XMC_WDT_SetDebugMode() : xmc_wdt.h
  • XMC_WDT_SetMode() : xmc_wdt.h
  • XMC_WDT_SetServicePulseWidth() : xmc_wdt.h
  • XMC_WDT_SetWindowBounds() : xmc_wdt.h
  • XMC_WDT_Start() : xmc_wdt.h
  • XMC_WDT_Stop() : xmc_wdt.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • Driver_USBD0 : xmc_usbd.h
  • xmc_device : xmc_usbd.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • XMC_CAN_NODE_t : xmc_can.h
  • XMC_CAN_t : xmc_can.h
  • XMC_CCU4_MODULE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_INPUT_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_t : xmc_ccu4.h
  • XMC_CCU8_MODULE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_INPUT_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_t : xmc_ccu8.h
  • XMC_DMA_CH_EVENT_HANDLER_t : xmc_dma.h
  • XMC_DMA_LIST_t : xmc_dma.h
  • XMC_DSD_CH_t : xmc_dsd.h
  • XMC_DSD_t : xmc_dsd.h
  • XMC_FCE_Kernel_t : xmc_fce.h
  • XMC_HRPWM_CSG_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_t : xmc_hrpwm.h
  • XMC_HRPWM_t : xmc_hrpwm.h
  • XMC_LEDTS_t : xmc_ledts.h
  • XMC_POSIF_t : xmc_posif.h
  • XMC_SCU_INTERRUPT_EVENT_HANDLER_t : xmc_scu.h
  • XMC_SCU_INTERRUPT_EVENT_t : xmc4_scu.h
  • XMC_USBD_SignalDeviceEvent_t : xmc_usbd.h
  • XMC_USBD_SignalEndpointEvent_t : xmc_usbd.h
  • XMC_USBH_PIPE_HANDLE : xmc_usbh.h
  • XMC_USBH_SignalPipeEvent_t : xmc_usbh.h
  • XMC_USBH_SignalPortEvent_t : xmc_usbh.h
  • XMC_USIC_t : xmc_usic.h
  • XMC_VADC_BACKGROUND_CONFIG_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_t : xmc_vadc.h
  • XMC_VADC_GROUP_t : xmc_vadc.h
  • XMC_VADC_RESULT_SIZE_t : xmc_vadc.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • x

- x -

  • XMC_CAN_ARBITRATION_MODE_t : xmc_can.h
  • XMC_CAN_CANCLKSRC_t : xmc_can.h
  • XMC_CAN_DM_t : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE_t : xmc_can.h
  • XMC_CAN_FRAME_TYPE_t : xmc_can.h
  • XMC_CAN_LOOKBACKMODE_t : xmc_can.h
  • XMC_CAN_MO_EVENT_t : xmc_can.h
  • XMC_CAN_MO_POINTER_EVENT_t : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_t : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_t : xmc_can.h
  • XMC_CAN_MO_STATUS_t : xmc_can.h
  • XMC_CAN_MO_TYPE_t : xmc_can.h
  • XMC_CAN_NODE_CONTROL_t : xmc_can.h
  • XMC_CAN_NODE_EVENT_t : xmc_can.h
  • XMC_CAN_NODE_INTERRUPT_TRIGGER_t : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_DIR_t : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_INC_t : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_t : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_t : xmc_can.h
  • XMC_CAN_NODE_STATUS_t : xmc_can.h
  • XMC_CAN_PANCMD_t : xmc_can.h
  • XMC_CAN_STATUS_t : xmc_can.h
  • XMC_CCU4_CLOCK_t : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_t : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_CAP_REG_SET_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODULATION_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_START_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_DIR_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TRAP_EXIT_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_t : xmc_ccu4.h
  • XMC_CCU4_STATUS_t : xmc_ccu4.h
  • XMC_CCU8_CLOCK_t : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_t : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_t : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_CAP_REG_SET_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_COMPARE_CHANNEL_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_START_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_DIR_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TRAP_EXIT_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_t : xmc_ccu8.h
  • XMC_CCU8_STATUS_t : xmc_ccu8.h
  • XMC_DAC_CH_DATA_TYPE_t : xmc_dac.h
  • XMC_DAC_CH_MODE_t : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_NEGATION_t : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_t : xmc_dac.h
  • XMC_DAC_CH_PATTERN_SIGN_OUTPUT_t : xmc_dac.h
  • XMC_DAC_CH_STATUS_t : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_t : xmc_dac.h
  • XMC_DMA_CH_ADDRESS_COUNT_MODE_t : xmc_dma.h
  • XMC_DMA_CH_BURST_LENGTH_t : xmc_dma.h
  • XMC_DMA_CH_DST_HANDSHAKING_t : xmc_dma.h
  • XMC_DMA_CH_EVENT_t : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_t : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_t : xmc_dma.h
  • XMC_DMA_CH_SRC_HANDSHAKING_t : xmc_dma.h
  • XMC_DMA_CH_STATUS_t : xmc_dma.h
  • XMC_DMA_CH_TRANSACTION_TYPE_t : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_t : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_t : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_WIDTH_t : xmc_dma.h
  • XMC_DSD_CH_AUX_EVENT_t : xmc_dsd.h
  • XMC_DSD_CH_CLK_t : xmc_dsd.h
  • XMC_DSD_CH_CLOCK_SOURCE_t : xmc_dsd.h
  • XMC_DSD_CH_DATA_SOURCE_t : xmc_dsd.h
  • XMC_DSD_CH_FILTER_TYPE_t : xmc_dsd.h
  • XMC_DSD_CH_ID_t : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_START_t : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_STOP_t : xmc_dsd.h
  • XMC_DSD_CH_RESULT_EVENT_t : xmc_dsd.h
  • XMC_DSD_CH_SIGN_SOURCE_t : xmc_dsd.h
  • XMC_DSD_CH_STROBE_t : xmc_dsd.h
  • XMC_DSD_CH_TIMESTAMP_TRIGGER_t : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_t : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_t : xmc_dsd.h
  • XMC_DSD_GENERATOR_MODE_t : xmc_dsd.h
  • XMC_DSD_STATUS_t : xmc_dsd.h
  • XMC_EBU_ADDRESS_SELECT_t : xmc_ebu.h
  • XMC_EBU_ALE_MODE_t : xmc_ebu.h
  • XMC_EBU_ARB_MODE_t : xmc_ebu.h
  • XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_t : xmc_ebu.h
  • XMC_EBU_BURST_ADDRESS_WRAPPING_t : xmc_ebu.h
  • XMC_EBU_BURST_BUFFER_SYNC_MODE_t : xmc_ebu.h
  • XMC_EBU_BURST_FLASH_CLOCK_FEEDBACK_t : xmc_ebu.h
  • XMC_EBU_BURST_FLASH_CLOCK_MODE_t : xmc_ebu.h
  • XMC_EBU_BURST_LENGTH_SYNC_t : xmc_ebu.h
  • XMC_EBU_BURST_SIGNAL_SYNC_BURST_t : xmc_ebu.h
  • XMC_EBU_BUSWCON_SELECT_t : xmc_ebu.h
  • XMC_EBU_BYTE_CONTROL_t : xmc_ebu.h
  • XMC_EBU_CLK_MODE_t : xmc_ebu.h
  • XMC_EBU_CLK_STATUS_t : xmc_ebu.h
  • XMC_EBU_CLOCK_DIVIDE_RATIO_t : xmc_ebu.h
  • XMC_EBU_DEVICE_ADDRESSING_MODE_t : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_t : xmc_ebu.h
  • XMC_EBU_DIV2_CLK_MODE_t : xmc_ebu.h
  • XMC_EBU_EARLY_CHIP_SELECT_SYNC_BURST_t : xmc_ebu.h
  • XMC_EBU_EXT_DATA_t : xmc_ebu.h
  • XMC_EBU_FLASH_NON_ARRAY_ACCESS_t : xmc_ebu.h
  • XMC_EBU_FREQ_EXT_CLK_PIN_t : xmc_ebu.h
  • XMC_EBU_LOCK_CHIP_SELECT_t : xmc_ebu.h
  • XMC_EBU_READ_STAGES_SYNC_t : xmc_ebu.h
  • XMC_EBU_SDRAM_BURST_LENGTH_t : xmc_ebu.h
  • XMC_EBU_SDRAM_CAS_LATENCY_t : xmc_ebu.h
  • XMC_EBU_SDRAM_CLK_MODE_t : xmc_ebu.h
  • XMC_EBU_SDRAM_CLK_OUTPUT_t : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_t : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_t : xmc_ebu.h
  • XMC_EBU_SDRAM_PWR_MODE_t : xmc_ebu.h
  • XMC_EBU_SDRAM_RFRSH_STATUS_t : xmc_ebu.h
  • XMC_EBU_SDRAM_STATUS_t : xmc_ebu.h
  • XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_t : xmc_ebu.h
  • XMC_EBU_STATUS_t : xmc_ebu.h
  • XMC_EBU_WAIT_CONTROL_t : xmc_ebu.h
  • XMC_EBU_WAIT_SIGNAL_POLARITY_t : xmc_ebu.h
  • XMC_ECAT_EVENT_t : xmc_ecat.h
  • XMC_ECAT_STATUS_t : xmc_ecat.h
  • XMC_ERU_ETL_EDGE_DETECTION_t : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A_t : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B_t : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_t : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_t : xmc_eru.h
  • XMC_ERU_ETL_STATUS_FLAG_MODE_t : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_t : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER_t : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_t : xmc_eru.h
  • XMC_ETH_LINK_DUPLEX_t : xmc_eth_mac.h
  • XMC_ETH_LINK_INTERFACE_t : xmc_eth_mac.h
  • XMC_ETH_LINK_SPEED_t : xmc_eth_mac.h
  • XMC_ETH_LINK_STATUS_t : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_t : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_t : xmc_eth_mac.h
  • XMC_ETH_MAC_PMT_EVENT_t : xmc_eth_mac.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_RMII_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_TX_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_COL_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_DV_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MDIO_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MODE_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD0_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD1_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD2_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD3_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXER_t : xmc_eth_mac_map.h
  • XMC_ETH_MAC_STATUS_t : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_t : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_STATUS_t : xmc_eth_mac.h
  • XMC_ETH_MAC_TX_FRAME_t : xmc_eth_mac.h
  • XMC_ETH_PHY_STATUS_t : xmc_eth_phy.h
  • XMC_FCE_CONFIG_ALGO_t : xmc_fce.h
  • XMC_FCE_CONFIG_INTERRUPT_t : xmc_fce.h
  • XMC_FCE_CONFIG_OPERATION_t : xmc_fce.h
  • XMC_FCE_CTR_TEST_t : xmc_fce.h
  • XMC_FCE_STATUS_t : xmc_fce.h
  • XMC_FCE_STS_FLAG_t : xmc_fce.h
  • XMC_FLASH_EVENT_t : xmc4_flash.h
  • XMC_FLASH_MARGIN_t : xmc4_flash.h
  • XMC_FLASH_PROTECTION_t : xmc4_flash.h
  • XMC_FLASH_STATUS_t : xmc4_flash.h
  • XMC_GPIO_HWCTRL_t : xmc_gpio.h
  • XMC_GPIO_MODE_t : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_LEVEL_t : xmc_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_t : xmc4_gpio.h
  • XMC_HRPWM_CLK_FREQ_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_INPUT_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INPUT_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INVERTING_INPUT_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_EDGE_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_SR_LINE_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_LVL_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_POWER_MODE_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_CLR_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_DIVISION_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_START_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_STOP_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_START_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STATUS_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STOP_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLICE_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_CTRL_MODE_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_START_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_STOP_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_START_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STEP_GAIN_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STOP_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWITCH_CMP_INPUT_t : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWSM_t : xmc_hrpwm.h
  • XMC_HRPWM_DAC_SLOPE_GEN_STATUS_t : xmc_hrpwm.h
  • XMC_HRPWM_FUNC_STATUS_t : xmc_hrpwm.h
  • XMC_HRPWM_HR_LOGIC_t : xmc_hrpwm.h
  • XMC_HRPWM_HR_PATH_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_CMP_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_DT_TR_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_HR_EDGE_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_OUT_PASSIVE_LVL_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SOURCE_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_EDGE_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_INPUT_t : xmc_hrpwm.h
  • XMC_HRPWM_HRC_TIMER_SEL_t : xmc_hrpwm.h
  • XMC_HRPWM_LR_PATH_t : xmc_hrpwm.h
  • XMC_HRPWM_SHADOW_TX_DAC_t : xmc_hrpwm.h
  • XMC_HRPWM_STATUS_t : xmc_hrpwm.h
  • XMC_I2C_CH_CMD_t : xmc_i2c.h
  • XMC_I2C_CH_EVENT_t : xmc_i2c.h
  • XMC_I2C_CH_INPUT_t : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_t : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_t : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_t : xmc_i2c.h
  • XMC_I2C_CH_STATUS_t : xmc_i2c.h
  • XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t : xmc_i2s.h
  • XMC_I2S_CH_BUS_MODE_t : xmc_i2s.h
  • XMC_I2S_CH_CHANNEL_t : xmc_i2s.h
  • XMC_I2S_CH_EVENT_t : xmc_i2s.h
  • XMC_I2S_CH_INPUT_t : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_t : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_t : xmc_i2s.h
  • XMC_I2S_CH_STATUS_t : xmc_i2s.h
  • XMC_I2S_CH_WA_POLARITY_t : xmc_i2s.h
  • XMC_LEDTS_ACCUMULATION_COUNT_t : xmc_ledts.h
  • XMC_LEDTS_ACTIVE_LEVEL_LED_COL_t : xmc_ledts.h
  • XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_t : xmc_ledts.h
  • XMC_LEDTS_CLOCK_TYPE_t : xmc_ledts.h
  • XMC_LEDTS_COMMON_COMPARE_t : xmc_ledts.h
  • XMC_LEDTS_EXT_PULLUP_COLA_t : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_t : xmc_ledts.h
  • XMC_LEDTS_FLAG_STATUS_t : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_t : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_t : xmc_ledts.h
  • XMC_LEDTS_LED_FUNC_t : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_t : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_t : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_SW_CONTROL_t : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_t : xmc_ledts.h
  • XMC_LEDTS_STATUS_t : xmc_ledts.h
  • XMC_LEDTS_SUSPEND_t : xmc_ledts.h
  • XMC_LEDTS_TF_INTERRUPT_FLAG_t : xmc_ledts.h
  • XMC_LEDTS_TF_VALIDATION_t : xmc_ledts.h
  • XMC_LEDTS_TP_SYNC_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_AUTO_RESET_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_SATURATION_t : xmc_ledts.h
  • XMC_LEDTS_TS_FUNC_t : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_t : xmc_ledts.h
  • XMC_LEDTS_TS_INTERRUPT_FLAG_t : xmc_ledts.h
  • XMC_POSIF_FILTER_t : xmc_posif.h
  • XMC_POSIF_HSC_TRIGGER_EDGE_t : xmc_posif.h
  • XMC_POSIF_INPUT_ACTIVE_LEVEL_t : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_t : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_t : xmc_posif.h
  • XMC_POSIF_MODE_t : xmc_posif.h
  • XMC_POSIF_QD_DIR_t : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_t : xmc_posif.h
  • XMC_POSIF_QD_MODE_t : xmc_posif.h
  • XMC_POSIF_SR_ID_t : xmc_posif.h
  • XMC_POSIF_STATUS_t : xmc_posif.h
  • XMC_RTC_EVENT_t : xmc_rtc.h
  • XMC_RTC_MONTH_t : xmc_rtc.h
  • XMC_RTC_STATUS_t : xmc_rtc.h
  • XMC_RTC_WAKEUP_EVENT_t : xmc4_rtc.h
  • XMC_RTC_WEEKDAY_t : xmc_rtc.h
  • XMC_SCU_BOOTMODE_t : xmc4_scu.h
  • XMC_SCU_CCU_TRIGGER_t : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_t : xmc4_scu.h
  • XMC_SCU_CLOCK_ECATCLKSRC_t : xmc4_scu.h
  • XMC_SCU_CLOCK_EXTOUTCLKSRC_t : xmc4_scu.h
  • XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_t : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_t : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSCLKSRC_t : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLL_MODE_t : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLLCLKSRC_t : xmc4_scu.h
  • XMC_SCU_CLOCK_t : xmc4_scu.h
  • XMC_SCU_CLOCK_USBCLKSRC_t : xmc4_scu.h
  • XMC_SCU_CLOCK_WDTCLKSRC_t : xmc4_scu.h
  • XMC_SCU_HIB_CTRL_STATUS_t : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_t : xmc4_scu.h
  • XMC_SCU_HIB_HIBERNATE_MODE_t : xmc4_scu.h
  • XMC_SCU_HIB_IO_OUTPUT_LEVEL_t : xmc4_scu.h
  • XMC_SCU_HIB_IO_t : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_INPUT_t : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_t : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_t : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_t : xmc4_scu.h
  • XMC_SCU_HIB_RTCCLKSRC_t : xmc4_scu.h
  • XMC_SCU_HIB_SR0_INPUT_t : xmc4_scu.h
  • XMC_SCU_HIB_STDBYCLKSRC_t : xmc4_scu.h
  • XMC_SCU_NMIREQ_t : xmc4_scu.h
  • XMC_SCU_PARITY_t : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_t : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_t : xmc4_scu.h
  • XMC_SCU_POWER_EVR_STATUS_t : xmc4_scu.h
  • XMC_SCU_POWER_MODE_t : xmc4_scu.h
  • XMC_SCU_RESET_REASON_t : xmc4_scu.h
  • XMC_SCU_STATUS_t : xmc_scu.h
  • XMC_SCU_TRAP_t : xmc4_scu.h
  • XMC_SDMMC_ACMD_ERR_t : xmc_sdmmc.h
  • XMC_SDMMC_BUS_VOLTAGE_t : xmc_sdmmc.h
  • XMC_SDMMC_CD_SOURCE_t : xmc_sdmmc.h
  • XMC_SDMMC_CD_STATUS_t : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_RESPONSE_t : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_TYPE_t : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_t : xmc_sdmmc.h
  • XMC_SDMMC_DATA_LINES_t : xmc_sdmmc.h
  • XMC_SDMMC_DATA_TRANSFER_DIR_t : xmc_sdmmc.h
  • XMC_SDMMC_EVENT_t : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_t : xmc_sdmmc.h
  • XMC_SDMMC_SDCLK_FREQ_SEL_t : xmc_sdmmc.h
  • XMC_SDMMC_STATUS_t : xmc_sdmmc.h
  • XMC_SDMMC_SW_RESET_t : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_AUTO_CMD_t : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_TYPE_t : xmc_sdmmc.h
  • XMC_SDMMC_WAKEUP_EVENT_t : xmc_sdmmc.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t : xmc_spi.h
  • XMC_SPI_CH_BUS_MODE_t : xmc_spi.h
  • XMC_SPI_CH_DATA_POLARITY_t : xmc_spi.h
  • XMC_SPI_CH_EVENT_t : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_t : xmc_spi.h
  • XMC_SPI_CH_INPUT_t : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_t : xmc_spi.h
  • XMC_SPI_CH_MODE_t : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_t : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_t : xmc_spi.h
  • XMC_SPI_CH_STATUS_t : xmc_spi.h
  • XMC_UART_CH_EVENT_t : xmc_uart.h
  • XMC_UART_CH_INPUT_SAMPLING_FREQ_t : xmc_uart.h
  • XMC_UART_CH_INPUT_t : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_t : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_t : xmc_uart.h
  • XMC_UART_CH_STATUS_t : xmc_uart.h
  • XMC_USBD_ENDPOINT_TYPE_t : xmc_usbd.h
  • XMC_USBD_EP_EVENT_t : xmc_usbd.h
  • XMC_USBD_EVENT_IN_EP_t : xmc_usbd.h
  • XMC_USBD_EVENT_OUT_EP_t : xmc_usbd.h
  • XMC_USBD_EVENT_t : xmc_usbd.h
  • XMC_USBD_GRXSTS_PKTSTS_t : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_t : xmc_usbd.h
  • XMC_USBD_SET_ADDRESS_STAGE_t : xmc_usbd.h
  • XMC_USBD_STATUS_t : xmc_usbd.h
  • XMC_USBD_TRANSFER_MODE_t : xmc_usbd.h
  • XMC_USBH_POWER_STATE_t : xmc_usbh.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_SOURCE_t : xmc_usic.h
  • XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_t : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_t : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t : xmc_usic.h
  • XMC_USIC_CH_DATA_OUTPUT_MODE_t : xmc_usic.h
  • XMC_USIC_CH_EVENT_t : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_t : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_t : xmc_usic.h
  • XMC_USIC_CH_INPUT_SAMPLING_FREQ_t : xmc_usic.h
  • XMC_USIC_CH_INPUT_t : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_t : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_t : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_t : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_t : xmc_usic.h
  • XMC_USIC_CH_PASSIVE_DATA_LEVEL_t : xmc_usic.h
  • XMC_USIC_CH_RBUF_STATUS_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_t : xmc_usic.h
  • XMC_USIC_CH_SHIFT_DIRECTION_t : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_MODE_t : xmc_usic.h
  • XMC_USIC_CH_STATUS_t : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_SET_t : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_t : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_CONF_t : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_t : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_t : xmc_usic.h
  • XMC_VADC_BOUNDARY_NODE_t : xmc_vadc.h
  • XMC_VADC_BOUNDARY_SELECT_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_ALIAS_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BWDCH_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_REF_t : xmc_vadc.h
  • XMC_VADC_CONVMODE_t : xmc_vadc.h
  • XMC_VADC_DMM_t : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_t : xmc_vadc.h
  • XMC_VADC_GATE_INPUT_SELECT_t : xmc_vadc.h
  • XMC_VADC_GATEMODE_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_EVENT_t : xmc_vadc.h
  • XMC_VADC_GROUP_ARBMODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_CONV_t : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXCODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_INDEX_t : xmc_vadc.h
  • XMC_VADC_GROUP_IRQ_t : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_t : xmc_vadc.h
  • XMC_VADC_GROUP_STATE_t : xmc_vadc.h
  • XMC_VADC_RESULT_ALIGN_t : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_t : xmc_vadc.h
  • XMC_VADC_SCAN_LOAD_t : xmc_vadc.h
  • XMC_VADC_SCAN_TYPE_t : xmc_vadc.h
  • XMC_VADC_SR_t : xmc_vadc.h
  • XMC_VADC_STARTMODE_t : xmc_vadc.h
  • XMC_VADC_STATUS_t : xmc_vadc.h
  • XMC_VADC_SYNCTR_EVAL_t : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_t : xmc_vadc.h
  • XMC_VADC_TRIGGER_INPUT_SELECT_t : xmc_vadc.h
  • XMC_WDT_DEBUG_MODE_t : xmc_wdt.h
  • XMC_WDT_MODE_t : xmc_wdt.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • x

- x -

  • XMC_CAN_ARBITRATION_MODE_IDE_DIR_BASED_PRIO_2 : xmc_can.h
  • XMC_CAN_ARBITRATION_MODE_ORDER_BASED_PRIO_1 : xmc_can.h
  • XMC_CAN_ARBITRATION_MODE_ORDER_BASED_PRIO_3 : xmc_can.h
  • XMC_CAN_DM_FRACTIONAL : xmc_can.h
  • XMC_CAN_DM_NORMAL : xmc_can.h
  • XMC_CAN_DM_OFF : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE_BIT_TIMING : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE_TIME_STAMP : xmc_can.h
  • XMC_CAN_FRAME_TYPE_EXTENDED_29BITS : xmc_can.h
  • XMC_CAN_FRAME_TYPE_STANDARD_11BITS : xmc_can.h
  • XMC_CAN_LOOKBACKMODE_DISABLED : xmc_can.h
  • XMC_CAN_LOOKBACKMODE_ENABLED : xmc_can.h
  • XMC_CAN_MO_EVENT_OVERFLOW : xmc_can.h
  • XMC_CAN_MO_EVENT_RECEIVE : xmc_can.h
  • XMC_CAN_MO_EVENT_TRANSMIT : xmc_can.h
  • XMC_CAN_MO_POINTER_EVENT_RECEIVE : xmc_can.h
  • XMC_CAN_MO_POINTER_EVENT_TRANSMIT : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_MESSAGE_DIRECTION : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_MESSAGE_LOST : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_MESSAGE_VALID : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_NEW_DATA : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_ENABLE : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_PENDING : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_TX_SELECTED : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_UPDATING : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_ENABLE0 : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_ENABLE1 : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_PENDING : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_REQUEST : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_MESSAGE_DIRECTION : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_MESSAGE_LOST : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_MESSAGE_VALID : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_NEW_DATA : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_ENABLE : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_PENDING : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_TX_SELECTED : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_UPDATING : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_ENABLE0 : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_ENABLE1 : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_PENDING : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_REQUEST : xmc_can.h
  • XMC_CAN_MO_STATUS_LIST : xmc_can.h
  • XMC_CAN_MO_STATUS_MESSAGE_DIRECTION : xmc_can.h
  • XMC_CAN_MO_STATUS_MESSAGE_LOST : xmc_can.h
  • XMC_CAN_MO_STATUS_MESSAGE_VALID : xmc_can.h
  • XMC_CAN_MO_STATUS_NEW_DATA : xmc_can.h
  • XMC_CAN_MO_STATUS_POINTER_TO_NEXT_MO : xmc_can.h
  • XMC_CAN_MO_STATUS_POINTER_TO_PREVIOUS_MO : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_ENABLE : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_PENDING : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_TX_SELECTED : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_UPDATING : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_ENABLE0 : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_ENABLE1 : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_PENDING : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_REQUEST : xmc_can.h
  • XMC_CAN_MO_TYPE_RECMSGOBJ : xmc_can.h
  • XMC_CAN_MO_TYPE_TRANSMSGOBJ : xmc_can.h
  • XMC_CAN_NODE_CONTROL_ALERT_INT_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_CAN_ANALYZER_NODEDE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_CAN_DISABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_CONF_CHANGE_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_LEC_INT_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_NODE_INIT : xmc_can.h
  • XMC_CAN_NODE_CONTROL_SUSPENDED_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_TX_INT_ENABLE : xmc_can.h
  • XMC_CAN_NODE_EVENT_ALERT : xmc_can.h
  • XMC_CAN_NODE_EVENT_CFCIE : xmc_can.h
  • XMC_CAN_NODE_EVENT_LEC : xmc_can.h
  • XMC_CAN_NODE_EVENT_TX_INT : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_DIR_WHILE_NODE_RECEPCION : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_DIR_WHILE_NODE_TRANSMISSION : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_INC_1 : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_INC_8 : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_ALERT : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_FRAME_COUNTER : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_LEC : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_TRANSFER_OK : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCA : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCB : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCC : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCD : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCE : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCF : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCG : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCH : xmc_can.h
  • XMC_CAN_NODE_STATUS_ALERT_WARNING : xmc_can.h
  • XMC_CAN_NODE_STATUS_BUS_OFF : xmc_can.h
  • XMC_CAN_NODE_STATUS_ERROR_WARNING_STATUS : xmc_can.h
  • XMC_CAN_NODE_STATUS_LAST_ERROR_CODE : xmc_can.h
  • XMC_CAN_NODE_STATUS_LIST_LENGTH_ERROR : xmc_can.h
  • XMC_CAN_NODE_STATUS_LIST_OBJECT_ERROR : xmc_can.h
  • XMC_CAN_NODE_STATUS_RX_OK : xmc_can.h
  • XMC_CAN_NODE_STATUS_SUSPENDED_ACK : xmc_can.h
  • XMC_CAN_NODE_STATUS_TX_OK : xmc_can.h
  • XMC_CAN_PANCMD_DYNAMIC_ALLOCATE : xmc_can.h
  • XMC_CAN_PANCMD_DYNAMIC_INSERT_BEFORE : xmc_can.h
  • XMC_CAN_PANCMD_DYNAMIC_INSERT_BEHIND : xmc_can.h
  • XMC_CAN_PANCMD_INIT_LIST : xmc_can.h
  • XMC_CAN_PANCMD_STATIC_ALLOCATE : xmc_can.h
  • XMC_CAN_PANCMD_STATIC_INSERT_BEFORE : xmc_can.h
  • XMC_CAN_PANCMD_STATIC_INSERT_BEHIND : xmc_can.h
  • XMC_CAN_STATUS_BUSY : xmc_can.h
  • XMC_CAN_STATUS_ERROR : xmc_can.h
  • XMC_CAN_STATUS_MO_DISABLED : xmc_can.h
  • XMC_CAN_STATUS_MO_NOT_ACCEPTABLE : xmc_can.h
  • XMC_CAN_STATUS_SUCCESS : xmc_can.h
  • XMC_CCU4_CLOCK_EXTERNAL_A : xmc_ccu4.h
  • XMC_CCU4_CLOCK_EXTERNAL_B : xmc_ccu4.h
  • XMC_CCU4_CLOCK_EXTERNAL_C : xmc_ccu4.h
  • XMC_CCU4_CLOCK_SCU : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE0 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE1 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE2 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE3 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE0 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE1 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE2 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE3 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_COMPARE_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_DITHER_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_FLOATING_PRESCALER_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PASSIVE_LEVEL : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PERIOD_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_CAP_REG_SET_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_CAP_REG_SET_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_TIMER_CLEAR : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_TIMER_STOP : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_TIMER_STOP_CLEAR : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_NONE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_3_CYCLES : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_5_CYCLES : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_7_CYCLES : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_DISABLED : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_NONE : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_CAPTURE_EVENT0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_CAPTURE_EVENT1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_COUNT : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_DIRECTION : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_GATING : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_LOAD : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_MODULATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_OVERRIDE : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_START : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_STOP : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_TRAP : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_COMPARE_MATCH_DOWN : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_COMPARE_MATCH_UP : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_EVENT0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_EVENT1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_EVENT2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_PERIOD_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_TRAP : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODE_CAPTURE : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODE_COMPARE : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODULATION_MODE_CLEAR_OUT : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODULATION_MODE_CLEAR_ST_OUT : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_PERIOD_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_1024 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_128 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_16 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_16384 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_2048 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_256 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_32 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_32768 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_4 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_4096 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_512 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_64 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_8 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_8192 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_MODE_FLOAT : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_MODE_NORMAL : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_IN_PERIOD_MATCH_AND_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_PERIOD_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_3 : xmc_ccu4.h
  • XMC_CCU4_SLICE_START_MODE_TIMER_START : xmc_ccu4.h
  • XMC_CCU4_SLICE_START_MODE_TIMER_START_CLEAR : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_ALWAYS : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_CAP_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_CAP_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_NEVER : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_DIR_DOWN : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_DIR_UP : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_MODE_CA : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_MODE_EA : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_REPEAT_MODE_REPEAT : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_REPEAT_MODE_SINGLE : xmc_ccu4.h
  • XMC_CCU4_SLICE_TRAP_EXIT_MODE_AUTOMATIC : xmc_ccu4.h
  • XMC_CCU4_SLICE_TRAP_EXIT_MODE_SW : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_COMPARE_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_DITHER_VALUE_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_FLOATING_PRESCALER_VALUE_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_PASSIVE_LEVEL_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_PERIOD_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_STATUS_ERROR : xmc_ccu4.h
  • XMC_CCU4_STATUS_IDLE : xmc_ccu4.h
  • XMC_CCU4_STATUS_OK : xmc_ccu4.h
  • XMC_CCU4_STATUS_RUNNING : xmc_ccu4.h
  • XMC_CCU8_CLOCK_EXTERNAL_A : xmc_ccu8.h
  • XMC_CCU8_CLOCK_EXTERNAL_B : xmc_ccu8.h
  • XMC_CCU8_CLOCK_EXTERNAL_C : xmc_ccu8.h
  • XMC_CCU8_CLOCK_SCU : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE0 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE1 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE2 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE3 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE0 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE1 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE2 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE3 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT0_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT0_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT1_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT1_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT2_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT2_ST2 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT3_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT3_ST2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_CAP_REG_SET_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_CAP_REG_SET_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_COMPARE_CHANNEL_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_COMPARE_CHANNEL_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_4 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_8 : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_TIMER_CLEAR : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_TIMER_STOP : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_TIMER_STOP_CLEAR : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_NONE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_3_CYCLES : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_5_CYCLES : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_7_CYCLES : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_DISABLED : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_NONE : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_COUNT : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_DIRECTION : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_GATING : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_LOAD : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_MODULATION : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_OVERRIDE : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_START : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_STOP : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_TRAP : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_EVENT0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_EVENT1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_EVENT2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_PERIOD_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_TRAP : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODE_CAPTURE : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODE_COMPARE : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_1_AND_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_NONE : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_OUT : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_ST_OUT : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_PERIOD_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_1024 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_128 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_16 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_16384 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_2048 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_256 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_32 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_32768 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_4 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_4096 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_512 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_64 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_8 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_8192 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_MODE_FLOAT : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_MODE_NORMAL : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_IN_PERIOD_MATCH_AND_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_PERIOD_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_START_MODE_TIMER_START : xmc_ccu8.h
  • XMC_CCU8_SLICE_START_MODE_TIMER_START_CLEAR : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_1_AND_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_1_OR_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_ALWAYS : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_NEVER : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_DIR_DOWN : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_DIR_UP : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_MODE_CA : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_MODE_EA : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_REPEAT_MODE_REPEAT : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_REPEAT_MODE_SINGLE : xmc_ccu8.h
  • XMC_CCU8_SLICE_TRAP_EXIT_MODE_AUTOMATIC : xmc_ccu8.h
  • XMC_CCU8_SLICE_TRAP_EXIT_MODE_SW : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_ST2 : xmc_ccu8.h
  • XMC_CCU8_STATUS_ERROR : xmc_ccu8.h
  • XMC_CCU8_STATUS_IDLE : xmc_ccu8.h
  • XMC_CCU8_STATUS_OK : xmc_ccu8.h
  • XMC_CCU8_STATUS_RUNNING : xmc_ccu8.h
  • XMC_DAC_CH_DATA_TYPE_SIGNED : xmc_dac.h
  • XMC_DAC_CH_DATA_TYPE_UNSIGNED : xmc_dac.h
  • XMC_DAC_CH_MODE_DATA : xmc_dac.h
  • XMC_DAC_CH_MODE_IDLE : xmc_dac.h
  • XMC_DAC_CH_MODE_NOISE : xmc_dac.h
  • XMC_DAC_CH_MODE_PATTERN : xmc_dac.h
  • XMC_DAC_CH_MODE_RAMP : xmc_dac.h
  • XMC_DAC_CH_MODE_SINGLE : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_NEGATION_DISABLED : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_NEGATION_ENABLED : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_128 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_16 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_2 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_32 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_4 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_64 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_DIV_8 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_128 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_16 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_2 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_32 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_4 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_64 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_MUL_8 : xmc_dac.h
  • XMC_DAC_CH_OUTPUT_SCALE_NONE : xmc_dac.h
  • XMC_DAC_CH_PATTERN_SIGN_OUTPUT_DISABLED : xmc_dac.h
  • XMC_DAC_CH_PATTERN_SIGN_OUTPUT_ENABLED : xmc_dac.h
  • XMC_DAC_CH_STATUS_BUSY : xmc_dac.h
  • XMC_DAC_CH_STATUS_ERROR : xmc_dac.h
  • XMC_DAC_CH_STATUS_ERROR_FREQ2HIGH : xmc_dac.h
  • XMC_DAC_CH_STATUS_ERROR_FREQ2LOW : xmc_dac.h
  • XMC_DAC_CH_STATUS_OK : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_CCU40_SR1 : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_CCU41_SR1 : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_CCU80_SR1 : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_P2_8 : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_P2_9 : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_U0C0_DX1INS : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_EXTERNAL_U1C0_DX1INS : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_INTERNAL : xmc_dac.h
  • XMC_DAC_CH_TRIGGER_SOFTWARE : xmc_dac.h
  • XMC_DMA_CH_ADDRESS_COUNT_MODE_DECREMENT : xmc_dma.h
  • XMC_DMA_CH_ADDRESS_COUNT_MODE_INCREMENT : xmc_dma.h
  • XMC_DMA_CH_ADDRESS_COUNT_MODE_NO_CHANGE : xmc_dma.h
  • XMC_DMA_CH_BURST_LENGTH_1 : xmc_dma.h
  • XMC_DMA_CH_BURST_LENGTH_4 : xmc_dma.h
  • XMC_DMA_CH_BURST_LENGTH_8 : xmc_dma.h
  • XMC_DMA_CH_DST_HANDSHAKING_HARDWARE : xmc_dma.h
  • XMC_DMA_CH_DST_HANDSHAKING_SOFTWARE : xmc_dma.h
  • XMC_DMA_CH_EVENT_BLOCK_TRANSFER_COMPLETE : xmc_dma.h
  • XMC_DMA_CH_EVENT_DST_TRANSACTION_COMPLETE : xmc_dma.h
  • XMC_DMA_CH_EVENT_ERROR : xmc_dma.h
  • XMC_DMA_CH_EVENT_SRC_TRANSACTION_COMPLETE : xmc_dma.h
  • XMC_DMA_CH_EVENT_TRANSFER_COMPLETE : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_0 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_1 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_2 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_3 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_4 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_5 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_6 : xmc_dma.h
  • XMC_DMA_CH_HARDWARE_HANDSHAKING_IF_7 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_0 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_1 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_2 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_3 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_4 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_5 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_6 : xmc_dma.h
  • XMC_DMA_CH_PRIORITY_7 : xmc_dma.h
  • XMC_DMA_CH_SRC_HANDSHAKING_HARDWARE : xmc_dma.h
  • XMC_DMA_CH_SRC_HANDSHAKING_SOFTWARE : xmc_dma.h
  • XMC_DMA_CH_STATUS_BUSY : xmc_dma.h
  • XMC_DMA_CH_STATUS_ERROR : xmc_dma.h
  • XMC_DMA_CH_STATUS_OK : xmc_dma.h
  • XMC_DMA_CH_TRANSACTION_TYPE_BURST : xmc_dma.h
  • XMC_DMA_CH_TRANSACTION_TYPE_SINGLE : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_M2M_DMA : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_M2P_DMA : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_M2P_PER : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_P2M_DMA : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_P2M_PER : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_P2P_DMA : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_P2P_DSTPER : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_FLOW_P2P_SRCPER : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_CONTIGUOUS_DSTADR_LINKED : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_CONTIGUOUS_DSTADR_RELOAD : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_LINKED_DSTADR_CONTIGUOUS : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_LINKED_DSTADR_LINKED : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_LINKED_DSTADR_RELOAD : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_RELOAD_DSTADR_CONTIGUOUS : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_RELOAD_DSTADR_LINKED : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_MULTI_BLOCK_SRCADR_RELOAD_DSTADR_RELOAD : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_TYPE_SINGLE_BLOCK : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_WIDTH_16 : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_WIDTH_32 : xmc_dma.h
  • XMC_DMA_CH_TRANSFER_WIDTH_8 : xmc_dma.h
  • XMC_DSD_CH_AUX_EVENT_CAPTURE_SIGN_DELAY : xmc_dsd.h
  • XMC_DSD_CH_AUX_EVENT_DISABLED : xmc_dsd.h
  • XMC_DSD_CH_AUX_EVENT_EVERY_NEW_RESULT : xmc_dsd.h
  • XMC_DSD_CH_AUX_EVENT_INSIDE_BOUNDARY : xmc_dsd.h
  • XMC_DSD_CH_AUX_EVENT_OUTSIDE_BOUNDARY : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_10 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_12 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_14 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_16 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_18 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_2 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_20 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_22 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_24 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_26 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_28 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_30 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_32 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_4 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_6 : xmc_dsd.h
  • XMC_DSD_CH_CLK_DIV_8 : xmc_dsd.h
  • XMC_DSD_CH_CLOCK_SOURCE_A : xmc_dsd.h
  • XMC_DSD_CH_CLOCK_SOURCE_B : xmc_dsd.h
  • XMC_DSD_CH_CLOCK_SOURCE_C : xmc_dsd.h
  • XMC_DSD_CH_CLOCK_SOURCE_D : xmc_dsd.h
  • XMC_DSD_CH_CLOCK_SOURCE_INTERN : xmc_dsd.h
  • XMC_DSD_CH_DATA_SOURCE_A_DIRECT : xmc_dsd.h
  • XMC_DSD_CH_DATA_SOURCE_A_INVERTED : xmc_dsd.h
  • XMC_DSD_CH_DATA_SOURCE_B_DIRECT : xmc_dsd.h
  • XMC_DSD_CH_DATA_SOURCE_B_INVERTED : xmc_dsd.h
  • XMC_DSD_CH_DATA_SOURCE_DISCONNECT : xmc_dsd.h
  • XMC_DSD_CH_FILTER_TYPE_CIC1 : xmc_dsd.h
  • XMC_DSD_CH_FILTER_TYPE_CIC2 : xmc_dsd.h
  • XMC_DSD_CH_FILTER_TYPE_CIC3 : xmc_dsd.h
  • XMC_DSD_CH_FILTER_TYPE_CICF : xmc_dsd.h
  • XMC_DSD_CH_ID_0 : xmc_dsd.h
  • XMC_DSD_CH_ID_1 : xmc_dsd.h
  • XMC_DSD_CH_ID_2 : xmc_dsd.h
  • XMC_DSD_CH_ID_3 : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_START_ALLWAYS_ON : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_START_OFF : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_START_TRIGGER_FALL : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_START_TRIGGER_RISE : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_STOP_END_OF_LOOPS : xmc_dsd.h
  • XMC_DSD_CH_INTEGRATOR_STOP_ENDLESS_OR_INVERSE_TRIGGER : xmc_dsd.h
  • XMC_DSD_CH_RESULT_EVENT_DISABLE : xmc_dsd.h
  • XMC_DSD_CH_RESULT_EVENT_ENABLE : xmc_dsd.h
  • XMC_DSD_CH_SIGN_SOURCE_EXTERNAL_A : xmc_dsd.h
  • XMC_DSD_CH_SIGN_SOURCE_EXTERNAL_B : xmc_dsd.h
  • XMC_DSD_CH_SIGN_SOURCE_NEXT_CHANNEL : xmc_dsd.h
  • XMC_DSD_CH_SIGN_SOURCE_ON_CHIP_GENERATOR : xmc_dsd.h
  • XMC_DSD_CH_TIMESTAMP_TRIGGER_BOTH_EDGES : xmc_dsd.h
  • XMC_DSD_CH_TIMESTAMP_TRIGGER_DISABLE : xmc_dsd.h
  • XMC_DSD_CH_TIMESTAMP_TRIGGER_FALL : xmc_dsd.h
  • XMC_DSD_CH_TIMESTAMP_TRIGGER_RISE : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_A : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_B : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_C : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_D : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_E : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_F : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_G : xmc_dsd.h
  • XMC_DSD_CH_TRIGGER_SOURCE_H : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_10240 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_12288 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_14336 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_16384 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_18432 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_2048 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_20480 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_22528 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_24576 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_26624 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_28672 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_30720 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_32768 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_4096 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_6144 : xmc_dsd.h
  • XMC_DSD_GENERATOR_CLKDIV_8192 : xmc_dsd.h
  • XMC_DSD_GENERATOR_MODE_RECTANGLE : xmc_dsd.h
  • XMC_DSD_GENERATOR_MODE_SINE : xmc_dsd.h
  • XMC_DSD_GENERATOR_MODE_STOPPED : xmc_dsd.h
  • XMC_DSD_GENERATOR_MODE_TRIANGLE : xmc_dsd.h
  • XMC_DSD_STATUS_ERROR : xmc_dsd.h
  • XMC_DSD_STATUS_OK : xmc_dsd.h
  • XMC_EBU_ADDRESS_SELECT_ALTERNATE_REGION_ENABLE : xmc_ebu.h
  • XMC_EBU_ADDRESS_SELECT_MEMORY_REGION_ENABLE : xmc_ebu.h
  • XMC_EBU_ADDRESS_SELECT_MEMORY_REGION_WRITE_PROTECT : xmc_ebu.h
  • XMC_EBU_ALE_OUTPUT_IS_ALE : xmc_ebu.h
  • XMC_EBU_ALE_OUTPUT_IS_INV_ADV : xmc_ebu.h
  • XMC_EBU_ARB_MODE_ARBITER_MODE : xmc_ebu.h
  • XMC_EBU_ARB_MODE_NOT_SELECTED : xmc_ebu.h
  • XMC_EBU_ARB_MODE_PARTICIPANT_MODE : xmc_ebu.h
  • XMC_EBU_ARB_MODE_SOLE_MASTER_MODE : xmc_ebu.h
  • XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_CLOCK_ENABLED_AFTER_ADDRESS_PHASE : xmc_ebu.h
  • XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_CLOCK_ENABLED_AT_BEGINNING_OF_ACCESS : xmc_ebu.h
  • XMC_EBU_BURST_ADDRESS_WRAPPING_DISABLED : xmc_ebu.h
  • XMC_EBU_BURST_ADDRESS_WRAPPING_ENABLED : xmc_ebu.h
  • XMC_EBU_BURST_BUFFER_SYNC_LENGTH_SYNC_ENABLE : xmc_ebu.h
  • XMC_EBU_BURST_BUFFER_SYNC_SINGLE_MODE : xmc_ebu.h
  • XMC_EBU_BURST_FLASH_CLOCK_FEEDBACK_DISABLE : xmc_ebu.h
  • XMC_EBU_BURST_FLASH_CLOCK_FEEDBACK_ENABLE : xmc_ebu.h
  • XMC_EBU_BURST_FLASH_CLOCK_MODE_DISABLED_BETWEEN_ACCESSES : xmc_ebu.h
  • XMC_EBU_BURST_FLASH_CLOCK_MODE_RUN_CONTINUOSLY : xmc_ebu.h
  • XMC_EBU_BURST_LENGTH_SYNC_1_DATA_ACCESS : xmc_ebu.h
  • XMC_EBU_BURST_LENGTH_SYNC_2_DATA_ACCESSES : xmc_ebu.h
  • XMC_EBU_BURST_LENGTH_SYNC_4_DATA_ACCESSES : xmc_ebu.h
  • XMC_EBU_BURST_LENGTH_SYNC_8_DATA_ACCESSES : xmc_ebu.h
  • XMC_EBU_BURST_SIGNAL_SYNC_BURST_ADV_DELAYED : xmc_ebu.h
  • XMC_EBU_BURST_SIGNAL_SYNC_BURST_ADV_NOT_DELAYED : xmc_ebu.h
  • XMC_EBU_BUSWCON_SELECT_DEVICE_ADDRESSING_MODE : xmc_ebu.h
  • XMC_EBU_BUSWCON_SELECT_NAN_WORKAROUND : xmc_ebu.h
  • XMC_EBU_BYTE_CONTROL_FOLLOWS_CHIP_SELECT_TIMMING : xmc_ebu.h
  • XMC_EBU_BYTE_CONTROL_FOLLOWS_CONTROL_SIGNAL_TIMMING : xmc_ebu.h
  • XMC_EBU_BYTE_CONTROL_FOLLOWS_WRITE_ENABLE_SIGNAL_TIMMING : xmc_ebu.h
  • XMC_EBU_CLK_MODE_ASYNCHRONOUS_TO_AHB : xmc_ebu.h
  • XMC_EBU_CLK_MODE_SYNCHRONOUS_TO_CPU : xmc_ebu.h
  • XMC_EBU_CLK_STATUS_DISABLE_BIT : xmc_ebu.h
  • XMC_EBU_CLK_STATUS_DIV2_MODE : xmc_ebu.h
  • XMC_EBU_CLK_STATUS_DIV_RATIO : xmc_ebu.h
  • XMC_EBU_CLK_STATUS_MODE : xmc_ebu.h
  • XMC_EBU_CLOCK_DIVIDED_BY_1 : xmc_ebu.h
  • XMC_EBU_CLOCK_DIVIDED_BY_2 : xmc_ebu.h
  • XMC_EBU_CLOCK_DIVIDED_BY_3 : xmc_ebu.h
  • XMC_EBU_CLOCK_DIVIDED_BY_4 : xmc_ebu.h
  • XMC_EBU_DEVICE_ADDRESSING_MODE_16_BITS : xmc_ebu.h
  • XMC_EBU_DEVICE_ADDRESSING_MODE_32_BITS_MULTIPLEXED : xmc_ebu.h
  • XMC_EBU_DEVICE_ADDRESSING_MODE_TWIN_16_BITS_MULTIPLEXED : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_DEMUXED_ASYNCHRONOUS_TYPE : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_DEMUXED_BURST_TYPE : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_DEMUXED_CELLULAR_RAM : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_DEMUXED_PAGE_MODE : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_MUXED_ASYNCHRONOUS_TYPE : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_MUXED_BURST_TYPE : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_MUXED_CELLULAR_RAM : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_NAND_FLASH : xmc_ebu.h
  • XMC_EBU_DEVICE_TYPE_SDRAM : xmc_ebu.h
  • XMC_EBU_DIV2_CLK_MODE_OFF : xmc_ebu.h
  • XMC_EBU_DIV2_CLK_MODE_ON : xmc_ebu.h
  • XMC_EBU_EARLY_CHIP_SELECT_DELAYED : xmc_ebu.h
  • XMC_EBU_EARLY_CHIP_SELECT_NOT_DELAYED : xmc_ebu.h
  • XMC_EBU_EXT_DATA_OUTPUT_EVERY_1_BFCLK_CYCLES : xmc_ebu.h
  • XMC_EBU_EXT_DATA_OUTPUT_EVERY_2_BFCLK_CYCLES : xmc_ebu.h
  • XMC_EBU_EXT_DATA_OUTPUT_EVERY_4_BFCLK_CYCLES : xmc_ebu.h
  • XMC_EBU_EXT_DATA_OUTPUT_EVERY_8_BFCLK_CYCLES : xmc_ebu.h
  • XMC_EBU_FLASH_NON_ARRAY_ACCESS_DISNABLE : xmc_ebu.h
  • XMC_EBU_FLASH_NON_ARRAY_ACCESS_ENABLE : xmc_ebu.h
  • XMC_EBU_FREQ_EXT_CLK_PIN_EQUAL_TO_INT_CLK : xmc_ebu.h
  • XMC_EBU_FREQ_EXT_CLK_PIN_HALF_OF_INT_CLK : xmc_ebu.h
  • XMC_EBU_FREQ_EXT_CLK_PIN_QUARTER_OF_INT_CLK : xmc_ebu.h
  • XMC_EBU_FREQ_EXT_CLK_PIN_THIRD_OF_INT_CLK : xmc_ebu.h
  • XMC_EBU_LOCK_CHIP_SELECT_DISABLED : xmc_ebu.h
  • XMC_EBU_LOCK_CHIP_SELECT_ENABLED : xmc_ebu.h
  • XMC_EBU_READ_STAGES_SYNC_ONE : xmc_ebu.h
  • XMC_EBU_READ_STAGES_SYNC_TWO : xmc_ebu.h
  • XMC_EBU_SDRAM_BURST_LENGTH_16_LOCATION : xmc_ebu.h
  • XMC_EBU_SDRAM_BURST_LENGTH_1_LOCATION : xmc_ebu.h
  • XMC_EBU_SDRAM_BURST_LENGTH_2_LOCATION : xmc_ebu.h
  • XMC_EBU_SDRAM_BURST_LENGTH_4_LOCATION : xmc_ebu.h
  • XMC_EBU_SDRAM_BURST_LENGTH_8_LOCATION : xmc_ebu.h
  • XMC_EBU_SDRAM_CAS_LATENCY_2_CLKS : xmc_ebu.h
  • XMC_EBU_SDRAM_CAS_LATENCY_3_CLKS : xmc_ebu.h
  • XMC_EBU_SDRAM_CLK_MODE_CONTINUOUSLY_RUNS : xmc_ebu.h
  • XMC_EBU_SDRAM_CLK_MODE_DISABLED_BETWEEN_ACCESSES : xmc_ebu.h
  • XMC_EBU_SDRAM_CLK_OUTPUT_DISABLED : xmc_ebu.h
  • XMC_EBU_SDRAM_CLK_OUTPUT_ENABLED : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_21_to_20 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_22_to_21 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_23_to_22 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_24_to_23 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_25_to_24 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_26 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_26_to_25 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_10 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_11 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_12 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_13 : xmc_ebu.h
  • XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_9 : xmc_ebu.h
  • XMC_EBU_SDRAM_PWR_MODE_ACTIVE_PWR_DOWN : xmc_ebu.h
  • XMC_EBU_SDRAM_PWR_MODE_AUTO_PRECHARGE_BEFORE_CLK_STOP : xmc_ebu.h
  • XMC_EBU_SDRAM_PWR_MODE_CLK_STOP_PWR_DOWN : xmc_ebu.h
  • XMC_EBU_SDRAM_PWR_MODE_PRECHARGE_BEFORE_CLK_STOP : xmc_ebu.h
  • XMC_EBU_SDRAM_RFRSH_STATUS_SELF_REFRESH_ENTRY_STATUS : xmc_ebu.h
  • XMC_EBU_SDRAM_RFRSH_STATUS_SELF_REFRESH_EXIT_STATUS : xmc_ebu.h
  • XMC_EBU_SDRAM_STATUS_BUSY : xmc_ebu.h
  • XMC_EBU_SDRAM_STATUS_REFRESH_ERROR : xmc_ebu.h
  • XMC_EBU_SDRAM_STATUS_RX_ERROR : xmc_ebu.h
  • XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_10_to_0 : xmc_ebu.h
  • XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_8_to_0 : xmc_ebu.h
  • XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_9_to_0 : xmc_ebu.h
  • XMC_EBU_STATUS_BUSY : xmc_ebu.h
  • XMC_EBU_STATUS_ERROR : xmc_ebu.h
  • XMC_EBU_STATUS_OK : xmc_ebu.h
  • XMC_EBU_WAIT_CONTROL_OFF : xmc_ebu.h
  • XMC_EBU_WAIT_CONTROL_SYNC_ABORT_AND_RETRY_ACCESS : xmc_ebu.h
  • XMC_EBU_WAIT_CONTROL_SYNC_EARLY_WAIT_ASYNC_ASYNC_INPUT_AT_WAIT : xmc_ebu.h
  • XMC_EBU_WAIT_CONTROL_SYNC_WAIT_WITH_DATA_ASYNC_SYNC_INPUT_AT_WAIT : xmc_ebu.h
  • XMC_EBU_WAIT_SIGNAL_POLARITY_PIN_ACTIVE_HIGH : xmc_ebu.h
  • XMC_EBU_WAIT_SIGNAL_POLARITY_PIN_ACTIVE_LOW : xmc_ebu.h
  • XMC_ECAT_EVENT_AL_CONTROL : xmc_ecat.h
  • XMC_ECAT_EVENT_DC_LATCH : xmc_ecat.h
  • XMC_ECAT_EVENT_DC_SYNC0 : xmc_ecat.h
  • XMC_ECAT_EVENT_DC_SYNC1 : xmc_ecat.h
  • XMC_ECAT_EVENT_EEPROM : xmc_ecat.h
  • XMC_ECAT_EVENT_SM0 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM1 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM2 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM3 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM4 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM5 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM6 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM7 : xmc_ecat.h
  • XMC_ECAT_EVENT_SM_ACTIVATION_REGISTER : xmc_ecat.h
  • XMC_ECAT_EVENT_WATCHDOG : xmc_ecat.h
  • XMC_ECAT_STATUS_BUSY : xmc_ecat.h
  • XMC_ECAT_STATUS_ERROR : xmc_ecat.h
  • XMC_ECAT_STATUS_OK : xmc_ecat.h
  • XMC_ERU_ETL_EDGE_DETECTION_BOTH : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_DISABLED : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_FALLING : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_RISING : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A0 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A1 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A2 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A3 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B0 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B1 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B2 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B3 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL0 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL1 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL2 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL3 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_DISABLED : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_ENABLED : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_AND_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_AND_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_OR_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_OR_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_AND_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_AND_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_OR_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_OR_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_STATUS_FLAG_MODE_HWCTRL : xmc_eru.h
  • XMC_ERU_ETL_STATUS_FLAG_MODE_SWCTRL : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_DISABLED : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_ENABLED : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT0 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT1 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT2 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT3 : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER1 : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER2 : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER3 : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_DISABLED : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MATCH : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MISMATCH : xmc_eru.h
  • XMC_ETH_LINK_DUPLEX_FULL : xmc_eth_mac.h
  • XMC_ETH_LINK_DUPLEX_HALF : xmc_eth_mac.h
  • XMC_ETH_LINK_INTERFACE_MII : xmc_eth_mac.h
  • XMC_ETH_LINK_INTERFACE_RMII : xmc_eth_mac.h
  • XMC_ETH_LINK_SPEED_100M : xmc_eth_mac.h
  • XMC_ETH_LINK_SPEED_10M : xmc_eth_mac.h
  • XMC_ETH_LINK_STATUS_DOWN : xmc_eth_mac.h
  • XMC_ETH_LINK_STATUS_UP : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE0 : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE1 : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE2 : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE3 : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE4 : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_MASK_BYTE5 : xmc_eth_mac.h
  • XMC_ETH_MAC_ADDR_FILTER_SA : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_BUS_ERROR : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_EARLY_RECEIVE : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_EARLY_TRANSMIT : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_PMT : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_RECEIVE : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_RECEIVE_BUFFER_UNAVAILABLE : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_RECEIVE_OVERFLOW : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_RECEIVE_PROCESS_STOPPED : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_RECEIVE_WATCHDOG_TIMEOUT : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_TIMESTAMP : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_TRANSMIT : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_TRANSMIT_BUFFER_UNAVAILABLE : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_TRANSMIT_JABBER_TIMEOUT : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_TRANSMIT_PROCESS_STOPPED : xmc_eth_mac.h
  • XMC_ETH_MAC_EVENT_TRANSMIT_UNDERFLOW : xmc_eth_mac.h
  • XMC_ETH_MAC_PMT_EVENT_ON_MAGIC_PACKET : xmc_eth_mac.h
  • XMC_ETH_MAC_PMT_EVENT_ON_UNICAST_FRAME_FILTER : xmc_eth_mac.h
  • XMC_ETH_MAC_PMT_EVENT_ON_WAKEUP_FRAME : xmc_eth_mac.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P0_0 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P15_8 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P2_1 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P6_5 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_TX_P5_10 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CLK_TX_P6_6 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_COL_P2_15 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_COL_P5_5 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_DV_P0_1 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_DV_P15_9 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_DV_P2_5 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_DV_P5_2 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_P5_11 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_CRS_P5_4 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MDIO_P0_9 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MDIO_P1_11 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MDIO_P2_0 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MODE_MII : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_MODE_RMII : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD0_P0_2 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD0_P14_8 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD0_P2_2 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD0_P5_0 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD1_P0_3 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD1_P14_9 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD1_P2_3 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD1_P5_1 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD2_P5_8 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD2_P6_4 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD3_P5_9 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXD3_P6_3 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXER_P0_11 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXER_P2_4 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_PORT_CTRL_RXER_P5_3 : xmc_eth_mac_map.h
  • XMC_ETH_MAC_STATUS_BUSY : xmc_eth_mac.h
  • XMC_ETH_MAC_STATUS_ERROR : xmc_eth_mac.h
  • XMC_ETH_MAC_STATUS_OK : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_ALL_FRAMES : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_MAC_ADDRESS_FILTER : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_PTP_OVER_ETHERNET : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_PTP_OVER_IPV4 : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_PTP_OVER_IPV6 : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_PTPV2 : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_ENABLE_TS_INTERRUPT : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_CONFIG_FINE_UPDATE : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_STATUS_SECONDS_OVERFLOW : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_STATUS_TARGET_TIME_REACHED : xmc_eth_mac.h
  • XMC_ETH_MAC_TIMESTAMP_STATUS_TARGET_TIMER_ERROR : xmc_eth_mac.h
  • XMC_ETH_MAC_TX_FRAME_EVENT : xmc_eth_mac.h
  • XMC_ETH_MAC_TX_FRAME_FRAGMENT : xmc_eth_mac.h
  • XMC_ETH_MAC_TX_FRAME_TIMESTAMP : xmc_eth_mac.h
  • XMC_ETH_PHY_STATUS_BUSY : xmc_eth_phy.h
  • XMC_ETH_PHY_STATUS_ERROR : xmc_eth_phy.h
  • XMC_ETH_PHY_STATUS_ERROR_DEVICE_ID : xmc_eth_phy.h
  • XMC_ETH_PHY_STATUS_ERROR_TIMEOUT : xmc_eth_phy.h
  • XMC_ETH_PHY_STATUS_OK : xmc_eth_phy.h
  • XMC_FCE_CFG_CONFIG_ALR : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_BEI : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_CCE : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_CEI : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_CMI : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_LEI : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_REFIN : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_REFOUT : xmc_fce.h
  • XMC_FCE_CFG_CONFIG_XSEL : xmc_fce.h
  • XMC_FCE_CTR_MISMATCH_CFG : xmc_fce.h
  • XMC_FCE_CTR_MISMATCH_CHECK : xmc_fce.h
  • XMC_FCE_CTR_MISMATCH_CRC : xmc_fce.h
  • XMC_FCE_STATUS_BUSY : xmc_fce.h
  • XMC_FCE_STATUS_ERROR : xmc_fce.h
  • XMC_FCE_STATUS_OK : xmc_fce.h
  • XMC_FCE_STS_BUS_ERROR : xmc_fce.h
  • XMC_FCE_STS_CONFIG_ERROR : xmc_fce.h
  • XMC_FCE_STS_LENGTH_ERROR : xmc_fce.h
  • XMC_FCE_STS_MISMATCH_CRC : xmc_fce.h
  • XMC_FLASH_EVENT_COMMAND_SEQUENCE_ERROR : xmc4_flash.h
  • XMC_FLASH_EVENT_DOUBLE_BIT_ERROR : xmc4_flash.h
  • XMC_FLASH_EVENT_END_OF_BUSY : xmc4_flash.h
  • XMC_FLASH_EVENT_PROTECTION_ERROR : xmc4_flash.h
  • XMC_FLASH_EVENT_SINGLE_BIT_ERROR : xmc4_flash.h
  • XMC_FLASH_EVENT_VERIFY_AND_OPERATION_ERROR : xmc4_flash.h
  • XMC_FLASH_MARGIN_DEFAULT : xmc4_flash.h
  • XMC_FLASH_MARGIN_TIGHT0 : xmc4_flash.h
  • XMC_FLASH_MARGIN_TIGHT1 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_READ_GLOBAL : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_0 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_1 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_2 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_3 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_4 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_5 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_6 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_7 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_8 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTOR_9 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTORS_10_11 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTORS_12_13 : xmc4_flash.h
  • XMC_FLASH_PROTECTION_WRITE_SECTORS_14_15 : xmc4_flash.h
  • XMC_FLASH_STATUS_BUSY : xmc4_flash.h
  • XMC_FLASH_STATUS_COMMAND_SEQUENCE_ERROR : xmc4_flash.h
  • XMC_FLASH_STATUS_DOUBLE_BIT_ERROR : xmc4_flash.h
  • XMC_FLASH_STATUS_ERASE_STATE : xmc4_flash.h
  • XMC_FLASH_STATUS_OK : xmc4_flash.h
  • XMC_FLASH_STATUS_OPERATION_ERROR : xmc4_flash.h
  • XMC_FLASH_STATUS_PAGE_MODE : xmc4_flash.h
  • XMC_FLASH_STATUS_PROGRAMMING_STATE : xmc4_flash.h
  • XMC_FLASH_STATUS_PROTECTION_ERROR : xmc4_flash.h
  • XMC_FLASH_STATUS_PROTECTION_INSTALLED : xmc4_flash.h
  • XMC_FLASH_STATUS_READ_PROTECTION_DISABLED_STATE : xmc4_flash.h
  • XMC_FLASH_STATUS_READ_PROTECTION_INSTALLED : xmc4_flash.h
  • XMC_FLASH_STATUS_SINGLE_BIT_ERROR_AND_CORRECTION : xmc4_flash.h
  • XMC_FLASH_STATUS_SLEEP_MODE : xmc4_flash.h
  • XMC_FLASH_STATUS_VERIFY_ERROR : xmc4_flash.h
  • XMC_FLASH_STATUS_WRITE_PROTECTION_DISABLED_UCB0 : xmc4_flash.h
  • XMC_FLASH_STATUS_WRITE_PROTECTION_DISABLED_UCB1 : xmc4_flash.h
  • XMC_FLASH_STATUS_WRITE_PROTECTION_INSTALLED_UCB0 : xmc4_flash.h
  • XMC_FLASH_STATUS_WRITE_PROTECTION_INSTALLED_UCB1 : xmc4_flash.h
  • XMC_FLASH_STATUS_WRITE_PROTECTION_INSTALLED_UCB2 : xmc4_flash.h
  • XMC_GPIO_HWCTRL_DISABLED : xmc_gpio.h
  • XMC_GPIO_HWCTRL_PERIPHERAL1 : xmc_gpio.h
  • XMC_GPIO_HWCTRL_PERIPHERAL2 : xmc_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_PULL_DOWN : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_PULL_UP : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_SAMPLING : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_TRISTATE : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_PULL_DOWN : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_PULL_UP : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_SAMPLING : xmc4_gpio.h
  • XMC_GPIO_MODE_INPUT_TRISTATE : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT1 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT2 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT3 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT4 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT3 : xmc4_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4 : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_LEVEL_HIGH : xmc_gpio.h
  • XMC_GPIO_OUTPUT_LEVEL_LOW : xmc_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_MEDIUM : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_STRONG_SHARP_EDGE : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_STRONG_SLOW_EDGE : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE : xmc4_gpio.h
  • XMC_GPIO_OUTPUT_STRENGTH_WEAK : xmc4_gpio.h
  • XMC_HRPWM_CLK_FREQ_120MHZ : xmc_hrpwm.h
  • XMC_HRPWM_CLK_FREQ_180MHZ : xmc_hrpwm.h
  • XMC_HRPWM_CLK_FREQ_80MHZ : xmc_hrpwm.h
  • XMC_HRPWM_CLK_FREQ_NONE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_CSG0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_CSG1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_CSG2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_INPUT_ECLKA : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_INPUT_ECLKB : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_INPUT_ECLKC : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CLK_INPUT_MCLK : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_10_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_11_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_12_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_13_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_14_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_15_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_16_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_2_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_32_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_3_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_4_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_5_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_6_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_7_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_8_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_FILTER_WINDOW_9_CLK_CYCLES : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INPUT_CINA : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INPUT_CINB : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INVERTING_INPUT_CMP0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INVERTING_INPUT_CMP1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_CMP_INVERTING_INPUT_CMP2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_EDGE_SEL_BOTH_EDGE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_EDGE_SEL_DISABLED : xmc_hrpwm.h
  • XMC_HRPWM_CSG_EDGE_SEL_FALLING_EDGE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_EDGE_SEL_RISING_EDGE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IA : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IB : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IC : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_ID : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IF : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IG : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IH : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_II : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IJ : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IK : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IL : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IM : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IN : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IO : xmc_hrpwm.h
  • XMC_HRPWM_CSG_INPUT_SEL_IP : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_CFSE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_CRSE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_CSEE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_STD : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_STPS : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_STRS : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_TRGS : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_VLS1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_ID_VLS2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_SR_LINE_0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_SR_LINE_1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_SR_LINE_2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_IRQ_SR_LINE_3 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_LVL_SEL_DISABLED : xmc_hrpwm.h
  • XMC_HRPWM_CSG_LVL_SEL_HIGH : xmc_hrpwm.h
  • XMC_HRPWM_CSG_LVL_SEL_LOW : xmc_hrpwm.h
  • XMC_HRPWM_CSG_POWER_MODE_HI_SPEED : xmc_hrpwm.h
  • XMC_HRPWM_CSG_POWER_MODE_LOW_SPEED : xmc_hrpwm.h
  • XMC_HRPWM_CSG_POWER_MODE_OFF : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_CLR_CSG0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_CLR_CSG1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_CLR_CSG2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_4 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_8 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_START_CLR : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_START_CLR_N_STRT : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_START_IGNORE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_START_STRT : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_STOP_CLR : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_STOP_CLR_N_STOP : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_STOP_IGNORE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_EXT_STOP_STP : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_START_CSG0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_START_CSG1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_START_CSG2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STATUS_CSG0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STATUS_CSG1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STATUS_CSG2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STOP_CSG0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STOP_CSG1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_PRESCALER_STOP_CSG2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_CMP0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_CMP0_PSL : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_CMP1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_CMP1_PSL : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_CMP2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_CMP2_PSL : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_DAC0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_DAC1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_RUN_BIT_DAC2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLICE_0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLICE_1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLICE_2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_CTRL_MODE_DEC_GEN : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_CTRL_MODE_INC_GEN : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_CTRL_MODE_STATIC : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_CTRL_MODE_TRIANGULAR : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_START_IGNORE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_START_RESUME : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_START_STRT : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_STOP_FREEZE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_STOP_IGNORE : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_EXT_STOP_STP : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_START_DAC0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_START_DAC1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_START_DAC2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_4 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_8 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STOP_DAC0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STOP_DAC1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SLOPE_STOP_DAC2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWITCH_CMP_INPUT_CMP0 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWITCH_CMP_INPUT_CMP1 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWITCH_CMP_INPUT_CMP2 : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWSM_DSV1_NO_TRIGGER : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWSM_DSV1_W_TRIGGER : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWSM_DSV2_NO_TRIGGER : xmc_hrpwm.h
  • XMC_HRPWM_CSG_SWSM_DSV2_W_TRIGGER : xmc_hrpwm.h
  • XMC_HRPWM_DAC_SLOPE_GEN_STATUS_DAC0 : xmc_hrpwm.h
  • XMC_HRPWM_DAC_SLOPE_GEN_STATUS_DAC1 : xmc_hrpwm.h
  • XMC_HRPWM_DAC_SLOPE_GEN_STATUS_DAC2 : xmc_hrpwm.h
  • XMC_HRPWM_FUNC_STATUS_DISABLE : xmc_hrpwm.h
  • XMC_HRPWM_FUNC_STATUS_ENABLE : xmc_hrpwm.h
  • XMC_HRPWM_HR_LOGIC_NOT_WORKING : xmc_hrpwm.h
  • XMC_HRPWM_HR_LOGIC_WORKING : xmc_hrpwm.h
  • XMC_HRPWM_HR_PATH_HRC0 : xmc_hrpwm.h
  • XMC_HRPWM_HR_PATH_HRC1 : xmc_hrpwm.h
  • XMC_HRPWM_HR_PATH_HRC2 : xmc_hrpwm.h
  • XMC_HRPWM_HR_PATH_HRC3 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_CMP_SEL_CSG0 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_CMP_SEL_CSG1 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_CMP_SEL_CSG2 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_DT_TR_SEL_OVERFLOW : xmc_hrpwm.h
  • XMC_HRPWM_HRC_DT_TR_SEL_TIMER : xmc_hrpwm.h
  • XMC_HRPWM_HRC_HR_EDGE_SEL_BOTH : xmc_hrpwm.h
  • XMC_HRPWM_HRC_HR_EDGE_SEL_FALLING : xmc_hrpwm.h
  • XMC_HRPWM_HRC_HR_EDGE_SEL_NONE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_HR_EDGE_SEL_RISING : xmc_hrpwm.h
  • XMC_HRPWM_HRC_OUT_PASSIVE_LVL_HIGH : xmc_hrpwm.h
  • XMC_HRPWM_HRC_OUT_PASSIVE_LVL_LOW : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC0_DT_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC0_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC1_DT_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC1_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC2_DT_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC2_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC3_DT_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SHADOW_TX_HRC3_VALUE : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SOURCE_0 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SOURCE_1 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_EDGE_SEL_BOTH : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_EDGE_SEL_DISABLED : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_EDGE_SEL_FALLING : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_EDGE_SEL_RISING : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_INPUT_CCU : xmc_hrpwm.h
  • XMC_HRPWM_HRC_SRC_INPUT_CSG : xmc_hrpwm.h
  • XMC_HRPWM_HRC_TIMER_SEL_CCU_CC0 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_TIMER_SEL_CCU_CC1 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_TIMER_SEL_CCU_CC2 : xmc_hrpwm.h
  • XMC_HRPWM_HRC_TIMER_SEL_CCU_CC3 : xmc_hrpwm.h
  • XMC_HRPWM_LR_PATH_HRC0 : xmc_hrpwm.h
  • XMC_HRPWM_LR_PATH_HRC1 : xmc_hrpwm.h
  • XMC_HRPWM_LR_PATH_HRC2 : xmc_hrpwm.h
  • XMC_HRPWM_LR_PATH_HRC3 : xmc_hrpwm.h
  • XMC_HRPWM_SHADOW_TX_DAC0 : xmc_hrpwm.h
  • XMC_HRPWM_SHADOW_TX_DAC1 : xmc_hrpwm.h
  • XMC_HRPWM_SHADOW_TX_DAC2 : xmc_hrpwm.h
  • XMC_HRPWM_STATUS_BUSY : xmc_hrpwm.h
  • XMC_HRPWM_STATUS_ERROR : xmc_hrpwm.h
  • XMC_HRPWM_STATUS_OK : xmc_hrpwm.h
  • XMC_I2C_CH_CMD_READ : xmc_i2c.h
  • XMC_I2C_CH_CMD_WRITE : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ACK : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ARBITRATION_LOST : xmc_i2c.h
  • XMC_I2C_CH_EVENT_BAUD_RATE_GENERATOR : xmc_i2c.h
  • XMC_I2C_CH_EVENT_DATA_LOST : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ERROR : xmc_i2c.h
  • XMC_I2C_CH_EVENT_NACK : xmc_i2c.h
  • XMC_I2C_CH_EVENT_RECEIVE_START : xmc_i2c.h
  • XMC_I2C_CH_EVENT_REPEATED_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_EVENT_SLAVE_READ_REQUEST : xmc_i2c.h
  • XMC_I2C_CH_EVENT_STANDARD_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_EVENT_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_EVENT_STOP_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_EVENT_TRANSMIT_BUFFER : xmc_i2c.h
  • XMC_I2C_CH_EVENT_TRANSMIT_SHIFT : xmc_i2c.h
  • XMC_I2C_CH_INPUT_SCL : xmc_i2c.h
  • XMC_I2C_CH_INPUT_SDA : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_ACK : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_ADR : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_ERR : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_FIN : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_MODE : xmc_i2c.h
  • XMC_I2C_CH_STATUS_BUSY : xmc_i2c.h
  • XMC_I2C_CH_STATUS_ERROR : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ACK_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ARBITRATION_LOST : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ERROR : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_NACK_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_REPEATED_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_SLAVE_READ_REQUESTED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_SLAVE_SELECT : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_STOP_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_WRONG_TDF_CODE_FOUND : xmc_i2c.h
  • XMC_I2C_CH_STATUS_OK : xmc_i2c.h
  • XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 : xmc_i2s.h
  • XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK : xmc_i2s.h
  • XMC_I2S_CH_BUS_MODE_MASTER : xmc_i2s.h
  • XMC_I2S_CH_BUS_MODE_SLAVE : xmc_i2s.h
  • XMC_I2S_CH_CHANNEL_1_LEFT : xmc_i2s.h
  • XMC_I2S_CH_CHANNEL_2_RIGHT : xmc_i2s.h
  • XMC_I2S_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_EVENT_BAUD_RATE_GENERATOR : xmc_i2s.h
  • XMC_I2S_CH_EVENT_DATA_LOST : xmc_i2s.h
  • XMC_I2S_CH_EVENT_DX2TIEN_ACTIVATED : xmc_i2s.h
  • XMC_I2S_CH_EVENT_RECEIVE_START : xmc_i2s.h
  • XMC_I2S_CH_EVENT_STANDARD_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_EVENT_TRANSMIT_BUFFER : xmc_i2s.h
  • XMC_I2S_CH_EVENT_TRANSMIT_SHIFT : xmc_i2s.h
  • XMC_I2S_CH_EVENT_WA_FALLING_EDGE : xmc_i2s.h
  • XMC_I2S_CH_EVENT_WA_GENERATION_END : xmc_i2s.h
  • XMC_I2S_CH_EVENT_WA_RISING_EDGE : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN0 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN1 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN2 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN3 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_SLAVE_SCLKIN : xmc_i2s.h
  • XMC_I2S_CH_INPUT_SLAVE_WA : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_i2s.h
  • XMC_I2S_CH_STATUS_BUSY : xmc_i2s.h
  • XMC_I2S_CH_STATUS_ERROR : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_DX2S : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_DX2T_EVENT_DETECTED : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WA_FALLING_EDGE_EVENT : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WA_GENERATION_END : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WA_RISING_EDGE_EVENT : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WORD_ADDRESS : xmc_i2s.h
  • XMC_I2S_CH_STATUS_OK : xmc_i2s.h
  • XMC_I2S_CH_WA_POLARITY_DIRECT : xmc_i2s.h
  • XMC_I2S_CH_WA_POLARITY_INVERTED : xmc_i2s.h
  • XMC_LEDTS_ACCUMULATION_COUNT_10_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_11_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_12_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_13_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_14_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_15_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_16_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_1_TIME : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_2_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_3_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_4_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_5_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_6_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_7_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_8_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_9_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACTIVE_LEVEL_LED_COL_HIGH : xmc_ledts.h
  • XMC_LEDTS_ACTIVE_LEVEL_LED_COL_LOW : xmc_ledts.h
  • XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_ACTIVE : xmc_ledts.h
  • XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_INACTIVE : xmc_ledts.h
  • XMC_LEDTS_CLOCK_TYPE_MASTER : xmc_ledts.h
  • XMC_LEDTS_CLOCK_TYPE_SLAVE : xmc_ledts.h
  • XMC_LEDTS_COMMON_COMPARE_DISABLE : xmc_ledts.h
  • XMC_LEDTS_COMMON_COMPARE_ENABLE : xmc_ledts.h
  • XMC_LEDTS_EXT_PULLUP_COLA_DISABLE : xmc_ledts.h
  • XMC_LEDTS_EXT_PULLUP_COLA_ENABLE : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_16_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_1_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_4_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_8_CLK : xmc_ledts.h
  • XMC_LEDTS_FLAG_STATUS_NO : xmc_ledts.h
  • XMC_LEDTS_FLAG_STATUS_YES : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TIMEFRAME : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TIMEPERIOD : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TIMESLICE : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TSCOUNTER_OVERFLOW : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_TIMEFRAME : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_TIMEPERIOD : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_TIMESLICE : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_0 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_1 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_2 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_3 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_4 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_5 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_6 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_A : xmc_ledts.h
  • XMC_LEDTS_LED_FUNC_DISABLE : xmc_ledts.h
  • XMC_LEDTS_LED_FUNC_ENABLE : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_1 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_2 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_3 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_4 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_5 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_6 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_7 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_8 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_1 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_2 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_3 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_4 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_5 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_6 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_7 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_8 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_0 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_1 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_2 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_3 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_4 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_5 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_6 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_7 : xmc_ledts.h
  • XMC_LEDTS_STATUS_ERROR : xmc_ledts.h
  • XMC_LEDTS_STATUS_IDLE : xmc_ledts.h
  • XMC_LEDTS_STATUS_RUNNING : xmc_ledts.h
  • XMC_LEDTS_STATUS_SUCCESS : xmc_ledts.h
  • XMC_LEDTS_SUSPEND_DISABLE : xmc_ledts.h
  • XMC_LEDTS_SUSPEND_ENABLE : xmc_ledts.h
  • XMC_LEDTS_SW_CONTROL_DISABLE : xmc_ledts.h
  • XMC_LEDTS_SW_CONTROL_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TF_INTERRUPT_FLAG_ACTIVE : xmc_ledts.h
  • XMC_LEDTS_TF_INTERRUPT_FLAG_INACTIVE : xmc_ledts.h
  • XMC_LEDTS_TF_VALIDATION_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TF_VALIDATION_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TP_SYNC_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TP_SYNC_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_AUTO_RESET_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_AUTO_RESET_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_1_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_2_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_3_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_4_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_5_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_6_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_7_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_8_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_NO : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_YES : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_SATURATION_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_SATURATION_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_FUNC_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TS_FUNC_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_0 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_1 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_2 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_3 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_4 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_5 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_6 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_7 : xmc_ledts.h
  • XMC_POSIF_FILTER_16_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_1_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_2_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_32_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_4_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_64_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_8_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_DISABLED : xmc_posif.h
  • XMC_POSIF_HSC_TRIGGER_EDGE_FALLING : xmc_posif.h
  • XMC_POSIF_HSC_TRIGGER_EDGE_RISING : xmc_posif.h
  • XMC_POSIF_INPUT_ACTIVE_LEVEL_HIGH : xmc_posif.h
  • XMC_POSIF_INPUT_ACTIVE_LEVEL_LOW : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_A : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_B : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_C : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_D : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_E : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_F : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_G : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_H : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_CHE : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_CNT : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_DIR : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_ERR : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_HALL_INPUT : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_INDX : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_MCP_SHADOW_TRANSFER : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_PCLK : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_WHE : xmc_posif.h
  • XMC_POSIF_MODE_HALL_SENSOR : xmc_posif.h
  • XMC_POSIF_MODE_MCM : xmc_posif.h
  • XMC_POSIF_MODE_MCM_QD : xmc_posif.h
  • XMC_POSIF_MODE_QD : xmc_posif.h
  • XMC_POSIF_QD_DIR_CLOCKWISE : xmc_posif.h
  • XMC_POSIF_QD_DIR_COUNTERCLOCKWISE : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_ALWAYS : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_NEVER : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_ONCE : xmc_posif.h
  • XMC_POSIF_QD_MODE_DIRECTION_COUNT : xmc_posif.h
  • XMC_POSIF_QD_MODE_QUADRATURE : xmc_posif.h
  • XMC_POSIF_SR_ID_0 : xmc_posif.h
  • XMC_POSIF_SR_ID_1 : xmc_posif.h
  • XMC_POSIF_STATUS_ERROR : xmc_posif.h
  • XMC_POSIF_STATUS_OK : xmc_posif.h
  • XMC_RTC_EVENT_ALARM : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_DAYS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_HOURS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_MINUTES : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_MONTHS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_SECONDS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_YEARS : xmc_rtc.h
  • XMC_RTC_STATUS_BUSY : xmc_rtc.h
  • XMC_RTC_STATUS_ERROR : xmc_rtc.h
  • XMC_RTC_STATUS_OK : xmc_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_ALARM : xmc4_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_DAYS : xmc4_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_HOURS : xmc4_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_MINUTES : xmc4_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_MONTHS : xmc4_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_SECONDS : xmc4_rtc.h
  • XMC_RTC_WAKEUP_EVENT_ON_YEARS : xmc4_rtc.h
  • XMC_SCU_BOOTMODE_ABM0 : xmc4_scu.h
  • XMC_SCU_BOOTMODE_ABM1 : xmc4_scu.h
  • XMC_SCU_BOOTMODE_ASC_BSL : xmc4_scu.h
  • XMC_SCU_BOOTMODE_BMI : xmc4_scu.h
  • XMC_SCU_BOOTMODE_CAN_BSL : xmc4_scu.h
  • XMC_SCU_BOOTMODE_FABM : xmc4_scu.h
  • XMC_SCU_BOOTMODE_NORMAL : xmc4_scu.h
  • XMC_SCU_BOOTMODE_PSRAM_BOOT : xmc4_scu.h
  • XMC_SCU_CCU_TRIGGER_CCU40 : xmc4_scu.h
  • XMC_SCU_CCU_TRIGGER_CCU80 : xmc4_scu.h
  • XMC_SCU_CLOCK_CCU : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_CCU : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_EBU : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_ETH : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_SDMMC : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_USB : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_DISABLE_WDT : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_CCU : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_EBU : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_ETH : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_SDMMC : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_USB : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_ENABLE_WDT : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_FLASH_POWERDOWN : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_PLL_POWERDOWN : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_SYSCLK_FOFI : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_SYSCLK_FPLL : xmc4_scu.h
  • XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_VCO_POWERDOWN : xmc4_scu.h
  • XMC_SCU_CLOCK_EBU : xmc4_scu.h
  • XMC_SCU_CLOCK_ECATCLKSRC_SYSPLL : xmc4_scu.h
  • XMC_SCU_CLOCK_ECATCLKSRC_USBPLL : xmc4_scu.h
  • XMC_SCU_CLOCK_ETH : xmc4_scu.h
  • XMC_SCU_CLOCK_EXTOUTCLKSRC_PLL : xmc4_scu.h
  • XMC_SCU_CLOCK_EXTOUTCLKSRC_SYS : xmc4_scu.h
  • XMC_SCU_CLOCK_EXTOUTCLKSRC_USB : xmc4_scu.h
  • XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_AUTOMATIC : xmc4_scu.h
  • XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_FACTORY : xmc4_scu.h
  • XMC_SCU_CLOCK_MMC : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLE_EBU : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLE_ETH : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLE_SDMMC : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLE_USB : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLED_CCU : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_DISABLED_WDT : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_CCU : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_EBU : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_ETH : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_SDMMC : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_USB : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_WDT : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_SYSCLK_FOFI : xmc4_scu.h
  • XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_SYSCLK_FPLL : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSCLKSRC_OFI : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSCLKSRC_PLL : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLL_MODE_DISABLED : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLL_MODE_NORMAL : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLL_MODE_PRESCALAR : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLLCLKSRC_OFI : xmc4_scu.h
  • XMC_SCU_CLOCK_SYSPLLCLKSRC_OSCHP : xmc4_scu.h
  • XMC_SCU_CLOCK_USB : xmc4_scu.h
  • XMC_SCU_CLOCK_USBCLKSRC_SYSPLL : xmc4_scu.h
  • XMC_SCU_CLOCK_USBCLKSRC_USBPLL : xmc4_scu.h
  • XMC_SCU_CLOCK_WDT : xmc4_scu.h
  • XMC_SCU_CLOCK_WDTCLKSRC_OFI : xmc4_scu.h
  • XMC_SCU_CLOCK_WDTCLKSRC_PLL : xmc4_scu.h
  • XMC_SCU_CLOCK_WDTCLKSRC_STDBY : xmc4_scu.h
  • XMC_SCU_HIB_CTRL_STATUS_ACTIVE : xmc4_scu.h
  • XMC_SCU_HIB_CTRL_STATUS_NO_ACTIVE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_NEGEDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_POSEDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_NEGEDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_POSEDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_LPAC_VBAT_NEGEDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_LPAC_VBAT_POSEDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_ULPWDG : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_WAKEUP_ON_NEG_EDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_WAKEUP_ON_POS_EDGE : xmc4_scu.h
  • XMC_SCU_HIB_EVENT_WAKEUP_ON_RTC : xmc4_scu.h
  • XMC_SCU_HIB_HIBERNATE_MODE_EXTERNAL : xmc4_scu.h
  • XMC_SCU_HIB_HIBERNATE_MODE_INTERNAL : xmc4_scu.h
  • XMC_SCU_HIB_IO_0 : xmc4_scu.h
  • XMC_SCU_HIB_IO_1 : xmc4_scu.h
  • XMC_SCU_HIB_IO_OUTPUT_LEVEL_HIGH : xmc4_scu.h
  • XMC_SCU_HIB_IO_OUTPUT_LEVEL_LOW : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_INPUT_DISABLED : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_INPUT_HIB_IO_0 : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_INPUT_HIB_IO_1 : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_INPUT_VBAT : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_HIB_IO_0_ABOVE_THRESHOLD : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_HIB_IO_0_COMPARE_DONE : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_HIB_IO_1_ABOVE_THRESHOLD : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_HIB_IO_1_COMPARE_DONE : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_VBAT_ABOVE_THRESHOLD : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_STATUS_VBAT_COMPARE_DONE : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_CONTINOUS : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_ON_WAKEUP_NEGATIVE_EDGE_EVENT : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_ON_WAKEUP_POSITIVE_EDGE_EVENT : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_RTC_ALARM_EVENT : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_RTC_PERIODIC_EVENT : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_SINGLE_SHOT : xmc4_scu.h
  • XMC_SCU_HIB_LPAC_TRIGGER_SUBSECOND_INTERVAL_COUNTER : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_INPUT_PULL_DOWN : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_INPUT_PULL_NONE : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_INPUT_PULL_UP : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_OUTPUT_OPEN_DRAIN_GPIO : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_OUTPUT_OPEN_DRAIN_HIBCTRL : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_OUTPUT_OPEN_DRAIN_WDTSRV : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_OUTPUT_PUSH_PULL_GPIO : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_OUTPUT_PUSH_PULL_HIBCTRL : xmc4_scu.h
  • XMC_SCU_HIB_PIN_MODE_OUTPUT_PUSH_PULL_WDTSRV : xmc4_scu.h
  • XMC_SCU_HIB_RTCCLKSRC_OSI : xmc4_scu.h
  • XMC_SCU_HIB_RTCCLKSRC_ULP : xmc4_scu.h
  • XMC_SCU_HIB_SR0_INPUT_ACMP0 : xmc4_scu.h
  • XMC_SCU_HIB_SR0_INPUT_HIB_IO_0 : xmc4_scu.h
  • XMC_SCU_HIB_SR0_INPUT_HIB_IO_1 : xmc4_scu.h
  • XMC_SCU_HIB_STDBYCLKSRC_OSCULP : xmc4_scu.h
  • XMC_SCU_HIB_STDBYCLKSRC_OSI : xmc4_scu.h
  • XMC_SCU_NMIREQ_ERU0_0 : xmc4_scu.h
  • XMC_SCU_NMIREQ_ERU0_1 : xmc4_scu.h
  • XMC_SCU_NMIREQ_ERU0_2 : xmc4_scu.h
  • XMC_SCU_NMIREQ_ERU0_3 : xmc4_scu.h
  • XMC_SCU_NMIREQ_RTC_AI : xmc4_scu.h
  • XMC_SCU_NMIREQ_RTC_PI : xmc4_scu.h
  • XMC_SCU_NMIREQ_WDT_WARN : xmc4_scu.h
  • XMC_SCU_PARITY_DSRAM1_MEM : xmc4_scu.h
  • XMC_SCU_PARITY_MCAN_MEM : xmc4_scu.h
  • XMC_SCU_PARITY_PMU_MEM : xmc4_scu.h
  • XMC_SCU_PARITY_PSRAM_MEM : xmc4_scu.h
  • XMC_SCU_PARITY_USB_MEM : xmc4_scu.h
  • XMC_SCU_PARITY_USIC0_MEM : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_CCU40 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_CCU80 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_DAC : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_DSD : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_EBU : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_ECAT0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_ERU1 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_ETH0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_FCE : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_GPDMA0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_GPDMA1 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_HRPWM0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_LEDTS0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_MCAN : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_PORTS : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_POSIF0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_SDMMC : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_USB0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_USIC0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_USIC1 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_USIC2 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_VADC : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_WDT : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_CCU40 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_CCU80 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_DAC : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_DSD : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_EBU : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_ECAT0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_ERU1 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_ETH0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_FCE : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_GPDMA0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_GPDMA1 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_HRPWM0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_LEDTS0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_MCAN : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_PORTS : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_POSIF0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_SDMMC : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_USB0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_USIC0 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_USIC1 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_USIC2 : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_VADC : xmc4_scu.h
  • XMC_SCU_PERIPHERAL_RESET_WDT : xmc4_scu.h
  • XMC_SCU_POWER_EVR_STATUS_EVR13_OVERVOLTAGE : xmc4_scu.h
  • XMC_SCU_POWER_EVR_STATUS_OK : xmc4_scu.h
  • XMC_SCU_POWER_MODE_DEEPSLEEP : xmc4_scu.h
  • XMC_SCU_POWER_MODE_SLEEP : xmc4_scu.h
  • XMC_SCU_RESET_REASON_LOCKUP : xmc4_scu.h
  • XMC_SCU_RESET_REASON_PARITY_ERROR : xmc4_scu.h
  • XMC_SCU_RESET_REASON_PORST : xmc4_scu.h
  • XMC_SCU_RESET_REASON_PV : xmc4_scu.h
  • XMC_SCU_RESET_REASON_SW : xmc4_scu.h
  • XMC_SCU_RESET_REASON_SWD : xmc4_scu.h
  • XMC_SCU_RESET_REASON_WATCHDOG : xmc4_scu.h
  • XMC_SCU_STATUS_BUSY : xmc_scu.h
  • XMC_SCU_STATUS_ERROR : xmc_scu.h
  • XMC_SCU_STATUS_OK : xmc_scu.h
  • XMC_SCU_TRAP_BROWNOUT : xmc4_scu.h
  • XMC_SCU_TRAP_ECAT_RESET : xmc4_scu.h
  • XMC_SCU_TRAP_OSC_WDG : xmc4_scu.h
  • XMC_SCU_TRAP_PARITY_ERROR : xmc4_scu.h
  • XMC_SCU_TRAP_PER_BRIDGE0 : xmc4_scu.h
  • XMC_SCU_TRAP_PER_BRIDGE1 : xmc4_scu.h
  • XMC_SCU_TRAP_ULP_WDG : xmc4_scu.h
  • XMC_SCU_TRAP_USB_VCO_LOCK : xmc4_scu.h
  • XMC_SCU_TRAP_VCO_LOCK : xmc4_scu.h
  • XMC_SDMMC_ACMD12_NOT_EXEC_ERR : xmc_sdmmc.h
  • XMC_SDMMC_ACMD_CRC_ERR : xmc_sdmmc.h
  • XMC_SDMMC_ACMD_END_BIT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_ACMD_ERR : xmc_sdmmc.h
  • XMC_SDMMC_ACMD_IND_ERR : xmc_sdmmc.h
  • XMC_SDMMC_ACMD_TIMEOUT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_BLOCK_GAP_EVENT : xmc_sdmmc.h
  • XMC_SDMMC_BUFFER_READ_READY : xmc_sdmmc.h
  • XMC_SDMMC_BUFFER_WRITE_READY : xmc_sdmmc.h
  • XMC_SDMMC_CARD_ERR : xmc_sdmmc.h
  • XMC_SDMMC_CARD_INS : xmc_sdmmc.h
  • XMC_SDMMC_CARD_INT : xmc_sdmmc.h
  • XMC_SDMMC_CARD_REMOVAL : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_1 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_128 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_16 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_2 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_256 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_32 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_4 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_64 : xmc_sdmmc.h
  • XMC_SDMMC_CLK_DIV_8 : xmc_sdmmc.h
  • XMC_SDMMC_CMD_COMPLETE : xmc_sdmmc.h
  • XMC_SDMMC_CMD_CRC_ERR : xmc_sdmmc.h
  • XMC_SDMMC_CMD_END_BIT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_CMD_IND_ERR : xmc_sdmmc.h
  • XMC_SDMMC_CMD_NOT_ISSUED_BY_ACMD12_ERR : xmc_sdmmc.h
  • XMC_SDMMC_CMD_TIMEOUT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_RESPONSE_LONG : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_RESPONSE_NONE : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_RESPONSE_SHORT : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_RESPONSE_SHORT_BUSY : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_TYPE_ABORT : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_TYPE_NORMAL : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_TYPE_RESUME : xmc_sdmmc.h
  • XMC_SDMMC_COMMAND_TYPE_SUSPEND : xmc_sdmmc.h
  • XMC_SDMMC_CURRENT_LIMIT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_14 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_15 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_16 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_17 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_18 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_19 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_20 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_21 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_22 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_23 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_24 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_25 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_26 : xmc_sdmmc.h
  • XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_27 : xmc_sdmmc.h
  • XMC_SDMMC_DATA_CRC_ERR : xmc_sdmmc.h
  • XMC_SDMMC_DATA_END_BIT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_DATA_LINES_1 : xmc_sdmmc.h
  • XMC_SDMMC_DATA_LINES_4 : xmc_sdmmc.h
  • XMC_SDMMC_DATA_LINES_8 : xmc_sdmmc.h
  • XMC_SDMMC_DATA_TIMEOUT_ERR : xmc_sdmmc.h
  • XMC_SDMMC_DATA_TRANSFER_CARD_TO_HOST : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_NO_RESPONSE : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_R1 : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_R1b : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_R2 : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_R3 : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_R6 : xmc_sdmmc.h
  • XMC_SDMMC_RESPONSE_TYPE_R7 : xmc_sdmmc.h
  • XMC_SDMMC_STATUS_CMD_LINE_BUSY : xmc_sdmmc.h
  • XMC_SDMMC_STATUS_DAT_LINE_BUSY : xmc_sdmmc.h
  • XMC_SDMMC_STATUS_SUCCESS : xmc_sdmmc.h
  • XMC_SDMMC_SW_RESET_ALL : xmc_sdmmc.h
  • XMC_SDMMC_SW_RST_CMD_LINE : xmc_sdmmc.h
  • XMC_SDMMC_SW_RST_DAT_LINE : xmc_sdmmc.h
  • XMC_SDMMC_TARGET_RESP_ERR : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_AUTO_CMD_12 : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_AUTO_CMD_DISABLED : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_TYPE_INFINITE : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_TYPE_MULTIPLE : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_TYPE_SINGLE : xmc_sdmmc.h
  • XMC_SDMMC_TRANSFER_MODE_TYPE_STOP_MULTIPLE : xmc_sdmmc.h
  • XMC_SDMMC_TX_COMPLETE : xmc_sdmmc.h
  • XMC_SDMMC_WAKEUP_EN_CARD_INS : xmc_sdmmc.h
  • XMC_SDMMC_WAKEUP_EN_CARD_INT : xmc_sdmmc.h
  • XMC_SDMMC_WAKEUP_EN_CARD_REM : xmc_sdmmc.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED : xmc_spi.h
  • XMC_SPI_CH_BUS_MODE_MASTER : xmc_spi.h
  • XMC_SPI_CH_BUS_MODE_SLAVE : xmc_spi.h
  • XMC_SPI_CH_DATA_POLARITY_DIRECT : xmc_spi.h
  • XMC_SPI_CH_DATA_POLARITY_INVERT : xmc_spi.h
  • XMC_SPI_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_EVENT_BAUD_RATE_GENERATOR : xmc_spi.h
  • XMC_SPI_CH_EVENT_DATA_LOST : xmc_spi.h
  • XMC_SPI_CH_EVENT_DX2TIEN_ACTIVATED : xmc_spi.h
  • XMC_SPI_CH_EVENT_MSLS_CHANGE : xmc_spi.h
  • XMC_SPI_CH_EVENT_PARITY_ERROR : xmc_spi.h
  • XMC_SPI_CH_EVENT_RECEIVE_START : xmc_spi.h
  • XMC_SPI_CH_EVENT_STANDARD_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_EVENT_TRANSMIT_BUFFER : xmc_spi.h
  • XMC_SPI_CH_EVENT_TRANSMIT_SHIFT : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN0 : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN1 : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN2 : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN3 : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FMCLK : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FPDIV : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FPPP : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FSCLK : xmc_spi.h
  • XMC_SPI_CH_INPUT_SLAVE_SCLKIN : xmc_spi.h
  • XMC_SPI_CH_INPUT_SLAVE_SELIN : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_spi.h
  • XMC_SPI_CH_MODE_DUAL : xmc_spi.h
  • XMC_SPI_CH_MODE_QUAD : xmc_spi.h
  • XMC_SPI_CH_MODE_STANDARD : xmc_spi.h
  • XMC_SPI_CH_MODE_STANDARD_HALFDUPLEX : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SEL_INV_TO_MSLS : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SEL_SAME_AS_MSLS : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_0 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_1 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_2 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_3 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_4 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_5 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_6 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_7 : xmc_spi.h
  • XMC_SPI_CH_STATUS_BUSY : xmc_spi.h
  • XMC_SPI_CH_STATUS_ERROR : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_DX2S : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_DX2T_EVENT_DETECTED : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_MSLS : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_MSLS_EVENT_DETECTED : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_PARITY_ERROR_EVENT_DETECTED : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_OK : xmc_spi.h
  • XMC_UART_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_uart.h
  • XMC_UART_CH_EVENT_BAUD_RATE_GENERATOR : xmc_uart.h
  • XMC_UART_CH_EVENT_COLLISION : xmc_uart.h
  • XMC_UART_CH_EVENT_DATA_LOST : xmc_uart.h
  • XMC_UART_CH_EVENT_FORMAT_ERROR : xmc_uart.h
  • XMC_UART_CH_EVENT_FRAME_FINISHED : xmc_uart.h
  • XMC_UART_CH_EVENT_RECEIVE_START : xmc_uart.h
  • XMC_UART_CH_EVENT_RECEIVER_NOISE : xmc_uart.h
  • XMC_UART_CH_EVENT_STANDARD_RECEIVE : xmc_uart.h
  • XMC_UART_CH_EVENT_SYNCHRONIZATION_BREAK : xmc_uart.h
  • XMC_UART_CH_EVENT_TRANSMIT_BUFFER : xmc_uart.h
  • XMC_UART_CH_EVENT_TRANSMIT_SHIFT : xmc_uart.h
  • XMC_UART_CH_INPUT_RXD : xmc_uart.h
  • XMC_UART_CH_INPUT_RXD1 : xmc_uart.h
  • XMC_UART_CH_INPUT_RXD2 : xmc_uart.h
  • XMC_UART_CH_INPUT_SAMPLING_FREQ_FPERIPH : xmc_uart.h
  • XMC_UART_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_uart.h
  • XMC_UART_CH_STATUS_BUSY : xmc_uart.h
  • XMC_UART_CH_STATUS_ERROR : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_COLLISION_DETECTED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_FORMAT_ERROR_IN_STOP_BIT_0 : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_FORMAT_ERROR_IN_STOP_BIT_1 : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVE_FRAME_FINISHED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVER_NOISE_DETECTED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEPTION_IDLE : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_SYNCHRONIZATION_BREAK_DETECTED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSFER_STATUS_BUSY : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMISSION_IDLE : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMITTER_FRAME_FINISHED : xmc_uart.h
  • XMC_UART_CH_STATUS_OK : xmc_uart.h
  • XMC_USBD_ENDPOINT_TYPE_BULK : xmc_usbd.h
  • XMC_USBD_ENDPOINT_TYPE_CONTROL : xmc_usbd.h
  • XMC_USBD_ENDPOINT_TYPE_INTERRUPT : xmc_usbd.h
  • XMC_USBD_ENDPOINT_TYPE_ISOCHRONOUS : xmc_usbd.h
  • XMC_USBD_EP_EVENT_IN : xmc_usbd.h
  • XMC_USBD_EP_EVENT_OUT : xmc_usbd.h
  • XMC_USBD_EP_EVENT_SETUP : xmc_usbd.h
  • XMC_USBD_EVENT_CONNECT : xmc_usbd.h
  • XMC_USBD_EVENT_DISCONNECT : xmc_usbd.h
  • XMC_USBD_EVENT_EARLYSUSPEND : xmc_usbd.h
  • XMC_USBD_EVENT_ENUMDONE : xmc_usbd.h
  • XMC_USBD_EVENT_ENUMNOTDONE : xmc_usbd.h
  • XMC_USBD_EVENT_HIGH_SPEED : xmc_usbd.h
  • XMC_USBD_EVENT_IN_EP_AHB_ERROR : xmc_usbd.h
  • XMC_USBD_EVENT_IN_EP_DISABLED : xmc_usbd.h
  • XMC_USBD_EVENT_IN_EP_TIMEOUT : xmc_usbd.h
  • XMC_USBD_EVENT_IN_EP_TX_COMPLET : xmc_usbd.h
  • XMC_USBD_EVENT_INEP : xmc_usbd.h
  • XMC_USBD_EVENT_OUT_EP_AHB_ERROR : xmc_usbd.h
  • XMC_USBD_EVENT_OUT_EP_DISABLED : xmc_usbd.h
  • XMC_USBD_EVENT_OUT_EP_SETUP : xmc_usbd.h
  • XMC_USBD_EVENT_OUT_EP_TX_COMPLET : xmc_usbd.h
  • XMC_USBD_EVENT_OUTEP : xmc_usbd.h
  • XMC_USBD_EVENT_POWER_OFF : xmc_usbd.h
  • XMC_USBD_EVENT_POWER_ON : xmc_usbd.h
  • XMC_USBD_EVENT_REMOTE_WAKEUP : xmc_usbd.h
  • XMC_USBD_EVENT_RESET : xmc_usbd.h
  • XMC_USBD_EVENT_RESUME : xmc_usbd.h
  • XMC_USBD_EVENT_SOF : xmc_usbd.h
  • XMC_USBD_EVENT_SUSPEND : xmc_usbd.h
  • XMC_USBD_GRXSTS_PKTSTS_GOUTNAK : xmc_usbd.h
  • XMC_USBD_GRXSTS_PKTSTS_OUTCMPL : xmc_usbd.h
  • XMC_USBD_GRXSTS_PKTSTS_OUTDATA : xmc_usbd.h
  • XMC_USBD_GRXSTS_PKTSTS_SETUP : xmc_usbd.h
  • XMC_USBD_GRXSTS_PKTSTS_SETUPCMPL : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_1 : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_2 : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_3 : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_4 : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_5 : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_6 : xmc_usbd.h
  • XMC_USBD_MAX_NUM_EPS_7 : xmc_usbd.h
  • XMC_USBD_SET_ADDRESS_STAGE_SETUP : xmc_usbd.h
  • XMC_USBD_SET_ADDRESS_STAGE_STATUS : xmc_usbd.h
  • XMC_USBD_STATUS_BUSY : xmc_usbd.h
  • XMC_USBD_STATUS_ERROR : xmc_usbd.h
  • XMC_USBD_STATUS_OK : xmc_usbd.h
  • XMC_USBD_USE_DMA : xmc_usbd.h
  • XMC_USBD_USE_FIFO : xmc_usbd.h
  • XMC_USBH_POWER_FULL : xmc_usbh.h
  • XMC_USBH_POWER_LOW : xmc_usbh.h
  • XMC_USBH_POWER_OFF : xmc_usbh.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_DISABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_FRACTIONAL : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_NORMAL : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_SOURCE_DIVIDER : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_SOURCE_DX1T : xmc_usic.h
  • XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_0 : xmc_usic.h
  • XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_1 : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_ENABLED : xmc_usic.h
  • XMC_USIC_CH_DATA_OUTPUT_MODE_INVERTED : xmc_usic.h
  • XMC_USIC_CH_DATA_OUTPUT_MODE_NORMAL : xmc_usic.h
  • XMC_USIC_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_EVENT_BAUD_RATE_GENERATOR : xmc_usic.h
  • XMC_USIC_CH_EVENT_DATA_LOST : xmc_usic.h
  • XMC_USIC_CH_EVENT_RECEIVE_START : xmc_usic.h
  • XMC_USIC_CH_EVENT_STANDARD_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_EVENT_TRANSMIT_BUFFER : xmc_usic.h
  • XMC_USIC_CH_EVENT_TRANSMIT_SHIFT : xmc_usic.h
  • XMC_USIC_CH_FIFO_DISABLED : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_16WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_2WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_32WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_4WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_64WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_8WORDS : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_BOTH_EDGES : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_FALLING_EDGE : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_RISING_EDGE : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_TRIGGER_DISABLED : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX0 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX1 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX2 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX3 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX4 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX5 : xmc_usic.h
  • XMC_USIC_CH_INPUT_SAMPLING_FREQ_FPERIPH : xmc_usic.h
  • XMC_USIC_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_RUN_0 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_RUN_1 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_STOP_0 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_STOP_1 : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_I2C : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_I2S : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_IDLE : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_SPI : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_UART : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_EVEN : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_NONE : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_ODD : xmc_usic.h
  • XMC_USIC_CH_PASSIVE_DATA_LEVEL0 : xmc_usic.h
  • XMC_USIC_CH_PASSIVE_DATA_LEVEL1 : xmc_usic.h
  • XMC_USIC_CH_RBUF_STATUS_DATA_VALID0 : xmc_usic.h
  • XMC_USIC_CH_RBUF_STATUS_DATA_VALID1 : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_ERROR : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_STANDARD : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_ERROR : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_STANDARD : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_STANDARD : xmc_usic.h
  • XMC_USIC_CH_SHIFT_DIRECTION_LSB_FIRST : xmc_usic.h
  • XMC_USIC_CH_SHIFT_DIRECTION_MSB_FIRST : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_DISABLED : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_ON_TDV : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_0 : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_1 : xmc_usic.h
  • XMC_USIC_CH_STATUS_BUSY : xmc_usic.h
  • XMC_USIC_CH_STATUS_ERROR : xmc_usic.h
  • XMC_USIC_CH_STATUS_OK : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_BUSY : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_IDLE : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_SET_BUSY : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_SET_IDLE : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_CONF_ERROR : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_CONF_STANDARD : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_ERROR : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_STANDARD : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_STANDARD : xmc_usic.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_0 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_1 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_2 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_3 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_0 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_1 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_2 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_3 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_SELECT_LOWER_BOUND : xmc_vadc.h
  • XMC_VADC_BOUNDARY_SELECT_UPPER_BOUND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_CONDITION_ABOVE_BAND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_CONDITION_BELOW_BAND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BWDCH_VAGND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BWDCH_VAREF : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GROUP_CLASS0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GROUP_CLASS1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_ALWAYS : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_COMPHIGH : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_COMPLOW : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_INBOUND : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_NEVER : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_OUTBOUND : xmc_vadc.h
  • XMC_VADC_CHANNEL_REF_ALT_CH0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_REF_INTREF : xmc_vadc.h
  • XMC_VADC_CONVMODE_10BIT : xmc_vadc.h
  • XMC_VADC_CONVMODE_12BIT : xmc_vadc.h
  • XMC_VADC_CONVMODE_8BIT : xmc_vadc.h
  • XMC_VADC_CONVMODE_FASTCOMPARE : xmc_vadc.h
  • XMC_VADC_DMM_DIFFERENCE_MODE : xmc_vadc.h
  • XMC_VADC_DMM_FILTERING_MODE : xmc_vadc.h
  • XMC_VADC_DMM_REDUCTION_MODE : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_HIGH : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_LOW : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_UNKNOWN : xmc_vadc.h
  • XMC_VADC_GATEMODE_ACTIVEHIGH : xmc_vadc.h
  • XMC_VADC_GATEMODE_ACTIVELOW : xmc_vadc.h
  • XMC_VADC_GATEMODE_BLOCK : xmc_vadc.h
  • XMC_VADC_GATEMODE_IGNORE : xmc_vadc.h
  • XMC_VADC_GLOBAL_EVENT_BKGNDSOURCE : xmc_vadc.h
  • XMC_VADC_GLOBAL_EVENT_RESULT : xmc_vadc.h
  • XMC_VADC_GROUP_ARBMODE_ALWAYS : xmc_vadc.h
  • XMC_VADC_GROUP_ARBMODE_ONDEMAND : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_DISABLED : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED_ACTIVE_HIGH : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED_ACTIVE_LOW : xmc_vadc.h
  • XMC_VADC_GROUP_CONV_EMUX : xmc_vadc.h
  • XMC_VADC_GROUP_CONV_STD : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXCODE_BINARY : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXCODE_GRAY : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_SEQUENCEMODE : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_SINGLEMODE : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_STEADYMODE : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_SWCTRL : xmc_vadc.h
  • XMC_VADC_GROUP_IRQ_KERNEL : xmc_vadc.h
  • XMC_VADC_GROUP_IRQ_SHARED : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_NORMAL : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_OFF : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_RESERVED1 : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_RESERVED2 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_0 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_1 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_2 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_3 : xmc_vadc.h
  • XMC_VADC_GROUP_STATE_BUSY : xmc_vadc.h
  • XMC_VADC_GROUP_STATE_IDLE : xmc_vadc.h
  • XMC_VADC_REQ_GT_A : xmc_vadc.h
  • XMC_VADC_REQ_GT_B : xmc_vadc.h
  • XMC_VADC_REQ_GT_C : xmc_vadc.h
  • XMC_VADC_REQ_GT_D : xmc_vadc.h
  • XMC_VADC_REQ_GT_E : xmc_vadc.h
  • XMC_VADC_REQ_GT_F : xmc_vadc.h
  • XMC_VADC_REQ_GT_G : xmc_vadc.h
  • XMC_VADC_REQ_GT_H : xmc_vadc.h
  • XMC_VADC_REQ_GT_I : xmc_vadc.h
  • XMC_VADC_REQ_GT_J : xmc_vadc.h
  • XMC_VADC_REQ_GT_K : xmc_vadc.h
  • XMC_VADC_REQ_GT_L : xmc_vadc.h
  • XMC_VADC_REQ_GT_M : xmc_vadc.h
  • XMC_VADC_REQ_GT_N : xmc_vadc.h
  • XMC_VADC_REQ_GT_O : xmc_vadc.h
  • XMC_VADC_REQ_GT_P : xmc_vadc.h
  • XMC_VADC_REQ_TR_A : xmc_vadc.h
  • XMC_VADC_REQ_TR_B : xmc_vadc.h
  • XMC_VADC_REQ_TR_C : xmc_vadc.h
  • XMC_VADC_REQ_TR_D : xmc_vadc.h
  • XMC_VADC_REQ_TR_E : xmc_vadc.h
  • XMC_VADC_REQ_TR_F : xmc_vadc.h
  • XMC_VADC_REQ_TR_G : xmc_vadc.h
  • XMC_VADC_REQ_TR_H : xmc_vadc.h
  • XMC_VADC_REQ_TR_I : xmc_vadc.h
  • XMC_VADC_REQ_TR_J : xmc_vadc.h
  • XMC_VADC_REQ_TR_K : xmc_vadc.h
  • XMC_VADC_REQ_TR_L : xmc_vadc.h
  • XMC_VADC_REQ_TR_M : xmc_vadc.h
  • XMC_VADC_REQ_TR_N : xmc_vadc.h
  • XMC_VADC_REQ_TR_O : xmc_vadc.h
  • XMC_VADC_REQ_TR_P : xmc_vadc.h
  • XMC_VADC_RESULT_ALIGN_LEFT : xmc_vadc.h
  • XMC_VADC_RESULT_ALIGN_RIGHT : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_10BIT_LEFT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_10BIT_RIGHT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_12BIT_LEFT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_12BIT_RIGHT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_8BIT_LEFT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_8BIT_RIGHT_ALIGN : xmc_vadc.h
  • XMC_VADC_SCAN_LOAD_COMBINE : xmc_vadc.h
  • XMC_VADC_SCAN_LOAD_OVERWRITE : xmc_vadc.h
  • XMC_VADC_SCAN_TYPE_BACKGROUND : xmc_vadc.h
  • XMC_VADC_SCAN_TYPE_GROUPSCAN : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR0 : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR1 : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR2 : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR3 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR0 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR1 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR2 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR3 : xmc_vadc.h
  • XMC_VADC_STARTMODE_CIR : xmc_vadc.h
  • XMC_VADC_STARTMODE_CNR : xmc_vadc.h
  • XMC_VADC_STARTMODE_WFS : xmc_vadc.h
  • XMC_VADC_STATUS_ERROR : xmc_vadc.h
  • XMC_VADC_STATUS_SUCCESS : xmc_vadc.h
  • XMC_VADC_SYNCTR_EVAL_1 : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_ANY : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_FALLING : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_NONE : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_RISING : xmc_vadc.h
  • XMC_WDT_DEBUG_MODE_RUN : xmc_wdt.h
  • XMC_WDT_DEBUG_MODE_STOP : xmc_wdt.h
  • XMC_WDT_MODE_PREWARNING : xmc_wdt.h
  • XMC_WDT_MODE_TIMEOUT : xmc_wdt.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • c
  • e
  • u
  • x

- c -

  • CAN_MO_MOIPR_Msk : xmc_can.h
  • CAN_NODE_NIPR_Msk : xmc_can.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • c
  • e
  • u
  • x

- e -

  • ETH_MAC_DMA_RDES0_AFM : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_CE : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_DBE : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_DE : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_ES : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_ESA : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_FL : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_FS : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_FT : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_LC : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_LE : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_LS : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_OE : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_OWN : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_RE : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_RWT : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_SAF : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_TSA : xmc_eth_mac.h
  • ETH_MAC_DMA_RDES0_VLAN : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_CC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_CIC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_DB : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_DC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_DP : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_EC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_ED : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_ES : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_FF : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_FS : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_IC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_IHE : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_IPE : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_JT : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_LC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_LOC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_LS : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_NC : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_OWN : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_TCH : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_TER : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_TTSE : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_TTSS : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_UF : xmc_eth_mac.h
  • ETH_MAC_DMA_TDES0_VF : xmc_eth_mac.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • c
  • e
  • u
  • x

- u -

  • USB_CH_HCCHARx_DEVADDR : xmc_usbh.h
  • USB_CH_HCCHARx_EPDIR : xmc_usbh.h
  • USB_CH_HCCHARx_EPNUM : xmc_usbh.h
  • USB_CH_HCCHARx_EPTYPE : xmc_usbh.h
  • USB_CH_HCCHARx_MCEC : xmc_usbh.h
  • USB_CH_HCCHARx_MPS : xmc_usbh.h
  • USB_CH_HCFG_FSLSPCS : xmc_usbh.h
  • USB_CH_HCFG_FSLSSUP : xmc_usbh.h
  • USB_CH_HCINTx_ALL : xmc_usbh.h
  • USB_CH_HCINTx_ERRORS : xmc_usbh.h
  • USB_CH_HCTSIZx_DPID : xmc_usbh.h
  • USB_CH_HCTSIZx_DPID_DATA0 : xmc_usbh.h
  • USB_CH_HCTSIZx_DPID_DATA1 : xmc_usbh.h
  • USB_CH_HCTSIZx_DPID_DATA2 : xmc_usbh.h
  • USB_CH_HCTSIZx_DPID_MDATA : xmc_usbh.h
  • USB_CH_HCTSIZx_DPID_SETUP : xmc_usbh.h
  • USB_GRXSTSR_HOSTMODE_PktSts_IN_DATA_PKT : xmc_usbh.h
  • USB_GRXSTSR_HOSTMODE_PktSts_IN_TRSF_CPL : xmc_usbh.h
  • USBH0_MAX_PIPE_NUM : xmc_usbh.h
  • USBH_PIPE_GET_INDEX : xmc_usbh.h
  • USIC_CH_DXCR_CM_Msk : xmc_usic.h
  • USIC_CH_DXCR_CM_Pos : xmc_usic.h
  • USIC_CH_DXCR_DFEN_Msk : xmc_usic.h
  • USIC_CH_DXCR_DPOL_Msk : xmc_usic.h
  • USIC_CH_DXCR_DSEL_Msk : xmc_usic.h
  • USIC_CH_DXCR_DSEL_Pos : xmc_usic.h
  • USIC_CH_DXCR_DSEN_Msk : xmc_usic.h
  • USIC_CH_DXCR_INSW_Msk : xmc_usic.h
  • USIC_CH_DXCR_INSW_pos : xmc_usic.h
  • USIC_CH_DXCR_SFSEL_Msk : xmc_usic.h
  • USIC_CH_DXCR_SFSEL_Pos : xmc_usic.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • c
  • e
  • u
  • x

- x -

  • XMC_CAN_MO_MOAR_STDID_Msk : xmc_can.h
  • XMC_CAN_MO_MOAR_STDID_Pos : xmc_can.h
  • XMC_DAC0 : xmc_dac.h
  • XMC_DAC_NO_CHANNELS : xmc_dac.h
  • XMC_DAC_PATTERN_RECTANGLE : xmc_dac.h
  • XMC_DAC_PATTERN_SINE : xmc_dac.h
  • XMC_DAC_PATTERN_TRIANGLE : xmc_dac.h
  • XMC_DAC_SAMPLES_PER_PERIOD : xmc_dac.h
  • XMC_DMA0 : xmc_dma.h
  • XMC_DMA1 : xmc_dma.h
  • XMC_EBU : xmc_ebu.h
  • XMC_ETH_MAC_BUF_SIZE : xmc_eth_mac.h
  • XMC_ETH_MAC_PHY_MAX_RETRIES : xmc_eth_mac.h
  • XMC_ETH_WAKEUP_REGISTER_LENGTH : xmc_eth_mac.h
  • XMC_FCE_CRC16 : xmc_fce.h
  • XMC_FCE_CRC32_0 : xmc_fce.h
  • XMC_FCE_CRC32_1 : xmc_fce.h
  • XMC_FCE_CRC8 : xmc_fce.h
  • XMC_FCE_INVSEL_RESET : xmc_fce.h
  • XMC_FCE_INVSEL_SET : xmc_fce.h
  • XMC_FCE_REFIN_RESET : xmc_fce.h
  • XMC_FCE_REFIN_SET : xmc_fce.h
  • XMC_FCE_REFOUT_RESET : xmc_fce.h
  • XMC_FCE_REFOUT_SET : xmc_fce.h
  • XMC_FLASH_BYTES_PER_PAGE : xmc4_flash.h
  • XMC_FLASH_BYTES_PER_UCB : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_0 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_10 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_11 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_12 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_13 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_14 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_15 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_4 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_8 : xmc4_flash.h
  • XMC_FLASH_PHY_SECTOR_9 : xmc4_flash.h
  • XMC_FLASH_SECTOR_0 : xmc4_flash.h
  • XMC_FLASH_SECTOR_1 : xmc4_flash.h
  • XMC_FLASH_SECTOR_10 : xmc4_flash.h
  • XMC_FLASH_SECTOR_11 : xmc4_flash.h
  • XMC_FLASH_SECTOR_12 : xmc4_flash.h
  • XMC_FLASH_SECTOR_13 : xmc4_flash.h
  • XMC_FLASH_SECTOR_14 : xmc4_flash.h
  • XMC_FLASH_SECTOR_15 : xmc4_flash.h
  • XMC_FLASH_SECTOR_2 : xmc4_flash.h
  • XMC_FLASH_SECTOR_3 : xmc4_flash.h
  • XMC_FLASH_SECTOR_4 : xmc4_flash.h
  • XMC_FLASH_SECTOR_5 : xmc4_flash.h
  • XMC_FLASH_SECTOR_6 : xmc4_flash.h
  • XMC_FLASH_SECTOR_7 : xmc4_flash.h
  • XMC_FLASH_SECTOR_8 : xmc4_flash.h
  • XMC_FLASH_SECTOR_9 : xmc4_flash.h
  • XMC_FLASH_UCB0 : xmc4_flash.h
  • XMC_FLASH_UCB1 : xmc4_flash.h
  • XMC_FLASH_UCB2 : xmc4_flash.h
  • XMC_FLASH_UNCACHED_BASE : xmc4_flash.h
  • XMC_FLASH_WORDS_PER_PAGE : xmc4_flash.h
  • XMC_I2C0_CH0 : xmc_i2c.h
  • XMC_I2C0_CH1 : xmc_i2c.h
  • XMC_I2C1_CH0 : xmc_i2c.h
  • XMC_I2C1_CH1 : xmc_i2c.h
  • XMC_I2C2_CH0 : xmc_i2c.h
  • XMC_I2C2_CH1 : xmc_i2c.h
  • XMC_I2C_10BIT_ADDR_GROUP : xmc_i2c.h
  • XMC_I2S0_CH0 : xmc_i2s.h
  • XMC_I2S0_CH1 : xmc_i2s.h
  • XMC_I2S1_CH0 : xmc_i2s.h
  • XMC_I2S1_CH1 : xmc_i2s.h
  • XMC_I2S2_CH0 : xmc_i2s.h
  • XMC_I2S2_CH1 : xmc_i2s.h
  • XMC_LEDTS0 : xmc_ledts.h
  • XMC_SCU_INTERRUPT_EVENT_DLR_OVERRUN : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_HDCLR_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_HDCR_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_HDSET_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_OSCSICTRL_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_OSCULCTRL_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RMX_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTC_ALARM : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTC_PERIODIC : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCATIM0_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCATIM1_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCCTR_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCTIM0_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCTIM1_UPDATED : xmc4_scu.h
  • XMC_SCU_INTERRUPT_EVENT_WDT_WARN : xmc4_scu.h
  • XMC_SDMMC : xmc_sdmmc.h
  • XMC_SPI0_CH0 : xmc_spi.h
  • XMC_SPI0_CH1 : xmc_spi.h
  • XMC_SPI1_CH0 : xmc_spi.h
  • XMC_SPI1_CH1 : xmc_spi.h
  • XMC_SPI2_CH0 : xmc_spi.h
  • XMC_SPI2_CH1 : xmc_spi.h
  • XMC_UART0_CH0 : xmc_uart.h
  • XMC_UART0_CH1 : xmc_uart.h
  • XMC_UART1_CH0 : xmc_uart.h
  • XMC_UART1_CH1 : xmc_uart.h
  • XMC_UART2_CH0 : xmc_uart.h
  • XMC_UART2_CH1 : xmc_uart.h
  • XMC_USB_DRIVE_PORT1 : xmc_usbh.h
  • XMC_USB_DRIVE_PORT2 : xmc_usbh.h
  • XMC_USBD_ENDPOINT_DIRECTION_MASK : xmc_usbd.h
  • XMC_USBD_ENDPOINT_MAX_PACKET_SIZE_MASK : xmc_usbd.h
  • XMC_USBD_ENDPOINT_NUMBER_MASK : xmc_usbd.h
  • XMC_USBD_EP_DIR_MASK : xmc_usbd.h
  • XMC_USBD_EP_NUM_MASK : xmc_usbd.h
  • XMC_USBD_MAX_FIFO_SIZE : xmc_usbd.h
  • XMC_USBD_MAX_PACKET_SIZE : xmc_usbd.h
  • XMC_USBD_MAX_TRANSFER_SIZE_EP0 : xmc_usbd.h
  • XMC_USBD_NUM_EPS : xmc_usbd.h
  • XMC_USBD_NUM_TX_FIFOS : xmc_usbd.h
  • XMC_USBD_SETUP_COUNT : xmc_usbd.h
  • XMC_USBD_SETUP_SIZE : xmc_usbd.h
  • XMC_USBD_SPEED_FULL : xmc_usbd.h
  • XMC_USBH_API_VERSION : xmc_usbh.h
  • XMC_USBH_CLOCK_GATING_DISABLE : xmc_usbh.h
  • XMC_USBH_CLOCK_GATING_ENABLE : xmc_usbh.h
  • XMC_USBH_DRIVER_ERROR : xmc_usbh.h
  • XMC_USBH_DRIVER_ERROR_BUSY : xmc_usbh.h
  • XMC_USBH_DRIVER_ERROR_PARAMETER : xmc_usbh.h
  • XMC_USBH_DRIVER_ERROR_SPECIFIC : xmc_usbh.h
  • XMC_USBH_DRIVER_ERROR_TIMEOUT : xmc_usbh.h
  • XMC_USBH_DRIVER_ERROR_UNSUPPORTED : xmc_usbh.h
  • XMC_USBH_DRIVER_OK : xmc_usbh.h
  • XMC_USBH_ENDPOINT_BULK : xmc_usbh.h
  • XMC_USBH_ENDPOINT_CONTROL : xmc_usbh.h
  • XMC_USBH_ENDPOINT_INTERRUPT : xmc_usbh.h
  • XMC_USBH_ENDPOINT_ISOCHRONOUS : xmc_usbh.h
  • XMC_USBH_EP_HANDLE : xmc_usbh.h
  • XMC_USBH_EVENT_BUS_ERROR : xmc_usbh.h
  • XMC_USBH_EVENT_CONNECT : xmc_usbh.h
  • XMC_USBH_EVENT_DISCONNECT : xmc_usbh.h
  • XMC_USBH_EVENT_HANDSHAKE_ERR : xmc_usbh.h
  • XMC_USBH_EVENT_HANDSHAKE_MDATA : xmc_usbh.h
  • XMC_USBH_EVENT_HANDSHAKE_NAK : xmc_usbh.h
  • XMC_USBH_EVENT_HANDSHAKE_NYET : xmc_usbh.h
  • XMC_USBH_EVENT_HANDSHAKE_STALL : xmc_usbh.h
  • XMC_USBH_EVENT_OVERCURRENT : xmc_usbh.h
  • XMC_USBH_EVENT_REMOTE_WAKEUP : xmc_usbh.h
  • XMC_USBH_EVENT_RESET : xmc_usbh.h
  • XMC_USBH_EVENT_RESUME : xmc_usbh.h
  • XMC_USBH_EVENT_SUSPEND : xmc_usbh.h
  • XMC_USBH_EVENT_TRANSFER_COMPLETE : xmc_usbh.h
  • XMC_USBH_PACKET_CSPLIT : xmc_usbh.h
  • XMC_USBH_PACKET_DATA0 : xmc_usbh.h
  • XMC_USBH_PACKET_DATA1 : xmc_usbh.h
  • XMC_USBH_PACKET_DATA_Msk : xmc_usbh.h
  • XMC_USBH_PACKET_DATA_Pos : xmc_usbh.h
  • XMC_USBH_PACKET_IN : xmc_usbh.h
  • XMC_USBH_PACKET_OUT : xmc_usbh.h
  • XMC_USBH_PACKET_PING : xmc_usbh.h
  • XMC_USBH_PACKET_PRE : xmc_usbh.h
  • XMC_USBH_PACKET_SETUP : xmc_usbh.h
  • XMC_USBH_PACKET_SSPLIT : xmc_usbh.h
  • XMC_USBH_PACKET_SSPLIT_E : xmc_usbh.h
  • XMC_USBH_PACKET_SSPLIT_S : xmc_usbh.h
  • XMC_USBH_PACKET_SSPLIT_S_E : xmc_usbh.h
  • XMC_USBH_PACKET_TOKEN_Msk : xmc_usbh.h
  • XMC_USBH_PACKET_TOKEN_Pos : xmc_usbh.h
  • XMC_USBH_SignalEndpointEvent_t : xmc_usbh.h
  • XMC_USBH_SPEED_FULL : xmc_usbh.h
  • XMC_USBH_SPEED_HIGH : xmc_usbh.h
  • XMC_USBH_SPEED_LOW : xmc_usbh.h
  • XMC_USIC0 : xmc_usic.h
  • XMC_USIC0_CH0 : xmc_usic.h
  • XMC_USIC0_CH1 : xmc_usic.h
  • XMC_USIC1 : xmc_usic.h
  • XMC_USIC1_CH0 : xmc_usic.h
  • XMC_USIC1_CH1 : xmc_usic.h
  • XMC_USIC2 : xmc_usic.h
  • XMC_USIC2_CH0 : xmc_usic.h
  • XMC_USIC2_CH1 : xmc_usic.h
  • XMC_VADC_NUM_CHANNELS_PER_GROUP : xmc_vadc.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: inc Directory Reference

  • File List
  • Globals
  • inc
inc Directory Reference

Files

file | xmc4_flash.h
file | xmc4_gpio.h
file | xmc4_rtc.h
file | xmc4_scu.h
file | xmc_can.h
file | xmc_ccu4.h
file | xmc_ccu8.h
file | xmc_dac.h
file | xmc_dma.h
file | xmc_dsd.h
file | xmc_ebu.h
file | xmc_ecat.h
file | xmc_eru.h
file | xmc_eth_mac.h
file | xmc_eth_mac_map.h
file | xmc_eth_phy.h
file | xmc_fce.h
file | xmc_flash.h
file | xmc_gpio.h
file | xmc_hrpwm.h
file | xmc_i2c.h
file | xmc_i2s.h
file | xmc_ledts.h
file | xmc_posif.h
file | xmc_rtc.h
file | xmc_scu.h
file | xmc_sdmmc.h
file | xmc_spi.h
file | xmc_uart.h
file | xmc_usbd.h
file | xmc_usbh.h
file | xmc_usic.h
file | xmc_vadc.h
file | xmc_wdt.h
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Graph Legend

Graph Legend

This page explains how to interpret the graphs that are generated by doxygen.

Consider the following example:

1 /*! Invisible class because of truncation */
2 class Invisible { };
3
4 /*! Truncated class, inheritance relation is hidden */
5 class Truncated : public Invisible { };
6
7 /* Class not documented with doxygen comments */
8 class Undocumented { };
9
10 /*! Class that is inherited using public inheritance */
11 class PublicBase : public Truncated { };
12
13 /*! A template class */
14 template<class T> class Templ { };
15
16 /*! Class that is inherited using protected inheritance */
17 class ProtectedBase { };
18
19 /*! Class that is inherited using private inheritance */
20 class PrivateBase { };
21
22 /*! Class that is used by the Inherited class */
23 class Used { };
24
25 /*! Super class that inherits a number of other classes */
26 class Inherited : public PublicBase,
27 protected ProtectedBase,
28 private PrivateBase,
29 public Undocumented,
30 public Templ<int>
31 {
32 private:
33 Used *m_usedClass;
34 };

This will result in the following graph:

The boxes in the above graph have the following meaning:

  • A filled gray box represents the struct or class for which the graph is generated.
  • A box with a black border denotes a documented struct or class.
  • A box with a gray border denotes an undocumented struct or class.
  • A box with a red border denotes a documented struct or class forwhich not all inheritance/containment relations are shown. A graph is truncated if it does not fit within the specified boundaries.

The arrows have the following meaning:

  • A dark blue arrow is used to visualize a public inheritance relation between two classes.
  • A dark green arrow is used for protected inheritance.
  • A dark red arrow is used for private inheritance.
  • A purple dashed arrow is used if a class is contained or used by another class. The arrow is labeled with the variable(s) through which the pointed class or struct is accessible.
  • A yellow dashed arrow denotes a relation between a template instance and the template class it was instantiated from. The arrow is labeled with the template parameters of the instance.
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC4000 Family: Related Pages

Related Pages
Here is a list of all related documentation pages:
Changelog
Generated on Mon Aug 7 2017 11:33:59 for XMC Peripheral Library for XMC4000 Family by doxygen 1.8.11