XMC Peripheral Library for XMC1000 Family: XMC Peripheral Library

XMC Peripheral Library for XMC1000 Family 2.1.16
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XMC Peripheral Library

Table of Contents

  • Supported devices and toolchains
  • Overview
  • Coding Rules and Conventions
  • How to use the XMC Peripheral Library
    • Device Names
  • Directories and Files
  • XMC Lib examples
    • Keil MDK-ARM
    • IAR Embedded Workbench for ARM
    • DAVE
  • MISRA-C 2004 Compliance Exceptions
  • Test conditions
  • XMC Peripheral Library Licensing

The XMC Peripheral Library (XMC Lib) consists of low-level drivers for the XMC product family peripherals.
Built on top the Cortex Microcontroller Software Interface Standard (CMSIS) and MISRA-C 2004 compliant, it provides access to all peripheral features.

Supported devices and toolchains

The following 32-Bit Industrial Microcontrollers based on ARM Cortex-M0 are supported:

  • XMC1400 series
  • XMC1300 series
  • XMC1200 series
  • XMC1100 series

The following tool chains are supported:

  • GNU GCC for ARM (gcc) found in Atollic TrueSTUDIO, DAVE and Rowley CrossWorks.
  • Keil MDK-ARM Microcontroller Development Kit v5.x (armcc)
  • IAR Embedded Workbench for ARM v7.x(iccarm)
  • TASKING VX-toolset for ARM v5.(carm)

Overview

XMC Lib consists of routines and data structures which covers all peripheral functions.

It provides a peripheral register abstraction by a set of stateless APIs. It is possible to write a full application without a single peripheral register access.

It is built on top of Cortex Microcontroller Software Interface Standard (CMSIS).

Coding Rules and Conventions

This section describes the set of coding rules and conventions applied to the XMC Peripheral Library:

  • Strict C99 usage, in addtion unions and bitfields are used for more compact code and data section.
  • Use only standard data types
  • Use enumerations in favor of defines
  • Naming convention:
    • Variables use only lower case,underscore separated words.
    • Functions use CamelCase convention.
  • Non blocking APIs for better integration in event driven applications. Polling is supported aswell by API.
  • Runtime error checking can be enabled by user
  • XMC_ASSERT() used to check input parameters of functions, result of calculations, ... .
    Note
    Only enabled if XMC_ASSERT_ENABLE macro is defined
  • XMC_DEBUG() used to monitor status of application.
    Note
    Only enabled if XMC_DEBUG_ENABLE macro is defined
  • Each driver defines its own namespace: every function and type definition is prefixed by a unique identifier, i.e. XMC_VADC

XMC Peripheral Library follows an object oriented approach, where a instances of peripherals is treated as objects = attributes + functions.
Attributes are the peripheral data structures defined in device header file. These gets configured using configuration data structures using initialization functions.
Peripheral functions take a pointer to the peripheral data struct as the first argument.
XMC Peripheral Library uses naming conventions to bind the data struct and the functions that operate on i, i.e. XMC_PERI_DoSomething(XMC_PERI_t const *peri, ...);

Typically a driver contains the following functionality:

  1. Initialization function
    XMC_PERI_STATUS_t XMC_PERI_Init(XMC_PERI_t *const peri, const XMC_PERI_CONFIG_t const *config);
  2. Enable/disable peripheral functions
    void XMC_PERI_Enable(XMC_PERI_t *const peri);
    void XMC_PERI_Disable(XMC_PERI_t *const peri);
  3. Connectivity functions
    void XMC_PERI_SetInputSource(XMC_PERI_t *const peri, ...);
  4. Event handling functions
    void XMC_PERI_Enable(XMC_PERI_t const *peri);
    void XMC_PERI_Disable(XMC_PERI_t const *peri);
    void XMC_PERI_EnableEvent(XMC_PERI_t const *peri);
    void XMC_PERI_DisableEvent(XMC_PERI_t const *peri);
    void XMC_PERI_TriggerEvent(XMC_PERI_t const *peri);
    uint32_t XMC_PERI_GetEventStatus(XMC_PERI_t const *peri);
    void XMC_PERI_SetInterruptNode(XMC_PERI_t const *peri);
  5. Control functions
    void XMC_PERI_Start(XMC_PERI_t const *peri);
    void XMC_PERI_Stop(XMC_PERI_t const *peri);
    void XMC_PERI_Suspend(XMC_PERI_t const *peri);
    void XMC_PERI_Resume(XMC_PERI_t const *peri);
  6. Get/setters functions, run time API to obtain or modify state of peripheral
    void XMC_PERI_SetSomething(XMC_PERI_t const *peri, ...);
    uint32_t XMC_PERI_GetSomething(XMC_PERI_t const *peri);
  7. IRQ Handlers are provided which can be used optionally by the user to make easier the coding
    void XMC_PERI_IRQHandler(uint32_t sr_num);

A peripheral driver is structured as:

  • Common API valid for all the supported devices, i.e. xmc_gpio.h and xmc_gpio.c
  • Familiy specific extension API, i.e. xmc1_gpio.h and xmc1_gpio.c
  • Maps files to help user to configure connectivity, i.e. xmc1_gpio_map.h already has defined all the pins available depending on the target device selected.

If needed the family extension API implementation file, i.e. xmc1_gpio.c, can also overload common functionality to adapt it to target device. The peripheral driver abstracts the target device, helping the user in code proting to another family or device.

How to use the XMC Peripheral Library

The following steps are required:

  1. Include header file of required peripheral. No need to include device specific peripheral header files, this is done automatically using the information of the selected target device.
  2. Peripheral configuration and initialization.
  3. Connectivity configuration.
  4. Event/interrupt configuration.
  5. Start operation.
  6. IO configuration.
  7. Manage peripheral.
/* Include files */
#include <xmc_gpio.h>
#include <xmc_i2c.h>
...
int main(void)
{
/* Peripheral configuration and initialization. */
XMC_I2C_CH_CONFIG_t i2c_cfg;
i2c_cfg.baudrate = 400000U;
XMC_I2C_CH_Init(XMC_I2C0_CH0, &i2c_cfg);
/* Connectivity configuration. */
XMC_I2C_CH_SetInputSource(XMC_I2C0_CH0, XMC_I2C_CH_INPUT_SDA, USIC1_C0_DX0_P2_14);
XMC_I2C_CH_SetInputSource(XMC_I2C0_CH0, XMC_I2C_CH_INPUT_SCL, USIC1_C0_DX1_P5_8);
/* Event/interrupt configuration. */
XMC_I2C_CH_EnableEvent(XMC_I2C0_CH0, XMC_I2C_CH_EVENT_ARBITRATION_LOST);
NVIC_SetPriority(USIC0_0_IRQn, NVIC_GetPriorityGrouping(), 63, 0);
NVIC_EnableIRQ(USIC0_0_IRQn);
/* Start operation. */
XMC_I2C_CH_Start(XMC_I2C0_CH0);
/* IO configuration. */
XMC_GPIO_SetMode(P1_5, XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN | P1_5_AF_U0C0_DOUT0);
XMC_GPIO_SetMode(P1_1, XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN | P1_1_AF_U0C0_SCLKOUT);
...
/* Manage peripheral */
XMC_I2C_CH_MasterStart(XMC_I2C1_CH0, IO_EXPANDER_ADDRESS, XMC_I2C_CH_CMD_WRITE);
while((XMC_I2C_CH_GetStatusFlag(XMC_I2C1_CH0) & XMC_I2C_CH_STATUS_FLAG_ACK_RECEIVED) == 0U)
{
/* wait for ACK */
}
XMC_I2C_CH_ClearStatusFlag(XMC_I2C1_CH0, XMC_I2C_CH_STATUS_FLAG_ACK_RECEIVED);
...

Device Names

The selection of the target device is done through preprocessor macro, i.e. -DXMC1404_F064x0200 (refer to devices names below)

XMC1400 Series device names:

  • XMC1401_Q048x0064
  • XMC1401_Q048x0128
  • XMC1401_F064x0064
  • XMC1401_F064x0128
  • XMC1402_T038x0032
  • XMC1402_T038x0064
  • XMC1402_T038x0128
  • XMC1402_T038x0200
  • XMC1402_Q040x0032
  • XMC1402_Q040x0064
  • XMC1402_Q040x0128
  • XMC1402_Q040x0200
  • XMC1402_Q048x0032
  • XMC1402_Q048x0064
  • XMC1402_Q048x0128
  • XMC1402_Q048x0200
  • XMC1402_Q064x0064
  • XMC1402_Q064x0128
  • XMC1402_Q064x0200
  • XMC1402_F064x0064
  • XMC1402_F064x0128
  • XMC1402_F064x0200
  • XMC1403_Q040x0064
  • XMC1403_Q040x0128
  • XMC1403_Q040x0200
  • XMC1403_Q048x0064
  • XMC1403_Q048x0128
  • XMC1403_Q048x0200
  • XMC1403_Q064x0064
  • XMC1403_Q064x0128
  • XMC1403_Q064x0200
  • XMC1404_Q048x0064
  • XMC1404_Q048x0128
  • XMC1404_Q048x0200
  • XMC1404_Q064x0064
  • XMC1404_Q064x0128
  • XMC1404_Q064x0200
  • XMC1404_F064x0064
  • XMC1404_F064x0128
  • XMC1404_F064x0200

XMC1300 Series device names:

  • XMC1302_T038x0200
  • XMC1302_T038x0128
  • XMC1302_T038x0064
  • XMC1302_T038x0032
  • XMC1302_T038x0016
  • XMC1302_T028x0016
  • XMC1302_T016x0032
  • XMC1302_T016x0016
  • XMC1302_T016x0008
  • XMC1302_Q040x0200
  • XMC1302_Q040x0128
  • XMC1302_Q040x0064
  • XMC1302_Q040x0032
  • XMC1302_Q040x0016
  • XMC1302_Q024x0064
  • XMC1302_Q024x0032
  • XMC1302_Q024x0016
  • XMC1301_T038x0032
  • XMC1301_T038x0016
  • XMC1301_T038x0008
  • XMC1301_T016x0032
  • XMC1301_T016x0016
  • XMC1301_T016x0008
  • XMC1301_Q040x0032
  • XMC1301_Q040x0016
  • XMC1301_Q040x0008
  • XMC1301_Q024x0016
  • XMC1301_Q024x0008

XMC1200 Series device names:

  • XMC1202_T028x0032
  • XMC1202_T028x0016
  • XMC1202_T016x0064
  • XMC1202_T016x0032
  • XMC1202_T016x0016
  • XMC1202_Q040x0032
  • XMC1202_Q040x0016
  • XMC1202_Q024x0032
  • XMC1202_Q024x0016
  • XMC1201_T038x0200
  • XMC1201_T038x0128
  • XMC1201_T038x0064
  • XMC1201_T038x0032
  • XMC1201_T038x0016
  • XMC1201_Q040x0200
  • XMC1201_Q040x0128
  • XMC1201_Q040x0064
  • XMC1201_Q040x0032
  • XMC1201_Q040x0016
  • XMC1201_T028x0016
  • XMC1201_T028x0032
  • XMC1200_T038x0200

XMC1100 Series device names:

  • XMC1100_T038x0064
  • XMC1100_T038x0032
  • XMC1100_T038x0016
  • XMC1100_T016x0064
  • XMC1100_T016x0032
  • XMC1100_T016x0016
  • XMC1100_T016x0008
  • XMC1100_Q040x0064
  • XMC1100_Q040x0032
  • XMC1100_Q040x0016
  • XMC1100_Q024x0064
  • XMC1100_Q024x0032
  • XMC1100_Q024x0016
  • XMC1100_Q024x0008

Directories and Files

The following diagram shows the most important directories and files provided in the distribution.

* XMC_Peripheral_Library_vX.Y.Z\   - XMClib root directory
* |
* +-CMSIS\                         - The Cortex Microcontroller Software Interface Standard abstraction layer
* | +-index.html                   - Link to documentation
* | +-Include\                     - Hardware Abstraction Layer (HAL) for Cortex-M processor registers
* | +-Infineon\                    - Includes System View Description files (SVD), device header files, system and startup files
* | +-Lib\                         - Precompiled CMSIS DSP libraries for XMC4 (ARM Cortex M4F) and XMC1 (ARM Cortex M0) families
* |
* +-XMClib\                        - XMC Peripheral Library
* | +-XMC1_Peripheral_Library.chm  - XMC Peripheral Library documentation with XMC1 specific information
* | +-XMC4_Peripheral_Library.chm  - XMC Peripheral Library documentation with XMC4 specific information
* | |
* | +-doc\                         - XMC Peripheral Library documentation generated with Doxygen
* | | +-html\                      - Doxygen output folder
* | | +-xmc4lib.dox                - Doxygen configuration file to generate XMC4 Peripheral Library documentation
* | | +-xmc1lib.dox                - Doxygen configuration file to generate XMC1 Peripheral Library documentation
* | | +- . . .
* |
* | +-examples\                    - XMC Peripheral Library example
* | | +-XMC1200_series\            - Examples for XMC1200 series
* | | +-XMC1300_series\            - Examples for XMC1300 series
* | | +-XMC4400_series\            - Examples for XMC4400 series
* | | +-XMC4500_series\            - Examples for XMC4500 series
* | | | +-VADC\                    - Examples for VADC peripheral
* | | | | +-VADC_MEASUREMENT\      - VADC peripheral project
* | | | | | +-ARM\                 - Project file for Keil MDK-ARM V5.x
* | | | | | +-IAR\                 - Project file for IAR Embedded Workbench for ARM v7.x
* | | | | | +-main.c               - Application code
* | | | | | +-Readme.txt           - Readme file describing project
* | | | +- . . .
* |
* | +-inc\                         - XMC Peripheral Library API interface files
* | | +-xmc_vadc.h                 - VADC API description
* | | +- . . .
* |
* | +-src\                         - XMC Peripheral Library API implementation files
* | | +-xmc_vadc.c                 - VADC API implementation
* | | +- . . .
*

XMC Lib examples

The XMC Peripheral Library comes with set of examples covering the main features of each peripheral. All the examples are toolchain agnostic

Keil MDK-ARM

Keil MDK-ARM project files are included in the examples folder. The latest version of XMC1000 / XMC4000 CMSIS Pack have to be installed, since the project references to the XMC Peripheral Library distributed with the device pack.

IAR Embedded Workbench for ARM

IAR Embedded Workbench for ARM project files are included in the examples folder. The IAR projects reference to the XMC library files in the library folder of this zip file package. The projects will only compile if the relative path information is not changed.

DAVE

Projects for DAVE (version 3 and version 4) are provided via the DAVE example library: Help > Install DAVE APPs / Examples

MISRA-C 2004 Compliance Exceptions

CMSIS-CORE violates the following MISRA-C:2004 rules:

  • Required Rule 1.1, All code shall conform to ISO 9899:1990 Compiler extensions are beyond IFX control
  • Required Rule 1.4, The compiler/linker shall be checked to ensure that 31 character significance and case sensitivity are supported for external identifiers. and 5.1 : Variables can be named greater than 31 characters Long parameters names are defined for code readability.
  • Required Rule 5.1, Identifiers (internal and external) shall not rely on the significance of more than 31 characters. Long parameters names are defined for code readability.
  • Advisory Rule 5.7, No identifier name should be reused. This rule is untenable.
  • Advisory Rule 6.3, typedefs that indicate size and signedness should be used in place of the basic types Float data type used for signed-ness
  • Required Rule 8.5, object/function definition in header file. Violated since function definitions in header files are used for function inlining'.
  • Required Rule 11.2, Conversions shall not be performed between a pointer to object and any type other than an integral type, another pointer to object type, or a pointer to void It may be sometimes necessary to cast a pointer to an integer and sometimes casting amongst pointers is unavoidable.
  • Advisory Rule 11.3, A cast should not be performed between a pointer type and an integral type. It may be sometimes necessary to cast a pointer to an integer and sometimes casting amongst pointers is unavoidable.
  • Advisory Rule 16.7, A pointer parameter in a function prototype should be declared as pointer to const if the pointer is not used to modify the addressed object It is not mandatory to qualify all pointer arguments that are not going to be modified by callee function with a const attribute.
  • Required Rule 18.4, declaration of union type or object of union type: '{...}'. Violated since unions are used for effective representation of core registers.
  • Advisory Rule 19.4, Disallowed definition for macro. Violated since macros are used for assembler keywords.
  • Advisory Rule 19.7, Function-like macro defined. Violated since function-like macros are used to generate more efficient code.
  • Advisory Rule 20.2, Re-use of C90 identifier pattern. Violated since CMSIS macros begin with '__'. Since CMSIS is developed and verified with various compilers this approach is acceptable and avoids conflicts with user symbols.
  • Advisory Rule 19.1, Declaration before #include. Violated since Interrupt Number Definition Type (IRQn_Type) must be defined before including the core header file.

Test conditions

  • Libraries for the XMC1100 series are verified on all supported derivatives; fully functional test is applied with XMC1100-T038F0064.
  • Libraries for the XMC1200 series are verified on all supported derivatives; fully functional test is applied with XMC1200-T038F0200.
  • Libraries for the XMC1300 series are verified on all supported derivatives; fully functional test is applied with XMC1302-T038F0200.
  • Libraries for the XMC1400 series are verified on all supported derivatives; fully functional test is applied with XMC1404-Q064-0x0200.

Compilers used :

  • KEIL V5.10.0.2
  • IAR V6.50.6.4958
  • TASKING V5.1r1 patch
  • GCC compiler version ARM-GCC-49

XMC Peripheral Library Licensing

License Terms and Copyright Information

Copyright (c) 2015-2017, Infineon Technologies AG All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  • Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  • Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  • Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with Infineon Technologies AG (suppo.nosp@m.rt@i.nosp@m.nfine.nosp@m.on.c.nosp@m.om).

Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party.

Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com).

Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: $title

  • Modules
  • Files

Table of Contents

  • Version 2.1.16
    • COMMON
    • SCU
    • ADC
  • Version 2.1.14
    • CCU8
    • CCU4
    • POSIF
  • Version 2.1.12
    • MATH
  • Version 2.1.10
    • LEDTS
    • USIC
  • Version 2.1.8
    • GENERAL
    • CAN
    • GPIO
    • I2C
    • I2S
    • RTC
    • SPI
    • UART
    • VADC
  • Version 2.1.6
    • ERU
  • Version 2.1.4
  • Version 2.1.2
    • WDT
  • Version 2.0.0
    • ACMP
    • BCCU
  • Version 1.0.0

Version 2.1.16

COMMON

  • Added:
    • Added __RAM_FUNC macro

SCU

  • Changed:
    • Removed unused XMC_SCU_CLOCK_DEEP_SLEEP_t
    • Added XMC_SCU_CLOCK_EnableFlashPowerDown() and XMC_SCU_CLOCK_DisableFlashPowerDown()

ADC

  • Added:
    • XMC_VADC_GLOBAL_SHS_SetAnalogReference()

Version 2.1.14

CCU8

  • Changed:
    • XMC_CCU8_SLICE_SetPrescaler() changed div_val parameter to type XMC_CCU8_SLICE_PRESCALER_t

CCU4

  • Changed:
    • XMC_CCU4_SLICE_SetPrescaler() changed div_val parameter to type XMC_CCU4_SLICE_PRESCALER_t

SCU

  • Changed:
    • XMC_SCU_SetBMI() changed for XMC11/XMC12/XMC13 to set to 1 the bit 11 of BMI

ADC

  • Added:
    • XMC_VADC_GLOBAL_SHS_SetAnalogReference()

POSIF

  • Added:
    • Added posif connectivity map file

Version 2.1.12

SCU

  • Fixed:
    • XMC_SCU_CLOCK_EnableDCO1ExtRefCalibration() prescaler equation
  • Added:
    • XMC_SCU_SetBMI()

MATH

  • Changed:
    • Foward declaration of __aeabi_* to fix link time optimization (-flto) compilation errors

Version 2.1.10

COMMON

  • Fixed:
    • Changed type of size in XMC_PRIOARRAY_t to fix compilation warnings
    • Fixed compilation warning in XMC_AssertHandler
  • Changed:
    • Remove the need to define XMC_USER_ASSERT_FUNCTION

ADC

  • Fixed:
    • Fix assertion in XMC_VADC_GROUP_CheckSlaveReadiness() and XMC_VADC_GROUP_IgnoreSlaveReadiness() checking the slave_group parameter
  • Added:
    • New macros equivalent to th existing ones but with better naming.
      Note
      Old macros are kept for backward compatibility but they deprecated.
    • new functions to remove channels from background request source, XMC_VADC_GLOBAL_BackgroundRemoveChannelFromSequence() and XMC_VADC_GLOBAL_BackgndRemoveMultipleChannels()

CCU4

  • Fixed:
    • XMC_CCU4_lAssertReset(), XMC_CCU4_lDeassertReset(), XMC_CCU4_lGateClock() and XMC_CCU4_lUngateClock() fix compilation warnings.

CCU8

  • Fixed:
    • XMC_CCU8_lAssertReset(), XMC_CCU8_lDeassertReset(), XMC_CCU8_lGateClock() and XMC_CCU8_lUngateClock() fix compilation warnings.

LEDTS

  • Fixed:
    • XMC_LEDTS_InitGlobal() fixed compilation warnings

POSIF

  • Fixed:
    • XMC_POSIF_Enable() and XMC_POSIF_Disable() fixed compilation warnings

SCU

  • Fixed:
    • At XMC_SCU_CLOCK_Init() issue while reading oscillator watchdog status

USIC

  • Added:
    • XMC_USIC_CH_SetShiftDirection() to allow selection of shift direction of the data words for transmision and reception
    • XMC_USIC_CH_GetCaptureTimerValue() and XMC_USIC_CH_SetFractionalDivider()

Version 2.1.8

GENERAL

  • Added:
    • Support for XMC1201_T028x0016, XMC1202_T016x0064, XMC1301_T016x0032, XMC1302_Q040x0200, XMC1302_T028x0016, XMC1402_T038x0032, XMC1402_T038x0064, XMC1402_T038x0128, XMC1403_Q040x0064, XMC1403_Q040x0128, XMC1403_Q040x0200, XMC1402_T038x0200 XMC1402_Q040x0200, XMC1402_Q048x0200, XMC1201_T028x0032

CAN

  • Added:
    • XMC_CAN_IsPanelControlReady()
  • Changed:
    • XMC_CAN_AllocateMOtoNodeList() Wait for ready status of list controller
  • Fixed:
    • XMC_CAN_MO_Config() Solve issue with TX and RX interrupt node pointers being cleared.

CCU4

  • Added:
    • XMC_CCU4_SLICE_StopClearTimer()
  • Changed:
    • XMC_CCU4_SLICE_StopTimer(), XMC_CCU4_SLICE_ClearTimer() Avoid read write modify access

CCU8

  • Added:
    • XMC_CCU8_SLICE_StopClearTimer()
  • Changed:
    • XMC_CCU8_SLICE_StopTimer(), XMC_CCU4_SLICE_ClearTimer() Avoid read write modify access

GPIO

  • Added:
    • Add missing P1_5_AF_U0C0_DOUT0 for XMC14xx
    • Add missing P4_5_AF_BCCU0_OUT8 for XMC1402/04 64/48 pins package

I2C

  • Added:
    • XMC_I2C_CH_EnableDataTransmission(), XMC_I2C_CH_DisableDataTransmission()

I2S

  • Added:
    • XMC_I2S_CH_EnableDataTransmission(), XMC_I2S_CH_DisableDataTransmission()
  • Changed:
    • XMC_I2S_CH_Init() Change default passive level to 0 Call XMC_I2S_CH_SetSystemWordLength() to set the system frame length equal to the frame length.
    • XMC_I2S_CH_SetBaudrate() Optional Master clock output signal generated with a fixed phase relation to SCLK

RTC

  • Added:
    • XMC_RTC_SetTimeStdFormat(), XMC_RTC_SetAlarmStdFormat()

SPI

  • Added:
    • XMC_SPI_CH_EnableDataTransmission(), XMC_SPI_CH_DisableDataTransmission()

UART

  • Added:
    • XMC_UART_CH_EnableDataTransmission(), XMC_UART_CH_DisableDataTransmission()
  • Changed:
    • XMC_UART_CH_Init() Enable transfer status BUSY
    • XMC_UART_CH_Stop() Check for transfer status

USIC

  • Added:
    • Add missing USIC1_C0_DX1_P3_4 for XMC14xx 64 pins package

VADC

  • Added:
    • XMC_VADC_SHS_FULL_SET_REG, XMC_VADC_RESULT_PRIORITY_AVAILABLE, XMC_VADC_SYNCTR_START_LOCATION
    • XMC_VADC_SHS_GAIN_LEVEL_t and XMC_VADC_SYNCTR_EVAL_t
    • XMC_VADC_GROUP_SetSyncSlaveReadySignal()
    • XMC_VADC_GROUP_ChannelGetAssertedEvents()
    • XMC_VADC_GROUP_GetAssertedResultEvents()
    • XMC_VADC_GROUP_SetResultRegPriority()
    • XMC_VADC_GROUP_SetSyncReadySignal()
    • XMC_VADC_GROUP_GetSyncReadySignal()
    • XMC_VADC_GROUP_GetResultRegPriority()
  • Fixed:
    • XMC_VADC_GROUP_CheckSlaveReadiness(), XMC_VADC_GROUP_IgnoreSlaveReadiness() Fixed the EVAL configuration

Version 2.1.6

SCU

  • Added:
    • XMC_SCU_POWER_EnableMonitor(), XMC_SCU_POWER_DisableMonitor()
  • Fixed:
    • XMC_SCU_CLOCK_ScaleMCLKFrequency() It solves issues with down clock frequency scaling *
    • XMC_SCU_CLOCK_Init() for XMC1400 It solves issues when trying to disable the OSCHP and use the XTAL pins as GPIO
  • Changed:
    • XMC_SCU_RESET_ClearDeviceResetReason Optimization of write only registers

RTC

  • Changed:
    • XMC_RTC_ClearEvent() Optimization of write only registers

GPIO

  • Fixed:
    • Map file VADC_EMUX signals
  • Added:
    • Map file P1_6_AF_BCCU0_OUT2 for (UC_DEVICE == XMC1202) && (UC_PACKAGE == VQFN40) HWCTRL_U1C0_DOUTx for XMC14xx

ERU

  • Added:
    • XMC_ERU_ETL_GetEdgeDetection()

CCU4

-Changed:

  • XMC_CCU4_EnableShadowTransfer() Optimization of write only registers

CCU8

-Changed:

  • XMC_CCU8_EnableShadowTransfer() Optimization of write only registers

POSIF

  • Changed:
    • XMC_POSIF_Start(), XMC_POSIF_Stop() Optimization of write only registers
    • XMC_POSIF_HSC_UpdateHallPattern(): Optimization of write only registers
    • XMC_POSIF_SetEvent(), XMC_POSIF_ClearEvent() Optimization of write only registers

USIC

  • Added:
    • XMC_USIC_CH_TXFIFO_PutDataHPCMode()
  • Changed:
    • XMC_USIC_CH_TriggerServiceRequest() Optimization of write only registers
    • XMC_USIC_CH_TXFIFO_Flush(), XMC_USIC_CH_RXFIFO_Flush() Optimization of write only registers
    • XMC_USIC_CH_TXFIFO_ClearEvent(), XMC_USIC_CH_RXFIFO_ClearEvent() Optimization of write only registers

SPI

  • Added:
    • XMC_SPI_CH_SetTransmitMode()

VADC

  • Fixed:
    • XMC_VADC_GLOBAL_SHS_IsConverterReady() Fixed functionality, check SHSCFG instead of STEPCFG
  • Changed:
    • XMC_VADC_GROUP_QueueClearReqSrcEvent() Optimization of write only registers
    • XMC_VADC_GROUP_ChannelClearEvent() Optimization of write only registers

Version 2.1.4

SCU

  • Added:
    • XMC_SCU_EnablePrefetchUnit and XMC_SCU_DisablePrefetchUnit for XMC1400 series

SPI

  • Added:
    • XMC_SPI_CH_EnableSlaveSelectCodedMode() and XMC_SPI_CH_DisableSlaveSelectCodedMode()

Version 2.1.2

GENERAL

  • Added:
    • Support for XMC1400 series
    • Added I2S driver

SCU

  • Added:
    • Support for XMC1400 series: Additional clocking options in XMC_SCU_CLOCK_CONFIG_t XMC_SCU_CLOCK_EnableDCO1ExtRefCalibration() XMC_SCU_CLOCK_DisableDCO1ExtRefCalibration() XMC_SCU_CLOCK_IsDCO1ExtRefCalibrationReady() XMC_SCU_CLOCK_EnableDCO1OscillatorWatchdog() XMC_SCU_CLOCK_DisableDCO1OscillatorWatchdog() XMC_SCU_CLOCK_ClearDCO1OscillatorWatchdogStatus() XMC_SCU_CLOCK_IsDCO1ClockFrequencyUsable() XMC_SCU_SetInterruptControl()
    • XMC_SCU_CalcTSEVAR
    • XMC_SCU_SetTempLowLimit
    • XMC_SCU_SetTempHighLimit
    • XMC_SCU_CalcTemperature

CAN

  • Added:
    • Support for XMC1400 series

CCU4

  • Changed:
    • XMC_CCU4_EnableShadowTransfer() API is made as inline, to improve the speed
  • Added:
    • XMC_CCU4_SLICE_PRESCALER_t enum is added to set the prescaler divider
    • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_t, two more enum items are added to support external count direction settings
    • XMC_CCU4_SLICE_MULTI_IRQ_ID_t is added to support the XMC_CCU4_SLICE_EnableMultipleEvents() and XMC_CCU4_SLICE_DisableMultipleEvents() APIs
    • Map files added macros with peripheral names for readability

CCU8

  • Changed:
    • XMC_CCU8_EnableShadowTransfer() API is made as inline, to improve the speed
    • XMC_CCU8_SLICE_GetEvent() is made as inline
  • Added:
    • XMC_CCU8_SLICE_PRESCALER_t enum is added to set the prescaler divider
    • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t is added for all the devices except XMC45 devices, to set when the shadow transfer has to happen
    • XMC_CCU8_SOURCE_OUT0_t, XMC_CCU8_SOURCE_OUT1_t, XMC_CCU8_SOURCE_OUT2_t, XMC_CCU8_SOURCE_OUT3_t enums are added to map one of the ST to OUT0, OUT1, OUT3, OUT4 signals
    • In XMC_CCU8_SLICE_COMPARE_CONFIG_t structure, selector_out0, selector_out1, selector_out2, selector_out3 are added to support XMC14 devices
    • XMC_CCU8_SLICE_EnableCascadedShadowTransfer(), XMC_CCU8_SLICE_DisableCascadedShadowTransfer(),XMC_CCU8_SLICE_SetShadowTransferMode() API are supported for all the devices except XMC45
    • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t, two more enum items are added to support external count direction settings
    • XMC_CCU8_SLICE_SetTimerCompareMatchChannel1(), XMC_CCU8_SLICE_SetTimerCompareMatchChannel2() inline APIs are added to update the respective compare registers directly
    • XMC_CCU8_SLICE_MULTI_IRQ_ID_t is added to support the XMC_CCU8_SLICE_EnableMultipleEvents() and XMC_CCU8_SLICE_DisableMultipleEvents() APIs
    • Map files added macros with peripheral names for readability

I2C

  • Changed:
    • XMC_I2C_CH_SetInputSource() API for avoiding complete DXCR register overwriting
    • XMC_I2C_CH_EVENT_t enum for supporting XMC_I2C_CH_EnableEvent() and XMC_I2C_CH_DisableEvent() for supporting multiple events configuration
  • Added:
    • APIs for external input for BRG configuration:XMC_I2C_CH_ConfigExternalInputSignalToBRG()
    • APIs for enabling or disabling the ACK response to a 0x00 slave address: XMC_I2C_CH_EnableAcknowledgeAddress0() and XMC_I2C_CH_DisableAcknowledgeAddress0()
  • Fixed:
    • 10bit addressing

SPI

  • Changed:
    • XMC_SPI_CH_SetInputSource() for avoiding complete DXCR register overwriting
    • XMC_SPI_CH_EVENT_t enum for supporting XMC_SPI_CH_EnableEvent() and XMC_SPI_CH_DisableEvent() for supporting multiple events configuration
  • Added:
    • APIs for enabling/disabling delay compensation XMC_SPI_CH_DisableDelayCompensation() and XMC_SPI_CH_EnableDelayCompensation()
    • Added APIs for external input for BRG configuration:XMC_SPI_CH_ConfigExternalInputSignalToBRG()
    • API for configuring the receiving clock phase in the slave:XMC_SPI_CH_DataLatchedInTrailingEdge() and XMC_SPI_CH_DataLatchedInLeadingEdge()

UART

  • Changed:
    • XMC_UART_CH_SetInputSource() for avoiding complete DXCR register overwriting
    • XMC_UART_CH_EVENT_t enum for supporting XMC_UART_CH_EnableEvent() and XMC_UART_CH_DisableEvent() for supporting multiple events configuration

MATH

  • Added:
    • SQRT functions
    • XMC_MATH_DISABLE_DIV_ABI compilation guard to control whether to override GCC implementation of division and modulo operations

WDT

  • Fixed:
    • XMC_WDT_SetDebugMode() API, Wrong register is being configured

VADC

  • Added:
    • XMC_VADC_GLOBAL_SetIndividualBoundary
    • XMC_VADC_GROUP_SetIndividualBoundary
    • XMC_VADC_GROUP_GetAlias
    • XMC_VADC_GROUP_GetInputClass
    • XMC_VADC_GROUP_ChannelSetIclass
    • XMC_VADC_GROUP_ChannelGetResultAlignment
    • XMC_VADC_GROUP_ChannelGetInputClass
    • XMC_VADC_GROUP_SetResultSubtractionValue

Version 2.0.0

GENERAL

  • Removed:
    • version macros and declaration of GetDriverVersion()

ACMP

  • Added:
    • XMC_ACMP_EnableReferenceDivider(). Prevously part of XMC_ACMP_SetInput
    • XMC_ACMP_DisableReferenceDivider(). Prevously part of XMC_ACMP_SetInput
  • Fixed:
    • XMC_ACMP_Init(). Fixed sequence problem of low power mode.
    • XMC_ACMP_SetInput(). Fixed wrong register setting.
  • Changed:
    • Removed return type variable and by default comparator enable from XMC_ACMP_Init()
    • Additional call to XMC_ACMP_EnableComparator() needed to start Comparator after Init

BCCU

  • Added:
    • XMC_BCCU_DIM_ReadDimDivider()
    • XMC_BCCU_DIM_GetDimCurve()
    • XMC_BCCU_IsDitherEnable()
  • Fixed:
    • XMC_BCCU_ClearEventFlag()

CCU4

  • Fixed:
    • XMC_CCU4_SLICE_StartConfig(). Assert condition.

CCU8

  • Added:
    • XMC_CCU8_SLICE_LoadSelector()
  • Fixed:
    • XMC_CCU8_SLICE_CHECK_INTERRUPT macro. Fixed the missing item for compare match down for channel 2

I2C

  • Added:
    • XMC_I2C_CH_TriggerServiceRequest()
    • XMC_I2C_CH_SelectInterruptNodePointer()
  • Fixed:
    • XMC_I2C_CH_Stop(). Check if transmission is going before setting the channel to idle.

LEDTS

  • Added:
    • XMC_LEDTS_SetActivePADNo()

POSIF

  • Changed:
    • XMC_POSIF_QD_GetDirection(). Fixed read direction

RTC

  • Changed:
    • XMC_RTC_Init(). Check RTC running condition.

SCU

  • Added:
    • For XMC11 series, XMC_SCU_SetRawTempLimits()
    • For XMC11 series, XMC_SCU_StartTempMeasurement()
    • For XMC11 series, XMC_SCU_StopTempMeasurement()
    • For XMC11 series, XMC_SCU_HighTemperature()
    • For XMC11 series, XMC_SCU_LowTemperature()
    • For XMC11 series, XMC_SCU_GetTemperature()
  • Changed:
    • XMC_SCU_INTERRUPT_SetEventHandler(). New implementation
    • XMC_SCU_IRQHandler(). New implementation

SPI

  • Added:
    • XMC_SPI_CH_SetSlaveSelectDelay()
    • XMC_SPI_CH_TriggerServiceRequest()
    • XMC_SPI_CH_SelectInterruptNodePointer()
    • XMC_SPI_CH_SetInterwordDelaySCLK()

UART

  • Added:
    • XMC_UART_CH_TriggerServiceRequest()
    • XMC_UART_CH_SelectInterruptNodePointer()
  • Fixed:
    • XMC_UART_CH_INPUT_t enum contents.
    • XMC_UART_CH_Stop(). Check if transmission is going before setting the channel to idle.

VADC

  • Added:
    • XMC_VADC_GLOBAL_SHS_Init()
    • XMC_VADC_GLOBAL_SHS_SetStepperSequence()
    • XMC_VADC_GLOBAL_SHS_IsConverterReady()
    • XMC_VADC_GLOBAL_SHS_DisableAcceleratedMode()
    • XMC_VADC_GLOBAL_SHS_SetGainFactor()
    • XMC_VADC_GLOBAL_SHS_SetMaxCalTime()
    • XMC_VADC_GLOBAL_SHS_EnableGainAndOffsetCalibrations()
    • XMC_VADC_GLOBAL_SHS_DisableGainAndOffsetCalibrations()
    • XMC_VADC_GLOBAL_SHS_GetOffsetCalibrationValue()
    • XMC_VADC_GLOBAL_SHS_SetOffsetCalibrationValue()
    • XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop()
    • XMC_VADC_GLOBAL_SHS_EnableSigmaDeltaLoop()
    • XMC_VADC_GLOBAL_SHS_DisableSigmaDeltaLoop()
    • XMC_VADC_GROUP_SetBoundaryEventInterruptNode()
    • XMC_VADC_GROUP_ScanSelectTriggerEdge()
    • XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge()
    • XMC_VADC_GROUP_QueueSelectTriggerEdge()
    • XMC_VADC_GROUP_QueueFlushEntries()
    • XMC_VADC_GROUP_ChannelSetBoundarySelection()
  • Changed:
    • XMC_VADC_GLOBAL_GetResult(). Remove unnecessary masking, return result as 16bit.
    • XMC_VADC_GROUP_GetResult(). Remove unnecessary masking, return result as 16bit.
  • Fixed:
    • XMC_VADC_GROUP_ExternalMuxControlInit().
    • XMC_VADC_GLOBAL_SHS_SetClockDivider(). Disable write protection of DIVS bitfield.
    • XMC_VADC_GROUP_ScanSetGatingMode(). Clear current gating before applying the new requested one.
    • XMC_VADC_GLOBAL_BackgroundSetGatingMode(). Clear current gating before applying the new requested one.
    • XMC_VADC_GROUP_QueueSetGatingMode(). Clear current gating before applying the new requested one.

Version 1.0.0

  • Initial version
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: Modules

Modules
Here is a list of all modules:
[detail level 12]
▼ XMC Peripheral Library |
BCCU | Brightness and Color Control Unit (BCCU) driver for the XMC1 microcontroller family
CAN | Controller Area Network Controller (CAN) driver for the XMC microcontroller family
CCU4 | Capture Compare Unit 4 (CCU4) low level driver for XMC family of microcontrollers
CCU8 | Capture Compare Unit 8 (CCU8) low level driver for XMC family of microcontrollers
ERU | Event Request Unit (ERU) driver for the XMC microcontroller family
FLASH | Flash driver for XMC microcontroller family
GPIO | General Purpose Input Output (GPIO) driver for the XMC microcontroller family
I2C | Inter Integrated Circuit(IIC) driver for the XMC microcontroller family
I2S | (IIS) driver for the XMC microcontroller family
LEDTS | LED and Touch-Sense control(LEDTS) driver for the XMC controller family
MATH | MATH Coprocessor (MATH) driver for the XMC1302 microcontroller family
PAU | Peripheral Access Unit (PAU) driver for the XMC1000 microcontroller family
POSIF | Position Interface Unit (POSIF) driver for the XMC microcontroller family
PRNG | Pseudo Random Number Generator (PRNG) driver for XMC1000 microcontroller family
RTC | RTC driver for XMC microcontroller family
SCU | System Control Unit(SCU) driver for XMC microcontroller family
SPI | Synchronous serial channel driver for SPI-like communication
UART | Universal Asynchronous Receiver/Transmitter (UART) driver for XMC microcontroller family
USIC | Universal Serial Interface Channel(USIC) driver for serial communication
VADC | Versatile Analog to Digital Converter (VADC) driver for XMC microcontroller family
WDT | Watchdog driver for the XMC microcontroller family
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC Peripheral Library

Modules
XMC Peripheral Library

Modules

BCCU
CAN
CCU4
CCU8
ERU
FLASH
GPIO
I2C
I2S
LEDTS
MATH
PAU
POSIF
PRNG
RTC
SCU
SPI
UART
USIC
VADC
WDT

Detailed Description

Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: BCCU

Data Structures | Typedefs | Enumerations | Functions
BCCU
XMC Peripheral Library

Data Structures

struct | XMC_BCCU_CH_CONFIG_t
struct | XMC_BCCU_DIM_CONFIG_t
struct | XMC_BCCU_GLOBAL_CONFIG_t
struct | XMC_BCCU_TRIG_CONFIG_t

Typedefs

typedef BCCU_CH_Type | XMC_BCCU_CH_t
typedef BCCU_DE_Type | XMC_BCCU_DIM_t
typedef BCCU_Type | XMC_BCCU_t

Enumerations

Functions

void | XMC_BCCU_AbortDimming (XMC_BCCU_t *const bccu, uint32_t dim_no)
void | XMC_BCCU_AbortLinearWalk (XMC_BCCU_t *const bccu, uint32_t chan_no)
void | XMC_BCCU_CH_ConfigTrigger (XMC_BCCU_CH_t *const channel, XMC_BCCU_CH_TRIG_EDGE_t edge, uint32_t force_trig_en)
void | XMC_BCCU_CH_DisableDimmingBypass (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_DisableFlickerWatchdog (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_DisableGating (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_DisablePacker (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_EnableDimmingBypass (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_EnableFlickerWatchdog (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_EnableGating (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_EnablePacker (XMC_BCCU_CH_t *const channel, uint32_t thresh, uint32_t off_comp, uint32_t on_comp)
void | XMC_BCCU_CH_Init (XMC_BCCU_CH_t *const channel, const XMC_BCCU_CH_CONFIG_t *const config)
uint32_t | XMC_BCCU_CH_ReadIntensity (XMC_BCCU_CH_t *const channel)
uint32_t | XMC_BCCU_CH_ReadPackerOffCompare (XMC_BCCU_CH_t *const channel)
uint32_t | XMC_BCCU_CH_ReadPackerOnCompare (XMC_BCCU_CH_t *const channel)
uint32_t | XMC_BCCU_CH_ReadPackerThreshold (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_SelectDimEngine (XMC_BCCU_CH_t *const channel, XMC_BCCU_CH_DIMMING_SOURCE_t sel)
void | XMC_BCCU_CH_SetLinearWalkPrescaler (XMC_BCCU_CH_t *const channel, uint32_t clk_div)
void | XMC_BCCU_CH_SetPackerOffCompare (XMC_BCCU_CH_t *const channel, uint32_t level)
void | XMC_BCCU_CH_SetPackerOffCounter (XMC_BCCU_CH_t *const channel, uint32_t cnt_val)
void | XMC_BCCU_CH_SetPackerOnCompare (XMC_BCCU_CH_t *const channel, uint32_t level)
void | XMC_BCCU_CH_SetPackerOnCounter (XMC_BCCU_CH_t *const channel, uint32_t cnt_val)
void | XMC_BCCU_CH_SetPackerThreshold (XMC_BCCU_CH_t *const channel, uint32_t val)
void | XMC_BCCU_CH_SetTargetIntensity (XMC_BCCU_CH_t *const channel, uint32_t ch_int)
void | XMC_BCCU_ClearEventFlag (XMC_BCCU_t *const bccu, uint32_t flag_type)
void | XMC_BCCU_ConcurrentAbortDimming (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentAbortLinearWalk (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentConfigTrigger (XMC_BCCU_t *const bccu, XMC_BCCU_TRIG_CONFIG_t *trig)
void | XMC_BCCU_ConcurrentDisableChannels (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentDisableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentDisableTrap (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentEnableChannels (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentEnableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentEnableTrap (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentSetOutputPassiveLevel (XMC_BCCU_t *const bccu, uint32_t chan_mask, XMC_BCCU_CH_ACTIVE_LEVEL_t level)
void | XMC_BCCU_ConcurrentStartDimming (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentStartLinearWalk (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConfigGlobalTrigger (XMC_BCCU_t *const bccu, XMC_BCCU_TRIGMODE_t mode, XMC_BCCU_TRIGDELAY_t delay)
void | XMC_BCCU_ConfigSuspendMode (XMC_BCCU_t *const bccu, XMC_BCCU_SUSPEND_MODE_t mode)
void | XMC_BCCU_DIM_ConfigDimCurve (XMC_BCCU_DIM_t *const dim_engine, uint32_t dither_en, XMC_BCCU_DIM_CURVE_t sel)
XMC_BCCU_DIM_CURVE_t | XMC_BCCU_DIM_GetDimCurve (XMC_BCCU_DIM_t *const dim_engine)
void | XMC_BCCU_DIM_Init (XMC_BCCU_DIM_t *const dim_engine, const XMC_BCCU_DIM_CONFIG_t *const config)
uint32_t | XMC_BCCU_DIM_ReadDimDivider (XMC_BCCU_DIM_t *const dim_engine)
uint32_t | XMC_BCCU_DIM_ReadDimmingLevel (XMC_BCCU_DIM_t *const dim_engine)
void | XMC_BCCU_DIM_SetDimDivider (XMC_BCCU_DIM_t *const dim_engine, uint32_t div)
void | XMC_BCCU_DIM_SetTargetDimmingLevel (XMC_BCCU_DIM_t *const dim_engine, uint32_t level)
void | XMC_BCCU_DisableChannel (XMC_BCCU_t *const bccu, uint32_t chan_no)
void | XMC_BCCU_DisableChannelTrigger (XMC_BCCU_t *const bccu, uint32_t chan_no)
void | XMC_BCCU_DisableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t dim_no)
void | XMC_BCCU_DisableInterrupt (XMC_BCCU_t *const bccu, uint32_t event)
void | XMC_BCCU_DisableTrap (XMC_BCCU_t *const bccu, uint32_t chan_no)
void | XMC_BCCU_EnableChannel (XMC_BCCU_t *const bccu, uint32_t chan_no)
void | XMC_BCCU_EnableChannelTrigger (XMC_BCCU_t *const bccu, uint32_t chan_no, XMC_BCCU_CH_TRIGOUT_t trig_line)
void | XMC_BCCU_EnableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t dim_no)
void | XMC_BCCU_EnableInterrupt (XMC_BCCU_t *const bccu, uint32_t event)
void | XMC_BCCU_EnableTrap (XMC_BCCU_t *const bccu, uint32_t chan_no)
uint32_t | XMC_BCCU_GetChannelOutputLvlAtLastTrigger (XMC_BCCU_t *const bccu, uint32_t chan_no)
void | XMC_BCCU_GlobalInit (XMC_BCCU_t *const bccu, const XMC_BCCU_GLOBAL_CONFIG_t *const config)
uint32_t | XMC_BCCU_IsDimmingFinished (XMC_BCCU_t *const bccu, uint32_t dim_no)
uint32_t | XMC_BCCU_IsDitherEnable (XMC_BCCU_DIM_t *const dim_engine)
uint32_t | XMC_BCCU_IsLinearWalkComplete (XMC_BCCU_t *const bccu, uint32_t chan_no)
uint32_t | XMC_BCCU_ReadBitClock (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadDimClock (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadEventFlag (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadFastClock (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadFlickerWDThreshold (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadGlobalTrigger (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadLastTrigChanNr (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadSuspendMode (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadTrapEdge (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadTrapInput (XMC_BCCU_t *const bccu)
void | XMC_BCCU_SelectBitClock (XMC_BCCU_t *const bccu, XMC_BCCU_BCLK_MODE_t div)
void | XMC_BCCU_SelectTrapInput (XMC_BCCU_t *const bccu, XMC_BCCU_CH_TRAP_IN_t input)
void | XMC_BCCU_SetDimClockPrescaler (XMC_BCCU_t *const bccu, uint32_t div)
void | XMC_BCCU_SetEventFlag (XMC_BCCU_t *const bccu, uint32_t flag_type)
void | XMC_BCCU_SetFastClockPrescaler (XMC_BCCU_t *const bccu, uint32_t div)
void | XMC_BCCU_SetFlickerWDThreshold (XMC_BCCU_t *const bccu, uint32_t threshold_no)
void | XMC_BCCU_SetGlobalDimmingLevel (XMC_BCCU_t *const bccu, uint32_t level)
void | XMC_BCCU_SetOutputPassiveLevel (XMC_BCCU_t *const bccu, uint32_t chan_no, XMC_BCCU_CH_ACTIVE_LEVEL_t level)
void | XMC_BCCU_SetTrapEdge (XMC_BCCU_t *const bccu, XMC_BCCU_CH_TRAP_EDGE_t edge)
void | XMC_BCCU_StartDimming (XMC_BCCU_t *const bccu, uint32_t dim_no)
void | XMC_BCCU_StartLinearWalk (XMC_BCCU_t *const bccu, uint32_t chan_no)

Detailed Description

The Brightness and Color Control Unit (BCCU) is a dimming control peripheral for LED lighting applications. The BCCU module can be used to control multiple LED channels. Every channel generates one-bit sigma-delta bit stream with a user adjustable 12-bit average value. The dimming engine changes the brightness gradually (exponential curve) to appear natural to the human eye. It supports color control by adjusting the relative intensity of selected channels using a linear walk scheme for smooth color changes. It also supports high-power multi-channel LED lamps by optionally packing the bitstream. The optional packer which decreases the average rate of output switching by enforcing a defined on-time. The BCCU module generates two trigger signals to the ADC (BCCU_TRIGOUT0 and BCCU_TRIGOU1) to start conversions in a synchronized manner. The module can also be used as a multi-channel digital-analog converter with low-pass filters on the outputs. The BCCU module supports 3 independent dimming engines, 9 independent channels, Trap functions and 2 ADC triggering modes.

The driver is divided into global control (BCCU), channel control (BCCU_CH) and dimming control (BCCU_DIM).

BCCU features:

  1. Configuration structure XMC_BCCU_GLOBAL_CONFIG_t and initialization function XMC_BCCU_GlobalInit()
  2. Allows configuring of clock settings (Fast clock, Bit clock and Dimming clock). XMC_BCCU_SetFastClockPrescaler(),
  3. XMC_BCCU_SelectBitClock(), XMC_BCCU_SetDimClockPrescaler().
  4. Allows configuring global trigger settings. XMC_BCCU_ConfigGlobalTrigger()
  5. Allows enabling multiple channels together. XMC_BCCU_ConcurrentEnableChannels()
  6. Allows enabling single channel. XMC_BCCU_EnableChannel()
  7. Allows configuring global dimming level. XMC_BCCU_SetGlobalDimmingLevel()
  8. Starts linear walk for multiple channels together. XMC_BCCU_ConcurrentStartLinearWalk().
  9. Starts linear walk for single channel. XMC_BCCU_StartLinearWalk().
  10. Starts dimming for multiple dimming engines together. XMC_BCCU_ConcurrentStartDimming().
  11. Starts dimming for single dimming engine. XMC_BCCU_StartDimming().

BCCU_CH features:

  1. Configuration structure (XMC_BCCU_CH_t and initialization function XMC_BCCU_CH_Init()
  2. Allows selecting dimming engine. XMC_BCCU_CH_SelectDimEngine().
  3. Allows setting target channel intensity. XMC_BCCU_CH_SetTargetIntensity().
  4. Allows knowing the status of linear walk completion. XMC_BCCU_IsLinearWalkComplete()
  5. Allows setting flicker watchdog. XMC_BCCU_CH_EnableFlickerWatchdog().
  6. Allows configuring packer settings. XMC_BCCU_CH_EnablePacker(), XMC_BCCU_CH_SetPackerThreshold(), XMC_BCCU_CH_SetPackerOffCompare(), XMC_BCCU_CH_SetPackerOffCounte(), XMC_BCCU_CH_SetPackerOnCounter()
  7. Allows selecting dimming bypass. XMC_BCCU_CH_DisableDimmingBypass()

BCCU_DIM features:

  1. Configuration structure (XMC_BCCU_DIM_t and initialization function XMC_BCCU_DIM_Init()
  2. Allows setting target dimming engine intensity. XMC_BCCU_DIM_SetTargetDimmingLevel(). XMC_BCCU_DIM_SetTargetDimmingLevel
  3. Allows knowing the status of dimming completion. XMC_BCCU_IsDimmingFinished()
  4. Allows configuring dimming divider. XMC_BCCU_DIM_SetDimDivider()
  5. Allows configuring dimming curve. XMC_BCCU_DIM_ConfigDimCurve()

Recommended programming sequence:

  1. Set output passive and active levels using XMC_BCCU_ConcurrentSetOutputPassiveLevel() or XMC_BCCU_SetOutputPassiveLevel()
  2. Initializes global features using XMC_BCCU_GlobalInit()
  3. Initializes channel features using XMC_BCCU_CH_Init()
  4. Initializes dimming engine using XMC_BCCU_DIM_Init()
  5. Enable channels using XMC_BCCU_ConcurrentEnableChannels() or XMC_BCCU_EnableChannel()
  6. Enable dimming engines using XMC_BCCU_ConcurrentEnableDimmingEngine() or XMC_BCCU_EnableDimmingEngine()
  7. Configure channel linear walk prescaler using XMC_BCCU_CH_SetLinearWalkPrescaler()
  8. Configure dimming divider using XMC_BCCU_DIM_SetDimDivider()
  9. Set target intensities of channels using XMC_BCCU_CH_SetTargetIntensity()
  10. Set target dim levels of dimming engines using XMC_BCCU_DIM_SetTargetDimmingLevel()
  11. Start linear walk of the channels using XMC_BCCU_ConcurrentStartLinearWalk() or XMC_BCCU_StartLinearWalk()
  12. Start dimming of the dimming engines using XMC_BCCU_ConcurrentStartDimming() or XMC_BCCU_StartDimming()
  13. Check the status of linear walk completion using XMC_BCCU_IsLinearWalkComplete()
  14. Check the status of dimming completion XMC_BCCU_IsDimmingFinished()

Typedef Documentation

typedef BCCU_CH_Type XMC_BCCU_CH_t

Redefinition of BCCU module channel structure; pointer to bccu module channel Base address

typedef BCCU_DE_Type XMC_BCCU_DIM_t

Redefinition of BCCU module dimming engine structure; pointer to bccu module dimming engine base address

typedef BCCU_Type XMC_BCCU_t

Redefinition of BCCU module structure; pointer to bccu module base address

Enumeration Type Documentation

enum XMC_BCCU_BCLK_MODE_t

Provides the options to select bit clock mode.

Enumerator
XMC_BCCU_BCLK_MODE_NORMAL | Normal Mode: Bit clock runs at 1/4 of fast clock
XMC_BCCU_BCLK_MODE_FAST | Fast Mode: Bit clock runs at same as fast clock
enum XMC_BCCU_CH_ACTIVE_LEVEL_t

Provides the options to select passive level of the channel output

Enumerator
XMC_BCCU_CH_ACTIVE_LEVEL_HIGH | Default passive level of the channel is low
XMC_BCCU_CH_ACTIVE_LEVEL_LOW | Default passive level of the channel is high
enum XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_t

Provides the options to bypass dimming engine

Enumerator
XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_DISABLE | Disable: Brightness = Dimming Level * Intensity
XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_ENABLE | Enable: Brightness = Intensity
enum XMC_BCCU_CH_DIMMING_SOURCE_t

Provides the options to select dimming source of the channel

Enumerator
XMC_BCCU_CH_DIMMING_SOURCE_GLOBAL | Global Dimming Engine
XMC_BCCU_CH_DIMMING_SOURCE_DE0 | Dimming Engine 0
XMC_BCCU_CH_DIMMING_SOURCE_DE1 | Dimming Engine 1
XMC_BCCU_CH_DIMMING_SOURCE_DE2 | Dimming Engine 2
enum XMC_BCCU_CH_FLICKER_WD_t

Provides the options to select flicker watchdog enable/disable

Enumerator
XMC_BCCU_CH_FLICKER_WD_DS | Disable: No control over a sigma-delta modulator output
XMC_BCCU_CH_FLICKER_WD_EN | Enable: Limit consecutive zeros at sigma-delta modulator output
enum XMC_BCCU_CH_GATING_FUNC_t

Provides the options to select gating functionality enable/disable, and be used for peak-current control

Enumerator
XMC_BCCU_CH_GATING_FUNC_DISABLE | Disable: No control over a BCCU module output
XMC_BCCU_CH_GATING_FUNC_ENABLE | Enable: External gating signal which controls BCCU module output
enum XMC_BCCU_CH_TRAP_EDGE_t

Provides the options to select edge for trap occurrence

Enumerator
XMC_BCCU_CH_TRAP_EDGE_RISING | Trap on rising edge of the BCCU.TRAPL signal
XMC_BCCU_CH_TRAP_EDGE_FALLING | Trap on falling edge of the BCCU.TRAPL signal
enum XMC_BCCU_CH_TRAP_IN_t

Provides the options to select source of trap input

Enumerator
XMC_BCCU_CH_TRAP_INA | Trap INA
XMC_BCCU_CH_TRAP_INB | Trap INB
XMC_BCCU_CH_TRAP_INC | Trap INC
XMC_BCCU_CH_TRAP_IND | Trap IND
XMC_BCCU_CH_TRAP_INE | Trap INE
XMC_BCCU_CH_TRAP_INF | Trap INF
XMC_BCCU_CH_TRAP_ING | Trap ING
XMC_BCCU_CH_TRAP_INH | Trap INH
XMC_BCCU_CH_TRAP_INI | Trap INI
XMC_BCCU_CH_TRAP_INJ | Trap INJ
XMC_BCCU_CH_TRAP_INK | Trap INK
XMC_BCCU_CH_TRAP_INL | Trap INL
XMC_BCCU_CH_TRAP_INM | Trap INM
XMC_BCCU_CH_TRAP_INN | Trap INN
XMC_BCCU_CH_TRAP_INO | Trap INO
XMC_BCCU_CH_TRAP_INP | Trap INP
enum XMC_BCCU_CH_TRIG_EDGE_t

Provides the options to select trigger edge

Enumerator
XMC_BCCU_CH_TRIG_EDGE_PASS_TO_ACT | Trigger on output transition from passive to active
XMC_BCCU_CH_TRIG_EDGE_ACT_TO_PASS | Trigger on output transition from active to passive
enum XMC_BCCU_CH_TRIGOUT_t

Provides the options to select trigger output, and only be used in XMC_BCCU_TRIGMODE1

Enumerator
XMC_BCCU_CH_TRIGOUT0 | Trigger occurrence on BCCU_TRIGOUT0 signal
XMC_BCCU_CH_TRIGOUT1 | Trigger occurrence on BCCU_TRIGOUT1 signal
enum XMC_BCCU_DIM_CURVE_t

Provides the options to select exponential dimming curve

Enumerator
XMC_BCCU_DIM_CURVE_COARSE | Coarse curve: Slope of the linear pieces doubles every time, when it passes specific thresholds of 16, 32, 64, 128, 256, 512, 1024, 2048
XMC_BCCU_DIM_CURVE_FINE | Fine Curve: More pieces and different line slopes
enum XMC_BCCU_EVENT_STATUS_t

Provides the options to know the status of the event flags. The members can be combined using 'OR' operator for multiple selection.

Enumerator
XMC_BCCU_EVENT_STATUS_TRIGGER0 | Trigger 0 Event flag status
XMC_BCCU_EVENT_STATUS_TRIGGER1 | Trigger 1 Event flag status
XMC_BCCU_EVENT_STATUS_FIFOFULL | FIFO Full Event flag status
XMC_BCCU_EVENT_STATUS_FIFOEMPTY | FIFO Empty Event flag status
XMC_BCCU_EVENT_STATUS_TRAP | Trap Event flag status (Without Trap Set)
XMC_BCCU_EVENT_STATUS_TRAP_STATE | Trap state flag status
enum XMC_BCCU_EVENT_t

Provides the options to enable/disable the events. The members can be combined using 'OR' operator for multiple selection.

Enumerator
XMC_BCCU_EVENT_TRIGGER0 | Trigger 0 event
XMC_BCCU_EVENT_TRIGGER1 | Trigger 1 event
XMC_BCCU_EVENT_FIFOFULL | FIFO Full event
XMC_BCCU_EVENT_FIFOEMPTY | FIFO Empty event
XMC_BCCU_EVENT_TRAP | Trap event
enum XMC_BCCU_STATUS_t

Defines the status of BCCU driver, to verify the related API calls. Use type XMC_BCCU_STATUS_t for this enum.

Enumerator
XMC_BCCU_STATUS_SUCCESS | Operation completed successfully
XMC_BCCU_STATUS_ERROR | Operation has some errors
enum XMC_BCCU_SUSPEND_MODE_t

Provides the options to select suspend mode

Enumerator
XMC_BCCU_SUSPEND_MODE_IGNORE | Request ignored, and module cannot get suspended
XMC_BCCU_SUSPEND_MODE_FREEZE | All running channels gets stopped, and freeze into a last state (without safe stop)
XMC_BCCU_SUSPEND_MODE_SAFE_FREEZE | All running channels gets stopped, and freeze into a last state (with safe stop)
enum XMC_BCCU_TRAP_LEVEL_t

Provides the options to know the current level of trap

Enumerator
XMC_BCCU_TRAP_LEVEL_LOW | BCCU.TRAPL is Low
XMC_BCCU_TRAP_LEVEL_HIGH | BCCU.TRAPL is High
enum XMC_BCCU_TRAP_STATUS_t

Provides the options to know the status of trap occurrence

Enumerator
XMC_BCCU_TRAP_STATUS_DEACTIVE | BCCU module is not in a Trap State
XMC_BCCU_TRAP_STATUS_ACTIVE | BCCU module is in a Trap State
enum XMC_BCCU_TRAPEDGE_t

Provides the options to select trap edge

Enumerator
XMC_BCCU_TRAPEDGE_RISING | Trap on rising edge of the BCCU.TRAPL signal
XMC_BCCU_TRAPEDGE_FALLING | Trap on falling edge of the BCCU.TRAPL signal
enum XMC_BCCU_TRIGDELAY_t

Provides the options to select trigger delay, and only be used if Bit clock in Normal mode

Enumerator
XMC_BCCU_TRIGDELAY_NO_DELAY | BCCU trigger occurs on channel trigger(without delay)
XMC_BCCU_TRIGDELAY_QUARTER_BIT | BCCU trigger occurs on 1/4 bit time delayed after channel trigger
XMC_BCCU_TRIGDELAY_HALF_BIT | BCCU trigger occurs on 1/2 bit time delayed after channel trigger
enum XMC_BCCU_TRIGMODE_t

Provides the options to select trigger mode.

Enumerator
XMC_BCCU_TRIGMODE0 | Mode0: Trigger on Any Channel using OR logic
XMC_BCCU_TRIGMODE1 | Mode1: Trigger on Active channel using round-robin

Function Documentation

void XMC_BCCU_AbortDimming | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | dim_no
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
dim_no Specific dimming engine number to stop dimming process Range: 0 to 2
Returns
None
Description:
When the dimming in progress, the outcome of executing the API is stopping the dimming (i.e. fading) immediately for specific dimming engine number dim_no by writing a register bit DESTRCON_DEyA.

Related APIs:
XMC_BCCU_StartDimming(), XMC_BCCU_ConcurrentAbortDimming()

void XMC_BCCU_AbortLinearWalk | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | chan_no
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
chan_no Specific channel number to stop color change Range: 0 to 8
Returns
None
Description:
When the linear walk in progress, the outcome of executing the API is stopping the linear walk (i.e. color change) immediately for specific channels number using mask by writing a register CHSTRCON_CHyA.

Related APIs:
XMC_BCCU_StartLinearWalk(), XMC_BCCU_ConcurrentAbortLinearWalk()

void XMC_BCCU_CH_ConfigTrigger | ( | XMC_BCCU_CH_t *const | channel,
 |  | XMC_BCCU_CH_TRIG_EDGE_t | edge,
 |  | uint32_t | force_trig_en
 | ) |  |
Parameters
channel Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
edge Output transition selection. Use type XMC_BCCU_CH_TRIG_EDGE_t.
Range: XMC_BCCU_CH_TRIG_EDGE_PASS_TO_ACT or XMC_BCCU_CH_TRIG_EDGE_ACT_TO_PASS
force_trig_en Forcing a trigger at output. Range: 0 or 1
Generates a trigger if modulator output do not change for 256 bclk cycles
Returns
None
Description:
Configures global trigger settings: trigger edge, force trigger enable by writing a register CHCONFIG. And also configures force trigger enable, generates a trigger if modulator output do not change for 256 bclk cycles
Related APIs:
XMC_BCCU_ConfigGlobalTrigger(), XMC_BCCU_EnableChannelTrigger()

void XMC_BCCU_CH_DisableDimmingBypass ( XMC_BCCU_CH_t *const channel )
Parameters
channel Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
Returns
None
Description:
Disables dimming engine bypass by clearing register bit CHCONFIG_DBP.

Related APIs:
XMC_BCCU_CH_EnableDimmingBypass()

void XMC_BCCU_CH_DisableFlickerWatchdog ( XMC_BCCU_CH_t *const channel )
Parameters
channel Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
Returns
None
Description:
Disables flicker watchdog by writing register bit CHCONFIG_WEN. No limits the sigma-delta modulator output according to Watchdog threshold

Related APIs:
XMC_BCCU_SetFlickerWDThreshold(), XMC_BCCU_ReadFlickerWDThreshold(), XMC_BCCU_CH_Init(), XMC_BCCU_CH_EnableFlickerWatchdog()

void XMC_BCCU_CH_DisableGating ( XMC_BCCU_CH_t *const channel )
Parameters
channel Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
Returns
None
Description:
Disables gating feature by writing register bit CHCONFIG_GEN. The gating feature is used to enable/disable fast control schemes, such as peak-current control and this has been controlled by Analog Comparator module.

Related APIs:
XMC_BCCU_CH_EnableGating()

void XMC_BCCU_CH_DisablePacker ( XMC_BCCU_CH_t *const channel )
Parameters
channel Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
Returns
None
Description:
Disables packer by clearing writing register bit CHCONFIG_PEN.

Related APIs:
XMC_BCCU_CH_EnablePacker()

void XMC_BCCU_CH_EnableDimmingBypass ( XMC_BCCU_CH_t *const channel )
Parameters
channel Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
Returns
None
Description:
Enables dimming engine bypass by writing register bit CHCONFIG_DBP.

Related APIs:
XMC_BCCU_CH_SelectDimEngine(), XMC_BCCU_CH_DisableDimmingBypass()

void XMC_BCCU_CH_EnableFlickerWatchdog ( XMC_BCCU_CH_t *const channel )
Parameters
channel Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
Returns
None
Description:
Enables flicker watchdog by writing register bit CHCONFIG_WEN. And limits the sigma-delta modulator output
according to Watchdog threshold

Related APIs:
XMC_BCCU_SetFlickerWDThreshold(), XMC_BCCU_ReadFlickerWDThreshold(), XMC_BCCU_CH_Init(), XMC_BCCU_CH_DisableFlickerWatchdog()

void XMC_BCCU_CH_EnableGating ( XMC_BCCU_CH_t *const channel )
Parameters
channel Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
Returns
None
Description:
Enables gating feature by writing register bit CHCONFIG_GEN. The gating feature is used to enable fast control schemes, such as peak-current control and this has been controlled by Analog Comparator module.

Related APIs:
XMC_BCCU_CH_DisableGating()

void XMC_BCCU_CH_EnablePacker | ( | XMC_BCCU_CH_t *const | channel,
 |  | uint32_t | thresh,
 |  | uint32_t | off_comp,
 |  | uint32_t | on_comp
 | ) |  |
Parameters
channel | Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
thresh Packer threshold value of FIFO. It defines number of queue stages must be filled before output generator starts generating the pulses. Until that, only off-bits are generated at the output.
off_comp | Packer off-time compare level. When the off-time counter reaches this, the measured on off time counters are stored into FIFO
on_comp | Packer on-time compare level. When the on-time counter reaches this, the measured on & off time counters are stored into FIFO
Returns
None
Description:
Enables packer by writing register bit CHCONFIG_PEN. And also configures packer threshold, off and on compare levels by writing register PKCMP. The main purpose of the packer is to decrease the average rate of switching of the output signal, to decrease the load on external switching circuits and improve EMC behavior

Related APIs:
XMC_BCCU_CH_DisablePacker(), XMC_BCCU_CH_SetPackerThreshold(), XMC_BCCU_CH_SetPackerOffCompare(), XMC_BCCU_CH_SetPackerOnCompare

void XMC_BCCU_CH_Init | ( | XMC_BCCU_CH_t *const | channel,
 |  | const XMC_BCCU_CH_CONFIG_t *const | config
 | ) |  |
Parameters
channel | Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
config | Pointer to constant bccu channel configuration data structure. Use type XMC_BCCU_CH_CONFIG_t.
Returns
None
Description:
Configures dimming engine source, dimming bypass selection, channel trigger edge, flicker watchdog selection and force trigger selection by using dim_sel, dim_bypass, trig_edge, flick_wd_en, force_trig_en by writing into a CHCONFIG register. And also configures packer settings: threshold, off and on compare levels, initial values of off & on counters, by writing into a CHCONFIG, PKCMP and PKCNTR registers.

Related APIs:
XMC_BCCU_GlobalInit(), XMC_BCCU_DIM_Init()

uint32_t XMC_BCCU_CH_ReadIntensity ( XMC_BCCU_CH_t *const channel )
Parameters
channel Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
Returns
Current channel intensity. Range: 0 or 4095
Description:
Retrieves current channel intensity by reading the register INT.

Related APIs:
XMC_BCCU_CH_SetTargetIntensity()

uint32_t XMC_BCCU_CH_ReadPackerOffCompare ( XMC_BCCU_CH_t *const channel )
Parameters
channel Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
Returns
Packer off-time compare level. When the off-time counter reaches this, the measured on & off time counters are stored into FIFO
Description:
Retrieves packer off compare level by reading the register bit PKCMP_OFFCMP.

Related APIs:
XMC_BCCU_CH_SetPackerOffCompare()

uint32_t XMC_BCCU_CH_ReadPackerOnCompare ( XMC_BCCU_CH_t *const channel )
Parameters
channel Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
Returns
Packer on-time compare level. When the on-time counter reaches this,
the measured on & off time counters are stored into FIFO
Description:
Retrieves packer on compare level by reading the register bit PKCMP_ONCMP.

Related APIs:
XMC_BCCU_CH_SetPackerOnCompare()

uint32_t XMC_BCCU_CH_ReadPackerThreshold ( XMC_BCCU_CH_t *const channel )
Parameters
channel Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
Returns
Packer threshold value of FIFO
Description:
Retrieves packer threshold value by reading the register bit CHCONFIG_PKTH.

Related APIs:
XMC_BCCU_CH_SetPackerThreshold()

void XMC_BCCU_CH_SelectDimEngine | ( | XMC_BCCU_CH_t *const | channel,
 |  | XMC_BCCU_CH_DIMMING_SOURCE_t | sel
 | ) |  |
Parameters
channel | Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
sel | Selects a dimming engine source of the channel. Use type XMC_BCCU_CH_DIMMING_SOURCE_t
Returns
None
Description:
Configures dimming engine source by writing register bit CHCONFIG_DSEL

Related APIs:
XMC_BCCU_CH_EnableDimmingBypass()

void XMC_BCCU_CH_SetLinearWalkPrescaler | ( | XMC_BCCU_CH_t *const | channel,
 |  | uint32_t | clk_div
 | ) |  |
Parameters
channel | Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
clk_div | Prescaler factor. Range: 0 to 1023
Returns
None
Description:
configure the linear walker clock prescaler factor by writing register bit CHCONFIG_LINPRES.

void XMC_BCCU_CH_SetPackerOffCompare | ( | XMC_BCCU_CH_t *const | channel,
 |  | uint32_t | level
 | ) |  |
Parameters
channel | Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
level | Packer off-time compare level. When the off-time counter reaches this, the measured on & off time counters are stored into FIFO
Returns
None
Description:
Configures packer off compare level by writing register bit PKCMP_OFFCMP

Related APIs:
XMC_BCCU_CH_SetPackerThreshold(), XMC_BCCU_CH_SetPackerOnCompare(), XMC_BCCU_CH_SetPackerOffCounter(), XMC_BCCU_CH_ReadPackerOffCompare()

void XMC_BCCU_CH_SetPackerOffCounter | ( | XMC_BCCU_CH_t *const | channel,
 |  | uint32_t | cnt_val
 | ) |  |
Parameters
channel | Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
cnt_val | Configures an initial packer off-time counter level, only if channel is disabled. Controls phase shift of the modulator output
Returns
None
Description:
Configures packer initial off counter value by writing register bit PKCNTR_OFFCNTVAL
Note: Shall only be called if channel disabled.

Related APIs:
XMC_BCCU_CH_SetPackerOnCounter(), XMC_BCCU_CH_SetPackerOffCompare()

void XMC_BCCU_CH_SetPackerOnCompare | ( | XMC_BCCU_CH_t *const | channel,
 |  | uint32_t | level
 | ) |  |
Parameters
channel | Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
level | Packer on-time compare level. When the on-time counter reaches this, the measured on & off time counters are stored into FIFO
Returns
None
Description:
Configures packer on compare level by writing register bit PKCMP_ONCMP

Related APIs:
XMC_BCCU_CH_SetPackerThreshold(), XMC_BCCU_CH_SetPackerOffCompare(), XMC_BCCU_CH_SetPackerOnCounter(), XMC_BCCU_CH_ReadPackerOnCompare()

void XMC_BCCU_CH_SetPackerOnCounter | ( | XMC_BCCU_CH_t *const | channel,
 |  | uint32_t | cnt_val
 | ) |  |
Parameters
channel | Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
cnt_val | Configures an initial packer on-time counter level, only if channel is disabled. Controls phase shift of the modulator output
Returns
None
Description:
Configures packer initial on counter value by writing register bit PKCNTR_ONCNTVAL
Note: Shall only be called if channel disabled.

Related APIs:
XMC_BCCU_CH_SetPackerOffCounter(), XMC_BCCU_CH_SetPackerOnCompare()

void XMC_BCCU_CH_SetPackerThreshold | ( | XMC_BCCU_CH_t *const | channel,
 |  | uint32_t | val
 | ) |  |
Parameters
channel | Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
val | Packer threshold value of FIFO
Returns
None
Description:
Configures packer threshold by writing register bit CHCONFIG_PKTH

Related APIs:
XMC_BCCU_CH_SetPackerOffCompare(), XMC_BCCU_CH_SetPackerOnCompare, XMC_BCCU_CH_ReadPackerThreshold()

void XMC_BCCU_CH_SetTargetIntensity | ( | XMC_BCCU_CH_t *const | channel,
 |  | uint32_t | ch_int
 | ) |  |
Parameters
channel | Base address of the bccu channel. Range: BCCU0_CH0, BCCU0_CH1..
ch_int | Target channel intensity. Range: 0 to 4095
Returns
None
Description:
Configures target channel intensity by writing register INTS, only be written if no shadow transfer of linear walk. Use XMC_BCCU_IsLinearWalkComplete() to know shadow transfer finished

Related APIs:
XMC_BCCU_IsLinearWalkComplete(), XMC_BCCU_StartLinearWalk(), XMC_BCCU_CH_ReadIntensity()

void XMC_BCCU_ClearEventFlag | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | flag_type
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
flag_type event flag mask to clear multiple events at a time using ORed values of XMC_BCCU_EVENT_STATUS_t.
For example: If XMC_BCCU_EVENT_STATUS_TRIGGER0, XMC_BCCU_EVENT_STATUS_TRIGGER1, XMC_BCCU_EVENT_STATUS_FIFOEMPTY wants to clear at a same time, then event mask is = (XMC_BCCU_EVENT_STATUS_TRIGGER0 | XMC_BCCU_EVENT_STATUS_TRIGGER1 | XMC_BCCU_EVENT_STATUS_FIFOEMPTY)
Returns
None
Description:
Clears multiple interrupt event flags at a same time using ORed values of XMC_BCCU_EVENT_STATUS_t by writing a register EVFSR.

Related APIs:
XMC_BCCU_SetEventFlag()

void XMC_BCCU_ConcurrentAbortDimming | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | mask
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
mask Dimming engine mask to abort a dimming for multiple dimming engines at a same time.
For example: If dimming engine 0, channel 2 wants to abort a dimming at a same time, then dimming engine mask is 0101 = 0x03
-----------------------—
| DE2 | DE1 | DE0 |
-----------------------—
Returns
None
Description:
When the dimming in progress, the outcome of executing the API is stopping the dimming (i.e. fading) immediately for specific dimming engine number dim_no by writing a register DESTRCON.

Related APIs:
XMC_BCCU_AbortDimming(), XMC_BCCU_ConcurrentStartDimming()

void XMC_BCCU_ConcurrentAbortLinearWalk | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | mask
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
mask Channel mask to stop a linear walk for multiple channels at a same time.
For example: If channel 0, channel 7, channel 1 wants to abort a linear walk at a same time,
then channel mask is 01000 0011 = 0x83
---------------------------------------------------------------------------------------------------—
| Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |
---------------------------------------------------------------------------------------------------—
Returns
None
Description:
When the linear walk in progress, the outcome of executing the API is stopping the linear walk (i.e. color change) immediately for multiple channels at a same time using mask by writing a register CHSTRCON.

Related APIs:
XMC_BCCU_AbortLinearWalk(), XMC_BCCU_ConcurrentStartLinearWalk()

void XMC_BCCU_ConcurrentConfigTrigger | ( | XMC_BCCU_t *const | bccu,
 |  | XMC_BCCU_TRIG_CONFIG_t * | trig
 | ) |  |
Parameters
bccu | Base address of the bccu module. Range: BCCU0
trig | Pointer to a trigger configuration data structure. Use type XMC_BCCU_TRIG_CONFIG_t.
Returns
None
Description:
Configures global trigger settings: trigger mode, trigger delay, individual trigger lines and channel mask by writing a
registers GLOBCON and CHTRIG. Trigger mode decides when to generate a BCCU trigger, trigger delay postpones the channel
trigger by 1/4, or 1/2 bclk cycles

Related APIs:
XMC_BCCU_ConfigGlobalTrigger(), XMC_BCCU_ReadLastTrigChanNr(), XMC_BCCU_ReadGlobalTrigger(), XMC_BCCU_GlobalInit()

void XMC_BCCU_ConcurrentDisableChannels | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | mask
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
mask Channel mask to disable multiple channels.
For example: If channel 0, channel 7, channel 1 wants to disable at a same time,
then channel mask is 01000 0011 = 0x83
---------------------------------------------------------------------------------------------------—
| Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |
---------------------------------------------------------------------------------------------------—
Returns
None
Description:
Disables multiple channels at a same time using mask by writing a register CHEN.

Related APIs:
XMC_BCCU_ConcurrentEnableChannels(), XMC_BCCU_DisableChannel()

void XMC_BCCU_ConcurrentDisableDimmingEngine | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | mask
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
mask Dimming engine mask to disable multiple dimming engine at a same time.
For example: If dimming engine 0, channel 2 wants to disable a dimming at a same time, then dimming engine mask is 0101 = 0x03
-----------------------—
| DE2 | DE1 | DE0 |
-----------------------—
Returns
None
Description:
Disables multiple dimming engines at a same time using mask by writing a register DEEN.

Related APIs:
XMC_BCCU_DisableDimmingEngine(), XMC_BCCU_ConcurrentEnableDimmingEngine()

void XMC_BCCU_ConcurrentDisableTrap | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | mask
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
mask Channel mask to disable multiple channels trap functionality. For example: If channel 0, channel 7, channel 1 wants to disable a trap functionality at a same time,
then channel mask is 01000 0011 = 0x83
---------------------------------------------------------------------------------------------------—
| Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |
---------------------------------------------------------------------------------------------------—
Returns
None
Description:
Disables multiple channels trap functionality at the same time using mask by writing a register bit CHOCON_CHyTPE.

Related APIs:
XMC_BCCU_DisableTrap(), XMC_BCCU_ConcurrentEnableTrap()

void XMC_BCCU_ConcurrentEnableChannels | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | mask
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
mask Channel mask to enable multiple channels.
For example: If channel 0, channel 7, channel 1 wants to enable at a same time,
then channel mask is 01000 0011 = 0x83
---------------------------------------------------------------------------------------------------—
| Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |
---------------------------------------------------------------------------------------------------—
Returns
None
Description:
Enables multiple channels at a same time using mask by writing a register CHEN.

Related APIs:
XMC_BCCU_EnableChannel(), XMC_BCCU_ConcurrentDisableChannels()

void XMC_BCCU_ConcurrentEnableDimmingEngine | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | mask
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
mask Dimming engine mask to enable multiple dimming engine at a same time.
For example: If dimming engine 0, channel 2 wants to enable a dimming at a same time, then dimming engine mask is 0101 = 0x03
-----------------------—
| DE2 | DE1 | DE0 |
-----------------------—
Returns
None
Description:
Enables multiple dimming engines at a same time using mask by writing a register DEEN.

Related APIs:
XMC_BCCU_EnableDimmingEngine(), XMC_BCCU_ConcurrentDisableDimmingEngine()

void XMC_BCCU_ConcurrentEnableTrap | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | mask
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
mask Channel mask to enable multiple channels trap functionality.
For example: If channel 0, channel 7, channel 1 wants to enable a trap functionality at a same time,
then channel mask is 01000 0011 = 0x83
---------------------------------------------------------------------------------------------------—
| Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |
---------------------------------------------------------------------------------------------------—
Returns
None
Description:
Enables multiple channels trap functionality at the same time using mask by writing a register bit CHOCON_CHyTPE.

Related APIs:
XMC_BCCU_EnableTrap(), XMC_BCCU_ConcurrentDisableTrap(), XMC_BCCU_SelectTrapInput(), XMC_BCCU_SetTrapEdge()

void XMC_BCCU_ConcurrentSetOutputPassiveLevel | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | chan_mask,
 |  | XMC_BCCU_CH_ACTIVE_LEVEL_t | level
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
chan_mask Channel mask to enable multiple channels.
For example: If channel 0, channel 7, channel 1 wants to enable at a same time,
then channel mask is 01000 0011 = 0x83
---------------------------------------------------------------------------------------------------—
| Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |
---------------------------------------------------------------------------------------------------—
level Passive level selection. Use type XMC_BCCU_CH_ACTIVE_LEVEL_t.
Range: XMC_BCCU_CH_ACTIVE_LEVEL_HIGH or XMC_BCCU_CH_ACTIVE_LEVEL_LOW
Returns
None
Description:
Configures passive levels of multiple channels at a same time using mask by writing a register bit CHOCON_CHyOP.

Related APIs:
XMC_BCCU_SetOutputPassiveLevel()

void XMC_BCCU_ConcurrentStartDimming | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | mask
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
mask Dimming engine mask to start a dimming for multiple dimming engines at a same time.
For example: If dimming engine 0, channel 2 wants to start a dimming at a same time, then dimming engine mask is 0101 = 0x03
-----------------------—
| DE2 | DE1 | DE0 |
-----------------------—
Returns
None
Description:
After dimming engine initialization, the outcome of executing the API starts changing the brightness towards to target for multiple dimming engines at a same time using mask by writing a register DESTRCON.

Related APIs:
XMC_BCCU_StartDimming(), XMC_BCCU_ConcurrentAbortDimming()

void XMC_BCCU_ConcurrentStartLinearWalk | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | mask
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
mask Channel mask to start a linear walk for multiple channels at a same time.
For example: If channel 0, channel 7, channel 1 wants to start a linear walk at a same time,
then channel mask is 01000 0011 = 0x83
---------------------------------------------------------------------------------------------------—
| Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |
---------------------------------------------------------------------------------------------------—
Returns
None
Description:
After channel initialization, the outcome of executing the API starts changing the color smoothly towards to target
for multiple channels at a same time using mask by writing a register CHSTRCON.

Related APIs:
XMC_BCCU_StartLinearWalk(), XMC_BCCU_ConcurrentAbortLinearWalk()

void XMC_BCCU_ConfigGlobalTrigger | ( | XMC_BCCU_t *const | bccu,
 |  | XMC_BCCU_TRIGMODE_t | mode,
 |  | XMC_BCCU_TRIGDELAY_t | delay
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
mode Trigger mode selection. Range: XMC_BCCU_TRIGMODE0, XMC_BCCU_TRIGMODE1.
  1. XMC_BCCU_TRIGMODE0 - Trigger on Any Channel
  2. XMC_BCCU_TRIGMODE1 - Trigger on Active channel
delay Delay to avoid sampling during switching noise. Use type XMC_BCCU_TRIGDELAY_t.
Range: XMC_BCCU_NO_DELAY, XMC_BCCU_QUARTER_BIT_DELAY, XMC_BCCU_HALF_BIT_DELAY.
Returns
None
Description:
Configures trigger mode and trigger delay by writing register bits GLOBCON.TM, GLOBCON.TRDEL. mode and delay parameters which decides when to trigger a conversion of vadc module for voltage measurement.

Related APIs:
XMC_BCCU_EnableChannelTrigger(), XMC_BCCU_ReadGlobalTrigger(), XMC_BCCU_ConcurrentConfigTrigger(), XMC_BCCU_GlobalInit(), XMC_BCCU_ReadLastTrigChanNr(), XMC_BCCU_GetChannelOutputLvlAtLastTrigger(), XMC_BCCU_CH_ConfigTrigger()

void XMC_BCCU_ConfigSuspendMode | ( | XMC_BCCU_t *const | bccu,
 |  | XMC_BCCU_SUSPEND_MODE_t | mode
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
mode Suspend mode selection. Use type XMC_BCCU_SUSPEND_MODE_t.
Range: XMC_BCCU_SUSPEND_MODE_IGNORE, XMC_BCCU_SUSPEND_MODE_FREEZE, XMC_BCCU_USPEND_MODE_SAFE_FREEZE.
Returns
None
Description:
Configures suspend mode by writing register bit GLOBCON_SUSCFG.

Related APIs:
XMC_BCCU_ReadSuspendMode()

void XMC_BCCU_DIM_ConfigDimCurve | ( | XMC_BCCU_DIM_t *const | dim_engine,
 |  | uint32_t | dither_en,
 |  | XMC_BCCU_DIM_CURVE_t | sel
 | ) |  |
Parameters
dim_engine Base address of the bccu dimming engine. Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2
dither_en Dither enable. Dithering added for every dimming step if dimming level < 128.
sel Type of exponential curve. Use type XMC_BCCU_DIM_CURVE_t. Note: If dither enabled, the configuration is being ignored
Returns
None
Description:
Configures dimming clock curve by writing register bit DE_DTT_CSEL.

Related APIs:
XMC_BCCU_DIM_Init()

XMC_BCCU_DIM_CURVE_t XMC_BCCU_DIM_GetDimCurve ( XMC_BCCU_DIM_t *const dim_engine )
Parameters
dim_engine Base address of the bccu dimming engine. Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2
Returns
Type of exponential curve Range: XMC_BCCU_DIM_CURVE_COARSE or XMC_BCCU_DIM_CURVE_FINE
Description:
Retrieves exponential curve type by reading the register bit BCCU_DE_DTT_CSEL.

Related APIs:
XMC_BCCU_DIM_ConfigDimCurve(), XMC_BCCU_IsDitherEnable()

void XMC_BCCU_DIM_Init | ( | XMC_BCCU_DIM_t *const | dim_engine,
 |  | const XMC_BCCU_DIM_CONFIG_t *const | config
 | ) |  |
Parameters
dim_engine | Base address of the bccu dimming engine. Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2
config | Pointer to constant dimming engine configuration data structure. Use type XMC_BCCU_DIM_CONFIG_t.
Returns
None
Description:
Configures dimming clock divider to adjust the fade rate, dither selection and exponential curve selection using dim_div, dither_en, cur_sel parameters and by writing into a DTT register.

Related APIs:
XMC_BCCU_GlobalInit(), XMC_BCCU_CH_Init()

uint32_t XMC_BCCU_DIM_ReadDimDivider ( XMC_BCCU_DIM_t *const dim_engine )
Parameters
dim_engine Base address of the bccu dimming engine. Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2
Returns
Dimming clock divider value. Range: 0 to 1023
Description:
Retrieves dimming clock divider value by reading the register BCCU_DE_DTT_DIMDIV.

Related APIs:
XMC_BCCU_DIM_SetDimDivider()

uint32_t XMC_BCCU_DIM_ReadDimmingLevel ( XMC_BCCU_DIM_t *const dim_engine )
Parameters
dim_engine Base address of the bccu dimming engine. Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2
Returns
Current dimming level. Range: 0 or 4095
Description:
Retrieves current dimming level by reading the register DE_DL_DLEV.

Related APIs:
XMC_BCCU_DIM_SetTargetDimmingLevel()

void XMC_BCCU_DIM_SetDimDivider | ( | XMC_BCCU_DIM_t *const | dim_engine,
 |  | uint32_t | div
 | ) |  |
Parameters
dim_engine Base address of the bccu dimming engine. Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2
div Dimming clock divider, used to adjust the fade rate. If 0, the dimming level as same as target dimming level on shadow transfer
Returns
None
Description:
Configures dimming clock divider by writing register bit DE_DTT_DIMDIV.

Related APIs:
XMC_BCCU_SetDimClockPrescaler(), XMC_BCCU_DIM_ReadDimDivider()

void XMC_BCCU_DIM_SetTargetDimmingLevel | ( | XMC_BCCU_DIM_t *const | dim_engine,
 |  | uint32_t | level
 | ) |  |
Parameters
dim_engine | Base address of the bccu dimming engine. Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2
level | Target dimming level. Range: 0 to 4095
Returns
None
Description:
Configures target dimming level by writing register DLS, only be written if no shadow transfer of dimming. Use XMC_BCCU_IsDimmingFinished() to know shadow transfer finished

Related APIs:
XMC_BCCU_StartDimming(), XMC_BCCU_IsDimmingFinished(), XMC_BCCU_SetGlobalDimmingLevel(),
XMC_BCCU_DIM_ReadDimmingLevel()

void XMC_BCCU_DisableChannel | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | chan_no
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
chan_no Specific channel number to disable. Range: 0 to 8
Returns
None
Description:
Disables a specific channel number using chan_no by writing a register CHEN.

Related APIs:
XMC_BCCU_ConcurrentDisableChannels(), XMC_BCCU_EnableChannel()

void XMC_BCCU_DisableChannelTrigger | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | chan_no
 | ) |  |
Parameters
bccu | Base address of the bccu module. Range: BCCU0
chan_no | Channel number to trigger a specific channel. Range: 0 to 8
Returns
None
Description:
Disables specific channel trigger using chan_no by writing a register bit CHOCON_CHyTPE.

Related APIs:
XMC_BCCU_EnableChannelTrigger()

void XMC_BCCU_DisableDimmingEngine | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | dim_no
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
dim_no Specific dimming engine number to disable. Range: 0 to 2
Returns
None
Description:
Disables a specific dimming engine number using dim_no by clearing a register bit DEEN_EDEy.

Related APIs:
XMC_BCCU_EnableDimmingEngine(), XMC_BCCU_ConcurrentDisableDimmingEngine()

void XMC_BCCU_DisableInterrupt | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | event
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
event Event mask to disable multiple events at a time using ORed values of XMC_BCCU_EVENT_t.
For example: If XMC_BCCU_EVENT_TRIGGER0, XMC_BCCU_EVENT_TRIGGER1, XMC_BCCU_EVENT_FIFOEMPTY wants to disable
at a same time, then event mask is = (XMC_BCCU_EVENT_TRIGGER0 | XMC_BCCU_EVENT_TRIGGER1 | XMC_BCCU_EVENT_FIFOEMPTY)
Returns
None
Description:
Disables multiple interrupt events at a same time using ORed values of XMC_BCCU_EVENT_t by writing a register EVIER.

Related APIs:
XMC_BCCU_EnableInterrupt()

void XMC_BCCU_DisableTrap | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | chan_no
 | ) |  |
Parameters
bccu | Base address of the bccu module. Range: BCCU0
chan_no | Channel number to disable specific channel trap functionality. Range: 0 to 8
Returns
None
Description:
Disables specific channel trap functionality using chan_no by writing a register bit CHOCON_CHyTPE.

Related APIs:
XMC_BCCU_EnableTrap(), XMC_BCCU_ConcurrentDisableTrap()

void XMC_BCCU_EnableChannel | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | chan_no
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
chan_no Specific channel number to enable. Range: 0 to 8
Returns
None
Description:
Enables a specific channel number using chan_no by writing a register CHEN.

Related APIs:
XMC_BCCU_ConcurrentEnableChannels(), XMC_BCCU_DisableChannel()

void XMC_BCCU_EnableChannelTrigger | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | chan_no,
 |  | XMC_BCCU_CH_TRIGOUT_t | trig_line
 | ) |  |
Parameters
bccu | Base address of the bccu module. Range: BCCU0
chan_no | Channel number to trigger a specific channel. Range: 0 to 8
trig_line Trigger line number to trigger a vadc. Use type XMC_BCCU_CH_TRIGOUT_t.
Range: XMC_BCCU_CH_TRIGOUT0 or XMC_BCCU_CH_TRIGOUT1
Returns
None
Description:
Enables specific channel trigger using chan_no by writing a register bit CHOCON_CHyTPE.

Related APIs:
XMC_BCCU_ConfigGlobalTrigger(), XMC_BCCU_DisableChannelTrigger(), XMC_BCCU_CH_ConfigTrigger()

void XMC_BCCU_EnableDimmingEngine | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | dim_no
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
dim_no Specific dimming engine number to enable. Range: 0 to 2
Returns
None
Description:
Enables a specific dimming engine number using dim_no by writing a register bit DEEN_EDEy.

Related APIs:
XMC_BCCU_DisableDimmingEngine(), XMC_BCCU_ConcurrentEnableDimmingEngine()

void XMC_BCCU_EnableInterrupt | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | event
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
event Event mask to enable multiple events at a time using ORed values of XMC_BCCU_EVENT_t.
For example: If XMC_BCCU_EVENT_TRIGGER0, XMC_BCCU_EVENT_TRIGGER1, XMC_BCCU_EVENT_FIFOEMPTY wants to enable at a same time,
then event mask is = (XMC_BCCU_EVENT_TRIGGER0 | XMC_BCCU_EVENT_TRIGGER1 | XMC_BCCU_EVENT_FIFOEMPTY)
Returns
None
Description:
Enables multiple interrupt events at a same time using ORed values of XMC_BCCU_EVENT_t by writing a register EVIER.

Related APIs:
XMC_BCCU_DisableInterrupt()

void XMC_BCCU_EnableTrap | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | chan_no
 | ) |  |
Parameters
bccu | Base address of the bccu module. Range: BCCU0
chan_no | Channel number to enable specific channel trap functionality. Range: 0 to 8
Returns
None
Description:
Enables specific channel trap functionality using chan_no by writing a register bit CHOCON_CHyTPE.

Related APIs:
XMC_BCCU_DisableTrap(), XMC_BCCU_ConcurrentEnableTrap(), XMC_BCCU_SelectTrapInput(), XMC_BCCU_SetTrapEdge()

uint32_t XMC_BCCU_GetChannelOutputLvlAtLastTrigger | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | chan_no
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
chan_no Specific channel number to get an output level on last trigger. Range: 0 to 8
Returns
Trap channel output level. Range: 0 or 1
Description:
Retrieves output level of specific channel number when last trigger occurred by reading the register bit LTCHOL_LTOLy.

Related APIs:
XMC_BCCU_ReadLastTrigChanNr(), XMC_BCCU_ConfigGlobalTrigger(), XMC_BCCU_ConcurrentConfigTrigger(), XMC_BCCU_ReadGlobalTrigger(), XMC_BCCU_GlobalInit()

void XMC_BCCU_GlobalInit | ( | XMC_BCCU_t *const | bccu,
 |  | const XMC_BCCU_GLOBAL_CONFIG_t *const | config
 | ) |  |
Parameters
bccu | Base address of the bccu module. Range: BCCU0
config | Pointer to constant bccu global configuration data structure. Use type XMC_BCCU_GLOBAL_CONFIG_t.
Returns
None
Description:
Initializes three main clocks (fast clock, bit clock, dimmer clock) by using fclk_ps bclk_sel dclk_ps parameters and writing into a GLOBCLK register.
And also configures a trigger mode, trigger delay, maximum 0's allowed at modulator output by writing into a GLOBCON register.

Related APIs:
XMC_BCCU_CH_Init(), XMC_BCCU_DIM_Init()

uint32_t XMC_BCCU_IsDimmingFinished | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | dim_no
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
dim_no Specific dimming engine number to know the dimming status. Range: 0 to 2
Returns
Dimming completion status. Range: 0-Completed or 1-start change towards the target
Description:
Retrieves dimming completion status for specific dimming engine number using dim_no by reading the register bit DESTRCON_DEyS.

Related APIs:
XMC_BCCU_DIM_SetTargetDimmingLevel(), XMC_BCCU_StartDimming()

uint32_t XMC_BCCU_IsDitherEnable ( XMC_BCCU_DIM_t *const dim_engine )
Parameters
dim_engine Base address of the bccu dimming engine. Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2
Returns
Dither enable status. Range: 1-Enabled or 0-Disabled
Description:
Retrieves dither enable status by reading the register bit BCCU_DE_DTT_DTEN.

Related APIs:
XMC_BCCU_DIM_ConfigDimCurve(), XMC_BCCU_DIM_GetDimCurve()

uint32_t XMC_BCCU_IsLinearWalkComplete | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | chan_no
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
chan_no Channel number to know the linear walk completion status. Range: 0 to 8
Returns
Linear walk completion status. Range: 0-Completed or 1-intensity start changing towards the target
Description:
Retrieves linear walk completion status for specific channel using chan_no by reading the register bit CHSTRCON_CHyS.

Related APIs:
XMC_BCCU_CH_SetTargetIntensity(), XMC_BCCU_StartLinearWalk()

uint32_t XMC_BCCU_ReadBitClock ( XMC_BCCU_t *const bccu )
Parameters
bccu Base address of the bccu module. Range: BCCU0
Returns
Prescaler factor. Range: 0 or 1
0 - XMC_BCCU_BCLK_MODE_NORMAL
1 - XMC_BCCU_BCLK_MODE_FAST
Description:
Retrieves modulator output (bit-time) clock prescaler factor of a BCCU module by reading the register bit GLOBCLK_BCS. Use XMC_BCCU_BCLK_MODE_t type to validate a returned value.

Related APIs:
XMC_BCCU_SelectBitClock(), XMC_BCCU_ReadDimClock(), XMC_BCCU_ReadFastClock()

uint32_t XMC_BCCU_ReadDimClock ( XMC_BCCU_t *const bccu )
Parameters
bccu Base address of the bccu module. Range: BCCU0
Returns
Prescaler factor. Range: 0 to 4095
Description:
Retrieves dimmer clock prescaler factor of a BCCU module by reading the register bit GLOBCLK_DCLK_PS. The dim clock is derived from the bccu clock by prescaler factor.
i.e. fdclk = fbccu_clk / prescaler factor.

Related APIs:
XMC_BCCU_SetDimClockPrescaler(), XMC_BCCU_ReadBitClock(), XMC_BCCU_ReadFastClock()

uint32_t XMC_BCCU_ReadEventFlag ( XMC_BCCU_t *const bccu )
Parameters
bccu Base address of the bccu module. Range: BCCU0
Returns
Interrupt events flags at a same time using ORed values of XMC_BCCU_EVENT_t.
Description:
Retrieves interrupt event flags at the same time using ORed values of XMC_BCCU_EVENT_t by reading the register
EVFR.

Related APIs:
XMC_BCCU_SetEventFlag()

uint32_t XMC_BCCU_ReadFastClock ( XMC_BCCU_t *const bccu )
Parameters
bccu Base address of the bccu module. Range: BCCU0
Returns
Prescaler factor. Range: 0 to 4095
Description:
Retrieves fast clock prescaler factor of a BCCU module by reading the register bit GLOBCLK_FCLK_PS. The fast clock is derived from the bccu clock by prescaler factor i.e. fdclk = fbccu_clk / prescaler factor.

Related APIs:
XMC_BCCU_SetFastClockPrescaler(), XMC_BCCU_ReadBitClock(), XMC_BCCU_ReadDimClock()

uint32_t XMC_BCCU_ReadFlickerWDThreshold ( XMC_BCCU_t *const bccu )
Parameters
bccu Base address of the bccu module. Range: BCCU0
Returns
Number of consecutive zeroes at modulator output. Range: 0 to 4095
Description:
Retrieves number of consecutive zeroes at modulator output (flicker watchdog number) by reading the register bit GLOBCON_WDMBN.

Related APIs:
XMC_BCCU_SetFlickerWDThreshold(), XMC_BCCU_CH_EnableFlickerWatchdog(), XMC_BCCU_CH_Init(), XMC_BCCU_CH_DisableFlickerWatchdog()

uint32_t XMC_BCCU_ReadGlobalTrigger ( XMC_BCCU_t *const bccu )
Parameters
bccu Base address of the bccu module. Range: BCCU0
Returns
Source of Trigger mode. Range: 0 or 1
0 - Trigger mode 0 (Trigger on Any Channel)
1 - Trigger mode 1 (Trigger on Active Channel)

Description:
Retrieves global trigger mode of the BCCU module by reading the register bit GLOBCON_TM. Use XMC_BCCU_TRIGMODE_t type to validate a returned value.

Related APIs:
XMC_BCCU_ConfigGlobalTrigger(), XMC_BCCU_ConcurrentConfigTrigger(), XMC_BCCU_GlobalInit()

uint32_t XMC_BCCU_ReadLastTrigChanNr ( XMC_BCCU_t *const bccu )
Parameters
bccu Base address of the bccu module. Range: BCCU0
Returns
Last triggered channel number. Range: 0 to 8
0 - BCCU Channel 0
1 - BCCU Channel 1 and so on.
Description:
Retrieves last triggered channel number of a BCCU module by reading the register bit GLOBCON_LTRS.

Related APIs:
XMC_BCCU_GetChannelOutputLvlAtLastTrigger(), XMC_BCCU_ConfigGlobalTrigger(), XMC_BCCU_ConcurrentConfigTrigger(), XMC_BCCU_ReadGlobalTrigger(), XMC_BCCU_GlobalInit()

uint32_t XMC_BCCU_ReadSuspendMode ( XMC_BCCU_t *const bccu )
Parameters
bccu Base address of the bccu module. Range: BCCU0
Returns
Trap edge selection. Range: 0, 1, 2
0 - XMC_BCCU_SUSPEND_MODE_IGNORE
1 - XMC_BCCU_SUSPEND_MODE_FREEZE.
2 - XMC_BCCU_USPEND_MODE_SAFE_FREEZE.
Description:
Retrieves the state of suspend mode by reading the register bit GLOBCON_TRAPIS. Use XMC_BCCU_SUSPEND_MODE_t type to validate a returned value.

Related APIs:
XMC_BCCU_ConfigSuspendMode()

uint32_t XMC_BCCU_ReadTrapEdge ( XMC_BCCU_t *const bccu )
Parameters
bccu Base address of the bccu module. Range: BCCU0
Returns
Trap edge selection. Range: 0 or 1
0 - XMC_BCCU_CH_TRAP_EDGE_RISING
1 - XMC_BCCU_CH_TRAP_EDGE_FALLING.
Description:
Retrieves trap edge by reading the register bit GLOBCON_TRAPED. Use XMC_BCCU_CH_TRAP_EDGE_t type to validate a returned value.

Related APIs:
XMC_BCCU_SetTrapEdge()

uint32_t XMC_BCCU_ReadTrapInput ( XMC_BCCU_t *const bccu )
Parameters
bccu Base address of the bccu module. Range: BCCU0
Returns
Source of trap input. Range: 0 to 15
0 - TRAPINA
1 - TRAPINB and so on.
Description:
Retrieves trap input of the channel by reading the register bit GLOBCON_TRAPIS. Use XMC_BCCU_CH_TRAP_IN_t type to validate a returned value.

Related APIs:
XMC_BCCU_SelectTrapInput()

void XMC_BCCU_SelectBitClock | ( | XMC_BCCU_t *const | bccu,
 |  | XMC_BCCU_BCLK_MODE_t | div
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
div Prescaler factor. Use type XMC_BCCU_BCLK_MODE_t.
Range: XMC_BCCU_BCLK_MODE_NORMAL or XMC_BCCU_BCLK_MODE_FAST.
Returns
None
Description:
Configures modulator output (bit-time) clock prescaler factor of a BCCU module by writing register bit GLOBCLK_BCS.

Related APIs:
XMC_BCCU_SetFastClockPrescaler(), XMC_BCCU_SetDimClockPrescaler(), XMC_BCCU_ReadBitClock()

void XMC_BCCU_SelectTrapInput | ( | XMC_BCCU_t *const | bccu,
 |  | XMC_BCCU_CH_TRAP_IN_t | input
 | ) |  |
Parameters
bccu | Base address of the bccu module. Range: BCCU0
input | Trap input selection. Use type XMC_BCCU_TRIGDELAY_t. Range: XMC_BCCU_TRIGDELAY_NO_DELAY, XMC_BCCU_TRIGDELAY_QUARTER_BIT, XMC_BCCU_TRIGDELAY_HALF_BIT.
Returns
None
Description:
Selects input of trap functionality by writing register bit GLOBCON_TRAPIS. The trap functionality is used to switch off the connected power devices when trap input becomes active.

Related APIs:
XMC_BCCU_SetTrapEdge(), XMC_BCCU_ReadTrapInput(), XMC_BCCU_EnableTrap(), XMC_BCCU_ConcurrentEnableTrap()

void XMC_BCCU_SetDimClockPrescaler | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | div
 | ) |  |
Parameters
bccu | Base address of the bccu module. Range: BCCU0
div | Prescaler factor. Range: 0 to 4095.
Returns
None
Description:
Configures dimmer clock prescaler factor of a BCCU module by writing register bit GLOBCLK_DCLK_PS.

Related APIs:
XMC_BCCU_DIM_SetDimDivider(), XMC_BCCU_SetFastClockPrescaler(), XMC_BCCU_SelectBitClock(), XMC_BCCU_ReadDimClock()

void XMC_BCCU_SetEventFlag | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | flag_type
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
flag_type Event flag mask to configure multiple events at a time using ORed values of XMC_BCCU_EVENT_STATUS_t.
For example: If XMC_BCCU_EVENT_STATUS_TRIGGER0, XMC_BCCU_EVENT_STATUS_TRIGGER1, XMC_BCCU_EVENT_STATUS_FIFOEMPTY wants to configure at a same time, then event mask is = (XMC_BCCU_EVENT_STATUS_TRIGGER0 | XMC_BCCU_EVENT_STATUS_TRIGGER1 | XMC_BCCU_EVENT_STATUS_FIFOEMPTY)
Returns
None
Description:
Configures multiple interrupt event flags at a same time using ORed values of XMC_BCCU_EVENT_STATUS_t by writing a register EVFSR.

Related APIs:
XMC_BCCU_ClearEventFlag(), XMC_BCCU_ReadEventFlag()

void XMC_BCCU_SetFastClockPrescaler | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | div
 | ) |  |
Parameters
bccu | Base address of the bccu module. Range: BCCU0
div | Prescaler factor. Range: 0 to 4095.
Returns
None
Description:
Configures trigger functionality clock prescaler factor of a BCCU module by writing register bit GLOBCLK_FCLK_PS.

Related APIs:
XMC_BCCU_SetDimClockPrescaler(), XMC_BCCU_SelectBitClock(), XMC_BCCU_ReadFastClock()

void XMC_BCCU_SetFlickerWDThreshold | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | threshold_no
 | ) |  |
Parameters
bccu | Base address of the bccu module. Range: BCCU0
threshold_no | Number of consecutive zeroes at modulator output. Range: 0 to 4095.
Returns
None
Description:
Configures number of consecutive zeroes allowed at modulator output (flicker watch-dog number) by writing register bit GLOBCON_WDMBN.

Related APIs:
XMC_BCCU_CH_EnableFlickerWatchdog(), XMC_BCCU_ReadFlickerWDThreshold(), XMC_BCCU_CH_Init(), XMC_BCCU_CH_DisableFlickerWatchdog()

void XMC_BCCU_SetGlobalDimmingLevel | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | level
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
level Dimming level of global dimming engine. Range: 0 to 4095
Returns
None
Description:
Configures a global dimming level by writing a register GLOBDIM. This is useful only if global dimming engine selected. Otherwise the configuration is ignored.

Related APIs:
XMC_BCCU_DIM_SetTargetDimmingLevel()

void XMC_BCCU_SetOutputPassiveLevel | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | chan_no,
 |  | XMC_BCCU_CH_ACTIVE_LEVEL_t | level
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
chan_no Specific channel number to enable specific channel. Range: 0 to 8
level Passive level selection. Use type XMC_BCCU_CH_ACTIVE_LEVEL_t.
Range: XMC_BCCU_CH_ACTIVE_LEVEL_HIGH or XMC_BCCU_CH_ACTIVE_LEVEL_LOW
Returns
None
Description:
Configures passive level of specific channel using chan_no by writing a register bit CHOCON_CHyOP.

Related APIs:
XMC_BCCU_ConcurrentSetOutputPassiveLevel()

void XMC_BCCU_SetTrapEdge | ( | XMC_BCCU_t *const | bccu,
 |  | XMC_BCCU_CH_TRAP_EDGE_t | edge
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
edge Trap edge selection. Use type XMC_BCCU_CH_TRAP_EDGE_t.
Range: XMC_BCCU_CH_TRAP_EDGE_RISING, XMC_BCCU_CH_TRAP_EDGE_FALLING.
Returns
None
Description:
Selects active edge which detects trap on TRAPL signal by writing register bit GLOBCON_TRAPED.

Related APIs:
XMC_BCCU_SelectTrapInput(), XMC_BCCU_ReadTrapEdge(), XMC_BCCU_EnableTrap(), XMC_BCCU_ConcurrentEnableTrap()

void XMC_BCCU_StartDimming | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | dim_no
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
dim_no Specific dimming engine number to start dimming process Range: 0 to 2
Returns
None
Description:
After dimming engine initialization, the outcome of executing the API starts changing the brightness towards to target by writing a register bit DESTRCON_DEyS.

Related APIs:
XMC_BCCU_AbortDimming(), XMC_BCCU_ConcurrentStartDimming()

void XMC_BCCU_StartLinearWalk | ( | XMC_BCCU_t *const | bccu,
 |  | uint32_t | chan_no
 | ) |  |
Parameters
bccu Base address of the bccu module. Range: BCCU0
chan_no Specific channel number to start color change Range: 0 to 8
Returns
None
Description:
After channel initialization, the outcome of executing the API starts changing the color smoothly towards to target by writing a register bit CHSTRCON_CHyS.

Related APIs:
XMC_BCCU_AbortLinearWalk(), XMC_BCCU_CH_SetTargetIntensity(), XMC_BCCU_IsLinearWalkComplete(), XMC_BCCU_ConcurrentStartLinearWalk()

Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_BCCU_CH_CONFIG_t Struct Reference

Data Fields
XMC_BCCU_CH_CONFIG_t Struct Reference
XMC Peripheral Library » BCCU

#include <xmc_bccu.h>

Data Fields

uint32_t | dim_bypass:1
uint32_t | dim_sel:3
uint32_t | flick_wd_en:1
uint32_t | force_trig_en:1
uint32_t | gate_en:1
uint32_t | pack_en:1
uint32_t | pack_offcmp_lev:8
uint32_t | pack_offcnt_val:8
uint32_t | pack_oncmp_lev:8
uint32_t | pack_oncnt_val:8
uint32_t | pack_thresh:3
uint32_t | trig_edge:1

Detailed Description

Configures channel settings of the BCCU module.

Field Documentation

uint32_t dim_bypass

Selects dimming engine bypass enable.
Use type XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_t

uint32_t dim_sel

Selects a dimming engine source of the channel.
Use type XMC_BCCU_CH_DIMMING_SOURCE_t

uint32_t flick_wd_en

Selects flicker watchdog enable. Use type XMC_BCCU_CH_FLICKER_WD_t

uint32_t force_trig_en

Selects force trigger enable; generates a trigger if modulator output do not change
for 256 bclk cycles

uint32_t gate_en

Selects gating enable. Use type XMC_BCCU_CH_GATING_FUNC_t

uint32_t pack_en

Enables a packed output bitstream

uint32_t pack_offcmp_lev

Configures a packer off-time compare level. When the off-time counter reaches this, the measured on & off time counters are stored into FIFO

Configures a packer off-time compare level. When the off-time counter reaches
this, the measured on & off time counters are stored into FIFO

uint32_t pack_offcnt_val

Configures an initial packer off-time counter level, only if channel is disabled.
Controls phase shift of the modulator output

uint32_t pack_oncmp_lev

Configures a packer on-time compare level. When the on-time counter reaches this,
the measured on & off time counters are stored into FIFO

uint32_t pack_oncnt_val

Configures an initial packer on-time counter level, only if channel is disabled.
Controls phase shift of the modulator output

uint32_t pack_thresh

Configures packer threshold value of FIFO

uint32_t trig_edge

Selects trigger edge. Use type XMC_BCCU_CH_TRIG_EDGE_t

The documentation for this struct was generated from the following file:
  • xmc_bccu.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_BCCU_DIM_CONFIG_t Struct Reference

Data Fields
XMC_BCCU_DIM_CONFIG_t Struct Reference
XMC Peripheral Library » BCCU

#include <xmc_bccu.h>

Data Fields

uint32_t | cur_sel:1
uint32_t | dim_div:10
uint32_t | dither_en:1

Detailed Description

Configures dimming engine settings of the BCCU module.

Field Documentation

uint32_t cur_sel

Selects a type of exponential curve. Use type XMC_BCCU_DIM_CURVE_t. If dither
enabled, the configuration is being ignored

uint32_t dim_div

Configures a dimming clock divider, used to adjust the fade rate. If 0, the dimming level
as same as target dimming level on shadow transfer

uint32_t dither_en

Selects a dither enable. Dithering added for every dimming step if dimming level < 128.

The documentation for this struct was generated from the following file:
  • xmc_bccu.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_BCCU_GLOBAL_CONFIG_t Struct Reference

Data Fields
XMC_BCCU_GLOBAL_CONFIG_t Struct Reference
XMC Peripheral Library » BCCU

#include <xmc_bccu.h>

Data Fields

uint32_t | global_dimlevel
uint32_t | bclk_sel:1
uint32_t | dclk_ps:12
uint32_t | fclk_ps:12
uint32_t | maxzero_at_output:12
uint32_t | trig_delay:2
uint32_t | trig_mode:1

Detailed Description

Configures a global setting of the BCCU module.

Field Documentation

uint32_t bclk_sel

Selects the bit clock. Use type XMC_BCCU_BCLK_MODE_t

uint32_t dclk_ps

Configures the ratio between dimmer clock and module clock

uint32_t fclk_ps

Configures the ratio between fast clock and module clock

uint32_t global_dimlevel

Configures global dimming engine dimming level

uint32_t maxzero_at_output

Configures maximum 0's allowed at modulator output

uint32_t trig_delay

Selects trigger delay between channel & module trigger.
Use type XMC_BCCU_TRIGDELAY_t

uint32_t trig_mode

Selects trigger Mode. Use type XMC_BCCU_TRIGMODE_t

The documentation for this struct was generated from the following file:
  • xmc_bccu.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_BCCU_TRIG_CONFIG_t Struct Reference

Data Fields
XMC_BCCU_TRIG_CONFIG_t Struct Reference
XMC Peripheral Library » BCCU

#include <xmc_bccu.h>

Data Fields

XMC_BCCU_TRIGDELAY_t delay
uint16_t | mask_chans
uint16_t | mask_trig_lines
XMC_BCCU_TRIGMODE_t mode

Detailed Description

Configures global trigger settings of the BCCU module.

Field Documentation

XMC_BCCU_TRIGDELAY_t delay

Selects global trigger delay between channel trigger & BCCU trigger

uint16_t mask_chans

Channel mask to configure trigger settings for multiple channels For example: If channel 0 and 7, wants to configure then the channel mask is 01000 0001 = 0x81

uint16_t mask_trig_lines

Trigger line mask

XMC_BCCU_TRIGMODE_t mode

Selects global trigger mode which decides when to occur BCCU trigger

The documentation for this struct was generated from the following file:
  • xmc_bccu.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: CAN

Data Structures | Macros | Typedefs | Enumerations | Functions
CAN
XMC Peripheral Library

Data Structures

struct | XMC_CAN_FIFO_CONFIG_t
struct | XMC_CAN_GATEWAY_CONFIG_t
struct | XMC_CAN_MO_t
struct | XMC_CAN_NODE_FRAME_COUNTER_t
struct | XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t

Macros

#define | CAN_MO_MOIPR_Msk (0x7U)
#define | CAN_NODE_NIPR_Msk (0x7UL)
#define | XMC_CAN_MO_MOAR_STDID_Msk ((0x000007FFUL) << XMC_CAN_MO_MOAR_STDID_Pos)
#define | XMC_CAN_MO_MOAR_STDID_Pos (18U)

Typedefs

typedef CAN_NODE_TypeDef | XMC_CAN_NODE_t
typedef CAN_GLOBAL_TypeDef | XMC_CAN_t

Enumerations

Functions

void | XMC_CAN_AllocateMOtoNodeList (XMC_CAN_t *const obj, const uint8_t node_num, const uint8_t mo_num)
void | XMC_CAN_Disable (XMC_CAN_t *const obj)
void | XMC_CAN_Enable (XMC_CAN_t *const obj)
void | XMC_CAN_EventTrigger (XMC_CAN_t *const obj, const XMC_CAN_NODE_INTERRUPT_TRIGGER_t service_requestr)
void | XMC_CAN_FIFO_DisableForeingRemoteRequest (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_DisableRemoteMonitoring (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_DisableSingleDataTransfer (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_EnableForeignRemoteRequest (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_EnableRemoteMonitoring (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_EnableSingleDataTransfer (const XMC_CAN_MO_t *const can_mo)
uint8_t | XMC_CAN_FIFO_GetCurrentMO (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_SetSELMO (const XMC_CAN_MO_t *const can_mo, const uint8_t select_pointer)
void | XMC_CAN_GATEWAY_InitDesObject (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_GATEWAY_InitSourceObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_GATEWAY_CONFIG_t can_gateway)
void | XMC_CAN_Init (XMC_CAN_t *const obj, uint32_t can_frequency)
bool | XMC_CAN_IsPanelControlReady (XMC_CAN_t *const obj)
void | XMC_CAN_MO_AcceptOnlyMatchingIDE (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_AcceptStandardAndExtendedID (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_Config (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_DataLengthCode (const XMC_CAN_MO_t *const can_mo, const uint8_t data_length_code)
void | XMC_CAN_MO_DisableEvent (const XMC_CAN_MO_t *const can_mo, const uint32_t event)
void | XMC_CAN_MO_DisableSingleTransmitTrial (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_EnableEvent (const XMC_CAN_MO_t *const can_mo, const uint32_t event)
void | XMC_CAN_MO_EnableSingleTransmitTrial (const XMC_CAN_MO_t *const can_mo)
uint32_t | XMC_CAN_MO_GetAcceptanceMask (const XMC_CAN_MO_t *const can_mo)
uint8_t | XMC_CAN_MO_GetDataLengthCode (const XMC_CAN_MO_t *const can_mo)
uint32_t | XMC_CAN_MO_GetIdentifier (const XMC_CAN_MO_t *const can_mo)
uint32_t | XMC_CAN_MO_GetStatus (const XMC_CAN_MO_t *const can_mo)
XMC_CAN_STATUS_t | XMC_CAN_MO_Receive (XMC_CAN_MO_t *can_mo)
XMC_CAN_STATUS_t | XMC_CAN_MO_ReceiveData (XMC_CAN_MO_t *can_mo)
void | XMC_CAN_MO_ResetStatus (const XMC_CAN_MO_t *const can_mo, const uint32_t mask)
void | XMC_CAN_MO_SetAcceptanceMask (XMC_CAN_MO_t *const can_mo, const uint32_t can_id_mask)
void | XMC_CAN_MO_SetDataLengthCode (XMC_CAN_MO_t *const can_mo, const uint8_t data_length_code)
void | XMC_CAN_MO_SetEventNodePointer (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_MO_POINTER_EVENT_t can_mo_ptr_int, const uint32_t service_request)
void | XMC_CAN_MO_SetExtendedID (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_SetIdentifier (XMC_CAN_MO_t *const can_mo, const uint32_t can_identifier)
void | XMC_CAN_MO_SetStandardID (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_SetStatus (const XMC_CAN_MO_t *const can_mo, const uint32_t mask)
XMC_CAN_STATUS_t | XMC_CAN_MO_Transmit (const XMC_CAN_MO_t *const can_mo)
XMC_CAN_STATUS_t | XMC_CAN_MO_UpdateData (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_NODE_ClearStatus (XMC_CAN_NODE_t *const can_node, XMC_CAN_NODE_STATUS_t can_node_status)
void | XMC_CAN_NODE_Disable (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_DisableConfigurationChange (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_DisableEvent (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_EVENT_t event)
void | XMC_CAN_NODE_DisableLoopBack (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_Enable (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_EnableConfigurationChange (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_EnableEvent (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_EVENT_t event)
void | XMC_CAN_NODE_EnableLoopBack (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_EnableSuspend (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_FrameCounterConfigure (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_FRAME_COUNTER_t *const can_node_init)
uint16_t | XMC_CAN_NODE_GetCANFrameCounter (XMC_CAN_NODE_t *const can_node)
uint8_t | XMC_CAN_NODE_GetErrorWarningLevel (XMC_CAN_NODE_t *const can_node)
XMC_CAN_NODE_LAST_ERROR_DIR_t | XMC_CAN_NODE_GetLastErrTransferDir (XMC_CAN_NODE_t *const node)
XMC_CAN_NODE_LAST_ERROR_INC_t | XMC_CAN_NODE_GetLastErrTransferInc (XMC_CAN_NODE_t *const node)
uint8_t | XMC_CAN_NODE_GetReceiveErrorCounter (XMC_CAN_NODE_t *const can_node)
uint32_t | XMC_CAN_NODE_GetStatus (XMC_CAN_NODE_t *const can_node)
uint8_t | XMC_CAN_NODE_GetTransmitErrorCounter (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_NominalBitTimeConfigure (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t *const can_bit_time)
void | XMC_CAN_NODE_ReSetAnalyzerMode (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_ResetInitBit (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_SetAnalyzerMode (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_SetErrorWarningLevel (XMC_CAN_NODE_t *const can_node, uint8_t error_warning_level)
void | XMC_CAN_NODE_SetEventNodePointer (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_POINTER_EVENT_t ptr_event, const uint32_t service_request)
void | XMC_CAN_NODE_SetInitBit (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_SetReceiveErrorCounter (XMC_CAN_NODE_t *const can_node, uint8_t can_rec)
void | XMC_CAN_NODE_SetReceiveInput (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_RECEIVE_INPUT_t input)
void | XMC_CAN_NODE_SetTransmitErrorCounter (XMC_CAN_NODE_t *const can_node, uint8_t can_tec)
void | XMC_CAN_PanelControl (XMC_CAN_t *const obj, const XMC_CAN_PANCMD_t pancmd, const uint8_t arg1, const uint8_t arg2)
void | XMC_CAN_RXFIFO_ConfigMOBaseObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_FIFO_CONFIG_t can_fifo)
void | XMC_CAN_RXFIFO_ConfigMOSlaveObject (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_TXFIFO_ConfigMOBaseObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_FIFO_CONFIG_t can_fifo)
void | XMC_CAN_TXFIFO_ConfigMOSlaveObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_FIFO_CONFIG_t can_fifo)
XMC_CAN_STATUS_t | XMC_CAN_TXFIFO_Transmit (const XMC_CAN_MO_t *const can_mo)

Detailed Description

CAN driver provides transfer of CAN frames in accordance with CAN specificetion V2.0 B (active). Each CAN node can receive and transmit standard frames with 11-bit identifiers as well as extended frames with 29-bit identifiers. All CAN nodes share a common set of message objects. Each message object can be individually allocated to one of the CAN nodes. Besides serving as a storage container for incoming and outgoing frames, message objects can be combined to build gateways between the CAN nodes or to setup a FIFO buffer. The CAN module provides Analyzer mode,Loop-back mode and bit timming for node analysis.

The driver is divided into five sections:

CAN Global features:
  1. Allows to configure module frequency using function XMC_CAN_Init().
  2. Allows to configure Module interrupt using configuration structure XMC_CAN_NODE_INTERRUPT_TRIGGER_t and function XMC_CAN_EventTrigger().
CAN_NODE features:
  1. Allows to set baud rate by configuration structure XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t and Baudrate Configuration function XMC_CAN_NODE_NominalBitTimeConfigure().
  2. Allows to configure loop-back mode using fuction XMC_CAN_NODE_EnableLoopBack().
  3. Allows to configure CAN Node analyzer using function XMC_CAN_NODE_SetAnalyzerMode().
  4. Allows CAN node events enable/ disable by enum structure XMC_CAN_NODE_EVENT_t and functions XMC_CAN_NODE_EnableEvent() and XMC_CAN_NODE_DisableEvent().
  5. Provides bit timming analysis, configuration structure XMC_CAN_NODE_FRAME_COUNTER_t and function XMC_CAN_NODE_FrameCounterConfigure().
CAN_MO features:
  1. Allows message object initialization by configuration structure XMC_CAN_MO_t and function XMC_CAN_MO_Config().
  2. Allows transfer of message objects using functions XMC_CAN_MO_Transmit() and XMC_CAN_MO_Receive().
  3. Allows to configure Single Data Transfer and Single Transmit Trial using functions XMC_CAN_MO_EnableSingleTransmitTrial() and XMC_CAN_MO_EnableSingleTransmitTrial().
  4. Allows to configure MO events using function XMC_CAN_MO_EnableEvent().
CAN_FIFO features:
  1. Allows message object FIFO structure by configuration structure XMC_CAN_FIFO_CONFIG_t and functions XMC_CAN_TXFIFO_ConfigMOBaseObject() , XMC_CAN_RXFIFO_ConfigMOBaseObject() and XMC_CAN_TXFIFO_Transmit().
CAN_GATEWAY features:
  1. Provides Gateway mode, configuration structure XMC_CAN_GATEWAY_CONFIG_t and function XMC_CAN_GATEWAY_InitSourceObject().

Macro Definition Documentation

#define CAN_MO_MOIPR_Msk (0x7U)

Message Object event mask

#define CAN_NODE_NIPR_Msk (0x7UL)

Node event mask

#define XMC_CAN_MO_MOAR_STDID_Msk ((0x000007FFUL) << XMC_CAN_MO_MOAR_STDID_Pos)

Standard Identifier bitMask

#define XMC_CAN_MO_MOAR_STDID_Pos (18U)

Standard Identifier bitposition

Typedef Documentation

typedef CAN_NODE_TypeDef XMC_CAN_NODE_t

Defines Node Runtime structure.pointer to the Node CAN register

typedef CAN_GLOBAL_TypeDef XMC_CAN_t

Defines CAN Global Initialization structure

Enumeration Type Documentation

enum XMC_CAN_ARBITRATION_MODE_t

Defines arbitration mode for transmit acceptance filtering. Use type XMC_CAN_ARBITRATION_MODE_t for this enum.

Enumerator
XMC_CAN_ARBITRATION_MODE_ORDER_BASED_PRIO_1 | Transmit acceptance based in the order(prio)
XMC_CAN_ARBITRATION_MODE_IDE_DIR_BASED_PRIO_2 | Transmit acceptance filtering is based on the CAN identifier
XMC_CAN_ARBITRATION_MODE_ORDER_BASED_PRIO_3 | Transmit acceptance based in the order
enum XMC_CAN_CANCLKSRC_t

Defines the Clock source used for the MCAN peripheral.

Note
Only available for XMC1400, XMC4800 and XMC4700 series
enum XMC_CAN_DM_t

Defines the Divider Modes. Use type XMC_CAN_DM_t for this enum.

Enumerator
XMC_CAN_DM_NORMAL | Normal divider mode
XMC_CAN_DM_FRACTIONAL | Fractional divider mode
XMC_CAN_DM_OFF | Divider Mode in off-state
enum XMC_CAN_FRAME_COUNT_MODE_t

Defines the operation mode of the frame counter. Use type XMC_CAN_FRAME_COUNT_MODE_t for this enum.

Enumerator
XMC_CAN_FRAME_COUNT_MODE | Frame Count Mode
XMC_CAN_FRAME_COUNT_MODE_TIME_STAMP | The frame counter is incremented with the beginning of a new bit time
XMC_CAN_FRAME_COUNT_MODE_BIT_TIMING | Used for baud rate detection and analysis of the bit timing
enum XMC_CAN_FRAME_TYPE_t

Defines Data frame types. Use type XMC_CAN_FRAME_TYPE_t for this enum.

Enumerator
XMC_CAN_FRAME_TYPE_STANDARD_11BITS | Standard type identifier
XMC_CAN_FRAME_TYPE_EXTENDED_29BITS | Extended type identifier
enum XMC_CAN_LOOKBACKMODE_t

Defines loop Back Mode, to enable/disable an in-system test of the MultiCAN module . Use type XMC_CAN_LOOKBACKMODE_t for this enum.

Enumerator
XMC_CAN_LOOKBACKMODE_ENABLED | Each CAN node can be connected to the internal CAN bus
XMC_CAN_LOOKBACKMODE_DISABLED | Each CAN node can be connected to the external CAN bus
enum XMC_CAN_MO_EVENT_t

Defines mask value for CAN Message Object event type. Use type XMC_CAN_MO_EVENT_t for this enum.

Enumerator
XMC_CAN_MO_EVENT_TRANSMIT | Message Object transmit event
XMC_CAN_MO_EVENT_RECEIVE | Message Object receive event
XMC_CAN_MO_EVENT_OVERFLOW | Message Object overflow event
enum XMC_CAN_MO_POINTER_EVENT_t

Defines CAN Message Object event node pointer position. Use type XMC_CAN_MO_POINTER_EVENT_t for this enum.

Enumerator
XMC_CAN_MO_POINTER_EVENT_TRANSMIT | Transmit Event node pointer
XMC_CAN_MO_POINTER_EVENT_RECEIVE | Receive Event node pointer
enum XMC_CAN_MO_RESET_STATUS_t

Defines mask value for CAN Message Object reset status. Use type XMC_CAN_MO_RESET_STATUS_t for this enum.

Enumerator
XMC_CAN_MO_RESET_STATUS_RX_PENDING | Reset receive pending
XMC_CAN_MO_RESET_STATUS_TX_PENDING | Reset transmit pending
XMC_CAN_MO_RESET_STATUS_RX_UPDATING | Reset receive updating
XMC_CAN_MO_RESET_STATUS_NEW_DATA | Reset new data
XMC_CAN_MO_RESET_STATUS_MESSAGE_LOST | Reset message lost
XMC_CAN_MO_RESET_STATUS_MESSAGE_VALID | Reset message valid
XMC_CAN_MO_RESET_STATUS_RX_TX_SELECTED | Reset transmit/receive selected
XMC_CAN_MO_RESET_STATUS_RX_ENABLE | Reset receive enable
XMC_CAN_MO_RESET_STATUS_TX_REQUEST | Reset transmit request
XMC_CAN_MO_RESET_STATUS_TX_ENABLE0 | Reset transmit enable 0
XMC_CAN_MO_RESET_STATUS_TX_ENABLE1 | Reset transmit enable 1
XMC_CAN_MO_RESET_STATUS_MESSAGE_DIRECTION | Reset message direction
enum XMC_CAN_MO_SET_STATUS_t

Defines mask value for CAN Message Object set status. Use type XMC_CAN_MO_SET_STATUS_t for this enum.

Enumerator
XMC_CAN_MO_SET_STATUS_RX_PENDING | Set receive pending
XMC_CAN_MO_SET_STATUS_TX_PENDING | Set transmit pending
XMC_CAN_MO_SET_STATUS_RX_UPDATING | Set receive updating
XMC_CAN_MO_SET_STATUS_NEW_DATA | Set new data
XMC_CAN_MO_SET_STATUS_MESSAGE_LOST | Set message lost
XMC_CAN_MO_SET_STATUS_MESSAGE_VALID | Set message valid
XMC_CAN_MO_SET_STATUS_RX_TX_SELECTED | Set transmit/receive selected
XMC_CAN_MO_SET_STATUS_RX_ENABLE | Set receive enable
XMC_CAN_MO_SET_STATUS_TX_REQUEST | Set transmit request
XMC_CAN_MO_SET_STATUS_TX_ENABLE0 | Set transmit enable 0
XMC_CAN_MO_SET_STATUS_TX_ENABLE1 | Set transmit enable 1
XMC_CAN_MO_SET_STATUS_MESSAGE_DIRECTION | Set message direction
enum XMC_CAN_MO_STATUS_t

Defines mask value for CAN Message Object status. Use type XMC_CAN_MO_STATUS_t for this enum.

Enumerator
XMC_CAN_MO_STATUS_RX_PENDING | Defines message has been successfully received or not received
XMC_CAN_MO_STATUS_TX_PENDING | Defines message has been successfully transmitted or not transmitted
XMC_CAN_MO_STATUS_RX_UPDATING | Defines Message identifier, DLC, and data of the message object are currently updated or not updated
XMC_CAN_MO_STATUS_NEW_DATA | Defines no update of the message object since last flag reset or Message object has been updated
XMC_CAN_MO_STATUS_MESSAGE_LOST | CAN message is lost because NEWDAT has become set again when it has already been set or No CAN message is lost
XMC_CAN_MO_STATUS_MESSAGE_VALID | Message valid
XMC_CAN_MO_STATUS_RX_TX_SELECTED | Transmit/Receive selected
XMC_CAN_MO_STATUS_RX_ENABLE | Receive enable
XMC_CAN_MO_STATUS_TX_REQUEST | Transmit request
XMC_CAN_MO_STATUS_TX_ENABLE0 | Transmit enable 0
XMC_CAN_MO_STATUS_TX_ENABLE1 | Transmit enable 1
XMC_CAN_MO_STATUS_MESSAGE_DIRECTION | Message direction
XMC_CAN_MO_STATUS_LIST | List allocation
XMC_CAN_MO_STATUS_POINTER_TO_PREVIOUS_MO | Pointer to previous Message Object
XMC_CAN_MO_STATUS_POINTER_TO_NEXT_MO | Pointer to next Message Object
enum XMC_CAN_MO_TYPE_t

Defines Message Object direction. Use type XMC_CAN_MO_TYPE_t for this enum.

Enumerator
XMC_CAN_MO_TYPE_RECMSGOBJ | Receive Message Object selected
XMC_CAN_MO_TYPE_TRANSMSGOBJ | Transmit Message Object selected
enum XMC_CAN_NODE_CONTROL_t

Defines mask value for CAN Node control like initialization, node disable and analyzer mode . Use type XMC_CAN_NODE_CONTROL_t for this enum.

Enumerator
XMC_CAN_NODE_CONTROL_NODE_INIT | Node initialization
XMC_CAN_NODE_CONTROL_TX_INT_ENABLE | Transfer event enable
XMC_CAN_NODE_CONTROL_LEC_INT_ENABLE | LEC Indicated Error Event Enable
XMC_CAN_NODE_CONTROL_ALERT_INT_ENABLE | Alert Event Enable
XMC_CAN_NODE_CONTROL_CAN_DISABLE | CAN disable
XMC_CAN_NODE_CONTROL_CONF_CHANGE_ENABLE | Configuration change enable
XMC_CAN_NODE_CONTROL_CAN_ANALYZER_NODEDE | CAN Analyzer mode
XMC_CAN_NODE_CONTROL_SUSPENDED_ENABLE | Suspend Enable
enum XMC_CAN_NODE_EVENT_t

Defines mask value for CAN Node events. Use type XMC_CAN_NODE_EVENT_t for this enum.

Enumerator
XMC_CAN_NODE_EVENT_TX_INT | Node Transfer OK Event
XMC_CAN_NODE_EVENT_ALERT | Node Alert Event
XMC_CAN_NODE_EVENT_LEC | Last Error code Event
XMC_CAN_NODE_EVENT_CFCIE | CAN Frame Count Event
enum XMC_CAN_NODE_INTERRUPT_TRIGGER_t

Defines interrupt request on interrupt output line INT_O[n]. Use type XMC_CAN_NODE_INTERRUPT_TRIGGER_t for this enum.

enum XMC_CAN_NODE_LAST_ERROR_DIR_t

Defines last error transfer direction. Use type XMC_CAN_NODE_LAST_ERROR_DIR_t for this enum.

Enumerator
XMC_CAN_NODE_LAST_ERROR_DIR_WHILE_NODE_RECEPCION | The last error occurred while the CAN node x was receiver
XMC_CAN_NODE_LAST_ERROR_DIR_WHILE_NODE_TRANSMISSION | The last error occurred while the CAN node x was transmitter
enum XMC_CAN_NODE_LAST_ERROR_INC_t

Defines last error increment. Use type XMC_CAN_NODE_LAST_ERROR_INC_t for this enum.

Enumerator
XMC_CAN_NODE_LAST_ERROR_INC_1 | The last error led to an error counter increment of 1.
XMC_CAN_NODE_LAST_ERROR_INC_8 | The last error led to an error counter increment of 8.
enum XMC_CAN_NODE_POINTER_EVENT_t

Defines mask value for CAN node pointer events position. Use type XMC_CAN_NODE_POINTER_EVENT_t for this enum.

Enumerator
XMC_CAN_NODE_POINTER_EVENT_ALERT | Node Alert Event node pointer
XMC_CAN_NODE_POINTER_EVENT_LEC | Last Error code Event node pointer
XMC_CAN_NODE_POINTER_EVENT_TRANSFER_OK | Transmit Event node pointer
XMC_CAN_NODE_POINTER_EVENT_FRAME_COUNTER | CAN Frame Count Event node pointer
enum XMC_CAN_NODE_RECEIVE_INPUT_t

Defines the possible receive inputs. Use type XMC_CAN_NODE_RECEIVE_INPUT_t for this enum.

Enumerator
XMC_CAN_NODE_RECEIVE_INPUT_RXDCA | CAN Receive Input A
XMC_CAN_NODE_RECEIVE_INPUT_RXDCB | CAN Receive Input B
XMC_CAN_NODE_RECEIVE_INPUT_RXDCC | CAN Receive Input C
XMC_CAN_NODE_RECEIVE_INPUT_RXDCD | CAN Receive Input D
XMC_CAN_NODE_RECEIVE_INPUT_RXDCE | CAN Receive Input E
XMC_CAN_NODE_RECEIVE_INPUT_RXDCF | CAN Receive Input F
XMC_CAN_NODE_RECEIVE_INPUT_RXDCG | CAN Receive Input G
XMC_CAN_NODE_RECEIVE_INPUT_RXDCH | CAN Receive Input H
enum XMC_CAN_NODE_STATUS_t

Defines mask value for CAN Node status. Use type XMC_CAN_NODE_STATUS_t for this enum.

Enumerator
XMC_CAN_NODE_STATUS_LAST_ERROR_CODE | Last Error Code
XMC_CAN_NODE_STATUS_TX_OK | Message transmitted successfully
XMC_CAN_NODE_STATUS_RX_OK | Message received successfully
XMC_CAN_NODE_STATUS_ALERT_WARNING | Alert warning
XMC_CAN_NODE_STATUS_ERROR_WARNING_STATUS | Error warning status
XMC_CAN_NODE_STATUS_BUS_OFF | Bus-off status
XMC_CAN_NODE_STATUS_LIST_LENGTH_ERROR | List length error
XMC_CAN_NODE_STATUS_LIST_OBJECT_ERROR | List object error
XMC_CAN_NODE_STATUS_SUSPENDED_ACK | Suspend Acknowledge
enum XMC_CAN_PANCMD_t

Defines CAN module Panel Commands . Use type XMC_CAN_PANCMD_t for this enum.

Enumerator
XMC_CAN_PANCMD_INIT_LIST | Command to initialize a list
XMC_CAN_PANCMD_STATIC_ALLOCATE | Command to activate static allocation
XMC_CAN_PANCMD_DYNAMIC_ALLOCATE | Command to activate dynamic allocation
XMC_CAN_PANCMD_STATIC_INSERT_BEFORE | Remove a message object from the list and insert it before a given object.
XMC_CAN_PANCMD_DYNAMIC_INSERT_BEFORE | Command to activate dynamic allocation
XMC_CAN_PANCMD_STATIC_INSERT_BEHIND | Command to activate dynamic allocation
XMC_CAN_PANCMD_DYNAMIC_INSERT_BEHIND | Command to activate dynamic allocation
enum XMC_CAN_STATUS_t

Defines the status of CAN, to verify the CAN related API calls. Use type XMC_CAN_STATUS_t for this enum.

Enumerator
XMC_CAN_STATUS_SUCCESS | Driver accepted application request
XMC_CAN_STATUS_ERROR | Returned when unknown error occurred
XMC_CAN_STATUS_BUSY | Driver is busy and can not handle request
XMC_CAN_STATUS_MO_NOT_ACCEPTABLE | Message object type not allowed
XMC_CAN_STATUS_MO_DISABLED | Returned if Message object is disabled

Function Documentation

void XMC_CAN_AllocateMOtoNodeList | ( | XMC_CAN_t *const | obj,
 |  | const uint8_t | node_num,
 |  | const uint8_t | mo_num
 | ) |  |
Parameters
obj | Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
node_num | CAN node number,Range : 0-2
mo_num | CAN Message Object number,Range : 0-63
Returns
None
Description:
Allocates Message Object from free list to node list. Each node_num is linked to one unique list of message objects. A CAN node performs message transfer only with the mo_num message objects that are allocated to the list of the CAN node. It configures PANCTR register.
Related APIs:
None
void XMC_CAN_Disable ( XMC_CAN_t *const obj )
Parameters
obj Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
Returns
None
Description:
Disables CAN module. In disabled state, no registers of CAN module can be read or written except the CAN_CLC register.
Related APIs:
XMC_CAN_Enable()

void XMC_CAN_Enable ( XMC_CAN_t *const obj )
Parameters
obj Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
Returns
None
Description:
Enables CAN module and initializes all CAN registers to reset values. It is required to re-configure desired CAN nodes, before any data transfer. It configures CAN_CLC.DISR bit.
Related APIs:
XMC_CAN_Disable()

void XMC_CAN_EventTrigger | ( | XMC_CAN_t *const | obj,
 |  | const XMC_CAN_NODE_INTERRUPT_TRIGGER_t | service_requestr
 | ) |  |
Parameters
obj | Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
service_requestr | Interrupt trigger number selection. Refer XMC_CAN_NODE_INTERRUPT_TRIGGER_t for valid values. Multiple interrupt trigger events can be ORed.
Returns
None
Description:
Configures multiple interrupt requests with a single write operation. service_requestr represents single interrupt request or multiple.It configures MITR register.
Related APIs:
None
void XMC_CAN_FIFO_DisableForeingRemoteRequest ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configuration allows to disable the FIFO Foreign Remote Request. TXRQ of message object n is set on reception of a matching Remote Frame. It configures MOFCR.FRREN register.
Related API's:
XMC_CAN_FIFO_EnableForeignRemoteRequest()

void XMC_CAN_FIFO_DisableRemoteMonitoring ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configuration allows to disable the FIFO Remote Monitoring. This Specifies Identifier, Identifier Extension bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. It configures MOFCR.RMM bit.
Related API's:
XMC_CAN_FIFO_EnableRemoteMonitoring()

Note:
Remote monitoring(RMM) applies only to transmit objects and has no effect on receive objects.
void XMC_CAN_FIFO_DisableSingleDataTransfer ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configuration allows to disable the Single Data Transfer of the FIFO Message Object, with this configuration bit MSGVAL is not affected. It configures MOFCR.SDT bit.
Related API's:
XMC_CAN_FIFO_EnableSingleDataTransfer()
void XMC_CAN_FIFO_EnableForeignRemoteRequest ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configuration allows to enable the FIFO Foreign Remote Request. This Specifies TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. It configures MOFCR.FRREN register.
Related API's:
XMC_CAN_FIFO_DisableForeingRemoteRequest()

void XMC_CAN_FIFO_EnableRemoteMonitoring ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configuration allows to enable the FIFO Remote Monitoring. This Specifies identifier, IDE(Identifier Extension) bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. It configures MOFCR.RMM bit.
Related API's:
XMC_CAN_FIFO_DisableRemoteMonitoring()

Note:
Remote monitoring(RMM) applies only to transmit objects and has no effect on receive objects.
void XMC_CAN_FIFO_EnableSingleDataTransfer ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configuration allows to enable the Single Data Transfer of the FIFO Message Object. If SDT = 1 and message object n is not a FIFO base object, then MSGVAL is reset when this object has taken part in a successful data transfer (receive or transmit). If SDT = 1 and message object n is a FIFO base object, then MSGVAL is reset when the pointer to the current object CUR reaches the value of SEL in the FIFO/Gateway Pointer Register. It configures MOFCR.SDT bit.
Related API's:
XMC_CAN_FIFO_DisableSingleDataTransfer()
uint8_t XMC_CAN_FIFO_GetCurrentMO ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
uint8_t Current Message Object Number. Range:0-63
Description:
Returns the current FIFO Message Object,points to the actual target object within a FIFO/Gateway structure.
Related API's:
None
void XMC_CAN_FIFO_SetSELMO | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const uint8_t | select_pointer
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
select_pointer | Selected Message Object number. Range:0-63
Returns
None
Description:
Set Object Select Pointer. If the current pointer CUR of FIFO base object becomes equal select_pointer, a FIFO overflow interrupt request is generated. Used for FIFO monitoring purpose.
Related API's:
None
void XMC_CAN_GATEWAY_InitDesObject ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configures the Gateway destination object. The Gateway Mode can_gateway makes it possible to establish an automatic information transfer between two independent CAN buses without CPU interaction. Please refer reference manual GatewayMode for more info.
Related API's:
None
void XMC_CAN_GATEWAY_InitSourceObject | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const XMC_CAN_GATEWAY_CONFIG_t | can_gateway
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_gateway | CAN gateway configuration data structure. Refer XMC_CAN_GATEWAY_CONFIG_t data structure for details.
Returns
None
Description:
Configures the Gateway source object. The Gateway Mode can_gateway makes it possible to establish an automatic information transfer between two independent CAN buses without CPU interaction. Please refer reference manual GatewayMode for more info.
Related API's:
None
void XMC_CAN_Init | ( | XMC_CAN_t *const | obj,
 |  | uint32_t | can_frequency
 | ) |  |
Parameters
obj | Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
can_frequency | CAN module frequency(fCAN). Range : 5MHz to 120MHz
Returns
None
Description:
Configures clock rate of the module timer clock fCAN. Altering CAN module can_frequency shall affects baud rate, call XMC_CAN_NODE_NominalBitTimeConfigure() to configure baud rate for current CAN frequency.It configures FDR register.
Related APIs:
XMC_CAN_NODE_NominalBitTimeConfigure()

bool XMC_CAN_IsPanelControlReady ( XMC_CAN_t *const obj )
Parameters
obj Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
Returns
Ready status of list controller
Description:
Returns ready status of the list controller
Related APIs:
XMC_CAN_PanelControl()
void XMC_CAN_MO_AcceptOnlyMatchingIDE ( XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Message object receives frames only with matching IDE bit.
Related API's:
XMC_CAN_MO_AcceptStandardAndExtendedID()
void XMC_CAN_MO_AcceptStandardAndExtendedID ( XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Message object accepts the reception of both, standard and extended frames.
Related API's:
XMC_CAN_MO_AcceptOnlyMatchingIDE()
void XMC_CAN_MO_Config ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Initializes CAN message object. Initialization includes configuring Message Object identifier type, Message Object identifier value, Message Object type, and transfer requests. It configures FDR register.
Related APIs:
None
void XMC_CAN_MO_DataLengthCode | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const uint8_t | data_length_code
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
data_length_code | transfer data length. Range:0-8
Returns
None
Description:
Configures CAN Message Object Data Length Code. It configures MOFCR register.
Related API's:
None
void XMC_CAN_MO_DisableEvent | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const uint32_t | event
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
event | CAN node Message Object event selection. Refer XMC_CAN_MO_EVENT_t for details.
Returns
None
Description:
Disable CAN Message Object events. event can be ORed multiple Message Object events. It configures MOFCR register.
Related API's:
XMC_CAN_MO_EnableEvent()
void XMC_CAN_MO_DisableSingleTransmitTrial ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Disable the single transmit trial(STT). In STT,TXRQ is cleared on transmission start of message object n. Thus, no transmission retry is performed in case of transmission failure. It configures MOFCR.STT bit.
Related API's:
XMC_CAN_MO_EnableSingleTransmitTrial()
void XMC_CAN_MO_EnableEvent | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const uint32_t | event
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
event | CAN node Message Object event selection. Refer XMC_CAN_MO_EVENT_t for details.
Returns
None
Description:
Enable CAN Message Object events. event can be ORed multiple Message Object events. It configures MOFCR register.
Related API's:
XMC_CAN_MO_DisableEvent()
void XMC_CAN_MO_EnableSingleTransmitTrial ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Enable the single transmit trial(STT). In STT,TXRQ is cleared on transmission start of message object n. Thus, no transmission retry is performed in case of transmission failure. It configures MOFCR.STT bit.
Related API's:
XMC_CAN_MO_DisableSingleTransmitTrial()
uint32_t XMC_CAN_MO_GetAcceptanceMask ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
Acceptance mask
Description:
Gets the acceptance mask for the CAN MO.
Related API's:
XMC_CAN_MO_SetAcceptanceMask()
uint8_t XMC_CAN_MO_GetDataLengthCode ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
Data length code
Description:
Gets the Data Length Code.
Related API's:
XMC_CAN_MO_SetDataLengthCode()
uint32_t XMC_CAN_MO_GetIdentifier ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
CAN MO identifier
Description:
Gets the Identifier of the MO
Related API's:
XMC_CAN_MO_SetIdentifier()
uint32_t XMC_CAN_MO_GetStatus ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
uint32_t Current Message Object status.
Description:
Returns Message Object status, that indicates message object transfer status and message object list status information such as the number of the current message object predecessor and successor message object, as well as the list number to which the message object is assigned.
Related API's:
None
XMC_CAN_STATUS_t XMC_CAN_MO_Receive ( XMC_CAN_MO_t * can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
XMC_CAN_STATUS_t CAN Node status. Refer XMC_CAN_STATUS_t structure for details.
Description:
Reads the Message Object data bytes, into message pointer passed as input parameter can_mo. can_data[0] of can_mo holds lower 4 bytes, can_data[1] of can_mo holds higher 4 bytes.
Related API's:
None
XMC_CAN_STATUS_t XMC_CAN_MO_ReceiveData ( XMC_CAN_MO_t * can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
XMC_CAN_STATUS_t CAN Node status. Refer XMC_CAN_STATUS_t structure for details.
Description:
Reads the Message Object data bytes, into message pointer passed as input parameter can_mo. can_data[0] of can_mo holds lower 4 bytes, can_data[1] of can_mo holds higher 4 bytes.
Related API's:
None
void XMC_CAN_MO_ResetStatus | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const uint32_t | mask
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
mask | Message Object set status selection. Refer XMC_CAN_MO_RESET_STATUS_t for details. Multiple enums can be ORed.
Returns
None
Description:
Clears Message Object interrupt events. It configures MOCTR register.
Related API's:
None
void XMC_CAN_MO_SetAcceptanceMask | ( | XMC_CAN_MO_t *const | can_mo,
 |  | const uint32_t | can_id_mask
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_id_mask | CAN MO acceptance mask.
Returns
None
Description:
Sets the acceptance mask of the MO
Related API's:
XMC_CAN_MO_GetAcceptanceMask()
void XMC_CAN_MO_SetDataLengthCode | ( | XMC_CAN_MO_t *const | can_mo,
 |  | const uint8_t | data_length_code
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
data_length_code | transfer data length. Range:0-8
Returns
None
Description:
Configures CAN Message Object Data Length Code. It configures MOFCR register.
Related API's:
XMC_CAN_MO_GetDataLengthCode()
void XMC_CAN_MO_SetEventNodePointer | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const XMC_CAN_MO_POINTER_EVENT_t | can_mo_ptr_int,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_mo_ptr_int | Message Object event node pointer selection. Refer XMC_CAN_MO_POINTER_EVENT_t structure for valid values.
service_request | interrupt output line of multiCAN module.
Returns
None
Description:
Configures Message Object event node pointer with service_request number. It configures MOIPR register.
Related API's:
None

< Message Object event mask

void XMC_CAN_MO_SetExtendedID ( XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Message object handles extended frames with 29-bit identifier.
Related API's:
XMC_CAN_MO_SetStandardID()
Note:
After setting the identifier type user has to set the identifier value by using XMC_CAN_MO_SetIdentifier() API.
void XMC_CAN_MO_SetIdentifier | ( | XMC_CAN_MO_t *const | can_mo,
 |  | const uint32_t | can_identifier
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_identifier | Identifier.
Returns
None
Description:
Configures CAN Message Object Identifier. It configures MOAR register.
Related API's:
XMC_CAN_MO_GetIdentifier()
void XMC_CAN_MO_SetStandardID ( XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Message object handles standard frames with 11-bit identifier.
Related API's:
XMC_CAN_MO_SetExtendedID()
Note:
After setting the identifier type user has to set the identifier value by using XMC_CAN_MO_SetIdentifier() API.
void XMC_CAN_MO_SetStatus | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const uint32_t | mask
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
mask | Message Object set status selection. Refer XMC_CAN_MO_SET_STATUS_t for details. Multiple enums can be ORed.
Returns
None
Description:
Configures Message Object set Status. It configures MOCTR register.
Related API's:
XMC_CAN_MO_ResetStatus()

XMC_CAN_STATUS_t XMC_CAN_MO_Transmit ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
XMC_CAN_STATUS_t CAN Node status. Refer XMC_CAN_STATUS_t structure for details.
Description:
Configures transmit request for sending data frame. It configures MOCTR register. Data shall be updated using XMC_CAN_MO_UpdateData() before calling this API.
Related API's:
XMC_CAN_MO_UpdateData()

XMC_CAN_STATUS_t XMC_CAN_MO_UpdateData ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
XMC_CAN_STATUS_t CAN Node status. Refer XMC_CAN_STATUS_t structure for details.
None
Description:
Configures Data to be transmitted and data length code.
Related API's:
XMC_CAN_MO_Config()

void XMC_CAN_NODE_ClearStatus | ( | XMC_CAN_NODE_t *const | can_node,
 |  | XMC_CAN_NODE_STATUS_t | can_node_status
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
can_node_status | Status to clear.Refer XMC_CAN_NODE_STATUS_t for valid values.
Returns
None
Description:
Clear errors status as well as successfully transferred CAN frames status.
Related APIs:
XMC_CAN_NODE_GetStatus()
void XMC_CAN_NODE_Disable ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Disable the CAN node, terminates participation in CAN traffic. It configures NCR.CANDIS bit.
Related API's:
None
void XMC_CAN_NODE_DisableConfigurationChange ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Forbid to change the configuration of the CAN node. It configures NCRx.CCE bit.
Related API's:
XMC_CAN_NODE_EnableConfigurationChange()
void XMC_CAN_NODE_DisableEvent | ( | XMC_CAN_NODE_t *const | can_node,
 |  | const XMC_CAN_NODE_EVENT_t | event
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
event | CAN node event mask value. Refer XMC_CAN_NODE_EVENT_t structure for valid values. multiple events can be ORed.
Returns
None
Description:
Disable CAN Node events. It configures NFCR register.
Related APIs:
XMC_CAN_NODE_EnableEvent()
void XMC_CAN_NODE_DisableLoopBack ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Disable Node Loop-Back Mode, disables internal (virtual) loop-back CAN bus. This API Configures NPCRx register. Call XMC_CAN_NODE_EnableConfigurationChange() API before NPCRx configuration, same way XMC_CAN_NODE_DisableConfigurationChange() API after NPCRx configuration.
Related APIs:]
XMC_CAN_NODE_EnableLoopBack()
Note:
NPCRx can be written only if bit NCRx.CCE is set.
void XMC_CAN_NODE_Enable ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Enable the CAN node, starts the participation in CAN traffic. It configures NCR.CANDIS and the NCR.INIT bits.
Related API's:
None
void XMC_CAN_NODE_EnableConfigurationChange ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Allow to change the configuration of the CAN node, like bit timing, CAN bus transmit/receive ports and error counters read. It configures NCRx.CCE bit.
Related APIs:
XMC_CAN_NODE_DisableConfigurationChange()
void XMC_CAN_NODE_EnableEvent | ( | XMC_CAN_NODE_t *const | can_node,
 |  | const XMC_CAN_NODE_EVENT_t | event
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
event | CAN node event mask value. Refer XMC_CAN_NODE_EVENT_t structure for valid values. multiple events can be ORed.
Returns
None
Description:
Enable CAN Node events. It configures NFCR register.
Related APIs:
XMC_CAN_NODE_DisableEvent()
void XMC_CAN_NODE_EnableLoopBack ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Enable Node can_node in Loop-Back Mode. A Node is connected to an internal (virtual) loop-back CAN bus. All CAN nodes which are in Loop- Back Mode are connected to this virtual CAN bus so that they can communicate with each other internally. The external transmit line is forced recessive in Loop-Back Mode. This API Configures NPCRx register. call XMC_CAN_NODE_EnableConfigurationChange() API before NPCRx configuration, same way XMC_CAN_NODE_DisableConfigurationChange() API after NPCRx configuration configuration.
Related APIs:]
XMC_CAN_NODE_DisableLoopBack().
Note:
NPCRx can be written only if bit NCRx.CCE is set.
void XMC_CAN_NODE_EnableSuspend ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Trigger the suspension of the CAN node. An OCDS(on chip debug support) suspend trigger disables the CAN node: As soon as the CAN node becomes bus-idle or bus-off, bit INIT is internally forced to 1 to disable the CAN node. The actual value of bit INIT remains unchanged. It configures NCR.SUSEN bit
Related API's:
None
Note:
Bit SUSEN is reset via OCDS(on chip debug support) Reset.
void XMC_CAN_NODE_FrameCounterConfigure | ( | XMC_CAN_NODE_t *const | can_node,
 |  | const XMC_CAN_NODE_FRAME_COUNTER_t *const | can_node_init
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
can_node_init | frame counter mode selection. Refer XMC_CAN_NODE_FRAME_COUNTER_t for valid values.
Returns
None
Description:
Configures frame counter functions. Each CAN can_node is equipped with a frame counter that counts transmitted/received CAN frames or obtains information about the time when a frame has been started to transmit or be received by the CAN node. It configures NFCR register.
Related API's:
None
uint16_t XMC_CAN_NODE_GetCANFrameCounter ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
uint16_t current value of the CAN frame counter. Range :0-65535
Description:
Returns the frame counter value can_node of the CAN node. In Frame Count Mode (CFMOD = 00B), this API returns the frame count value. In Time Stamp Mode (CFMOD = 01B), this API returns the captured bit time count value, captured with the start of a new frame. In all Bit Timing Analysis Modes (CFMOD = 10B), this API always returns the number of fCLC clock cycles (measurement result) minus 1.
Related API's:
None
uint8_t XMC_CAN_NODE_GetErrorWarningLevel ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
uint8_t Error Warning Level. Range :0 - 255
Description:
Returns error warning level. This determines the threshold value (warning level, default 96) to be reached in order to set the corresponding error warning bit EWRN. It reads NECNT register.
Related APIs:
XMC_CAN_NODE_SetErrorWarningLevel()

XMC_CAN_NODE_LAST_ERROR_DIR_t XMC_CAN_NODE_GetLastErrTransferDir ( XMC_CAN_NODE_t *const node )
Parameters
node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
XMC_CAN_NODE_LAST_ERROR_DIR_t Last error transfer direction. Refer XMC_CAN_NODE_LAST_ERROR_DIR_t.
Description:
Returns NODE Last Error occurred during Transmit/receive direction. It returns value of NFCR register.
Related APIs:
XMC_CAN_NODE_GetLastErrTransferInc()

XMC_CAN_NODE_LAST_ERROR_INC_t XMC_CAN_NODE_GetLastErrTransferInc ( XMC_CAN_NODE_t *const node )
Parameters
node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
XMC_CAN_NODE_LAST_ERROR_INC_t Last error transfer increment. Refer XMC_CAN_NODE_LAST_ERROR_INC_t.
Description:
Returns NODE Last Error Transfer Increment. It returns value of NFCR register.
Related APIs:
XMC_CAN_NODE_GetLastErrTransferDir()

uint8_t XMC_CAN_NODE_GetReceiveErrorCounter ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
uint8_t receive error counter value.
Description:
Returns Receive Error Counter value. It reads NECNT register.
Related APIs:
XMC_CAN_NODE_SetReceiveErrorCounter()
uint32_t XMC_CAN_NODE_GetStatus ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
uint32_t Current status of the node.
Description:
Returns errors status as well as successfully transferred CAN frames status.
Related APIs:
XMC_CAN_NODE_ClearStatus()
uint8_t XMC_CAN_NODE_GetTransmitErrorCounter ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
uint8_t transmit error counter value. Range :0 - 255
Description:
Returns Transmit Error Counter value. If the Bitstream Processor detects an error while a transmit operation is running, the Transmit Error Counter is incremented by 8. An increment of 1 is used when the error condition was reported by an external CAN node via an Error Frame generation. It reads NECNT register.
Related APIs:
XMC_CAN_NODE_SetTransmitErrorCounter()
Note:
NECNTx can be written only if bit NCRx.CCE is set.
void XMC_CAN_NODE_NominalBitTimeConfigure | ( | XMC_CAN_NODE_t *const | can_node,
 |  | const XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t *const | can_bit_time
 | ) |  |
Parameters
can_node | Pointer pointing to CAN_NODE Structure. Defines CAN_NODE registers. Range :CAN_NODE0-CAN_NODE2
can_bit_time | Nominal bit time configuration data structure. Refer XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t for details.
Returns
None
Description:
Configures CAN node Baudrate. can_bit_time specifies required baudrate for a specified can_node. It configures NBTR register.
Related APIs:
None
void XMC_CAN_NODE_ReSetAnalyzerMode ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Reset the Analyzer mode. CAN node is no more in Analyzer Mode. Please refer XMC_CAN_NODE_SetAnalyzerMode(). It configures NCR.CALM bit. XMC_CAN_NODE_SetInitBit() should be called before set / reset AnalyzerMode.
Related API's:
XMC_CAN_NODE_SetAnalyzerMode()
void XMC_CAN_NODE_ResetInitBit ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Enable CAN node participation in CAN traffic. Bit INIT is automatically set when the CAN node enters the bus-off state. It configures NCR.INIT bit.
Related API's:
XMC_CAN_NODE_SetInitBit()
void XMC_CAN_NODE_SetAnalyzerMode ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Configure CAN node in Analyzer Mode. This means that messages may be received, but not transmitted. No acknowledge is sent on the CAN bus upon frame reception. Active-error flags are sent recessive instead of dominant. The transmit line is continuously held at recessive (1) level. XMC_CAN_NODE_SetInitBit() should be called before set / reset AnalyzerMode. It configures NCR.CALM bit.
Related API's:
XMC_CAN_NODE_ReSetAnalyzerMode()
void XMC_CAN_NODE_SetErrorWarningLevel | ( | XMC_CAN_NODE_t *const | can_node,
 |  | uint8_t | error_warning_level
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
error_warning_level | Error Warning level value. Range :0-255.
Returns
None
Description:
Configures error warning level in order to set the corresponding error warning bit EWRN. It configures error_warning_level into NECNT register. Before this configuration call XMC_CAN_NODE_EnableConfigurationChange() API.
Related APIs:
XMC_CAN_NODE_GetErrorWarningLevel()

Note:
NECNTx can be written only if bit NCRx.CCE is set.
void XMC_CAN_NODE_SetEventNodePointer | ( | XMC_CAN_NODE_t *const | can_node,
 |  | const XMC_CAN_NODE_POINTER_EVENT_t | ptr_event,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
can_node | Pointer pointing to CAN_NODE Structure. Defines CAN_NODE registers.
ptr_event | CAN_NODE interrupt pointer position. Refer XMC_CAN_NODE_POINTER_EVENT_t structure for valid values.
service_request | Interrupt service request number. Range : 0-7
Returns
None
Description:
Configures node interrupt pointer service_request for CAN Node events ptr_event. It configures NIPR register.
Related APIs:
None

< Node event mask

void XMC_CAN_NODE_SetInitBit ( XMC_CAN_NODE_t *const can_node )
Parameters
can_node Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
Returns
None
Description:
Disable CAN node participation in CAN traffic. Bit INIT is automatically set when the CAN node enters the bus-off state. It configures NCR.INIT bit.
Related API's:
XMC_CAN_NODE_ResetInitBit()
void XMC_CAN_NODE_SetReceiveErrorCounter | ( | XMC_CAN_NODE_t *const | can_node,
 |  | uint8_t | can_rec
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
can_rec | receive error counter value. Range :0-255
Returns
None
Description:
Configures Receive Error Counter. It configures can_rec into NECNT register. Before this configuration call XMC_CAN_NODE_EnableConfigurationChange() API.
Related APIs:
XMC_CAN_NODE_GetReceiveErrorCounter()

Note:
NECNTx can be written only if bit NCRx.CCE is set.
void XMC_CAN_NODE_SetReceiveInput | ( | XMC_CAN_NODE_t *const | can_node,
 |  | const XMC_CAN_NODE_RECEIVE_INPUT_t | input
 | ) |  |
Parameters
can_node | Pointer pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
input | CAN receive input selection. Refer XMC_CAN_NODE_RECEIVE_INPUT_t for details.
Returns
None
Description:
input specifies CAN input receive pin. This API Configures NPCRx register,it is required to call XMC_CAN_NODE_EnableConfigurationChange(), before configuring NPCRx register, call XMC_CAN_NODE_DisableConfigurationChange() API after configuring NPCRx register. CAN input receive pins which falls under analog port pins should call XMC_GPIO_EnableDigitalInput(),to enable digital pad.
Related APIs:
None
Note:
NPCRx can be written only if bit NCRx.CCE is set.
void XMC_CAN_NODE_SetTransmitErrorCounter | ( | XMC_CAN_NODE_t *const | can_node,
 |  | uint8_t | can_tec
 | ) |  |
Parameters
can_node | Pointer Pointing to CAN_NODE Structure. Defines CAN_NODE registers, Range :CAN_NODE0-CAN_NODE2.
can_tec | transmit error counter value. Range :0-255
Returns
None
Description:
Configures Transmit error counter. It configures can_tec into NECNT register. Before this configuration call XMC_CAN_NODE_EnableConfigurationChange() API.
Related APIs:
XMC_CAN_NODE_GetTransmitErrorCounter()

Note:
NECNTx can be written only if bit NCRx.CCE is set.
void XMC_CAN_PanelControl | ( | XMC_CAN_t *const | obj,
 |  | const XMC_CAN_PANCMD_t | pancmd,
 |  | const uint8_t | arg1,
 |  | const uint8_t | arg2
 | ) |  |
Parameters
obj | Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef for details.
pancmd | panal command selection. Refer XMC_CAN_PANCMD_t for valid values.
arg1 | Panel Argument 1,Range : 0-2
arg2 | Panel Argument 2, Range : 0-63
Returns
None
Description:
Configures the panel command and panel arguments. A panel operation consists of a command code (PANCMD) and up to two panel arguments (PANAR1, PANAR2). Commands that have a return value deliver it to the PANAR1 bit field. Commands that return an error flag deliver it to bit 31 of the Panel Control Register, this means bit 7 of PANAR2. arg1 represents panel argument PANAR1,arg2 represents panel argument PANAR2 and pancmd represents command code. It configures PANCTR register.
Related APIs:
None
void XMC_CAN_RXFIFO_ConfigMOBaseObject | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const XMC_CAN_FIFO_CONFIG_t | can_fifo
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_fifo | CAN FIFO configuration data structure. Refer XMC_CAN_FIFO_CONFIG_t data structure for details.
Returns
None
Description:
Configures the base object of receive FIFO.
Related API's:
None
void XMC_CAN_RXFIFO_ConfigMOSlaveObject ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
None
Description:
Configures the slave Object of receive FIFO. It configures MOCTR.RESRXEN bit.
Related API's:
None
void XMC_CAN_TXFIFO_ConfigMOBaseObject | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const XMC_CAN_FIFO_CONFIG_t | can_fifo
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_fifo | CAN FIFO configuration data structure. Refer XMC_CAN_FIFO_CONFIG_t data structure for details.
Returns
None
Description:
Configures the transmit FIFO. A FIFO consists of one base object and n slave objects. Please refer reference manual Transmit FIFO for more info.
Related API's:
None.
void XMC_CAN_TXFIFO_ConfigMOSlaveObject | ( | const XMC_CAN_MO_t *const | can_mo,
 |  | const XMC_CAN_FIFO_CONFIG_t | can_fifo
 | ) |  |
Parameters
can_mo | Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
can_fifo | CAN FIFO configuration data structure. Refer XMC_CAN_FIFO_CONFIG_t data structure for details.
Returns
None
Description:
Configures the slave object of transmit FIFO.
Related API's:
None
XMC_CAN_STATUS_t XMC_CAN_TXFIFO_Transmit ( const XMC_CAN_MO_t *const can_mo )
Parameters
can_mo Pointer to Message Object structure. Refer XMC_CAN_MO_t data structure for details.
Returns
XMC_CAN_STATUS_t CAN Node status. Refer XMC_CAN_STATUS_t structure for details.
Description:
To transmit Message Object from the FIFO. Prior to this CAN node Message Object FIFO structure shall be made using XMC_CAN_TXFIFO_ConfigMOBaseObject(), XMC_CAN_TXFIFO_ConfigMOSlaveObject(),XMC_CAN_RXFIFO_ConfigMOBaseObject() API's. Please refer reference manual MessageObject FIFOStructure for more info.
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_CAN_FIFO_CONFIG_t Struct Reference

Data Fields
XMC_CAN_FIFO_CONFIG_t Struct Reference
XMC Peripheral Library » CAN

#include <xmc_can.h>

Data Fields

uint8_t | fifo_base
uint8_t | fifo_bottom
uint8_t | fifo_top

Detailed Description

Defines base, top and bottom of CAN Message Object FIFO Structure. Use type XMC_CAN_FIFO_CONFIG_t for this structure. A FIFO consists of one base object and n slave objects.

Field Documentation

uint8_t fifo_base

points to the actual target object(Base object) within a FIFO/Gateway structure. Range :0-63

uint8_t fifo_bottom

points to the first element(slave object) in a FIFO structure.Range :0-63

uint8_t fifo_top

points to the last element(slave object) in a FIFO structure. Range :0-63

The documentation for this struct was generated from the following file:
  • xmc_can.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_CAN_GATEWAY_CONFIG_t Struct Reference

Data Fields
XMC_CAN_GATEWAY_CONFIG_t Struct Reference
XMC Peripheral Library » CAN

#include <xmc_can.h>

Data Fields

uint8_t | gateway_base
uint8_t | gateway_bottom
bool | gateway_data_copy
bool | gateway_data_frame_send
bool | gateway_data_length_code_copy
bool | gateway_identifier_copy
uint8_t | gateway_top

Detailed Description

Defines CAN Gateway FIFO structure and provides additional options for gateway destination object. Use type XMC_CAN_GATEWAY_CONFIG_t for this structure.

Field Documentation

uint8_t gateway_base

points to the actual target object within a FIFO/Gateway structure. Range :0-63

uint8_t gateway_bottom

points to the first element(gateway destination object) in a FIFO structure. Range :0-63

bool gateway_data_copy

Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination.

bool gateway_data_frame_send

TXRQ updated in the gateway destination object after the internal transfer from the gateway source to the gateway destination object

bool gateway_data_length_code_copy

Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object

bool gateway_identifier_copy

The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object.

uint8_t gateway_top

points to the last element(gateway destination object) in a FIFO structure. Range :0-63

The documentation for this struct was generated from the following file:
  • xmc_can.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_CAN_MO_t Struct Reference

Data Fields
XMC_CAN_MO_t Struct Reference
XMC Peripheral Library » CAN

#include <xmc_can.h>

Data Fields

uint8_t | can_data_length
CAN_MO_TypeDef * | can_mo_ptr
XMC_CAN_MO_TYPE_t can_mo_type
uint32_t | can_data [2]
uint8_t | can_data_byte [8]
uint16_t | can_data_word [4]
uint32_t | can_id_mask:29
uint32_t | can_id_mode:1
uint32_t | can_ide_mask:1
uint32_t | can_identifier:29
uint32_t | can_priority:2

Detailed Description

Defines CAN Message Object runtime elements. Use type XMC_CAN_MO_t for this structure.

Field Documentation

uint32_t can_data[2]

can_data[0] lower 4 bytes of the data. can_data[1], higher 4 bytes of the data

uint8_t can_data_byte[8]

Each position of the array represents a data byte

uint8_t can_data_length

Message data length, Range:0-8

uint16_t can_data_word[4]

Each position of the array represents a 16 bits data word

uint32_t can_id_mask

CAN Identifier of Message Object

uint32_t can_id_mode

Standard/Extended identifier support

uint32_t can_ide_mask

Identifier Extension Bit of Message Object

uint32_t can_identifier

standard (11 bit)/Extended (29 bit) message identifier

CAN_MO_TypeDef* can_mo_ptr

Pointer to the Message Object CAN register

XMC_CAN_MO_TYPE_t can_mo_type

Message Type

uint32_t can_priority

Arbitration Mode/Priority

The documentation for this struct was generated from the following file:
  • xmc_can.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_CAN_NODE_FRAME_COUNTER_t Struct Reference

XMC_CAN_NODE_FRAME_COUNTER_t Struct Reference
XMC Peripheral Library » CAN

#include <xmc_can.h>

Detailed Description

Defines frame counter configuration. Use type XMC_CAN_NODE_FRAME_COUNTER_t for this structure. It provides configuration of frame counter that counts transmitted/received CAN frames or obtains information about the time when a frame has been started to transmit or be received by the CAN node.

Field Documentation

uint32_t can_frame_count_mode

Determines the operation mode of the frame counter

uint32_t can_frame_count_selection

Defines function of the frame counter

The documentation for this struct was generated from the following file:
  • xmc_can.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t Struct Reference

Data Fields
XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t Struct Reference
XMC Peripheral Library » CAN

#include <xmc_can.h>

Data Fields

uint32_t | baudrate
uint32_t | can_frequency
uint16_t | sample_point
uint16_t | sjw

Detailed Description

Defines CAN node Nominal Bit Time. Use type XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t for this structure.

Field Documentation

uint32_t baudrate

Specifies the node baud rate. Unit: baud baudrate shall be range of 100Kbps to 1000Kbps

uint32_t can_frequency

Frequency of the CAN module(fCAN). can_frequency shall be range of 5MHz to 120MHz

uint16_t sample_point

Sample point is used to compensate mismatch between transmitter and receiver clock phases detected in the synchronization segment. Sample point. Range = [0, 10000] with respect [0%, 100%] of the total bit time.

uint16_t sjw

(Re) Synchronization Jump Width. Range:0-3

The documentation for this struct was generated from the following file:
  • xmc_can.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: CCU4

Data Structures | Typedefs | Enumerations | Functions
CCU4
XMC Peripheral Library

Data Structures

struct | XMC_CCU4_SLICE_CAPTURE_CONFIG_t
struct | XMC_CCU4_SLICE_COMPARE_CONFIG_t
struct | XMC_CCU4_SLICE_EVENT_CONFIG_t

Typedefs

typedef CCU4_GLOBAL_TypeDef | XMC_CCU4_MODULE_t
typedef uint8_t | XMC_CCU4_SLICE_INPUT_t
typedef CCU4_CC4_TypeDef | XMC_CCU4_SLICE_t

Enumerations

Functions

void | XMC_CCU4_DisableClock (XMC_CCU4_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU4_DisableModule (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_EnableClock (XMC_CCU4_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU4_EnableModule (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_EnableMultipleClocks (XMC_CCU4_MODULE_t *const module, const uint8_t clock_mask)
void | XMC_CCU4_EnableShadowTransfer (XMC_CCU4_MODULE_t *const module, const uint32_t shadow_transfer_msk)
void | XMC_CCU4_Init (XMC_CCU4_MODULE_t *const module, const XMC_CCU4_SLICE_MCMS_ACTION_t mcs_action)
bool | XMC_CCU4_IsPrescalerRunning (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_SetModuleClock (XMC_CCU4_MODULE_t *const module, const XMC_CCU4_CLOCK_t clock)
void | XMC_CCU4_SetMultiChannelShadowTransferMode (XMC_CCU4_MODULE_t *const module, const uint32_t slice_mode_msk)
void | XMC_CCU4_SLICE_Capture0Config (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_Capture1Config (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_CaptureInit (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_CAPTURE_CONFIG_t *const capture_init)
void | XMC_CCU4_SLICE_ClearEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_ClearTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_CompareInit (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_COMPARE_CONFIG_t *const compare_init)
void | XMC_CCU4_SLICE_ConfigureEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_EVENT_CONFIG_t *const config)
void | XMC_CCU4_SLICE_ConfigureStatusBitOverrideEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_CONFIG_t *const ev1_config, const XMC_CCU4_SLICE_EVENT_CONFIG_t *const ev2_config)
void | XMC_CCU4_SLICE_CountConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_DirectionConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_DisableAutomaticShadowTransferRequest (XMC_CCU4_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU4_SLICE_DisableCascadedShadowTransfer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableDithering (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_DisableFloatingPrescaler (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableMultiChannelMode (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableMultipleEvents (XMC_CCU4_SLICE_t *const slice, const uint16_t mask)
void | XMC_CCU4_SLICE_DisableTrap (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableAutomaticShadowTransferRequest (XMC_CCU4_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU4_SLICE_EnableCascadedShadowTransfer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableDithering (XMC_CCU4_SLICE_t *const slice, const bool period_dither, const bool duty_dither, const uint8_t spread)
void | XMC_CCU4_SLICE_EnableEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_EnableFloatingPrescaler (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableMultiChannelMode (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableMultipleEvents (XMC_CCU4_SLICE_t *const slice, const uint16_t intr_mask)
void | XMC_CCU4_SLICE_EnableTrap (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_GateConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
uint32_t | XMC_CCU4_SLICE_GetCapturedValueFromFifo (const XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_CAP_REG_SET_t set)
uint32_t | XMC_CCU4_SLICE_GetCaptureRegisterValue (const XMC_CCU4_SLICE_t *const slice, const uint8_t reg_num)
XMC_CCU4_SLICE_TIMER_COUNT_DIR_t | XMC_CCU4_SLICE_GetCountingDir (const XMC_CCU4_SLICE_t *const slice)
bool | XMC_CCU4_SLICE_GetEvent (const XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
XMC_CCU4_STATUS_t | XMC_CCU4_SLICE_GetLastCapturedTimerValue (const XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_CAP_REG_SET_t set, uint32_t *val_ptr)
XMC_CCU4_SLICE_MODE_t | XMC_CCU4_SLICE_GetSliceMode (const XMC_CCU4_SLICE_t *const slice)
uint16_t | XMC_CCU4_SLICE_GetTimerCompareMatch (const XMC_CCU4_SLICE_t *const slice)
XMC_CCU4_SLICE_TIMER_COUNT_MODE_t | XMC_CCU4_SLICE_GetTimerCountingMode (const XMC_CCU4_SLICE_t *const slice)
uint16_t | XMC_CCU4_SLICE_GetTimerPeriodMatch (const XMC_CCU4_SLICE_t *const slice)
XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t | XMC_CCU4_SLICE_GetTimerRepeatMode (const XMC_CCU4_SLICE_t *const slice)
uint16_t | XMC_CCU4_SLICE_GetTimerValue (const XMC_CCU4_SLICE_t *const slice)
bool | XMC_CCU4_SLICE_IsExtendedCapReadEnabled (const XMC_CCU4_SLICE_t *const slice)
bool | XMC_CCU4_SLICE_IsTimerRunning (const XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_LoadConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_ModulationConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_MODULATION_MODE_t mod_mode, const bool synch_with_pwm)
void | XMC_CCU4_SLICE_SetDitherCompareValue (XMC_CCU4_SLICE_t *const slice, const uint8_t comp_val)
void | XMC_CCU4_SLICE_SetEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue (XMC_CCU4_SLICE_t *const slice, const uint8_t cmp_val)
void | XMC_CCU4_SLICE_SetInput (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_INPUT_t input)
void | XMC_CCU4_SLICE_SetInterruptNode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event, const XMC_CCU4_SLICE_SR_ID_t sr)
void | XMC_CCU4_SLICE_SetPassiveLevel (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t level)
void | XMC_CCU4_SLICE_SetPrescaler (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_PRESCALER_t div_val)
void | XMC_CCU4_SLICE_SetShadowTransferMode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t shadow_transfer_mode)
void | XMC_CCU4_SLICE_SetTimerCompareMatch (XMC_CCU4_SLICE_t *const slice, const uint16_t compare_val)
void | XMC_CCU4_SLICE_SetTimerCountingMode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_TIMER_COUNT_MODE_t mode)
void | XMC_CCU4_SLICE_SetTimerPeriodMatch (XMC_CCU4_SLICE_t *const slice, const uint16_t period_val)
void | XMC_CCU4_SLICE_SetTimerRepeatMode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t mode)
void | XMC_CCU4_SLICE_SetTimerValue (XMC_CCU4_SLICE_t *const slice, const uint16_t timer_val)
void | XMC_CCU4_SLICE_StartConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_START_MODE_t start_mode)
void | XMC_CCU4_SLICE_StartTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_StatusBitOverrideConfig (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_StopClearTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_StopConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_END_MODE_t end_mode)
void | XMC_CCU4_SLICE_StopTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_TrapConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_TRAP_EXIT_MODE_t exit_mode, bool synch_with_pwm)
void | XMC_CCU4_SLICE_WriteCoherentlyWithPWMCycle (XMC_CCU4_SLICE_t *const slice, const uint32_t coherent_write)
void | XMC_CCU4_SLICE_WriteImmediateAfterShadowTransfer (XMC_CCU4_SLICE_t *const slice, const uint32_t immediate_write)
void | XMC_CCU4_StartPrescaler (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_StopPrescaler (XMC_CCU4_MODULE_t *const module)

Detailed Description

The CCU4 peripheral is a major component for systems that need general purpose timers for signal monitoring/conditioning and Pulse Width Modulation (PWM) signal generation. Power electronic control systems like switched mode power supplies or interruptible power supplies, can easily be implemented with the functions inside the CCU4 peripheral.
Each CCU4 module is comprised of four identical 16 bit Capture/Compare Timer slices, CC4y (where y = [0..4]). Each timer slice can work in compare mode or in capture mode.

APIs provided in this file cover the following functional blocks of CCU4:
– Timer configuration, Capture configuration, Function/Event configuration, Interrupt configuration

Note:
  1. SLICE (APIs prefixed with e.g. XMC_CCU4_SLICE_)
  2. Module (APIs are not having any prefix e.g. XMC_CCU4_)
Timer(Compare mode) configuration:
This section of the LLD provides the configuration structure XMC_CCU4_SLICE_COMPARE_CONFIG_t and the initialization function XMC_CCU4_SLICE_CompareInit().

It can be used to:

  1. Start and Stop the timer. (XMC_CCU4_SLICE_StartTimer(), XMC_CCU4_SLICE_StopTimer())
  2. Update the period, compare, Dither, Prescaler and Passive values. (XMC_CCU4_SLICE_SetTimerPeriodMatch(), XMC_CCU4_SLICE_SetTimerCompareMatch(), XMC_CCU4_SLICE_SetPrescaler(), XMC_CCU4_SLICE_SetDitherCompareValue(), XMC_CCU4_SLICE_SetPassiveLevel())
  3. Enable the slices to support multichannel mode. (XMC_CCU4_SLICE_EnableMultiChannelMode())
Capture configuration:
This section of the LLD provides the configuration structure XMC_CCU4_SLICE_CAPTURE_CONFIG_t and the initialization function XMC_CCU4_SLICE_CaptureInit().

It can be used to:

  1. Configure the capture functionality. (XMC_CCU4_SLICE_Capture0Config(), XMC_CCU4_SLICE_Capture1Config())
  2. Read the captured values along with the status, which indicate the value is latest or not. (XMC_CCU4_SLICE_GetCaptureRegisterValue())
Function/Event configuration:
This section of the LLD provides the configuration structure XMC_CCU4_SLICE_EVENT_CONFIG_t.
It can be used to:
  1. Enable and Disable the events. (XMC_CCU4_SLICE_EnableEvent(), XMC_CCU4_SLICE_DisableEvent())
  2. Configure to start and stop the timer on external events.(XMC_CCU4_SLICE_StartConfig(), XMC_CCU4_SLICE_StopConfig())
  3. Modulation, external load and Gating of the timer output.(XMC_CCU4_SLICE_ModulationConfig(), XMC_CCU4_SLICE_LoadConfig(), XMC_CCU4_SLICE_GateConfig())
  4. Control the count direction of the timer based on the external event. (XMC_CCU4_SLICE_DirectionConfig())
  5. Count the external events.(XMC_CCU4_SLICE_CountConfig())
  6. External Trap. Which can be used as protective feature.(XMC_CCU4_SLICE_EnableTrap(), XMC_CCU4_SLICE_DisableTrap(), XMC_CCU4_SLICE_TrapConfig())
Interrupt configuration:
This section of the LLD provides the function to configure the interrupt node to each event (XMC_CCU4_SLICE_SetInterruptNode())

Typedef Documentation

typedef CCU4_GLOBAL_TypeDef XMC_CCU4_MODULE_t

Typedef for CCU4 Global data structure

typedef uint8_t XMC_CCU4_SLICE_INPUT_t

External Event Input list. This list depicts the possible input connections to the CCU4 slice. Interconnects are specific to each device.

typedef CCU4_CC4_TypeDef XMC_CCU4_SLICE_t

Typedef for CCU4 Slice data structure

Enumeration Type Documentation

enum XMC_CCU4_CLOCK_t

CCU4 module clock

Enumerator
XMC_CCU4_CLOCK_SCU | Select the fCCU as the clock
XMC_CCU4_CLOCK_EXTERNAL_A | External clock-A
XMC_CCU4_CLOCK_EXTERNAL_B | External clock-B
XMC_CCU4_CLOCK_EXTERNAL_C | External clock-C
enum XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_t

CCU4 set the shadow transfer type for multichannel mode

Enumerator
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE0 | Shadow transfer through software only for slice 0
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE0 | Shadow transfer through software and hardware for slice 0
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE1 | Shadow transfer through software only for slice 1
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE1 | Shadow transfer through software and hardware for slice 1
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE2 | Shadow transfer through software only for slice 2
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE2 | Shadow transfer through software and hardware for slice 2
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE3 | Shadow transfer through software only for slice 3
XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE3 | Shadow transfer through software and hardware for slice 3
enum XMC_CCU4_SHADOW_TRANSFER_t

Slice shadow transfer options.

Enumerator
XMC_CCU4_SHADOW_TRANSFER_SLICE_0 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-0
XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_0 | Transfer Dither compare shadow register value to actual register for SLICE-0
XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_0 | Transfer Prescaler shadow register value to actual register for SLICE-0
XMC_CCU4_SHADOW_TRANSFER_SLICE_1 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-1
XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_1 | Transfer Dither compare shadow register value to actual registers for SLICE-1
XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_1 | Transfer Prescaler shadow register value to actual register for SLICE-1
XMC_CCU4_SHADOW_TRANSFER_SLICE_2 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-2
XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_2 | Transfer Dither compare shadow register value to actual register for SLICE-2
XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_2 | Transfer Prescaler shadow register value to actual register for SLICE-2
XMC_CCU4_SHADOW_TRANSFER_SLICE_3 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-3
XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_3 | Transfer Dither compare shadow register value to actual register for SLICE-3
XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_3 | Transfer Prescaler shadow register value to actual register for SLICE-3
enum XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t

Automatic Shadow Transfer request when writing into shadow register

Note
Only available for XMC1400 series
Enumerator
XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PERIOD_SHADOW | Automatic Shadow Transfer request when writing into Period Shadow Register
XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_COMPARE_SHADOW | Automatic Shadow transfer request when writing into Compare Shadow Register
XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PASSIVE_LEVEL | Automatic Shadow transfer request when writing into Passive Level Register
XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_DITHER_SHADOW | Automatic Shadow transfer request when writing into Dither Shadow Register
XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_FLOATING_PRESCALER_SHADOW | Automatic Shadow transfer request when writing into Floating Prescaler Shadow register
enum XMC_CCU4_SLICE_CAP_REG_SET_t

Capture mode register sets

Enumerator
XMC_CCU4_SLICE_CAP_REG_SET_LOW | Capture register-0, Capture register-1 used
XMC_CCU4_SLICE_CAP_REG_SET_HIGH | Capture register-2, Capture register-3 used
enum XMC_CCU4_SLICE_END_MODE_t

Actions that can be performed upon detection of an external Timer STOP event

Enumerator
XMC_CCU4_SLICE_END_MODE_TIMER_STOP | Stops the timer, without clearing TIMER register
XMC_CCU4_SLICE_END_MODE_TIMER_CLEAR | Without stopping timer, clears the TIMER register
XMC_CCU4_SLICE_END_MODE_TIMER_STOP_CLEAR | Stops the timer and clears the TIMER register
enum XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_t

External Event trigger criteria - Edge sensitivity

Enumerator
XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_NONE | None
XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE | Rising Edge of the input signal generates event trigger
XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE | Falling Edge of the input signal generates event trigger
XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE | Both Rising and Falling edges cause an event trigger
enum XMC_CCU4_SLICE_EVENT_FILTER_t

Low pass filter Configuration. The External Event input should be stable for a selected number of clock cycles.

Enumerator
XMC_CCU4_SLICE_EVENT_FILTER_DISABLED | No Low Pass Filter
XMC_CCU4_SLICE_EVENT_FILTER_3_CYCLES | 3 clock cycles
XMC_CCU4_SLICE_EVENT_FILTER_5_CYCLES | 5 clock cycles
XMC_CCU4_SLICE_EVENT_FILTER_7_CYCLES | 7 clock cycles
enum XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_t

External Event trigger criteria - Level sensitivity

Enumerator
XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH | Level sensitive functions react to a high signal level
XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW | Level sensitive functions react to a low signal level
XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_LOW | Timer counts up, during Low state of the control signal
XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_HIGH | Timer counts up, during High state of the control signal
enum XMC_CCU4_SLICE_EVENT_t

External Event list

Enumerator
XMC_CCU4_SLICE_EVENT_NONE | None
XMC_CCU4_SLICE_EVENT_0 | Event-0
XMC_CCU4_SLICE_EVENT_1 | Event-1
XMC_CCU4_SLICE_EVENT_2 | Event-2
enum XMC_CCU4_SLICE_FUNCTION_t

External Function list

Enumerator
XMC_CCU4_SLICE_FUNCTION_START | Start function
XMC_CCU4_SLICE_FUNCTION_STOP | Stop function
XMC_CCU4_SLICE_FUNCTION_CAPTURE_EVENT0 | Capture Event-0 function, CCycapt0 signal is used for event generation
XMC_CCU4_SLICE_FUNCTION_CAPTURE_EVENT1 | Capture Event-1 function, CCycapt1 signal is used for event generation
XMC_CCU4_SLICE_FUNCTION_GATING | Gating function
XMC_CCU4_SLICE_FUNCTION_DIRECTION | Direction function
XMC_CCU4_SLICE_FUNCTION_LOAD | Load function
XMC_CCU4_SLICE_FUNCTION_COUNT | Counting function
XMC_CCU4_SLICE_FUNCTION_OVERRIDE | Override function
XMC_CCU4_SLICE_FUNCTION_MODULATION | Modulation function
XMC_CCU4_SLICE_FUNCTION_TRAP | Trap function
enum XMC_CCU4_SLICE_IRQ_ID_t

Available Interrupt Event Ids

Enumerator
XMC_CCU4_SLICE_IRQ_ID_PERIOD_MATCH | Period match counting up
XMC_CCU4_SLICE_IRQ_ID_ONE_MATCH | Period match -> One match counting down
XMC_CCU4_SLICE_IRQ_ID_COMPARE_MATCH_UP | Compare match counting up
XMC_CCU4_SLICE_IRQ_ID_COMPARE_MATCH_DOWN | Compare match counting down
XMC_CCU4_SLICE_IRQ_ID_EVENT0 | Event-0 occurrence
XMC_CCU4_SLICE_IRQ_ID_EVENT1 | Event-1 occurrence
XMC_CCU4_SLICE_IRQ_ID_EVENT2 | Event-2 occurrence
XMC_CCU4_SLICE_IRQ_ID_TRAP | Trap occurrence
enum XMC_CCU4_SLICE_MASK_t

Used to create Mask needed for Multi-channel Shadow transfer enable/disable

Enumerator
XMC_CCU4_SLICE_MASK_SLICE_0 | SLICE-0
XMC_CCU4_SLICE_MASK_SLICE_1 | SLICE-1
XMC_CCU4_SLICE_MASK_SLICE_2 | SLICE-2
XMC_CCU4_SLICE_MASK_SLICE_3 | SLICE-3
enum XMC_CCU4_SLICE_MCMS_ACTION_t

Multi Channel Shadow transfer request configuration options

Enumerator
XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR | Transfer Compare and Period Shadow register values to the actual registers upon MCS xfer request
XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP | Transfer Compare, Period and Prescaler Compare Shadow register values to the actual registers upon MCS xfer request
XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT | Transfer Compare, Period ,Prescaler Compare and Dither Compare register values to the actual registers upon MCS xfer request
enum XMC_CCU4_SLICE_MODE_t

Operational modes of CCU4 slice

Enumerator
XMC_CCU4_SLICE_MODE_COMPARE | slice(CC4y) operates in Compare Mode
XMC_CCU4_SLICE_MODE_CAPTURE | slice(CC4y) operates in Capture Mode
enum XMC_CCU4_SLICE_MODULATION_MODE_t

Modulation of timer output signals

Enumerator
XMC_CCU4_SLICE_MODULATION_MODE_CLEAR_ST_OUT | Clear ST and OUT signals
XMC_CCU4_SLICE_MODULATION_MODE_CLEAR_OUT | Clear only the OUT signal
enum XMC_CCU4_SLICE_MULTI_IRQ_ID_t

Available Interrupt Event Ids, which is added to support multi event APIs

Enumerator
XMC_CCU4_SLICE_MULTI_IRQ_ID_PERIOD_MATCH | Period match counting up
XMC_CCU4_SLICE_MULTI_IRQ_ID_ONE_MATCH | Period match -> One match counting down
XMC_CCU4_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP | Compare match counting up
XMC_CCU4_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN | Compare match counting down
XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT0 | Event-0 occurrence
XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT1 | Event-1 occurrence
XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT2 | Event-2 occurrence
enum XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t

Timer output passive level

Enumerator
XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_LOW | Passive level = Low
XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH | Passive level = High
enum XMC_CCU4_SLICE_PRESCALER_MODE_t

Prescaler mode

Enumerator
XMC_CCU4_SLICE_PRESCALER_MODE_NORMAL | Fixed division of module clock
XMC_CCU4_SLICE_PRESCALER_MODE_FLOAT | Floating divider.
enum XMC_CCU4_SLICE_PRESCALER_t

Timer clock Divider

Enumerator
XMC_CCU4_SLICE_PRESCALER_1 | Slice Clock = fccu4
XMC_CCU4_SLICE_PRESCALER_2 | Slice Clock = fccu4/2
XMC_CCU4_SLICE_PRESCALER_4 | Slice Clock = fccu4/4
XMC_CCU4_SLICE_PRESCALER_8 | Slice Clock = fccu4/8
XMC_CCU4_SLICE_PRESCALER_16 | Slice Clock = fccu4/16
XMC_CCU4_SLICE_PRESCALER_32 | Slice Clock = fccu4/32
XMC_CCU4_SLICE_PRESCALER_64 | Slice Clock = fccu4/64
XMC_CCU4_SLICE_PRESCALER_128 | Slice Clock = fccu4/128
XMC_CCU4_SLICE_PRESCALER_256 | Slice Clock = fccu4/256
XMC_CCU4_SLICE_PRESCALER_512 | Slice Clock = fccu4/512
XMC_CCU4_SLICE_PRESCALER_1024 | Slice Clock = fccu4/1024
XMC_CCU4_SLICE_PRESCALER_2048 | Slice Clock = fccu4/2048
XMC_CCU4_SLICE_PRESCALER_4096 | Slice Clock = fccu4/4096
XMC_CCU4_SLICE_PRESCALER_8192 | Slice Clock = fccu4/8192
XMC_CCU4_SLICE_PRESCALER_16384 | Slice Clock = fccu4/16384
XMC_CCU4_SLICE_PRESCALER_32768 | Slice Clock = fccu4/32768
enum XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t

Slice shadow transfer mode options.

Note
Only available for XMC1400 series
Enumerator
XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_IN_PERIOD_MATCH_AND_ONE_MATCH | Shadow transfer is done in Period Match and One match.
XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_PERIOD_MATCH | Shadow transfer is done only in Period Match.
XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_ONE_MATCH | Shadow transfer is done only in One Match.
enum XMC_CCU4_SLICE_SR_ID_t

Service Request Lines for CCU4. Event are mapped to these SR lines and these are used to generate the interrupt.

Enumerator
XMC_CCU4_SLICE_SR_ID_0 | Service Request Line-0 selected
XMC_CCU4_SLICE_SR_ID_1 | Service Request Line-1 selected
XMC_CCU4_SLICE_SR_ID_2 | Service Request Line-2 selected
XMC_CCU4_SLICE_SR_ID_3 | Service Request Line-3 selected
enum XMC_CCU4_SLICE_START_MODE_t

Actions that can be performed upon detection of an external Timer START event

Enumerator
XMC_CCU4_SLICE_START_MODE_TIMER_START | Start the timer from the current count of TIMER register
XMC_CCU4_SLICE_START_MODE_TIMER_START_CLEAR | Clears the TIMER register and start the timer
enum XMC_CCU4_SLICE_TIMER_CLEAR_MODE_t

Timer clear on capture

Enumerator
XMC_CCU4_SLICE_TIMER_CLEAR_MODE_NEVER | Never clear the timer on any capture event
XMC_CCU4_SLICE_TIMER_CLEAR_MODE_CAP_HIGH | Clear only when timer value has been captured in C3V and C2V
XMC_CCU4_SLICE_TIMER_CLEAR_MODE_CAP_LOW | Clear only when timer value has been captured in C1V and C0V
XMC_CCU4_SLICE_TIMER_CLEAR_MODE_ALWAYS | Always clear the timer upon detection of any capture event
enum XMC_CCU4_SLICE_TIMER_COUNT_DIR_t

Timer counting direction for the CCU4 slice

Enumerator
XMC_CCU4_SLICE_TIMER_COUNT_DIR_UP | Counting up
XMC_CCU4_SLICE_TIMER_COUNT_DIR_DOWN | Counting down
enum XMC_CCU4_SLICE_TIMER_COUNT_MODE_t

Timer counting modes for the slice

Enumerator
XMC_CCU4_SLICE_TIMER_COUNT_MODE_EA | Edge Aligned Mode
XMC_CCU4_SLICE_TIMER_COUNT_MODE_CA | Center Aligned Mode
enum XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t

Timer repetition mode for the slice

Enumerator
XMC_CCU4_SLICE_TIMER_REPEAT_MODE_REPEAT | Repetitive mode: continuous mode of operation
XMC_CCU4_SLICE_TIMER_REPEAT_MODE_SINGLE | Single shot mode: Once a Period match/One match occurs timer goes to idle state
enum XMC_CCU4_SLICE_TRAP_EXIT_MODE_t

Trap exit mode

Enumerator
XMC_CCU4_SLICE_TRAP_EXIT_MODE_AUTOMATIC | Clear trap state as soon as the trap signal is de-asserted
XMC_CCU4_SLICE_TRAP_EXIT_MODE_SW | Clear only when acknowledged by software
enum XMC_CCU4_SLICE_WRITE_INTO_t

Immediate write into configuration register

Note
Only available for XMC1400 series
Enumerator
XMC_CCU4_SLICE_WRITE_INTO_PERIOD_CONFIGURATION | Immediate or Coherent Write into Period Configuration
XMC_CCU4_SLICE_WRITE_INTO_COMPARE_CONFIGURATION | Immediate or Coherent Write into Compare Configuration
XMC_CCU4_SLICE_WRITE_INTO_PASSIVE_LEVEL_CONFIGURATION | Immediate or Coherent Write into Passive Level Configuration
XMC_CCU4_SLICE_WRITE_INTO_DITHER_VALUE_CONFIGURATION | Immediate or Coherent Write into Dither Value Configuration
XMC_CCU4_SLICE_WRITE_INTO_FLOATING_PRESCALER_VALUE_CONFIGURATION | Immediate or Coherent Write into Floating Prescaler Value Configuration
enum XMC_CCU4_STATUS_t

Return Value of an API

Enumerator
XMC_CCU4_STATUS_OK | API fulfils request
XMC_CCU4_STATUS_ERROR | API cannot fulfil the request
XMC_CCU4_STATUS_RUNNING | The timer slice is currently running
XMC_CCU4_STATUS_IDLE | The timer slice is currently idle

Function Documentation

void XMC_CCU4_DisableClock | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const uint8_t | slice_number
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
slice_number | Slice for which the clock should be disabled. Range: [0x0 to 0x3]
Returns

None
Description:
Disables the slice timer clock, by configuring GIDLS.SS0I, GIDLS.SSS1I, GIDLS.SSS2I, GIDLS.SSS3I bits according to the selected slice_number .

It is possible to disable clock at slice level using the module pointer. slice_number is used to disable the clock to a given slice of the module. Directly accessed Register is GIDLS.
Related APIs:
XMC_CCU4_EnableClock()
XMC_CCU4_EnableMultipleClocks()
XMC_CCU4_StartPrescaler()
XMC_CCU4_StopPrescaler().
void XMC_CCU4_DisableModule ( XMC_CCU4_MODULE_t *const module )
Parameters
module Constant pointer to CCU4 module
Returns

None
Description:
Brings the CCU4 module to reset state and enables gating of the clock signal(if applicable depending on the device being selected).

Invoke this API when a CCU4 module needs to be disabled completely. Any operation on the CCU4 module will have no effect after this API is called.
Related APIs:
XMC_CCU4_EnableModule()
XMC_CCU4_DisableModule().
void XMC_CCU4_EnableClock | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const uint8_t | slice_number
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
slice_number | Slice for which the clock should be Enabled. Range: [0x0 to 0x3]
Returns

None
Description:
Enables the slice timer clock, by configuring GIDLC.CS0I, GIDLC.CS1I, GIDLC.CS2I, GIDLC.CS3I bits according to the selected slice_number.

It is possible to enable/disable clock at slice level. This uses the slice_number to indicate the slice whose clock needs to be enabled.
Related APIs:
XMC_CCU4_DisableClock()
XMC_CCU4_EnableMultipleClocks()
XMC_CCU4_StartPrescaler()
XMC_CCU4_StopPrescaler().
void XMC_CCU4_EnableModule ( XMC_CCU4_MODULE_t *const module )
Parameters
module Constant pointer to CCU4 module
Returns

None
Description:
Enables the CCU4 module and brings it to active state.

Also disables the gating of the clock signal (if applicable depending on the device being selected). Invoke this API before any operations are done on the CCU4 module. Invoked from XMC_CCU4_Init().
Related APIs:
XMC_CCU4_SetModuleClock()
XMC_CCU4_DisableModule()
XMC_CCU4_StartPrescaler().
void XMC_CCU4_EnableMultipleClocks | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const uint8_t | clock_mask
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
clock_mask | Slices whose clocks are to be enabled simultaneously. Bit location 0/1/2/3 represents slice-0/1/2/3 respectively. Range: [0x1 to 0xF]
Returns

None
Description:
Enables clocks of multiple slices at a time, by configuring GIDLC.CS0I, GIDLC.CS1I, GIDLC.CS2I, GIDLC.CS3I bits.

Takes an input clock_mask, which determines the slices that would receive the clock. Bring them out of the idle state simultaneously.
Related APIs:
XMC_CCU4_EnableClock()
XMC_CCU4_DisableClock().
void XMC_CCU4_EnableShadowTransfer | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const uint32_t | shadow_transfer_msk
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
shadow_transfer_msk | Shadow transfer request mask for various transfers. Use XMC_CCU4_SHADOW_TRANSFER_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Requests of shadow transfer for Period, Compare, Passive level, dither and prescaler, by configuring the GCSS register.

The transfer from the shadow registers to the actual registers is done in the immediate next occurrence of the shadow transfer trigger after the API is called.

Any call to XMC_CCU4_SLICE_SetTimerPeriodMatch()
XMC_CCU4_SLICE_SetTimerCompareMatch()
XMC_CCU4_SLICE_SetPrescaler()
XMC_CCU4_SLICE_CompareInit()
XMC_CCU4_SLICE_CaptureInit(). must be succeeded by this API. Directly accessed Register is GCSS.

Related APIs:
None.
void XMC_CCU4_Init | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const XMC_CCU4_SLICE_MCMS_ACTION_t | mcs_action
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
mcs_action | multi-channel shadow transfer request configuration
Returns

None
Description:
Initialization of global register GCTRL.

As part of module initialization, behaviour of the module upon detection Multi-Channel Mode trigger is configured. Will also invoke the XMC_CCU4_EnableModule(). The API call would bring up the required CCU4 module and also initialize the module for the required multi-channel shadow transfer.
Related APIs:
XMC_CCU4_SLICE_CompareInit()
XMC_CCU4_SLICE_CaptureInit().
bool XMC_CCU4_IsPrescalerRunning ( XMC_CCU4_MODULE_t *const module )
Parameters
module Constant pointer to CCU4 module
Returns

None
Description:
Returns the state of the prescaler, by reading GSTAT.PRB bit.

This will return true if the prescaler is running. If clock is being supplied to the slices of the module then returns as true.
Related APIs:
XMC_CCU4_StartPrescaler()
XMC_CCU4_StopPrescaler()
XMC_CCU4_EnableClock()
XMC_CCU4_DisableClock().
void XMC_CCU4_SetModuleClock | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const XMC_CCU4_CLOCK_t | clock
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
clock | Choice of input clock to the module
Returns

None
Description:
Selects the Module Clock by configuring GCTRL.PCIS bits.

There are 3 potential clock sources. This API helps to select the required clock source. Call to this API is valid after the XMC_CCU4_Init().
Related APIs:
None.
void XMC_CCU4_SetMultiChannelShadowTransferMode | ( | XMC_CCU4_MODULE_t *const | module,
 |  | const uint32_t | slice_mode_msk
 | ) |  |
Parameters
module | Constant pointer to CCU4 module
slice_mode_msk | Slices for which the configuration has to be applied. Use XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Enables the Multi-channel shadow transfer request trigger signal either by software or hardware by configuring GCTRL.MSE0, GCTRL.MSE1, GCTRL.MSE2, and GCTRL.MSE3 based on the mask.

The shadow transfer would take place either if it was requested by software or by the CCU4x.MCSS input.
Related APIs:
None.
void XMC_CCU4_SLICE_Capture0Config | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the Capture-0 Function
Returns

None
Description:
Configures the Capture-0 Function of the slice, by configuring CC4yCMC.CAP0S bit.

Capture function is mapped with one of the 3 events. A CCU4 slice can be configured into capture-0 mode with the selected event. In this mode the CCU4 will capture the timer value into CC4yC0V and CC4yC1V.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_Capture1Config | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the Capture-1 Function
Returns

None
Description:
Configures the Capture-1 Function of the slice, by configuring CC4yCMC.CAP1S bit.

Capture function is mapped with one of the 3 events. A CCU4 slice can be configured into capture-1 mode with the selected event. In this mode the CCU4 will capture the timer value into CC4yC2V and CC4yC3V.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_CaptureInit | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_CAPTURE_CONFIG_t *const | capture_init
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
capture_init | Pointer to slice configuration structure
Returns

None
Description:
Initialization of a CC4 slice to capture mode, by configuring CC4yTC, CC4yCMC, CC4yPSC,CC4yFPCS registers.

CC4 slice is configured with Capture configurations in this routine.After initialization user has to explicitly enable the shadow transfer for the required values by calling XMC_CCU4_EnableShadowTransfer() with appropriate mask.
Related APIs:
XMC_CCU4_SLICE_Capture0Config()
XMC_CCU4_SLICE_Capture1Config().
void XMC_CCU4_SLICE_ClearEvent | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Asserted event which must be acknowledged.
Returns

None
Description:
Acknowledges an asserted event, by setting CC4ySWR with respective event flag.

Related APIs:
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_SetEvent()
XMC_CCU4_SLICE_GetEvent().
void XMC_CCU4_SLICE_ClearTimer ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Resets the timer count to zero, by setting CC4yTCCLR.TCC bit.

A timer which has been stopped can still retain the last counted value. After invoking this API the timer value will be cleared.
Related APIs:
XMC_CCU4_SLICE_StartTimer().
void XMC_CCU4_SLICE_CompareInit | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_COMPARE_CONFIG_t *const | compare_init
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
compare_init | Pointer to slice configuration structure
Returns

None
Description:
Initialization of a CC4 slice to compare mode, by configuring CC4yTC, CC4yCMC, CC4yPSC, CC4yDITH, CC4yPSL, CC4yFPCS, CC4yCHC registers.

CC4 slice is configured with Timer configurations in this routine. After initialization user has to explicitly enable the shadow transfer for the required values by calling XMC_CCU4_EnableShadowTransfer() with appropriate mask.
Related APIs:
None.
void XMC_CCU4_SLICE_ConfigureEvent | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event,
 |  | const XMC_CCU4_SLICE_EVENT_CONFIG_t *const | config
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | The External Event which needs to be configured.
config | Pointer to event configuration data.
Returns

None
Description:
Configures an External Event of the slice, by updating CC4yINS register .

Details such as the input mapped to the event, event detection criteria and low pass filter options are programmed by this routine. The Event config will configure the input selection, the edge selection, the level selection and the Low pass filter for the event.
Related APIs:
XMC_CCU4_SLICE_StartConfig()
XMC_CCU4_SLICE_StopConfig()
XMC_CCU4_SLICE_LoadConfig()
XMC_CCU4_SLICE_ModulationConfig()
XMC_CCU4_SLICE_CountConfig()
XMC_CCU4_SLICE_GateConfig()
XMC_CCU4_SLICE_Capture0Config()
XMC_CCU4_SLICE_Capture1Config()
XMC_CCU4_SLICE_DirectionConfig()
XMC_CCU4_SLICE_StatusBitOverrideConfig()
XMC_CCU4_SLICE_TrapConfig().
void XMC_CCU4_SLICE_ConfigureStatusBitOverrideEvent | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_CONFIG_t *const | ev1_config,
 |  | const XMC_CCU4_SLICE_EVENT_CONFIG_t *const | ev2_config
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
ev1_config | Pointer to event 1 configuration data
ev2_config | Pointer to event 2 configuration data
Returns

None
Description:
Map Status bit override function with an Event1 & Event 2 of the slice and configure CC4yINS register.

Details such as the input mapped to the event, event detection criteria and Low Pass filter options are programmed by this routine for the events 1 & 2. Event-1 input would be the trigger to override the value. Event-2 input would be the override value.
Related APIs:
XMC_CCU4_SLICE_StatusBitOverrideConfig().
void XMC_CCU4_SLICE_CountConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External Count Function
Returns

None
Description:
Configures the Count Function of the slice, by configuring CC4yCMC.CNTS bit.

Count function is mapped with one of the 3 events. CCU4 slice can take an external signal to act as the counting event. The CCU4 slice would count the edges present on the event selected.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_DirectionConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External Count Direction Function
Returns

None
Description:
Configures the Count Direction of the slice, by configuring CC4yCMC.UDS bit.

Count direction function is mapped with one of the 3 events. A slice can be configured to change the CC4yTIMER count direction depending on an external signal.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_DisableAutomaticShadowTransferRequest | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint32_t | automatic_shadow_transfer
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
automatic_shadow_transfer | specify upon which register update, automatic shadow transfer request should not be generated Use :: XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configure on which shadow register update, automatic shadow transfer request generation has to be disabled. By clearing ASPC, ASCC1, ASCC2, ASLC, ASDC, ASFC bits in STC register.

This disables the generation of automatic shadow transfer request for the specified register update.
Note:
Related APIs:
XMC_CCU4_SLICE_EnableAutomaticShadowTransferRequest().
Note
Only available for XMC1400 series
void XMC_CCU4_SLICE_DisableCascadedShadowTransfer ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Disables the cascaded the shadow transfer operation, by clearing CSE bit in STC register.

If in any slice the cascaded mode disabled, other slices from there onwards does not update the values in cascaded mode.
Related APIs:
XMC_CCU4_SLICE_EnableCascadedShadowTransfer()
.
Note
Only available for XMC1400 series
void XMC_CCU4_SLICE_DisableDithering ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Disables dithering of PWM frequency and duty cycle, by clearing CC4yTC.DITHE bits.

This disables the Dither mode that was set in XMC_CCU4_SLICE_EnableDithering(). This API will not clear the dither compare value.
Related APIs:
XMC_CCU4_SLICE_EnableDithering().
void XMC_CCU4_SLICE_DisableEvent | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Event whose assertion can potentially lead to an interrupt
Returns

None
Description:
Disables the generation of an interrupt pulse for the event, by clearing CC4yINTE register.

Prevents the event from being asserted
Related APIs:
XMC_CCU4_SLICE_SetInterruptNode()
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_EnableMultipleEvents()
XMC_CCU4_SLICE_DisableMultipleEvents().
void XMC_CCU4_SLICE_DisableFloatingPrescaler ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Disables the floating prescaler, by clearing CC4yTC.FPE bit.

This would return the prescaler to the normal mode. The prescaler that would be applied is the value present in CC4yPSC.
Related APIs:
XMC_CCU4_SLICE_EnableFloatingPrescaler().
void XMC_CCU4_SLICE_DisableMultiChannelMode ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Disables the multichannel mode, by clearing CC4yTC.MCME bit.

This would return the slices to the normal operation mode.
Related APIs:
XMC_CCU4_SLICE_EnableMultiChannelMode().
void XMC_CCU4_SLICE_DisableMultipleEvents | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint16_t | mask
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
mask | Event mask such that multiple events can be enabled. Use XMC_CCU4_SLICE_MULTI_IRQ_ID_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Disables the generation of an interrupt pulse for the required events, by clearing CC4yINTE register.

Prevents selected events of the slice from being asserted.
Related APIs:
XMC_CCU4_SLICE_SetInterruptNode()
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_EnableMultipleEvents()
XMC_CCU4_SLICE_DisableEvent().
void XMC_CCU4_SLICE_DisableTrap ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Disables the trap feature, by clearing CC4yTC.TRAPE0, CC4yTC.TRAPE1, CC4yTC.TRAPE2 and CC4yTC.TRAPE3 bit based on the out_mask.

.

This API will revert the changes done by XMC_CCU4_SLICE_EnableTrap(). This Ensures that the TRAP function has no effect on the output of the CCU4 slice.
Related APIs:
XMC_CCU4_SLICE_EnableTrap().
void XMC_CCU4_SLICE_EnableAutomaticShadowTransferRequest | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint32_t | automatic_shadow_transfer
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
automatic_shadow_transfer | specify upon which register update, automatic shadow transfer request is generated Use :: XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configure on which shadow register update, automatic shadow transfer request generation has to be enabled. By setting ASPC, ASCC1, ASCC2, ASLC, ASDC, ASFC bits in STC register.

By updating the configured shadow register, the shadow transfer request is generated to update all the shadow registers.
Note:
Related APIs:
XMC_CCU4_SLICE_DisableAutomaticShadowTransferRequest().
Note
Only available for XMC1400 series
void XMC_CCU4_SLICE_EnableCascadedShadowTransfer ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Cascades the shadow transfer operation throughout the CCU4 timer slices, by setting CSE bit in STC register.

The shadow transfer enable bits needs to be set in all timer slices, that are being used in the cascaded architecture, at the same time. The shadow transfer enable bits, also need to be set for all slices even if the shadow values of some slices were not updated. It is possible to to cascade with the adjacent slices only. CC40 slice is a master to start the operation.
Note:
XMC_CCU4_EnableShadowTransfer() must be called to enable the shadow transfer of the all the slices, which needs to be cascaded.
Related APIs:
XMC_CCU4_EnableShadowTransfer(), XMC_CCU4_SLICE_DisableCascadedShadowTransfer()
.
Note
Only available for XMC1400 series
void XMC_CCU4_SLICE_EnableDithering | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const bool | period_dither,
 |  | const bool | duty_dither,
 |  | const uint8_t | spread
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
period_dither | Boolean instruction on dithering of period match
duty_dither | Boolean instruction on dithering of compare match
spread | Dither compare value
Returns

None
Description:
Enables dithering of PWM frequency and duty cycle, by configuring CC4yTC.DITHE and CC4yDITS bits.

Some control loops are slow in updating PWM frequency and duty cycle. In such a case, a Bresenham style dithering can help reduce long term errors. Dithering can be applied to period and duty individually, this can be selected using the parameter period_dither and duty_dither. The spread would provide the dither compare value. If the dither counter value is less than this spread then the period/compare values would be dithered according to the dither mode selected. This API would invoke XMC_CCU4_SLICE_SetDitherCompareValue().
Note:
After this API call, XMC_CCU4_EnableShadowTransfer() has to be called with appropriate mask to transfer the dither value.
Related APIs:
XMC_CCU4_SLICE_DisableDithering().
void XMC_CCU4_SLICE_EnableEvent | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Event whose assertion can potentially lead to an interrupt
Returns

None
Description:
Enables the generation of an interrupt pulse for the event, by configuring CC4yINTE register.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API merely enables the event. Binding with SR is performed by another API.
Related APIs:
XMC_CCU4_SLICE_SetInterruptNode()
XMC_CCU4_SLICE_EnableMultipleEvents()
XMC_CCU4_SLICE_DisableEvent()
XMC_CCU4_SLICE_DisableMultipleEvents().
void XMC_CCU4_SLICE_EnableFloatingPrescaler ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Enables the floating prescaler, by setting CC4yTC.FPE bit.

The prescaler divider starts with an initial value and increments upon every period match. It keeps incrementing until a ceiling (prescaler compare value) is hit and thereafter rolls back to the original prescaler divider value.
It is necessary to have programmed an initial divider value and a compare value before the feature is enabled.
Related APIs:
XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue()
XMC_CCU4_SLICE_DisableFloatingPrescaler()
XMC_CCU4_SLICE_SetPrescaler().
void XMC_CCU4_SLICE_EnableMultiChannelMode ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Enables the multichannel mode, by setting CC4yTC.MCME bit.

The output state of the Timer slices can be controlled in parallel by a single input signal. A particularly useful feature in motor control applications where the PWM output of multiple slices of a module can be gated and ungated by multi-channel gating inputs connected to the slices. A peripheral like POSIF connected to the motor knows exactly which of the power drive switches are to be turned on and off at any instant. It can thus through a gating bus (known as multi-channel inputs) control which of the slices output stays gated/ungated.
Related APIs:
XMC_CCU4_SLICE_DisableMultiChannelMode()
XMC_CCU4_SetMultiChannelShadowTransferMode().
void XMC_CCU4_SLICE_EnableMultipleEvents | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint16_t | intr_mask
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
intr_mask | Event mask such that multiple events can be enabled. Use XMC_CCU4_SLICE_MULTI_IRQ_ID_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Enables the generation of an interrupt pulse for the required events, by configuring CC4yINTE register.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API merely enables the events. Binding with SR is performed by another API.
Related APIs:
XMC_CCU4_SLICE_SetInterruptNode()
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_DisableEvent()
XMC_CCU4_SLICE_DisableMultipleEvents().
void XMC_CCU4_SLICE_EnableTrap ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Enables the trap feature, by setting CC4yTC.TRAPE0, CC4yTC.TRAPE1, CC4yTC.TRAPE2 and CC4yTC.TRAPE3 bit based on the out_mask.

A particularly useful feature where the PWM output can be forced inactive upon detection of a trap. The trap signal can be the output of a sensing element which has just detected an abnormal electrical condition.
Related APIs:
XMC_CCU4_SLICE_TrapConfig()
XMC_CCU4_SLICE_DisableTrap()
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_GateConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External Gating Function
Returns

None
Description:
Configures the Gating Function of the slice, by configuring CC4yCMC.GATES bit.

Gating function is mapped with one of the 3 events. A CCU4 slice can use an input signal that would operate as counter gating. If the configured Active level is detected the counter will gate all the pulses.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
uint32_t XMC_CCU4_SLICE_GetCapturedValueFromFifo | ( | const XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_CAP_REG_SET_t | set
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
set | The capture register set from which the captured value is to be retrieved
Returns

uint32_t Returns the value captured in the slice_number Range: [0x0 to 0xFFFF]
Description:
Read captured value from FIFO(CC4yECRD0 and CC4yECRD1).

This is applicable only in the Capture mode of operation. The signal whose timing characteristics are to be measured must be mapped to an event which in turn must be mapped to the capture function. Based on the capture criteria, the instant timer values are captured into capture registers. Timing characteristics of the input signal may then be derived/inferred from the captured values.
Related APIs:
XMC_CCU4_SLICE_IsExtendedCapReadEnabled().
Note
Defined for XMC4800, XMC4700, XMC4500, XMC4400, XMC4200, XMC4100 devices only. For other devices use XMC_CCU4_GetCapturedValueFromFifo() API
uint32_t XMC_CCU4_SLICE_GetCaptureRegisterValue | ( | const XMC_CCU4_SLICE_t *const | slice,
 |  | const uint8_t | reg_num
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
reg_num | The capture register from which the captured value is to be retrieved Range: [0,3]
Returns

uint32_t Returns the Capture register value. Range: [0 to 0x1FFFFF]
Description:
Retrieves timer value which has been captured in the Capture registers, by reading CC4yCV[reg_num] register.

The signal whose timing characteristics are to be measured must be mapped to an event which in turn must be mapped to the capture function. Based on the capture criteria, the timer values are captured into capture registers. Timing characteristics of the input signal may then be derived/inferred from the captured values. The full flag will help to find out if there is a new captured value present.
Related APIs:
XMC_CCU4_SLICE_GetLastCapturedTimerValue().
XMC_CCU4_SLICE_TIMER_COUNT_DIR_t XMC_CCU4_SLICE_GetCountingDir ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

XMC_CCU4_SLICE_TIMER_COUNT_DIR_t returns the direction in which the timer is counting.
Description:
Returns the timer counting direction, by reading CC4yTCST.CDIR bit.

This API will return the direction in which the timer is currently incrementing(XMC_CCU4_SLICE_TIMER_COUNT_DIR_UP) or decrementing (XMC_CCU4_SLICE_TIMER_COUNT_DIR_DOWN).
Related APIs:
None.
bool XMC_CCU4_SLICE_GetEvent | ( | const XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Event to be evaluated for assertion
Returns

bool Returns true if event is set else false is returned.
Description:
Evaluates if a given event is asserted or not, by reading CC4yINTS register.

Return true if the event is asserted. For a event to be asserted it has to be first enabled. Only if that event is enabled the call to this API is valid. If the Event is enabled and has not yet occurred then a false is returned.
Related APIs:
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_SetEvent().
XMC_CCU4_STATUS_t XMC_CCU4_SLICE_GetLastCapturedTimerValue | ( | const XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_CAP_REG_SET_t | set,
 |  | uint32_t * | val_ptr
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
set | The capture register set, which must be evaluated
val_ptr | Out Parameter of the API.Stores the captured timer value into this out parameter.
Returns

XMC_CCU4_STATUS_t Returns XMC_CCU4_STATUS_OK if there was new value present in the capture registers. returns XMC_CCU4_STATUS_ERROR if there was no new value present in the capture registers.
Description:
Retrieves the latest captured timer value, by reading CC4yCV registers.

Retrieve the timer value last stored by the slice. When separate capture events are used, users must specify the capture set to evaluate. If single capture event mode is used, all 4 capture registers are evaluated.
The lowest register is evaluated first followed by the next higher ordered register and this continues until all capture registers have been evaluated.
Related APIs:
XMC_CCU4_SLICE_GetCaptureRegisterValue().
XMC_CCU4_SLICE_MODE_t XMC_CCU4_SLICE_GetSliceMode ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

XMC_CCU4_SLICE_MODE_t returns XMC_CCU4_SLICE_MODE_COMPARE if the slice is operating in compare mode returns XMC_CCU4_SLICE_MODE_CAPTURE if the slice is operating in capture mode
Description:
Retrieves the current mode of operation in the slice (either Capture mode or Compare mode), by reading CC4yTC.CMOD bit.

Ensure that before invoking this API the CCU4 slice should be configured otherwise the output of this API is invalid.
Related APIs:
None.
uint16_t XMC_CCU4_SLICE_GetTimerCompareMatch ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

uint16_t returns the current timer compare value Range: [0x0 to 0xFFFF]
Description:
Retrieves the timer compare value currently effective, by reading CC4yCRS register.

If the timer is active then the value being returned is currently being for the PWM duty cycle( timer compare value).
Note:
The XMC_CCU4_SLICE_SetTimerCompareMatch() would set the new compare value to a shadow register. This would only transfer the new values into the actual compare register if the shadow transfer request is enabled and if a period match occurs. Hence a consecutive call to XMC_CCU4_SLICE_GetTimerCompareMatch() would not reflect the new values until the shadow transfer completes. Directly accessed Register is CC4yCR.
Related APIs:
XMC_CCU4_SLICE_SetTimerCompareMatch().
XMC_CCU4_SLICE_TIMER_COUNT_MODE_t XMC_CCU4_SLICE_GetTimerCountingMode ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

XMC_CCU4_SLICE_TIMER_COUNT_MODE_t returns XMC_CCU4_SLICE_TIMER_COUNT_MODE_EA if edge aligned mode is selected returns XMC_CCU4_SLICE_TIMER_COUNT_MODE_CA if center aligned mode is selected
Description:
Retrieves timer counting mode either Edge aligned or Center Aligned, by reading CC4yTC.TCM bit.

Related APIs:
XMC_CCU4_SLICE_SetTimerCountingMode().
uint16_t XMC_CCU4_SLICE_GetTimerPeriodMatch ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

uint16_t returns the current timer period value Range: [0x0 to 0xFFFF]
Description:
Retrieves the timer period value currently effective, by reading CC4yPR register.

If the timer is active then the value being returned is currently being used for the PWM period.
Note:
The XMC_CCU4_SLICE_SetTimerPeriodMatch() would set the new period value to a shadow register. This would only transfer the new values into the actual period register if the shadow transfer request is enabled and if a period match occurs. Hence a consecutive call to XMC_CCU4_SLICE_GetTimerPeriodMatch() would not reflect the new values until the shadow transfer completes.
Related APIs:
XMC_CCU4_SLICE_SetTimerPeriodMatch().
XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t XMC_CCU4_SLICE_GetTimerRepeatMode ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t returns XMC_CCU4_SLICE_TIMER_REPEAT_MODE_REPEAT if continuous mode is selected returns XMC_CCU4_SLICE_TIMER_REPEAT_MODE_SINGLE if single shot mode is selected
Description:
Retrieves the Timer repeat mode, either Single shot mode or continuous mode, by reading CC4yTC.TSSM bit.

The timer will count up to the terminal count as specified in the period register and stops immediately if the repeat mode has been set to single shot mode. In the continuous mode of operation, the timer starts counting all over again after reaching the terminal count.
Related APIs:
XMC_CCU4_SLICE_SetTimerRepeatMode().
uint16_t XMC_CCU4_SLICE_GetTimerValue ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

uint16_t returns the current timer value Range: [0x0 to 0xFFFF]
Description:
Retrieves the latest timer value, from CC4yTIMER register.

Related APIs:
XMC_CCU4_SLICE_SetTimerValue().
bool XMC_CCU4_SLICE_IsExtendedCapReadEnabled ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

bool would return true if the extended capture read back mode is enabled
Description:
Checks if Extended capture mode read is enabled for particular slice or not, by reading CC4yTC.ECM bit.

In this mode the there is only one associated read address for all the capture registers. Individual capture registers can still be accessed in this mode.
Related APIs:
XMC_CCU4_GetCapturedValueFromFifo().
bool XMC_CCU4_SLICE_IsTimerRunning ( const XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

bool returns true if the Timer is running else it returns false.
Description:
Returns the state of the timer (Either Running or stopped(idle)), by reading CC4yTCST.TRB bit.
Related APIs:
XMC_CCU4_SLICE_StartTimer()
XMC_CCU4_SLICE_StopTimer().
void XMC_CCU4_SLICE_LoadConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External load Function
Returns

None
Description:
Configures the Load Function for the slice, by configuring CC4yCMC.LDS bit.

Load function is mapped with one of the 3 events. Up on occurrence of the event,
if CC4yTCST.CDIR set to 0,CC4yTIMER register is reloaded with the value from compare register
if CC4yTCST.CDIR set to 1,CC4yTIMER register is reloaded with the value from period register
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_ModulationConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event,
 |  | const XMC_CCU4_SLICE_MODULATION_MODE_t | mod_mode,
 |  | const bool | synch_with_pwm
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External Modulation Function
mod_mode | Desired Modulation mode
synch_with_pwm | Option to synchronize modulation with PWM start Pass true if the modulation needs to be synchronized with PWM signal.
Returns

None
Description:
Configures the Output Modulation Function of the slice, by configuring CCeyCMC.MOS, CC4yTC.EMT and CC4yTC.EMS bits.

Modulation function is mapped with one of the 3 events. The output signal of the CCU can be modulated according to a external input. Additionally, the behaviour of the slice upon activation of the modulation function is configured as well.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_SetDitherCompareValue | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint8_t | comp_val
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
comp_val | Dither compare value Range: [0x0 to 0xF]
Returns

None
Description:
Sets the dither spread/compare value, by setting CC4yDITS.DCVS bits.

This value is the cornerstone of PWM dithering feature. Dithering is applied/done when the value in the dithering counter is less than this compare/spread value. For all dithering counter values greater than the spread value, there is no dithering. After setting the value XMC_CCU4_EnableShadowTransfer() has to be called with appropriate mask.
Related APIs:
XMC_CCU4_SLICE_EnableDithering().
void XMC_CCU4_SLICE_SetEvent | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Event whose assertion can potentially lead to an interrupt
Returns

None
Description:
Manually asserts the requested event, by setting CC4ySWS register.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API manually asserts the requested event.
Related APIs:
XMC_CCU4_SLICE_SetInterruptNode()
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_EnableMultipleEvents().
void XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint8_t | cmp_val
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
cmp_val | Prescaler divider compare value Range: [0x0 to 0xF]
Returns

None
Description:
Programs the slice specific prescaler divider compare value, by configuring CC4yFPCS register.

The compare value is applicable only in floating mode of operation. The prescaler divider starts with an initial value and increments to the compare value steadily upon every period match. Once prescaler divider equals the prescaler divider compare value, the value in the former resets back to the PVAL (from FPC). After setting the value, XMC_CCU4_EnableShadowTransfer() has to be called with appropriate mask.
Related APIs:
XMC_CCU4_SLICE_SetPrescaler().
void XMC_CCU4_SLICE_SetInput | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event,
 |  | const XMC_CCU4_SLICE_INPUT_t | input
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | The External Event which needs to be configured.
input | One of the 16 inputs meant to be mapped to the desired event
Returns

None
Description:
Selects an input for an external event, by configuring CC4yINS register.

It is possible to select one of the possible 16 input signals for a given Event. This configures the CC4yINS.EVxIS for the selected event.
Related APIs:
XMC_CCU4_SLICE_StartConfig()
XMC_CCU4_SLICE_StopConfig()
XMC_CCU4_SLICE_LoadConfig()
XMC_CCU4_SLICE_ModulationConfig()
XMC_CCU4_SLICE_CountConfig()
XMC_CCU4_SLICE_GateConfig()
XMC_CCU4_SLICE_Capture0Config()
XMC_CCU4_SLICE_Capture1Config()
XMC_CCU4_SLICE_DirectionConfig()
XMC_CCU4_SLICE_StatusBitOverrideConfig()
XMC_CCU4_SLICE_TrapConfig().
void XMC_CCU4_SLICE_SetInterruptNode | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_IRQ_ID_t | event,
 |  | const XMC_CCU4_SLICE_SR_ID_t | sr
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Event which must be bound to a service request line
sr | The Service request line which is bound to the event
Returns

None
Description:
Binds requested event to a service request line, by configuring CC4ySRS register with respective event.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API binds the requested event with the requested service request line(sr).
Related APIs:
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_SetEvent().
void XMC_CCU4_SLICE_SetPassiveLevel | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t | level
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
level | Slice output passive level
Returns

None
Description:
Configures the passive level for the slice output, by setting CC4yPSL register.

Defines the passive level for the timer slice output pin. Selects either level high is passive or level low is passive. This is the level of the output before the compare match is value changes it.
Related APIs:
XMC_CCU4_SLICE_EnableEvent()
XMC_CCU4_SLICE_SetEvent().
void XMC_CCU4_SLICE_SetPrescaler | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_PRESCALER_t | div_val
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
div_val | Prescaler divider value. Accepts enum :: XMC_CCU4_SLICE_PRESCALER_t Range: [0x0 to 0xF]
Returns

None
Description:
Programs the slice specific prescaler divider, by configuring the CC4yPSC and CC4yFPC registers.

The prescaler divider may only be programmed after the prescaler run bit has been cleared by calling XMC_CCU4_StopPrescaler().
Related APIs:
XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue().
void XMC_CCU4_SLICE_SetShadowTransferMode | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t | shadow_transfer_mode
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
shadow_transfer_mode | mode to be configured Use :: XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t enum items for mode
Returns

None
Description:
Configures when the shadow transfer has to occur, by setting STM bit in STC register.

After requesting for shadow transfer mode using XMC_CCU4_EnableShadowTransfer(), actual transfer occurs based on the selection done using this API (i.e. on period and One match, on Period match only, on One match only).
Note:
This is effective when the timer is configured in centre aligned mode.
Related APIs:
XMC_CCU4_EnableShadowTransfer()
Note
Only available for XMC1400 series
void XMC_CCU4_SLICE_SetTimerCompareMatch | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint16_t | compare_val
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
compare_val | Timer compare value
Returns

None
Description:
Programs the timer compare value, by writing CC4yCRS register.

The PWM duty cycle is determined by this value. The compare value is written to a shadow register. Explicitly enable the shadow transfer for the the period/compare value by calling XMC_CCU4_EnableShadowTransfer() with appropriate mask.If shadow transfer is enabled and the timer is running, a period match transfers the value from the shadow register to the actual compare register.
Related APIs:
XMC_CCU4_SLICE_GetTimerPeriodMatch().
void XMC_CCU4_SLICE_SetTimerCountingMode | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_TIMER_COUNT_MODE_t | mode
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
mode | Desired counting mode (Either Edge Aligned or Center Aligned)
Returns

None
Description:
Configures the timer counting mode either Edge Aligned or Center Aligned, by configuring CC4yTC.TCM bit.

In the edge aligned mode, the timer counts from 0 to the terminal count. Once the timer count has reached a preset compare value, the timer status output asserts itself. It will now deassert only after the timer count reaches the terminal count.
In the center aligned mode, the timer first counts from 0 to the terminal count and then back to 0. During this upward and downward counting, the timer status output stays asserted as long as the timer value is greater than the compare value.
Related APIs:
XMC_CCU4_SLICE_GetTimerCountingMode().
void XMC_CCU4_SLICE_SetTimerPeriodMatch | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint16_t | period_val
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
period_val | Timer period value Range: [0x0 to 0xFFFF]
Returns

None
Description:
Programs the timer period, by writing CC4yPRS register.

The frequency of counting/ PWM frequency is determined by this value. The period value is written to a shadow register. Explicitly enable the shadow transfer for the the period value by calling XMC_CCU4_EnableShadowTransfer() with appropriate mask. If shadow transfer is enabled and the timer is running, a period match transfers the value from the shadow register to the actual period register.
Related APIs:
XMC_CCU4_SLICE_GetTimerPeriodMatch().
void XMC_CCU4_SLICE_SetTimerRepeatMode | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t | mode
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
mode | Desired repetition mode (Either single shot or Continuous)
Returns

None
Description:
Configures the Timer to either Single shot mode or continuous mode, by configuring CC4yTC.TSSM bit.

The timer will count up to the terminal count as specified in the period register and stops immediately if the repeat mode has been set to single shot. In the continuous mode of operation, the timer starts counting all over again after reaching the terminal count.
Related APIs:
XMC_CCU4_SLICE_GetTimerRepeatMode().
void XMC_CCU4_SLICE_SetTimerValue | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint16_t | timer_val
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
timer_val | The new timer value that has to be loaded into the TIMER register. Range: [0x0 to 0xFFFF]
Returns

None
Description:
Loads a new timer value, by setting CC4yTIMER register.

Note:
Request to load is ignored if the timer is running.
Related APIs:
XMC_CCU4_SLICE_GetTimerValue().
void XMC_CCU4_SLICE_StartConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event,
 |  | const XMC_CCU4_SLICE_START_MODE_t | start_mode
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External Start Function
start_mode | Behavior of slice when the start function is activated
Returns

None
Description:
Configures the Start Function of the slice, by configuring CC4yCMC.ENDS and CC4yTC.ENDM bits.

Start function is mapped with one of the 3 events. An external signal can control when a CC4 timer should start. Additionally, the behaviour of the slice upon activation of the start function is configured as well.
Related APIs:
XMC_CCU4_SLICE_StopConfig()
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_StartTimer ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Starts the timer counting operation, by setting CC4yTCSET.TRBS bit.

It is necessary to have configured the CC4 slice before starting its timer. Before the Timer is started ensure that the clock is provided to the slice.
Related APIs:
XMC_CCU4_SLICE_StopTimer().
void XMC_CCU4_SLICE_StatusBitOverrideConfig ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Configures the status bit override Function of the slice, by configuring CC4yCMC.OFS bit.

Status bit override function is mapped with one of the 3 events. A slice can be configured to change the output of the timer's CC4yST signal depending on an external signal.
Related APIs:
XMC_CCU4_SLICE_ConfigureStatusBitOverrideEvent().
void XMC_CCU4_SLICE_StopClearTimer ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Stops and resets the timer count to zero, by setting CC4yTCCLR.TCC and CC4yTCCLR.TRBC bit.

Related APIs:
XMC_CCU4_SLICE_StartTimer().
void XMC_CCU4_SLICE_StopConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_EVENT_t | event,
 |  | const XMC_CCU4_SLICE_END_MODE_t | end_mode
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
event | Map an External event to the External Stop Function
end_mode | Behavior of slice when the stop function is activated
Returns

None
Description:
Configures the Stop function for the slice, by configuring CC4yCMC.STRTS and CC4yTC.STRM bits.

Stop function is mapped with one of the 3 events. An external signal can control when a CCU4 timer should stop. Additionally, the behaviour of the slice upon activation of the stop function is configured as well.
Related APIs:
XMC_CCU4_SLICE_StartConfig()
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_StopTimer ( XMC_CCU4_SLICE_t *const slice )
Parameters
slice Constant pointer to CC4 Slice
Returns

None
Description:
Stops the Timer.

Timer counting operation can be stopped by invoking this API, by setting CC4yTCCLR.TRBC bit.
Related APIs:
XMC_CCU4_SLICE_StartTimer().
void XMC_CCU4_SLICE_TrapConfig | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const XMC_CCU4_SLICE_TRAP_EXIT_MODE_t | exit_mode,
 |  | bool | synch_with_pwm
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
exit_mode | How should a previously logged trap state be exited?
synch_with_pwm | Should exit of trap state be synchronized with PWM cycle start?
Returns

None
Description:
Configures the Trap Function of the slice, by configuring CC4yCMC.TS, CC4yTC.TRPSE, and CC4yTC.TRPSW bits.

Trap function is mapped with Event-2. Criteria for exiting the trap state is configured. This trap function allows PWM outputs to react on the state of an input pin. Thus PWM output can be forced to inactive state upon detection of a trap. It is also possible to synchronize the trap function with the PWM signal using the synch_with_pwm.
Related APIs:
XMC_CCU4_SLICE_ConfigureEvent()
XMC_CCU4_SLICE_SetInput().
void XMC_CCU4_SLICE_WriteCoherentlyWithPWMCycle | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint32_t | coherent_write
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
coherent_write | specifies for what fields this mode has to be applied Use :: XMC_CCU4_SLICE_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configures the specified fields shadow value to be updated in synchronous with PWM after shadow transfer request, by clearing IRPC, IRCC1, IRCC2, IRLC, IRDC, IRFC bits in STC register.

When coherent shadow is enabled, after calling XMC_CCU4_EnableShadowTransfer(), the value which are written in the respective shadow registers get updated according the configuration done using XMC_CCU4_SLICE_SetShadowTransferMode() API.
Note:
Related APIs:
XMC_CCU4_EnableShadowTransfer(), XMC_CCU4_SLICE_SetShadowTransferMode()
Note
Only available for XMC1400 series
void XMC_CCU4_SLICE_WriteImmediateAfterShadowTransfer | ( | XMC_CCU4_SLICE_t *const | slice,
 |  | const uint32_t | immediate_write
 | ) |  |
Parameters
slice | Constant pointer to CC4 Slice
immediate_write | specifies for what fields this mode has to be applied Use :: XMC_CCU4_SLICE_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configures the specified fields shadow value to be updated immediately after shadow transfer request, by setting IRPC, IRCC1, IRCC2, IRLC, IRDC, IRFC bits in STC register.

When immediate shadow is enabled, by calling XMC_CCU4_EnableShadowTransfer() the value which are written in the shadow registers get updated to the actual registers immediately.
Note:
Related APIs:
XMC_CCU4_EnableShadowTransfer()
Note
Only available for XMC1400 series
void XMC_CCU4_StartPrescaler ( XMC_CCU4_MODULE_t *const module )
Parameters
module Constant pointer to CCU4 module
Returns

None
Description:
Starts the prescaler and restores clocks to the timer slices, by setting GIDLC.SPRB bit.

Once the input to the prescaler has been chosen and the prescaler divider of all slices programmed, the prescaler itself may be started. Invoke this API after XMC_CCU4_Init() (Mandatory to fully initialize the module).Directly accessed register is GIDLC.
Related APIs:
XMC_CCU4_Init()
XMC_CCU4_EnableClock()
XMC_CCU4_DisableClock()
XMC_CCU4_StartPrescaler()
XMC_CCU4_StopPrescaler().
void XMC_CCU4_StopPrescaler ( XMC_CCU4_MODULE_t *const module )
Parameters
module Constant pointer to CCU4 module
Returns

None
Description:
Stops the prescaler and blocks clocks to the timer slices, by setting GIDLS.CPRB bit.

Opposite of the StartPrescaler routine. Clears the run bit of the prescaler. Ensures that the module clock is not supplied to the slices of the module.Registers directly accessed is GIDLS.
Related APIs:
XMC_CCU4_EnableClock()
XMC_CCU4_DisableClock()
XMC_CCU4_StartPrescaler()
XMC_CCU4_StopPrescaler().
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_CCU4_SLICE_CAPTURE_CONFIG_t Struct Reference

Data Fields
XMC_CCU4_SLICE_CAPTURE_CONFIG_t Struct Reference
XMC Peripheral Library » CCU4

#include <xmc_ccu4.h>

Data Fields

uint32_t | float_limit: 4
uint32_t | prescaler_initval: 4
uint32_t | timer_concatenation: 1
uint32_t | fifo_enable: 1
uint32_t | ignore_full_flag: 1
uint32_t | prescaler_mode: 1
uint32_t | same_event: 1
uint32_t | timer_clear_mode: 2

Detailed Description

Configuration data structure for CCU4 slice. Specifically configures the CCU4 slice to capture mode operation. This excludes event and function configuration.

Field Documentation

uint32_t fifo_enable

Should the capture registers be setup as a FIFO?(Extended capture mode)

uint32_t float_limit

The max value which the prescaler divider can increment to

uint32_t ignore_full_flag

Should updates to capture registers follow full flag rules?

uint32_t prescaler_initval

Prescaler divider value

uint32_t prescaler_mode

Normal or floating prescaler Accepts enum :: XMC_CCU4_SLICE_PRESCALER_MODE_t

uint32_t same_event

Should the capture event for C1V/C0V and C3V/C2V be same capture edge?

uint32_t timer_clear_mode

How should the timer register be cleared upon detection of capture event? Accepts enum XMC_CCU4_SLICE_TIMER_CLEAR_MODE_t

uint32_t timer_concatenation

Enables the concatenation of the timer

The documentation for this struct was generated from the following file:
  • xmc_ccu4.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_CCU4_SLICE_COMPARE_CONFIG_t Struct Reference

Data Fields
XMC_CCU4_SLICE_COMPARE_CONFIG_t Struct Reference
XMC Peripheral Library » CCU4

#include <xmc_ccu4.h>

Data Fields

uint32_t | dither_limit: 4
uint32_t | float_limit: 4
uint32_t | passive_level: 1
uint32_t | prescaler_initval: 4
uint32_t | timer_concatenation: 1
uint32_t | dither_duty_cycle: 1
uint32_t | dither_timer_period: 1
uint32_t | mcm_enable: 1
uint32_t | monoshot: 1
uint32_t | prescaler_mode: 1
uint32_t | shadow_xfer_clear: 1
uint32_t | timer_mode: 1

Detailed Description

Configuration data structure for CCU4 slice. Specifically configures the CCU4 slice to compare mode operation. This excludes event and function configuration.

Field Documentation

uint32_t dither_duty_cycle

Can the compare match of the timer dither?

uint32_t dither_limit

The value that determines the spreading of dithering

uint32_t dither_timer_period

Can the period of the timer dither?

uint32_t float_limit

The max value which the prescaler divider can increment to

uint32_t mcm_enable

Multi-Channel mode enable?

uint32_t monoshot

Single shot or Continuous mode . Accepts enum :: XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t

uint32_t passive_level

Configuration of ST and OUT passive levels. Accepts enum :: XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t

uint32_t prescaler_initval

Initial prescaler divider value Accepts enum :: XMC_CCU4_SLICE_PRESCALER_t

uint32_t prescaler_mode

Normal or floating prescaler mode. Accepts enum :: XMC_CCU4_SLICE_PRESCALER_MODE_t

uint32_t shadow_xfer_clear

Should PR and CR shadow xfer happen when timer is cleared?

uint32_t timer_concatenation

Enables the concatenation of the timer if true.

uint32_t timer_mode

Edge aligned or Centre Aligned. Accepts enum XMC_CCU4_SLICE_TIMER_COUNT_MODE_t

The documentation for this struct was generated from the following file:
  • xmc_ccu4.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_CCU4_SLICE_EVENT_CONFIG_t Struct Reference

Data Fields
XMC_CCU4_SLICE_EVENT_CONFIG_t Struct Reference
XMC Peripheral Library » CCU4

#include <xmc_ccu4.h>

Data Fields

XMC_CCU4_SLICE_EVENT_FILTER_t duration
XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_t edge
XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_t level
XMC_CCU4_SLICE_INPUT_t mapped_input

Detailed Description

Configuration data structure of an External Event(Event-0/1/2). Needed to configure the various aspects of an External Event. This structure will not connect the external event with an external function.

Field Documentation

XMC_CCU4_SLICE_EVENT_FILTER_t duration

Low Pass filter duration in terms of fCCU clock cycles

XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_t edge

Select the event edge of the input signal. This is needed for an edge sensitive External function.

XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_t level

Select the event level of the input signal. This is needed for an level sensitive External function.

XMC_CCU4_SLICE_INPUT_t mapped_input

Required input signal for the Event

The documentation for this struct was generated from the following file:
  • xmc_ccu4.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: CCU8

Data Structures | Typedefs | Enumerations | Functions
CCU8
XMC Peripheral Library

Data Structures

struct | XMC_CCU8_SLICE_CAPTURE_CONFIG_t
struct | XMC_CCU8_SLICE_COMPARE_CONFIG_t
struct | XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t
struct | XMC_CCU8_SLICE_EVENT_CONFIG_t

Typedefs

typedef CCU8_GLOBAL_TypeDef | XMC_CCU8_MODULE_t
typedef uint8_t | XMC_CCU8_SLICE_INPUT_t
typedef CCU8_CC8_TypeDef | XMC_CCU8_SLICE_t

Enumerations

Functions

void | XMC_CCU8_DisableClock (XMC_CCU8_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU8_DisableModule (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_EnableClock (XMC_CCU8_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU8_EnableModule (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_EnableMultipleClocks (XMC_CCU8_MODULE_t *const module, const uint8_t clock_mask)
void | XMC_CCU8_EnableShadowTransfer (XMC_CCU8_MODULE_t *const module, const uint32_t shadow_transfer_msk)
void | XMC_CCU8_Init (XMC_CCU8_MODULE_t *const module, const XMC_CCU8_SLICE_MCMS_ACTION_t mcs_action)
bool | XMC_CCU8_IsPrescalerRunning (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_SetModuleClock (XMC_CCU8_MODULE_t *const module, const XMC_CCU8_CLOCK_t clock)
void | XMC_CCU8_SetMultiChannelShadowTransferMode (XMC_CCU8_MODULE_t *const module, const uint32_t slice_mode_msk)
void | XMC_CCU8_SLICE_Capture0Config (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_Capture1Config (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_CaptureInit (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_CAPTURE_CONFIG_t *const capture_init)
void | XMC_CCU8_SLICE_ClearEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_ClearTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_CompareInit (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CONFIG_t *const compare_init)
void | XMC_CCU8_SLICE_ConfigureDeadTime (XMC_CCU8_SLICE_t *const slice, const uint8_t mask)
void | XMC_CCU8_SLICE_ConfigureEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_EVENT_CONFIG_t *config)
void | XMC_CCU8_SLICE_ConfigureStatusBitOutput (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_STATUS_t channel)
void | XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_CONFIG_t *const ev1_config, const XMC_CCU8_SLICE_EVENT_CONFIG_t *const ev2_config)
void | XMC_CCU8_SLICE_CountConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_DeadTimeInit (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t *const config)
void | XMC_CCU8_SLICE_DirectionConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest (XMC_CCU8_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU8_SLICE_DisableCascadedShadowTransfer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_DisableDithering (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_DisableEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_DisableFloatingPrescaler (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_DisableMultiChannelMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
void | XMC_CCU8_SLICE_DisableMultipleEvents (XMC_CCU8_SLICE_t *const slice, const uint16_t mask)
void | XMC_CCU8_SLICE_DisableTrap (XMC_CCU8_SLICE_t *const slice, const uint32_t out_mask)
void | XMC_CCU8_SLICE_EnableAsymmetricCompareMode (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest (XMC_CCU8_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU8_SLICE_EnableCascadedShadowTransfer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableDithering (XMC_CCU8_SLICE_t *const slice, const bool period_dither, const bool duty_dither, const uint8_t spread)
void | XMC_CCU8_SLICE_EnableEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_EnableFloatingPrescaler (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableMultiChannelMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
void | XMC_CCU8_SLICE_EnableMultipleEvents (XMC_CCU8_SLICE_t *const slice, const uint16_t mask)
void | XMC_CCU8_SLICE_EnableSymmetricCompareMode (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableTrap (XMC_CCU8_SLICE_t *const slice, const uint32_t out_mask)
void | XMC_CCU8_SLICE_GateConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
uint32_t | XMC_CCU8_SLICE_GetCapturedValueFromFifo (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_CAP_REG_SET_t set)
uint32_t | XMC_CCU8_SLICE_GetCaptureRegisterValue (const XMC_CCU8_SLICE_t *const slice, const uint8_t reg_num)
XMC_CCU8_SLICE_TIMER_COUNT_DIR_t | XMC_CCU8_SLICE_GetCountingDir (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_GetEvent (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
XMC_CCU8_STATUS_t | XMC_CCU8_SLICE_GetLastCapturedTimerValue (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_CAP_REG_SET_t set, uint32_t *val_ptr)
XMC_CCU8_SLICE_MODE_t | XMC_CCU8_SLICE_GetSliceMode (const XMC_CCU8_SLICE_t *const slice)
uint16_t | XMC_CCU8_SLICE_GetTimerCompareMatch (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel)
XMC_CCU8_SLICE_TIMER_COUNT_MODE_t | XMC_CCU8_SLICE_GetTimerCountingMode (const XMC_CCU8_SLICE_t *const slice)
uint16_t | XMC_CCU8_SLICE_GetTimerPeriodMatch (const XMC_CCU8_SLICE_t *const slice)
XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t | XMC_CCU8_SLICE_GetTimerRepeatMode (const XMC_CCU8_SLICE_t *const slice)
uint16_t | XMC_CCU8_SLICE_GetTimerValue (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsDeadTimeCntr1Running (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsDeadTimeCntr2Running (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsExtendedCapReadEnabled (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsTimerRunning (const XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_LoadConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_LoadSelector (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
void | XMC_CCU8_SLICE_ModulationConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_MODULATION_MODE_t mod_mode, const XMC_CCU8_SLICE_MODULATION_CHANNEL_t channel, const bool synch_with_pwm)
void | XMC_CCU8_SLICE_SetDeadTimePrescaler (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_DTC_DIV_t div_val)
void | XMC_CCU8_SLICE_SetDeadTimeValue (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel, const uint8_t rise_value, const uint8_t fall_value)
void | XMC_CCU8_SLICE_SetDitherCompareValue (XMC_CCU8_SLICE_t *const slice, const uint8_t comp_val)
void | XMC_CCU8_SLICE_SetEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue (XMC_CCU8_SLICE_t *const slice, const uint8_t cmp_val)
void | XMC_CCU8_SLICE_SetInput (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_INPUT_t input)
void | XMC_CCU8_SLICE_SetInterruptNode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event, const XMC_CCU8_SLICE_SR_ID_t sr)
void | XMC_CCU8_SLICE_SetOutPath (XMC_CCU8_SLICE_t *const slice, const uint32_t out_path_msk)
void | XMC_CCU8_SLICE_SetPassiveLevel (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_OUTPUT_t out, const XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t level)
void | XMC_CCU8_SLICE_SetPrescaler (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_PRESCALER_t div_val)
void | XMC_CCU8_SLICE_SetShadowTransferMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t shadow_transfer_mode)
void | XMC_CCU8_SLICE_SetTimerCompareMatch (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel, const uint16_t compare_val)
void | XMC_CCU8_SLICE_SetTimerCompareMatchChannel1 (XMC_CCU8_SLICE_t *const slice, const uint16_t compare_val)
void | XMC_CCU8_SLICE_SetTimerCompareMatchChannel2 (XMC_CCU8_SLICE_t *const slice, const uint16_t compare_val)
void | XMC_CCU8_SLICE_SetTimerCountingMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TIMER_COUNT_MODE_t mode)
void | XMC_CCU8_SLICE_SetTimerPeriodMatch (XMC_CCU8_SLICE_t *const slice, const uint16_t period_val)
void | XMC_CCU8_SLICE_SetTimerRepeatMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t mode)
void | XMC_CCU8_SLICE_SetTimerValue (XMC_CCU8_SLICE_t *const slice, const uint16_t timer_val)
void | XMC_CCU8_SLICE_StartConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_START_MODE_t start_mode)
void | XMC_CCU8_SLICE_StartTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_StatusBitOverrideConfig (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_StopClearTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_StopConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_END_MODE_t end_mode)
void | XMC_CCU8_SLICE_StopTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_TrapConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TRAP_EXIT_MODE_t exit_mode, bool synch_with_pwm)
void | XMC_CCU8_SLICE_WriteCoherentlyWithPWMCycle (XMC_CCU8_SLICE_t *const slice, const uint32_t coherent_write)
void | XMC_CCU8_SLICE_WriteImmediateAfterShadowTransfer (XMC_CCU8_SLICE_t *const slice, const uint32_t immediate_write)
void | XMC_CCU8_StartPrescaler (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_StopPrescaler (XMC_CCU8_MODULE_t *const module)

Detailed Description

The CCU8 peripheral functions play a major role in applications that need complex Pulse Width Modulation (PWM) signal generation, with complementary high side and low side switches, multi phase control. These functions in conjunction with a very flexible and programmable signal conditioning scheme, make the CCU8 the must have peripheral for state of the art motor control, multi phase and multi level power electronics systems.
Each CCU8 module is comprised of four identical 16 bit Capture/Compare Timer slices, CC8y (where y = [0..4]). Each timer slice can work in compare mode or in capture mode.

APIs provided in this file cover the following functional blocks of CCU8: – Timer configuration, Capture configuration, Function/Event configuration, Interrupt configuration

Note:
  1. SLICE (APIs prefixed with e.g. XMC_CCU8_SLICE_)
  2. Module (APIs are not having any prefix e.g. XMC_CCU8_)
Timer(Compare mode) configuration:
This section of the LLD provides the configuration structure XMC_CCU8_SLICE_COMPARE_CONFIG_t, XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t and the initialization functions XMC_CCU8_SLICE_CompareInit(), XMC_CCU8_SLICE_DeadTimeInit().

It can be used to:

  1. Start and Stop the timer. (XMC_CCU8_SLICE_StartTimer(), XMC_CCU8_SLICE_StopTimer())
  2. Update the period, compare, Dither, Prescaler and Passive values. (XMC_CCU8_SLICE_SetTimerPeriodMatch(), XMC_CCU8_SLICE_SetTimerCompareMatch(), XMC_CCU8_SLICE_SetPrescaler(), XMC_CCU8_SLICE_SetDitherCompareValue(), XMC_CCU8_SLICE_SetPassiveLevel())
  3. Configure the dead time.(XMC_CCU8_SLICE_SetDeadTimeValue(), XMC_CCU8_SLICE_SetDeadTimePrescaler())
  4. Enable the slices to support multichannel mode. (XMC_CCU8_SLICE_EnableMultiChannelMode())
Capture configuration:
This section of the LLD provides the configuration structure XMC_CCU8_SLICE_CAPTURE_CONFIG_t and the initialization function XMC_CCU8_SLICE_CaptureInit().

It can be used to:

  1. Configure the capture functionality. (XMC_CCU8_SLICE_Capture0Config(), XMC_CCU8_SLICE_Capture1Config())
  2. Read the captured values along with the status, which indicate the value is latest or not. (XMC_CCU8_SLICE_GetCaptureRegisterValue())
Function/Event configuration:
This section of the LLD provides the configuration structure XMC_CCU8_SLICE_EVENT_CONFIG_t.

It can be used to:

  1. Enable and Disable the events. (XMC_CCU8_SLICE_EnableEvent(), XMC_CCU8_SLICE_DisableEvent())
  2. Configure to start and stop the timer on external events.(XMC_CCU8_SLICE_StartConfig(), XMC_CCU8_SLICE_StopConfig())
  3. Modulation, external load and Gating of the timer output.(XMC_CCU8_SLICE_ModulationConfig(), XMC_CCU8_SLICE_LoadConfig(), XMC_CCU8_SLICE_GateConfig())
  4. Control the count direction of the timer based on the external event. (XMC_CCU8_SLICE_DirectionConfig())
  5. Count the external events.(XMC_CCU8_SLICE_CountConfig())
  6. External Trap. Which can be used as protective feature.(XMC_CCU8_SLICE_EnableTrap(), XMC_CCU8_SLICE_DisableTrap(), XMC_CCU8_SLICE_TrapConfig())
Interrupt configuration:
This section of the LLD provides the function to configure the interrupt node to each event (XMC_CCU8_SLICE_SetInterruptNode())

Typedef Documentation

typedef CCU8_GLOBAL_TypeDef XMC_CCU8_MODULE_t

Typedef for CCU8 Global data structure

typedef uint8_t XMC_CCU8_SLICE_INPUT_t

External Event Input list. This list depicts the possible input connections to the CCU8 slice. Interconnects are specific to each device.

typedef CCU8_CC8_TypeDef XMC_CCU8_SLICE_t

Typedef for CCU8 Slice data structure

Enumeration Type Documentation

enum XMC_CCU8_CLOCK_t

CCU8 module clock

Enumerator
XMC_CCU8_CLOCK_SCU | Select the fCCU as the clock
XMC_CCU8_CLOCK_EXTERNAL_A | External clock-A
XMC_CCU8_CLOCK_EXTERNAL_B | External clock-B
XMC_CCU8_CLOCK_EXTERNAL_C | External clock-C
enum XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_t

CCU8 set the shadow transfer type for multichannel mode

Enumerator
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE0 | Shadow transfer through software only for slice 0
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE0 | Shadow transfer through software and hardware for slice 0
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE1 | Shadow transfer through software only for slice 1
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE1 | Shadow transfer through software and hardware for slice 1
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE2 | Shadow transfer through software only for slice 2
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE2 | Shadow transfer through software and hardware for slice 2
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE3 | Shadow transfer through software only for slice 3
XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE3 | Shadow transfer through software and hardware for slice 3
enum XMC_CCU8_OUT_PATH_t

Output selector for CCU8x.OUT0-3

Enumerator
XMC_CCU8_OUT_PATH_OUT0_ST1 | CCU8yST1 signal path is connected the CCU8x.OUT0
XMC_CCU8_OUT_PATH_OUT0_INV_ST1 | Inverted CCU8yST1 signal path is connected the CCU8x.OUT0
XMC_CCU8_OUT_PATH_OUT1_ST1 | CCU8yST1 signal path is connected the CCU8x.OUT1
XMC_CCU8_OUT_PATH_OUT1_INV_ST1 | Inverted CCU8yST1 signal path is connected the CCU8x.OUT1
XMC_CCU8_OUT_PATH_OUT2_ST2 | CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_OUT_PATH_OUT2_INV_ST2 | Inverted CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_OUT_PATH_OUT3_ST2 | CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_OUT_PATH_OUT3_INV_ST1 | Inverted CCU8yST2 signal path is connected the CCU8x.OUT3
enum XMC_CCU8_SHADOW_TRANSFER_t

Slice shadow transfer options.

Enumerator
XMC_CCU8_SHADOW_TRANSFER_SLICE_0 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-0
XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_0 | Transfer Dither compare shadow register value to actual register for SLICE-0
XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_0 | Transfer Prescaler shadow register value to actual register for SLICE-0
XMC_CCU8_SHADOW_TRANSFER_SLICE_1 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-1
XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_1 | Transfer Dither compare shadow register value to actual registers for SLICE-1
XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_1 | Transfer Prescaler shadow register value to actual register for SLICE-1
XMC_CCU8_SHADOW_TRANSFER_SLICE_2 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-2
XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_2 | Transfer Dither compare shadow register value to actual register for SLICE-2
XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_2 | Transfer Prescaler shadow register value to actual register for SLICE-2
XMC_CCU8_SHADOW_TRANSFER_SLICE_3 | Transfer Period, Compare and Passive Level shadow register values to actual registers for SLICE-3
XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_3 | Transfer Dither compare shadow register value to actual register for SLICE-3
XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_3 | Transfer Prescaler shadow register value to actual register for SLICE-3
enum XMC_CCU8_SLICE_CAP_REG_SET_t

Capture mode register sets

Enumerator
XMC_CCU8_SLICE_CAP_REG_SET_LOW | Capture register-0, Capture register-1 used
XMC_CCU8_SLICE_CAP_REG_SET_HIGH | Capture register-0, Capture register-1 used
enum XMC_CCU8_SLICE_COMPARE_CHANNEL_t

Compare Channel selection

Enumerator
XMC_CCU8_SLICE_COMPARE_CHANNEL_1 | Compare Channel-1
XMC_CCU8_SLICE_COMPARE_CHANNEL_2 | Compare Channel-2
enum XMC_CCU8_SLICE_DTC_DIV_t

Dead Time Generator Clock Divider

Enumerator
XMC_CCU8_SLICE_DTC_DIV_1 | DTC clock = Slice Clock
XMC_CCU8_SLICE_DTC_DIV_2 | DTC clock = Slice Clock/2
XMC_CCU8_SLICE_DTC_DIV_4 | DTC clock = Slice Clock/4
XMC_CCU8_SLICE_DTC_DIV_8 | DTC clock = Slice Clock/8
enum XMC_CCU8_SLICE_END_MODE_t

Actions that can be performed upon detection of an external Timer STOP event

Enumerator
XMC_CCU8_SLICE_END_MODE_TIMER_STOP | Stops the timer, without clearing TIMER register
XMC_CCU8_SLICE_END_MODE_TIMER_CLEAR | Without stopping timer, clears the TIMER register
XMC_CCU8_SLICE_END_MODE_TIMER_STOP_CLEAR | Stops the timer and clears the TIMER register
enum XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_t

External Event trigger criteria - Edge sensitivity

Enumerator
XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_NONE | None
XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE | Rising Edge of the input signal generates event trigger
XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE | Falling Edge of the input signal generates event trigger
XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE | Both Rising and Falling edges cause an event trigger
enum XMC_CCU8_SLICE_EVENT_FILTER_t

Low pass filter Configuration. The External Event input should be stable for a selected number of clock cycles.

Enumerator
XMC_CCU8_SLICE_EVENT_FILTER_DISABLED | No Low Pass Filtering is applied
XMC_CCU8_SLICE_EVENT_FILTER_3_CYCLES | Input should be stable for 3 clock cycles
XMC_CCU8_SLICE_EVENT_FILTER_5_CYCLES | Input should be stable for 5 clock cycles
XMC_CCU8_SLICE_EVENT_FILTER_7_CYCLES | Input should be stable for 7 clock cycles
enum XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t

External Event trigger criteria - Level sensitivity

Enumerator
XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH | Level sensitive functions react to a high signal level
XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW | Level sensitive functions react to a low signal level
XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_LOW | Timer counts up, during Low state of the control signal
XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_HIGH | Timer counts up, during High state of the control signal
enum XMC_CCU8_SLICE_EVENT_t

External Event list

Enumerator
XMC_CCU8_SLICE_EVENT_NONE | None
XMC_CCU8_SLICE_EVENT_0 | Event-0
XMC_CCU8_SLICE_EVENT_1 | Event-1
XMC_CCU8_SLICE_EVENT_2 | Event-2
enum XMC_CCU8_SLICE_FUNCTION_t

External Function list

Enumerator
XMC_CCU8_SLICE_FUNCTION_START | Start function
XMC_CCU8_SLICE_FUNCTION_STOP | Stop function
XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT0 | Capture Event-0 function, CCycapt0 signal is used for event generation
XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT1 | Capture Event-1 function, CCycapt1 signal is used for event generation
XMC_CCU8_SLICE_FUNCTION_GATING | Gating function
XMC_CCU8_SLICE_FUNCTION_DIRECTION | Direction function
XMC_CCU8_SLICE_FUNCTION_LOAD | Load function
XMC_CCU8_SLICE_FUNCTION_COUNT | Counting function
XMC_CCU8_SLICE_FUNCTION_OVERRIDE | Override function
XMC_CCU8_SLICE_FUNCTION_MODULATION | Modulation function
XMC_CCU8_SLICE_FUNCTION_TRAP | Trap function
enum XMC_CCU8_SLICE_IRQ_ID_t

Available Interrupt Event Ids

Enumerator
XMC_CCU8_SLICE_IRQ_ID_PERIOD_MATCH | Period match counting up
XMC_CCU8_SLICE_IRQ_ID_ONE_MATCH | One match counting down
XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_1 | Compare match counting up for channel 1
XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 | Compare match counting down for channel 1
XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_2 | Compare match counting up for channel 2
XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 | Compare match counting down for channel 2
XMC_CCU8_SLICE_IRQ_ID_EVENT0 | Event-0 occurrence
XMC_CCU8_SLICE_IRQ_ID_EVENT1 | Event-1 occurrence
XMC_CCU8_SLICE_IRQ_ID_EVENT2 | Event-2 occurrence
XMC_CCU8_SLICE_IRQ_ID_TRAP | Trap occurrence
enum XMC_CCU8_SLICE_MASK_t

CCU8 slice mask which can be used for the APIs as input where multi slice support is available

Enumerator
XMC_CCU8_SLICE_MASK_SLICE_0 | SLICE-0
XMC_CCU8_SLICE_MASK_SLICE_1 | SLICE-1
XMC_CCU8_SLICE_MASK_SLICE_2 | SLICE-2
XMC_CCU8_SLICE_MASK_SLICE_3 | SLICE-3
enum XMC_CCU8_SLICE_MCMS_ACTION_t

Multi Channel Shadow transfer request configuration options

Enumerator
XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR | Transfer Compare and Period Shadow register values to the actual registers upon MCS xfer request
XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP | Transfer Compare, Period and Prescaler Compare Shadow register values to the actual registers upon MCS xfer request
XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT | Transfer Compare, Period ,Prescaler Compare and Dither Compare register values to the actual registers upon MCS xfer request
enum XMC_CCU8_SLICE_MODE_t

Operational modes of CCU8 slice

Enumerator
XMC_CCU8_SLICE_MODE_COMPARE | slice(CC8y) operates in Compare Mode
XMC_CCU8_SLICE_MODE_CAPTURE | slice(CC8y) operates in Capture Mode
enum XMC_CCU8_SLICE_MODULATION_CHANNEL_t

Compare channel for which modulation has to be applied

Enumerator
XMC_CCU8_SLICE_MODULATION_CHANNEL_NONE | No modulation
XMC_CCU8_SLICE_MODULATION_CHANNEL_1 | Modulation for Compare Channel-1
XMC_CCU8_SLICE_MODULATION_CHANNEL_2 | Modulation for Compare Channel-2
XMC_CCU8_SLICE_MODULATION_CHANNEL_1_AND_2 | Modulation for Compare Channel-1 and Compare Channel-2
enum XMC_CCU8_SLICE_MODULATION_MODE_t

Modulation of timer output signals

Enumerator
XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_ST_OUT | Clear ST and OUT signals
XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_OUT | Clear only the OUT signal
enum XMC_CCU8_SLICE_MULTI_IRQ_ID_t

Available Interrupt Event Ids, which is added to support multi event APIs

Enumerator
XMC_CCU8_SLICE_MULTI_IRQ_ID_PERIOD_MATCH | Period match counting up
XMC_CCU8_SLICE_MULTI_IRQ_ID_ONE_MATCH | One match counting down
XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_1 | Compare match counting up for channel 1
XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 | Compare match counting down for channel 1
XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_2 | Compare match counting up for channel 2
XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 | Compare match counting down for channel 2
XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT0 | Event-0 occurrence
XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT1 | Event-1 occurrence
XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT2 | Event-2 occurrence
enum XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t

Timer output passive level

Enumerator
XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_LOW | Passive level = Low
XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH | Passive level = High
enum XMC_CCU8_SLICE_OUTPUT_t

Slice Output selection

Enumerator
XMC_CCU8_SLICE_OUTPUT_0 | Slice Output-0
XMC_CCU8_SLICE_OUTPUT_1 | Slice Output-1
XMC_CCU8_SLICE_OUTPUT_2 | Slice Output-2
XMC_CCU8_SLICE_OUTPUT_3 | Slice Output-3
enum XMC_CCU8_SLICE_PRESCALER_MODE_t

Prescaler mode

Enumerator
XMC_CCU8_SLICE_PRESCALER_MODE_NORMAL | Fixed division of module clock
XMC_CCU8_SLICE_PRESCALER_MODE_FLOAT | Floating divider
enum XMC_CCU8_SLICE_PRESCALER_t

Timer clock Divider

Enumerator
XMC_CCU8_SLICE_PRESCALER_1 | Slice Clock = fccu8
XMC_CCU8_SLICE_PRESCALER_2 | Slice Clock = fccu8/2
XMC_CCU8_SLICE_PRESCALER_4 | Slice Clock = fccu8/4
XMC_CCU8_SLICE_PRESCALER_8 | Slice Clock = fccu8/8
XMC_CCU8_SLICE_PRESCALER_16 | Slice Clock = fccu8/16
XMC_CCU8_SLICE_PRESCALER_32 | Slice Clock = fccu8/32
XMC_CCU8_SLICE_PRESCALER_64 | Slice Clock = fccu8/64
XMC_CCU8_SLICE_PRESCALER_128 | Slice Clock = fccu8/128
XMC_CCU8_SLICE_PRESCALER_256 | Slice Clock = fccu8/256
XMC_CCU8_SLICE_PRESCALER_512 | Slice Clock = fccu8/512
XMC_CCU8_SLICE_PRESCALER_1024 | Slice Clock = fccu8/1024
XMC_CCU8_SLICE_PRESCALER_2048 | Slice Clock = fccu8/2048
XMC_CCU8_SLICE_PRESCALER_4096 | Slice Clock = fccu8/4096
XMC_CCU8_SLICE_PRESCALER_8192 | Slice Clock = fccu8/8192
XMC_CCU8_SLICE_PRESCALER_16384 | Slice Clock = fccu8/16384
XMC_CCU8_SLICE_PRESCALER_32768 | Slice Clock = fccu8/32768
enum XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t

Slice shadow transfer mode options.

Note
Not available for XMC4500 series
Enumerator
XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_IN_PERIOD_MATCH_AND_ONE_MATCH | Shadow transfer is done in Period Match and One match.
XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_PERIOD_MATCH | Shadow transfer is done only in Period Match.
XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_ONE_MATCH | Shadow transfer is done only in One Match.
enum XMC_CCU8_SLICE_SR_ID_t

Service Request Lines for CCU8. Event are mapped to these SR lines and these are used to generate the interrupt.

Enumerator
XMC_CCU8_SLICE_SR_ID_0 | Service Request Line-0 selected
XMC_CCU8_SLICE_SR_ID_1 | Service Request Line-1 selected
XMC_CCU8_SLICE_SR_ID_2 | Service Request Line-2 selected
XMC_CCU8_SLICE_SR_ID_3 | Service Request Line-3 selected
enum XMC_CCU8_SLICE_START_MODE_t

Actions that can be performed upon detection of an external Timer START event

Enumerator
XMC_CCU8_SLICE_START_MODE_TIMER_START | Start the timer from the current count of TIMER register
XMC_CCU8_SLICE_START_MODE_TIMER_START_CLEAR | Clears the TIMER register and start the timer
enum XMC_CCU8_SLICE_STATUS_t

The compare channel output which is routed to the slice output signal(STy).

Enumerator
XMC_CCU8_SLICE_STATUS_CHANNEL_1

Channel-1 status connected to Slice Status

XMC_CCU8_SLICE_STATUS_CHANNEL_2

Channel-2 status connected to Slice Status

XMC_CCU8_SLICE_STATUS_CHANNEL_1_AND_2

Wired AND of Channel-1 and Channel-2 status connected to Slice status

XMC_CCU8_SLICE_STATUS_CHANNEL_1_OR_2

Wired OR of Channel-1 and Channel-2 status connected to Slice status.

Note
Only available for XMC1300 and XMC1400 series
enum XMC_CCU8_SLICE_TIMER_CLEAR_MODE_t

Timer clear on capture

Enumerator
XMC_CCU8_SLICE_TIMER_CLEAR_MODE_NEVER | Never clear the timer on any capture event
XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_HIGH | Clear only when timer value has been captured in C3V and C2V
XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_LOW | Clear only when timer value has been captured in C1V and C0V
XMC_CCU8_SLICE_TIMER_CLEAR_MODE_ALWAYS | Always clear the timer upon detection of any capture event
enum XMC_CCU8_SLICE_TIMER_COUNT_DIR_t

Timer counting direction for the CCU8 slice

Enumerator
XMC_CCU8_SLICE_TIMER_COUNT_DIR_UP | Counting up
XMC_CCU8_SLICE_TIMER_COUNT_DIR_DOWN | Counting down
enum XMC_CCU8_SLICE_TIMER_COUNT_MODE_t

Timer counting modes for the slice

Enumerator
XMC_CCU8_SLICE_TIMER_COUNT_MODE_EA | Edge Aligned Mode
XMC_CCU8_SLICE_TIMER_COUNT_MODE_CA | Centre Aligned Mode
enum XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t

Timer repetition mode for the slice

Enumerator
XMC_CCU8_SLICE_TIMER_REPEAT_MODE_REPEAT | Repetitive mode: continuous mode of operation
XMC_CCU8_SLICE_TIMER_REPEAT_MODE_SINGLE | Single shot mode: Once a Period match/One match occurs timer goes to idle state
enum XMC_CCU8_SLICE_TRAP_EXIT_MODE_t

Trap exit mode

Enumerator
XMC_CCU8_SLICE_TRAP_EXIT_MODE_AUTOMATIC | Clear trap state as soon as the trap signal is de-asserted
XMC_CCU8_SLICE_TRAP_EXIT_MODE_SW | Clear only when acknowledged by software
enum XMC_CCU8_SOURCE_OUT0_t

Output sources for OUTy0 signal

Note
Only available for XMC1400 series
Enumerator
XMC_CCU8_SOURCE_OUT0_ST1 | CCU8yST1 signal path is connected the CCU8x.OUT0
XMC_CCU8_SOURCE_OUT0_INV_ST1 | Inverted CCU8yST1 signal path is connected the CCU8x.OUT0
XMC_CCU8_SOURCE_OUT0_ST2 | CCU8yST2 signal path is connected the CCU8x.OUT0
XMC_CCU8_SOURCE_OUT0_INV_ST2 | Inverted CCU8yST2 signal path is connected the CCU8x.OUT0
enum XMC_CCU8_SOURCE_OUT1_t

Output sources for OUTy1 signal

Note
Only available for XMC1400 series
Enumerator
XMC_CCU8_SOURCE_OUT1_ST1 | CCU8yST1 signal path is connected the CCU8x.OUT1
XMC_CCU8_SOURCE_OUT1_INV_ST1 | Inverted CCU8yST1 signal path is connected the CCU8x.OUT1
XMC_CCU8_SOURCE_OUT1_ST2 | CCU8yST2 signal path is connected the CCU8x.OUT1
XMC_CCU8_SOURCE_OUT1_INV_ST2 | Inverted CCU8yST2 signal path is connected the CCU8x.OUT1
enum XMC_CCU8_SOURCE_OUT2_t

Output sources for OUTy2 signal

Note
Only available for XMC1400 series
Enumerator
XMC_CCU8_SOURCE_OUT2_ST2 | CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_SOURCE_OUT2_INV_ST2 | Inverted CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_SOURCE_OUT2_ST1 | CCU8yST1 signal path is connected the CCU8x.OUT2
XMC_CCU8_SOURCE_OUT2_INV_ST1 | Inverted CCU8yST1 signal path is connected the CCU8x.OUT2
enum XMC_CCU8_SOURCE_OUT3_t

Output sources for OUTy3 signal

Note
Only available for XMC1400 series
Enumerator
XMC_CCU8_SOURCE_OUT3_ST2 | CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_SOURCE_OUT3_INV_ST2 | Inverted CCU8yST2 signal path is connected the CCU8x.OUT2
XMC_CCU8_SOURCE_OUT3_ST1 | CCU8yST1 signal path is connected the CCU8x.OUT2
XMC_CCU8_SOURCE_OUT3_INV_ST1 | Inverted CCU8yST1 signal path is connected the CCU8x.OUT2
enum XMC_CCU8_STATUS_t

Return Value of an API

Enumerator
XMC_CCU8_STATUS_OK | API fulfils request
XMC_CCU8_STATUS_ERROR | API cannot fulfil request
XMC_CCU8_STATUS_RUNNING | The timer slice is currently running
XMC_CCU8_STATUS_IDLE | The timer slice is currently idle

Function Documentation

void XMC_CCU8_DisableClock | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const uint8_t | slice_number
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
slice_number | Slice for which the clock should be disabled. Range: [0x0 to 0x3]
Returns

None
Description:
Disables the slice timer clock, by configuring GIDLS.SS0I, GIDLS.SSS1I, GIDLS.SSS2I, GIDLS.SSS3I bits according to the selected slice_number .

It is possible to disable clock at slice level using the module pointer. slice_number is used to disable the clock to a given slice of the module.
Related APIs:
XMC_CCU8_EnableClock()
XMC_CCU8_EnableMultipleClocks()
XMC_CCU8_StartPrescaler()
XMC_CCU8_StopPrescaler().
void XMC_CCU8_DisableModule ( XMC_CCU8_MODULE_t *const module )
Parameters
module Constant pointer to CCU8 module
Returns

None
Description:
Brings the CCU8 module to reset state and enables gating of the clock signal(if applicable depending on the device being selected).

Invoke this API when a CCU8 module needs to be disabled completely. Any operation on the CCU8 module will have no effect after this API is called.
Related APIs:
XMC_CCU8_EnableModule()
XMC_CCU8_DisableModule().
void XMC_CCU8_EnableClock | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const uint8_t | slice_number
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
slice_number | Slice for which the clock should be Enabled. Range: [0x0 to 0x3]
Returns

None
Description:
Enables the slice timer clock, by configuring GIDLC.CS0I, GIDLC.CS1I, GIDLC.CS2I, GIDLC.CS3I bits according to the selected slice_number.

It is possible to enable/disable clock at slice level. This uses the slice_number to indicate the slice whose clock needs to be enabled. Directly accessed register is GIDLC.
Related APIs:
XMC_CCU8_DisableClock()
XMC_CCU8_EnableMultipleClocks()
XMC_CCU8_StartPrescaler()
XMC_CCU8_StopPrescaler().
void XMC_CCU8_EnableModule ( XMC_CCU8_MODULE_t *const module )
Parameters
module Constant pointer to CCU8 module
Returns

None
Description:
Enables the CCU8 module and brings it to active state.

Also disables the gating of the clock signal (if applicable depending on the device being selected). Invoke this API before any operations are done on the CCU8 module. Invoked from XMC_CCU8_Init().
Related APIs:
XMC_CCU8_SetModuleClock()
XMC_CCU8_DisableModule()
XMC_CCU8_StartPrescaler().
void XMC_CCU8_EnableMultipleClocks | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const uint8_t | clock_mask
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
clock_mask | Slices whose clocks are to be enabled simultaneously. Bit location 0/1/2/3 represents slice-0/1/2/3 respectively. Range: [0x1 to 0xF]
Returns

None
Description:
Enables clocks of multiple slices at a time, by configuring GIDLC.CS0I, GIDLC.CS1I, GIDLC.CS2I, GIDLC.CS3I bits.

Takes an input clock_mask, which determines the slices that would receive the clock. Bring them out of the idle state simultaneously.
Related APIs:
XMC_CCU8_EnableClock()
XMC_CCU8_DisableClock().
void XMC_CCU8_EnableShadowTransfer | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const uint32_t | shadow_transfer_msk
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
shadow_transfer_msk | Shadow transfer request mask for various transfers. Use XMC_CCU8_SHADOW_TRANSFER_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Requests of shadow transfer for Period, Compare, Passive level, dither and prescaler, by configuring the GCSS register.

The transfer from the shadow registers to the actual registers is done in the immediate next occurrence of the shadow transfer trigger after the API is called.

Any call to XMC_CCU8_SLICE_SetTimerPeriodMatch()
XMC_CCU8_SLICE_SetTimerCompareMatch()
XMC_XMC_CCU8_SLICE_SetPrescaler()
XMC_CCU8_SLICE_CompareInit()
XMC_CCU8_SLICE_CaptureInit(). must be succeeded by this API.

Related APIs:
None.
void XMC_CCU8_Init | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const XMC_CCU8_SLICE_MCMS_ACTION_t | mcs_action
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
mcs_action | multi-channel shadow transfer request configuration
Returns

None
Description:
Initialization of global register GCTRL.

As part of module initialization, behaviour of the module upon detection Multi-Channel Mode trigger is configured. Will also invoke the XMC_CCU8_EnableModule(). The API call would bring up the required CCU8 module and also initialize the module for the required multi-channel shadow transfer.
Related APIs:
XMC_CCU8_SLICE_CompareInit()
XMC_CCU8_SLICE_CaptureInit().
bool XMC_CCU8_IsPrescalerRunning ( XMC_CCU8_MODULE_t *const module )
Parameters
module Constant pointer to CCU8 module
Returns

None
Description:
Returns the state of the prescaler, by reading GSTAT.PRB bit.

If clock is being supplied to the slices of the module then returns as true.
Related APIs:
XMC_CCU8_StartPrescaler()
XMC_CCU8_StopPrescaler()
XMC_CCU8_EnableClock()
XMC_CCU8_DisableClock().
void XMC_CCU8_SetModuleClock | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const XMC_CCU8_CLOCK_t | clock
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
clock | Choice of input clock to the module
Returns

None
Description:
Selects the Module Clock by configuring GCTRL.PCIS bits.

There are 3 potential clock sources. This API helps to select the required clock source. Call to this API is valid after the XMC_CCU8_Init().
Related APIs:
None.
void XMC_CCU8_SetMultiChannelShadowTransferMode | ( | XMC_CCU8_MODULE_t *const | module,
 |  | const uint32_t | slice_mode_msk
 | ) |  |
Parameters
module | Constant pointer to CCU8 module
slice_mode_msk | Slices for which the configuration has to be applied. Use XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Enables the Multi-channel shadow transfer request trigger signal either by software or hardware by configuring GCTRL.MSE0, GCTRL.MSE1, GCTRL.MSE2, and GCTRL.MSE3 based on the mask.

The shadow transfer would take place either if it was requested by software or by the CCU8x.MCSS input.
Related APIs:
None.
void XMC_CCU8_SLICE_Capture0Config | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the Capture-0 Function
Returns

None
Description:
Configures the Capture-0 Function of the slice, by configuring CC8yCMC.CAP0S bit.

Capture function is mapped with one of the 3 events. A CCU8 slice can be configured into capture-0 mode with the selected event. In this mode the CCU8 will capture the timer value into CC8yC0V and CC8yC1V.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_Capture1Config | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the Capture-1 Function
Returns

None
Description:
Configures the Capture-1 Function of the slice, by configuring CC8yCMC.CAP1S bit.

Capture function is mapped with one of the 3 events. A CCU8 slice can be configured into capture-1 mode with the selected event. In this mode the CCU8 will capture the timer value into CC8yC2V and CC8yC3V.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_CaptureInit | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_CAPTURE_CONFIG_t *const | capture_init
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
capture_init | Pointer to slice configuration structure
Returns

None
Description:
Initialization of a CC8 slice to capture mode, by configuring CC8yTC, CC8yCMC, CC8yPSC,CC8yFPCS registers.

CC8 slice is configured with Capture configurations in this routine. Timer is stopped before initialization by calling XMC_CCU8_SLICE_StopTimer(). After initialization user has to explicitly enable the shadow transfer for the required values by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask.
Related APIs:
XMC_CCU8_SLICE_Capture0Config()
XMC_CCU8_SLICE_Capture1Config().
void XMC_CCU8_SLICE_ClearEvent | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Asserted event which must be acknowledged.
Returns

None
Description:
Acknowledges an asserted event, by setting CC8ySWR with respective event flag.

Related APIs:
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_SetEvent()
XMC_CCU8_SLICE_GetEvent().
void XMC_CCU8_SLICE_ClearTimer ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Resets the timer count to zero, by setting CC8yTCCLR.TCC bit.

A timer which has been stopped can still retain the last counted value. After invoking this API the timer value will be cleared.
Related APIs:
XMC_CCU8_SLICE_StartTimer().
void XMC_CCU8_SLICE_CompareInit | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CONFIG_t *const | compare_init
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
compare_init | Pointer to slice configuration structure
Returns

None
Description:
Initialization of a CC8 slice to compare mode, by configuring CC8yTC, CC8yCMC, CC8yPSC, CC8yDITH, CC8yPSL, CC8yFPCS, CC8yCHC registers.

CC8 slice is configured with Timer configurations in this routine. Timer is stopped before initialization by calling XMC_CCU8_SLICE_StopTimer(). After initialization user has to explicitly enable the shadow transfer for the required values by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask.
Related APIs:
None.
void XMC_CCU8_SLICE_ConfigureDeadTime | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint8_t | mask
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
mask | The Dead Time configuration mask. Do a bitwise OR operation on the following values depending on the need. Value 0x1: Dead Time Enable for Compare Channel 1 Value 0x2: Dead Time Enable for Compare Channel 2 Value 0x4: Dead Time Enable for CC8yST1 path is enabled. Value 0x8: Dead Time Enable for Inverted CC8yST1 path is enabled. Value 0x10: Dead Time Enable for CC8yST2 path is enabled. Value 0x20: Dead Time Enable for Inverted CC8yST2 path is enabled. Range: [0x0 to 0x3F]
Description:
Activates or deactivates dead time for compare channel and ST path, by configuring CC8y.DC1R, CC8y.DC1R and CC8y.DTC registers.

Use the provided masks to enable/disable the dead time for the compare channels and the ST signals. It is possible to deactivate the dead time for all the options by passing a 0x0 as the mask. Details such as the choice of dead time for channel1, channel2, ST1, Inverted ST1, ST2, Inverted ST2, are programmed by this routine.
Related APIs:
XMC_CCU8_SLICE_DeadTimeInit()
XMC_CCU8_SLICE_SetDeadTimeValue()
XMC_CCU8_SLICE_SetDeadTimePrescaler()
XMC_CCU8_SLICE_IsDeadTimeCntr1Running()
XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
void XMC_CCU8_SLICE_ConfigureEvent | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event,
 |  | const XMC_CCU8_SLICE_EVENT_CONFIG_t * | config
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | The External Event which needs to be configured.
config | Pointer to event configuration data.
Returns

None
Description:
Configures an External Event of the slice, by updating CC8yINS register .

Details such as the input mapped to the event, event detection criteria and low pass filter options are programmed by this routine. The Event config will configure the input selection, the edge selection, the level selection and the Low pass filter for the event.
Related APIs:
XMC_CCU8_SLICE_StartConfig()
XMC_CCU8_SLICE_StopConfig()
XMC_CCU8_SLICE_LoadConfig()
XMC_CCU8_SLICE_ModulationConfig()
XMC_CCU8_SLICE_CountConfig()
XMC_CCU8_SLICE_GateConfig()
XMC_CCU8_SLICE_Capture0Config()
XMC_CCU8_SLICE_Capture1Config()
XMC_CCU8_SLICE_DirectionConfig()
XMC_CCU8_SLICE_StatusBitOverrideConfig()
XMC_CCU8_SLICE_TrapConfig().
void XMC_CCU8_SLICE_ConfigureStatusBitOutput | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_STATUS_t | channel
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
channel | which channel status has to be give as out
Returns

None
Description:
Configures status ST1, ST2 mapping to STy, by configuring CC8yTC.STOS bits.

This routine defines the output STy as a function of ST1 or ST2 or both ST1 & ST2. It is possible to make the CCU8x.STy signal to reflect the CC8y.ST1/CC8y.ST2 or a function of the 2 signals.
Related APIs:
None.
void XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_CONFIG_t *const | ev1_config,
 |  | const XMC_CCU8_SLICE_EVENT_CONFIG_t *const | ev2_config
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
ev1_config | Pointer to event 1 configuration data
ev2_config | Pointer to event 2 configuration data
Returns

None
Description:
Map Status bit override function with an Event1 & Event 2 of the slice and configure CC8yINS register.

Details such as the input mapped to the event, event detection criteria and Low Pass filter options are programmed by this routine for the events 1 & 2. Event-1 input would be the trigger to override the value. Event-2 input would be the override value.
Related APIs:
XMC_CCU8_SLICE_StatusBitOverrideConfig().
void XMC_CCU8_SLICE_CountConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External Count Function
Returns

None
Description:
Configures the Count Function of the slice, by configuring CC8yCMC.CNTS bit.

Count function is mapped with one of the 3 events. CCU8 slice can take an external signal to act as the counting event. The CCU8 slice would count the edges present on the event selected.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_DeadTimeInit | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t *const | config
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
config | Pointer to dead time configuration data
Returns

None
Description:
Initializes Dead time configuration for the slice outputs, by configuring CC8yDC1R, CC8yDC2R, CC8yDTC registers.

This routine programs dead time delays (rising & falling) and dead time clock prescaler. Details such as the choice of dead time for channel1, channel2, ST1, Inverted ST1, ST2, Inverted ST2, are also programmed by this routine.
Related APIs:
XMC_CCU8_SLICE_ConfigureDeadTime()
XMC_CCU8_SLICE_SetDeadTimeValue()
XMC_CCU8_SLICE_SetDeadTimePrescaler()
XMC_CCU8_SLICE_IsDeadTimeCntr1Running()
XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
void XMC_CCU8_SLICE_DirectionConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External Count Direction Function
Returns

None
Description:
Configures the Count Direction of the slice, by configuring CC8yCMC.UDS bit.

Count direction function is mapped with one of the 3 events. A slice can be configured to change the CC8yTIMER count direction depending on an external signal.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | automatic_shadow_transfer
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
automatic_shadow_transfer | specify upon which register update, automatic shadow transfer request should not be generated Use :: XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configure on which shadow register update, automatic shadow transfer request generation has to be disabled. By clearing ASPC, ASCC1, ASCC2, ASLC, ASDC, ASFC bits in STC register.

This disables the generation of automatic shadow transfer request for the specified register update.
Note:
Related APIs:
XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest().
Note
Only available for XMC1400 series
void XMC_CCU8_SLICE_DisableCascadedShadowTransfer ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Disables the cascaded the shadow transfer operation, by clearing CSE bit in STC register.

If in any slice the cascaded mode disabled, other slices from there onwards does not update the values in cascaded mode.
Related APIs:
XMC_CCU8_SLICE_EnableCascadedShadowTransfer()
.
Note
Not available for XMC4500 series
void XMC_CCU8_SLICE_DisableDithering ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Disables dithering of PWM frequency and duty cycle, by clearing CC8yTC.DITHE bits.

This disables the Dither mode that was set in XMC_CCU8_SLICE_EnableDithering(). This API will not clear the dither compare value.
Related APIs:
XMC_CCU8_SLICE_EnableDithering().
void XMC_CCU8_SLICE_DisableEvent | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Event whose assertion can potentially lead to an interrupt
Returns

None
Description:
Disables the generation of an interrupt pulse for the event, by clearing CC8yINTE register.

Prevents the event from being asserted.
Related APIs:
XMC_CCU8_SLICE_SetInterruptNode()
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_EnableMultipleEvents()
XMC_CCU8_SLICE_DisableMultipleEvents().
void XMC_CCU8_SLICE_DisableFloatingPrescaler ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Disables the floating prescaler, by clearing CC8yTC.FPE bit.

This would return the prescaler to the normal mode. The prescaler that would be applied is the value present in CC8yPSC.
Related APIs:
XMC_CCU8_SLICE_EnableFloatingPrescaler().
void XMC_CCU8_SLICE_DisableMultiChannelMode | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CHANNEL_t | ch_num
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
ch_num | Compare channel for which the multi-channel mode needs to be disabled.
Returns

None
Description:
Disables the multichannel mode, by clearing CC8yTC.MCME1 or CC8yTC.MCME1 bits based on the ch_num.

Returns the slices to the normal operation mode. This takes the slice number as input and configures the multi channel mode for it.
Related APIs:
XMC_CCU8_SLICE_EnableMultiChannelMode().
void XMC_CCU8_SLICE_DisableMultipleEvents | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint16_t | mask
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
mask | Event mask such that multiple events can be enabled. Use XMC_CCU8_SLICE_MULTI_IRQ_ID_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Disables the generation of an interrupt pulse for the required events, by clearing CC8yINTE register.

Prevents selected events of the slice from being asserted.
Related APIs:
XMC_CCU8_SLICE_SetInterruptNode()
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_EnableMultipleEvents()
XMC_CCU8_SLICE_DisableEvent().
void XMC_CCU8_SLICE_DisableTrap | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | out_mask
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
out_mask | Output signals for which the Trap function needs to be deactivated. Use XMC_CCU8_SLICE_OUTPUT_t enum items to create a mask of choice, using a bit wise OR operation. Range: [0x1 to 0xF]
Returns

None
Description:
Disables the trap feature, by clearing CC8yTC.TRAPE0, CC8yTC.TRAPE1, CC8yTC.TRAPE2 and CC8yTC.TRAPE3 bit based on the out_mask.

.

This API will revert the changes done by XMC_CCU8_SLICE_EnableTrap(). This Ensures that the TRAP function has no effect on the output of the CCU8 slice.
Related APIs:
XMC_CCU8_SLICE_EnableTrap().
void XMC_CCU8_SLICE_EnableAsymmetricCompareMode ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Configures the slice to generate PWM in asymmetric compare mode, by setting CC8yCHC.ASE bit.

In asymmetric compare mode, the compare channels 1 & 2 are grouped to generate the PWM.This would generate an inverted PWM at OUT0 & OUT1. In Edge Aligned mode (counting up), the Status bit is set when a compare match of Compare channel-1 occurs and cleared when a compare match event of Compare channel-2 occurs.
In Center Aligned mode, the status bit is set when a compare match event of Compare channel-1 occurs while counting up and cleared when a compare match event of Compare channel-2 occurs while counting down.
Note:
External count direction function is enabled then the asymmetric mode of operation is not possible.
Related APIs:
XMC_CCU8_SLICE_EnableSymmetricCompareMode()
void XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | automatic_shadow_transfer
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
automatic_shadow_transfer | specify upon which register update, automatic shadow transfer request is generated Use :: XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configure on which shadow register update, automatic shadow transfer request generation has to be enabled. By setting ASPC, ASCC1, ASCC2, ASLC, ASDC, ASFC bits in STC register.

By updating the configured shadow register, the shadow transfer request is generated to update all the shadow registers.
Note:
Related APIs:
XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest().
Note
Only available for XMC1400 series
void XMC_CCU8_SLICE_EnableCascadedShadowTransfer ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Cascades the shadow transfer operation throughout the CCU8 timer slices, by setting CSE bit in STC register.

The shadow transfer enable bits needs to be set in all timer slices, that are being used in the cascaded architecture, at the same time. The shadow transfer enable bits, also need to be set for all slices even if the shadow values of some slices were not updated. It is possible to to cascade with the adjacent slices only. CC80 slice is a master to start the operation.
Note:
XMC_CCU8_EnableShadowTransfer() must be called to enable the shadow transfer of the all the slices, which needs to be cascaded.
Related APIs:
XMC_CCU8_EnableShadowTransfer(), XMC_CCU8_SLICE_DisableCascadedShadowTransfer()
.
Note
Not available for XMC4500 series
void XMC_CCU8_SLICE_EnableDithering | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const bool | period_dither,
 |  | const bool | duty_dither,
 |  | const uint8_t | spread
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
period_dither | Boolean instruction on dithering of period match
duty_dither | Boolean instruction on dithering of compare match
spread | Dither compare value
Returns

None
Description:
Enables dithering of PWM frequency and duty cycle, by configuring CC8yTC.DITHE and CC8yDITS bits.

Some control loops are slow in updating PWM frequency and duty cycle. In such a case, a Bresenham style dithering can help reduce long term errors. Dithering can be applied to period and duty individually, this can be selected using the parameter period_dither and duty_dither. The spread would provide the dither compare value. If the dither counter value is less than this spread then the period/compare values would be dithered according to the dither mode selected. This API would invoke XMC_CCU8_SLICE_SetDitherCompareValue().
Note:
After this API call, XMC_CCU8_EnableShadowTransfer() has to be called with appropriate mask to transfer the dither value.
Related APIs:
XMC_CCU8_SLICE_DisableDithering().
void XMC_CCU8_SLICE_EnableEvent | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Event whose assertion can potentially lead to an interrupt
Returns

None
Description:
Enables the generation of an interrupt pulse for the event, by configuring CC8yINTE register.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API merely enables the event. Binding with SR is performed by another API.
Related APIs:
XMC_CCU8_SLICE_SetInterruptNode()
XMC_CCU8_SLICE_EnableMultipleEvents()
XMC_CCU8_SLICE_DisableEvent()
XMC_CCU8_SLICE_DisableMultipleEvents().
void XMC_CCU8_SLICE_EnableFloatingPrescaler ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Enables the floating prescaler, by setting CC8yTC.FPE bit.

The prescaler divider starts with an initial value and increments upon every period match. It keeps incrementing until a ceiling (prescaler compare value) is hit and thereafter rolls back to the original prescaler divider value.
It is necessary to have programmed an initial divider value and a compare value before the feature is enabled.
Related APIs:
XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue()
XMC_CCU8_SLICE_DisableFloatingPrescaler()
XMC_XMC_CCU8_SLICE_SetPrescaler().
void XMC_CCU8_SLICE_EnableMultiChannelMode | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CHANNEL_t | ch_num
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
ch_num | Compare channel for which the multi-channel mode is needed.
Returns

None
Description:
Enables the multichannel mode, by setting CC8yTC.MCME1 or CC8yTC.MCME1 bits based on the ch_num.

The output state of the Timer slices can be controlled in parallel by a single input signal. A particularly useful feature in motor control applications where the PWM output of multiple slices of a module can be gated and ungated by multi-channel gating inputs connected to the slices. A peripheral like POSIF connected to the motor knows exactly which of the power drive switches are to be turned on and off at any instant. It can thus through a gating bus (known as multi-channel inputs) control which of the slices output stays gated/ungated.
Related APIs:
XMC_CCU8_SLICE_DisableMultiChannelMode()
XMC_CCU8_SetMultiChannelShadowTransferMode().
void XMC_CCU8_SLICE_EnableMultipleEvents | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint16_t | mask
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
mask | Event mask such that multiple events can be enabled. Use XMC_CCU8_SLICE_MULTI_IRQ_ID_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Enables the generation of an interrupt pulse for the required events, by configuring CC8yINTE register.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API merely enables the events. Binding with SR is performed by another API.
Related APIs:
XMC_CCU8_SLICE_SetInterruptNode()
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_DisableEvent()
XMC_CCU8_SLICE_DisableMultipleEvents().
void XMC_CCU8_SLICE_EnableSymmetricCompareMode ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Configures the slice to generate PWM in symmetric(standard) compare mode, by clearing CC8yCHC.ASE bit.

In symmetric compare mode, the compare channels 1 & 2 are independent of each other & each channel generates the PWM & inverted PWM at OUT0, OUT1, OUT2 & OUT3.
Related APIs:
XMC_CCU8_SLICE_EnableAsymmetricCompareMode().
void XMC_CCU8_SLICE_EnableTrap | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | out_mask
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
out_mask | Output signals for which the Trap function needs to be activated. Use XMC_CCU8_SLICE_OUTPUT_t enum items to create a mask of choice, using a bit wise OR operation Range: [0x1 to 0xF]
Returns

None
Description:
Enables the trap feature, by setting CC8yTC.TRAPE0, CC8yTC.TRAPE1, CC8yTC.TRAPE2 and CC8yTC.TRAPE3 bit based on the out_mask.

A particularly useful feature where the PWM output can be forced inactive upon detection of a trap. The trap signal can be the output of a sensing element which has just detected an abnormal electrical condition.
Related APIs:
XMC_CCU8_SLICE_TrapConfig()
XMC_CCU8_SLICE_DisableTrap()
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_GateConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External Gating Function
Returns

None
Description:
Configures the Gating Function of the slice, by configuring CC8yCMC.GATES bit.

Gating function is mapped with one of the 3 events. A CCU8 slice can use an input signal that would operate as counter gating. If the configured Active level is detected the counter will gate all the pulses.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
uint32_t XMC_CCU8_SLICE_GetCapturedValueFromFifo | ( | const XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_CAP_REG_SET_t | set
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
set | The capture register set from which the captured value is to be retrieved
Returns

uint32_t Returns the value captured in the slice_number Range: [0x0 to 0xFFFF]
Description:
Read captured value from FIFO(CC8yECRD0 and CC8yECRD1).

This is applicable only in the Capture mode of operation. The signal whose timing characteristics are to be measured must be mapped to an event which in turn must be mapped to the capture function. Based on the capture criteria, the instant timer values are captured into capture registers. Timing characteristics of the input signal may then be derived/inferred from the captured values.
Related APIs:
XMC_CCU8_SLICE_IsExtendedCapReadEnabled().
Note
Defined for XMC4800, XMC4700, XMC4500, XMC4400, XMC4200, XMC4100 devices only. For other devices use XMC_CCU8_GetCapturedValueFromFifo() API
uint32_t XMC_CCU8_SLICE_GetCaptureRegisterValue | ( | const XMC_CCU8_SLICE_t *const | slice,
 |  | const uint8_t | reg_num
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
reg_num | The capture register from which the captured value is to be retrieved Range: [0,3]
Returns

uint32_t Returns the Capture register value. Range: [0 to 0x1FFFFF]
Description:
Retrieves timer value which has been captured in the Capture registers, by reading CC8yCV[reg_num] register.

The signal whose timing characteristics are to be measured must be mapped to an event which in turn must be mapped to the capture function. Based on the capture criteria, the timer values are captured into capture registers. Timing characteristics of the input signal may then be derived/inferred from the captured values. The full flag will help to find out if there is a new captured value present.
Related APIs:
XMC_CCU8_SLICE_GetLastCapturedTimerValue().
XMC_CCU8_SLICE_TIMER_COUNT_DIR_t XMC_CCU8_SLICE_GetCountingDir ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

XMC_CCU8_SLICE_TIMER_COUNT_DIR_t returns the direction in which the timer is counting.
Description:
Returns the timer counting direction, by reading CC8yTCST.CDIR bit.

This API will return the direction in which the timer is currently incrementing(XMC_CCU8_SLICE_TIMER_COUNT_DIR_UP) or decrementing (XMC_CCU8_SLICE_TIMER_COUNT_DIR_DOWN).
Related APIs:
None.
bool XMC_CCU8_SLICE_GetEvent | ( | const XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Event to be evaluated for assertion
Returns

bool Returns true if event is set else false is returned.
Description:
Evaluates if a given event is asserted or not, by reading CC8yINTS register.

Return true if the event is asserted. For a event to be asserted it has to be first enabled. Only if that event is enabled the call to this API is valid. If the Event is enabled and has not yet occurred then a false is returned.
Related APIs:
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_SetEvent().
XMC_CCU8_STATUS_t XMC_CCU8_SLICE_GetLastCapturedTimerValue | ( | const XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_CAP_REG_SET_t | set,
 |  | uint32_t * | val_ptr
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
set | The capture register set, which must be evaluated
val_ptr | Out Parameter of the API.Stores the captured timer value into this out parameter.
Returns

XMC_CCU8_STATUS_t Returns XMC_CCU8_STATUS_OK if there was new value present in the capture registers. returns XMC_CCU8_STATUS_ERROR if there was no new value present in the capture registers.
Description:
Retrieves the latest captured timer value, by reading CC8yCV registers.

Retrieve the timer value last stored by the slice. When separate capture events are used, users must specify the capture set to evaluate. If single capture event mode is used, all 8 capture registers are evaluated.
The lowest register is evaluated first followed by the next higher ordered register and this continues until all capture registers have been evaluated.
Related APIs:
XMC_CCU8_SLICE_GetCaptureregisterValue().
XMC_CCU8_SLICE_MODE_t XMC_CCU8_SLICE_GetSliceMode ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

XMC_CCU8_SLICE_MODE_t returns XMC_CCU8_SLICE_MODE_COMPARE if the slice is operating in compare mode returns XMC_CCU8_SLICE_MODE_CAPTURE if the slice is operating in capture mode
Description:
Retrieves the current mode of operation in the slice (either Capture mode or Compare mode), by reading CC8yTC.CMOD bit.

Ensure that before invoking this API the CCU8 slice should be configured otherwise the output of this API is invalid.
Related APIs:
None.
uint16_t XMC_CCU8_SLICE_GetTimerCompareMatch | ( | const XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CHANNEL_t | channel
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
channel | Select the compare channel to retrieve from.
Returns

uint16_t returns the current timer compare value Range: [0x0 to 0xFFFF]
Description:
Retrieves the timer compare value currently effective, by reading CC8yCR1S and CC8yCR2S registers.

If the timer is active then the value being returned is currently being for the PWM duty cycle( timer compare value).
Note:
The XMC_CCU8_SLICE_SetTimerCompareMatch() would set the new compare value to a shadow register. This would only transfer the new values into the actual compare register if the shadow transfer request is enabled and if a period match occurs. Hence a consecutive call to XMC_CCU8_SLICE_GetTimerCompareMatch() would not reflect the new values until the shadow transfer completes.
Related APIs:
XMC_CCU8_SLICE_SetTimerCompareMatch().
XMC_CCU8_SLICE_TIMER_COUNT_MODE_t XMC_CCU8_SLICE_GetTimerCountingMode ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

XMC_CCU8_SLICE_TIMER_COUNT_MODE_t returns XMC_CCU8_SLICE_TIMER_COUNT_MODE_EA if edge aligned mode is selected returns XMC_CCU8_SLICE_TIMER_COUNT_MODE_CA if center aligned mode is selected
Description:
Retrieves timer counting mode either Edge aligned or Center Aligned, by reading CC8yTC.TCM bit.

Related APIs:
XMC_CCU8_SLICE_SetTimerCountingMode().
uint16_t XMC_CCU8_SLICE_GetTimerPeriodMatch ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

uint16_t returns the current timer period value Range: [0x0 to 0xFFFF]
Description:
Retrieves the timer period value currently effective, by reading CC8yPR register.

If the timer is active then the value being returned is currently being used for the PWM period.
Note:
The XMC_CCU8_SLICE_SetTimerPeriodMatch() would set the new period value to a shadow register. This would only transfer the new values into the actual period register if the shadow transfer request is enabled and if a period match occurs. Hence a consecutive call to XMC_CCU8_SLICE_GetTimerPeriodMatch() would not reflect the new values until the shadow transfer completes.
Related APIs:
XMC_CCU8_SLICE_SetTimerPeriodMatch().
XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t XMC_CCU8_SLICE_GetTimerRepeatMode ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t returns XMC_CCU8_SLICE_TIMER_REPEAT_MODE_REPEAT if continuous mode is selected returns XMC_CCU8_SLICE_TIMER_REPEAT_MODE_SINGLE if single shot mode is selected
Description:
Retrieves the Timer repeat mode, either Single shot mode or continuous mode, by reading CC8yTC.TSSM bit.

The timer will count upto the terminal count as specified in the period register and stops immediately if the repeat mode has been set to single shot mode. In the continuous mode of operation, the timer starts counting all over again after reaching the terminal count.
Related APIs:
XMC_CCU8_SLICE_SetTimerRepeatMode().
uint16_t XMC_CCU8_SLICE_GetTimerValue ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

uint16_t returns the current timer value Range: [0x0 to 0xFFFF]
Description:
Retrieves the latest timer value, from CC8yTIMER register.

Related APIs:
XMC_CCU8_SLICE_SetTimerValue().
bool XMC_CCU8_SLICE_IsDeadTimeCntr1Running ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Pointer to an instance of CC8 slice
Returns

bool returns true if the dead time counter of Compare channel-1 is running else it returns false.
Description:
Returns the state of the Dead time counter 1 (Either Running or stopped(idle)), by reading CC8yTCST.DTR1 bit. This returns the state of the dead time counter which is linked to Compare channel-1.
Related APIs:
XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
bool XMC_CCU8_SLICE_IsDeadTimeCntr2Running ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Pointer to an instance of CC8 slice
Returns

bool returns true if the dead time counter of Compare channel-2 is running else it returns false.
Description:
Returns the state of the Dead time counter 2 (Either Running or stopped(idle)), by reading CC8yTCST.DTR2 bit. This returns the state of the dead time counter which is linked to Compare channel-2.
Related APIs:
XMC_CCU8_SLICE_IsDeadTimeCntr1Running().
bool XMC_CCU8_SLICE_IsExtendedCapReadEnabled ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

bool would return true if the extended capture read back mode is enabled
Description:
Checks if Extended capture mode read is enabled for particular slice or not, by reading CC8yTC.ECM bit.

In this mode the there is only one associated read address for all the capture registers. Individual capture registers can still be accessed in this mode.
Related APIs:
XMC_CCU8_GetCapturedValueFromFifo().
bool XMC_CCU8_SLICE_IsTimerRunning ( const XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

bool returns true if the Timer is running else it returns false.
Description:
Returns the state of the timer (Either Running or stopped(idle)), by reading CC8yTCST.TRB bit.
Related APIs:
XMC_CCU8_SLICE_StartTimer()
XMC_CCU8_SLICE_StopTimer().
void XMC_CCU8_SLICE_LoadConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External load Function
Returns

None
Description:
Configures the Load Function for the slice, by configuring CC8yCMC.LDS bit.

Load function is mapped with one of the 3 events. Up on occurrence of the event,
if CC8yTCST.CDIR set to 0,CC8yTIMER register is reloaded with the value from compare channel 1 or compare channel 2
if CC8yTCST.CDIR set to 1,CC8yTIMER register is reloaded with the value from period register
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_LoadSelector | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CHANNEL_t | ch_num
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
ch_num | Select which compare channel value has to be loaded to the Timer register during external load event.
Returns

None
Description:
Up on occurrence of the external load event, if CC8yTCST.CDIR set to 0, CC8yTIMER register can be reloaded
with the value from compare channel 1 or compare channel 2
If CC8yTC.TLS is 0, compare channel 1 value is loaded to the CC8yTIMER register
If CC8yTC.TLS is 1, compare channel 2 value is loaded to the CC8yTIMER register
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_ModulationConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event,
 |  | const XMC_CCU8_SLICE_MODULATION_MODE_t | mod_mode,
 |  | const XMC_CCU8_SLICE_MODULATION_CHANNEL_t | channel,
 |  | const bool | synch_with_pwm
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External Modulation Function
mod_mode | Desired Modulation mode
channel | Specify the channel(s) on which the modulation should be applied.
synch_with_pwm | Option to synchronize modulation with PWM start Pass true if the modulation needs to be synchronized with PWM signal.
Returns

None
Description:
Configures the Output Modulation Function of the slice, by configuring CC8yCMC.MOS, CC8yTC.EMT and CC8yTC.EMS bits.

Modulation function is mapped with one of the 3 events. The output signal of the CCU can be modulated according to a external input. Additionally, the behaviour of the slice upon activation of the modulation function is configured as well.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_SetDeadTimePrescaler | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_DTC_DIV_t | div_val
 | ) |  |
Parameters
slice | Pointer to an instance of CC8 slice
div_val | Prescaler divider value
Returns

None
Description:
Configures clock division factor for dead time generator, by configuring CC8yDTC.DTCC bit. The Clock divider works on the timer clock. It is possible to scale the timer clock for the dead time generator by a factor of 1/2/4/8. This selection is passed as an argument to the API.
Related APIs:
XMC_CCU8_SLICE_DeadTimeInit()
XMC_CCU8_SLICE_SetDeadTimeValue()
XMC_CCU8_SLICE_ConfigureDeadTime()
XMC_CCU8_SLICE_IsDeadTimeCntr1Running()
XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
void XMC_CCU8_SLICE_SetDeadTimeValue | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CHANNEL_t | channel,
 |  | const uint8_t | rise_value,
 |  | const uint8_t | fall_value
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
channel | Compare channel number
rise_value | Programs rising edge delay Range: [0x0 to 0xFF]
fall_value | Programs falling edge delay Range: [0x0 to 0xFF]
Returns

None
Description:
Configures the dead time for rising and falling edges, by updating CC8y.DC1R, CC8y.DC1R registers.

This API will Configure the delay that is need either when the value changes from 0 to 1 (rising edge) or value changes from 1 to 0(falling edge). Directly accessed registers are CC8yDC1R, CC8yDC2R.
Related APIs:
XMC_CCU8_SLICE_DeadTimeInit()
XMC_CCU8_SLICE_SetDeadTimeValue()
XMC_CCU8_SLICE_ConfigureDeadTime()
XMC_CCU8_SLICE_IsDeadTimeCntr1Running()
XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
void XMC_CCU8_SLICE_SetDitherCompareValue | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint8_t | comp_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
comp_val | Dither compare value Range: [0x0 to 0xF]
Returns

None
Description:
Sets the dither spread/compare value, by setting CC8yDITS.DCVS bits.

This value is the cornerstone of PWM dithering feature. Dithering is applied/done when the value in the dithering counter is less than this compare/spread value. For all dithering counter values greater than the spread value, there is no dithering. After setting the value XMC_CCU8_EnableShadowTransfer() has to be called with appropriate mask.
Related APIs:
XMC_CCU8_SLICE_EnableDithering().
void XMC_CCU8_SLICE_SetEvent | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_IRQ_ID_t | event
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Event whose assertion can potentially lead to an interrupt
Returns

None
Description:
Manually asserts the requested event, by setting CC8ySWS register.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API manually asserts the requested event.
Related APIs:
XMC_CCU8_SLICE_SetInterruptNode()
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_EnableMultipleEvents().
void XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint8_t | cmp_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
cmp_val | Prescaler divider compare value Range: [0x0 to 0xF]
Returns

None
Description:
Programs the slice specific prescaler divider compare value, by configuring CC8yFPCS register.

The compare value is applicable only in floating mode of operation. The prescaler divider starts with an initial value and increments to the compare value steadily upon every period match. Once prescaler divider equals the prescaler divider compare value, the value in the former resets back to the PVAL (from FPC). After setting the value, XMC_CCU8_EnableShadowTransfer() has to be called with appropriate mask.
Related APIs:
XMC_CCU8_SLICE_SetPrescaler().
void XMC_CCU8_SLICE_SetInput | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event,
 |  | const XMC_CCU8_SLICE_INPUT_t | input
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | The External Event which needs to be configured.
input | One of the 16 inputs meant to be mapped to the desired event
Returns

None
Description:
Selects an input for an external event, by configuring CC8yINS register.

It is possible to select one of the possible 16 input signals for a given Event. This configures the CC8yINS.EVxIS for the selected event.
Related APIs:
XMC_CCU8_SLICE_StartConfig()
XMC_CCU8_SLICE_StopConfig()
XMC_CCU8_SLICE_LoadConfig()
XMC_CCU8_SLICE_ModulationConfig()
XMC_CCU8_SLICE_CountConfig()
XMC_CCU8_SLICE_GateConfig()
XMC_CCU8_SLICE_Capture0Config()
XMC_CCU8_SLICE_Capture1Config()
XMC_CCU8_SLICE_DirectionConfig()
XMC_CCU8_SLICE_StatusBitOverrideConfig()
XMC_CCU8_SLICE_TrapConfig().
void XMC_CCU8_SLICE_SetInterruptNode | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_IRQ_ID_t | event,
 |  | const XMC_CCU8_SLICE_SR_ID_t | sr
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Event which must be bound to a service request line
sr | The Service request line which is bound to the event
Returns

None
Description:
Binds requested event to a service request line, by configuring CC8ySRS register with respective event.

For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding NVIC node must be enabled as well. This API binds the requested event with the requested service request line(sr).
Related APIs:
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_SetEvent().
void XMC_CCU8_SLICE_SetOutPath | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | out_path_msk
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
out_path_msk | configuration for output path selection. combination of XMC_CCU8_OUT_PATH_t enum items can be used to create a mask.
Returns

None
Description:
Configure the out the path of the two compare channels with specified ST signal, by configuring the ^ CC8yCHC register.

For the two compare channels it is possible to select either direct ST signal or inverted ST signal. out_path_msk is used to set the required out put path.
Related APIs:
None
void XMC_CCU8_SLICE_SetPassiveLevel | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_OUTPUT_t | out,
 |  | const XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t | level
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
out | Output signal for which the passive level needs to be set.
level | Output passive level for the out signal
Returns

None
Description:
Configures the passive level for the slice output, by setting CC8yPSL register.

Defines the passive level for the timer slice output pin. Selects either level high is passive or level low is passive. This is the level of the output before the compare match is value changes it.
Related APIs:
XMC_CCU8_SLICE_EnableEvent()
XMC_CCU8_SLICE_SetEvent().
void XMC_CCU8_SLICE_SetPrescaler | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_PRESCALER_t | div_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
div_val | Prescaler divider value. Accepts enum :: XMC_CCU8_SLICE_PRESCALER_t Range: [0x0 to 0xF]
Returns

None
Description:
Programs the slice specific prescaler divider, by configuring the CC8yPSC and CC8yFPC registers.

The prescaler divider may only be programmed after the prescaler run bit has been cleared by calling XMC_CCU8_StopPrescaler().
Related APIs:
XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue().
void XMC_CCU8_SLICE_SetShadowTransferMode | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t | shadow_transfer_mode
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
shadow_transfer_mode | mode to be configured Use :: XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t enum items for mode
Returns

None
Description:
Configures when the shadow transfer has to occur, by setting STM bit in STC register.

After requesting for shadow transfer mode using XMC_CCU8_EnableShadowTransfer(), actual transfer occurs based on the selection done using this API (i.e. on period and One match, on Period match only, on One match only).
Note:
This is effective when the timer is configured in centre aligned mode.
Related APIs:
XMC_CCU8_EnableShadowTransfer()
Note
Not available for XMC4500 series
void XMC_CCU8_SLICE_SetTimerCompareMatch | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_COMPARE_CHANNEL_t | channel,
 |  | const uint16_t | compare_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
channel | Select the compare channel to which the compare_val has to programmed.
compare_val | Timer compare value
Returns

None
Description:
Programs the timer compare value, by writing CC8yCR1S and CC8yCR2S registers.

The PWM duty cycle is determined by this value.

The compare value is written to a shadow register. Explicitly enable the shadow transfer for the the period/compare value by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask.If shadow transfer is enabled and the timer is running, a period match transfers the value from the shadow register to the actual compare register.
Related APIs:
XMC_CCU8_EnableShadowTransfer().
void XMC_CCU8_SLICE_SetTimerCompareMatchChannel1 | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint16_t | compare_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
compare_val | Timer compare value
Returns

None
Description:
Programs the timer compare1 value, by writing CC8yCR1S register.

The PWM duty cycle is determined by this value.

The compare value is written to a shadow register. Explicitly enable the shadow transfer for the the period/compare value by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask. If shadow transfer is enabled and the timer is running, a period match transfers the value from the shadow register to the actual compare register.
Related APIs:
XMC_CCU8_EnableShadowTransfer().
void XMC_CCU8_SLICE_SetTimerCompareMatchChannel2 | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint16_t | compare_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
compare_val | Timer compare value
Returns

None
Description:
Programs the timer compare2 value, by writing CC8yCR2S register.

The PWM duty cycle is determined by this value.

The compare value is written to a shadow register. Explicitly enable the shadow transfer for the the period/compare value by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask. If shadow transfer is enabled and the timer is running, a period match transfers the value from the shadow register to the actual compare register.
Related APIs:
XMC_CCU8_EnableShadowTransfer().
void XMC_CCU8_SLICE_SetTimerCountingMode | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_TIMER_COUNT_MODE_t | mode
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
mode | Desired counting mode (Either Edge Aligned or Center Aligned)
Returns

None
Description:
Configures the timer counting mode either Edge Aligned or Center Aligned, by configuring CC8yTC.TCM bit.

In the edge aligned mode, the timer counts from 0 to the terminal count. Once the timer count has reached a preset compare value, the timer status output asserts itself. It will now deassert only after the timer count reaches the terminal count.
In the center aligned mode, the timer first counts from 0 to the terminal count and then back to 0. During this upward and downward counting, the timer status output stays asserted as long as the timer value is greater than the compare value.
Related APIs:
XMC_CCU8_SLICE_GetTimerCountingMode().
void XMC_CCU8_SLICE_SetTimerPeriodMatch | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint16_t | period_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
period_val | Timer period value Range: [0x0 to 0xFFFF]
Returns

None
Description:
Programs the timer period, by writing CC8yPRS register.

The frequency of counting/ PWM frequency is determined by this value. The period value is written to a shadow register. Explicitly enable the shadow transfer for the the period value by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask. If shadow transfer is enabled and the timer is running, a period match transfers the value from the shadow register to the actual period register.
Related APIs:
XMC_CCU8_SLICE_GetTimerPeriodMatch().
void XMC_CCU8_SLICE_SetTimerRepeatMode | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t | mode
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
mode | Desired repetition mode (Either single shot or Continuous)
Returns

None
Description:
Configures the Timer to either Single shot mode or continuous mode, by configuring CC8yTC.TSSM bit.

The timer will count up to the terminal count as specified in the period register and stops immediately if the repeat mode has been set to single shot. In the continuous mode of operation, the timer starts counting all over again after reaching the terminal count.
Related APIs:
XMC_CCU8_SLICE_GetTimerRepeatMode().
void XMC_CCU8_SLICE_SetTimerValue | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint16_t | timer_val
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
timer_val | The new timer value that has to be loaded into the TIMER register. Range: [0x0 to 0xFFFF]
Returns

None
Description:
Loads a new timer value, by setting CC8yTIMER register.

Note:
Request to load is ignored if the timer is running.
Related APIs:
XMC_CCU8_SLICE_GetTimerValue().
void XMC_CCU8_SLICE_StartConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event,
 |  | const XMC_CCU8_SLICE_START_MODE_t | start_mode
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External Start Function
start_mode | Behaviour of slice when the start function is activated
Returns

None
Description:
Configures the Start Function of the slice, by configuring CC8yCMC.ENDS and CC8yTC.ENDM bits.

Start function is mapped with one of the 3 events. An external signal can control when a CC8 timer should start. Additionally, the behaviour of the slice upon activation of the start function is configured as well.
Related APIs:
XMC_CCU8_SLICE_StopConfig()
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_StartTimer ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Starts the timer counting operation, by setting CC8yTCSET.TRBS bit.

It is necessary to have configured the CC8 slice before starting its timer. Before the Timer is started ensure that the clock is provided to the slice.
Related APIs:
XMC_CCU8_SLICE_StopTimer().
void XMC_CCU8_SLICE_StatusBitOverrideConfig ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Configures the status bit override Function of the slice, by configuring CC8yCMC.OFS bit.

Status bit override function is mapped with one of the 3 events. A slice can be configured to change the output of the timer's CC8yST1 signal depending on an external signal.
Related APIs:
XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent().
void XMC_CCU8_SLICE_StopClearTimer ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Stops and resets the timer count to zero, by setting CC8yTCCLR.TCC and CC8yTCCLR.TRBC bit.

Related APIs:
XMC_CCU8_SLICE_StartTimer().
void XMC_CCU8_SLICE_StopConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_EVENT_t | event,
 |  | const XMC_CCU8_SLICE_END_MODE_t | end_mode
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
event | Map an External event to the External Stop Function
end_mode | Behaviour of slice when the stop function is activated
Returns

None
Description:
Configures the Stop function for the slice, by configuring CC8yCMC.STRTS and CC8yTC.STRM bits.

Stop function is mapped with one of the 3 events. An external signal can control when a CCU8 timer should stop. Additionally, the behaviour of the slice upon activation of the stop function is configured as well.
Related APIs:
XMC_CCU8_SLICE_StartConfig()
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_StopTimer ( XMC_CCU8_SLICE_t *const slice )
Parameters
slice Constant pointer to CC8 Slice
Returns

None
Description:
Stops the Timer.

Timer counting operation can be stopped by invoking this API, by setting CC8yTCCLR.TRBC bit.
Related APIs:
XMC_CCU8_SLICE_StartTimer().
void XMC_CCU8_SLICE_TrapConfig | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const XMC_CCU8_SLICE_TRAP_EXIT_MODE_t | exit_mode,
 |  | bool | synch_with_pwm
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
exit_mode | How should a previously logged trap state be exited?
synch_with_pwm | Should exit of trap state be synchronized with PWM cycle start?
Returns

None
Description:
Configures the Trap Function of the slice, by configuring CC8yCMC.TS, CC8yTC.TRPSE, and CC8yTC.TRPSW bits.

Trap function is mapped with Event-2. Criteria for exiting the trap state is configured. This trap function allows PWM outputs to react on the state of an input pin. Thus PWM output can be forced to inactive state upon detection of a trap. It is also possible to synchronize the trap function with the PWM signal using the synch_with_pwm.
Related APIs:
XMC_CCU8_SLICE_ConfigureEvent()
XMC_CCU8_SLICE_SetInput().
void XMC_CCU8_SLICE_WriteCoherentlyWithPWMCycle | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | coherent_write
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
coherent_write | specifies for what fields this mode has to be applied Use :: XMC_CCU8_SLICE_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configures the specified fields shadow value to be updated in synchronous with PWM after shadow transfer request, by clearing IRPC, IRCC1, IRCC2, IRLC, IRDC, IRFC bits in STC register.

When coherent shadow is enabled, after calling XMC_CCU8_EnableShadowTransfer(), the value which are written in the respective shadow registers get updated according the configuration done using XMC_CCU8_SLICE_SetShadowTransferMode() API.
Note:
Related APIs:
XMC_CCU8_EnableShadowTransfer(), XMC_CCU8_SLICE_SetShadowTransferMode()
Note
Only available for XMC1400 series
void XMC_CCU8_SLICE_WriteImmediateAfterShadowTransfer | ( | XMC_CCU8_SLICE_t *const | slice,
 |  | const uint32_t | immediate_write
 | ) |  |
Parameters
slice | Constant pointer to CC8 Slice
immediate_write | specifies for what fields this mode has to be applied Use :: XMC_CCU8_SLICE_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
Returns

None
Description:
Configures the specified fields shadow value to be updated immediately after shadow transfer request, by setting IRPC, IRCC1, IRCC2, IRLC, IRDC, IRFC bits in STC register.

When immediate shadow is enabled, by calling XMC_CCU8_EnableShadowTransfer() the value which are written in the shadow registers get updated to the actual registers immediately.
Note:
Related APIs:
XMC_CCU8_EnableShadowTransfer()
Note
Only available for XMC1400 series
void XMC_CCU8_StartPrescaler ( XMC_CCU8_MODULE_t *const module )
Parameters
module Constant pointer to CCU8 module
Returns

None
Description:
Starts the prescaler and restores clocks to the timer slices, by setting GIDLC.SPRB bit.

Once the input to the prescaler has been chosen and the prescaler divider of all slices programmed, the prescaler itself may be started. Invoke this API after XMC_CCU8_Init() (Mandatory to fully initialize the module).
Related APIs:
XMC_CCU8_Init()
XMC_CCU8_EnableClock()
XMC_CCU8_DisableClock()
XMC_CCU8_StartPrescaler()
XMC_CCU8_StopPrescaler().
void XMC_CCU8_StopPrescaler ( XMC_CCU8_MODULE_t *const module )
Parameters
module Constant pointer to CCU8 module
Returns

None
Description:
Stops the prescaler and blocks clocks to the timer slices, by setting GIDLS.CPRB bit.

Clears the run bit of the prescaler. Ensures that the module clock is not supplied to the slices of the module.
Related APIs:
XMC_CCU8_EnableClock()
XMC_CCU8_DisableClock()
XMC_CCU8_StartPrescaler()
XMC_CCU8_StopPrescaler().
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_CCU8_SLICE_CAPTURE_CONFIG_t Struct Reference

Data Fields
XMC_CCU8_SLICE_CAPTURE_CONFIG_t Struct Reference
XMC Peripheral Library » CCU8

#include <xmc_ccu8.h>

Data Fields

uint32_t | float_limit: 4
uint32_t | prescaler_initval: 4
uint32_t | timer_concatenation: 1
uint32_t | fifo_enable: 1
uint32_t | ignore_full_flag: 1
uint32_t | prescaler_mode: 1
uint32_t | same_event: 1
uint32_t | timer_clear_mode: 2

Detailed Description

Configuration data structure for CCU8 slice. Specifically configures the CCU8 slice to capture mode operation. This excludes event and function configuration.

Field Documentation

uint32_t fifo_enable

Should the capture registers be setup as a FIFO?(Extended capture mode)

uint32_t float_limit

The max value which the prescaler divider can increment to

uint32_t ignore_full_flag

Should updates to capture registers follow full flag rules?

uint32_t prescaler_initval

Prescaler divider value

uint32_t prescaler_mode

Normal or floating prescaler Accepts enum :: XMC_CCU8_SLICE_PRESCALER_MODE_t

uint32_t same_event

Should the capture event for C1V/C0V and C3V/C2V be same capture edge?

uint32_t timer_clear_mode

How should the timer register be cleared upon detection of capture event? Accepts enum XMC_CCU8_SLICE_TIMER_CLEAR_MODE_t

uint32_t timer_concatenation

Enables the concatenation of the timer

The documentation for this struct was generated from the following file:
  • xmc_ccu8.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_CCU8_SLICE_COMPARE_CONFIG_t Struct Reference

Data Fields
XMC_CCU8_SLICE_COMPARE_CONFIG_t Struct Reference
XMC Peripheral Library » CCU8

#include <xmc_ccu8.h>

Data Fields

uint32_t | dither_limit: 4
uint32_t | float_limit: 4
uint32_t | prescaler_initval: 4
uint32_t | timer_concatenation: 1
uint32_t | asymmetric_pwm: 1
uint32_t | dither_duty_cycle: 1
uint32_t | dither_timer_period: 1
uint32_t | invert_out0: 1
uint32_t | invert_out1: 1
uint32_t | invert_out2: 1
uint32_t | invert_out3: 1
uint32_t | mcm_ch1_enable: 1
uint32_t | mcm_ch2_enable: 1
uint32_t | monoshot: 1
uint32_t | passive_level_out0: 1
uint32_t | passive_level_out1: 1
uint32_t | passive_level_out2: 1
uint32_t | passive_level_out3: 1
uint32_t | prescaler_mode: 1
uint32_t | shadow_xfer_clear: 1
uint32_t | slice_status: 2
uint32_t | timer_mode: 1

Detailed Description

Configuration data structure for CCU8 slice. Specifically configures the CCU8 slice to compare mode operation. This excludes event and function configuration.

Field Documentation

uint32_t asymmetric_pwm

Should the PWM be a function of the 2 compare channels rather than period value?

uint32_t dither_duty_cycle

Can the compare match of the timer dither?

uint32_t dither_limit

The value that determines the spreading of dithering Range : [0 to 15]

uint32_t dither_timer_period

Can the period of the timer dither?

uint32_t float_limit

The max value which the prescaler divider can increment to. Range : [0 to 15]

uint32_t invert_out0

Should inverted ST of Channel-1 be connected to OUT0?

uint32_t invert_out1

Should inverted ST of Channel-1 be connected to OUT1?

uint32_t invert_out2

Should inverted ST of Channel-2 be connected to OUT2?

uint32_t invert_out3

Should inverted ST of Channel-2 be connected to OUT3?

uint32_t mcm_ch1_enable

Multi-Channel mode for compare channel 1 enable?

uint32_t mcm_ch2_enable

Multi-Channel mode for compare channel 2 enable?

uint32_t monoshot

Single shot or Continuous mode . Accepts enum :: XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t

uint32_t passive_level_out0

ST and OUT passive levels Configuration for OUT0. Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t

uint32_t passive_level_out1

ST and OUT passive levels Configuration for OUT1. Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t

uint32_t passive_level_out2

ST and OUT passive levels Configuration for OUT2. Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t

uint32_t passive_level_out3

ST and OUT passive levels Configuration for OUT3. Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t

uint32_t prescaler_initval

Initial prescaler divider value Accepts enum :: XMC_CCU8_SLICE_PRESCALER_t

uint32_t prescaler_mode

Normal or floating prescaler mode. Accepts enum :: XMC_CCU8_SLICE_PRESCALER_MODE_t

uint32_t shadow_xfer_clear

Should PR and CR shadow xfer happen when timer is cleared?

uint32_t slice_status

Which of the two channels drives the slice status output. Accepts enum :: XMC_CCU8_SLICE_STATUS_t

uint32_t timer_concatenation

Enables the concatenation of the timer if true

uint32_t timer_mode

Edge aligned or Centre Aligned. Accepts enum :: XMC_CCU8_SLICE_TIMER_COUNT_MODE_t

The documentation for this struct was generated from the following file:
  • xmc_ccu8.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t Struct Reference

XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t Struct Reference
XMC Peripheral Library » CCU8

#include <xmc_ccu8.h>

Detailed Description

Dead Time configuration

Field Documentation

uint32_t channel1_inv_st_path

Should dead time be applied to inverse ST output of Compare Channel-1?

uint32_t channel1_st_falling_edge_counter

Contains the delay value that is applied to the falling edge for compare channel-1. Range: [0x0 to 0xFF]

uint32_t channel1_st_path

Should dead time be applied to ST output of Compare Channel-1?

uint32_t channel1_st_rising_edge_counter

Contains the delay value that is applied to the rising edge for compare channel-1. Range: [0x0 to 0xFF]

uint32_t channel2_inv_st_path

Should dead time be applied to inverse ST output of Compare Channel-2?

uint32_t channel2_st_falling_edge_counter

Contains the delay value that is applied to the falling edge for compare channel-2. Range: [0x0 to 0xFF]

uint32_t channel2_st_path

Should dead time be applied to ST output of Compare Channel-2?

uint32_t channel2_st_rising_edge_counter

Contains the delay value that is applied to the rising edge for compare channel-2. Range: [0x0 to 0xFF]

uint32_t div

Dead time prescaler divider value. Accepts enum XMC_CCU8_SLICE_DTC_DIV_t

uint32_t enable_dead_time_channel1

Enable dead time for Compare Channel-1

uint32_t enable_dead_time_channel2

Enable dead time for Compare Channel-2

The documentation for this struct was generated from the following file:
  • xmc_ccu8.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_CCU8_SLICE_EVENT_CONFIG_t Struct Reference

Data Fields
XMC_CCU8_SLICE_EVENT_CONFIG_t Struct Reference
XMC Peripheral Library » CCU8

#include <xmc_ccu8.h>

Data Fields

XMC_CCU8_SLICE_EVENT_FILTER_t duration
XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_t edge
XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t level
XMC_CCU8_SLICE_INPUT_t mapped_input

Detailed Description

Configuration data structure of an External Event(Event-0/1/2). Needed to configure the various aspects of an External Event. This structure will not connect the external event with an external function.

Field Documentation

XMC_CCU8_SLICE_EVENT_FILTER_t duration

Low Pass filter duration in terms of fCCU clock cycles.

XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_t edge

Select the event edge of the input signal. This is needed for an edge sensitive External function.

XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t level

Select the event level of the input signal. This is needed for an level sensitive External function.

XMC_CCU8_SLICE_INPUT_t mapped_input

Required input signal for the Event.

The documentation for this struct was generated from the following file:
  • xmc_ccu8.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: ERU

Data Structures | Enumerations | Functions
ERU
XMC Peripheral Library

Data Structures

struct | XMC_ERU_ETL_CONFIG_t
union | XMC_ERU_OGU_CONFIG_t
struct | XMC_ERU_t

Enumerations

Functions

void | XMC_ERU_Disable (XMC_ERU_t *const eru)
void | XMC_ERU_Enable (XMC_ERU_t *const eru)
void | XMC_ERU_ETL_ClearStatusFlag (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_DisableOutputTrigger (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_EnableOutputTrigger (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t trigger)
XMC_ERU_ETL_EDGE_DETECTION_t | XMC_ERU_ETL_GetEdgeDetection (XMC_ERU_t *const eru, const uint8_t channel)
uint32_t | XMC_ERU_ETL_GetStatusFlag (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_Init (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_CONFIG_t *const config)
void | XMC_ERU_ETL_SetEdgeDetection (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_EDGE_DETECTION_t edge_detection)
void | XMC_ERU_ETL_SetInput (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_INPUT_A_t input_a, const XMC_ERU_ETL_INPUT_B_t input_b)
void | XMC_ERU_ETL_SetSource (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_SOURCE_t source)
void | XMC_ERU_ETL_SetStatusFlag (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_SetStatusFlagMode (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_STATUS_FLAG_MODE_t mode)
void | XMC_ERU_OGU_DisablePatternDetection (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_OGU_DisablePeripheralTrigger (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_OGU_EnablePatternDetection (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t input)
void | XMC_ERU_OGU_EnablePeripheralTrigger (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_PERIPHERAL_TRIGGER_t peripheral_trigger)
uint32_t | XMC_ERU_OGU_GetPatternDetectionStatus (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_OGU_Init (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_CONFIG_t *const config)
void | XMC_ERU_OGU_SetServiceRequestMode (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_SERVICE_REQUEST_t mode)

Detailed Description

The Event Request Unit (ERU) is a versatile multiple input event detection and processing unit. The ERU module can be used to expand the P-to-P connections of the device: ports-to-peripherals, peripherals-to-peripherals and ports-to-ports. It also offers configurable logic, that allows the generation of triggers, pattern detection and real-time signal monitoring.

The driver is divided into two sections:

Event trigger logic (ERU_ETL):
This section of the LLD provides the configuration structure XMC_ERU_ETL_CONFIG_t and the initialization function XMC_ERU_ETL_Init().
It can be used to:
  1. Select one out of two inputs (A and B). For each of these two inputs, a vector of 4 possible signals is available. (XMC_ERU_ETL_SetSource())
  2. Logically combine the two input signals to a common trigger. (XMC_ERU_ETL_SetSource())
  3. Define the transition (edge selection, or by software) that leads to a trigger event and can also store this status. (XMC_ERU_ETL_SetEdgeDetection() and XMC_ERU_ETL_SetStatusFlag())
  4. Distribute the events and status flags to the output channels. (XMC_ERU_ETL_EnableOutputTrigger())
Output gating unit (ERU_OGU):
This section of the LLD provides the provides the configuration structure XMC_ERU_OGU_CONFIG_t and the initialization function XMC_ERU_ETL_OGU_Init(). It can be used to:
  1. Combine the trigger events and status information and gates the output depending on a gating signal. (XMC_ERU_OGU_EnablePatternDetection(), XMC_ERU_OGU_DisablePeripheralTrigger(), XMC_ERU_OGU_SetServiceRequestMode())

Enumeration Type Documentation

enum XMC_ERU_ETL_EDGE_DETECTION_t

Defines trigger edge for the event generation by ETLx (Event Trigger Logic, x = [0 to 3]) unit, by getting the signal from ERSx(Event request source, x = [0 to 3]) unit.

Enumerator
XMC_ERU_ETL_EDGE_DETECTION_DISABLED | no event enabled
XMC_ERU_ETL_EDGE_DETECTION_RISING | detection of rising edge generates the event
XMC_ERU_ETL_EDGE_DETECTION_FALLING | detection of falling edge generates the event
XMC_ERU_ETL_EDGE_DETECTION_BOTH | detection of either edges generates the event
enum XMC_ERU_ETL_INPUT_A_t

Defines input signal for path A of ERSx(Event request source, x = [0 to 3]) unit.

ETLx Input A selection
Enumerator
XMC_ERU_ETL_INPUT_A0 | input A0 is selected
XMC_ERU_ETL_INPUT_A1 | input A1 is selected
XMC_ERU_ETL_INPUT_A2 | input A2 is selected
XMC_ERU_ETL_INPUT_A3 | input A3 is selected
enum XMC_ERU_ETL_INPUT_B_t

Defines input signal for path B of ERSx(Event request source, x = [0 to 3]) unit.

ETLx Input B selection
Enumerator
XMC_ERU_ETL_INPUT_B0 | input B0 is selected
XMC_ERU_ETL_INPUT_B1 | input B1 is selected
XMC_ERU_ETL_INPUT_B2 | input B2 is selected
XMC_ERU_ETL_INPUT_B3 | input B3 is selected
enum XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t

Defines Output Channel of OGUy(Output gating unit y = [0 to 3]) to be mapped by the trigger pulse generated by ETLx(Event Trigger Logic, x = [0 to 3]) unit.

Note
Generation of output trigger pulse need to be enabled XMC_ERU_OGU_PERIPHERAL_TRIGGER_t
ERU_ETL ERU_OGU Connection matrix
Enumerator
XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL0 | Event from input ETLx triggers output OGU0
XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL1 | Event from input ETLx triggers output OGU1
XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL2 | Event from input ETLx triggers output OGU2
XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL3 | Event from input ETLx triggers output OGU3
enum XMC_ERU_ETL_OUTPUT_TRIGGER_t

Defines generation of the trigger pulse by ETLx(Event Trigger Logic, x = [0 to 3]) unit. Use type XMC_ERU_ETL_OUTPUT_TRIGGER_t for this enum.

Enumerator
XMC_ERU_ETL_OUTPUT_TRIGGER_DISABLED | trigger pulse generation disabled
XMC_ERU_ETL_OUTPUT_TRIGGER_ENABLED | trigger pulse generation enabled
enum XMC_ERU_ETL_SOURCE_t

Defines input path combination along with polarity for event generation by ERSx(Event request source) unit to ETLx(Event trigger logic),x = [0 to 3] unit.

ETLx input trigger signal generation
Enumerator
XMC_ERU_ETL_SOURCE_A | select (A) path as a event source
XMC_ERU_ETL_SOURCE_B | select (B) path as a event source
XMC_ERU_ETL_SOURCE_A_OR_B | select (A OR B) path as a event source
XMC_ERU_ETL_SOURCE_A_AND_B | select (A AND B) path as a event source
XMC_ERU_ETL_SOURCE_NOT_A | select (inverted A) path as a event source
XMC_ERU_ETL_SOURCE_NOT_A_OR_B | select (inverted A OR B) path as a event source
XMC_ERU_ETL_SOURCE_NOT_A_AND_B | select (inverted A AND B) path as a event source
XMC_ERU_ETL_SOURCE_NOT_B | select (inverted B) path as a event source
XMC_ERU_ETL_SOURCE_A_OR_NOT_B | select (A OR inverted B) path as a event source
XMC_ERU_ETL_SOURCE_A_AND_NOT_B | select (A AND inverted B) path as a event source
XMC_ERU_ETL_SOURCE_NOT_A_OR_NOT_B | select (inverted A OR inverted B) path as a event source
XMC_ERU_ETL_SOURCE_NOT_A_AND_NOT_B | select (inverted A AND inverted B) path as a event source
enum XMC_ERU_ETL_STATUS_FLAG_MODE_t

Defines status flag reset mode generated by ETLx(Event Trigger Logic, x = [0 to 3]) unit. Use type XMC_ERU_ETL_STATUS_FLAG_MODE_t for this enum.

Enumerator
XMC_ERU_ETL_STATUS_FLAG_MODE_SWCTRL | Status flag is in sticky mode. Retain the same state until cleared by software. In case of pattern match this mode is used.
XMC_ERU_ETL_STATUS_FLAG_MODE_HWCTRL | Status flag is in non-sticky mode. Automatically cleared by the opposite edge detection. eg. if positive edge is selected as trigger event, for the negative edge event the status flag is cleared.
enum XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t

Defines the inputs for Pattern detection. The configured status flag signal from the ETLx(Event Trigger Logic, x = [0 to 3]) unit indicates the pattern to be detected.

Enumerator
XMC_ERU_OGU_PATTERN_DETECTION_INPUT0 | Status flag ETL0, participating in pattern match
XMC_ERU_OGU_PATTERN_DETECTION_INPUT1 | Status flag ETL1, participating in pattern match
XMC_ERU_OGU_PATTERN_DETECTION_INPUT2 | Status flag ETL0, participating in pattern match
XMC_ERU_OGU_PATTERN_DETECTION_INPUT3 | Status flag ETL0, participating in pattern match
enum XMC_ERU_OGU_PATTERN_DETECTION_t

Defines pattern detection feature to be enabled or not in OGUy(Output gating unit, y = [0 to 3]).

Enumerator
XMC_ERU_OGU_PATTERN_DETECTION_DISABLED | Pattern match is disabled
XMC_ERU_OGU_PATTERN_DETECTION_ENABLED | Pattern match is enabled, the selected status flags of ETLx(Event Trigger Logic, x = [0 to 3]) unit, are used in pattern detection.
enum XMC_ERU_OGU_PERIPHERAL_TRIGGER_t

Defines peripheral trigger signal for event generation. Based on the selected peripheral for event generation, the trigger signal is mapped.

Enumerator
XMC_ERU_OGU_PERIPHERAL_TRIGGER1 | OGUy1 signal is mapped for event generation
XMC_ERU_OGU_PERIPHERAL_TRIGGER2 | OGUy2 signal is mapped for event generation
XMC_ERU_OGU_PERIPHERAL_TRIGGER3 | OGUy3 signal is mapped for event generation
enum XMC_ERU_OGU_SERVICE_REQUEST_t

Defines the gating scheme for service request generation. In later stage of the OGUy(Output gating unit, y = [0 to 3]) based on the gating scheme selected ERU_GOUTy(gated output signal) output is defined.

Interrupt gating signal
Enumerator
XMC_ERU_OGU_SERVICE_REQUEST_DISABLED | Service request blocked, ERUx_GOUTy = 0
XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER | Service request generated enabled, ERUx_GOUTy = 1
XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MATCH | Service request generated on trigger event and input pattern match, ERUx_GOUTy = ~pattern matching result
XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MISMATCH | Service request generated on trigger event and input pattern mismatch, ERUx_GOUTy = pattern matching result

Function Documentation

void XMC_ERU_Disable ( XMC_ERU_t *const eru )
Parameters
eru A constant pointer to XMC_ERU_t, pointing to the ERU base address
Returns
None
Description:
Abstract API, not mandatory to call.
Note:
Related APIs:
XMC_ERU_Enable()
void XMC_ERU_Enable ( XMC_ERU_t *const eru )
Parameters
eru A constant pointer to XMC_ERU_t, pointing to the ERU base address
Returns
None
Description:
Abstract API, not mandatory to call.
This API is called by XMC_ERU_ETL_Init() or XMC_ERU_OGU_Init() and therefore no need to call it explicitly during initialization sequence. Call this API to enable ERU1 module once again if the module is disabled by calling XMC_ERU_Disable(). For ERU0 module clock gating and reset features are not available.
Note:
Related APIs:
XMC_ERU_ETL_Init(), XMC_ERU_OGU_Init(), XMC_ERU_Disable().
void XMC_ERU_ETL_ClearStatusFlag | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3]
Returns
None
Description:
Set the status flag bit(FL) in EXICONx(x = [0 to 3]).
If auto clear of the status flag is not enabled by detection of the opposite edge of the event edge, this API clears the Flag. SO that next event is considered as new event.
Related APIs:
XMC_ERU_ETL_SetStatusFlag(), XMC_ERU_ETL_GetStatusFlag()
void XMC_ERU_ETL_DisableOutputTrigger | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3].
Returns
None
Description:
Disables the trigger pulse generation by clearing the (PE) of the EXICONx(x = channel).
Typically this can used when only pattern match is being used for event generation.
Related APIs:
XMC_ERU_ETL_EnableOutputTrigger()
void XMC_ERU_ETL_EnableOutputTrigger | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t | trigger
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3].
trigger | Output Channel of OGUy(Output gating unit y = [0 to 3]) to be mapped by the trigger pulse Refer XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t for valid value.
Returns
None
Description:
Configure which Channel of OGUy(Output gating unit y = [0 to 3]) to be mapped by the trigger pulse generated by ETLx(Event Trigger Logic, x = channel) by setting (OCS and PE) bit fields.
The trigger pulse is generated for one clock pulse along with the flag status update. This is typically used to trigger the ISR for the external events. The configured OGUy(Output gating unit y = [0 to 3]), generates the event based on the trigger pulse.If output trigger pulse generation is disabled by XMC_ERU_ETL_DisableOutputTrigger(), XMC_ERU_ETL_EnableOutputTrigger() can called to reconfigure. These values are set during initialization in XMC_ERU_ETL_Init(). Call this to change the trigger edge, as needed later in the program.
Related APIs:
XMC_ERU_ETL_DisableOutputTrigger()
XMC_ERU_ETL_EDGE_DETECTION_t XMC_ERU_ETL_GetEdgeDetection | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3]
Returns
XMC_ERU_ETL_EDGE_DETECTION_t indicate which egde/s is configured for event generation
Description:
Return event trigger edge/s by reading (RE, FE) bits of EXICONx(x = [0 to 3]) register.
Rising edge, falling edge or either edges can be selected to generate the event. Call this to get the configured trigger edge.
uint32_t XMC_ERU_ETL_GetStatusFlag | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3].
Returns
uint32_t Current state of the status flag bit(FL). Result is in 32-bit format.
Description:
Returns status flag state of channel.
The function can typically be used to clear the status flag using software, when auto clear is not enabled.
Related APIs:
XMC_ERU_ETL_SetStatusFlag(), XMC_ERU_ETL_ClearStatusFlag()
void XMC_ERU_ETL_Init | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_ETL_CONFIG_t *const | config
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_ETLx(Event trigger logic unit) channel Range : [0 to 3]
config | pointer to a constant ERU_ETLx configuration data structure. Refer data structure XMC_ERU_ETL_CONFIG_t for detail.
Returns
None

Description:
Initializes the selected ERU_ETLx channel with the config structure.

Invokes XMC_ERU_Enable() to enable eru module clock. Then configures

  • Input signal for path A and Path B,
  • Trigger pulse generation,
  • status flag clear mode,
  • Event Trigger edge,
  • Output Channel of OGUy(Output gating unit y = [0 to 3]) to be mapped by the trigger pulse,
  • input path combination along with polarity for event generation

.

void XMC_ERU_ETL_SetEdgeDetection | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_ETL_EDGE_DETECTION_t | edge_detection
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3]
edge_detection | event trigger edge. Refer XMC_ERU_ETL_EDGE_DETECTION_t enum for valid values.
Returns
None
Description:
Configure event trigger edge/s by setting (RE, FE) bits of EXICONx(x = [0 to 3]) register.
Rising edge, falling edge or either edges can be selected to generate the event.These values are set during initialization in XMC_ERU_ETL_Init(). Call this to change the trigger edge, as needed later in the program.
void XMC_ERU_ETL_SetInput | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_ETL_INPUT_A_t | input_a,
 |  | const XMC_ERU_ETL_INPUT_B_t | input_b
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3]
input_a input signal for path A of ERSx(Event request source, x = [0 to 3]) unit.
Refer XMC_ERU_ETL_INPUT_A_t for valid value or xmc1_eru_map.h/xmc4_eru_map.h file where the mapping of the input is done based on selected signal.
e.g: ERU0_ETL3_INPUTA_P2_7.
input_b input signal for path B of ERSx(Event request source, x = [0 to 3]) unit.
Refer XMC_ERU_ETL_INPUT_B_t for valid value or xmc1_eru_map.h/xmc4_eru_map.h file where the mapping of the input is done based on selected signal.
e.g: ERU0_ETL0_INPUTB_P2_0.
Returns
None
Description:
Configures the event source for path A and path B in with selected input_a and input_b respectively.
These values are set during initialization in XMC_ERU_ETL_Init(). Call this to change the input, as needed later in the program. According to the ports/peripheral selected, the event source has to be changed.
void XMC_ERU_ETL_SetSource | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_ETL_SOURCE_t | source
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3]
source | input path combination along with polarity for event generation by ERSx(Event request source) unit. Refer XMC_ERU_ETL_SOURCE_t enum for valid input values.
Returns
None
Description:
Select input path combination along with polarity for event generation by setting (SS, NA, NB) bits in ERSx(Event request source) unit
The signal ERSxO is generated from the selection and this is connected to ETLx(Event trigger logic, x = [0 to 3]) for further action. These values are set during initialization in XMC_ERU_ETL_Init(). Call this to change the source, as needed later in the program.
void XMC_ERU_ETL_SetStatusFlag | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3]
Returns
None
Description:
Set the status flag bit(FL) in EXICONx(x = [0 to 3]).
The status flag indicates that the configured event has occurred. This status flag is used in Pattern match detection by OGUy(Output gating unit, y = [0 to 3]).
Related APIs:
XMC_ERU_ETL_ClearStatusFlag(), XMC_ERU_ETL_GetStatusFlag()
void XMC_ERU_ETL_SetStatusFlagMode | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_ETL_STATUS_FLAG_MODE_t | mode
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address.
channel | ERU_ETLx(Event trigger logic unit) channel. Range : [0 to 3].
mode | Set whether status flag has to be cleared by software or hardware. Refer XMC_ERU_ETL_STATUS_FLAG_MODE_t for valid value.
Returns
None
Description:
Set the mode for status flag mode by setting (LD) bit in EXICONx(x = channel) register.
If SWCTRL is selected, status flag has to be cleared by software. This is typically used for pattern match detection. If HWCTRL is selected, status flag is cleared by hardware. If Positive edge is selected as event edge, for negative edge status flag is cleared and vice versa.This is typically used for continuous event detection.These values are set during initialization in XMC_ERU_ETL_Init(). Call this to change the trigger edge, as needed later in the program.
Related APIs:
XMC_ERU_ETL_ClearStatusFlag(), XMC_ERU_ETL_GetStatusFlag()
void XMC_ERU_OGU_DisablePatternDetection | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
Returns
None
Description:
Disable the pattern detection by clearing (GEEN) bit.
Typically XMC_ERU_OGU_DisablePatternDetection is used when events has to be generated peripheral triggers.
Related APIs:
XMC_ERU_OGU_EnablePatternDetection(), XMC_ERU_OGU_GetPatternDetectionStatus()
void XMC_ERU_OGU_DisablePeripheralTrigger | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
Returns
None
Description:
Disables event generation based on peripheral trigger by clearing (ISS) bit.
This is typically used when peripheral trigger is no longer need. After calling XMC_ERU_OGU_DisablePeripheralTrigger(), XMC_ERU_OGU_EnablePeripheralTrigger() has to be called to reconfigure the signals again.
Related APIs:
XMC_ERU_OGU_EnablePeripheralTrigger()
void XMC_ERU_OGU_EnablePatternDetection | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t | input
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
input | ERU_ETLx(x = [0 to 3]), for pattern match detection. Refer XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t for valid values. Logical OR combination of the enum items can be passed as the input.
Returns
None
Description:
Configures ERU_ETLx(x = [0 to 3]) for pattern match detection by setting IPENx(x = [0 to 3]) and GEEN bits.
These bits are dedicated to each channel of the ERU_ETLx(x = [0 to 3]). These values are set during initialization in XMC_ERU_OGU_Init(). Call this to change the pattern, as needed later in the program.
Related APIs:
XMC_ERU_OGU_DisablePatternDetection(), XMC_ERU_OGU_GetPatternDetectionStatus()
void XMC_ERU_OGU_EnablePeripheralTrigger | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_OGU_PERIPHERAL_TRIGGER_t | peripheral_trigger
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
peripheral_trigger | which peripheral trigger signal is used for event generation. Refer XMC_ERU_OGU_PERIPHERAL_TRIGGER_t for the valid values, or xmc1_eru_map.h/xmc4_eru_map.h file where the mapping of the peripheral input is done based on input. e.g: ERU0_OGU0_PERIPHERAL_TRIGGER_CCU40_SR0.
Returns
None
Description:
Configures peripheral trigger input, by setting (ISS) bit.
Based on the peripheral the input signal has to be selected. These values are set during initialization in XMC_ERU_OGU_Init(). Call this to change the input, as needed later in the program.
Related APIs:
XMC_ERU_OGU_DisablePeripheralTrigger()
uint32_t XMC_ERU_OGU_GetPatternDetectionStatus | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
Returns
uint32_t returns the pattern match result. Result is in 32-bit format.
Description:
This API returns the pattern match result by reading (PDR) bit.
Related APIs:
XMC_ERU_OGU_EnablePatternDetection(), XMC_ERU_OGU_DisablePatternDetection()
void XMC_ERU_OGU_Init | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_OGU_CONFIG_t *const | config
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
config | pointer to constant ERU_OGUy configuration data structure. Refer data structure XMC_ERU_OGU_CONFIG_t for detail.
Returns
None

Description:
Initializes the selected ERU_OGUy channel with the config structure.

Invokes XMC_ERU_Enable() to enable eru module clock. Then configures

  • Pattern detection,
  • Peripheral trigger input,
  • Gating for service request generation

.

void XMC_ERU_OGU_SetServiceRequestMode | ( | XMC_ERU_t *const | eru,
 |  | const uint8_t | channel,
 |  | const XMC_ERU_OGU_SERVICE_REQUEST_t | mode
 | ) |  |
Parameters
eru | A constant pointer to XMC_ERU_t, pointing to the ERU base address
channel | ERU_OGUy(Output gating unit) channel Range : [0 to 3]
mode | gating scheme for service request generation. Refer XMC_ERU_OGU_SERVICE_REQUEST_t for valid values.
Returns
None
Description:
Configures the gating scheme for service request generation by setting (GP) bit.
Typically this function is used to change the service request generation scheme. These values are set during initialization in XMC_ERU_OGU_Init(). Call this to change the gating mode, as needed later in the program.
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_ERU_ETL_CONFIG_t Struct Reference

XMC_ERU_ETL_CONFIG_t Struct Reference
XMC Peripheral Library » ERU

#include <xmc_eru.h>

Detailed Description

Structure for initializing ERUx_ETLy (x = [0], y = [0..4]) module.

Field Documentation

uint32_t edge_detection

Configure the event trigger edge(FE, RE). Refer XMC_ERU_ETL_EDGE_DETECTION_t for valid values.

uint32_t enable_output_trigger

Enables the generation of trigger pulse(PE), for the configured edge detection. This accepts boolean values as input.

uint32_t input

While configuring the bit fields, the values have to be shifted according to the position

uint32_t input_a

Configures input A. Refer XMC_ERU_ETL_INPUT_A_t for valid values

uint32_t input_b

Configures input B. Refer XMC_ERU_ETL_INPUT_B_t for valid values

uint32_t output_trigger_channel

Output channel select(OCS) for ETLx output trigger pulse. Refer XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t for valid values.

uint32_t source

Input path combination along with polarity for event generation. Refer XMC_ERU_ETL_SOURCE_t for valid values.

uint32_t status_flag_mode

Enables the status flag auto clear(LD), for the opposite edge of the configured event edge. This accepts boolean values as input.

The documentation for this struct was generated from the following file:
  • xmc_eru.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_ERU_OGU_CONFIG_t Union Reference

XMC_ERU_OGU_CONFIG_t Union Reference
XMC Peripheral Library » ERU

#include <xmc_eru.h>

Detailed Description

Structure for initializing ERUx_OGUy (x = [0], y = [0..4]) module.

Field Documentation

uint32_t enable_pattern_detection

Enable generation of(GEEN) event for pattern detection result change. This accepts boolean values as input.

uint32_t pattern_detection_input

Enable input for the pattern detection(IPENx, x = [0 to 3]). Refer XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t for valid values. OR combination of the enum items given as input

uint32_t peripheral_trigger

peripheral trigger(ISS) input selection. Refer XMC_ERU_OGU_PERIPHERAL_TRIGGER_t for valid values.

uint32_t service_request

Gating(GP) on service request generation for pattern detection result. Refer XMC_ERU_OGU_SERVICE_REQUEST_t for valid values.

The documentation for this union was generated from the following file:
  • xmc_eru.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_ERU_t Struct Reference

XMC_ERU_t Struct Reference
XMC Peripheral Library » ERU

#include <xmc_eru.h>

Detailed Description

ERU module

The documentation for this struct was generated from the following file:
  • xmc_eru.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: FLASH

Macros | Enumerations | Functions
FLASH
XMC Peripheral Library

Macros

#define | XMC_FLASH_BASE (0x10001000U)
#define | XMC_FLASH_BLOCKS_PER_PAGE (16U)
#define | XMC_FLASH_BYTES_PER_BLOCK (16U)
#define | XMC_FLASH_BYTES_PER_PAGE (256U)
#define | XMC_FLASH_BYTES_PER_SECTOR (4096U)
#define | XMC_FLASH_PAGES_PER_SECTOR (16U)
#define | XMC_FLASH_WORDS_PER_BLOCK (4U)
#define | XMC_FLASH_WORDS_PER_PAGE (64U)
#define | XMC_FLASH_WORDS_PER_SECTOR (1024U)

Enumerations

Functions

void | XMC_FLASH_ClearStatus (void)
void | XMC_FLASH_DisableEvent (const uint32_t event_msk)
void | XMC_FLASH_EnableEvent (const uint32_t event_msk)
void | XMC_FLASH_EnterSleepMode (void)
void | XMC_FLASH_ErasePage (uint32_t *address)
void | XMC_FLASH_ErasePages (uint32_t *address, uint32_t num_pages)
void | XMC_FLASH_EraseSector (uint32_t *address)
void | XMC_FLASH_ExitSleepMode (void)
uint32_t | XMC_FLASH_GetSectorAddress (uint32_t sector)
uint32_t | XMC_FLASH_GetStatus (void)
bool | XMC_FLASH_IsBusy (void)
void | XMC_FLASH_ProgramPage (uint32_t *address, const uint32_t *data)
void | XMC_FLASH_ProgramVerifyPage (uint32_t *address, const uint32_t *data)
void | XMC_FLASH_ReadBlocks (uint32_t *address, uint32_t *data, uint32_t num_blocks)
uint32_t | XMC_FLASH_ReadWord (const uint32_t *const address)
void | XMC_FLASH_SetHardReadLevel (XMC_FLASH_HARDREAD_LEVEL_t level)
void | XMC_FLASH_SetSectorProtection (uint32_t num_sectors)
void | XMC_FLASH_VerifyBlocks (uint32_t *address, const uint32_t *data, uint32_t num_blocks)
void | XMC_FLASH_WriteBlocks (uint32_t *address, const uint32_t *data, uint32_t num_blocks, bool verify)

Detailed Description

Flash is a non volatile memory module used to store instruction code or constant data. The flash low level driver provides support to the following functionalities of flash memory.

  1. Provides functions to program and verify pages. ( XMC_FLASH_ProgramPage(), XMC_FLASH_ProgramPages() XMC_FLASH_ProgramVerifyPage() )
  2. Provides functions to write and verify blocks. ( XMC_FLASH_WriteBlocks(), XMC_FLASH_VerifyBlocks() )
  3. Provides functions to read data in terms of word and blocks. ( XMC_FLASH_ReadBlocks(), XMC_FLASH_ReadWord() )
  4. Provides function to erase page. ( XMC_FLASH_ErasePage() )

Macro Definition Documentation

#define XMC_FLASH_BASE (0x10001000U)

Starting address of flash for XMC1 family of microcontrollers

#define XMC_FLASH_BLOCKS_PER_PAGE (16U)

Number of blocks in a page. A block consists of 4 words(16 bytes).

#define XMC_FLASH_BYTES_PER_BLOCK (16U)

Number of bytes in a block. (128 bits = 16 bytes)

#define XMC_FLASH_BYTES_PER_PAGE (256U)

Number of bytes in a page. (16 blocks * 16 bytes = 256 bytes)

#define XMC_FLASH_BYTES_PER_SECTOR (4096U)

Number of bytes in a sector. (16 pages * 256 bytes = 4096 bytes)

#define XMC_FLASH_PAGES_PER_SECTOR (16U)

Number of pages in a sector. A page consists of 16 blocks.

#define XMC_FLASH_WORDS_PER_BLOCK (4U)

Number of words in a block. (128 bit / 32 bit = 4 words)

#define XMC_FLASH_WORDS_PER_PAGE (64U)

Number of words in a page. (16 blocks * 4 words = 64 words)

#define XMC_FLASH_WORDS_PER_SECTOR (1024U)

Number of words in a sector. (16 pages * 64 words = 1024 words)

Enumeration Type Documentation

enum XMC_FLASH_EVENT_t

Defines NVM ready interrupt event. Use type XMC_FLASH_EVENT_t for this enum.

Enumerator
XMC_FLASH_EVENT_READY

Generates the NVM ready interrupts on flash sequence completion

enum XMC_FLASH_HARDREAD_LEVEL_t

Defines hard read levels for strict data verification. Use type XMC_FLASH_HARDREAD_LEVEL_t for this enum. These hardread levels provide some margin to ensure that the data is really programmed with suitably distinct levels for written and erased bits.

Enumerator
XMC_FLASH_HARDREAD_LEVEL_NORMAL | No hardread level verification enabled (Normal read)
XMC_FLASH_HARDREAD_LEVEL_WRITTEN | Enables strict margin compare for written data cells
XMC_FLASH_HARDREAD_LEVEL_ERASED | Enables strict margin compare for erased data cells
enum XMC_FLASH_STATUS_t

Defines the status of flash, to verify the flash related API calls. Use type XMC_FLASH_STATUS_t for this enum. The members defines the respective masked status bits of NVMSTATUS register.

Enumerator
XMC_FLASH_STATUS_OK | Flash related operation was successfully completed
XMC_FLASH_STATUS_BUSY | Cannot execute the flash request because another operation is in progress
XMC_FLASH_STATUS_SLEEP_MODE | Flash is in sleep mode
XMC_FLASH_STATUS_VERIFY_ERROR | Flash reported a verification failure
XMC_FLASH_STATUS_ECC1_READ_ERROR | Flash reports a single bit failure, and it is automatically corrected.
XMC_FLASH_STATUS_ECC2_READ_ERROR | Flash reported at least two bit failure
XMC_FLASH_STATUS_WRITE_PROTOCOL_ERROR | Write/Verify operation on a block is failed due to protocol violations or write protected sectors

Function Documentation

void XMC_FLASH_ClearStatus ( void )
Parameters
None
Returns
None
Description:
Clears the previous error status by reseting the ECC and VERR error status bits of NVMSTATUS register.

Call this API before starting any flash programming / erase related APIs to ensure all previous errors are cleared.
Related APIs:
None
void XMC_FLASH_DisableEvent ( const uint32_t event_msk )
Parameters
event_msk ORed values of XMC_FLASH_EVENT_t enumeration
Returns
None
Description:
Disables the particular flash events as specified in the input parameter.
Related APIs:
XMC_FLASH_EnableEvent()

void XMC_FLASH_EnableEvent ( const uint32_t event_msk )
Parameters
event_msk ORed values of XMC_FLASH_EVENT_t enumeration
Returns
None
Description:
Enables the particular flash events as specified in the input parameter.
Related APIs:
XMC_FLASH_DisableEvent()

void XMC_FLASH_EnterSleepMode ( void )
Parameters
None
Returns
None
Description:
Enables the flash to enter into sleep mode by resetting the NVMCONF register NVM_ON bit.

Flash can wake up from sleep mode on any flash operation completion ready event trigger. To disable the sleep mode any time during execution call the API XMC_FLASH_ExitSleepMode().
Related APIs:
XMC_FLASH_ExitSleepMode()

void XMC_FLASH_ErasePage ( uint32_t * address )
Parameters
address Pointer to the starting address of the page to be erased
Returns
None
Description:
Erases a single flash page associated to the specified address.

XMC1000 Flash can be erased with granularity of one page = 16 blocks of 16 Bytes = 256 Bytes using this API. It internally calls the Flash Firmware routine XMC1000_NvmErasePage(unsigned long pageAddr) to perform the erase operation. Refer XMC1000 reference manual for more details on flash firmware routines (Section 25.3). Call XMC_FLASH_GetStatus() API after calling this API, to verify the erase operation.
Related APIs:
XMC_FLASH_ErasePages()

void XMC_FLASH_ErasePages | ( | uint32_t * | address,
 |  | uint32_t | num_pages
 | ) |  |
Parameters
address Pointer to the starting address of the flash page from where the erase starts
num_pages Number of pages to be erased.
Range: [1 to (flash size / 256)]
Returns
None
Description:
Erases a set of flash memory pages.

Erase starts from the specified address. It erases a maximum number of num_pages flash pages. The maximum erasable pages are limited to microcontroller flash size. It sets NVMPROG register to continuous page erase mode before erase and resets it action back to normal state on completion. Call XMC_FLASH_GetStatus() after calling this API to verify the erase operation.
Note:
Flash will be in busy state during erase operation. Hence no operations on flash are allowed until it completes.
Related APIs:
XMC_FLASH_EraseSector(), XMC_FLASH_ErasePage()

Related APIs:
None
void XMC_FLASH_EraseSector ( uint32_t * address )
Parameters
address Pointer to the starting address of the page to be erased.
Returns
None
Description:
Erases a complete sector starting from the address specified.

XMC1000 Flash can be erased with granularity of one page = 16 blocks of 16 Bytes = 256 Bytes using this API. It internally calls XMC_FLASH_ErasePages API 16 times starting from the first page of the sector.. Call XMC_FLASH_GetStatus() API after calling this API, to verify the erase operation.
Related APIs:
XMC_FLASH_ErasePages()

void XMC_FLASH_ExitSleepMode ( void )
Parameters
None
Returns
None
Description:
Enables the flash to exit from sleep mode by setting the NVMCONF register NVM_ON bit.

Calling the API XMC_FLASH_EnterSleepMode() allows the flash to renter into sleep mode.
Related APIs:
XMC_FLASH_EnterSleepMode()

uint32_t XMC_FLASH_GetSectorAddress ( uint32_t sector )
Parameters
sector Flash sector number for which the address extraction is needed
Range: [0 to 51]
Returns
uint32_t Starting address of the sector specified
Range: [0x10001000 to 0x10032000]
Description:
Finds the starting address of the specified sector number.

Related APIs:
None

< Starting address of flash for XMC1 family of microcontrollers

< Number of bytes in a sector. (16 pages * 256 bytes = 4096 bytes)

uint32_t XMC_FLASH_GetStatus ( void )
Parameters
None
Returns
uint32_t Status of the previous flash operation.
Description:
Informs the status of flash by reading the NVMSTATUS register.

It indicates the ECC, VERR(verification error), WRPERR (Write protocol error) errors as well as the current flash state. After calling the flash read/write/erase operation related APIs, call this API to get the verification status. The return value of this API shall be checked against the members of XMC_FLASH_STATUS_t enumeration to get the relevant status.
Related APIs:
None
bool XMC_FLASH_IsBusy ( void )
Parameters
None
Returns
true if flash is in busy state else returns false.
Description:
Checks whether flash is in busy state or not.

It is checked by calling the XMC_FLASH_GetStatus() API internally. Refer XMC_FLASH_GetStatus() for more details.
Related APIs:
XMC_FLASH_GetStatus()

void XMC_FLASH_ProgramPage | ( | uint32_t * | address,
 |  | const uint32_t * | data
 | ) |  |
Parameters
address | Pointer to the starting address of flash page from where the programming starts.
data | Pointer to the source address where targeted data is located.
Returns
None
Description:
Programs a single flash page associated with the specified address.

XMC1000 Flash can be programmed with one page (256 bytes) using this API. It calls the Flash Firmware routine XMC1000_NvmProgVerify(unsigned long pageAddr) to perform the programming. Refer XMC1000 reference manual of for more details on flash firmware routines (Section 25.3). Call XMC_FLASH_GetStatus() API after calling this API, to verify the programming operation.
Note:
Flash will be busy state during write is ongoing, hence no operations allowed until it completes.
Related APIs:
None
void XMC_FLASH_ProgramVerifyPage | ( | uint32_t * | address,
 |  | const uint32_t * | data
 | ) |  |
Parameters
address | Pointer to the starting address of flash page from where the programming starts.
data | Pointer to the source address where targeted data blocks are located.
Returns
None
Description:
Erases, programs and verifies a single flash page starting from the address specified.

XMC1000 Flash can be programmed with granularity of one page = 16 blocks of 16 Bytes = 256 Bytes using this API. It internally calls the Flash Firmware routine XMC1000_NvmProgVerify(unsigned long pageAddr) to perform the programming. Refer XMC1000 reference manual of for more details on flash firmware routines (Section 25.3). Call XMC_FLASH_GetStatus() API after calling this API, to verify the erase operation.
Related APIs:
None
void XMC_FLASH_ReadBlocks | ( | uint32_t * | address,
 |  | uint32_t * | data,
 |  | uint32_t | num_blocks
 | ) |  |
Parameters
address | Pointer to the starting address of flash block from where the read starts.
data | Pointer to the destination address, where the read data blocks to be stored.
num_blocks Number of blocks to be read.
Range: [1 to (flash size / 16)]
Returns
None
Description:
Reads multiple blocks from flash in one shot, starting from the address specified.

The read blocks are stored into the locations starting from the data address. Calling XMC_FLASH_GetStatus() API after calling this API verifies the read operation.
Related APIs:
None
uint32_t XMC_FLASH_ReadWord ( const uint32_t *const address )
Parameters
address Pointer to the flash word address from where the read is expected
Returns

a 32bit data word stored in the specified address.
Description:
Reads a single word from the specified flashaddress.

Calling XMC_FLASH_GetStatus() API after calling this API returns the read status.
Related APIs:
XMC_FLASH_ReadBlocks()
void XMC_FLASH_SetHardReadLevel ( XMC_FLASH_HARDREAD_LEVEL_t level )
Parameters
level Hard read levels specified in XMC_FLASH_HARDREAD_LEVEL_t.
Returns
None
Description:
Sets the hard read level for verification process.

It insists the flash to do a strict margin compare with the written/erased data against the internal buffer. Sets the NVMCONF register HRLEV field with level value. This hardread level is used until the end of the verification sequence and, may not be changed in between.

Related APIs:
None
void XMC_FLASH_SetSectorProtection ( uint32_t num_sectors )
Parameters
num_sectors Number of sectors to be protected
Range: [0 to 51]
Returns
None
Description:
Protect the flash sectors starting from 0th sector to the specified num_sectors.

It sets the NVMCONF register SECPROT field with the value specified in num_sectors. Changing the protection limit can be achieved by calling this API at runtime with a different value of num_sectors.

Related APIs:
None
void XMC_FLASH_VerifyBlocks | ( | uint32_t * | address,
 |  | const uint32_t * | data,
 |  | uint32_t | num_blocks
 | ) |  |
Parameters
address | Pointer to the starting address of flash block from where the verification starts.
data | Pointer to the source address where targeted data blocks are located.
num_blocks Maximum number of flash blocks writes needed.
Range: [1 to (flash size / 16)]
Returns
None
Description:
Performs verification of written data blocks.

After calling XMC_FLASH_WriteBlocks() API, calling this API will verify the correctness of written blocks. It sets the NVMPROG register into continuous block write mode before write and resets it action back to normal state on completion. It reads back the written data blocks from the flash and verify the values against the internal buffer values. Calling XMC_FLASH_GetStatus() API after calling this API validates the result of verification.
Related APIs:
None
void XMC_FLASH_WriteBlocks | ( | uint32_t * | address,
 |  | const uint32_t * | data,
 |  | uint32_t | num_blocks,
 |  | bool | verify
 | ) |  |
Parameters
address | Pointer to the starting address of flash block from where the write starts.
data | Pointer to the source address where targeted data blocks are located.
num_blocks Maximum number of flash block writes needed.
Range: [1 to (flash size / 16)]
verify | If true, hardware verification after block write is enabled else disabled.
Returns
None
Description:
Writes a set of data blocks into the flash.

Minimum possible writable area is 16 byte block. It sets the NVMPROG register to continuous block write mode before write and resets it action back to normal state on completion. Call XMC_FLASH_GetStatus() API after calling this API to verify the erase operation.
Note
Flash will be busy state during write is ongoing, hence no operations allowed until it completes.
Related APIs:
None
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: GPIO

Data Structures | Enumerations | Functions
GPIO
XMC Peripheral Library

Data Structures

struct | XMC_GPIO_CONFIG_t
struct | XMC_GPIO_PORT_t

Enumerations

Functions

void | XMC_GPIO_DisableDigitalInput (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_DisablePowerSaveMode (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_EnableDigitalInput (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_EnablePowerSaveMode (XMC_GPIO_PORT_t *const port, const uint8_t pin)
uint32_t | XMC_GPIO_GetInput (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_Init (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_CONFIG_t *const config)
void | XMC_GPIO_SetHardwareControl (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_HWCTRL_t hwctrl)
void | XMC_GPIO_SetInputHysteresis (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_INPUT_HYSTERESIS_t hysteresis)
void | XMC_GPIO_SetMode (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_MODE_t mode)
void | XMC_GPIO_SetOutputHigh (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_SetOutputLevel (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_OUTPUT_LEVEL_t level)
void | XMC_GPIO_SetOutputLow (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_ToggleOutput (XMC_GPIO_PORT_t *const port, const uint8_t pin)

Detailed Description

GPIO driver provide a generic and very flexible software interface for all standard digital I/O port pins. Each port slice has individual interfaces for the operation as General Purpose I/O and it further provides the connectivity to the on-chip periphery and the control for the pad characteristics.

The driver is divided into Input and Output mode.

Input mode features:

  1. Configuration structure XMC_GPIO_CONFIG_t and initialization function XMC_GPIO_Init()
  2. Allows the selection of weak pull-up or pull-down device. Configuration structure XMC_GPIO_MODE_t and function XMC_GPIO_SetMode()
  3. Allows the selection of input hysteresis. XMC_GPIO_SetInputHysteresis()

Output mode features:

  1. Allows the selection of push pull/open drain and Alternate output. Configuration structure XMC_GPIO_MODE_t and function XMC_GPIO_SetMode()
  2. Allows the selection of initial output level. Configuration structure XMC_GPIO_OUTPUT_LEVEL_t and function XMC_GPIO_SetOutputLevel()

Enumeration Type Documentation

enum XMC_GPIO_HWCTRL_t

Defines direct hardware control characteristics of the pin . Use type XMC_GPIO_HWCTRL_t for this enum.

Enumerator
XMC_GPIO_HWCTRL_DISABLED | Software control only
XMC_GPIO_HWCTRL_PERIPHERAL1 | HWI0/HWO0 control path can override the software configuration
XMC_GPIO_HWCTRL_PERIPHERAL2 | HWI1/HWO1 control path can override the software configuration
enum XMC_GPIO_INPUT_HYSTERESIS_t

Configures input hysteresis mode of pin. Use type XMC_GPIO_INPUT_HYSTERESIS_t for this enum. Selecting the appropriate pad hysteresis allows optimized pad oscillation behavior for touch-sensing applications.

Enumerator
XMC_GPIO_INPUT_HYSTERESIS_STANDARD | Standard hysteresis
XMC_GPIO_INPUT_HYSTERESIS_LARGE | Large hysteresis
enum XMC_GPIO_MODE_t

Defines the direction and characteristics of a pin. Use type XMC_GPIO_MODE_t for this enum. For the operation with alternate functions, the port pins are directly connected to input or output functions of the on-chip periphery.

Enumerator
XMC_GPIO_MODE_INPUT_TRISTATE | No internal pull device active
XMC_GPIO_MODE_INPUT_PULL_DOWN | Internal pull-down device active
XMC_GPIO_MODE_INPUT_PULL_UP | Internal pull-up device active
XMC_GPIO_MODE_INPUT_SAMPLING | No internal pull device active; Pn_OUTx continuously samples the input value
XMC_GPIO_MODE_INPUT_INVERTED_TRISTATE | Inverted no internal pull device active
XMC_GPIO_MODE_INPUT_INVERTED_PULL_DOWN | Inverted internal pull-down device active
XMC_GPIO_MODE_INPUT_INVERTED_PULL_UP | Inverted internal pull-up device active
XMC_GPIO_MODE_INPUT_INVERTED_SAMPLING | Inverted no internal pull device active;Pn_OUTx continuously samples the input value
XMC_GPIO_MODE_OUTPUT_PUSH_PULL | Push-pull general-purpose output
XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN | Open-drain general-purpose output
XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1 | Push-pull alternate output function 1
XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2 | Push-pull alternate output function 2
XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT3 | Push-pull alternate output function 3
XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4 | Push-pull alternate output function 4
XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT5 | Push-pull alternate output function 5
XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT6 | Push-pull alternate output function 6
XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT7 | Push-pull alternate output function 7
XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT1 | Open drain alternate output function 1
XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT2 | Open drain alternate output function 2
XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT3 | Open drain alternate output function 3
XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT4 | Open drain alternate output function 4
XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT5 | Open drain alternate output function 5
XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT6 | Open drain alternate output function 6
XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT7 | Open drain alternate output function 7
enum XMC_GPIO_OUTPUT_LEVEL_t

Defines output level of a pin. Use type XMC_GPIO_OUTPUT_LEVEL_t for this enum.

Enumerator
XMC_GPIO_OUTPUT_LEVEL_LOW | Reset bit
XMC_GPIO_OUTPUT_LEVEL_HIGH | Set bit

Function Documentation

void XMC_GPIO_DisableDigitalInput | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_PDISC.
pin | port pin number.
Returns
None
Related APIs:
None
Description:
Disable digital input path for analog pins and configures Pn_PDISC register.This configuration is applicable only for analog port pins.
void XMC_GPIO_DisablePowerSaveMode | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_PPS.
pin | port pin number.
Returns
None
Description:
Disables pin power save mode and configures Pn_PPS register.This configuration is useful when the controller enters Deep Sleep mode. This configuration enables input Schmitt-Trigger and output driver stage(if pin is enabled power save mode previously). By default port pin does not react to power save mode request.
Related APIs:
XMC_GPIO_EnablePowerSaveMode()
Note:
Do not enable the Pin Power Save function for pins configured for Hardware Control (Pn_HWSEL.HWx != 00B). Doing so may result in an undefined behavior of the pin when the device enters the Deep Sleep state.
void XMC_GPIO_EnableDigitalInput | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_PDISC.
pin | port pin number.
Returns
None
Related APIs:
None
Description:
Enable digital input path for analog pins and configures Pn_PDISC register.This configuration is applicable only for analog port pins.
void XMC_GPIO_EnablePowerSaveMode | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_PPS.
pin | port pin number.
Returns
None
Description:
Enables pin power save mode and configures Pn_PPS register.This configuration is useful when the controller enters Deep Sleep mode.Port pin enabled with power save mode option are set to a defined state and the input Schmitt-Trigger as well as the output driver stage are switched off. By default port pin does not react to power save mode request.
Related APIs:
XMC_GPIO_DisablePowerSaveMode()

Note:
Do not enable the Pin Power Save function for pins configured for Hardware Control (Pn_HWSEL.HWx != 00B). Doing so may result in an undefined behavior of the pin when the device enters the Deep Sleep state.

uint32_t XMC_GPIO_GetInput | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_IN.
pin | Port pin number.
Returns
uint32_t pin logic level status.
Description:
Reads the Pn_IN register and returns the current logical value at the GPIO pin.
Related APIs:
None
Note:
Prior to this api, user has to configure port pin to input mode using XMC_GPIO_SetMode().
void XMC_GPIO_Init | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin,
 |  | const XMC_GPIO_CONFIG_t *const | config
 | ) |  |
Parameters
port | Constant pointer pointing to GPIO port, to access port registers like Pn_OUT,Pn_OMR,Pn_IOCR etc.
pin | Port pin number.
config | GPIO configuration data structure. Refer data structure XMC_GPIO_CONFIG_t for details.
Returns
None
Description:
Initializes input / output mode settings like, pull up / pull down devices,hysteresis, push pull /open drain. Also configures alternate function outputs and clears hardware port control for a selected port and pin. config provides selected I/O settings. It configures hardware registers Pn_IOCR,Pn_OUT, Pn_OMR,Pn_PDISC and Pn_PHCR.
Related APIs:
None
Note:
This API is called in definition of DAVE_init by code generation and therefore should not be explicitly called for the normal operation. Use other APIs only after DAVE_init is called successfully (returns DAVE_STATUS_SUCCESS).
void XMC_GPIO_SetHardwareControl | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin,
 |  | const XMC_GPIO_HWCTRL_t | hwctrl
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_HWSEL.
pin | port pin number.
hwctrl | direct hardware control selection. Refer XMC_GPIO_HWCTRL_t for valid values.
Returns
None
Description:
Selects direct hard ware control and configures Pn_HWSEL register.This configuration is useful for the port pins overlaid with peripheral functions for which the connected peripheral needs hardware control.
Related APIs:
None
Note:
Do not enable the Pin Power Save function for pins configured for Hardware Control (Pn_HWSEL.HWx != 00B). Doing so may result in an undefined behavior of the pin when the device enters the Deep Sleep state.
void XMC_GPIO_SetInputHysteresis | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin,
 |  | const XMC_GPIO_INPUT_HYSTERESIS_t | hysteresis
 | ) |  |

Sets pad hysteresis.

Parameters
port | Constant pointer pointing to GPIO port, to access hardware register Pn_PHCR.
pin | Port pin number.
hysteresis | input hysteresis selection. Refer data structure XMC_GPIO_INPUT_HYSTERESIS_t for details.
Returns
None
Description:
Sets port pin input hysteresis. It configures hardware registers Pn_PHCR.hysteresis is initially configured during initialization in XMC_GPIO_Init(). Call this API to alter pad hysteresis as needed later in the program.
Related APIs:
None
Note:
Prior to this api, user has to configure port pin to input mode using XMC_GPIO_SetMode().
void XMC_GPIO_SetMode | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin,
 |  | const XMC_GPIO_MODE_t | mode
 | ) |  |
Parameters
port | Constant pointer pointing to GPIO port, to access hardware register Pn_IOCR.
pin | Port pin number.
mode | input / output functionality selection. Refer XMC_GPIO_MODE_t for valid values.
Returns
None
Description:
Sets digital input and output driver functionality and characteristics of a GPIO port pin. It configures hardware registers Pn_IOCR. mode is initially configured during initialization in XMC_GPIO_Init(). Call this API to alter the port direction functionality as needed later in the program.
Related APIs:
None
void XMC_GPIO_SetOutputHigh | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_OMR.
pin | Port pin number.
Returns
None
Description:
Sets port pin output to high. It configures hardware registers Pn_OMR.
Related APIs:
XMC_GPIO_SetOutputLow()
Note:
Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode().
Register Pn_OMR is virtual and does not contain any flip-flop. A read action delivers the value of 0.
void XMC_GPIO_SetOutputLevel | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin,
 |  | const XMC_GPIO_OUTPUT_LEVEL_t | level
 | ) |  |
Parameters
port | Constant pointer pointing to GPIO port, to access hardware register Pn_OMR.
pin | Port pin number.
level | output level selection. Refer XMC_GPIO_OUTPUT_LEVEL_t for valid values.
Returns
None
Description:
Set port pin output level to high or low.It configures hardware registers Pn_OMR.level is initially configured during initialization in XMC_GPIO_Init(). Call this API to alter output level as needed later in the program.
Related APIs:
XMC_GPIO_SetOutputHigh(), XMC_GPIO_SetOutputLow().
Note:
Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode().
void XMC_GPIO_SetOutputLow | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_OMR.
pin | port pin number.
Returns
None
Description:
Sets port pin output to low. It configures hardware registers Pn_OMR.
Related APIs:>
XMC_GPIO_SetOutputHigh()
Note:
Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode(). Register Pn_OMR is virtual and does not contain any flip-flop. A read action delivers the value of 0.
void XMC_GPIO_ToggleOutput | ( | XMC_GPIO_PORT_t *const | port,
 |  | const uint8_t | pin
 | ) |  |
Parameters
port | constant pointer pointing to GPIO port, to access hardware register Pn_OMR.
pin | port pin number.
Returns
None
Description:
Configures port pin output to Toggle. It configures hardware registers Pn_OMR.
Related APIs:
XMC_GPIO_SetOutputHigh(), XMC_GPIO_SetOutputLow().
Note:
Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode(). Register Pn_OMR is virtual and does not contain any flip-flop. A read action delivers the value of 0.
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_GPIO_CONFIG_t Struct Reference

Data Fields
XMC_GPIO_CONFIG_t Struct Reference
XMC Peripheral Library » GPIO

#include <xmc1_gpio.h>

Data Fields

XMC_GPIO_INPUT_HYSTERESIS_t input_hysteresis
XMC_GPIO_MODE_t mode
XMC_GPIO_OUTPUT_LEVEL_t output_level

Detailed Description

Structure initializes port pin. Use type XMC_GPIO_CONFIG_t for this structure.

Field Documentation

XMC_GPIO_INPUT_HYSTERESIS_t input_hysteresis

Defines input pad hysteresis of a pin

XMC_GPIO_MODE_t mode

Defines the direction and characteristics of a pin

XMC_GPIO_OUTPUT_LEVEL_t output_level

Defines output level of a pin

The documentation for this struct was generated from the following file:
  • xmc1_gpio.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_GPIO_PORT_t Struct Reference

Data Fields
XMC_GPIO_PORT_t Struct Reference
XMC Peripheral Library » GPIO

#include <xmc1_gpio.h>

Data Fields

__IO uint32_t | HWSEL
__I uint32_t | IN
__IO uint32_t | IOCR [4]
__O uint32_t | OMR
__IO uint32_t | OUT
__IO uint32_t | PDISC
__IO uint32_t | PHCR [2]
__IO uint32_t | PPS

Detailed Description

Structure points port hardware registers. Use type XMC_GPIO_PORT_t for this structure.

Field Documentation

__IO uint32_t HWSEL

Pin Hardware Select Register

__I uint32_t IN

The logic level of a GPIO pin can be read via the read-only port input register Pn_IN

__IO uint32_t IOCR[4]

The port input/output control registers select the digital output and input driver functionality and characteristics of a GPIO port pin

__O uint32_t OMR

The port output modification register contains control bits that make it possible to individually set, reset, or toggle the logic state of a single port line

__IO uint32_t OUT

The port output register determines the value of a GPIO pin when it is selected by Pn_IOCRx as output

__IO uint32_t PDISC

Pin Function Decision Control Register is to disable/enable the digital pad structure in shared analog and digital ports

__IO uint32_t PHCR[2]

Pad hysteresis control register

__IO uint32_t PPS

Pin Power Save Register

The documentation for this struct was generated from the following file:
  • xmc1_gpio.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: I2C

Data Structures | Macros | Enumerations | Functions
I2C
XMC Peripheral Library

Data Structures

struct XMC_I2C_CH_CONFIG_t

Macros

#define | XMC_I2C0_CH0 XMC_USIC0_CH0
#define | XMC_I2C0_CH1 XMC_USIC0_CH1
#define | XMC_I2C1_CH0 XMC_USIC1_CH0
#define | XMC_I2C1_CH1 XMC_USIC1_CH1
#define | XMC_I2C2_CH0 XMC_USIC2_CH0
#define | XMC_I2C2_CH1 XMC_USIC2_CH1
#define | XMC_I2C_10BIT_ADDR_GROUP (0x7800U)

Enumerations

Functions

void | XMC_I2C_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, uint32_t flag)
void | XMC_I2C_CH_ConfigExternalInputSignalToBRG (XMC_USIC_CH_t *const channel, const uint16_t pdiv, const uint32_t oversampling, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_I2C_CH_DisableAcknowledgeAddress0 (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_DisableEvent (XMC_USIC_CH_t *const channel, uint32_t event)
void | XMC_I2C_CH_EnableAcknowledgeAddress0 (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_EnableEvent (XMC_USIC_CH_t *const channel, uint32_t event)
uint8_t | XMC_I2C_CH_GetReceivedData (const XMC_USIC_CH_t *const channel)
uint8_t | XMC_I2C_CH_GetReceiverStatusFlag (XMC_USIC_CH_t *const channel)
uint16_t | XMC_I2C_CH_GetSlaveAddress (const XMC_USIC_CH_t *const channel)
uint32_t | XMC_I2C_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_Init (XMC_USIC_CH_t *const channel, const XMC_I2C_CH_CONFIG_t *const config)
void | XMC_I2C_CH_MasterReceiveAck (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_MasterReceiveNack (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_MasterRepeatedStart (XMC_USIC_CH_t *const channel, const uint16_t addr, const XMC_I2C_CH_CMD_t command)
void | XMC_I2C_CH_MasterStart (XMC_USIC_CH_t *const channel, const uint16_t addr, const XMC_I2C_CH_CMD_t command)
void | XMC_I2C_CH_MasterStop (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_MasterTransmit (XMC_USIC_CH_t *const channel, const uint8_t data)
void | XMC_I2C_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_I2C_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_I2C_CH_STATUS_t | XMC_I2C_CH_SetBaudrate (XMC_USIC_CH_t *const channel, const uint32_t rate)
void | XMC_I2C_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_I2C_CH_INPUT_t input, const uint8_t source)
void | XMC_I2C_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_I2C_CH_SetSlaveAddress (XMC_USIC_CH_t *const channel, const uint16_t address)
void | XMC_I2C_CH_SlaveTransmit (XMC_USIC_CH_t *const channel, const uint8_t data)
void | XMC_I2C_CH_Start (XMC_USIC_CH_t *const channel)
XMC_I2C_CH_STATUS_t | XMC_I2C_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)

Detailed Description

USIC IIC Features:

  • Two-wire interface, with one line for shift clock transfer and synchronization (shift clock SCL), the other one for the data transfer (shift data SDA)
  • Communication in standard mode (100 kBit/s) or in fast mode (up to 400 kBit/s)
  • Support of 7-bit addressing, as well as 10-bit addressing
  • Master mode operation, where the IIC controls the bus transactions and provides the clock signal.
  • Slave mode operation, where an external master controls the bus transactions and provides the clock signal.
  • Multi-master mode operation, where several masters can be connected to the bus and bus arbitration can take place, i.e. the IIC module can be master or slave.
    The master/slave operation of an IIC bus participant can change from frame to frame.
  • Efficient frame handling (low software effort), also allowing DMA transfers
  • Powerful interrupt handling due to multitude of indication flags

Macro Definition Documentation

#define XMC_I2C0_CH0 XMC_USIC0_CH0

USIC0 channel 0 base address

#define XMC_I2C0_CH1 XMC_USIC0_CH1

USIC0 channel 1 base address

#define XMC_I2C1_CH0 XMC_USIC1_CH0

USIC1 channel 0 base address

#define XMC_I2C1_CH1 XMC_USIC1_CH1

USIC1 channel 1 base address

#define XMC_I2C2_CH0 XMC_USIC2_CH0

USIC2 channel 0 base address

#define XMC_I2C2_CH1 XMC_USIC2_CH1

USIC2 channel 1 base address

#define XMC_I2C_10BIT_ADDR_GROUP (0x7800U)

Value to verify the address is 10-bit or not

Enumeration Type Documentation

enum XMC_I2C_CH_CMD_t

I2C commands.

Enumerator
XMC_I2C_CH_CMD_WRITE | I2C Command Write
XMC_I2C_CH_CMD_READ | I2C Command Read
enum XMC_I2C_CH_EVENT_t

I2C events.

Enumerator
XMC_I2C_CH_EVENT_RECEIVE_START | Receive start event
XMC_I2C_CH_EVENT_DATA_LOST | Data lost event
XMC_I2C_CH_EVENT_TRANSMIT_SHIFT | Transmit shift event
XMC_I2C_CH_EVENT_TRANSMIT_BUFFER | Transmit buffer event
XMC_I2C_CH_EVENT_STANDARD_RECEIVE | Receive event
XMC_I2C_CH_EVENT_ALTERNATIVE_RECEIVE | Alternate receive event
XMC_I2C_CH_EVENT_BAUD_RATE_GENERATOR | Baudrate generator event
XMC_I2C_CH_EVENT_START_CONDITION_RECEIVED | Start condition received event
XMC_I2C_CH_EVENT_REPEATED_START_CONDITION_RECEIVED | Repeated start condition received event
XMC_I2C_CH_EVENT_STOP_CONDITION_RECEIVED | Stop condition received event
XMC_I2C_CH_EVENT_NACK | NACK received event
XMC_I2C_CH_EVENT_ARBITRATION_LOST | Arbitration lost event
XMC_I2C_CH_EVENT_SLAVE_READ_REQUEST | Slave read request event
XMC_I2C_CH_EVENT_ERROR | Error condition event
XMC_I2C_CH_EVENT_ACK | ACK received event
enum XMC_I2C_CH_INPUT_t

I2C input stage selection.

Enumerator
XMC_I2C_CH_INPUT_SDA | selection of sda input stage
XMC_I2C_CH_INPUT_SCL | selection of scl input stage
enum XMC_I2C_CH_INTERRUPT_NODE_POINTER_t

I2C channel interrupt node pointers

Enumerator
XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT | Node pointer for transmit shift interrupt
XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER | Node pointer for transmit buffer interrupt
XMC_I2C_CH_INTERRUPT_NODE_POINTER_RECEIVE | Node pointer for receive interrupt
XMC_I2C_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE | Node pointer for alternate receive interrupt
XMC_I2C_CH_INTERRUPT_NODE_POINTER_PROTOCOL | Node pointer for protocol related interrupts
enum XMC_I2C_CH_RECEIVER_STATUS_FLAG_t

I2C receiver status. The received data byte is available at the bit positions RBUF[7:0], whereas the additional information is monitored at the bit positions RBUF[12:8].

Enumerator
XMC_I2C_CH_RECEIVER_STATUS_FLAG_ACK | Bit 8: Value of Received Acknowledgement bit
XMC_I2C_CH_RECEIVER_STATUS_FLAG_FIN | Bit 9: A 1 at this bit position indicates that after a (repeated) start condition followed by the address reception the first data byte of a new frame has been received. A 0 at this bit position indicates further data bytes
XMC_I2C_CH_RECEIVER_STATUS_FLAG_MODE | Bit 10: A 0 at this bit position indicates that the data byte has been received when the device has been in slave mode, whereas a 1 indicates a reception in master mode
XMC_I2C_CH_RECEIVER_STATUS_FLAG_ERR | Bit 11: A 1 at this bit position indicates an incomplete/erroneous data byte in the receive buffer
XMC_I2C_CH_RECEIVER_STATUS_FLAG_ADR | Bit 12: A 0 at this bit position indicates that the programmed address has been received. A 1 indicates a general call address.
enum XMC_I2C_CH_STATUS_FLAG_t

I2C status.

Enumerator
XMC_I2C_CH_STATUS_FLAG_SLAVE_SELECT | Slave select status
XMC_I2C_CH_STATUS_FLAG_WRONG_TDF_CODE_FOUND | Wrong TDF status
XMC_I2C_CH_STATUS_FLAG_START_CONDITION_RECEIVED | Start condition received status
XMC_I2C_CH_STATUS_FLAG_REPEATED_START_CONDITION_RECEIVED | Repeated start condition received status
XMC_I2C_CH_STATUS_FLAG_STOP_CONDITION_RECEIVED | Stop condition received status
XMC_I2C_CH_STATUS_FLAG_NACK_RECEIVED | NACK received status
XMC_I2C_CH_STATUS_FLAG_ARBITRATION_LOST | Arbitration lost status
XMC_I2C_CH_STATUS_FLAG_SLAVE_READ_REQUESTED | Slave read requested status
XMC_I2C_CH_STATUS_FLAG_ERROR | Error status
XMC_I2C_CH_STATUS_FLAG_ACK_RECEIVED | ACK received status
XMC_I2C_CH_STATUS_FLAG_RECEIVER_START_INDICATION | Receive start indication status
XMC_I2C_CH_STATUS_FLAG_DATA_LOST_INDICATION | Data lost indication status
XMC_I2C_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION | Transmit shift indication status
XMC_I2C_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION | Transmit buffer indication status
XMC_I2C_CH_STATUS_FLAG_RECEIVE_INDICATION | Receive indication status
XMC_I2C_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION | Alternate receive indication status
XMC_I2C_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION | Baud rate generator indication status
enum XMC_I2C_CH_STATUS_t

I2C Status.

Enumerator
XMC_I2C_CH_STATUS_OK | Status OK
XMC_I2C_CH_STATUS_ERROR | Status ERROR
XMC_I2C_CH_STATUS_BUSY | Status BUSY

Function Documentation

void XMC_I2C_CH_ClearStatusFlag | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | flag
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
flag | Status flag
Returns
None
Description:
Clears the status flag of I2C channel by setting the input parameter flag in PSCR register.
Related APIs:
XMC_I2C_CH_GetStatusFlag()

void XMC_I2C_CH_ConfigExternalInputSignalToBRG | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | pdiv,
 |  | const uint32_t | oversampling,
 |  | const XMC_USIC_CH_INPUT_COMBINATION_MODE_t | combination_mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2C0_CH0, XMC_I2C0_CH1,XMC_I2C1_CH0,XMC_I2C1_CH1,XMC_I2C2_CH0,XMC_I2C2_CH1
Note
Availability of I2C1 and I2C2 depends on device selection
Parameters
pdiv Desired divider for the external frequency input. Range: minimum value = 1, maximum value = 1024
oversampling Required oversampling. The value indicates the number of time quanta for one symbol of data.
This can be related to the number of samples for each logic state of the data signal.
Range: 1 to 32. Value should be chosen based on the protocol used.
combination_mode USIC channel input combination mode
Returns
None
Description
Enables the external frequency input for the Baudrate Generator and configures the divider, oversampling and the combination mode of the USIC channel.

Related APIs:
XMC_USIC_CH_SetBRGInputClockSource(), XMC_USIC_CH_SetInputTriggerCombinationMode()

void XMC_I2C_CH_DisableAcknowledgeAddress0 ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
None
Description:
This bit defines that slave device should not be sensitive to the slave address 00H.
Related APIs:
XMC_I2C_CH_EnableAcknowledgeAddress0()

void XMC_I2C_CH_DisableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_I2C0_CH0, XMC_I2C0_CH1,XMC_I2C1_CH0,XMC_I2C1_CH1,XMC_I2C2_CH0,XMC_I2C2_CH1
Note
Availability of I2C1 and I2C2 depends on device selection
Returns
None
Description
Disable data transmission.

Use this function in combination with XMC_I2C_CH_EnableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Related APIs:
XMC_I2C_CH_EnableDataTransmission()

void XMC_I2C_CH_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | event
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
event | ORed values of XMC_I2C_CH_EVENT_t enum
Returns
None
Description:
Disables the input parameter XMC_I2C_CH_EVENT_t event using PCR_IICMode register.
Related APIs:
XMC_I2C_CH_EnableEvent()

void XMC_I2C_CH_EnableAcknowledgeAddress0 ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
None
Description:
Retrieves the status byte of I2C channel using PSR_IICMode register.
Related APIs:
XMC_I2C_CH_DisableAcknowledgeAddress0()

void XMC_I2C_CH_EnableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_I2C0_CH0, XMC_I2C0_CH1,XMC_I2C1_CH0,XMC_I2C1_CH1,XMC_I2C2_CH0,XMC_I2C2_CH1
Note
Availability of I2C1 and I2C2 depends on device selection
Returns
None
Description
Enable data transmission.

Use this function in combination with XMC_I2C_CH_DisableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Note
If you need more control over the start of transmission use XMC_USIC_CH_SetStartTransmisionMode()
Related APIs:
XMC_I2C_CH_DisableDataTransmission()

void XMC_I2C_CH_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | event
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
event | ORed values of XMC_I2C_CH_EVENT_t enum
Returns
None
Description:
Enables the input parameter XMC_I2C_CH_EVENT_t event using PCR_IICMode register.
Related APIs:
XMC_I2C_CH_DisableEvent()

uint8_t XMC_I2C_CH_GetReceivedData ( const XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
uint8_t OUTR/RBUF register data
Description:
Reads the data from I2C channel.
Data is read by using OUTR/RBUF register based on FIFO/non-FIFO modes.
Related APIs:
XMC_I2C_CH_MasterTransmit()

uint8_t XMC_I2C_CH_GetReceiverStatusFlag ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
uint8_t Receiver status flag
Description:
Gets the receiver status of I2C channel using RBUF register of bits 8-12 which gives information about receiver status.
Related APIs:
XMC_I2C_CH_MasterTransmit()

uint16_t XMC_I2C_CH_GetSlaveAddress ( const XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handler of type XMC_USIC_CH_t
Returns
uint16_t Slave address
Description:
Gets the I2C channel slave address.
Returns the address using PCR_IICMode register by checking if it is in 10-bit address group or 7-bit address group.
(If first five bits of address are assigned with 0xF0, then address mode is considered as 10-bit mode otherwise it is 7-bit mode)
Note
A 7-bit address will include an additional bit at the LSB. For example, address 0x05 will be returned as 0x0a. 10-bit address will not include the 10-bit address identifier 0b11110xx at the most signifcant bits.
Related APIs:
XMC_I2C_CH_SetSlaveAddress()

uint32_t XMC_I2C_CH_GetStatusFlag ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
uint32_t Status byte
Description:
Retrieves the status byte of I2C channel using PSR_IICMode register.
Related APIs:
XMC_I2C_CH_ClearStatusFlag()

void XMC_I2C_CH_Init | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2C_CH_CONFIG_t *const | config
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
config | Constant pointer to I2C channel config structure of type XMC_I2C_CH_CONFIG_t
Returns
None
Description:
Initializes the I2C channel.
Configures the data format in SCTR register. Sets the slave address, baud rate. Enables transmit data valid, clears status flags and disables parity generation.
Related APIs:
XMC_USIC_CH_Enable()

void XMC_I2C_CH_MasterReceiveAck ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
None
Description:
Sends the Ack request from I2C master channel.
Reads the transmit buffer status is busy or not and thereby updates IN/TBUF register based on FIFO/non-FIFO modes using Master Receive Ack command.
Related APIs:
XMC_I2C_CH_MasterTransmit()

void XMC_I2C_CH_MasterReceiveNack ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
None
Description:
Sends the Nack request from I2C master channel.
Reads the transmit buffer status is busy or not and thereby updates IN/TBUF register based on FIFO/non-FIFO modes using Master Receive Nack command.
Related APIs:
XMC_I2C_CH_MasterTransmit()

void XMC_I2C_CH_MasterRepeatedStart | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | addr,
 |  | const XMC_I2C_CH_CMD_t | command
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
addr | I2C master address
command | read/write command
Returns
None
Description:
Sends the repeated start condition from I2C master channel.
Sends the repeated start condition with read/write command by updating IN/TBUF register based on FIFO/non-FIFO modes.
Note
Address(addr) should reserve an additional bit at the LSB for read/write indication. For example, address 0x05 should be provided as 0x0a. If the address is 10-bit, only most significant bits with the 10-bit identifier should be sent using this function. For example, if the 10-bit address is 0x305, the address should be provided as 0xf6(prepend with 0b11110, upper two bits of address 0b11, followed by 1-bit field for read/write).
Related APIs:
XMC_I2C_CH_MasterTransmit(), XMC_USIC_CH_GetTransmitBufferStatus()

void XMC_I2C_CH_MasterStart | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | addr,
 |  | const XMC_I2C_CH_CMD_t | command
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
addr | I2C master address
command | read/write command
Returns
None
Description:
Starts the I2C master channel.
Sends the Start condition with read/write command by updating IN/TBUF register based on FIFO/non-FIFO modes.
Note
Address(addr) should reserve an additional bit at the LSB for read/write indication. For example, address 0x05 should be provided as 0x0a. If the address is 10-bit, only most significant bits with the 10-bit identifier should be sent using this function. For example, if the 10-bit address is 0x305, the address should be provided as 0xf6(prepend with 0b11110, upper two bits of address 0b11, followed by 1-bit field for read/write).
Related APIs:
XMC_I2C_CH_MasterTransmit(), XMC_USIC_CH_GetTransmitBufferStatus()

void XMC_I2C_CH_MasterStop ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
None
Description:
Stops the I2C master channel.
Reads the transmit buffer status is busy or not and thereby updates IN/TBUF register based on FIFO/non-FIFO modes using Stop command.
Related APIs:
XMC_I2C_CH_MasterTransmit(), XMC_USIC_CH_GetTransmitBufferStatus()

void XMC_I2C_CH_MasterTransmit | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | data
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
data | data to transmit from I2C channel
Returns
None
Description:
Transmit the data from the I2C master channel.
Reads the transmit buffer status is busy or not and thereby updates IN/TBUF register based on FIFO/non-FIFO modes using Master Send command.
Related APIs:
XMC_USIC_CH_GetTransmitBufferStatus()

void XMC_I2C_CH_SelectInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2C_CH_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2C0_CH0, XMC_I2C0_CH1,XMC_I2C1_CH0,XMC_I2C1_CH1,XMC_I2C2_CH0,XMC_I2C2_CH1
Note
Availability of I2C1 and I2C2 depends on device selection
Parameters
interrupt_node Interrupt node pointer to be configured.
Range: XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT, XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER etc.
service_request Service request number.
Range: 0 to 5.
Returns
None
Description
Sets the interrupt node for USIC channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so.
Note: NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_I2C_CH_EnableEvent()

XMC_I2C_CH_STATUS_t XMC_I2C_CH_SetBaudrate | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | rate
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
rate | baud rate of I2C channel
Returns
None
Description:
Sets the rate of I2C channel.
Note:
Standard over sampling is considered if rate <= 100KHz and fast over sampling is considered if rate > 100KHz.
Related APIs:
XMC_USIC_CH_SetBaudrate()

void XMC_I2C_CH_SetInputSource | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2C_CH_INPUT_t | input,
 |  | const uint8_t | source
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
input | I2C channel input stage of type XMC_I2C_CH_INPUT_t
source | Input source select for the input stage(0->DX0A, 1->DX1A, .. 7->DX7G)
Returns
None
Description:
Sets the input source for I2C channel.
Defines the input stage for the corresponding input line.
Note
After configuring the input source for corresponding channel, interrupt node pointer is set.
Related APIs:
XMC_USIC_CH_SetInptSource(), XMC_USIC_CH_SetInterruptNodePointer()
void XMC_I2C_CH_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | service_request
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
service_request | Service request number in the range of 0-5
Returns
None
Description:
Sets the interrupt node for protocol interrupt.
To generate interrupt for an event, node pointer should be configured with service request number(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so.
Note:
NVIC node should be separately enabled to generate the interrupt. After setting the node pointer, desired event must be enabled.
Related APIs:
XMC_I2C_CH_EnableEvent(), NVIC_SetPriority(), NVIC_EnableIRQ(), XMC_I2C_CH_SetInputSource()
void XMC_I2C_CH_SetSlaveAddress | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | address
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
address | I2C slave address
Returns
None
Description:
Sets the I2C channel slave address.
Address is set in PCR_IICMode register by checking if it is in 10-bit address group or 7-bit address group. (If first five bits of address are assigned with 0xF0, then address mode is 10-bit mode otherwise it is 7-bit mode)
Note
A 7-bit address should include an additional bit at the LSB for read/write indication. For example, address 0x05 should be provided as 0x0a. A 10-bit address should be provided with the identifier 0b11110xx at the most significant bits. For example, address 0x305 should be provided as 0x7b05(bitwise OR with 0x7800).
Related APIs:
XMC_I2C_CH_GetSlaveAddress()

void XMC_I2C_CH_SlaveTransmit | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | data
 | ) |  |
Parameters
channel | Constant pointer to USIC channel structure of type XMC_USIC_CH_t
data | data to transmit from I2C channel
Returns
None
Description:
Transmit the data from the I2C slave channel.
Reads the transmit buffer status is busy or not and thereby updates IN/TBUF register based on FIFO/non-FIFO modes using Slave Send command.
Related APIs:
XMC_USIC_CH_GetTransmitBufferStatus(),XMC_I2C_CH_ClearStatusFlag()

void XMC_I2C_CH_Start ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
None
Description:
Starts the I2C channel.
Sets the USIC input operation mode to I2C mode using CCR register.
Related APIs:
XMC_USIC_CH_SetMode()

XMC_I2C_CH_STATUS_t XMC_I2C_CH_Stop ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel structure of type XMC_USIC_CH_t
Returns
XMC_I2C_CH_STATUS_t
Description:
Stops the I2C channel.
Sets the USIC input operation to IDLE mode using CCR register.
Related APIs:
XMC_USIC_CH_SetMode()

void XMC_I2C_CH_TriggerServiceRequest | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | service_request_line
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2C0_CH0, XMC_I2C0_CH1,XMC_I2C1_CH0,XMC_I2C1_CH1,XMC_I2C2_CH0,XMC_I2C2_CH1
Note
Availability of I2C1 and I2C2 depends on device selection
Parameters
service_request_line service request number of the event to be triggered.
Range: 0 to 5.
Returns
None
Description
Trigger a I2C interrupt service request.

When the I2C service request is triggered, the NVIC interrupt associated with it will be generated if enabled.
Related APIs:
XMC_I2C_CH_SelectInterruptNodePointer()

Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_I2C_CH_CONFIG_t Struct Reference

Data Fields
XMC_I2C_CH_CONFIG_t Struct Reference
XMC Peripheral Library » I2C

#include <xmc_i2c.h>

Data Fields

uint16_t | address
uint32_t | baudrate

Field Documentation

uint16_t address

slave address A 7-bit address needs to be left shifted it by 1. A 10-bit address needs to be ORed with XMC_I2C_10BIT_ADDR_GROUP.

uint32_t baudrate

baud rate configuration upto max of 400KHz

The documentation for this struct was generated from the following file:
  • xmc_i2c.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: I2S

Data Structures | Macros | Functions
I2S
XMC Peripheral Library

Data Structures

struct XMC_I2S_CH_CONFIG_t

Macros

#define | XMC_I2S0_CH0 XMC_USIC0_CH0
#define | XMC_I2S0_CH1 XMC_USIC0_CH1
#define | XMC_I2S1_CH0 XMC_USIC1_CH0
#define | XMC_I2S1_CH1 XMC_USIC1_CH1
#define | XMC_I2S2_CH0 XMC_USIC2_CH0
#define | XMC_I2S2_CH1 XMC_USIC2_CH1

Functions

void | XMC_I2S_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, const uint32_t flag)
void | XMC_I2S_CH_ConfigureShiftClockOutput (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t clock_output)
void | XMC_I2S_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_DisableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_I2S_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INPUT_t input)
void | XMC_I2S_CH_DisableMasterClock (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_EnableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_I2S_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INPUT_t input)
void | XMC_I2S_CH_EnableMasterClock (XMC_USIC_CH_t *const channel)
uint16_t | XMC_I2S_CH_GetReceivedData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_I2S_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_Init (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_CONFIG_t *const config)
void | XMC_I2S_CH_Receive (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_CHANNEL_t channel_number)
void | XMC_I2S_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_I2S_CH_STATUS_t | XMC_I2S_CH_SetBaudrate (XMC_USIC_CH_t *const channel, const uint32_t rate)
void | XMC_I2S_CH_SetBitOrderLsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_SetBitOrderMsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_I2S_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INPUT_t input, const uint8_t source)
void | XMC_I2S_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_I2S_CH_SetSystemWordLength (XMC_USIC_CH_t *const channel, uint32_t sclk_cycles_system_word_length)
void | XMC_I2S_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_I2S_CH_Start (XMC_USIC_CH_t *const channel)
XMC_I2S_CH_STATUS_t | XMC_I2S_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_Transmit (XMC_USIC_CH_t *const channel, const uint16_t data, const XMC_I2S_CH_CHANNEL_t channel_number)
void | XMC_I2S_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)
void | XMC_I2S_CH_WordAddressSignalPolarity (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_WA_POLARITY_t wa_inversion)

Detailed Description

USIC IIS Features:

Macro Definition Documentation

#define XMC_I2S0_CH0 XMC_USIC0_CH0

USIC0 channel 0 base address

#define XMC_I2S0_CH1 XMC_USIC0_CH1

USIC0 channel 1 base address

#define XMC_I2S1_CH0 XMC_USIC1_CH0

USIC1 channel 0 base address

#define XMC_I2S1_CH1 XMC_USIC1_CH1

USIC1 channel 1 base address

#define XMC_I2S2_CH0 XMC_USIC2_CH0

USIC2 channel 0 base address

#define XMC_I2S2_CH1 XMC_USIC2_CH1

USIC2 channel 1 base address

Enumeration Type Documentation

enum XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t

I2S Baudrate Generator shift clock output.

Enumerator
XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK | Baudrate Generator shift clock output: SCLK
XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 | Clock obtained as input from master: DX1
enum XMC_I2S_CH_BUS_MODE_t

Defines the I2S bus mode.

Enumerator
XMC_I2S_CH_BUS_MODE_MASTER | I2S Master
XMC_I2S_CH_BUS_MODE_SLAVE | I2S Slave
enum XMC_I2S_CH_CHANNEL_t

Defines the Polarity of the WA in the SELO output lines in relation to the internal WA signal.

Enumerator
XMC_I2S_CH_CHANNEL_1_LEFT | Channel 1 (left)
XMC_I2S_CH_CHANNEL_2_RIGHT | Channel 2 (right)
enum XMC_I2S_CH_EVENT_t

I2S events.

Enumerator
XMC_I2S_CH_EVENT_RECEIVE_START | Receive start event
XMC_I2S_CH_EVENT_DATA_LOST | Data lost event
XMC_I2S_CH_EVENT_TRANSMIT_SHIFT | Transmit shift event
XMC_I2S_CH_EVENT_TRANSMIT_BUFFER | Transmit buffer event
XMC_I2S_CH_EVENT_STANDARD_RECEIVE | Receive event
XMC_I2S_CH_EVENT_ALTERNATIVE_RECEIVE | Alternate receive event
XMC_I2S_CH_EVENT_BAUD_RATE_GENERATOR | Baudrate generator event
XMC_I2S_CH_EVENT_WA_FALLING_EDGE | WA falling edge event
XMC_I2S_CH_EVENT_WA_RISING_EDGE | WA rising edge event
XMC_I2S_CH_EVENT_WA_GENERATION_END | END event
XMC_I2S_CH_EVENT_DX2TIEN_ACTIVATED | WA input signal transition event
enum XMC_I2S_CH_INPUT_t

I2S input stage selection.

Enumerator
XMC_I2S_CH_INPUT_DIN0 | Data input stage 0
XMC_I2S_CH_INPUT_SLAVE_SCLKIN | Clock input stage
XMC_I2S_CH_INPUT_SLAVE_WA | WA input stage
XMC_I2S_CH_INPUT_DIN1 | Data input stage 1
XMC_I2S_CH_INPUT_DIN2 | Data input stage 2
XMC_I2S_CH_INPUT_DIN3 | Data input stage 3
enum XMC_I2S_CH_INTERRUPT_NODE_POINTER_t

I2S channel interrupt node pointers.

Enumerator
XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT | Node pointer for transmit shift interrupt
XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER | Node pointer for transmit buffer interrupt
XMC_I2S_CH_INTERRUPT_NODE_POINTER_RECEIVE | Node pointer for receive interrupt
XMC_I2S_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE | Node pointer for alternate receive interrupt
XMC_I2S_CH_INTERRUPT_NODE_POINTER_PROTOCOL | Node pointer for protocol related interrupts
enum XMC_I2S_CH_STATUS_FLAG_t

I2S status flag.

Enumerator
XMC_I2S_CH_STATUS_FLAG_WORD_ADDRESS | Word Address status
XMC_I2S_CH_STATUS_FLAG_DX2S | Status of WA input(DX2) signal
XMC_I2S_CH_STATUS_FLAG_DX2T_EVENT_DETECTED | Status for WA input signal transition
XMC_I2S_CH_STATUS_FLAG_WA_FALLING_EDGE_EVENT | Falling edge of the WA output signal has been generated
XMC_I2S_CH_STATUS_FLAG_WA_RISING_EDGE_EVENT | Rising edge of the WA output signal has been generated
XMC_I2S_CH_STATUS_FLAG_WA_GENERATION_END | The WA generation has ended
XMC_I2S_CH_STATUS_FLAG_RECEIVER_START_INDICATION | Receive start indication status
XMC_I2S_CH_STATUS_FLAG_DATA_LOST_INDICATION | Data lost indication status
XMC_I2S_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION | Transmit shift indication status
XMC_I2S_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION | Transmit buffer indication status
XMC_I2S_CH_STATUS_FLAG_RECEIVE_INDICATION | Receive indication status
XMC_I2S_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION | Alternate receive indication status
XMC_I2S_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION | Baud rate generator indication status
enum XMC_I2S_CH_STATUS_t

I2S Status.

Enumerator
XMC_I2S_CH_STATUS_OK | Status OK
XMC_I2S_CH_STATUS_ERROR | Status ERROR
XMC_I2S_CH_STATUS_BUSY | Status BUSY
enum XMC_I2S_CH_WA_POLARITY_t

Defines the Polarity of the WA in the SELO output lines in relation to the internal WA signal.

Enumerator
XMC_I2S_CH_WA_POLARITY_DIRECT | The SELO outputs have the same polarity as the WA signal (active high)
XMC_I2S_CH_WA_POLARITY_INVERTED | The SELO outputs have the inverted polarity to the WA signal (active low)

Function Documentation

void XMC_I2S_CH_ClearStatusFlag | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | flag
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
flag | Protocol event status to be cleared for detection of next occurence. Refer @ XMC_I2S_CH_STATUS_FLAG_t for valid values. OR combinations of these enum item can be used as input.
Returns
None
Description:
Clears the events specified, by setting PSCR register.

During communication the events occurred have to be cleared to detect their next occurence.
e.g: During transmission Transmit buffer event occurs to indicating data word transfer has started. This event has to be cleared after transmission of each data word. Otherwise next event cannot be recognized.
Related APIs:
XMC_I2S_CH_GetStatusFlag()
void XMC_I2S_CH_ConfigureShiftClockOutput | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t | clock_output
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
clock_output shift clock source.
Refer XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t for valid inputs.
Returns
None
Description:
Configures the shift clock source by setting BRG.SCLKOSEL.

In Master mode operation, shift clock is generated by the internal baud rate generator. This SCLK is made available for external slave devices by SCLKOUT signal.
In Slave mode, the signal is received from the external master. So the DX1(input) stage has to be connected to input.
void XMC_I2S_CH_DisableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0,XMC_I2S1_CH1,XMC_I2S2_CH0,XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Returns
None
Description
Disable data transmission.

Use this function in combination with XMC_I2S_CH_EnableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Related APIs:
XMC_I2S_CH_EnableDataTransmission()

void XMC_I2S_CH_DisableDelayCompensation ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0,XMC_I2S1_CH1,XMC_I2S2_CH0,XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Returns
None
Description
Disables delay compensation..

Related APIs:
XMC_I2S_CH_EnableDelayCompensation()

void XMC_I2S_CH_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
event | Protocol events which have to be disabled. Refer @ XMC_I2S_CH_EVENT_t for valid values. OR combinations of these enum item can be used as input.
Returns
None
Description:
Disables the I2S protocol specific events, by configuring PCR register.

After disabling the events, XMC_I2S_CH_EnableEvent() has to be invoked to re-enable the events.
Related APIs:
XMC_I2S_CH_EnableEvent()
void XMC_I2S_CH_DisableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_INPUT_t | input
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
input I2S channel input stage.
Refer XMC_I2S_CH_INPUT_t for valid inputs.
Returns
None
Description
Disables the polarity inversion of input data signal, by clearing DXyCR.DPOL(where y = input).

Resets the input data polarity. Invoke XMC_I2S_CH_EnableInputInversion() to apply inversion.
Related APIs:
XMC_I2S_CH_EnableInputInversion()
void XMC_I2S_CH_DisableMasterClock ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Disables the generation of Master clock by clearing PCR.MCLK bit.

This clock can be enabled by invoking XMC_I2S_CH_EnableMasterClock() as needed in the program.
Related APIs:
XMC_I2S_CH_EnableMasterClock()
void XMC_I2S_CH_EnableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0,XMC_I2S1_CH1,XMC_I2S2_CH0,XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Returns
None
Description
Enable data transmission.

Use this function in combination with XMC_I2S_CH_DisableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Note
If you need more control over the start of transmission use XMC_USIC_CH_SetStartTransmisionMode()
Related APIs:
XMC_I2S_CH_DisableDataTransmission()

void XMC_I2S_CH_EnableDelayCompensation ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0,XMC_I2S1_CH1,XMC_I2S2_CH0,XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Returns
None
Description
Enables delay compensation.

Delay compensation can be applied to the receive path.
Related APIs:
XMC_I2S_CH_DisableDelayCompensation()

void XMC_I2S_CH_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
event | Protocol events which have to be enabled. Refer @ XMC_I2S_CH_EVENT_t for valid values. OR combinations of these enum items can be used as input.
Returns
None
Description:
Enables the I2S protocol specific events, by configuring PCR register.

Events can be enabled as needed using XMC_I2S_CH_EnableEvent(). XMC_I2S_CH_DisableEvent() can be used to disable the events.
Related APIs:
XMC_I2S_CH_DisableEvent()
void XMC_I2S_CH_EnableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_INPUT_t | input
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
input I2S channel input stage.
Refer XMC_I2S_CH_INPUT_t for valid inputs.
Returns
None
Description
Enables the polarity inversion of input data signal, by setting DXyCR.DPOL(where y = input).

This is not set in XMC_I2S_CH_Init(). Invoke XMC_I2S_CH_EnableInputInversion() as needed later in the program. To disable the inversion XMC_I2S_CH_DisableInputInversion() can be invoked.
Related APIs:
XMC_I2S_CH_DisableInputInversion()
void XMC_I2S_CH_EnableMasterClock ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Enables the generation of Master clock by setting PCR.MCLK bit.

This clock can be used as a clock reference for external devices. This is not enabled during initialization in XMC_I2S_CH_Init(). Invoke XMC_I2S_CH_EnableMasterClock() to enable as needed in the program, or if it is disabled by XMC_I2S_CH_DisableMasterClock().
Related APIs:
XMC_I2S_CH_DisableMasterClock()
uint16_t XMC_I2S_CH_GetReceivedData ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
uint16_t Data read from the receive buffer.
Description:
Reads data from the receive buffer based on the FIFO selection.

Invocation of XMC_I2S_CH_Receive() receives the data and place it into receive buffer. After receiving the data XMC_I2S_CH_GetReceivedData() can be used to read the data from the buffer.
Related APIs:
XMC_I2S_CH_Receive()
uint32_t XMC_I2S_CH_GetStatusFlag ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
uint32_t Status of I2S protocol events.
Description:
Returns the status of the events, by reading PSR register.

This indicates the status of the all the events, for I2S communication.
Related APIs:
XMC_I2S_CH_ClearStatusFlag()
void XMC_I2S_CH_Init | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_CONFIG_t *const | config
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0, XMC_I2S1_CH1,XMC_I2S2_CH0, XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Parameters
config Constant pointer to I2S configuration structure of type XMC_I2S_CH_CONFIG_t.
Returns
XMC_I2S_CH_STATUS_t Status of initializing the USIC channel for I2S protocol.
Range: XMC_I2S_CH_STATUS_OK if initialization is successful.
XMC_I2S_CH_STATUS_ERROR if configuration of baudrate failed.
Description
Initializes the USIC channel for I2S protocol.

During the initialization, USIC channel is enabled and baudrate is configured. After each change of the WA signal, a complete data frame is intended to be transferred (frame length <= system word length). The number of data bits transferred after a change of signal WA is defined by config->frame_length. A data frame can consist of several data words with a data word length defined by config->data_bits. The changes of signal WA define the system word length as the number of SCLK cycles between two changes of WA. The system word length is set by default to the frame length defined by config->frame_length.

XMC_I2S_CH_Start() should be invoked after the initialization to enable the channel.

Related APIs:
XMC_I2S_CH_Start(), XMC_I2S_CH_Stop(), XMC_I2S_CH_Transmit(), XMC_I2S_CH_SetSystemWordLength()

void XMC_I2S_CH_Receive | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_CHANNEL_t | channel_number
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
channel_number Communication output channel of the I2S, based on this mode TCI(Transmit control information)is updated.
Refer XMC_I2S_CH_CHANNEL_t for valid values.
Returns
None
Description:
Transmits a dummy data(FFFFH) to provide clock for slave and receives the data from the slave.

XMC_I2S_CH_Receive() receives the data and places it into buffer based on the FIFO selection. After reception of data XMC_I2S_CH_GetReceivedData() can be invoked to read the data from the buffers.
Related APIs:
XMC_I2S_CH_GetReceivedData()
void XMC_I2S_CH_SelectInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0,XMC_I2S1_CH1,XMC_I2S2_CH0,XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Parameters
interrupt_node Interrupt node pointer to be configured.
Range: XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT, XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER etc.
service_request Service request number.
Range: 0 to 5.
Returns
None
Description
Sets the interrupt node for USIC channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so.
Note: NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_I2S_CH_EnableEvent()

XMC_I2S_CH_STATUS_t XMC_I2S_CH_SetBaudrate | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | rate
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
rate | Bus speed in bits per second
Returns
XMC_I2S_CH_STATUS_t Status of the I2S driver after the request for setting baudrate is processed.
XMC_I2S_CH_STATUS_OK- If the baudrate is successfully changed.
XMC_I2S_CH_STATUS_ERROR- If the new baudrate value is out of range.
Description:
Sets the bus speed in bits per second
Related APIs:
XMC_I2S_CH_Init(), XMC_I2S_CH_Stop()
void XMC_I2S_CH_SetBitOrderLsbFirst ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Set the order of data transfer from LSB to MSB, by clearing SCTR.SDIR bit.

This is typically based on the slave settings. Invoke XMC_I2S_CH_SetBitOrderLsbFirst() to set direction as needed in the program.
Related APIs:
XMC_I2S_CH_SetBitOrderMsbFirst()
void XMC_I2S_CH_SetBitOrderMsbFirst ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Set the order of data transfer from MSB to LSB, by setting SCTR.SDIR bit.

This is typically based on the slave settings. This is not set during XMC_I2S_CH_Init(). Invoke XMC_I2S_CH_SetBitOrderMsbFirst() to set direction as needed in the program.
Related APIs:
XMC_I2S_CH_SetBitOrderLsbFirst()
void XMC_I2S_CH_SetFrameLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | frame_length
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
frame_length Number of bits in a frame.
Range: 1 to 64.
Returns
None
Description
Define the data frame length.

Set the number of bits to be serially transmitted in a frame. The frame length should be multiples of word length.
Related APIs:
XMC_USIC_CH_SetWordLength()
void XMC_I2S_CH_SetInputSource | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_INPUT_t | input,
 |  | const uint8_t | source
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
input I2S channel input stage.
Refer XMC_I2S_CH_INPUT_t for valid values
source | Input source select for the input stage. Range : [0 to 7]
Returns
None
Description
Selects the data source for I2S input stage, by configuring DXCR.DSEL bits.

Selects the input data signal source among DXnA, DXnB.. DXnG for the input stage. The API can be used for all the input stages like DX0CR, DX1CR etc. This is not done during initialization. This has to be configured before starting the I2S communication.
void XMC_I2S_CH_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | service_request
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
service_request | Service request number. Range: [0 to 5]
Returns
None
Description
Sets the interrupt node for I2S channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so. This is not configured in XMC_I2S_CH_Init() during initialization.
Note::
  1. NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_USIC_CH_EnableEvent()
void XMC_I2S_CH_SetSystemWordLength | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | sclk_cycles_system_word_length
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
sclk_cycles_system_word_length | system word length in terms of sclk clock cycles.
Returns
None
Description:
Configures the system word length by setting BRG.DCTQ bit field.

This value has to be always higher than 1U and lower than the data with (SCTR.FLE)
void XMC_I2S_CH_SetWordLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | word_length
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
word_length Number of bits to be configured for a data word.
Range: 1 to 16.
Returns
None
Description
Defines the data word length.

Sets the number of bits to represent a data word. Frame length should be a multiple of word length.
Related APIs:
XMC_I2S_CH_SetFrameLength()
void XMC_I2S_CH_Start ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Set the selected USIC channel to operate in I2S mode, by setting CCR.MODE bits.

It should be executed after XMC_I2S_CH_Init() during initialization. By invoking XMC_I2S_CH_Stop(), the MODE is set to IDLE state. Call XMC_I2S_CH_Start() to set the I2S mode again, as needed later in the program.
Related APIs:
XMC_I2S_CH_Init(), XMC_I2S_CH_Stop()
XMC_I2S_CH_STATUS_t XMC_I2S_CH_Stop ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
XMC_I2S_CH_STATUS_t Status of the I2S driver after the request for stopping is processed.
XMC_I2S_CH_STATUS_OK- If the USIC channel is successfully put to IDLE mode.
XMC_I2S_CH_STATUS_BUSY- If the USIC channel is busy transmitting data.
Description:
Set the selected I2S channel to IDLE mode, by clearing CCR.MODE bits.

After calling XMC_I2S_CH_Stop, channel is IDLE mode. So no communication is supported. XMC_I2S_CH_Start() has to be invoked to start the communication again.
Related APIs:
XMC_I2S_CH_Start()
void XMC_I2S_CH_Transmit | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data,
 |  | const XMC_I2S_CH_CHANNEL_t | channel_number
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
data | Data to be transmitted
channel_number Communication output channel of the I2S, based on this channel selection TCI(Transmit control information)is updated.
Refer XMC_I2S_CH_CHANNEL_t for valid values.
Returns
None
Description:
Puts the data into FIFO, if FIFO mode is enabled or else into standard buffer, by setting the proper mode.

TCI(Transmit Control Information) allows dynamic control of output channel during data transfers. To support this auto update, TCSR.WAMD(Automatic WA mode) will be enabled during the initialization using XMC_I2S_CH_Init() for all modes.
Related APIs:
XMC_I2S_CH_Receive()
void XMC_I2S_CH_TriggerServiceRequest | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | service_request_line
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0,XMC_I2S1_CH1,XMC_I2S2_CH0,XMC_I2S2_CH1
Note
Availability of I2S1 and I2S2 depends on device selection
Parameters
service_request_line service request number of the event to be triggered.
Range: 0 to 5.
Returns
None
Description
Trigger a I2S interrupt service request.

When the I2S service request is triggered, the NVIC interrupt associated with it will be generated if enabled.
Related APIs:
XMC_I2S_CH_SelectInterruptNodePointer()

void XMC_I2S_CH_WordAddressSignalPolarity | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_I2S_CH_WA_POLARITY_t | wa_inversion
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
wa_inversion Polarity of the word address signal.
Refer XMC_I2S_CH_WA_POLARITY_t for valid values
Returns
None
Description
Set the polarity of the word address signal, by configuring PCR.SELINV bit.

Normally WA signal is active low level signal. This is configured in XMC_I2S_CH_Init() during initialization. Invoke XMC_I2S_CH_WordAddressSignalPolarity() with desired settings as needed later in the program.
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_I2S_CH_CONFIG_t Struct Reference

Data Fields
XMC_I2S_CH_CONFIG_t Struct Reference
XMC Peripheral Library » I2S

#include <xmc_i2s.h>

Data Fields

uint32_t | baudrate
XMC_I2S_CH_BUS_MODE_t bus_mode
uint8_t | data_bits
uint8_t | data_delayed_sclk_periods
uint8_t | frame_length
XMC_I2S_CH_WA_POLARITY_t wa_inversion

Field Documentation

uint32_t baudrate

Module baud rate for communication

XMC_I2S_CH_BUS_MODE_t bus_mode

Bus mode MASTER/SLAVE

uint8_t data_bits

Data word length. A data frame can consists of several data words.
Value configured as USIC channel word length.
Range: minimum= 1, maximum= 16

uint8_t data_delayed_sclk_periods

Data delay defined in sclk periods

uint8_t frame_length

Number of data bits transferred after a change of signal WA (data frame).
Configured as USIC channel frame length.
Range: minimum= 1, maximum= 63

XMC_I2S_CH_WA_POLARITY_t wa_inversion

Enable inversion of Slave select signal relative to the internal WA

The documentation for this struct was generated from the following file:
  • xmc_i2s.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: LEDTS

Data Structures | Macros | Typedefs | Enumerations | Functions
LEDTS
XMC Peripheral Library

Data Structures

struct | XMC_LEDTS_GLOBAL_CONFIG_t
struct | XMC_LEDTS_GLOBAL_t
struct | XMC_LEDTS_LED_CONFIG_t
struct | XMC_LEDTS_TS_CONFIG_ADVANCED_t
struct | XMC_LEDTS_TS_CONFIG_BASIC_t

Macros

#define | XMC_LEDTS0 ((XMC_LEDTS_GLOBAL_t *) LEDTS0)
#define | XMC_LEDTS0 ((XMC_LEDTS_GLOBAL_t *) LEDTS0)
#define | XMC_LEDTS1 ((XMC_LEDTS_GLOBAL_t *) LEDTS1)
#define | XMC_LEDTS1 ((XMC_LEDTS_GLOBAL_t *) LEDTS1)
#define | XMC_LEDTS2 ((XMC_LEDTS_GLOBAL_t *) LEDTS2)

Typedefs

typedef XMC_LEDTS_GLOBAL_t XMC_LEDTS_t

Enumerations

Functions

void | XMC_LEDTS_ClearInterruptFlag (XMC_LEDTS_t *const ledts, uint32_t interrupt_mask)
void | XMC_LEDTS_DisableInterrupt (XMC_LEDTS_t *const ledts, uint32_t interrupt_mask)
void | XMC_LEDTS_EnableInterrupt (XMC_LEDTS_t *const ledts, uint32_t interrupt_mask)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitGlobal (XMC_LEDTS_t *const ledts, const XMC_LEDTS_GLOBAL_CONFIG_t *config)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitLED (XMC_LEDTS_t *const ledts, const XMC_LEDTS_LED_CONFIG_t *config)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitTSAdvanced (XMC_LEDTS_t *const ledts, const XMC_LEDTS_TS_CONFIG_ADVANCED_t *config)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitTSBasic (XMC_LEDTS_t *const ledts, const XMC_LEDTS_TS_CONFIG_BASIC_t *config)
uint32_t | XMC_LEDTS_ReadFNCOL (XMC_LEDTS_t *const ledts)
uint32_t | XMC_LEDTS_ReadInterruptFlag (XMC_LEDTS_t *const ledts)
uint16_t | XMC_LEDTS_ReadTSVAL (XMC_LEDTS_t *const ledts)
void | XMC_LEDTS_SetActivePADNo (XMC_LEDTS_t *const ledts, XMC_LEDTS_NUMBER_TS_INPUT_t pad_num)
void | XMC_LEDTS_SetColumnBrightness (XMC_LEDTS_t *const ledts, XMC_LEDTS_LED_COLUMN_t column, const uint8_t brightness)
void | XMC_LEDTS_SetCommonOscillationWindow (XMC_LEDTS_t *const ledts, const uint8_t common_size)
void | XMC_LEDTS_SetLEDLinePattern (XMC_LEDTS_t *const ledts, XMC_LEDTS_LED_COLUMN_t column, const uint8_t pattern)
void | XMC_LEDTS_SetNumOfLEDColumns (XMC_LEDTS_t *const ledts, uint8_t count)
void | XMC_LEDTS_SetOscillationWindow (XMC_LEDTS_t *const ledts, XMC_LEDTS_NUMBER_TS_INPUT_t touchpad, const uint8_t size)
void | XMC_LEDTS_StartCounter (XMC_LEDTS_t *const ledts, const uint16_t prescaler)
void | XMC_LEDTS_StopCounter (XMC_LEDTS_t *const ledts)

Detailed Description

The LED and Touch-Sense (LEDTS) drives LEDs and controls touch pads used as human-machine interface (HMI) in an application. The LEDTS can measure the capacitance of up to 8 touch pads, can also drive up to 64 LEDs in an LED matrix. Touch pads and LEDs can share pins to minimize the number of pins needed for such applications, this is realized by the module controlling the touch pads and driving the LEDs in a time-division multiplexed manner.

This device contains LEDTS kernel that has an LED driving function and a touch-sensing function.

It is recommended to set up all configurations for the LEDTS in all Special Function Registers(SFR) before enabling and starting LED and/or touch-sense function(s).

This Low Level Driver(LLD) provides APIs to configure and control LED functionality, Touch-Sense functionality and features common to both functionalities.

LED features:

  1. Configuration structure to configure LED functionality (XMC_LEDTS_LED_CONFIG_t) and initialization funtion (XMC_LEDTS_InitLED()).
  2. Selection of number of LED columns, active column level and enabling LED funtionality (XMC_LEDTS_InitLED()).
  3. Setting line pattern to be displayed on LED column (XMC_LEDTS_SetLEDLinePattern()).
  4. Brightness control of LED column (XMC_LEDTS_SetColumnBrightness()).
  5. Setting number of columns to be activated (XMC_LEDTS_SetNumOfLEDColumns()).

Touch-Sense features:

  1. Configuration structure to perform basic Touch-Sense functionality (XMC_LEDTS_TS_CONFIG_BASIC_t) settings and initialization funtion (XMC_LEDTS_InitTSBasic()).
  2. Configuration structure to perform advanced Touch-Sense functionality (XMC_LEDTS_TS_CONFIG_ADVANCED_t) settings and initialization function (XMC_LEDTS_InitTSAdvanced()).
  3. Setting number of touch inputs and acculumate count on touch input (XMC_LEDTS_InitTSBasic()).
  4. Enabling/disabling of common compare, Touch-Sense counter auto reset and Touch-Sense funtionality. (XMC_LEDTS_InitTSBasic()).
  5. Set number of mask bits for time frame validation and first touch input to be active. (XMC_LEDTS_InitTSAdvanced()).
  6. Enable/disable time frame interrupt, external pull-up on touch pin and hardware or software control of pad turn (XMC_LEDTS_InitTSAdvanced()).
  7. Setting size of common oscillation window for all touch-sense inputs (XMC_LEDTS_SetCommonOscillationWindow()).
  8. Setting size of oscillation window for a touch-sense input (XMC_LEDTS_SetOscillationWindow()).

Common features:

  1. Global configuration structure XMC_LEDTS_GLOBAL_CONFIG_t and initialization function XMC_LEDTS_InitGlobal().
  2. Selection of Clock source for LEDTS module (XMC_LEDTS_InitGlobal()).
  3. Kick-start and stop of LEDTS module (XMC_LEDTS_StartCounter() / XMC_LEDTS_StopCounter()).
  4. Read and clear of interrupt status flags (XMC_LEDTS_ReadInterruptFlag() / XMC_LEDTS_ClearInterruptFlag()).
  5. Reading of previous active column number (XMC_LEDTS_ReadFNCOL()).
  6. Enable/Disable Interrupts(XMC_LEDTS_EnableInterrupt() / XMC_LEDTS_DisableInterrupt()).

Macro Definition Documentation

#define XMC_LEDTS0 ((XMC_LEDTS_GLOBAL_t *) LEDTS0)

Typedef for LEDTS kernel0

#define XMC_LEDTS0 ((XMC_LEDTS_GLOBAL_t *) LEDTS0)

Typedef for LEDTS kernel0

#define XMC_LEDTS1 ((XMC_LEDTS_GLOBAL_t *) LEDTS1)

Typedef for LEDTS kernel1

#define XMC_LEDTS1 ((XMC_LEDTS_GLOBAL_t *) LEDTS1)

Typedef for LEDTS kernel1

#define XMC_LEDTS2 ((XMC_LEDTS_GLOBAL_t *) LEDTS2)

Typedef for LEDTS kernel2

Typedef Documentation

typedef XMC_LEDTS_GLOBAL_t XMC_LEDTS_t

Defines typedef for LEDTS Global data structure. Use type XMC_LEDTS_t for this data structure.

Enumeration Type Documentation

enum XMC_LEDTS_ACCUMULATION_COUNT_t

Defines number of accumulation counts on Touch-Sense input. Use type XMC_LEDTS_ACCUMULATION_COUNT_t for this enum.

Enumerator
XMC_LEDTS_ACCUMULATION_COUNT_1_TIME | Accumulate once
XMC_LEDTS_ACCUMULATION_COUNT_2_TIMES | Accumulate twice
XMC_LEDTS_ACCUMULATION_COUNT_3_TIMES | Accumulate thrice
XMC_LEDTS_ACCUMULATION_COUNT_4_TIMES | Accumulate 4 times
XMC_LEDTS_ACCUMULATION_COUNT_5_TIMES | Accumulate 5 times
XMC_LEDTS_ACCUMULATION_COUNT_6_TIMES | Accumulate 6 times
XMC_LEDTS_ACCUMULATION_COUNT_7_TIMES | Accumulate 7 times
XMC_LEDTS_ACCUMULATION_COUNT_8_TIMES | Accumulate 8 times
XMC_LEDTS_ACCUMULATION_COUNT_9_TIMES | Accumulate 9 times
XMC_LEDTS_ACCUMULATION_COUNT_10_TIMES | Accumulate 10 times
XMC_LEDTS_ACCUMULATION_COUNT_11_TIMES | Accumulate 11 times
XMC_LEDTS_ACCUMULATION_COUNT_12_TIMES | Accumulate 12 times
XMC_LEDTS_ACCUMULATION_COUNT_13_TIMES | Accumulate 13 times
XMC_LEDTS_ACCUMULATION_COUNT_14_TIMES | Accumulate 14 times
XMC_LEDTS_ACCUMULATION_COUNT_15_TIMES | Accumulate 15 times
XMC_LEDTS_ACCUMULATION_COUNT_16_TIMES | Accumulate 16 times
enum XMC_LEDTS_ACTIVE_LEVEL_LED_COL_t

Defines level of LED column when active. Use type XMC_LEDTS_ACTIVE_LEVEL_LED_COL_t for this enum.

Enumerator
XMC_LEDTS_ACTIVE_LEVEL_LED_COL_LOW | LED column pins output low when active
XMC_LEDTS_ACTIVE_LEVEL_LED_COL_HIGH | LED column pins output high when active
enum XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_t

Defines Autoscan time period interrupt flag status. Use type XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_t for this enum.

Enumerator
XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_INACTIVE | Autoscan time period interrupt not active
XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_ACTIVE | Autoscan time period interrupt active
enum XMC_LEDTS_CLOCK_TYPE_t

Defines Clock master enable/disable. Use type for XMC_LEDTS_CLOCK_TYPE_t for this enum.

Enumerator
XMC_LEDTS_CLOCK_TYPE_MASTER | Kernel generates its own clock
XMC_LEDTS_CLOCK_TYPE_SLAVE | Clock is taken from another master kernel
enum XMC_LEDTS_COMMON_COMPARE_t

Defines enable/disable of common compare configuration for Touch-Sense. Use type XMC_LEDTS_COMMON_COMPARE_t for this enum.

Enumerator
XMC_LEDTS_COMMON_COMPARE_DISABLE | Disable common compare for touch-sense
XMC_LEDTS_COMMON_COMPARE_ENABLE | Enable common compare for touch-sense
enum XMC_LEDTS_EXT_PULLUP_COLA_t

Defines External pull-up on touch-sense pin. Use type XMC_LEDTS_EXT_PULLUP_COLA_t for this enum.

Enumerator
XMC_LEDTS_EXT_PULLUP_COLA_DISABLE | Disable external pull-up. Internal pull-up is active
XMC_LEDTS_EXT_PULLUP_COLA_ENABLE | Enable external pull-up
enum XMC_LEDTS_EXTEND_TS_OUTPUT_t

Defines extended Touch-Sense output for pin-low-level. Use type XMC_LEDTS_EXTEND_TS_OUTPUT_t for this enum.

Enumerator
XMC_LEDTS_EXTEND_TS_OUTPUT_BY_1_CLK | Extend Touch-Sense output for pin-low-level by 1 ledts_clk
XMC_LEDTS_EXTEND_TS_OUTPUT_BY_4_CLK | Extend Touch-Sense output for pin-low-level by 4 ledts_clk
XMC_LEDTS_EXTEND_TS_OUTPUT_BY_8_CLK | Extend Touch-Sense output for pin-low-level by 8 ledts_clk
XMC_LEDTS_EXTEND_TS_OUTPUT_BY_16_CLK | Extend Touch-Sense output for pin-low-level by 16 ledts_clk
enum XMC_LEDTS_FLAG_STATUS_t

Defines return value for checking interrupt flag. Use type XMC_LEDTS_FLAG_STATUS_t for this enum.

Enumerator
XMC_LEDTS_FLAG_STATUS_NO | Flag not raised
XMC_LEDTS_FLAG_STATUS_YES | Flag is raised
enum XMC_LEDTS_INTERRUPT_t

Defines Enable or disable interrupts. Use type XMC_LEDTS_INTERRUPT_t for this enum.

Enumerator
XMC_LEDTS_INTERRUPT_TIMESLICE | Enable or Disable time slice interrupt
XMC_LEDTS_INTERRUPT_TIMEFRAME | Enable or Disable time frame interrupt
XMC_LEDTS_INTERRUPT_TIMEPERIOD | Enable or Disable autoscan time period interrupt
enum XMC_LEDTS_LED_COLUMN_t

Defines available LED columns. Use type XMC_LEDTS_LED_COLUMN_t for this enum.

Enumerator
XMC_LEDTS_LED_COLUMN_0 | Denotes LED Column 0
XMC_LEDTS_LED_COLUMN_1 | Denotes LED Column 1
XMC_LEDTS_LED_COLUMN_2 | Denotes LED Column 2
XMC_LEDTS_LED_COLUMN_3 | Denotes LED Column 3
XMC_LEDTS_LED_COLUMN_4 | Denotes LED Column 4
XMC_LEDTS_LED_COLUMN_5 | Denotes LED Column 5
XMC_LEDTS_LED_COLUMN_6 | Denotes LED Column 6
XMC_LEDTS_LED_COLUMN_A | Denotes LED Column A
enum XMC_LEDTS_LED_FUNC_t

Defines LED function enable/disable. Use type XMC_LEDTS_LED_FUNC_t for this enum.

Enumerator
XMC_LEDTS_LED_FUNC_DISABLE | Disable LED function
XMC_LEDTS_LED_FUNC_ENABLE | Enable LED function
enum XMC_LEDTS_NUMBER_LED_COLUMNS_t

Defines Number of LED columns. Use type XMC_LEDTS_NUMBER_LED_COLUMNS_t for this enum.

Enumerator
XMC_LEDTS_NUMBER_LED_COLUMNS_1 | COLA only if TS is enabled, else COL0 only
XMC_LEDTS_NUMBER_LED_COLUMNS_2 | COLA,COL0 if TS is enabled, else COL0-1
XMC_LEDTS_NUMBER_LED_COLUMNS_3 | COLA,COL0-1 if TS is enabled, else COL0-2
XMC_LEDTS_NUMBER_LED_COLUMNS_4 | COLA,COL0-2 if TS is enabled, else COL0-3
XMC_LEDTS_NUMBER_LED_COLUMNS_5 | COLA,COL0-3 if TS is enabled, else COL0-4
XMC_LEDTS_NUMBER_LED_COLUMNS_6 | COLA,COL0-4 if TS is enabled, else COL0-5
XMC_LEDTS_NUMBER_LED_COLUMNS_7 | COLA,COL0-5 if TS is enabled, else COL0-6
XMC_LEDTS_NUMBER_LED_COLUMNS_8 | Only possible if TS is disabled; COLA,COL0-6 used
enum XMC_LEDTS_NUMBER_TS_INPUT_t

Defines number of Touch-Sense Input (for HW pad turn control). Use type XMC_LEDTS_NUMBER_TS_INPUT_t for this enum.

Enumerator
XMC_LEDTS_NUMBER_TS_INPUT_1 | Only TSIN0 is used
XMC_LEDTS_NUMBER_TS_INPUT_2 | TSIN0 & TSIN1 are used
XMC_LEDTS_NUMBER_TS_INPUT_3 | TSIN0-TSIN2 are used
XMC_LEDTS_NUMBER_TS_INPUT_4 | TSIN0-TSIN3 are used
XMC_LEDTS_NUMBER_TS_INPUT_5 | TSIN0-TSIN4 are used
XMC_LEDTS_NUMBER_TS_INPUT_6 | TSIN0-TSIN5 are used
XMC_LEDTS_NUMBER_TS_INPUT_7 | TSIN0-TSIN6 are used
XMC_LEDTS_NUMBER_TS_INPUT_8 | TSIN0-TSIN7 are used
enum XMC_LEDTS_PAD_TURN_SW_CONTROL_t

Defines software control for Touch-Sense pad turn. Use type XMC_LEDTS_PAD_TURN_SW_CONTROL_t for this enum.

Enumerator
XMC_LEDTS_SW_CONTROL_DISABLE | Disable software control. Auto hardware control
XMC_LEDTS_SW_CONTROL_ENABLE | Enable software control for pad turn
enum XMC_LEDTS_PAD_TURN_t

Defines Touch-Sense TSIN pad turn. Use type XMC_LEDTS_PAD_TURN_t for this enum.

Enumerator
XMC_LEDTS_PAD_TURN_0 | TSIN0 is next or currently active
XMC_LEDTS_PAD_TURN_1 | TSIN1 is next or currently active
XMC_LEDTS_PAD_TURN_2 | TSIN2 is next or currently active
XMC_LEDTS_PAD_TURN_3 | TSIN3 is next or currently active
XMC_LEDTS_PAD_TURN_4 | TSIN4 is next or currently active
XMC_LEDTS_PAD_TURN_5 | TSIN5 is next or currently active
XMC_LEDTS_PAD_TURN_6 | TSIN6 is next or currently active
XMC_LEDTS_PAD_TURN_7 | TSIN7 is next or currently active
enum XMC_LEDTS_STATUS_t

Defines return value of an API. Use type XMC_LEDTS_STATUS_t for this enum.

Enumerator
XMC_LEDTS_STATUS_SUCCESS | API fulfills request
XMC_LEDTS_STATUS_RUNNING | The kernel-counter is currently running
XMC_LEDTS_STATUS_ERROR | API cannot fulfill request
XMC_LEDTS_STATUS_IDLE | The kernel-counter is currently idle
enum XMC_LEDTS_SUSPEND_t

Defines Suspend request configuration. Use type XMC_LEDTS_SUSPEND_t for this enum.

Enumerator
XMC_LEDTS_SUSPEND_DISABLE | Ignore suspend request
XMC_LEDTS_SUSPEND_ENABLE | Enable suspend according to request
enum XMC_LEDTS_TF_INTERRUPT_FLAG_t

Defines (Extended) Time frame interrupt flag status. Use type XMC_LEDTS_TF_INTERRUPT_FLAG_t for this enum.

Enumerator
XMC_LEDTS_TF_INTERRUPT_FLAG_INACTIVE | (Extended) Time frame interrupt not active
XMC_LEDTS_TF_INTERRUPT_FLAG_ACTIVE | (Extended) Time frame interrupt active
enum XMC_LEDTS_TF_VALIDATION_t

Defines Enable/disable of (extended) time frame validation. Use type XMC_LEDTS_TF_VALIDATION_t for this enum.

Enumerator
XMC_LEDTS_TF_VALIDATION_DISABLE | Disable time frame validation
XMC_LEDTS_TF_VALIDATION_ENABLE | Enable time frame validation
enum XMC_LEDTS_TP_SYNC_t

Defines enable/disable of autoscan time period synchronization. Use type XMC_LEDTS_TP_SYNC_t for this enum.

Enumerator
XMC_LEDTS_TP_SYNC_DISABLE | Synchronization is disabled
XMC_LEDTS_TP_SYNC_ENABLE | Synchronization enabled on Kernel0 autoscan time period
enum XMC_LEDTS_TS_COUNTER_AUTO_RESET_t

Defines enable/disable of Touch-Sense counter auto reset configuration. Use type XMC_LEDTS_TS_COUNTER_AUTO_RESET_t for this enum.

Enumerator
XMC_LEDTS_TS_COUNTER_AUTO_RESET_DISABLE | Disable Touch-Sense counter automatic reset
XMC_LEDTS_TS_COUNTER_AUTO_RESET_ENABLE | Enable Touch-Sense counter automatic reset to 0x00
enum XMC_LEDTS_TS_COUNTER_MASK_t

Defines number of bits to mask for time frame event validation. Use type XMC_LEDTS_TS_COUNTER_MASK_t for this enum.

Enumerator
XMC_LEDTS_TS_COUNTER_MASK_1_LSB | Mask LSB bit only
XMC_LEDTS_TS_COUNTER_MASK_2_LSB | Mask 2 LSB bits
XMC_LEDTS_TS_COUNTER_MASK_3_LSB | Mask 3 LSB bits
XMC_LEDTS_TS_COUNTER_MASK_4_LSB | Mask 4 LSB bits
XMC_LEDTS_TS_COUNTER_MASK_5_LSB | Mask 5 LSB bits
XMC_LEDTS_TS_COUNTER_MASK_6_LSB | Mask 6 LSB bits
XMC_LEDTS_TS_COUNTER_MASK_7_LSB | Mask 7 LSB bits
XMC_LEDTS_TS_COUNTER_MASK_8_LSB | Mask 8 LSB bits
enum XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_t

Defines Touch-Sense counter overflow indication. Use type XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_t for this enum.

Enumerator
XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_NO | Touch-sense counter has not overflowed
XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_YES | Touch-sense counter has overflowed at least once
enum XMC_LEDTS_TS_COUNTER_SATURATION_t

Defines enable/disable of Touch-Sense counter saturation configuration. Use type XMC_LEDTS_TS_COUNTER_SATURATION_t for this enum.

Enumerator
XMC_LEDTS_TS_COUNTER_SATURATION_DISABLE | Disabled. Touch-Sense counter overflows when it reaches 0xFF
XMC_LEDTS_TS_COUNTER_SATURATION_ENABLE | Enabled. Touch-Sense counter stops counting when it reaches 0xFF
enum XMC_LEDTS_TS_FUNC_t

Defines Touch-Sense function enable/disable. Use type XMC_LEDTS_TS_FUNC_t for this enum.

Enumerator
XMC_LEDTS_TS_FUNC_DISABLE | Disable touch-sense function
XMC_LEDTS_TS_FUNC_ENABLE | Enable touch-sense function
enum XMC_LEDTS_TS_INPUT_t

Defines available Touch-Sense inputs. Use type XMC_LEDTS_TS_INPUT_t for this enum.

Enumerator
XMC_LEDTS_TS_INPUT_0 | TSIN0 - Denotes touch-sense line 1
XMC_LEDTS_TS_INPUT_1 | TSIN1 - Denotes touch-sense line 2
XMC_LEDTS_TS_INPUT_2 | TSIN2 - Denotes touch-sense line 3
XMC_LEDTS_TS_INPUT_3 | TSIN3 - Denotes touch-sense line 4
XMC_LEDTS_TS_INPUT_4 | TSIN4 - Denotes touch-sense line 5
XMC_LEDTS_TS_INPUT_5 | TSIN5 - Denotes touch-sense line 6
XMC_LEDTS_TS_INPUT_6 | TSIN6 - Denotes touch-sense line 7
XMC_LEDTS_TS_INPUT_7 | TSIN7 - Denotes touch-sense line 8
enum XMC_LEDTS_TS_INTERRUPT_FLAG_t

Defines Interrupt flag status. Use type XMC_LEDTS_TS_INTERRUPT_FLAG_t for this enum.

Enumerator
XMC_LEDTS_INTERRUPT_FLAG_TIMESLICE | Time slice interrupt flag status
XMC_LEDTS_INTERRUPT_FLAG_TIMEFRAME | Time frame interrupt flag status
XMC_LEDTS_INTERRUPT_FLAG_TIMEPERIOD | Time period interrupt flag status
XMC_LEDTS_INTERRUPT_FLAG_TSCOUNTER_OVERFLOW | TS counter overflow flag status

Function Documentation

void XMC_LEDTS_ClearInterruptFlag | ( | XMC_LEDTS_t *const | ledts,
 |  | uint32_t | interrupt_mask
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
interrupt_mask mask value of XMC_LEDTS_INTERRUPT_t enum type.
Returns
None.
Description
Clears interrupt status flags in EVFR register as indicated by mask value interrupt_mask.
This API sets EVFR.CTSF, EVFR.CTFF, EVFR.CTPF bit fields to clear time slice, time frame or time period interrupts respectively.
Typically used along with XMC_LEDTS_ReadInterruptFlag() to figure out which event triggered the interrupt.
Note
Calling this API moves interrupt from pending/active state to inactive state. If the interrupt is pulsed, failing to clear the event bit might cause CPU to immediately re-enter the interrupt service routine(ISR).
Related API's
XMC_LEDTS_ReadInterruptFlag().
void XMC_LEDTS_DisableInterrupt | ( | XMC_LEDTS_t *const | ledts,
 |  | uint32_t | interrupt_mask
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
interrupt_mask mask value of XMC_LEDTS_INTERRUPT_t enum type.
Returns
None.
Description
Disables requested interrupt type by configuring GLOBCTL register with masked value interrupt_mask.
This API can be used to disable time slice(GLOBCTL.ITS_EN) or time frame(GLOBCTL.ITF_EN )or time period (GLOBCTL.ITP_EN)interrupt or any combination of these interrupts by passing appropriate bitwise ORed mask value.
Related API's
XMC_LEDTS_EnableInterrupt().
void XMC_LEDTS_EnableInterrupt | ( | XMC_LEDTS_t *const | ledts,
 |  | uint32_t | interrupt_mask
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
interrupt_mask mask value of XMC_LEDTS_INTERRUPT_t enum type.
Returns
None.
Description
Enables requested interrupt type by configuring GLOBCTL register with masked value interrupt_mask.
This API can be used to enable time slice(GLOBCTL.ITS_EN) or time frame(GLOBCTL.ITF_EN )or time period (GLOBCTL.ITP_EN)interrupt or any combination of these interrupts by passing appropriate bitwise ORed mask value.
Related API's
XMC_LEDTS_DisableInterrupt().
XMC_LEDTS_STATUS_t XMC_LEDTS_InitGlobal | ( | XMC_LEDTS_t *const | ledts,
 |  | const XMC_LEDTS_GLOBAL_CONFIG_t * | config
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
config Pointer to constant LEDTS Global configuration structure. Refer XMC_LEDTS_GLOBAL_CONFIG_t data structure.
Returns
XMC_LEDTS_STATUS_SUCCESS - on success.
XMC_LEDTS_STATUS_RUNNING - LEDTS module currently active. Refer XMC_LEDTS_STATUS_t enum type.
Description
Initializes and configures GLOBCTL register of ledts with configuration data pointed by config.
This API selects clock source (GLOBCTL.CMTR), enables/disables auto scan sync(GLOBCTL.ENSYNC) & suspend config(GLOBCTL.SUSCFG).
Call this API to initialize global register fields common to both LED and touch-sense(TS).
Note
LEDTS should be stopped by using XMC_LEDTS_StopCounter()before calling this API.
Related API's
XMC_LEDTS_StopCounter()
XMC_LEDTS_STATUS_t XMC_LEDTS_InitLED | ( | XMC_LEDTS_t *const | ledts,
 |  | const XMC_LEDTS_LED_CONFIG_t * | config
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
config Pointer to constant LEDTS LED configuration structure. Refer XMC_LEDTS_LED_CONFIG_t data structure.
Returns
XMC_LEDTS_STATUS_SUCCESS - on success.
XMC_LEDTS_STATUS_RUNNING - LEDTS module currently active/running. Refer XMC_LEDTS_STATUS_t enum type.
Description
Configures FNCTL register of ledts with configuration data pointed by config and enables LED functionality.
This API sets number of LED columns(FNCTL.NR_LEDCOL), column level(FNCTL.COLLEV) and enables LED functionality(GLOBCTL.LD_EN).
Call this API to Configure FNCTL & GLOBCTL registers for LED-driving function. Global initialization of LEDTS module should be done by calling XMC_LEDTS_InitGlobal() prior to calling this API.
Note
LEDTS should be stopped by using XMC_LEDTS_StopCounter() before calling this API.
Related API's
XMC_LEDTS_StopCounter() XMC_LEDTS_InitGlobal()
XMC_LEDTS_STATUS_t XMC_LEDTS_InitTSAdvanced | ( | XMC_LEDTS_t *const | ledts,
 |  | const XMC_LEDTS_TS_CONFIG_ADVANCED_t * | config
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
config Pointer to constant LEDTS TS advanced configuration structure. Refer XMC_LEDTS_TS_CONFIG_ADVANCED_t data structure.
Returns
XMC_LEDTS_STATUS_SUCCESS - on success.
XMC_LEDTS_STATUS_RUNNING - LEDTS module currently active/running. Refer XMC_LEDTS_STATUS_t enum type.
Description
Configures FNCTL register of ledts for advanced touch sense functionality with configuration data pointed by config.
This API sets number of mask-bits for time frame validation(GLOBCTL.MASKVAL) & first touch input to be active(if pad turn control is set to S/W)(FNCTL.PADT).
Enables/disables time frame interrupt(GLOBCTL.ITF_EN), external pull up on touch pin(FNCTL.EPULL) & H/W or S/W control of pad turn(if set to H/W, touch input activation is done in round-robin sequence, starting from TSIN0) (FNCTL.PADTSW).
Call this API to initialize registers for advanced touch sense function. Before calling this API Call XMC_LEDTS_InitGlobal() to do Global initialization and XMC_LEDTS_InitTSBasic() to do basic init of touch-sense.
Note
LEDTS should be stopped by using XMC_LEDTS_StopCounter() before calling this API.
Related API's
XMC_LEDTS_StopCounter(), XMC_LEDTS_InitTSBasic().
XMC_LEDTS_STATUS_t XMC_LEDTS_InitTSBasic | ( | XMC_LEDTS_t *const | ledts,
 |  | const XMC_LEDTS_TS_CONFIG_BASIC_t * | config
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
config Pointer to constant LEDTS TS basic configuration structure. Refer XMC_LEDTS_TS_CONFIG_BASIC_t data structure.
Returns
XMC_LEDTS_STATUS_SUCCESS - on success.
XMC_LEDTS_STATUS_RUNNING - LEDTS module currently active/running. Refer XMC_LEDTS_STATUS_t enum type.
Description
Configures FNCTL register of ledts for basic touch sense functionality with configuration data pointed by config and enables TS functionality.
This API sets number of touch inputs(FNCTL.NR_TSIN), accumulate count on touch input(FNCTL.ACCCNT).
This API Enables/disables common compare(FNCTL.TSCCMP), TS counter auto reset(FNCTL.TSCTRR), counter saturation(FNCTL.TSCTRSAT) and enables TS functionality(GLOBCTL.TS_EN).
Call this API to configure FNCTL & GLOBCTL registers for basic touch sense function. Global initialization of LEDTS module should be done by calling XMC_LEDTS_InitGlobal() prior to calling this API.
Note
LEDTS should be stopped by using XMC_LEDTS_StopCounter() before calling this API.
Related API's
XMC_LEDTS_StopCounter() XMC_LEDTS_InitGlobal()
uint32_t XMC_LEDTS_ReadFNCOL ( XMC_LEDTS_t *const ledts )
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
Returns
uint32_t Previous active LED column number. Range: 0 to 7.
Description
Returns active LED column number in previous time-slice by reading FNCOL bit field of FNCTL register. Call this API to figure out active column during previous time slice.
uint32_t XMC_LEDTS_ReadInterruptFlag ( XMC_LEDTS_t *const ledts )
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
Returns
Status flags for events. Possible event flags are 0x01(time slice), 0x02(time frame), 0x04(time period), 0x08(TS counter overflow).
Description
Returns interrupt status flag by reading TSF(time slice), TFF(time frame), TPF(time period), TSCTROVF (touch sense counter overflow) fields of EVFR register.
Typically used in interrupt handler to find out which event has triggered the interrupt.
Note
These flags are set on event regardless of corresponding interrupt is enabled or not.
Related API's
XMC_LEDTS_ClearInterruptFlag().
uint16_t XMC_LEDTS_ReadTSVAL ( XMC_LEDTS_t *const ledts )
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
Returns
uint16_t Shadow touch sense counter value. Range: 0H to FFFFH.
Description
Returns latched touch sense counter value by reading the TSCTRVALR field of TSVAL register.
This API is typically called in time frame(TF) event handler to get oscillation count of the touch-sense input active in previous time frame.
Note
This is the latched value of the TS-counter(on every extended time frame event).
Related API's
XMC_LEDTS_ReadInterruptFlag().
void XMC_LEDTS_SetActivePADNo | ( | XMC_LEDTS_t *const | ledts,
 |  | XMC_LEDTS_NUMBER_TS_INPUT_t | pad_num
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
pad_num Pad number. Range refer XMC_LEDTS_NUMBER_TS_INPUT_t enum type.
Returns
None.
Description
Sets TSIN[x] (where x corresponds to active pad number to be set) field of TSIN[x](x = 0-7) .
This is the TSIN[x] pin that is next or currently active in pad turn.
Call this API to set the active pad turn.
Touch sense functionality should be initialized and configured before calling this API.
void XMC_LEDTS_SetColumnBrightness | ( | XMC_LEDTS_t *const | ledts,
 |  | XMC_LEDTS_LED_COLUMN_t | column,
 |  | const uint8_t | brightness
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
column Column number. Range refer XMC_LEDTS_LED_COLUMN_t enum type.
brightness LED brightness level. Range: 0H(min brightness) to FFH(max brightness).
Returns
None.
Description
Programs CMP_LDx (where x denotes column number) field of LDCMPx(x = 0-1)register to the requested brightness level.
The LDCMPx registers hold the COMPARE values for their respective LED columns. These values are used for LED brightness control. Call this API to control brightness level of the LED.
LED functionality should be initialized and configured before calling this API.
void XMC_LEDTS_SetCommonOscillationWindow | ( | XMC_LEDTS_t *const | ledts,
 |  | const uint8_t | common_size
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
common_size Requested common oscillation window width. Range: FFH(min) to 00H.(max)
Returns
None.
Description
Programs the respective LDCMP1 register bit field CMP_LDA_TSCOM with common_size.
Call this API to adjust the size of the common oscillation window to increase/decrease the number of recorded number of oscillation counts for all touch-sense inputs.
void XMC_LEDTS_SetLEDLinePattern | ( | XMC_LEDTS_t *const | ledts,
 |  | XMC_LEDTS_LED_COLUMN_t | column,
 |  | const uint8_t | pattern
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
column Column number. Range refer XMC_LEDTS_LED_COLUMN_t enum type.
pattern Pattern to be displayed. Range: 0H to FFH.
Returns
None.
Description
Sets LINE_x (where x corresponds to column number) field of LINEx(x = 0-1) register to pattern value.
This value is output on LINE_x when LED column x is active.
Call this API to set desired LED pattern.
LED functionality should be initialized and configured before calling this API.
void XMC_LEDTS_SetNumOfLEDColumns | ( | XMC_LEDTS_t *const | ledts,
 |  | uint8_t | count
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure
count Number of LED columns to be enabled. Range: 0 to 7.
Returns
None.
Description
Sets count number of LED columns active by programming NR_LEDCOL bit field of FNCTL register.
Call this API to set desired number of LED columns active.
Note
NR_LEDCOL bit field can only be modified when LEDTS counter is not running, use XMC_LEDTS_StopCounter() to stop LEDTS module before calling this API.
Related API's
XMC_LEDTS_StopCounter().
void XMC_LEDTS_SetOscillationWindow | ( | XMC_LEDTS_t *const | ledts,
 |  | XMC_LEDTS_NUMBER_TS_INPUT_t | touchpad,
 |  | const uint8_t | size
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
touchpad Touch-sense input pad number. Range refer XMC_LEDTS_NUMBER_TS_INPUT_t enum type.
size Requested oscillation window width. Range: 0H(max) to FFH(min).
Returns
None.
Description
Sets the size of touchpad touch sense oscillation window to size.
This API programs the respective CMP_TSx(where x is touchpad number) bit fields of TSCMPx(x = 0-1) register. size value determines the size of the pad oscillation window for each pad input lines during their pad turn.
Call this API to increase/decrease recorded number of oscillation counts for the requested touch-sense input.
void XMC_LEDTS_StartCounter | ( | XMC_LEDTS_t *const | ledts,
 |  | const uint16_t | prescaler
 | ) |  |
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
prescaler Constant prescaler value. Range: 0H to FFFFH.
Returns
None.
Description
Kick-starts the LEDTS module by programming CLK_PS bit field of GLOBCTL register with prescaler value to start the LEDTS-counter.
To set LEDTS counter at least one of the touch-sense or LED function should be enabled. Call this API to start LEDTS counter.
Note
This should be called after all used modules have been initialized.
Related API's
XMC_LEDTS_StopCounter(), XMC_LEDTS_InitLED(), XMC_LEDTS_InitTSBasic(), XMC_LEDTS_InitTSAdvanced().
void XMC_LEDTS_StopCounter ( XMC_LEDTS_t *const ledts )
Parameters
ledts Constant pointer to LEDTS module structure. Refer XMC_LEDTS_GLOBAL_t data structure.
Returns
None.
Description
Stops the LEDTS module by programming the CLK_PS bit field(with value = 0) of GLOBCTL register.
This could be done when it is required to change some module configuration which requires the LEDTS-counter to be stopped before the register bit/bit field can be programmed.
Call this API to stop LEDTS counter.
Related API's
XMC_LEDTS_StartCounter(), XMC_LEDTS_InitLED(), XMC_LEDTS_InitTSBasic(), XMC_LEDTS_InitTSAdvanced().
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_LEDTS_GLOBAL_CONFIG_t Struct Reference

XMC_LEDTS_GLOBAL_CONFIG_t Struct Reference
XMC Peripheral Library » LEDTS

#include <xmc_ledts.h>

Detailed Description

Data structure for initialization of global features common to LED and touch-sense function. Use type XMC_LEDTS_GLOBAL_CONFIG_t for this structure.

Field Documentation

uint32_t autoscan_synchronization

Set this bit to synchronize start of autoscan time period with master kernel(ENSYNC). Refer XMC_LEDTS_TP_SYNC_t enum for possible values.

uint32_t clock_generation

When this bit is set LEDTS counter takes its clock from another master kernel. Kernel generates its own clock when this bit is not set (CMTR). Refer XMC_LEDTS_CLOCK_TYPE_t enum for possible values.

uint32_t suspend_response

Suspend request configuration(SUSCFG). Refer XMC_LEDTS_SUSPEND_t enum for possible values.

The documentation for this struct was generated from the following file:
  • xmc_ledts.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_LEDTS_GLOBAL_t Struct Reference

Data Fields
XMC_LEDTS_GLOBAL_t Struct Reference
XMC Peripheral Library » LEDTS

#include <xmc_ledts.h>

Data Fields

__O uint32_t | EVFR
__IO uint32_t | FNCTL
__IO uint32_t | GLOBCTL
__I uint32_t | ID
__IO uint32_t | LDCMP [2]
__IO uint32_t | LINE [2]
__IO uint32_t | TSCMP [2]
__IO uint32_t | TSVAL

Detailed Description

Defines LEDTS module structure. This holds data and configuration registers of LEDTS modules. Use type XMC_LEDTS_GLOBAL_t for this data structure.

Field Documentation

__O uint32_t EVFR

(@ 0x5002000C) Event Flag Register

__IO uint32_t FNCTL

(@ 0x50020008) Function Control Register

__IO uint32_t GLOBCTL

(@ 0x50020004) Global Control Register

__I uint32_t ID

< (@ 0x50020000) LEDTS Structure (@ 0x50020000) Module Identification Register

__IO uint32_t LDCMP[2]

(@ 0x5002001C) LED Compare Register 0

__IO uint32_t LINE[2]

(@ 0x50020014) Line Pattern Register 0

__IO uint32_t TSCMP[2]

(@ 0x50020024) Touch-sense Compare Register 0

__IO uint32_t TSVAL

(@ 0x50020010) Touch-sense TS-Counter Value

The documentation for this struct was generated from the following file:
  • xmc_ledts.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_LEDTS_LED_CONFIG_t Struct Reference

XMC_LEDTS_LED_CONFIG_t Struct Reference
XMC Peripheral Library » LEDTS

#include <xmc_ledts.h>

Detailed Description

Data structure for LED function initialization. Use type XMC_LEDTS_LED_CONFIG_t for this structure.

Field Documentation

uint32_t column_active_level

When this bit is set LED column level is active high, otherwise column level is active low(COLLEV). Refer XMC_LEDTS_ACTIVE_LEVEL_LED_COL_t enum for possible values.

uint32_t no_of_led_columns

Defines number of LED columns(NR_LEDCOL). Range 0 - 7. Refer XMC_LEDTS_NUMBER_LED_COLUMNS_t enum for possible values.

The documentation for this struct was generated from the following file:
  • xmc_ledts.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_LEDTS_TS_CONFIG_ADVANCED_t Struct Reference

XMC_LEDTS_TS_CONFIG_ADVANCED_t Struct Reference
XMC Peripheral Library » LEDTS

#include <xmc_ledts.h>

Detailed Description

Data structure for advanced Touch-Sense function initialization. Use type XMC_LEDTS_TS_CONFIG_ADVANCED_t for this structure.

Field Documentation

uint32_t external_pullup

Disable or enable external pull-up on touch pin(EPULL). Refer XMC_LEDTS_EXT_PULLUP_COLA_t enum for possible values.

uint32_t first_pad_turn

This bit-field denotes TSIN[x] pin on which oscillations are measured currently/next(PADT). Refer XMC_LEDTS_PAD_TURN_t enum for possible values.

uint32_t pad_turn_control

Control pad turn via HW or SW(PADTSW). Refer XMC_LEDTS_PAD_TURN_SW_CONTROL_t enum for possible values.

uint32_t pin_low_extend

This bit extends touch-sense output for pin-low-level configuration for adjustment of oscillation per user system. Refer XMC_LEDTS_EXTEND_TS_OUTPUT_t enum for possible values.

uint32_t time_frame_validation

Disable or enable (extended) time frame validation(FENVAL). when validation fails time frame interrupt is not triggered. Refer XMC_LEDTS_TF_VALIDATION_t enum for possible values.

uint32_t validation_mask

This bit-field defines number of LSB bits to mask for TS counter and shadow TS counter comparison when Time Frame validation is enabled(MASKVAL). Refer XMC_LEDTS_TS_COUNTER_MASK_t enum for possible values.

The documentation for this struct was generated from the following file:
  • xmc_ledts.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_LEDTS_TS_CONFIG_BASIC_t Struct Reference

XMC_LEDTS_TS_CONFIG_BASIC_t Struct Reference
XMC Peripheral Library » LEDTS

#include <xmc_ledts.h>

Detailed Description

Data structure for basic Touch-Sense function initialization. Use type XMC_LEDTS_TS_CONFIG_BASIC_t for this structure.

Field Documentation

uint32_t common_compare

When this bit is set it enables common compare for all touch sense inputs. Disables common compare when not set(TSCCMP). Refer XMC_LEDTS_COMMON_COMPARE_t enum for possible values.

uint32_t counter_auto_reset

When this bit is set TS-counter is automatically reset to 00H on first pad turn of a new touch-sense pin(TSCTRR). Refer XMC_LEDTS_TS_COUNTER_AUTO_RESET_t enum for possible values.

uint32_t counter_saturation

When this bit is set TS-counter stops counting in the touch-sense time slice of the same frame when it reaches FFH (TSCTRSAT). Refer XMC_LEDTS_TS_COUNTER_SATURATION_t enum for possible values.

uint32_t no_of_accumulation

Defines number of times touch-sense input pin is enabled in touch-sense time slice of consecutive frames(ACCCNT). Range 0 - 15. Refer XMC_LEDTS_ACCUMULATION_COUNT_t enum type for possible values.

uint32_t no_of_touch_inputs

Defines number of touch-sense inputs (NR_TSIN). Range 0 - 7. Refer XMC_LEDTS_NUMBER_TS_INPUT_t enum for possible values.

The documentation for this struct was generated from the following file:
  • xmc_ledts.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: MATH

Macros | Functions
MATH
XMC Peripheral Library

Macros

#define | XMC_MATH_Q0_11(x) ((XMC_MATH_Q0_11_t)(((x) >= 0) ? ((x) * (1 << 11) + 0.5) : ((x) * (1 << 11) - 0.5)))
#define | XMC_MATH_Q0_23(x) ((XMC_MATH_Q0_23_t)(((x) >= 0) ? ((x) * (1 << 23) + 0.5) : ((x) * (1 << 23) - 0.5)))

Functions

void | XMC_MATH_ClearEvent (const XMC_MATH_EVENT_t event)
XMC_MATH_Q0_23_t | XMC_MATH_CORDIC_ArcTan (XMC_MATH_Q8_15_t x, XMC_MATH_Q8_15_t y)
void | XMC_MATH_CORDIC_ArcTanNB (XMC_MATH_Q8_15_t x, XMC_MATH_Q8_15_t y)
XMC_MATH_Q0_23_t | XMC_MATH_CORDIC_Cos (XMC_MATH_Q0_23_t angle_in_radians)
XMC_MATH_Q1_22_t | XMC_MATH_CORDIC_Cosh (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_CORDIC_CoshNB (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_CORDIC_CosNB (XMC_MATH_Q0_23_t angle_in_radians)
XMC_MATH_Q0_23_t | XMC_MATH_CORDIC_GetArcTanResult (void)
XMC_MATH_Q1_22_t | XMC_MATH_CORDIC_GetCoshResult (void)
XMC_MATH_Q0_23_t | XMC_MATH_CORDIC_GetCosResult (void)
XMC_MATH_Q1_22_t | XMC_MATH_CORDIC_GetSinhResult (void)
XMC_MATH_Q0_23_t | XMC_MATH_CORDIC_GetSinResult (void)
XMC_MATH_Q0_11_t | XMC_MATH_CORDIC_GetTanhResult (void)
XMC_MATH_Q0_11_t | XMC_MATH_CORDIC_GetTanResult (void)
bool | XMC_MATH_CORDIC_IsBusy (void)
int16_t | XMC_MATH_CORDIC_Q15_Sqrt (int16_t x)
int32_t | XMC_MATH_CORDIC_Q31_Sqrt (int32_t x)
XMC_MATH_Q0_23_t | XMC_MATH_CORDIC_Sin (XMC_MATH_Q0_23_t angle_in_radians)
XMC_MATH_Q1_22_t | XMC_MATH_CORDIC_Sinh (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_CORDIC_SinhNB (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_CORDIC_SinNB (XMC_MATH_Q0_23_t angle_in_radians)
XMC_MATH_Q0_11_t | XMC_MATH_CORDIC_Tan (XMC_MATH_Q0_23_t angle_in_radians)
XMC_MATH_Q0_11_t | XMC_MATH_CORDIC_Tanh (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_CORDIC_TanhNB (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_CORDIC_TanNB (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_Disable (void)
void | XMC_MATH_DisableEvent (const XMC_MATH_EVENT_t event)
int32_t | XMC_MATH_DIV_GetSignedDivResult (void)
int32_t | XMC_MATH_DIV_GetSignedModResult (void)
uint32_t | XMC_MATH_DIV_GetUnsignedDivResult (void)
uint32_t | XMC_MATH_DIV_GetUnsignedModResult (void)
bool | XMC_MATH_DIV_IsBusy (void)
void | XMC_MATH_DIV_SignedDivNB (int32_t dividend, int32_t divisor)
void | XMC_MATH_DIV_SignedModNB (int32_t dividend, int32_t divisor)
void | XMC_MATH_DIV_UnsignedDivNB (uint32_t dividend, uint32_t divisor)
void | XMC_MATH_DIV_UnsignedModNB (uint32_t dividend, uint32_t divisor)
void | XMC_MATH_Enable (void)
void | XMC_MATH_EnableEvent (const XMC_MATH_EVENT_t event)
bool | XMC_MATH_GetEventStatus (const XMC_MATH_EVENT_t event)
void | XMC_MATH_SetEvent (const XMC_MATH_EVENT_t event)

Detailed Description

The MATH Coprocessor (MATH) module comprises of two independent sub-blocks to support the CPU in math-intensive computations: a Divider Unit (DIV) for signed and unsigned 32-bit division operations and a CORDIC (COrdinate Rotation DIgital Computer) Coprocessor for computation of trigonometric, linear or hyperbolic functions.

MATH driver features:

  1. CORDIC Coprocessor is used for computation of trigonometric and hyperbolic functions
  2. Supports result chaining between the Divider Unit and CORDIC Coprocessor
  3. All MATH APIs are available in Blocking and non-blocking modes. Non-blocking APIs are suffixed with NB.
  4. 32bit signed and unsigned division implementations available for __aeabi_uidiv(), __aeabi_idiv(), __aeabi_uidivmod(), __aeabi_idivmod()
  5. Divider and CORDIC unit busy status can be checked by XMC_MATH_DIV_IsBusy() and XMC_MATH_CORDIC_IsBusy()
  6. Individual APIs available to return the result of each non-blocking MATH function

Note:
All non-blocking MATH APIs are not atomic and hence occurence of interrupts during the normal execution of these APIs may lead to erroneous results. User has to exercise caution while using these APIs.

Example: Execution of divide instruction (/) in an ISR during the normal execution of non-blocking APIs may give erroneous results.

Macro Definition Documentation

#define XMC_MATH_Q0_11 ( x ) ((XMC_MATH_Q0_11_t)(((x) >= 0) ? ((x) * (1 << 11) + 0.5) : ((x) * (1 << 11) - 0.5)))

Converts the given number to XMC_MATH_Q0_11_t format

#define XMC_MATH_Q0_23 ( x ) ((XMC_MATH_Q0_23_t)(((x) >= 0) ? ((x) * (1 << 23) + 0.5) : ((x) * (1 << 23) - 0.5)))

Converts the given number to XMC_MATH_Q0_23_t format

Enumeration Type Documentation

enum XMC_MATH_CORDIC_CORDXRC_t

CORDX Register Result Chaining.

Enumerator
XMC_MATH_CORDIC_CORDXRC_DISABLED | No result chaining is selected
XMC_MATH_CORDIC_CORDXRC_QUOT_IS_SOURCE | QUOT register is the selected source
XMC_MATH_CORDIC_CORDXRC_RMD_IS_SOURCE | RMD register is the selected source
enum XMC_MATH_CORDIC_CORDYRC_t

CORDY Register Result Chaining.

Enumerator
XMC_MATH_CORDIC_CORDYRC_DISABLED | No result chaining is selected
XMC_MATH_CORDIC_CORDYRC_QUOT_IS_SOURCE | QUOT register is the selected source
XMC_MATH_CORDIC_CORDYRC_RMD_IS_SOURCE | RMD register is the selected source
enum XMC_MATH_CORDIC_CORDZRC_t

CORDZ Register Result Chaining.

Enumerator
XMC_MATH_CORDIC_CORDZRC_DISABLED | No result chaining is selected
XMC_MATH_CORDIC_CORDZRC_QUOT_IS_SOURCE | QUOT register is the selected source
XMC_MATH_CORDIC_CORDZRC_RMD_IS_SOURCE | RMD register is the selected source
enum XMC_MATH_CORDIC_MAGNITUDE_t

Calculated value of CORRX and CORRY are each divided by this factor to yield the result.

Enumerator
XMC_MATH_CORDIC_MAGNITUDE_DIVBY1 | Divide by 1
XMC_MATH_CORDIC_MAGNITUDE_DIVBY2 | Divide by 2
XMC_MATH_CORDIC_MAGNITUDE_DIVBY4 | Divide by 4
enum XMC_MATH_CORDIC_OPERATING_MODE_t

CORDIC operating mode.

Enumerator
XMC_MATH_CORDIC_OPERATING_MODE_LINEAR | Linear mode
XMC_MATH_CORDIC_OPERATING_MODE_CIRCULAR | Circular mode
XMC_MATH_CORDIC_OPERATING_MODE_HYPERBOLIC | Hyperbolic mode
enum XMC_MATH_CORDIC_ROTVEC_MODE_t

Rotation vectoring selection.

Enumerator
XMC_MATH_CORDIC_ROTVEC_MODE_VECTORING | Vectoring mode
XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION | Rotation mode
enum XMC_MATH_DIV_DVDRC_t

Dividend Register Result Chaining.

Enumerator
XMC_MATH_DIV_DVDRC_DISABLED | No result chaining is selected
XMC_MATH_DIV_DVDRC_QUOT_IS_SOURCE | QUOT register is the selected source
XMC_MATH_DIV_DVDRC_RMD_IS_SOURCE | RMD register is the selected source
XMC_MATH_DIV_DVDRC_CORRX_IS_SOURCE | CORRX is the selected source
XMC_MATH_DIV_DVDRC_CORRY_IS_SOURCE | CORRY is the selected source
XMC_MATH_DIV_DVDRC_CORRZ_IS_SOURCE | CORRZ is the selected source
enum XMC_MATH_DIV_DVSRC_t

Divisor Register Result Chaining.

Enumerator
XMC_MATH_DIV_DVSRC_DISABLED | No result chaining is selected
XMC_MATH_DIV_DVSRC_QUOT_IS_SOURCE | QUOT register is the selected source
XMC_MATH_DIV_DVSRC_RMD_IS_SOURCE | RMD register is the selected source
XMC_MATH_DIV_DVSRC_CORRX_IS_SOURCE | CORRX is the selected source
XMC_MATH_DIV_DVSRC_CORRY_IS_SOURCE | CORRY is the selected source
XMC_MATH_DIV_DVSRC_CORRZ_IS_SOURCE | CORRZ is the selected source
enum XMC_MATH_EVENT_t

Service request events for the DIV and CORDIC modules.

Enumerator
XMC_MATH_EVENT_DIV_END_OF_CALC | Divider end of calculation event
XMC_MATH_EVENT_DIV_ERROR | Divider error event
XMC_MATH_EVENT_CORDIC_END_OF_CALC | CORDIC end of calculation event
XMC_MATH_EVENT_CORDIC_ERROR | CORDIC error event

Function Documentation

void XMC_MATH_ClearEvent ( const XMC_MATH_EVENT_t event )
Parameters
event Event of type XMC_MATH_EVENT_t
Returns
None
Description:
Clears the requested event.
DIV & CORDIC unit's event (end of calculation & error) is cleared by setting bit-fields of EVFCR register.
Related APIs:
XMC_MATH_SetEvent()

XMC_MATH_Q0_23_t XMC_MATH_CORDIC_ArcTan | ( | XMC_MATH_Q8_15_t | x,
 |  | XMC_MATH_Q8_15_t | y
 | ) |  |
Parameters
x | Value representing the proportion of the x-coordinate (XMC_MATH_Q8_15_t format)
y | Value representing the proportion of the y-coordinate (XMC_MATH_Q8_15_t format)
Returns
XMC_MATH_Q0_23_t
Description:
Computes the principal value arc tangent of an angle of y/x expressed in radians. The input radians must be in XMC_MATH_Q8_15_t format.
This function programs CORDIC as circular mode. CORDY register is programmed with input y and CORDX register is programmed with input x. Most significant 24 bits of CORRZ register returns the result of the operation.
Note:
Loading of CORDX register triggers the start of computation.
void XMC_MATH_CORDIC_ArcTanNB | ( | XMC_MATH_Q8_15_t | x,
 |  | XMC_MATH_Q8_15_t | y
 | ) |  |
Parameters
x | Value representing the proportion of the x-coordinate (XMC_MATH_Q8_15_t format)
y | Value representing the proportion of the y-coordinate (XMC_MATH_Q8_15_t format)
Returns
None
Description:
Computes the principal value arc tangent of an angle of y/x expressed in radians. The input radians must be in XMC_MATH_Q8_15_t format. Call XMC_MATH_CORDIC_GetArcTanResult() API to get the result.
This function programs CORDIC as circular mode. CORDY register is programmed with input y and CORDX register is programmed with input x.
Note:
Loading of CORDX register triggers the start of computation.
Related APIs:
XMC_MATH_CORDIC_GetArcTanResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()

XMC_MATH_Q0_23_t XMC_MATH_CORDIC_Cos ( XMC_MATH_Q0_23_t angle_in_radians )
Parameters
angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format)
Returns
XMC_MATH_Q0_23_t
Description:
Computes the cosine for an angle in radians angle_in_radians. The input angle in radians must be in XMC_MATH_Q0_23_t format.
This function programs CORDIC to rotation & circular mode. Configures CORDZ register with input angle_in_radians and CORDX register with gain XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023. Most significant 24 bits of CORRX register returns the result of the operation.
Note:
Loading of CORDX register triggers the start of computation.
Related APIs:
XMC_MATH_CORDIC_Sin(), XMC_MATH_CORDIC_Tan()

XMC_MATH_Q1_22_t XMC_MATH_CORDIC_Cosh ( XMC_MATH_Q0_23_t angle_in_radians )
Parameters
angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format)
Returns
XMC_MATH_Q1_22_t
Description:
Computes the hyperbolic cosine for an angle in radians angle_in_radians. The input angle in radians must be in XMC_MATH_Q0_23_t format.
This function programs CORDIC to rotation & hyperbolic mode. Configures CORDZ register with input angle_in_radians and CORDX register with gain XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22. Most significant 24 bits of CORRX register returns the result of the operation.
Note:
Loading of CORDX register triggers the start of computation.
Related APIs:
XMC_MATH_CORDIC_Sinh(), XMC_MATH_CORDIC_Tanh()

void XMC_MATH_CORDIC_CoshNB ( XMC_MATH_Q0_23_t angle_in_radians )
Parameters
angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format)
Returns
None
Description:
Computes the hyperbolic cosine for an angle in radians angle_in_radians. The input angle in radians must be in XMC_MATH_Q0_23_t format. Call XMC_MATH_CORDIC_GetCoshResult() API to get the result.
This function programs CORDIC to rotation & hyperbolic mode. Configures CORDZ register with input angle_in_radians and CORDX register with gain XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22.
Note:
Loading of CORDX register triggers the start of computation.
Related APIs:
XMC_MATH_CORDIC_GetCoshResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()

void XMC_MATH_CORDIC_CosNB ( XMC_MATH_Q0_23_t angle_in_radians )
Parameters
angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format)
Returns
None
Description:
Computes the cosine for an angle in radians angle_in_radians. The input angle in radians must be in XMC_MATH_Q0_23_t format. Call XMC_MATH_CORDIC_GetCosResult() API to get the result.
This function programs CORDIC to rotation & circular mode. Configures CORDZ register with input angle_in_radians and CORDX register with gain XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023.
Note:
Loading of CORDX register triggers the start of computation.
Related APIs:
XMC_MATH_CORDIC_GetCosResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()

XMC_MATH_Q0_23_t XMC_MATH_CORDIC_GetArcTanResult ( void )
Returns
XMC_MATH_Q0_23_t
Description:
Returns result of a Arc Tangent operation.
Most significant 24 bits of CORRZ register returns the result of Arc Tangent operation.
Related APIs:
XMC_MATH_CORDIC_ArcTanNB()

XMC_MATH_Q1_22_t XMC_MATH_CORDIC_GetCoshResult ( void )
Returns
XMC_MATH_Q1_22_t
Description:
Returns result of a Hyperbolic Cosine operation.
Most significant 24 bits of CORRX register returns the result of Hyperbolic Cosine operation.
Related APIs:
XMC_MATH_CORDIC_CoshNB()

XMC_MATH_Q0_23_t XMC_MATH_CORDIC_GetCosResult ( void )
Returns
XMC_MATH_Q0_23_t
Description:
Returns result of a Cosine operation.
Most significant 24 bits of CORRX register returns the result of Cosine operation.
Related APIs:
XMC_MATH_CORDIC_CosNB()

XMC_MATH_Q1_22_t XMC_MATH_CORDIC_GetSinhResult ( void )
Returns
XMC_MATH_Q1_22_t
Description:
Returns result of a Hyperbolic Sine operation.
Most significant 24 bits of CORRY register returns the result of Hyperbolic Sine operation.
Related APIs:
XMC_MATH_CORDIC_SinhNB()

XMC_MATH_Q0_23_t XMC_MATH_CORDIC_GetSinResult ( void )
Returns
XMC_MATH_Q0_23_t
Description:
Returns result of a Sine operation.
Most significant 24 bits of CORRY register returns the result of Sine operation.
Related APIs:
XMC_MATH_CORDIC_SinNB()

XMC_MATH_Q0_11_t XMC_MATH_CORDIC_GetTanhResult ( void )
Returns
XMC_MATH_Q0_11_t
Description:
Returns result of a Hyperbolic Tangent operation.
QUOT register returns the result of Hyperbolic Tangent operation.
Related APIs:
XMC_MATH_CORDIC_TanhNB()

XMC_MATH_Q0_11_t XMC_MATH_CORDIC_GetTanResult ( void )
Returns
XMC_MATH_Q0_11_t
Description:
Returns result of a Tangent operation.
QUOT register returns the result of Tangent operation.
Related APIs:
XMC_MATH_CORDIC_TanNB()

bool XMC_MATH_CORDIC_IsBusy ( void )
Returns
bool
true - if CORDIC unit is busy
false - if CORDIC unit is not busy
Description:
Utility function to check if the DIV unit is busy.
CORDIC coprocessor's status is determined by reading BSY bit of STATC register.
int16_t XMC_MATH_CORDIC_Q15_Sqrt ( int16_t x )
Parameters
x - Value whose square root is computed
Returns
Square root of x
Description:
Computes square root of Q15 number
Note:
x > 0
int32_t XMC_MATH_CORDIC_Q31_Sqrt ( int32_t x )
Parameters
x - Value whose square root is computed
Returns
Square root of x
Description:
Computes square root of Q31 number
Note:
x > 0
XMC_MATH_Q0_23_t XMC_MATH_CORDIC_Sin ( XMC_MATH_Q0_23_t angle_in_radians )
Parameters
angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format)
Returns
XMC_MATH_Q0_23_t
Description:
Computes the sine for an angle in radians angle_in_radians. The input angle in radians must be in XMC_MATH_Q0_23_t format.
This function programs CORDIC to rotation & circular mode. Configures CORDZ register with input angle_in_radians and CORDX register with gain XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023. Most significant 24 bits of CORRY register returns the result of the operation.
Note:
Loading of CORDX register triggers the start of computation.
Related APIs:
XMC_MATH_CORDIC_Cos(), XMC_MATH_CORDIC_Tan()

XMC_MATH_Q1_22_t XMC_MATH_CORDIC_Sinh ( XMC_MATH_Q0_23_t angle_in_radians )
Parameters
angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format)
Returns
XMC_MATH_Q1_22_t
Description:
Computes the hyperbolic sine for an angle in radians angle_in_radians. The input angle in radians must be in XMC_MATH_Q0_23_t format.
This function programs CORDIC to rotation & hyperbolic mode. Configures CORDZ register with input angle_in_radians and CORDX register with gain XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22. Most significant 24 bits of CORRY register returns the result of the operation.
Note:
Loading of CORDX register triggers the start of computation.
Related APIs:
XMC_MATH_CORDIC_Cosh(), XMC_MATH_CORDIC_Tanh()

void XMC_MATH_CORDIC_SinhNB ( XMC_MATH_Q0_23_t angle_in_radians )
Parameters
angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format)
Returns
None
Description:
Computes the hyperbolic sine for an angle in radians angle_in_radians. The input angle in radians must be in XMC_MATH_Q0_23_t format. Call XMC_MATH_CORDIC_GetSinhResult() API to get the result.
This function programs CORDIC to rotation & hyperbolic mode. Configures CORDZ register with input angle_in_radians and CORDX register with gain XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22.
Note:
Loading of CORDX register triggers the start of computation.
Related APIs:
XMC_MATH_CORDIC_GetSinhResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()

void XMC_MATH_CORDIC_SinNB ( XMC_MATH_Q0_23_t angle_in_radians )
Parameters
angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format)
Returns
None
Description:
Computes the sine for an angle in radians angle_in_radians. The input angle in radians must be in XMC_MATH_Q0_23_t format. Call XMC_MATH_CORDIC_GetSinResult() API to get the result.
This function programs CORDIC to rotation & circular mode. Configures CORDZ register with input angle_in_radians and CORDX register with gain XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023.
Note:
Loading of CORDX register triggers the start of computation.
Related APIs:
XMC_MATH_CORDIC_GetSinResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()

XMC_MATH_Q0_11_t XMC_MATH_CORDIC_Tan ( XMC_MATH_Q0_23_t angle_in_radians )
Parameters
angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format)
Returns
XMC_MATH_Q0_11_t
Description:
Computes the tangent for an angle in radians angle_in_radians. The input angle in radians must be in XMC_MATH_Q0_23_t format.
This function programs CORDIC to rotation & circular mode. Chains the results of Cosine (CORRX) and Sine (CORRY) as a dividend and divisor by configuring GLBCON register. CORDZ register is programmed with input angle_in_radians and CORDX register with gain XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023. Most significant 24 bits of CORRY register returns the result of the operation.
Note:
Loading of CORDX register triggers the start of computation.
Related APIs:
XMC_MATH_CORDIC_Sin(), XMC_MATH_CORDIC_Cos()

XMC_MATH_Q0_11_t XMC_MATH_CORDIC_Tanh ( XMC_MATH_Q0_23_t angle_in_radians )
Parameters
angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format)
Returns
XMC_MATH_Q0_11_t
Description:
Computes the hyperbolic tangent for an angle in radians angle_in_radians. The input angle in radians must be in XMC_MATH_Q0_23_t format.
This function programs CORDIC to rotation & hyperbolic mode. Chains the results of Cosine (CORRX) and Sine (CORRY) as a dividend and divisor by configuring GLBCON register. CORDZ register is programmed with input angle_in_radians and CORDX register with gain XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22. QUOT register returns the result of the operation.
Note:
Loading of CORDX register triggers the start of computation.
Related APIs:
XMC_MATH_CORDIC_Sinh(), XMC_MATH_CORDIC_Cosh()()

void XMC_MATH_CORDIC_TanhNB ( XMC_MATH_Q0_23_t angle_in_radians )
Parameters
angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format)
Returns
None
Description:
Computes the hyperbolic tangent for an angle in radians angle_in_radians. The input angle in radians must be in XMC_MATH_Q0_23_t format. Call XMC_MATH_CORDIC_GetTanhResult() API to get the result.
This function programs CORDIC to rotation & hyperbolic mode. Chains the results of Cosine (CORRX) and Sine (CORRY) as a dividend and divisor by configuring GLBCON register. CORDZ register is programmed with input angle_in_radians and CORDX register with gain XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22.
Note:
Loading of CORDX register triggers the start of computation.
Related APIs:
XMC_MATH_CORDIC_GetTanhResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()

void XMC_MATH_CORDIC_TanNB ( XMC_MATH_Q0_23_t angle_in_radians )
Parameters
angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format)
Returns
None
Description:
Computes the tangent for an angle in radians angle_in_radians. The input angle in radians must be in XMC_MATH_Q0_23_t format. Call XMC_MATH_CORDIC_GetTanResult() API to get the result.
This function programs CORDIC to rotation & circular mode. Chains the results of Cosine (CORRX) and Sine (CORRY) as a dividend and divisor by configuring GLBCON register. CORDZ register is programmed with input angle_in_radians and CORDX register with gain XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023.
Note:
Loading of CORDX register triggers the start of computation.
Related APIs:
XMC_MATH_CORDIC_GetTanResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()

void XMC_MATH_Disable ( void )
Returns
None
Description:
Disables the Math module by gating the clock.
MATH coprocessor's clock is disabled by setting MATH bit of CGATSET0 register.
Related APIs:
XMC_MATH_Disable()

void XMC_MATH_DisableEvent ( const XMC_MATH_EVENT_t event )
Parameters
event Event of type XMC_MATH_EVENT_t
Returns
None
Description:
Disables the requested event.
DIV & CORDIC unit's event (end of calculation & error) is disabled by clearing bit-fields of EVIER register.
Related APIs:
XMC_MATH_GetEventStatus(), XMC_MATH_EnableEvent()

int32_t XMC_MATH_DIV_GetSignedDivResult ( void )
Returns
int32_t
Description:
Returns result of a Signed Division operation.
QUOT register returns the result of Signed Division operation.
Related APIs:
XMC_MATH_DIV_SignedDivNB()

int32_t XMC_MATH_DIV_GetSignedModResult ( void )
Returns
int32_t
Description:
Returns result of a Signed Modulo operation.
RMD register returns the result of Signed Modulo operation.
Related APIs:
XMC_MATH_DIV_SignedModNB()

uint32_t XMC_MATH_DIV_GetUnsignedDivResult ( void )
Returns
uint32_t
Description:
Returns result of a Unsigned Division operation.
QUOT register returns the result of Unsigned Division operation.
Related APIs:
XMC_MATH_DIV_UnsignedDivNB()

uint32_t XMC_MATH_DIV_GetUnsignedModResult ( void )
Returns
uint32_t
Description:
Returns result of a Unsigned Modulo operation.
RMD register returns the result of Unsigned Modulo operation.
Related APIs:
XMC_MATH_DIV_UnsignedModNB()

bool XMC_MATH_DIV_IsBusy ( void )
Returns
bool
true - if DIV unit is busy false - if DIV unit is not busy
Description:
Utility function to check if the DIV unit is busy.
Divider unit status is determined by reading BSY bit of DIVST register.
void XMC_MATH_DIV_SignedDivNB | ( | int32_t | dividend,
 |  | int32_t | divisor
 | ) |  |
Parameters
dividend | - Dividend
divisor | - Divisor
Returns
None
Description:
Performs signed integer division and computes quotient of the division. Call XMC_MATH_DIV_GetSignedDivResult() API to get the result.
Divider unit is configured for signed division. DVD & DVS registers are programmed with dividend and divisor values. The division is started with the write to DVS register.
Note:
Ensure divisor is smaller than dividend.
Related APIs:
XMC_MATH_DIV_GetSignedDivResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()

void XMC_MATH_DIV_SignedModNB | ( | int32_t | dividend,
 |  | int32_t | divisor
 | ) |  |
Parameters
dividend | - Dividend
divisor | - Divisor
Returns
None
Description:
Performs signed modulo operation and computes remainder of the division. Call XMC_MATH_DIV_GetSignedModResult() API to get the result.
Divider unit is configured for signed division. DVD & DVS registers are programmed with dividend and divisor values. The division is started with the write to DVS register.
Note:
Ensure divisor is smaller than dividend.
Related APIs:
XMC_MATH_DIV_GetSignedModResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()

void XMC_MATH_DIV_UnsignedDivNB | ( | uint32_t | dividend,
 |  | uint32_t | divisor
 | ) |  |
Parameters
dividend | - Dividend
divisor | - Divisor
Returns
None
Description:
Performs unsigned integer division and computes quotient of the division. Call XMC_MATH_DIV_GetUnsignedDivResult() API to get the result.
Divider unit is configured for unsigned division. DVD & DVS registers are programmed with dividend and divisor values. The division is started with the write to DVS register.
Note:
Ensure divisor is smaller than dividend.
Related APIs:
XMC_MATH_DIV_GetUnsignedDivResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()

void XMC_MATH_DIV_UnsignedModNB | ( | uint32_t | dividend,
 |  | uint32_t | divisor
 | ) |  |
Parameters
dividend | - Dividend
divisor | - Divisor
Returns
None
Description:
Performs unsigned modulo operation and computes remainder of the division. Call XMC_MATH_DIV_GetUnsignedModResult() API to get the result.
Divider unit is configured for unsigned division. DVD & DVS registers are programmed with dividend and divisor values. The division is started with the write to DVS register.
Note:
Ensure divisor is smaller than dividend.
Related APIs:
XMC_MATH_DIV_GetUnsignedModResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()

void XMC_MATH_Enable ( void )
Returns
None
Description:
Enables the Math module by un-gating the clock.
MATH coprocessor's clock is enabled by setting MATH bit of CGATCLR0 register.
Related APIs:
XMC_MATH_Disable()

void XMC_MATH_EnableEvent ( const XMC_MATH_EVENT_t event )
Parameters
event Event of type XMC_MATH_EVENT_t
Returns
None
Description:
Enables the requested event.
DIV & CORDIC unit's event (end of calculation & error) is enabled by setting bit-fields of EVIER register.
Related APIs:
XMC_MATH_GetEventStatus(), XMC_MATH_DisableEvent()

bool XMC_MATH_GetEventStatus ( const XMC_MATH_EVENT_t event )
Parameters
event Event of type XMC_MATH_EVENT_t
Returns
bool
true - if status is set
false - if status is not set
Description:
Returns the status of the requested event.
Status of DIV & CORDIC unit's event (end of calculation & error) status is determined by reading EVFR register.
Related APIs:
XMC_MATH_EnableEvent(), XMC_MATH_DisableEvent(), XMC_MATH_SetEvent(), XMC_MATH_ClearEvent()

void XMC_MATH_SetEvent ( const XMC_MATH_EVENT_t event )
Parameters
event Event of type XMC_MATH_EVENT_t
Returns
None
Description:
Sets the requested event. This is a software setting for the event.
DIV & CORDIC unit's event (end of calculation & error) is set by setting bit-fields of EVFSR register.
Related APIs:
XMC_MATH_ClearEvent()

Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: PAU

Data Structures | Macros | Enumerations | Functions
PAU
XMC Peripheral Library

Data Structures

struct XMC_PAU_t

Macros

#define XMC_PAU ((XMC_PAU_t *) PAU_BASE)

Enumerations

Functions

void | XMC_PAU_DisablePeripheralAccess (XMC_PAU_PERIPHERAL_t peripheral)
void | XMC_PAU_EnablePeripheralAccess (XMC_PAU_PERIPHERAL_t peripheral)
uint32_t | XMC_PAU_GetFlashSize (void)
uint32_t | XMC_PAU_GetRAMSize (void)
uint32_t | XMC_PAU_GetROMSize (void)
bool | XMC_PAU_IsPeripheralAccessEnabled (XMC_PAU_PERIPHERAL_t peripheral)
bool | XMC_PAU_IsPeripheralAvailable (XMC_PAU_PERIPHERAL_t peripheral)

Detailed Description

The Peripheral Access Unit (PAU) supports access control of memories and peripherals. It allows user application to enable/disable the access to the registers of a peripheral. It generates a HardFault exception when there is an access to a disabled or unassigned address location. It also provides information on the availability of peripherals and sizes of memories.

The PAU low level driver provides functions to check the availability of peripherals and to enable/disable peripheral access.

Macro Definition Documentation

#define XMC_PAU ((XMC_PAU_t *) PAU_BASE)

A convenient symbol for the PAU peripheral base address

Enumeration Type Documentation

enum XMC_PAU_PERIPHERAL_t

PAU peripheral select

Enumerator
XMC_PAU_PERIPHERAL_FLASH | Flash SFRs Privilege Disable Flag
XMC_PAU_PERIPHERAL_RAM_BLOCK1 | RAM Block 1 Privilege Disable Flag
XMC_PAU_PERIPHERAL_RAM_BLOCK2 | RAM Block 2 Privilege Disable Flag
XMC_PAU_PERIPHERAL_RAM_BLOCK3 | RAM Block 3 Privilege Disable Flag
XMC_PAU_PERIPHERAL_MATH_GLOBAL_AND_DIV | MATH Global SFRs and Divider Privilege Disable Flag
XMC_PAU_PERIPHERAL_MATH_CORDIC | MATH CORDIC Privilege Disable Flag
XMC_PAU_PERIPHERAL_USIC0_CH0 | USIC0 Channel 0 Privilege Disable Flag
XMC_PAU_PERIPHERAL_USIC0_CH1 | USIC0 Channel 1 Privilege Disable Flag
XMC_PAU_PERIPHERAL_USIC1_CH0 | USIC1 Channel 0 Privilege Disable Flag
XMC_PAU_PERIPHERAL_USIC1_CH1 | USIC1 Channel 1 Privilege Disable Flag
XMC_PAU_PERIPHERAL_PRNG | PRNG Availability Flag
XMC_PAU_PERIPHERAL_CCU40_CC40_AND_GLOBAL | CCU40_CC40 and CCU40 Kernel SFRs Privilege Disable Flag
XMC_PAU_PERIPHERAL_CCU41_CC40_AND_GLOBAL | CCU41_CC40 and CCU41 Kernel SFRs Privilege Disable Flag
XMC_PAU_PERIPHERAL_CCU80_CC80_AND_GLOBAL | CCU80_CC80 and CCU80 Kernel SFRs Privilege Disable Flag
XMC_PAU_PERIPHERAL_CCU81_CC80_AND_GLOBAL | CCU81_CC80 and CCU81 Kernel SFRs Privilege Disable Flag
XMC_PAU_PERIPHERAL_POSIF0 | POSIF0 Privilege Disable Flag
XMC_PAU_PERIPHERAL_POSIF1 | POSIF1 Privilege Disable Flag
XMC_PAU_PERIPHERAL_LEDTS0 | LEDTS0 Privilege Disable Flag
XMC_PAU_PERIPHERAL_LEDTS1 | LEDTS1 Privilege Disable Flag
XMC_PAU_PERIPHERAL_LEDTS2 | LEDTS2 Privilege Disable Flag
XMC_PAU_PERIPHERAL_BCCU0 | BCCU0 Privilege Disable Flag
XMC_PAU_PERIPHERAL_MCAN_OBJECTS | MCAN Message Objects Privilege Disable Flag
enum XMC_PAU_STATUS_t

Status return values for PAU low level driver

Enumerator
XMC_PAU_STATUS_OK | Operation successful
XMC_PAU_STATUS_BUSY | Busy with a previous request
XMC_PAU_STATUS_ERROR | Operation unsuccessful

Function Documentation

void XMC_PAU_DisablePeripheralAccess ( XMC_PAU_PERIPHERAL_t peripheral )
Parameters
peripheral Peripheral of type XMC_PAU_PERIPHERAL_t for which access needs to be disabled
Returns
None
Description:
Disable the peripheral access
The function sets the PRIVDISx.PDISy bit to disable the access to the registers of a peripheral during run time. An access to a disabled or unassigned address location generates a hardfault exception.
Related APIs:
XMC_PAU_EnablePeripheralAccess()
void XMC_PAU_EnablePeripheralAccess ( XMC_PAU_PERIPHERAL_t peripheral )
Parameters
peripheral Peripheral of type XMC_PAU_PERIPHERAL_t for which access needs to be enabled
Returns
None
Description:
Enable the peripheral access
The function resets the PRIVDISx.PDISy bit to enable the access to the registers of a peripheral during run time.
Related APIs:
XMC_PAU_DisablePeripheralAccess()
uint32_t XMC_PAU_GetFlashSize ( void )
Returns
uint32_t Returns flash size
Description:
Gets the flash size
The function checks the FLSIZE.ADDR bitfield to indicate the available size of FLASH in the device in Kbytes.
uint32_t XMC_PAU_GetRAMSize ( void )
Returns
uint32_t Returns RAM size
Description:
Gets RAM size
The function checks the RAM0SIZE.ADDR bitfield to indicate the available size of RAM in the device in bytes.
uint32_t XMC_PAU_GetROMSize ( void )
Returns
uint32_t Returns ROM size
Description:
Gets the ROM size
The function checks the ROMSIZE.ADDR bitfield to indicate the available size of ROM in the device in bytes.
bool XMC_PAU_IsPeripheralAccessEnabled ( XMC_PAU_PERIPHERAL_t peripheral )
Parameters
peripheral Peripheral of type XMC_PAU_PERIPHERAL_t for which access enabled status to be checked
Returns
bool "false" if peripheral access is enabled, "true" otherwise
Description:
Checks if the peripheral access is enabled or not
The function checks the PRIVDISx.PDISy bit to know whether the access to the registers of a peripheral during run time is enabled or not.
Related APIs:
XMC_PAU_DisablePeripheralAccess(), XMC_PAU_EnablePeripheralAccess()
bool XMC_PAU_IsPeripheralAvailable ( XMC_PAU_PERIPHERAL_t peripheral )
Parameters
peripheral Peripheral of type XMC_PAU_PERIPHERAL_t for which access needs to be disabled
Returns
bool Returns "true" if peripheral is available, "false" otherwise
Description:
Checks if a peripheral is available or not
The function checks the AVAILx.AVAILy bit to know whether the peripheral is available or not for the particular device variant.
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_PAU_t Struct Reference

XMC_PAU_t Struct Reference
XMC Peripheral Library » PAU

#include <xmc_pau.h>

Detailed Description

External Peripheral Access Unit (PAU) device structure

The structure represents a collection of all hardware registers used to configure the PAU peripheral on the XMC microcontroller. The registers can be accessed with XMC_PAU.

The documentation for this struct was generated from the following file:
  • xmc_pau.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: POSIF

Data Structures | Typedefs | Enumerations | Functions
POSIF
XMC Peripheral Library

Data Structures

struct | XMC_POSIF_CONFIG_t
struct | XMC_POSIF_HSC_CONFIG_t
struct | XMC_POSIF_MCM_CONFIG_t
struct | XMC_POSIF_QD_CONFIG_t

Typedefs

typedef POSIF_GLOBAL_TypeDef XMC_POSIF_t

Enumerations

Functions

void | XMC_POSIF_ClearEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
void | XMC_POSIF_Disable (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_DisableEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
void | XMC_POSIF_Enable (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_EnableEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
uint8_t | XMC_POSIF_GetEventStatus (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
uint8_t | XMC_POSIF_HSC_GetCurrentPattern (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_HSC_GetExpectedPattern (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_HSC_GetLastSampledPattern (XMC_POSIF_t *const peripheral)
XMC_POSIF_STATUS_t | XMC_POSIF_HSC_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_HSC_CONFIG_t *const config)
void | XMC_POSIF_HSC_SetCurrentPattern (XMC_POSIF_t *const peripheral, const uint8_t pattern)
void | XMC_POSIF_HSC_SetExpectedPattern (XMC_POSIF_t *const peripheral, const uint8_t pattern)
void | XMC_POSIF_HSC_SetHallPatterns (XMC_POSIF_t *const peripheral, const uint8_t pattern_mask)
void | XMC_POSIF_HSC_UpdateHallPattern (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_CONFIG_t *const config)
bool | XMC_POSIF_IsRunning (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_MCM_EnableMultiChannelPatternUpdate (XMC_POSIF_t *const peripheral)
uint16_t | XMC_POSIF_MCM_GetMultiChannelPattern (XMC_POSIF_t *const peripheral)
uint16_t | XMC_POSIF_MCM_GetShadowMultiChannelPattern (XMC_POSIF_t *const peripheral)
XMC_POSIF_STATUS_t | XMC_POSIF_MCM_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_MCM_CONFIG_t *const config)
void | XMC_POSIF_MCM_SetMultiChannelPattern (XMC_POSIF_t *const peripheral, const uint16_t pattern)
void | XMC_POSIF_MCM_UpdateMultiChannelPattern (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_QD_GetCurrentIndexValue (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_QD_GetCurrentState (XMC_POSIF_t *const peripheral)
XMC_POSIF_QD_DIR_t | XMC_POSIF_QD_GetDirection (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_QD_GetPreviousState (XMC_POSIF_t *const peripheral)
XMC_POSIF_STATUS_t | XMC_POSIF_QD_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_QD_CONFIG_t *const config)
void | XMC_POSIF_SelectInputSource (XMC_POSIF_t *const peripheral, const XMC_POSIF_INPUT_PORT_t input0, const XMC_POSIF_INPUT_PORT_t input1, const XMC_POSIF_INPUT_PORT_t input2)
void | XMC_POSIF_SetEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
void | XMC_POSIF_SetInterruptNode (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event, const XMC_POSIF_SR_ID_t sr)
void | XMC_POSIF_SetMode (XMC_POSIF_t *const peripheral, const XMC_POSIF_MODE_t mode)
void | XMC_POSIF_Start (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_Stop (XMC_POSIF_t *const peripheral)

Detailed Description

The POSIF unit is a flexible and powerful component for motor control systems that use rotary encoders or hall sensors as feedback loop. It provides interface for motor position and velocity measurement. POSIF unit works with CCU4 and CCU8 to enable position and velocity measurement and to control PWM outputs using multi channel pattern.

Driver is divided in three POSIF functional blocks - Hall Sensor Control (POSIF_HSC), Quadrature Decoder (POSIF_QD) and MultiChannel Mode (POSIF_MCM).

POSIF driver features:

  1. Configuration structure XMC_POSIF_CONFIG_t and initialization function XMC_POSIF_Init() to configure global settings
  2. Allows to change the operating mode using XMC_POSIF_SetMode()
  3. Allows the selection of one of the four inputs (A, B, C or D) using XMC_POSIF_SelectInputSource(). In hall sensor control, inputs are hall0, hall1 and hall2 signals. For quadrature decoder mode, inputs are phase A, phase B and index signals.
  4. Hall Sensor Control (APIs prefixed with XMC_POSIF_HSC_)
    • Configuration structure XMC_POSIF_HSC_CONFIG_t and initialization function XMC_POSIF_HSC_Init()
    • Update current and expected hall pattern in shadow register using XMC_POSIF_HSC_SetHallPatterns()
    • Allows immediate shadow transfer using XMC_POSIF_HSC_UpdateHallPattern()
  5. Quadrature Decoder (APIs prefixed with XMC_POSIF_QD_)
    • Configuration structure XMC_POSIF_QD_CONFIG_t and initialization function XMC_POSIF_QD_Init()
    • Get direction of rotation using XMC_POSIF_QD_GetDirection()
  6. MultiChannel Mode (APIs prefixed with XMC_POSIF_MCM_)
    • Configuration structure XMC_POSIF_MCM_CONFIG_t and initialization function XMC_POSIF_MCM_Init()
    • Update multichannel pattern in shadow register using XMC_POSIF_MCM_SetMultiChannelPattern()
    • Allows immediate shadow transfer using XMC_POSIF_MCM_UpdateMultiChannelPattern()
  7. User need to call respective init functions to configure POSIF operating mode. e.g to configure POSIF in hall sensor control with multichannel mode call both XMC_POSIF_HSC_Init() and XMC_POSIF_MCM_Init().
  8. Allows to enable and disable interrupt sources and assign to service request node using XMC_POSIF_EnableEvent(), XMC_POSIF_DisableEvent() and XMC_POSIF_SetInterruptNode()
Note
POSIF is not available on XMC11 and XMC12 devices

Typedef Documentation

typedef POSIF_GLOBAL_TypeDef XMC_POSIF_t

Defines POSIF peripheral register structure.Use type XMC_POSIF_t for this data structure.

Enumeration Type Documentation

enum XMC_POSIF_FILTER_t

Defines POSIF input debounce filter configuration.POSIF inputs are connected to low pass filter and this enum is used to configure low pass filters cut off frequency. Use type XMC_POSIF_FILTER_t for this enum. The member defines the low pass filter configuration(LPC) bitfield of PCONF register.

Enumerator
XMC_POSIF_FILTER_DISABLED | No filtering
XMC_POSIF_FILTER_1_CLOCK_CYCLE | Filter of 1 Clock Cycle
XMC_POSIF_FILTER_2_CLOCK_CYCLE | Filter of 2 Clock Cycles
XMC_POSIF_FILTER_4_CLOCK_CYCLE | Filter of 4 Clock Cycles
XMC_POSIF_FILTER_8_CLOCK_CYCLE | Filter of 8 Clock Cycles
XMC_POSIF_FILTER_16_CLOCK_CYCLE | Filter of 16 Clock Cycles
XMC_POSIF_FILTER_32_CLOCK_CYCLE | Filter of 32 Clock Cycles
XMC_POSIF_FILTER_64_CLOCK_CYCLE | Filter of 64 Clock Cycles
enum XMC_POSIF_HSC_TRIGGER_EDGE_t

Defines trigger edge in hall sensor mode.Use type XMC_POSIF_HSC_TRIGGER_EDGE_t for this enum. It can be used to configure PCONF register's SPES and MSES bit fields.

Enumerator
XMC_POSIF_HSC_TRIGGER_EDGE_RISING | Rising edge
XMC_POSIF_HSC_TRIGGER_EDGE_FALLING | Falling edge
enum XMC_POSIF_INPUT_ACTIVE_LEVEL_t

Defines active level of an input signal.Use type XMC_POSIF_INPUT_ACTIVE_LEVEL_t for this enum.

Enumerator
XMC_POSIF_INPUT_ACTIVE_LEVEL_HIGH | Input - Active High
XMC_POSIF_INPUT_ACTIVE_LEVEL_LOW | Input - Active Low
enum XMC_POSIF_INPUT_PORT_t

Defines POSIF configurable input ports.Use type XMC_POSIF_INPUT_PORT_t for this enum. The member defines the respective input selector(INSELX) bitfields of PCONF register. It selects, which input is used for the phase or Hall input function (depending on the module is set for Quadrature Decoder or Hall Sensor Mode). Same enum can be used to configure pattern update signal select by configuring PCONF register's MSETS bit field.

Enumerator
XMC_POSIF_INPUT_PORT_A | INPUT-A
XMC_POSIF_INPUT_PORT_B | INPUT-B
XMC_POSIF_INPUT_PORT_C | INPUT-C
XMC_POSIF_INPUT_PORT_D | INPUT-D
XMC_POSIF_INPUT_PORT_E | INPUT-E
XMC_POSIF_INPUT_PORT_F | INPUT-F
XMC_POSIF_INPUT_PORT_G | INPUT-G
XMC_POSIF_INPUT_PORT_H | INPUT-H
enum XMC_POSIF_IRQ_EVENT_t

Defines POSIF events.Use type XMC_POSIF_IRQ_EVENT_t for this enum. The member defines available event sources.It is used to configure which event to be used for interrupt generation using PFLGE register. [ PFLG,SPFLG,RPFLG]

Enumerator
XMC_POSIF_IRQ_EVENT_CHE | Hall Mode : Correct Hall Event
XMC_POSIF_IRQ_EVENT_WHE | Hall Mode : Wrong Hall Event
XMC_POSIF_IRQ_EVENT_HALL_INPUT | Hall Mode : Hall Input update
XMC_POSIF_IRQ_EVENT_MCP_SHADOW_TRANSFER | Hall Mode + MCM Mode : MC Pattern shadow transfer
XMC_POSIF_IRQ_EVENT_INDX | Quadrature Mode : Index event detection
XMC_POSIF_IRQ_EVENT_ERR | Quadrature Mode : Quadrature Phase Error
XMC_POSIF_IRQ_EVENT_CNT | Quadrature Mode : Quadrature Clock event
XMC_POSIF_IRQ_EVENT_DIR | Quadrature Mode : Quadrature Direction change event
XMC_POSIF_IRQ_EVENT_PCLK | Quadrature Mode : Quadrature period clock generation event
enum XMC_POSIF_MODE_t

Defines POSIF configurable modes.Use type XMC_POSIF_MODE_t for this enum. The members defines the function selector(FSEL) bitfields of PCONF register.

Enumerator
XMC_POSIF_MODE_HALL_SENSOR | Hall sensor mode
XMC_POSIF_MODE_QD | Quadrature Decoder mode
XMC_POSIF_MODE_MCM | Standalone Multichannel mode
XMC_POSIF_MODE_MCM_QD | Quadrature Decoder + Standalone Multichannel mode
enum XMC_POSIF_QD_DIR_t

Defines motor rotation direction.Use type XMC_POSIF_QD_DIR_t for this enum. The member defines the direction in quadrature mode.

Enumerator
XMC_POSIF_QD_DIR_COUNTERCLOCKWISE | Counter Clockwise
XMC_POSIF_QD_DIR_CLOCKWISE | Clockwise
enum XMC_POSIF_QD_INDEX_GENERATION_t

Defines frequency of index signal generation.Use type XMC_POSIF_QD_INDEX_GENERATION_t for this enum. Member represents available configuration for index marker generation using ICM bit field in QDC register.

Enumerator
XMC_POSIF_QD_INDEX_GENERATION_NEVER | Never generate the index marker signal
XMC_POSIF_QD_INDEX_GENERATION_ONCE | Generate only once after the first revolution
XMC_POSIF_QD_INDEX_GENERATION_ALWAYS | Index marker generated upon every revolution
enum XMC_POSIF_QD_MODE_t

Defines position decoder mode selection.Use type XMC_POSIF_QD_MODE_t for this enum. The member defines configuration for the operation of the quadrature decoder mode. It used to configure QDC register.

Enumerator
XMC_POSIF_QD_MODE_QUADRATURE | Standard Quadrature Mode
XMC_POSIF_QD_MODE_DIRECTION_COUNT | Direction Count Mode
enum XMC_POSIF_SR_ID_t

Defines POSIF service request lines.Use type XMC_POSIF_SR_ID_t for this enum. It used to connect POSIF event to required service request line. in PFLGE register for interrupt generation.

Enumerator
XMC_POSIF_SR_ID_0 | SR-0
XMC_POSIF_SR_ID_1 | SR-1
enum XMC_POSIF_STATUS_t

Defines the return status, to verify the POSIF related API calls. Use type XMC_POSIF_STATUS_t for this enum.

Enumerator
XMC_POSIF_STATUS_OK | API fulfills request
XMC_POSIF_STATUS_ERROR | API cannot fulfill request

Function Documentation

void XMC_POSIF_ClearEvent | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_IRQ_EVENT_t | event
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
event | Event to be acknowledged
Return values
None
Description
Clears event by acknowledgment of peripheral.
Acknowledges an IRQ event by configuring 1 to RPFLG register's event bit field.
Related APIs:
XMC_POSIF_SetEvent()

void XMC_POSIF_Disable ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module of type XMC_POSIF_t
Return values
None
Description
Asserts the POSIF module into reset and disables the clock.
If running on other than XMC45 device then in addition it will gate the peripheral clock. Configures PRCLR0 register's POSIF0RS or POSIF1RS bitfield depends upon peripheral.
Related APIs:
XMC_POSIF_Enable()

void XMC_POSIF_DisableEvent | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_IRQ_EVENT_t | event
 | ) |  |

Disables an IRQ generation capable event.

Parameters
peripheral | Pointer to an instance of POSIF module
event | Event to be disabled
Return values
None
Description
Disables event generation of peripheral.
Disables an IRQ generation capable event by configuring 0 to PFLGE register's event bit field.
Related APIs:
XMC_POSIF_EnableEvent()

void XMC_POSIF_Enable ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module of type XMC_POSIF_t
Return values
None
Description
De-asserts the POSIF module from reset and enables the clock.
Configures PRCLR0 register's POSIF0RS or POSIF1RS bit field depends upon peripheral. If running on other than XMC45 device then it will ungate the peripheral clock.
Note
This is the first API which application must invoke to configure POSIF. It is internally called by XMC_POSIF_Init().
Related APIs:
XMC_POSIF_Disable(),XMC_POSIF_Init()

void XMC_POSIF_EnableEvent | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_IRQ_EVENT_t | event
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
event | Event to be enabled
Return values
None
Description
Enables event generation of peripheral.
Enables an IRQ generation capable event by configuring 1 to PFLGE register's event bit field.
Related APIs:
XMC_POSIF_DisableEvent()

uint8_t XMC_POSIF_GetEventStatus | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_IRQ_EVENT_t | event
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
event | Event ID to be checked for status
Return values
uint8_t Returns event status
Description
Returns event status of peripheral.
Determines if IRQ event is asserted by retrieving data from PFLG register's event bit field.
Related APIs:
XMC_POSIF_SetEvent(),XMC_POSIF_ClearEvent()

uint8_t XMC_POSIF_HSC_GetCurrentPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint8_t Returns current hall sensor pattern. Range : [0-7]
Description
Returns current sampled hall sensor pattern of peripheral.
Retrieves the current hall sensor pattern from HALP register's HCP bit field of peripheral. Applications can at any point in time retrieve the current hall sensor pattern by invoking this API.
Note
This is applicable only to the hall sensor mode of operation.
Related APIs:
XMC_POSIF_HSC_GetLastSampledPattern(),XMC_POSIF_HSC_GetExpectedPattern()

uint8_t XMC_POSIF_HSC_GetExpectedPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint8_t Returns expected hall sensor pattern. Range : [0-7]
Description
Returns expected hall sensor pattern of peripheral.
Retrieves the expected hall sensor pattern from HALP register's HEP bit field of peripheral. Applications can at any point in time retrieve the expected hall sensor pattern by invoking this API.
Note
This is applicable only to the hall sensor mode of operation.
Related APIs:
XMC_POSIF_HSC_GetLastSampledPattern(),XMC_POSIF_HSC_GetCurrentPattern()

uint8_t XMC_POSIF_HSC_GetLastSampledPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint8_t Returns last sampled hall sensor pattern. Range : [0-7]
Description
Returns last sampled hall sensor pattern of peripheral.
Retrieves the last sampled hall sensor pattern from PDBG register's HSP bit field of peripheral. Applications can at any point in time retrieve the last sampled hall sensor pattern by invoking this API.
Note
This is applicable only to the hall sensor mode of operation.
Related APIs:
XMC_POSIF_HSC_GetCurrentPattern(),XMC_POSIF_HSC_GetExpectedPattern()

XMC_POSIF_STATUS_t XMC_POSIF_HSC_Init | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_HSC_CONFIG_t *const | config
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
config | Pointer to hall sensor control initialization data of type XMC_POSIF_HSC_CONFIG_t
Return values
XMC_POSIF_STATUS_t Returns XMC_POSIF_STATUS_OK if configured in Hall Sensor Mode else return XMC_POSIF_STATUS_ERROR.
Description
Initializes hall sensor control mode.
Configures PCONF register with which POSIF input trigger to be used for sampling hall pattern.Configures PCONF register for idle signal generation for wrong hall event.
Note
It is necessary to have called XMC_POSIF_Init first with Hall sensor mode before invocation of this API.
Related APIs:
XMC_POSIF_Init()

void XMC_POSIF_HSC_SetCurrentPattern | ( | XMC_POSIF_t *const | peripheral,
 |  | const uint8_t | pattern
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
pattern | The hall sensor pattern to be programmed into current pattern [0-7]
Return values
None
Description
Configures current Hall sensor pattern of peripheral.
Configures the Current hall sensor pattern on HALPS shadow register's HCPS bit field of peripheral. Applications can set at any point in time program the current hall sensor pattern by invoking this API.
Note
This is applicable only to the hall sensor mode of operation. It may be noted that the pattern is merely written to the shadow register. Transfer from the shadow register is based on a hardware transfer trigger or software trigger through API XMC_POSIF_HSC_UpdateHallPattern().
Related APIs:
XMC_POSIF_HSC_GetCurrentPattern(),XMC_POSIF_HSC_SetExpectedPattern()

void XMC_POSIF_HSC_SetExpectedPattern | ( | XMC_POSIF_t *const | peripheral,
 |  | const uint8_t | pattern
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
pattern | The hall sensor pattern to be programmed into expected pattern [0-7]
Return values
None
Description
Configures the expected hall sensor pattern of peripheral.
Applications can set at any point in time program the hall sensor expected patterns by invoking this API. Configures the expected hall sensor pattern on HALPS shadow register's HEPS bit field of peripheral.
Note
This is applicable only to the hall sensor mode of operation.It may be noted that the pattern is merely written to the shadow register. Transfer from the shadow register is based on a hardware transfer trigger or software trigger through API XMC_POSIF_HSC_UpdateHallPattern().
Related APIs:
XMC_POSIF_HSC_GetExpectedPattern()

void XMC_POSIF_HSC_SetHallPatterns | ( | XMC_POSIF_t *const | peripheral,
 |  | const uint8_t | pattern_mask
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
pattern_mask | The hall sensor pattern mask [0-63] Format of mask: (expected_pattern << 3) | (current_pattern)
Return values
None
Description
Configures current and expected hall pattern of peripheral.
Configures HALPS register with the Current and Expected hall sensor patterns in one operation. Applications can at any point in time program the current and expected hall sensor pattern by invoking this API.
Note
This is applicable only to the hall sensor mode of operation. It may be noted that the pattern is merely written to the shadow register. Transfer from the shadow register is based on a hardware transfer trigger or software trigger through API XMC_POSIF_HSC_UpdateHallPattern().
Related APIs:
XMC_POSIF_HSC_SetExpectedPattern(),XMC_POSIF_HSC_SetCurrentPattern()

void XMC_POSIF_HSC_UpdateHallPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
None
Description
Manually performs shadow transfer of hall sensor patterns.
Configures MCMS register's STHR bit field with 1. Setting this bit to 1 leads to an immediate update of the fields HALP.HCP(Current pattern) and HALP.HEP(Expected pattern).
Note
The transfer of hall sensor pattern shadow registers content to the sensor pattern register happens under two conditions. A hardware trigger starts the shadow transfer. Alternatively, the shadow transfer can be initiated by application software by means of invocation of this API.
Related APIs:
XMC_POSIF_HSC_SetHallPatterns()

void XMC_POSIF_Init | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_CONFIG_t *const | config
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module of type XMC_POSIF_t
config | Pointer to POSIF configuration data(operation mode,input selection and filter configuration)
Return values
None
Description
Initialize POSIF module with config.
Configures POSIF global registers.This is the first API which application must invoke to configure POSIF. It sets up parameters common to all the POSIF modes - hall sensor,quadrature decoder and multi-channel modes of operation. Configures PCONF register with mode of operation,input selection and filter configuration.
Related APIs:
XMC_POSIF_HSC_Init(),XMC_POSIF_QD_Init(),XMC_POSIF_MCM_Init()

bool XMC_POSIF_IsRunning ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
bool Returns false: IDLE, true:RUNNING
Description
Returns the status of POSIF module - Running or IDLE.
Retrieves the status from PRUN register's SRB bit.
Related APIs:
XMC_POSIF_Start(),XMC_POSIF_Stop()

void XMC_POSIF_MCM_EnableMultiChannelPatternUpdate ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
None
Description
Enables update of the Multi-Channel Pattern by software in standalone multi-channel mode.
Enabling update of multi-channel pattern happens under two conditions. A hardware trigger enables this update. Alternatively, this can be enabled by software by means of invocation of this API.
Note
The update is not done immediately due to the fact that the trigger that synchronizes the update with the PWM is still needed.
Related APIs:
XMC_POSIF_MCM_UpdateMultiChannelPattern()

uint16_t XMC_POSIF_MCM_GetMultiChannelPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint16_t Returns configured multi channel pattern
Description
Returns configured multi channel pattern of peripheral.
Retrieves the Multi-Channel Pattern from MCM register's MCMP bit field of peripheral Applications can at any point in time retrieve the multi-channel pattern by invoking this API.
Related APIs:
XMC_POSIF_MCM_SetMultiChannelPattern()

uint16_t XMC_POSIF_MCM_GetShadowMultiChannelPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint16_t Returns configured multi channel pattern present in shadow transfer register
Description
Returns configured multi channel pattern in shadow register of peripheral.
Retrieves the Multi-Channel Pattern from MCSM shadow register's MCMPS bit field. Applications can at any point in time retrieve the multi-channel pattern by invoking this API.

It can be used when MCM is enabled.

Related APIs:
XMC_POSIF_MCM_SetMultiChannelPattern()

XMC_POSIF_STATUS_t XMC_POSIF_MCM_Init | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_MCM_CONFIG_t *const | config
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
config | Pointer to quadrature decoder initialization data
Return values
XMC_POSIF_STATUS_t Returns multi channel pattern initialization status of type XMC_POSIF_STATUS_t
Description
Initializes multi channel mode in Hall mode, standalone multi-channel mode and quadrature with multi-channel mode.
Configures PCONF register with multi channel mode using XMC_POSIF_MCM_CONFIG_t data structure.
Note
It is necessary to call XMC_POSIF_Init first before invocation of this API. For XMC_POSIF_MODE_HALL_SENSOR, it is necessary to have called XMC_POSIF_HSC_Init before invocation of this API. For XMC_POSIF_MODE_MCM_QD, it is necessary to have called XMC_POSIF_QD_Init before invocation of this API.
Related APIs:
XMC_POSIF_Init(),XMC_POSIF_HSC_Init(),XMC_POSIF_QD_Init()

void XMC_POSIF_MCM_SetMultiChannelPattern | ( | XMC_POSIF_t *const | peripheral,
 |  | const uint16_t | pattern
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
pattern | The 16b multi-channel pattern [0-65535]
Return values
None
Description
Configures MCSM register with Multi-Channel Pattern.
This 16b multi-channel pattern which controls the 16 outputs of all slices of a CCU8 module. Transfer from the shadow register is based on a hardware transfer trigger or software trigger through API XMC_POSIF_MCM_UpdateMultiChannelPattern(). Every time that a Multi-Channel pattern transfer is triggered, this value is passed into the field MCM.MCMP of peripheral
Note
It may be noted that the pattern is merely written to the shadow register.
Related APIs:
XMC_POSIF_MCM_GetMultiChannelPattern()

void XMC_POSIF_MCM_UpdateMultiChannelPattern ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
None
Description
Performs shadow transfer of the Multi-Channel Pattern register by configuring MCMS register's STMR bit field.
Note
Transfer multi-channel pattern shadow registers content to the actual pattern register of peripheral.
The transfer of multi-channel pattern shadow registers content to the actual pattern register happens under two conditions. A hardware trigger starts the shadow transfer. Alternatively, the shadow transfer can be initiated by application software by means of invocation of this API.
Related APIs:
XMC_POSIF_MCM_SetMultiChannelPattern()

uint8_t XMC_POSIF_QD_GetCurrentIndexValue ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint8_t Returns the index value.[1 - New rotation started, 0 - In-between]
Description
Returns the current index value in quadrature decoder mode of peripheral.
Retrieves current index signal value of the quadrature decoder from PDBG register's IVAL bit field. Applications can at any point in time retrieve the current index signal value of the quadrature decoder by invoking this API.
Note
This is applicable only to the quadrature decoder mode of operation.
uint8_t XMC_POSIF_QD_GetCurrentState ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint8_t Returns current state of quadrature decoder[Phase B,Phase A]
Description
Returns the current state of phase signals in quadrature decoder mode of peripheral.
Retrieves current state of the quadrature decoder from PDBG register's QCSV bit fields. Applications can at any point in time retrieve the current state of Phase A and Phase B signals by invoking this API.
Note
This is applicable only to the quadrature decoder mode of operation.
Related APIs:
XMC_POSIF_QD_GetPreviousState()

XMC_POSIF_QD_DIR_t XMC_POSIF_QD_GetDirection ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
XMC_POSIF_QD_DIR_t Return direction of revolution of the motor of type XMC_POSIF_QD_DIR_t
Description
Returns the direction of revolution of the motor.
Retrieves direction from QDC register's DVAL bit field in quadrature mode. Applications can at any point in time retrieve the direction of rotation by invoking this API.
Note
This is applicable only to the quadrature decoder mode of operation.
uint8_t XMC_POSIF_QD_GetPreviousState ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
uint8_t Returns previous state of quadrature decoder[Phase B,Phase A]
Description
Returns the previous state of phase signals in quadrature decoder mode of peripheral.
Retrieves previous state of the quadrature decoder from PDBG register's QPSV bit fields. Applications can at any point in time retrieve the previous state of Phase A and Phase B signals by invoking this API.
Note
This is applicable only to the quadrature decoder mode of operation.
Related APIs:
XMC_POSIF_QD_GetCurrentState()

XMC_POSIF_STATUS_t XMC_POSIF_QD_Init | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_QD_CONFIG_t *const | config
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
config | Pointer to quadrature decoder initialization data
Return values
XMC_POSIF_STATUS_t Returns quadrature mode initialization status of type XMC_POSIF_STATUS_t
Description
Initializes quadrature decoder control mode.
Configures PCONF register with quadrature mode using XMC_POSIF_QD_MODE_t data structure. Initializes QDC register with quadrature mode configuration using XMC_POSIF_QD_CONFIG_t structure.
Note
It is necessary to have called XMC_POSIF_Init first with Quadrature decoder mode before invocation of this API.
Related APIs:
XMC_POSIF_Init()

void XMC_POSIF_SelectInputSource | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_INPUT_PORT_t | input0,
 |  | const XMC_POSIF_INPUT_PORT_t | input1,
 |  | const XMC_POSIF_INPUT_PORT_t | input2
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
input0 | Choice of input for input 0 [0-3]
input1 | Choice of input for input 1 [0-3]
input2 | Choice of input for input 2 [0-3]
Return values
None
Description
Configures which input to be connected to POSIF module.
Configures PCONF register's INSEL0,INSEL1,INSEL2 bit fields with source for the input connection for input0 input1, input2 respectively.
Note
Configures which input is used for the Phase X or Hall input X function depending upon the module is set for Quadrature Decoder or Hall Sensor Mode.
Related APIs:
XMC_POSIF_Init()

void XMC_POSIF_SetEvent | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_IRQ_EVENT_t | event
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
event | Event to be manually asserted
Return values
None
Description
Manually generates event of peripheral.
Manually asserts an IRQ generation capable event by configuring 1 to SPFLG register's event bit field.
Related APIs:
XMC_POSIF_ClearEvent()

void XMC_POSIF_SetInterruptNode | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_IRQ_EVENT_t | event,
 |  | const XMC_POSIF_SR_ID_t | sr
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
event | Event to be acknowledged of type XMC_POSIF_IRQ_EVENT_t
sr | Service request line of type XMC_POSIF_SR_ID_t
Return values
None
Description
Configures event to generate sr (service request) of peripheral.
Binds an IRQ event to a service request line by configuring PFLGE register's event bit field.
void XMC_POSIF_SetMode | ( | XMC_POSIF_t *const | peripheral,
 |  | const XMC_POSIF_MODE_t | mode
 | ) |  |
Parameters
peripheral | Pointer to an instance of POSIF module
mode | POSIF operating mode of type XMC_POSIF_MODE_t
Return values
None
Description
Configures POSIF module for mode.
Configures PCONF register's a\ FSEL bitfield with mode. Refer XMC_POSIF_MODE_t for available options.
Note
POSIF module should be in stopped state while changing the operating mode.
Related APIs:
XMC_POSIF_Stop()

void XMC_POSIF_Start ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
None
Description
Starts POSIF peripheral functional state machine.
Starts POSIF state machine for peripheral.Configures PRUNS register's SRB bit field with 1.
Note
Global properties of POSIF along with mode specific properties should have been initialized before starting of POSIF FSM.
Related APIs:
XMC_POSIF_Stop(),XMC_POSIF_IsRunning()

void XMC_POSIF_Stop ( XMC_POSIF_t *const peripheral )
Parameters
peripheral Pointer to an instance of POSIF module
Return values
None
Description
Stops POSIF peripheral functional state machine.
Stop POSIF functional state machine and clears current internal status of the peripheral. Configures PRUNC register's CRB bit field with 1.
Related APIs:
XMC_POSIF_Start(),XMC_POSIF_IsRunning()

Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_POSIF_CONFIG_t Struct Reference

XMC_POSIF_CONFIG_t Struct Reference
XMC Peripheral Library » POSIF

#include <xmc_posif.h>

Detailed Description

Defines POSIF module initialization data structure. Use type XMC_POSIF_CONFIG_t for this data structure. It is used to initialize POSIF module using PCONF register.

Field Documentation

uint32_t filter

Input filter configuration

uint32_t input0

Choice of input for Input-1

uint32_t input1

Choice of input for Input-2

uint32_t input2

Choice of input for Input-3

uint32_t mode

POSIF Operational mode. Use XMC_POSIF_MODE_t to configure

The documentation for this struct was generated from the following file:
  • xmc_posif.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_POSIF_HSC_CONFIG_t Struct Reference

XMC_POSIF_HSC_CONFIG_t Struct Reference
XMC Peripheral Library » POSIF

#include <xmc_posif.h>

Detailed Description

Defines POSIF hall sensor control initialization data structure. Use type XMC_POSIF_HSC_CONFIG_t for this data structure. It used to initialize hall sensor mode configuration using PCONF register.

Field Documentation

uint32_t disable_idle_signal

Should idle signal be disabled upon wrong hall event?

uint32_t external_error_enable

Should external errors lead to Wrong Hall event?

uint32_t external_error_level

What should be the active level of external error signal?

uint32_t external_error_port

Of the 4 external error ports, which one is to be considered?

uint32_t sampling_trigger

Of HSDA and HSDB, which one is to be used to trigger POSIF to sample hall pattern?

uint32_t sampling_trigger_edge

Which edge of the sampling trigger signal is to be considered?

The documentation for this struct was generated from the following file:
  • xmc_posif.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_POSIF_MCM_CONFIG_t Struct Reference

XMC_POSIF_MCM_CONFIG_t Struct Reference
XMC Peripheral Library » POSIF

#include <xmc_posif.h>

Detailed Description

Defines POSIF multi-channel mode initialization data structure. Use type XMC_POSIF_MCM_CONFIG_t for this data structure. It used to initialize multi channel mode configuration using PCONF register.

Field Documentation

uint32_t pattern_sw_update

should multi channel pattern updated by SW ?

uint32_t pattern_trigger_edge

Which edge of the pattern update trigger is to be considered?

uint32_t pattern_update_trigger

Of the 8 update triggers, which one is to be considered?

uint32_t pwm_sync

Of the 4 pwm sync inputs, which one is to be considered?

The documentation for this struct was generated from the following file:
  • xmc_posif.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_POSIF_QD_CONFIG_t Struct Reference

Data Fields
XMC_POSIF_QD_CONFIG_t Struct Reference
XMC Peripheral Library » POSIF

#include <xmc_posif.h>

Data Fields

XMC_POSIF_QD_MODE_t mode
uint32_t | index: 2
uint32_t | phase_a: 1
uint32_t | phase_b: 1
uint32_t | phase_leader: 1

Detailed Description

Defines POSIF quadrature decoder initialization data structure. Use type XMC_POSIF_QD_CONFIG_t for this data structure. It used to configure Quadrature mode using QDC register.

Field Documentation

uint32_t index

Index signal generation control. Use XMC_POSIF_QD_INDEX_GENERATION_t to configure this field.

XMC_POSIF_QD_MODE_t mode

Operational Mode of the quadrature encoder and decoder

uint32_t phase_a

Phase-A active level configuration

uint32_t phase_b

Phase-B active level configuration

uint32_t phase_leader

Which of the two phase signals[Phase A or Phase B] leads the other?

The documentation for this struct was generated from the following file:
  • xmc_posif.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: PRNG

Data Structures | Macros | Enumerations | Functions
PRNG
XMC Peripheral Library

Data Structures

struct XMC_PRNG_INIT_t

Macros

#define XMC_PRNG_RDBS_BYTE_READ_MASK (0x00FFU)

Enumerations

Functions

uint16_t | XMC_PRNG_CheckValidStatus (void)
void | XMC_PRNG_EnableKeyLoadingMode (void)
void | XMC_PRNG_EnableStreamingMode (void)
uint16_t | XMC_PRNG_GetPseudoRandomNumber (void)
XMC_PRNG_INIT_STATUS_t | XMC_PRNG_Init (const XMC_PRNG_INIT_t *prng)
void | XMC_PRNG_LoadKeyWords (uint16_t key)
void | XMC_PRNG_SetRandomDataBlockSize (XMC_PRNG_DATA_BLOCK_SIZE_t block_size)

Detailed Description

The pseudo random bit generator (PRNG) provides random data with fast generation times. PRNG has to be initialized by the user software before use. The initialization consists of two basic phases: key-loading and warm-up.

The PRNG low level driver provides functions to configure and initialize the PRNG hardware peripheral.

Macro Definition Documentation

#define XMC_PRNG_RDBS_BYTE_READ_MASK (0x00FFU)

Byte mask value for random data block size

Enumeration Type Documentation

enum XMC_PRNG_DATA_BLOCK_SIZE_t

PRNG data block size

Enumerator
XMC_PRNG_RDBS_RESET | Reset state (no random data block size defined)
XMC_PRNG_RDBS_BYTE | BYTE (8-bit)
XMC_PRNG_RDBS_WORD | WORD (16-bit)
enum XMC_PRNG_INIT_STATUS_t

PRNG driver initialization status

Enumerator
XMC_PRNG_NOT_INITIALIZED | Reset state or Non-initialized state (Same as XMC_PRNG_RDBS_RESET)
XMC_PRNG_INITIALIZED | Initialized state
enum XMC_PRNG_KEY_LOAD_OP_MODE_t

PRNG key load operation modes

Enumerator
XMC_PRNG_STRM_MODE | Streaming mode (default)
XMC_PRNG_KLD_MODE | Loading mode

Function Documentation

uint16_t XMC_PRNG_CheckValidStatus ( void )
Returns
None
Description:
Checks the validity (CHK.RDV bit) of the generated random data
The function checks the validity (CHK.RDV bit) of the generated random data. In key loading mode, this value indicates if the next partial key word can be written to PRNG_WORD or not.
void XMC_PRNG_EnableKeyLoadingMode ( void )
Returns
None
Description:
Enables the PRNG key loading mode
The function initializes the key loading by setting the bit CTRL.KLD. In this mode, Register WORD acts as always as a 16 bit destination register. After the complete key has been loaded, the CTRL.KLD must be set to '0' to prepare the following warmup phase.
Related APIs:
XMC_PRNG_EnableStreamingMode()
void XMC_PRNG_EnableStreamingMode ( void )
Returns
None
Description:
Enables the Streaming mode
The function enables the streaming mode and disables the PRNG key loading mode by resetting the CTRL.KLD bit.
Related APIs:
XMC_PRNG_EnableKeyLoadingMode()
uint16_t XMC_PRNG_GetPseudoRandomNumber ( void )
Parameters
None
Returns
uint16_t Generated random number
Description:
Gets the generated random number
The function gives the generated random number by returning the content of WORD register. Before reading the WORD register to get the generated random number it is required to check the bit CHK.RDV is set which indicates that the next random data block can be read from WORD register. After a word has been read the bit CHK.RDV is reset by the hardware and generation of new random bits starts.
Related APIs:
XMC_PRNG_CheckValidStatus()
XMC_PRNG_INIT_STATUS_t XMC_PRNG_Init ( const XMC_PRNG_INIT_t * prng )
Parameters
prng Pointer to a constant instance of XMC_PRNG_INIT_t, pointing to the initialization configuration.
Returns
XMC_PRNG_INIT_STATUS_t XMC_PRNG_INITIALIZED if initialized, XMC_PRNG_NOT_INITIALIZED otherwise.
Description:
Initialize the PRNG peripheral with the configured key words and block size
The function configures block size for key loading mode, enables key loading mode, loads key words (80 bits) and wait till RDV is set, enables the streaming mode and waits for warmup phase. This function programmes the CTRL and WORD registers.
void XMC_PRNG_LoadKeyWords ( uint16_t key )
Parameters
key Key word to load into PRNG WORD register
Returns
None
Description:
Loads a partial key word to the PRNG WORD register
The function loads partial key word to WORD registr. These partial words are sequentially written and loading a key word will take 16 clock cycles. The CHK.RDV bit is set to '0' while loading is in progress. '1' indicates that the next partial key word can be written to WORD register.
void XMC_PRNG_SetRandomDataBlockSize ( XMC_PRNG_DATA_BLOCK_SIZE_t block_size )
Parameters
block_size Block size of type XMC_PRNG_DATA_BLOCK_SIZE_t for read access
Returns
None
Description:
Programming Random Block Size
The function sets the random data block size as byte or word by programming CTRL.RDBS bitfield. block_size = 0 for Reset state, block_size = 1 for 'byte' and block_size = 2 for 'word'.
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_PRNG_INIT_t Struct Reference

Data Fields
XMC_PRNG_INIT_t Struct Reference
XMC Peripheral Library » PRNG

#include <xmc_prng.h>

Data Fields

XMC_PRNG_DATA_BLOCK_SIZE_t block_size
uint16_t key_words [5]

Detailed Description

Key words and data block size configuration values of PRNG

The structure presents a convenient way to set/obtain the key word and data block configuration values of PRNG. The XMC_PRNG_Init() can be used to populate the structure with the key word and data block configuration values of the PRNG module.

Field Documentation

XMC_PRNG_DATA_BLOCK_SIZE_t block_size

Block size

uint16_t key_words[5]

Keywords

The documentation for this struct was generated from the following file:
  • xmc_prng.h
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: RTC

Data Structures | Enumerations | Functions
RTC
XMC Peripheral Library

Data Structures

struct | XMC_RTC_ALARM_t
struct | XMC_RTC_CONFIG_t
struct | XMC_RTC_TIME_t

Enumerations

Functions

void | XMC_RTC_ClearEvent (const uint32_t event)
void | XMC_RTC_Disable (void)
void | XMC_RTC_DisableEvent (const uint32_t event)
void | XMC_RTC_Enable (void)
void | XMC_RTC_EnableEvent (const uint32_t event)
void | XMC_RTC_GetAlarm (XMC_RTC_ALARM_t *const alarm)
void | XMC_RTC_GetAlarmStdFormat (struct tm *const stdtime)
uint32_t | XMC_RTC_GetEventStatus (void)
uint32_t | XMC_RTC_GetPrescaler (void)
void | XMC_RTC_GetTime (XMC_RTC_TIME_t *const time)
void | XMC_RTC_GetTimeStdFormat (struct tm *const stdtime)
XMC_RTC_STATUS_t | XMC_RTC_Init (const XMC_RTC_CONFIG_t *const config)
bool | XMC_RTC_IsEnabled (void)
bool | XMC_RTC_IsRunning (void)
void | XMC_RTC_SetAlarm (const XMC_RTC_ALARM_t *const alarm)
void | XMC_RTC_SetAlarmStdFormat (const struct tm *const stdtime)
void | XMC_RTC_SetDebugMode (const XMC_RTC_DEBUG_MODE_t debug_mode)
void | XMC_RTC_SetPrescaler (uint16_t prescaler)
void | XMC_RTC_SetTime (const XMC_RTC_TIME_t *const timeval)
void | XMC_RTC_SetTimeStdFormat (const struct tm *const stdtime)
void | XMC_RTC_Start (void)
void | XMC_RTC_Stop (void)

Detailed Description

Real-time clock (RTC) is a clock that keeps track of the current time. Precise real time keeping is with a 32.768 KHz external crystal clock or a 32.768 KHz high precision internal clock. It provides a periodic time based interrupt and a programmable alarm interrupt on time match. It also supports wakeup from hibernate.

The RTC low level driver provides functions to configure and initialize the RTC hardware peripheral.

Enumeration Type Documentation

enum XMC_RTC_DEBUG_MODE_t

Debug mode status values

Enumerator
XMC_RTC_RUN_IN_DEBUG_MODE | RTC is not stopped during halting mode debug
XMC_RTC_STOP_IN_DEBUG_MODE | RTC is stopped during halting mode debug
enum XMC_RTC_EVENT_t

Events which enables interrupt request generation

Enumerator
XMC_RTC_EVENT_PERIODIC_SECONDS | Mask value to enable an event on periodic seconds
XMC_RTC_EVENT_PERIODIC_MINUTES | Mask value to enable an event on periodic seconds
XMC_RTC_EVENT_PERIODIC_HOURS | Mask value to enable an event on periodic seconds
XMC_RTC_EVENT_PERIODIC_DAYS | Mask value to enable an event on periodic seconds
XMC_RTC_EVENT_PERIODIC_MONTHS | Mask value to enable an event on periodic seconds
XMC_RTC_EVENT_PERIODIC_YEARS | Mask value to enable an event on periodic seconds
XMC_RTC_EVENT_ALARM | Mask value to enable an event on periodic seconds
enum XMC_RTC_MONTH_t

Months used to program the date

enum XMC_RTC_STATUS_t

Status return values for RTC low level driver

Enumerator
XMC_RTC_STATUS_OK | Operation successful
XMC_RTC_STATUS_ERROR | Operation unsuccessful
XMC_RTC_STATUS_BUSY | Busy with a previous request
enum XMC_RTC_WEEKDAY_t

Week days used program the date

Function Documentation

void XMC_RTC_ClearEvent ( const uint32_t event )
Parameters
event A valid RTC event (XMC_RTC_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Clears periodic and alarm event(s) status
The function sets the bitfields of CLRSR register to clear status bits in RAWSTAT and STSSR registers. Setting the value for the the RTC event(s) containing in the XMC_RTC_EVENT_t clears the corresponding status bits in RAWSTAT and STSSR registers.
Related APIs:
XMC_RTC_GetEventStatus()
void XMC_RTC_Disable ( void )
Returns
None
Description
Disables RTC peripheral for programming its registers
Gates the peripheral clock.
Related APIs:
XMC_RTC_Enable(), XMC_SCU_RESET_AssertPeripheralReset()
void XMC_RTC_DisableEvent ( const uint32_t event )
Parameters
event A valid RTC event (XMC_RTC_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Disable RTC periodic and alarm event(s)
The function resets the bitfields of MSKSR register to disable interrupt generation for requested RTC event(s). Resetting the masking value for the the event(s) containing in the XMC_RTC_EVENT_t blocks the generation of the interrupt.
Related APIs:
XMC_RTC_EnableEvent()
void XMC_RTC_Enable ( void )
Returns
None
Description
Enables RTC peripheral for programming its registers
Ungates the peripheral clock.
Related APIs:
XMC_RTC_Disable(), XMC_SCU_RESET_DeassertPeripheralReset()
void XMC_RTC_EnableEvent ( const uint32_t event )
Parameters
event A valid RTC event (XMC_RTC_EVENT_t) or a valid combination of logically OR'd events
Returns
None
Description:
Enable RTC periodic and alarm event(s)
The function sets the bitfields of MSKSR register to enable interrupt generation for requested RTC event(s). Setting the masking value for the event(s) containing in the XMC_RTC_EVENT_t leads to a generation of the interrupt.
Related APIs:
XMC_RTC_DisableEvent()
void XMC_RTC_GetAlarm ( XMC_RTC_ALARM_t *const alarm )
Parameters
alarm Pointer to a constant XMC_RTC_ALARM_t structure containing the time parameters alarm seconds, alarm minutes, alarm hours, alarm days, alarm daysofweek, alarm month and alarm year.
Returns
None
Description:
Gets the RTC module alarm time value
The function gets the alarm time values from ATIM0, ATIM1 registers. See the structure XMC_RTC_ALARM_t for the valid range of alarm time value parameters.
Related APIs:
XMC_RTC_SetAlarm()
void XMC_RTC_GetAlarmStdFormat ( struct tm *const stdtime )
Parameters
stdtime Pointer to a constant ::tm structure containing the time parameters alarm seconds, alarm minutes, alarm hours, alarm days, alarm daysofweek, alarm month, alarm year(since 1900) and alarm days in a year in standard format.
Returns
None
Description:
Gets the RTC module alarm time value in standard format
The function gets the alarm time values from ATIM0, ATIM1 registers. See the structure XMC_RTC_ALARM_t for the valid range of alarm time value parameters.
For days the valid range is (1 - Actual days of month), year (since 1900) and daysinyear (0 -365).
Related APIs:
XMC_RTC_SetAlarm(), XMC_RTC_GetAlarm()
uint32_t XMC_RTC_GetEventStatus ( void )
Returns
None
Description:
Gets the RTC periodic and alarm event(s) status
The function reads the bitfields of STSSR register to get the status of RTC events. Reading the value of the register STSSR gives the status of the event(s) containing in the XMC_RTC_EVENT_t.
Related APIs:
XMC_RTC_ClearEvent()
uint32_t XMC_RTC_GetPrescaler ( void )
Returns
None
Description:
Gets the RTC module prescaler value
The function reads the CTR.DIV bitfield to get the prescalar value. The default value for the prescalar with the 32.768kHz crystal (or the internal clock) is 7FFFH for a time interval of 1 sec.
Related APIs:
XMC_RTC_SetPrescaler()
void XMC_RTC_GetTime ( XMC_RTC_TIME_t *const time )
Parameters
time Pointer to a constant XMC_RTC_TIME_t structure containing the time parameters seconds, minutes, hours, days, daysofweek, month and year.
Returns
None
Description:
Gets the RTC module time value
The function gets the time values from TIM0, TIM1 registers. See the structure XMC_RTC_TIME_t for the valid range of time value parameters.
Related APIs:
XMC_RTC_SetTime()
void XMC_RTC_GetTimeStdFormat ( struct tm *const stdtime )
Parameters
stdtime Pointer to a constant ::tm structure containing the time parameters seconds, minutes, hours, days, daysofweek, month, year(since 1900) and days in a year in standard format.
Returns
None
Description:
Gets the RTC module time value in standard format
The function gets the time values from TIM0, TIM1 registers. See the structure XMC_RTC_TIME_t for the valid range of time value parameters.
For days the valid range is (1 - Actual days of month), year (since 1900) and daysinyear (0 -365).
Related APIs:
XMC_RTC_SetTime(), XMC_RTC_GetTime()
XMC_RTC_STATUS_t XMC_RTC_Init ( const XMC_RTC_CONFIG_t *const config )
Parameters
config Constant pointer to a constant XMC_RTC_CONFIG_t structure containing the time, alarm time and clock divider(prescaler) configuration.
Returns
XMC_RTC_STATUS_t Always returns XMC_RTC_STATUS_OK (It contains only register assignment statements)
Description:
Initialize the RTC peripheral
The function ungates the peripheral clock for RTC, configures internal clock divider, time and alarm values by writing to the CTR.DIV, TIM0, TIM1, ATIM0 and ATIM1 registers.
bool XMC_RTC_IsEnabled ( void )
Returns
None
Description
Checks RTC peripheral is enabled for programming its registers
Checks peripheral clock is ungated or not.
Related APIs:
XMC_RTC_Enable(), XMC_RTC_Disable(), XMC_SCU_RESET_DeassertPeripheralReset(), XMC_SCU_RESET_AssertPeripheralReset()
bool XMC_RTC_IsRunning ( void )
Returns
bool true if RTC is running false if RTC is not running
Description:
Checks the running status of the RTC
The function reads the bitfield ENB of CTR register to get the running status of RTC.
Related APIs:
XMC_RTC_Start(), XMC_RTC_Stop()
void XMC_RTC_SetAlarm ( const XMC_RTC_ALARM_t *const alarm )
Parameters
alarm Constant pointer to a constant XMC_RTC_ALARM_t structure containing the alarm time parameters alarm seconds, alarm minutes, alarm hours, alarm days, alarm daysofweek, alarm month and alarm year.
Returns
None
Description:
Sets the RTC module alarm time value
The function sets the ATIM0, ATIM1 registers with alarm time values. See the structure XMC_RTC_ALARM_t for the valid range of alarm time value parameters.
Related APIs:
XMC_RTC_GetAlarm()
void XMC_RTC_SetAlarmStdFormat ( const struct tm *const stdtime )
Parameters
stdtime Pointer to a ::tm structure containing the time parameters alarm seconds, alarm minutes, alarm hours, alarm days, alarm daysofweek, alarm month, alarm year(since 1900) and alarm days in a year in standard format.
Returns
None
Description:
Sets the RTC module alarm time value in standard format
The function sets the alarm time values from ATIM0, ATIM1 registers.
Related APIs:
XMC_RTC_SetAlarm(), XMC_RTC_GetAlarm()
void XMC_RTC_SetDebugMode ( const XMC_RTC_DEBUG_MODE_t debug_mode )
Parameters
debug_mode Debug mode value containing in (XMC_RTC_DEBUG_MODE_t) to be set
Returns
None
Description:
Configures the RTC into running or stopping mode during halting mode debug
The function sets the CTR.SUS bitfield to configure the RTC into running or stopping mode during halting mode debug.
void XMC_RTC_SetPrescaler ( uint16_t prescaler )
Parameters
prescaler Prescaler value to be set
Returns
None
Description:
Sets the RTC module prescaler value
The function sets the CTR.DIV bitfield to configure the prescalar value. The default value for the prescalar with the 32.768kHz crystal (or the internal clock) is 7FFFH for a time interval of 1 sec. Before setting the prescaler value RTC should be in stop mode and hibernate domain should be enabled.
Related APIs:
XMC_RTC_Stop(), XMC_RTC_Enable(), XMC_RTC_GetPrescaler()
void XMC_RTC_SetTime ( const XMC_RTC_TIME_t *const timeval )
Parameters
timeval Contstant pointer to a constant XMC_RTC_TIME_t structure containing the time parameters seconds, minutes, hours, days, daysofweek, month and year.
Returns
None
Description:
Sets the RTC module time values
The function sets the TIM0, TIM1 registers with time values. The values can only be written when RTC is disabled. See the structure XMC_RTC_TIME_t for the valid range of time value parameters.
Related APIs:
XMC_RTC_GetTime(), XMC_RTC_Stop()
void XMC_RTC_SetTimeStdFormat ( const struct tm *const stdtime )
Parameters
stdtime Pointer to a ::tm structure containing the time parameters seconds, minutes, hours, days, daysofweek, month, year(since 1900) and days in a year in standard format.
Returns
None
Description:
Sets the RTC module time value in standard format
The function sets the time values from TIM0, TIM1 registers.
Related APIs:
XMC_RTC_SetTime(), XMC_RTC_GetTime()
void XMC_RTC_Start ( void )
Returns
None
Description
Enables RTC peripheral to start counting time
The function starts the RTC for counting time by setting CTR.ENB bit. Before starting the RTC, it should not be in running mode and also hibernate domain should be enabled.
Related APIs:
XMC_RTC_Enable(), XMC_RTC_Stop(), XMC_SCU_RESET_DeassertPeripheralReset()
void XMC_RTC_Stop ( void )
Returns
None
Description
Disables RTC peripheral to start counting time
The function stops the RTC for counting time by resetting CTR.ENB. Before stopping the RTC, hibernate domain should be enabled.
Related APIs:
XMC_RTC_Enable(), XMC_RTC_Start(), XMC_SCU_RESET_AssertPeripheralReset()
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_RTC_ALARM_t Struct Reference

XMC_RTC_ALARM_t Struct Reference
XMC Peripheral Library » RTC

#include <xmc_rtc.h>

Detailed Description

Alarm time values of RTC

The structure presents a convenient way to set/obtain the alarm time values for seconds, minutes, hours, days, month and year of RTC. The XMC_RTC_SetAlarm() and XMC_RTC_GetAlarm() can be used to populate the structure with the alarm time value of RTC

Field Documentation

uint32_t days

Alarm days compare value (0-Actual days of month: Above this causes this bitfield to be set with 0)

uint32_t hours

Alarm hours compare value (0-23: Above this causes this bitfield to be set with 0)

uint32_t minutes

Alarm minutes compare value (0-59: Above this causes this bitfield to be set with 0)

uint32_t month

Alarm month compare value (0-11: Above this causes this bitfield to be set with 0)

uint32_t seconds

Alarm seconds compare value (0-59: Above this causes this bitfield to be set with 0)

uint32_t year

Alarm year compare value

The documentation for this struct was generated from the following file:
  • xmc_rtc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_RTC_CONFIG_t Struct Reference

XMC_RTC_CONFIG_t Struct Reference
XMC Peripheral Library » RTC

#include <xmc_rtc.h>

Detailed Description

RTC initialization with time, alarm and clock divider(prescaler) configurations

The structure presents a convenient way to set/obtain the time and alarm configurations for RTC. The XMC_RTC_Init() can be used to populate the structure with the time and alarm values of RTC.

The documentation for this struct was generated from the following file:
  • xmc_rtc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_RTC_TIME_t Struct Reference

XMC_RTC_TIME_t Struct Reference
XMC Peripheral Library » RTC

#include <xmc_rtc.h>

Detailed Description

Time values of RTC

The structure presents a convenient way to set/obtain the time values for seconds, minutes, hours, days, month and year of RTC. The XMC_RTC_SetTime() and XMC_RTC_GetTime() can be used to populate the structure with the time value of RTC

Field Documentation

uint32_t days

Days time value (0-Actual days of month: Above this causes this bitfield to be set with 0)

uint32_t daysofweek

Days of week time value (0-6: Above this causes this bitfield to be set with 0)

uint32_t hours

Hours time value (0-23: Above this causes this bitfield to be set with 0)

uint32_t minutes

Minutes time value (0-59: Above this causes this bitfield to be set with 0)

uint32_t month

Month time value (0-11: Above this causes this bitfield to be set with 0)

uint32_t seconds

Seconds time value (0-59: Above this causes this bitfield to be set with 0)

uint32_t year

Year time value

The documentation for this struct was generated from the following file:
  • xmc_rtc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: SCU

Data Structures | Macros | Typedefs | Enumerations | Functions
SCU
XMC Peripheral Library

Data Structures

struct | XMC_SCU_CLOCK_CONFIG_t
struct | XMC_SCU_SUPPLYMONITOR_t

Macros

#define | XMC_SCU_BMI_CANCLK_DCO1 (0U << 11)
#define | XMC_SCU_BMI_CANCLK_OSCHP (1U << 11)
#define | XMC_SCU_BMI_DAPDIS_CHANNEL_0 (0U << 9)
#define | XMC_SCU_BMI_DAPDIS_CHANNEL_1 (1U << 9)
#define | XMC_SCU_BMI_DAPTYP_SPD (1U << 8)
#define | XMC_SCU_BMI_DAPTYP_SWD (0U << 8)
#define | XMC_SCU_BMI_HWCFG_ASC_BSL (0x00C0U)
#define | XMC_SCU_BMI_HWCFG_ASC_BSLTO (0x00D0U)
#define | XMC_SCU_BMI_HWCFG_CAN_BSL (0x0080U)
#define | XMC_SCU_BMI_HWCFG_CAN_BSLTO (0x0090U)
#define | XMC_SCU_BMI_HWCFG_SBSL (0x00FAU)
#define | XMC_SCU_BMI_HWCFG_SBSL_CANOPEN (0x00A0U)
#define | XMC_SCU_BMI_HWCFG_SSC_BSL (0x00C8U)
#define | XMC_SCU_BMI_HWCFG_SSC_BSLTO (0x00D8U)
#define | XMC_SCU_BMI_HWCFG_UMD (0x00C3U)
#define | XMC_SCU_BMI_HWCFG_UMHAR (0x00C7U)
#define | XMC_SCU_BMI_HWCFG_UPM (0x00C1U)
#define | XMC_SCU_INTERRUPT_EVENT_ACMP0 SCU_INTERRUPT_SRMSK_ACMP0I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ACMP1 SCU_INTERRUPT_SRMSK_ACMP1I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ACMP2 SCU_INTERRUPT_SRMSK_ACMP2I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ACMP3 (((int64_t)SCU_INTERRUPT_SRMSK1_ACMP3I_Msk) << 32U)
#define | XMC_SCU_INTERRUPT_EVENT_DCO1_OUT_SYNC (((int64_t)SCU_INTERRUPT_SRMSK1_DCO1OFSI_Msk) << 32U)
#define | XMC_SCU_INTERRUPT_EVENT_FLASH_COMPLETED SCU_INTERRUPT_SRCLR_FLCMPLTI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_FLASH_ERROR SCU_INTERRUPT_SRMSK_FLECC2I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_LOCI SCU_INTERRUPT_SRMSK_LOCI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_LOSS_EXT_CLOCK (((int64_t)SCU_INTERRUPT_SRMSK1_LOECI_Msk) << 32U)
#define | XMC_SCU_INTERRUPT_EVENT_ORC0 SCU_INTERRUPT_SRMSK_ORC0I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC1 SCU_INTERRUPT_SRMSK_ORC1I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC2 SCU_INTERRUPT_SRMSK_ORC2I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC3 SCU_INTERRUPT_SRMSK_ORC3I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC4 SCU_INTERRUPT_SRMSK_ORC4I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC5 SCU_INTERRUPT_SRMSK_ORC5I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC6 SCU_INTERRUPT_SRMSK_ORC6I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC7 SCU_INTERRUPT_SRMSK_ORC7I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_PEMCAN (((int64_t)SCU_INTERRUPT_SRMSK1_PEMCI_Msk) << 32U)
#define | XMC_SCU_INTERRUPT_EVENT_PESRAM SCU_INTERRUPT_SRMSK_PESRAMI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_PEUSIC0 SCU_INTERRUPT_SRMSK_PEU0I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_PEUSIC1 (((int64_t)SCU_INTERRUPT_SRMSK1_PEU1I_Msk) << 32U)
#define | XMC_SCU_INTERRUPT_EVENT_RTC_ALARM SCU_INTERRUPT_SRCLR_AI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTC_PERIODIC SCU_INTERRUPT_SRCLR_PI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCATIM0_UPDATED SCU_INTERRUPT_SRMSK_RTC_ATIM0_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCATIM1_UPDATED SCU_INTERRUPT_SRMSK_RTC_ATIM1_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCCTR_UPDATED SCU_INTERRUPT_SRMSK_RTC_CTR_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCTIM0_UPDATED SCU_INTERRUPT_SRMSK_RTC_TIM0_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCTIM1_UPDATED SCU_INTERRUPT_SRMSK_RTC_TIM1_Msk
#define | XMC_SCU_INTERRUPT_EVENT_STDBYCLKFAIL SCU_INTERRUPT_SRMSK_SBYCLKFI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_TSE_DONE SCU_INTERRUPT_SRMSK_TSE_DONE_Msk
#define | XMC_SCU_INTERRUPT_EVENT_TSE_HIGH SCU_INTERRUPT_SRMSK_TSE_HIGH_Msk
#define | XMC_SCU_INTERRUPT_EVENT_TSE_LOW SCU_INTERRUPT_SRMSK_TSE_LOW_Msk
#define | XMC_SCU_INTERRUPT_EVENT_VCLIP SCU_INTERRUPT_SRMSK_VCLIPI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_VDDPI SCU_INTERRUPT_SRMSK_VDDPI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_VDROP SCU_INTERRUPT_SRMSK_VDROPI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_WDT_WARN SCU_INTERRUPT_SRMSK_PRWARN_Msk

Typedefs

typedef void(* | XMC_SCU_INTERRUPT_EVENT_HANDLER_t) (void)
typedef uint32_t | XMC_SCU_INTERRUPT_EVENT_t

Enumerations

Functions

uint32_t | XMC_SCU_CalcTemperature (void)
void | XMC_SCU_CLOCK_CalibrateOscillatorOnTemperature (int32_t temperature)
void | XMC_SCU_CLOCK_ClearDCO1OscillatorWatchdogStatus (void)
void | XMC_SCU_CLOCK_DisableDCO1ExtRefCalibration (void)
void | XMC_SCU_CLOCK_DisableDCO1OscillatorWatchdog (void)
void | XMC_SCU_CLOCK_EnableDCO1ExtRefCalibration (XMC_SCU_CLOCK_SYNC_CLKSRC_t sync_clk, uint32_t prescaler, uint32_t syn_preload)
void | XMC_SCU_CLOCK_EnableDCO1OscillatorWatchdog (void)
void | XMC_SCU_CLOCK_GatePeripheralClock (const XMC_SCU_PERIPHERAL_CLOCK_t peripheral)
uint32_t | XMC_SCU_CLOCK_GetCpuClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetFastPeripheralClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetPeripheralClockFrequency (void)
void | XMC_SCU_CLOCK_Init (const XMC_SCU_CLOCK_CONFIG_t *const config)
bool | XMC_SCU_CLOCK_IsDCO1ExtRefCalibrationReady (void)
bool | XMC_SCU_CLOCK_IsPeripheralClockGated (const XMC_SCU_PERIPHERAL_CLOCK_t peripheral)
void | XMC_SCU_CLOCK_ScaleMCLKFrequency (uint32_t idiv, uint32_t fdiv)
void | XMC_SCU_CLOCK_SetFastPeripheralClockSource (const XMC_SCU_CLOCK_PCLKSRC_t source)
void | XMC_SCU_CLOCK_SetMCLKFrequency (uint32_t freq_khz)
void | XMC_SCU_CLOCK_UngatePeripheralClock (const XMC_SCU_PERIPHERAL_CLOCK_t peripheral)
void | XMC_SCU_DisablePrefetchUnit (void)
void | XMC_SCU_EnablePrefetchUnit (void)
uint32_t | XMC_SCU_GetMirrorStatus (void)
uint32_t | XMC_SCU_GetTemperature (void)
bool | XMC_SCU_HighTemperature (void)
void | XMC_SCU_INTERRUPT_ClearEventStatus (const XMC_SCU_INTERRUPT_EVENT_t event)
void | XMC_SCU_INTERRUPT_DisableEvent (const XMC_SCU_INTERRUPT_EVENT_t event)
void | XMC_SCU_INTERRUPT_EnableEvent (const XMC_SCU_INTERRUPT_EVENT_t event)
XMC_SCU_STATUS_t | XMC_SCU_INTERRUPT_SetEventHandler (const XMC_SCU_INTERRUPT_EVENT_t event, const XMC_SCU_INTERRUPT_EVENT_HANDLER_t handler)
void | XMC_SCU_INTERRUPT_TriggerEvent (const XMC_SCU_INTERRUPT_EVENT_t event)
XMC_SCU_INTERRUPT_EVENT_t | XMC_SCU_INTERUPT_GetEventStatus (void)
void | XMC_SCU_IRQHandler (uint32_t sr_num)
bool | XMC_SCU_IsTempMeasurementDone (void)
void | XMC_SCU_LockProtectedBits (void)
bool | XMC_SCU_LowTemperature (void)
void | XMC_SCU_POWER_DisableMonitor (void)
void | XMC_SCU_POWER_EnableMonitor (XMC_SCU_POWER_MONITOR_RANGE_t range, XMC_SCU_POWER_MONITOR_DELAY_t delay)
void | XMC_SCU_RESET_AssertMasterReset (void)
void | XMC_SCU_RESET_ClearDeviceResetReason (void)
void | XMC_SCU_RESET_EnableResetRequest (uint32_t request)
uint32_t | XMC_SCU_RESET_GetDeviceResetReason (void)
uint32_t | XMC_SCU_SetBMI (uint32_t flags, uint8_t timeout)
void | XMC_SCU_SetCcuTriggerHigh (const uint32_t trigger)
void | XMC_SCU_SetCcuTriggerLow (const uint32_t trigger)
void | XMC_SCU_SetInterruptControl (uint8_t irq_number, XMC_SCU_IRQCTRL_t source)
void | XMC_SCU_SetRawTempLimits (const uint32_t lower_temp, const uint32_t upper_temp)
XMC_SCU_STATUS_t | XMC_SCU_SetTempHighLimit (uint32_t limit)
XMC_SCU_STATUS_t | XMC_SCU_SetTempLowLimit (uint32_t limit)
void | XMC_SCU_StartTempMeasurement (void)
void | XMC_SCU_StopTempMeasurement (void)
void | XMC_SCU_SupplyMonitorInit (const XMC_SCU_SUPPLYMONITOR_t *obj)
void | XMC_SCU_UnlockProtectedBits (void)

Detailed Description

System control unit is the SoC power, reset and a clock manager with additional responsibility of providing system stability protection and other auxiliary functions.
SCU provides the following features,

  1. Power control
  2. Reset control
  3. Clock control
  4. Miscellaneous control(boot mode, system interrupts etc.)

The SCU driver is divided in to clock control logic, reset control logic, system interrupt control logic and miscellaneous control logic.

Clock driver features:

  1. Allows clock configuration using the structure XMC_SCU_CLOCK_CONFIG_t and API XMC_SCU_CLOCK_Init()
  2. Allows selection of peripheral clock frequency, XMC_SCU_CLOCK_SetFastPeripheralClockSource()
  3. Provides API to get the peripheral clock frequency, XMC_SCU_CLOCK_GetFastPeripheralClockFrequency()

Reset driver features:

  1. Allows to trigger device reset XMC_SCU_RESET_AssertMasterReset()
  2. Allows to configure multiple sources for reset, XMC_SCU_RESET_EnableResetRequest()

Interrupt driver features:

  1. Provides APIs for enabling/ disabling interrupt event generation XMC_SCU_INTERRUPT_EnableEvent(), XMC_SCU_INTERRUPT_DisableEvent()
  2. Provides API for registering callback function for events XMC_SCU_INTERRUPT_SetEventHandler()

Miscellaneous features:

  1. Allows to trigger multiple capture compare unit(CCU) channels to be started together XMC_SCU_SetCcuTriggerHigh()
  2. Enables configuration of die temperature sensor XMC_SCU_StartTempMeasurement(), XMC_SCU_SetRawTempLimits()
  3. Allows configuring supply monitor unit using the structure XMC_SCU_SUPPLYMONITOR_t and API XMC_SCU_SupplyMonitorInit()
  4. Allows handling of protected bits XMC_SCU_LockProtectedBits(), XMC_SCU_UnlockProtectedBits()

Macro Definition Documentation

#define XMC_SCU_BMI_CANCLK_DCO1 (0U << 11)

Synchronous CAN clock via internal oscillator (DCO1) with enabled trimming via external reference is selected

#define XMC_SCU_BMI_CANCLK_OSCHP (1U << 11)

Synchronous CAN clock via external oscillator (OSC_HP) is selected

#define XMC_SCU_BMI_DAPDIS_CHANNEL_0 (0U << 9)

SWD/SPD_0 pin is selected

#define XMC_SCU_BMI_DAPDIS_CHANNEL_1 (1U << 9)

SWD/SPD_1 pin is selected

#define XMC_SCU_BMI_DAPTYP_SPD (1U << 8)

Single pin debug (SPD) interface is selected

#define XMC_SCU_BMI_DAPTYP_SWD (0U << 8)

Serial wire debug (SWD) interface is selected

#define XMC_SCU_BMI_HWCFG_ASC_BSL (0x00C0U)

ASC Bootstrap Loader Start-up Mode

#define XMC_SCU_BMI_HWCFG_ASC_BSLTO (0x00D0U)

ASC BSL Start-up Mode with time-out

#define XMC_SCU_BMI_HWCFG_CAN_BSL (0x0080U)

CAN Bootstrap Loader Start-up Mode

#define XMC_SCU_BMI_HWCFG_CAN_BSLTO (0x0090U)

CAN Bootstrap Loader Start-up Mode with time-out

#define XMC_SCU_BMI_HWCFG_SBSL (0x00FAU)

Secure Bootstrap Loader Start-up Mode over ASC

#define XMC_SCU_BMI_HWCFG_SBSL_CANOPEN (0x00A0U)

Secure Bootstrap Loader Start-up Mode over CANopen

#define XMC_SCU_BMI_HWCFG_SSC_BSL (0x00C8U)

SSC Bootstrap Loader Start-up Mode

#define XMC_SCU_BMI_HWCFG_SSC_BSLTO (0x00D8U)

SSC BSL Start-up Mode with time-out

#define XMC_SCU_BMI_HWCFG_UMD (0x00C3U)

User Start-up Mode with debug enabled

#define XMC_SCU_BMI_HWCFG_UMHAR (0x00C7U)

User Start-up Mode with debug enabled and halt after reset (HAR)

#define XMC_SCU_BMI_HWCFG_UPM (0x00C1U)

User productive Start-up Mode

#define XMC_SCU_INTERRUPT_EVENT_ACMP0 SCU_INTERRUPT_SRMSK_ACMP0I_Msk

Analog comparator-0 output event.

#define XMC_SCU_INTERRUPT_EVENT_ACMP1 SCU_INTERRUPT_SRMSK_ACMP1I_Msk

Analog comparator-1 output event.

#define XMC_SCU_INTERRUPT_EVENT_ACMP2 SCU_INTERRUPT_SRMSK_ACMP2I_Msk

Analog comparator-2 output event.

#define XMC_SCU_INTERRUPT_EVENT_ACMP3 (((int64_t)SCU_INTERRUPT_SRMSK1_ACMP3I_Msk) << 32U)

Analog comparator-3 output event.

Note
Only available for XMC1400 series
#define XMC_SCU_INTERRUPT_EVENT_DCO1_OUT_SYNC (((int64_t)SCU_INTERRUPT_SRMSK1_DCO1OFSI_Msk) << 32U)

DCO1 Out of SYNC Event.

Note
Only available for XMC1400 series
#define XMC_SCU_INTERRUPT_EVENT_FLASH_COMPLETED SCU_INTERRUPT_SRCLR_FLCMPLTI_Msk

Flash operation completion event.

#define XMC_SCU_INTERRUPT_EVENT_FLASH_ERROR SCU_INTERRUPT_SRMSK_FLECC2I_Msk

Flash ECC double bit error event.

#define XMC_SCU_INTERRUPT_EVENT_LOCI SCU_INTERRUPT_SRMSK_LOCI_Msk

Loss of clock event.

#define XMC_SCU_INTERRUPT_EVENT_LOSS_EXT_CLOCK (((int64_t)SCU_INTERRUPT_SRMSK1_LOECI_Msk) << 32U)

Loss of external OSC_HP clock event.

Note
Only available for XMC1400 series
#define XMC_SCU_INTERRUPT_EVENT_ORC0 SCU_INTERRUPT_SRMSK_ORC0I_Msk

Out of range comparator-0 event.

#define XMC_SCU_INTERRUPT_EVENT_ORC1 SCU_INTERRUPT_SRMSK_ORC1I_Msk

Out of range comparator-1 event.

#define XMC_SCU_INTERRUPT_EVENT_ORC2 SCU_INTERRUPT_SRMSK_ORC2I_Msk

Out of range comparator-2 event.

#define XMC_SCU_INTERRUPT_EVENT_ORC3 SCU_INTERRUPT_SRMSK_ORC3I_Msk

Out of range comparator-3 event.

#define XMC_SCU_INTERRUPT_EVENT_ORC4 SCU_INTERRUPT_SRMSK_ORC4I_Msk

Out of range comparator-4 event.

#define XMC_SCU_INTERRUPT_EVENT_ORC5 SCU_INTERRUPT_SRMSK_ORC5I_Msk

Out of range comparator-5 event.

#define XMC_SCU_INTERRUPT_EVENT_ORC6 SCU_INTERRUPT_SRMSK_ORC6I_Msk

Out of range comparator-6 event.

#define XMC_SCU_INTERRUPT_EVENT_ORC7 SCU_INTERRUPT_SRMSK_ORC7I_Msk

Out of range comparator-7 event.

#define XMC_SCU_INTERRUPT_EVENT_PEMCAN (((int64_t)SCU_INTERRUPT_SRMSK1_PEMCI_Msk) << 32U)

MultiCAN SRAM Parity Error Event.

#define XMC_SCU_INTERRUPT_EVENT_PESRAM SCU_INTERRUPT_SRMSK_PESRAMI_Msk

PSRAM Parity error event.

#define XMC_SCU_INTERRUPT_EVENT_PEUSIC0 SCU_INTERRUPT_SRMSK_PEU0I_Msk

USIC0 Parity error event.

#define XMC_SCU_INTERRUPT_EVENT_PEUSIC1 (((int64_t)SCU_INTERRUPT_SRMSK1_PEU1I_Msk) << 32U)

USIC1 Parity error event.

#define XMC_SCU_INTERRUPT_EVENT_RTC_ALARM SCU_INTERRUPT_SRCLR_AI_Msk

RTC alarm event.

#define XMC_SCU_INTERRUPT_EVENT_RTC_PERIODIC SCU_INTERRUPT_SRCLR_PI_Msk

RTC periodic event.

#define XMC_SCU_INTERRUPT_EVENT_RTCATIM0_UPDATED SCU_INTERRUPT_SRMSK_RTC_ATIM0_Msk

RTCATIM0 register update event.

#define XMC_SCU_INTERRUPT_EVENT_RTCATIM1_UPDATED SCU_INTERRUPT_SRMSK_RTC_ATIM1_Msk

RTCATIM1 register update event.

#define XMC_SCU_INTERRUPT_EVENT_RTCCTR_UPDATED SCU_INTERRUPT_SRMSK_RTC_CTR_Msk

RTCCTR register update event.

#define XMC_SCU_INTERRUPT_EVENT_RTCTIM0_UPDATED SCU_INTERRUPT_SRMSK_RTC_TIM0_Msk

RTCTIM0 register update event.

#define XMC_SCU_INTERRUPT_EVENT_RTCTIM1_UPDATED SCU_INTERRUPT_SRMSK_RTC_TIM1_Msk

RTCTIM1 register update event.

#define XMC_SCU_INTERRUPT_EVENT_STDBYCLKFAIL SCU_INTERRUPT_SRMSK_SBYCLKFI_Msk

Standby clock failure event.

#define XMC_SCU_INTERRUPT_EVENT_TSE_DONE SCU_INTERRUPT_SRMSK_TSE_DONE_Msk

Temperature measurement Completion event.

#define XMC_SCU_INTERRUPT_EVENT_TSE_HIGH SCU_INTERRUPT_SRMSK_TSE_HIGH_Msk

Temperature too high event.

#define XMC_SCU_INTERRUPT_EVENT_TSE_LOW SCU_INTERRUPT_SRMSK_TSE_LOW_Msk

Temperature too low event.

#define XMC_SCU_INTERRUPT_EVENT_VCLIP SCU_INTERRUPT_SRMSK_VCLIPI_Msk

VCLIP event.

#define XMC_SCU_INTERRUPT_EVENT_VDDPI SCU_INTERRUPT_SRMSK_VDDPI_Msk

VDDP pre-warning event.

#define XMC_SCU_INTERRUPT_EVENT_VDROP SCU_INTERRUPT_SRMSK_VDROPI_Msk

VDROP event.

#define XMC_SCU_INTERRUPT_EVENT_WDT_WARN SCU_INTERRUPT_SRMSK_PRWARN_Msk

WDT pre-warning event.

Typedef Documentation

typedef void(* XMC_SCU_INTERRUPT_EVENT_HANDLER_t) (void)

Function pointer type used for registering callback functions on SCU event occurrence.

typedef uint32_t XMC_SCU_INTERRUPT_EVENT_t

Defines list of events that can generate SCU interrupt. These enums can be used to configure events in SRMSK register for assertion of interrupt. All the enum items are tabulated as per bits present in SRMSK register. Use type XMC_SCU_INTERRUPT_EVENT_t for accessing these enum parameters. These enums can also be used for checking the status of events from the SRSTAT register.

Enumeration Type Documentation

enum XMC_SCU_CCU_TRIGGER_t

Defines options for Capture/Compare unit timer slice trigger that enables synchronous start function available on the SCU, CCUCON register. Use type XMC_SCU_CCU_TRIGGER_t for accessing these enum parameters.

Enumerator
XMC_SCU_CCU_TRIGGER_CCU40 | Trigger CCU40 peripheral.
XMC_SCU_CCU_TRIGGER_CCU80 | Trigger CCU80 peripheral.
XMC_SCU_CCU_TRIGGER_CCU41 | Trigger CCU40 peripheral.
XMC_SCU_CCU_TRIGGER_CCU81 | Trigger CCU80 peripheral.
enum XMC_SCU_CLOCK_DCLKSRC_t

DCLK clock source selection

Note
Only available in XMC1400 series
Enumerator
XMC_SCU_CLOCK_DCLKSRC_DCO1 | Internal oscillator DCO1 (48MHz)
XMC_SCU_CLOCK_DCLKSRC_EXT_XTAL | External crystal oscillator
enum XMC_SCU_CLOCK_OSCHP_MODE_t

OSCHP mode

Note
Only available in XMC1400 series
Enumerator
XMC_SCU_CLOCK_OSCHP_MODE_OSC | Oscillator is enabled and in active power mode with shaper enabled
XMC_SCU_CLOCK_OSCHP_MODE_DIRECT | Oscillator in power down mode with shaper enabled
XMC_SCU_CLOCK_OSCHP_MODE_DISABLED | Oscillator in power down mode with shaper enabled
enum XMC_SCU_CLOCK_OSCLP_MODE_t

OSCLP mode

Note
Only available in XMC1400 series
Enumerator
XMC_SCU_CLOCK_OSCLP_MODE_OSC | Oscillator is enabled and in active power mode with shaper enabled
XMC_SCU_CLOCK_OSCLP_MODE_DISABLED | Oscillator in power down mode with shaper enabled
enum XMC_SCU_CLOCK_PCLKSRC_t

Defines possible sources of peripheral clock (PCLK). These enums can be used to configure PCLKSEL bits of CLKCR Clock Control Register. Use type XMC_SCU_CLOCK_PCLKSRC_t for accessing these enum parameters.

Enumerator
XMC_SCU_CLOCK_PCLKSRC_MCLK | MCLK as the source for PCLK.
XMC_SCU_CLOCK_PCLKSRC_DOUBLE_MCLK | Source of PCLK is twice the MCLK.
enum XMC_SCU_CLOCK_RTCCLKSRC_t

Defines possible sources of RTC clock. These enums can be used to configure RTCCLKSEL bits of CLKCR Clock Control Register. Use type XMC_SCU_CLOCK_RTCCLKSRC_t for accessing these enum parameters.

Enumerator
XMC_SCU_CLOCK_RTCCLKSRC_DCO2

RTC clock source is standby clock.

XMC_SCU_CLOCK_RTCCLKSRC_ERU_IOUT0

RTC clock source is external clock from ERU0.IOUT0.

XMC_SCU_CLOCK_RTCCLKSRC_ACMP0_OUT

RTC clock source is external clock from ACMP0.OUT.

XMC_SCU_CLOCK_RTCCLKSRC_ACMP1_OUT

RTC clock source is external clock from ACMP1.OUT.

XMC_SCU_CLOCK_RTCCLKSRC_ACMP2_OUT

RTC clock source is external clock from ACMP2.OUT.

XMC_SCU_CLOCK_RTCCLKSRC_OSCLP

32.768kHz XTAL clock via OSC_LP.

Note
Only available for XMC1400 series
enum XMC_SCU_CLOCK_SYNC_CLKSRC_t

Clock source for synchronization

Note
Only available in XMC1400 series
enum XMC_SCU_IRQCTRL_t

Selects the service request connected to the interrupt node.

Note
Only available for XMC1400 series
Enumerator
XMC_SCU_IRQCTRL_SCU_SR0_IRQ0 | SCU_SR0 connected to IRQ0
XMC_SCU_IRQCTRL_CAN0_SR0_IRQ0 | CAN0_SR0 connected to IRQ0
XMC_SCU_IRQCTRL_CCU40_SR0_IRQ0 | CCU40_SR0 connected to IRQ0
XMC_SCU_IRQCTRL_SCU_SR0_OR_CAN0_SR0_IRQ0 | SCU_SR0 and CAN_SR0 are both connected to IRQ0
XMC_SCU_IRQCTRL_SCU_SR1_IRQ1 | SCU_SR1 connected to IRQ1
XMC_SCU_IRQCTRL_CAN0_SR1_IRQ1 | CAN0_SR1 connected to IRQ1
XMC_SCU_IRQCTRL_CCU80_SR0_IRQ1 | CCU80_SR0 connected to IRQ1
XMC_SCU_IRQCTRL_SCU_SR1_OR_CAN0_SR1_IRQ1 | SCU_SR1 and CAN0_SR1 connected to IRQ1
XMC_SCU_IRQCTRL_SCU_SR2_IRQ2 | SCU_SR2 connected to IRQ2
XMC_SCU_IRQCTRL_CAN0_SR2_IRQ2 | CAN0_SR2 connected to IRQ2
XMC_SCU_IRQCTRL_CCU80_SR1_IRQ2 | CCU80_SR1 connected to IRQ2
XMC_SCU_IRQCTRL_SCU_SR2_OR_CAN0_SR2_IRQ2 | SCU_SR2 and CAN0_SR2 connected to IRQ2
XMC_SCU_IRQCTRL_ERU0_SR0_IRQ3 | ERU0_SR0 connected to IRQ3
XMC_SCU_IRQCTRL_ERU1_SR0_IRQ3 | ERU1_SR0 connected to IRQ3
XMC_SCU_IRQCTRL_CAN0_SR0_IRQ3 | CAN0_SR0 connected to IRQ3
XMC_SCU_IRQCTRL_ERU0_SR0_OR_ERU1_SR0_IRQ3 | ERU0_SR0 and ERU1_SR0 connected to IRQ3
XMC_SCU_IRQCTRL_ERU0_SR1_IRQ4 | ERU0_SR1 connected to IRQ4
XMC_SCU_IRQCTRL_ERU1_SR1_IRQ4 | ERU1_SR1 connected to IRQ4
XMC_SCU_IRQCTRL_CAN0_SR1_IRQ4 | CAN0_SR1 connected to IRQ4
XMC_SCU_IRQCTRL_ERU0_SR1_OR_ERU1_SR1_IRQ4 | ERU0_SR1 and ERU1_SR1 connected to IRQ4
XMC_SCU_IRQCTRL_ERU0_SR2_IRQ5 | ERU0_SR2 connected to IRQ5
XMC_SCU_IRQCTRL_ERU1_SR2_IRQ5 | ERU1_SR2 connected to IRQ5
XMC_SCU_IRQCTRL_CAN0_SR2_IRQ5 | CAN0_SR2 connected to IRQ5
XMC_SCU_IRQCTRL_ERU0_SR2_OR_ERU1_SR2_IRQ5 | ERU0_SR2 and ERU1_SR2 connected to IRQ5
XMC_SCU_IRQCTRL_ERU0_SR3_IRQ6 | ERU0_SR3 connected to IRQ6
XMC_SCU_IRQCTRL_ERU1_SR3_IRQ6 | ERU1_SR3 connected to IRQ6
XMC_SCU_IRQCTRL_CAN0_SR3_IRQ6 | CAN0_SR3 connected to IRQ6
XMC_SCU_IRQCTRL_ERU0_SR3_OR_ERU1_SR3_IRQ6 | ERU0_SR3 and ERU1_SR3 connected to IRQ6
XMC_SCU_IRQCTRL_MATH_SR0_IRQ7 | MATH_SR0 connected to IRQ7
XMC_SCU_IRQCTRL_CAN0_SR3_IRQ7 | CAN0_SR3 connected to IRQ7
XMC_SCU_IRQCTRL_CCU40_SR1_IRQ7 | CCU40_SR1 connected to IRQ7
XMC_SCU_IRQCTRL_MATH_SR0_OR_CAN0_SR3_IRQ7 | MATH_SR0 and CAN0_SR3 connected to IRQ7
XMC_SCU_IRQCTRL_LEDTS2_SR0_IRQ8 | LEDTS2_SR0 connected to IRQ8
XMC_SCU_IRQCTRL_CCU40_SR0_IRQ8 | CCU40_SR0 connected to IRQ8
XMC_SCU_IRQCTRL_CCU80_SR0_IRQ8 | CCU80_SR0 connected to IRQ8
XMC_SCU_IRQCTRL_LEDTS2_SR0_OR_CCU40_SR0_IRQ8 | LEDTS2_SR0 and CCU40_SR0 connected to IRQ8
XMC_SCU_IRQCTRL_USIC0_SR0_IRQ9 | USIC0_SR0 connected to IRQ9
XMC_SCU_IRQCTRL_USIC1_SR0_IRQ9 | USIC1_SR0 connected to IRQ9
XMC_SCU_IRQCTRL_ERU0_SR0_IRQ9 | ERU0_SR0 connected to IRQ9
XMC_SCU_IRQCTRL_USIC0_SR0_OR_USIC1_SR0_IRQ9 | USIC0_SR0 and USIC1_SR0 connected to IRQ9
XMC_SCU_IRQCTRL_USIC0_SR1_IRQ10 | USIC0_SR1 connected to IRQ10
XMC_SCU_IRQCTRL_USIC1_SR1_IRQ10 | USIC1_SR1 connected to IRQ10
XMC_SCU_IRQCTRL_ERU0_SR1_IRQ10 | ERU0_SR1 connected to IRQ10
XMC_SCU_IRQCTRL_USIC0_SR1_OR_USIC1_SR1_IRQ10 | USIC0_SR1 and USIC1_SR1 connected to IRQ10
XMC_SCU_IRQCTRL_USIC0_SR2_IRQ11 | USIC0_SR2 connected to IRQ11
XMC_SCU_IRQCTRL_USIC1_SR2_IRQ11 | USIC1_SR2 connected to IRQ11
XMC_SCU_IRQCTRL_ERU0_SR2_IRQ11 | ERU0_SR2 connected to IRQ11
XMC_SCU_IRQCTRL_USIC0_SR2_OR_USIC1_SR2_IRQ11 | USIC0_SR2 and USIC1_SR2 connected to IRQ11
XMC_SCU_IRQCTRL_USIC0_SR3_IRQ12 | USIC0_SR3 connected to IRQ12
XMC_SCU_IRQCTRL_USIC1_SR3_IRQ12 | USIC1_SR3 connected to IRQ12
XMC_SCU_IRQCTRL_ERU0_SR3_IRQ12 | ERU0_SR3 connected to IRQ12
XMC_SCU_IRQCTRL_USIC0_SR3_OR_USIC1_SR3_IRQ12 | USIC0_SR3 and USIC1_SR3 connected to IRQ12
XMC_SCU_IRQCTRL_USIC0_SR4_IRQ13 | USIC0_SR4 connected to IRQ13
XMC_SCU_IRQCTRL_USIC1_SR4_IRQ13 | USIC1_SR4 connected to IRQ13
XMC_SCU_IRQCTRL_CCU80_SR1_IRQ13 | CCU80_SR1 connected to IRQ13
XMC_SCU_IRQCTRL_USIC0_SR4_OR_USIC1_SR4_IRQ13 | USIC0_SR4 and USIC1_SR4 connected to IRQ13
XMC_SCU_IRQCTRL_USIC0_SR5_IRQ14 | USIC0_SR5 connected to IRQ14
XMC_SCU_IRQCTRL_USIC1_SR5_IRQ14 | USIC1_SR5 connected to IRQ14
XMC_SCU_IRQCTRL_POSIF0_SR0_IRQ14 | POSIF0_SR0 connected to IRQ14
XMC_SCU_IRQCTRL_USIC0_SR5_OR_USIC1_SR5_IRQ14 | USIC0_SR5 and USIC1_SR5 connected to IRQ14
XMC_SCU_IRQCTRL_VADC0_C0SR0_IRQ15 | VADC0_C0SR0 connected to IRQ15
XMC_SCU_IRQCTRL_USIC0_SR0_IRQ15 | USIC0_SR0 connected to IRQ15
XMC_SCU_IRQCTRL_POSIF0_SR1_IRQ15 | POSIF0_SR1 connected to IRQ15
XMC_SCU_IRQCTRL_VADC0_C0SR0_OR_USIC0_SR0_IRQ15 | VADC0_C0SR0 and USIC0_SR0 connected to IRQ15
XMC_SCU_IRQCTRL_VADC0_C0SR1_IRQ16 | VADC0_C0SR1 connected to IRQ16
XMC_SCU_IRQCTRL_USIC0_SR1_IRQ16 | USIC0_SR1 connected to IRQ16
XMC_SCU_IRQCTRL_CCU40_SR2_IRQ16 | CCU40_SR2 connected to IRQ16
XMC_SCU_IRQCTRL_VADC0_C0SR1_OR_USIC0_SR1_IRQ16 | VADC0_C0SR1 and USIC0_SR1 connected to IRQ16
XMC_SCU_IRQCTRL_VADC0_G0SR0_IRQ17 | VADC0_G0SR0 connected to IRQ17
XMC_SCU_IRQCTRL_USIC0_SR2_IRQ17 | USIC0_SR2 connected to IRQ17
XMC_SCU_IRQCTRL_CAN0_SR0_IRQ17 | CAN0_SR0 connected to IRQ17
XMC_SCU_IRQCTRL_VADC0_G0SR0_OR_USIC0_SR2_IRQ17 | VADC0_G0SR0 and USIC0_SR2 connected to IRQ17
XMC_SCU_IRQCTRL_VADC0_G0SR1_IRQ18 | VADC0_G0SR1 connected to IRQ18
XMC_SCU_IRQCTRL_USIC0_SR3_IRQ18 | USIC0_SR3 connected to IRQ18
XMC_SCU_IRQCTRL_CAN0_SR1_IRQ18 | CAN0_SR1 connected to IRQ18
XMC_SCU_IRQCTRL_VADC0_G0SR1_OR_USIC0_SR3_IRQ18 | VADC0_G0SR1 and USIC0_SR3 connected to IRQ18
XMC_SCU_IRQCTRL_VADC0_G1SR0_IRQ19 | VADC0_G1SR0 connected to IRQ19
XMC_SCU_IRQCTRL_USIC0_SR4_IRQ19 | USIC0_SR4 connected to IRQ19
XMC_SCU_IRQCTRL_CAN0_SR2_IRQ19 | CAN0_SR2 connected to IRQ19
XMC_SCU_IRQCTRL_VADC0_G1SR0_OR_USIC0_SR4_IRQ19 | VADC0_G1SR0 and USIC0_SR4 connected to IRQ19
XMC_SCU_IRQCTRL_VADC0_G1SR1_IRQ20 | VADC0_G1SR1 connected to IRQ20
XMC_SCU_IRQCTRL_USIC0_SR5_IRQ20 | USIC0_SR5 connected to IRQ20
XMC_SCU_IRQCTRL_CAN0_SR4_IRQ20 | CAN0_SR4 connected to IRQ20
XMC_SCU_IRQCTRL_VADC0_G1SR1_OR_USIC0_SR5_IRQ20 | VADC0_G1SR1 and USIC0_SR5 connected to IRQ20
XMC_SCU_IRQCTRL_CCU40_SR0_IRQ21 | CCU40_SR0 connected to IRQ21
XMC_SCU_IRQCTRL_CCU41_SR0_IRQ21 | CCU41_SR0 connected to IRQ21
XMC_SCU_IRQCTRL_USIC0_SR0_IRQ21 | USIC0_SR0 connected to IRQ21
XMC_SCU_IRQCTRL_CCU40_SR0_OR_CCU41_SR0_IRQ21 | CCU40_SR0 and CCU41_SR0 connected to IRQ21
XMC_SCU_IRQCTRL_CCU40_SR1_IRQ22 | CCU40_SR1 connected to IRQ22
XMC_SCU_IRQCTRL_CCU41_SR1_IRQ22 | CCU41_SR1 connected to IRQ22
XMC_SCU_IRQCTRL_USIC0_SR1_IRQ22 | USIC0_SR1 connected to IRQ22
XMC_SCU_IRQCTRL_CCU40_SR0_OR_CCU41_SR0_IRQ22 | CCU40_SR0 and CCU41_SR0 connected to IRQ22
XMC_SCU_IRQCTRL_CCU40_SR2_IRQ23 | CCU40_SR2 connected to IRQ23
XMC_SCU_IRQCTRL_CCU41_SR2_IRQ23 | CCU41_SR2 connected to IRQ23
XMC_SCU_IRQCTRL_USIC0_SR2_IRQ23 | USIC0_SR2 connected to IRQ23
XMC_SCU_IRQCTRL_CCU40_SR2_OR_CCU41_SR2_IRQ23 | CCU40_SR2 and CCU41_SR2 connected to IRQ23
XMC_SCU_IRQCTRL_CCU40_SR3_IRQ24 | CCU40_SR3 connected to IRQ24
XMC_SCU_IRQCTRL_CCU41_SR3_IRQ24 | CCU41_SR3 connected to IRQ24
XMC_SCU_IRQCTRL_USIC0_SR3_IRQ24 | USIC0_SR3 connected to IRQ24
XMC_SCU_IRQCTRL_CCU40_SR3_OR_CCU41_SR3_IRQ24 | CCU40_SR3 and CCU41_SR3 connected to IRQ24
XMC_SCU_IRQCTRL_CCU80_SR0_IRQ25 | CCU80_SR0 connected to IRQ25
XMC_SCU_IRQCTRL_CCU81_SR0_IRQ25 | CCU81_SR0 connected to IRQ25
XMC_SCU_IRQCTRL_USIC0_SR4_IRQ25 | USIC0_SR4 connected to IRQ25
XMC_SCU_IRQCTRL_CCU80_SR0_OR_CCU81_SR0_IRQ25 | CCU80_SR0 and CCU81_SR0 connected to IRQ25
XMC_SCU_IRQCTRL_CCU80_SR1_IRQ26 | CCU80_SR1 connected to IRQ26
XMC_SCU_IRQCTRL_CCU81_SR1_IRQ26 | CCU81_SR1 connected to IRQ26
XMC_SCU_IRQCTRL_USIC0_SR5_IRQ26 | USIC0_SR5 connected to IRQ26
XMC_SCU_IRQCTRL_CCU80_SR1_OR_CCU81_SR1_IRQ26 | CCU80_SR1 and CCU81_SR1 connected to IRQ26
XMC_SCU_IRQCTRL_POSIF0_SR0_IRQ27 | POSIF0_SR0 connected to IRQ27
XMC_SCU_IRQCTRL_POSIF1_SR0_IRQ27 | POSIF1_SR0 connected to IRQ27
XMC_SCU_IRQCTRL_CCU40_SR3_IRQ27 | CCU40_SR3 connected to IRQ27
XMC_SCU_IRQCTRL_POSIF0_SR0_OR_POSIF1_SR0_IRQ27 | POSIF0_SR0 and POSIF1_SR0 connected to IRQ27
XMC_SCU_IRQCTRL_POSIF0_SR1_IRQ28 | POSIF0_SR1 connected to IRQ28
XMC_SCU_IRQCTRL_POSIF1_SR1_IRQ28 | POSIF1_SR1 connected to IRQ28
XMC_SCU_IRQCTRL_ERU0_SR0_IRQ28 | ERU0_SR0 connected to IRQ28
XMC_SCU_IRQCTRL_POSIF0_SR1_OR_POSIF1_SR1_IRQ28 | POSIF0_SR1 and POSIF1_SR1 connected to IRQ28
XMC_SCU_IRQCTRL_LEDTS0_SR0_IRQ29 | LEDTS0_SR0 connected to IRQ29
XMC_SCU_IRQCTRL_CCU40_SR1_IRQ29 | CCU40_SR1 connected to IRQ29
XMC_SCU_IRQCTRL_ERU0_SR1_IRQ29 | ERU0_SR1 connected to IRQ29
XMC_SCU_IRQCTRL_LEDTS0_SR0_OR_CCU40_SR1_IRQ29 | LEDTS0_SR0 and CCU40_SR1 connected to IRQ29
XMC_SCU_IRQCTRL_LEDTS1_SR0_IRQ30 | LEDTS1_SR0 connected to IRQ30
XMC_SCU_IRQCTRL_CCU40_SR2_IRQ30 | CCU40_SR2 connected to IRQ30
XMC_SCU_IRQCTRL_ERU0_SR2_IRQ30 | ERU0_SR2 connected to IRQ30
XMC_SCU_IRQCTRL_LEDTS0_SR0_OR_CCU40_SR1_IRQ30 | LEDTS0_SR0 and CCU40_SR1 connected to IRQ30
XMC_SCU_IRQCTRL_BCCU0_SR0_IRQ31 | BCCU0_SR0 connected to IRQ31
XMC_SCU_IRQCTRL_CCU40_SR3_IRQ31 | CCU40_SR3 connected to IRQ31
XMC_SCU_IRQCTRL_ERU0_SR3_IRQ31 | ERU0_SR3 connected to IRQ31
XMC_SCU_IRQCTRL_BCCU0_SR0_OR_CCU40_SR3_IRQ31 | BCCU0_SR0 and CCU40_SR3 connected to IRQ31
enum XMC_SCU_PERIPHERAL_CLOCK_t

Defines the list of peripherals that support clock gating. After a master reset, only core, memories, SCU and PORT peripheral are not clock gated. The rest of the peripherals are by default clock gated. All the enum items are tabulated as per bits present in CGATSTAT0 register. Use type XMC_SCU_PERIPHERAL_CLOCK_t for accessing these enum parameters.

Note
Peripherals availability depends on device
Enumerator
XMC_SCU_PERIPHERAL_CLOCK_CCU80 | CCU80 peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_CCU40 | CCU40 peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_USIC0 | USIC0 peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_BCCU0 | BCCU0 peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_LEDTS0 | LEDTS0 peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_LEDTS1 | LEDTS1 peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_POSIF0 | POSIF0 peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_MATH | MATH peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_WDT | WDT peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_RTC | RTC peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_CCU81 | CCU80 peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_CCU41 | CCU80 peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_USIC1 | USIC0 peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_LEDTS2 | LEDTS1 peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_POSIF1 | POSIF0 peripheral clock gate.
XMC_SCU_PERIPHERAL_CLOCK_MCAN | POSIF0 peripheral clock gate.
enum XMC_SCU_POWER_MONITOR_DELAY_t

TODO

enum XMC_SCU_POWER_MONITOR_RANGE_t

TODO

enum XMC_SCU_RESET_REASON_t

Defines the cause of last reset. The cause of last reset gets automatically stored in the SCU_RSTSTAT register and can be checked by user software to determine the state of the system and for debug purpose. All the enum items are tabulated as per bits present in SCU_RSTSTAT register. Use type XMC_SCU_RESET_REASON_t for accessing these enum parameters.

Enumerator
XMC_SCU_RESET_REASON_PORST | Reset due to Power On reset.
XMC_SCU_RESET_REASON_MASTER | Reset due to Master reset.
XMC_SCU_RESET_REASON_SW | Reset due to Software initiated reset.
XMC_SCU_RESET_REASON_LOCKUP | Reset due to CPU lockup.
XMC_SCU_RESET_REASON_FLASH | Reset due to flash error.
XMC_SCU_RESET_REASON_WATCHDOG | Reset due to watchdog.
XMC_SCU_RESET_REASON_CLOCK_LOSS | Reset due to clock loss.
XMC_SCU_RESET_REASON_PARITY_ERROR | Reset due to RAM parity error.
enum XMC_SCU_STATUS_t

Defines the status of SCU API execution, used to verify the SCU related API calls.

Enumerator
XMC_SCU_STATUS_OK | SCU related operation successfully completed.
XMC_SCU_STATUS_ERROR | SCU related operation failed. When API cannot fulfill request, this value is returned.
XMC_SCU_STATUS_BUSY | Cannot execute the SCU related operation request because another operation is in progress. XMC_SCU_STATUS_BUSY is returned when API is busy processing another request.
enum XMC_SCU_SYSTEM_RESET_REQUEST_t

Defines the reset sources that can cause device reset. These enums can be used to configure reset source in reset control RSTCON register which enables different reset sources to identify the reset cause. The SCU_RSTSTAT register can be checked by user software to determine the state of the system and for debug purpose. Use type XMC_SCU_SYSTEM_RESET_REQUEST_t for accessing these enum parameters.

Enumerator
XMC_SCU_RESET_REQUEST_FLASH_ECC_ERROR | Reset when ECC double bit error occurs.
XMC_SCU_RESET_REQUEST_CLOCK_LOSS | Reset when loss of clock occurs.
XMC_SCU_RESET_REQUEST_SRAM_PARITY_ERROR | Reset when SRAM parity error occurs.
XMC_SCU_RESET_REQUEST_USIC_SRAM_PARITY_ERROR | Reset when USIC0 memory parity error occurs.

Function Documentation

uint32_t XMC_SCU_CalcTemperature ( void )
Returns
uint32_t Calculate die temperature value. Range: 16 bit value.
Description
Calculates the die temperature value using ROM function.

Related APIs:
XMC_SCU_StartTempMeasurement()

void XMC_SCU_CLOCK_CalibrateOscillatorOnTemperature ( int32_t temperature )
Parameters
temperature measured temperature using the on-chip temperature sensor
Returns
None
Description
DCO1 clock frequency can be calibrated during runtime to achieve a better accuracy. This function start the DCO1 calibration based on temperature.
void XMC_SCU_CLOCK_ClearDCO1OscillatorWatchdogStatus ( void )
Returns
None
Description
This function clears the status of the watchdog on the DCO1 frequency
Note
Only available for XMC1400 series
void XMC_SCU_CLOCK_DisableDCO1ExtRefCalibration ( void )
Returns
None
Description
This function stops the automatic DCO1 calibration based on the selected clock source.
Note
Only available for XMC1400 series
void XMC_SCU_CLOCK_DisableDCO1OscillatorWatchdog ( void )
Returns
None
Description
This function disables the watchdog on the DCO1 frequency
Note
Only available for XMC1400 series
void XMC_SCU_CLOCK_EnableDCO1ExtRefCalibration | ( | XMC_SCU_CLOCK_SYNC_CLKSRC_t | sync_clk,
 |  | uint32_t | prescaler,
 |  | uint32_t | syn_preload
 | ) |  |
Parameters
sync_clk | Clock source selected as external reference. XMC_SCU_CLOCK_SYNC_CLKSRC_t
prescaler | integer( \(\frac{3000 \times f_{OSC}[MHz]}{48}\))
syn_preload | integer( \(\frac{48 \times prescaler}{f_{OSC}[MHz]}\))
Returns
None
Description
DCO1 clock frequency can be calibrated during runtime to achieve a better accuracy. This function starts the automatic DCO1 calibration based on the selected clock source.
Note
Only available for XMC1400 series
void XMC_SCU_CLOCK_EnableDCO1OscillatorWatchdog ( void )
Returns
None
Description
This function enables the watchdog on the DCO1 frequency
Note
Only available for XMC1400 series
void XMC_SCU_CLOCK_GatePeripheralClock ( const XMC_SCU_PERIPHERAL_CLOCK_t peripheral )
Parameters
peripheral The peripheral for which the clock has to be gated. Range: Use type XMC_SCU_PERIPHERAL_CLOCK_t to identify the peripheral clock to be gated.
Returns
None
Description
Blocks the supply of clock to the selected peripheral.

Clock gating helps in reducing the power consumption. User can selectively gate the clocks of unused peripherals. fPCLK is the source of clock to various peripherals. Some peripherals support clock gate. Such a gate blocks the clock supply for the selected peripheral. Software can request for individual gating of such peripheral clocks by enabling the SCU_CGATSET0 register bit field. Every bit in SCU_CGATSET0 register is protected by the bit protection scheme. Access to protected bit fields are handled internally. Note: Clock gating shall not be activated unless the module is in reset state. So use XMC_SCU_CLOCK_IsPeripheralClockGated() API before enabling the gating of any peripheral.
Related APIs:
XMC_SCU_CLOCK_IsPeripheralClockGated(), XMC_SCU_CLOCK_UngatePeripheralClock()

uint32_t XMC_SCU_CLOCK_GetCpuClockFrequency ( void )
Returns
uint32_t Value of CPU clock frequency.
Description
Provides the vlaue of CPU clock frequency.

The value is stored in a global variable SystemCoreClock. It is updated when the clock configuration is done using the SCU LLD APIs. The value represents the frequency of clock used for CPU operation. Range: Value is of type uint32_t, and gives the value of frequency in Hertz.
Related APIs:
XMC_SCU_CLOCK_GetPeripheralClockFrequency(), XMC_SCU_CLOCK_GatePeripheralClock()

uint32_t XMC_SCU_CLOCK_GetFastPeripheralClockFrequency ( void )
Returns
uint32_t Fast peripheral clock frequency in Hertz.
Description
Provides the clock frequency of peripherals on the peripheral bus that are using a shared functional clock.

The value is derived using the bitfield PCLKSEL from CLKCR register. Peripheral clock can have 2 times the frequency of system clock if the PCLKSEL is set.
Related APIs:
XMC_SCU_CLOCK_SetFastPeripheralClockSource()

uint32_t XMC_SCU_CLOCK_GetPeripheralClockFrequency ( void )
Returns
uint32_t Value of peripheral clock frequency in Hertz.
Description
Provides the vlaue of clock frequency at which the peripherals are working.

The value is derived from the CPU frequency. Range: Value is of type uint32_t. It is represented in Hertz.
Related APIs:
XMC_SCU_CLOCK_GetCpuClockFrequency(),XMC_SCU_CLOCK_GatePeripheralClock()

void XMC_SCU_CLOCK_Init ( const XMC_SCU_CLOCK_CONFIG_t *const config )
Parameters
config Pointer to structure holding the clock prescaler values and divider values for configuring clock generators and clock tree.
Range: Configure the members of structure XMC_SCU_CLOCK_CONFIG_t for various parameters of clock setup.
Returns
None
Description
Initializes clock generators and clock tree.

Peripheral clock and system clock are configured based on the input configuration config. The system clock frequency is tuned by configuring the FDIV and IDIV values of CLKCR register. The values of FDIV and IDIV can be provided as part of input configuration. The PCLK divider determines the ratio of peripheral clock to the system clock. The source of RTC clock is set based on the input configuration. SystemCoreClock variable will be updated with the value of system clock frequency. Access to protected bit fields are handled internally.
Related APIs:
XMC_SCU_CLOCK_GetPeripheralClockFrequency(), XMC_SCU_CLOCK_GetCpuClockFrequency()

bool XMC_SCU_CLOCK_IsDCO1ExtRefCalibrationReady ( void )
Returns
true DCO1 is synchronized to the selected XTAL frequency
false Actual DCO1 frequency is out of target
Description
This functions checks the status of the synchronisation
Note
Only available for XMC1400 series
bool XMC_SCU_CLOCK_IsPeripheralClockGated ( const XMC_SCU_PERIPHERAL_CLOCK_t peripheral )
Parameters
peripheral The peripheral for which the check for clock gating has to be done. Range: Use type XMC_SCU_PERIPHERAL_CLOCK_t to identify the peripheral.
Returns
bool Status of the peripheral clock gating. Range: true if the peripheral clock is gated. false if the peripheral clock ungated(gate de-asserted).
Description
Gives the status of peripheral clock gating.

Checks the status of peripheral clock gating using the register CGATSTAT0. It is recommended to use this API before enabling the gating of any peripherals through XMC_SCU_CLOCK_GatePeripheralClock() API.
Related APIs:
XMC_SCU_CLOCK_UngatePeripheralClock(), XMC_SCU_CLOCK_GatePeripheralClock()

void XMC_SCU_CLOCK_ScaleMCLKFrequency | ( | uint32_t | idiv,
 |  | uint32_t | fdiv
 | ) |  |
Parameters
idiv Divider value.
Range: 0 to 255.
fdiv Fractional Divider value.
Range: XMC11/XMC12/XMC13 Device: 0 to 255. XMC14 Device: 0 to 1023.
Returns
None
Description
This API configures main clock (MCLK) frequency by updating user provided divider values.

The API configures main clock by setting IDIV and FDIV bit's of the CLKCR register for XMC11/XMC12/XMC13/XMC14 Device and with additional FDIV bit (FDIV[9:8]) of the CLKCR1 register settings for XMC14 device.
Related APIs:
XMC_SCU_CLOCK_SetMCLKFrequency()

void XMC_SCU_CLOCK_SetFastPeripheralClockSource ( const XMC_SCU_CLOCK_PCLKSRC_t source )
Parameters
source Fast peripheral clock source.
Range: Use type XMC_SCU_CLOCK_PCLKSRC_t to identify the clock source.
XMC_SCU_CLOCK_PCLKSRC_MCLK- Use MCLK as the peripheral clock.
XMC_SCU_CLOCK_PCLKSRC_DOUBLE_MCLK- peripheral clock will be 2 times the MCLK frequency.
Returns
None
Description
Configures the source of peripheral clock.

The peripheral clock can be either same as MCLK or twice the frequency of MCLK.
Related APIs:
XMC_SCU_CLOCK_GetFastPeripheralClockFrequency()

void XMC_SCU_CLOCK_SetMCLKFrequency ( uint32_t freq_khz )
Parameters
freq_khz Required MCLK frequency value in kHz.
Range: XMC11/XMC12/XMC13 Device: 125 to 32000. XMC14 Device: 188 to 48000 when DCO1 is clock source for clock control unit. 79 to 48000 when OSC_HP is clock source for clock control unit.
Returns
None
Description
This API configures main clock (MCLK) frequency to requested frequency value.

The API configures main clock by setting IDIV and FDIV bit's of the CLKCR register for XMC11/XMC12/XMC13/XMC14 Device and with additional FDIV bit (FDIV[9:8]) of the CLKCR1 register settings for XMC14 device.
Related APIs:
XMC_SCU_CLOCK_ScaleMCLKFrequency()

void XMC_SCU_CLOCK_UngatePeripheralClock ( const XMC_SCU_PERIPHERAL_CLOCK_t peripheral )
Parameters
peripheral The peripheral for which the clock has to be ungated. Range: Use type XMC_SCU_PERIPHERAL_CLOCK_t to identify the peripheral.
Returns
None
Description
Enables the supply of clock to the selected peripheral.

By default when the device powers on, the peripheral clock will be gated for the peripherals that support clock gating. The peripheral clock should be enabled before using it for any functionality. fPCLK is the source of clock to various peripherals. Some peripherals support clock gate. Software can request for individual ungating of such peripheral clocks by setting respective bits in the SCU_CGATCLR0 register.
Related APIs:
XMC_SCU_CLOCK_IsPeripheralClockGated(), XMC_SCU_CLOCK_GatePeripheralClock()

void XMC_SCU_DisablePrefetchUnit ( void )

This function disables the Prefetch Unit (PFU). The purpose of the Prefetch unit is to reduce the Flash latency gap at higher system frequencies to increase the instruction per cycle performance.

Note
Only available for XMC1400 series
void XMC_SCU_EnablePrefetchUnit ( void )

This function enables the Prefetch Unit (PFU). The purpose of the Prefetch unit is to reduce the Flash latency gap at higher system frequencies to increase the instruction per cycle performance.

Note
Only available for XMC1400 series
uint32_t XMC_SCU_GetMirrorStatus ( void )
Returns
uint32_t Status of the register mirror update.
Range: Use the bit mask of the SCU_GENERAL_MIRRSTS register for the mirror update event of interest. e.g.: SCU_GENERAL_MIRRSTS_RTC_CTR_Msk. Multiple update events can be combined using OR operation.
Description
Provides the status of hibernate domain register update, when the respective mirror registers are changed.

The hibernate domain is connected to the core domain via SPI serial communication. MIRRSTS is a status register representing the communication of changed value of a mirror register to its corresponding register in the hibernate domain. The bit fields of the register indicate that a corresponding register of the hibernate domain is ready to accept a write or that the communication interface is busy with executing the previous operation.
Note: There is no hibernate domain in XMC1x devices. This register is retained for legacy purpose.
uint32_t XMC_SCU_GetTemperature ( void )
Returns
uint32_t Raw die temperature value. Range: 16 bit value.
Description
Provides the raw die temperature value.

The API reads temperature measurement result from SCU_ANALOG->ANATSEMON bit fields.
Related APIs:
XMC_SCU_StartTempMeasurement()

bool XMC_SCU_HighTemperature ( void )
Returns
bool Result of checking whether the die temperature is more than the upper threshold.
Range: false if temperature is below the upper threshold. true if temperature has exceeded the upper threshold configured in ANATSEIH register.
Description
Check if the temperature has exceeded the upper threshold value.

The API checks for TSE_HIGH bit (TSE Compare High Temperature Event Status bit) of SRRAW register. The bit will be set when the TSE_MON value in ANATSEMON register exceeds the value of TSE_IH value in ANATSEIH register.
Related APIs:
XMC_SCU_StartTempMeasurement(), XMC_SCU_SetRawTempLimits(), XMC_SCU_GetTemperature(), XMC_SCU_LowTemperature()

void XMC_SCU_INTERRUPT_ClearEventStatus ( const XMC_SCU_INTERRUPT_EVENT_t event )
Parameters
event Bit mask of the events to clear. Range: Use type XMC_SCU_INTERRUPT_EVENT_t for providing the input value. Multiple events can be combined using the OR operation.
Returns
None
Description
Clears the event status bit in SRRAW register.

The events are cleared by writing value 1 to their bit positions in the SRCLR register. The API can be used when polling method is used. After detecting the event, the event status should be cleared using software to detect the event again.
Related APIs:
XMC_SCU_INTERUPT_GetEventStatus(), XMC_SCU_INTERRUPT_TriggerEvent()

void XMC_SCU_INTERRUPT_DisableEvent ( const XMC_SCU_INTERRUPT_EVENT_t event )
Parameters
event Bit mask of the event to disable. Range: Use type XMC_SCU_INTERRUPT_EVENT_t for providing the input value. Multiple events can be combined using the OR operation.
Returns
None
Description
Disables generation of interrupt on occurrence of the input event.

The events are disabled by resetting the respective bit fields in the SRMSK register.
Related APIs:
NVIC_DisableIRQ(), XMC_SCU_INTERRUPT_EnableEvent()

void XMC_SCU_INTERRUPT_EnableEvent ( const XMC_SCU_INTERRUPT_EVENT_t event )
Parameters
event Bit mask of the event to enable. Range: Use type XMC_SCU_INTERRUPT_EVENT_t for providing the input value. Multiple events can be combined using the OR operation.
Returns
None
Description
Enables the generation of interrupt for the input events.

The events are enabled by setting the respective bit fields in the SRMSK register.
Note: User should separately enable the NVIC node responsible for handling the SCU interrupt. The interrupt will be generated when the respective event occurs.
Related APIs:
NVIC_EnableIRQ(), XMC_SCU_INTERRUPT_DisableEvent()

XMC_SCU_STATUS_t XMC_SCU_INTERRUPT_SetEventHandler | ( | const XMC_SCU_INTERRUPT_EVENT_t | event,
 |  | const XMC_SCU_INTERRUPT_EVENT_HANDLER_t | handler
 | ) |  |
Parameters
event The event for which the interrupt handler is to be configured.
Range: Use type XMC_SCU_INTERRUPT_EVENT_t for identifying the event.
handler Name of the function to be executed when the event if detected.
Range: The function accepts no arguments and returns no value.
Returns
XMC_SCU_STATUS_t Status of configuring the event handler function for the selected event.
Range: XMC_SCU_STATUS_OK if the event handler is successfully configured.
XMC_SCU_STATUS_ERROR if the input event is invalid.
Description
Assigns the event handler function to be executed on occurrence of the selected event.

If the input event is valid, the handler function will be assigned to a table to be executed when the interrupt is generated and the event status is set in the event status register. By using this API, polling for a particular event can be avoided. This way the CPU utilization will be optimized. Multiple SCU events can generate a common interrupt. When the interrupt is generated, a common interrupt service routine is executed. It checks for status flags of events which can generate the interrupt. The handler function will be executed if the event flag is set.
Related APIs:
XMC_SCU_INTERRUPT_TriggerEvent(), XMC_SCU_INTERUPT_GetEventStatus()

void XMC_SCU_INTERRUPT_TriggerEvent ( const XMC_SCU_INTERRUPT_EVENT_t event )
Parameters
event Bit mask of the event to be triggered. Range: Use type XMC_SCU_INTERRUPT_EVENT_t for providing the input value. Multiple events can be combined using the OR operation.
Returns
None
Description
Triggers the event as if the hardware raised it.

Event will be triggered by setting the respective bitfield in the SRSET register.
Note: User should enable the NVIC node that handles the respective event for interrupt generation.
Related APIs:
NVIC_EnableIRQ(), XMC_SCU_INTERUPT_GetEventStatus(), XMC_SCU_INTERRUPT_ClearEventStatus()

XMC_SCU_INTERRUPT_EVENT_t XMC_SCU_INTERUPT_GetEventStatus ( void )
Returns
uint32_t Status of the SCU events.
Description
Provides the status of all SCU events.

The status is read from the SRRAW register. To check the status of a particular event, the returned value should be masked with the bit mask of the event. The bitmask of events can be obtained using the type XMC_SCU_INTERRUPT_EVENT_t. Multiple events' status can be checked by combining the bit masks using OR operation. After detecting the event, the event status should be cleared using software to detect the event again.
Related APIs:
XMC_SCU_INTERRUPT_ClearEventStatus(), XMC_SCU_INTERRUPT_TriggerEvent(), XMC_SCU_INTERRUPT_SetEventHandler()

void XMC_SCU_IRQHandler ( uint32_t sr_num )
Parameters
sr_num Service request number identifying the SCU interrupt generated.
Range: 0 to 2. XMC4x devices have one common SCU interrupt, so the value should be 0.
But XMC1x devices support 3 interrupt nodes.
Returns
None
Description
A common function to execute callback functions for multiple events.

It checks for the status of events which can generate the interrupt with the selected service request. If the event is set, the corresponding callback function will be executed. It also clears the event status bit.
Note: This is an internal function. It should not be called by the user application.
Related APIs:
XMC_SCU_INTERRUPT_SetEventHandler()

bool XMC_SCU_IsTempMeasurementDone ( void )
Returns
true DTS Measurement Done
false DTS Measurement not Done
Description
This functions checks the status of the DTS Measurement completion.

Related APIs:
XMC_SCU_StartTempMeasurement()

void XMC_SCU_LockProtectedBits ( void )
Returns
None
Description
Locks access to protected bit fields of the SCU.

The bit protection scheme prevents changing selected register bits by unauthorized code. Bit protection scheme is enabled by writing 000000C3H to PASSWD register. By writing this value, the API is setting the MODE bit field to bit protection enabled state.
List of Protected Register Bit Fields are mentioned below.
Register | Bit fields
SCU_CLKCR | FDIV, IDIV, PCLKSEL, RTCLKSEL
SCU_CGATSET0 | All bits
SCU_CGATCLR0 | All bits
SCU_ANAOFFSET | ADJL_OFFSET
VADC0_ACCPROT0 | All bits
VADC0_ACCPROT1 | All bits
Related APIs:
XMC_SCU_UnlockProtectedBits()

bool XMC_SCU_LowTemperature ( void )
Returns
bool Result of checking whether the die temperature is less than the lower threshold.
Range: false if temperature is higher than the lower threshold. true if temperature has dropped below the lower threshold configured in ANATSEIL register.
Description
Check if the temperature has dropped below the lower threshold value.

The API checks for TSE_LOW bit (TSE Compare Low Temperature Event Status bit) of SRRAW register. The bit will be set when the TSE_MON value in ANATSEMON register drops below the value of TSE_IL value in ANATSEIL register.
Related APIs:
XMC_SCU_StartTempMeasurement(), XMC_SCU_SetRawTempLimits(), XMC_SCU_GetTemperature(), XMC_SCU_HighTemperature()

void XMC_SCU_POWER_DisableMonitor ( void )
Returns
None
Description
Disables VDEL detector
void XMC_SCU_POWER_EnableMonitor | ( | XMC_SCU_POWER_MONITOR_RANGE_t | range,
 |  | XMC_SCU_POWER_MONITOR_DELAY_t | delay
 | ) |  |
Parameters
range | VDEL Range Select XMC_SCU_POWER_MONITOR_RANGE_t
delay | VDEL Timing Setting XMC_SCU_POWER_MONITOR_DELAY_t
Returns
None
Description
Enables VDEL detector. VDEL detector compares the supply voltage against a pre-warning threshold voltage
Note
Brown Out Trap need to be enabled previously
void XMC_SCU_RESET_AssertMasterReset ( void )
Returns
None
Description
Trigger device master reset.

The API triggers master reset by setting the MRSTEN bit of RSTCON register. It also internally triggers system reset. Almost all the logics of the device are affected by this reset.
Related APIs:
XMC_SCU_RESET_EnableResetRequest()

void XMC_SCU_RESET_ClearDeviceResetReason ( void )
Returns
None
Description
Clears the reset reason bits in the reset status register.

Clearing of the reset status information in the SCU_RSTSTAT register via register bit RSTCLR.RSCLR is strongly recommended to ensure a clear indication of the cause of next reset.
Related APIs:
XMC_SCU_RESET_GetDeviceResetReason()

void XMC_SCU_RESET_EnableResetRequest ( uint32_t request )
Parameters
request Reset source to trigger the device reset.
Range: Use type XMC_SCU_SYSTEM_RESET_REQUEST_t to identify the reset source.
XMC_SCU_RESET_REQUEST_FLASH_ECC_ERROR- Reset when flash memory double bit error is detected.
XMC_SCU_RESET_REQUEST_CLOCK_LOSS- Reset when loss of clock is detected.
XMC_SCU_RESET_REQUEST_SRAM_PARITY_ERROR- Reset when SRAM parity error is detected.
XMC_SCU_RESET_REQUEST_USIC_SRAM_PARITY_ERROR- Reset when USIC0 SRAM parity error is detected.
Returns
None
Description
Configures trigger for system reset from the selected source.

The API configures the reset source specific bit in the RSTCON register. Multiple reset sources can be combined using OR operation. By enabling the reset using this API will not trigger the reset. The reset will happen when the configured source event is detected.
Related APIs:
XMC_SCU_RESET_AssertMasterReset()

uint32_t XMC_SCU_RESET_GetDeviceResetReason ( void )
Returns
uint32_t Status representing the reason for device reset.
Description
Provides the value representing the reason for device reset.

The return value is an encoded word, which can indicate multiple reasons for the last reset. Each bit position of the returned word is representative of a last reset cause. The returned value should be appropriately masked to check the cause of reset. The cause of the last reset gets automatically stored in the SCU_RSTSTAT register. The reset status shall be reset after each startup in order to ensure consistent source indication after the next reset. Range: The type XMC_SCU_RESET_REASON_t can be used to get the bit masks of the reset cause.
Related APIs:
XMC_SCU_RESET_ClearDeviceResetReason()

uint32_t XMC_SCU_SetBMI | ( | uint32_t | flags,
 |  | uint8_t | timeout
 | ) |  |
Parameters
flags may be any of:
XMC_SCU_BMI_HWCFG_CAN_BSL (only available for XMC1400 series with CAN Module)
XMC_SCU_BMI_HWCFG_CAN_BSLTO (only available for XMC1400 series with CAN Module)
XMC_SCU_BMI_HWCFG_SBSL_CANOPEN (only available for XMC1400 series with CAN Module)
XMC_SCU_BMI_HWCFG_ASC_BSL
 XMC_SCU_BMI_HWCFG_UPM
 XMC_SCU_BMI_HWCFG_UMD
 XMC_SCU_BMI_HWCFG_UMHAR
 XMC_SCU_BMI_HWCFG_SSC_BSL
 XMC_SCU_BMI_HWCFG_ASC_BSLTO
 XMC_SCU_BMI_HWCFG_SSC_BSLTO
 XMC_SCU_BMI_HWCFG_SBSL

optionally OR'd together with any of:
XMC_SCU_BMI_DAPTYP_SWD
 XMC_SCU_BMI_DAPTYP_SPD

optionally OR'd together with any of:
XMC_SCU_BMI_DAPDIS_CHANNEL_0
 XMC_SCU_BMI_DAPDIS_CHANNEL_1

optionally OR'd together with any of (only available for XMC1400 series with CAN Module):
XMC_SCU_BMI_CANCLK_DCO1
 XMC_SCU_BMI_CANCLK_OSCHP

timeout Only relevant if a start up mode is selected that uses timeout. The time-out duration is BSLTO*2664000 MCLK cycles, the supported time-out range is 0.3-5s (333...4995ms)
Returns
false only upon error, if OK the procedure triggers a reset and does not return to calling routine
Description
This procedure initiates installation of a new BMI value. In particular, it can be used as well as to restore the state upon delivery for a device already in User Productive mode.
1 // Switch to ASC Bootstrap Loader
2 XMC_SCU_SetBMI(XMC_SCU_BMI_HWCFG_ASC_BSL, 0);
3
4 // Switch to Debug user mode SWD1 (pins P1.3 and P1.2)
5 XMC_SCU_SetBMI(XMC_SCU_BMI_HWCFG_UMD | XMC_SCU_BMI_DAPTYP_SWD | XMC_SCU_BMI_DAPDIS_CHANNEL_1, 0);
void XMC_SCU_SetCcuTriggerHigh ( const uint32_t trigger )
Parameters
trigger CCU slices to be triggered synchronously via software. The value is a bitmask of CCU slice bits in the register CCUCON.
Range: Use type XMC_SCU_CCU_TRIGGER_t for bitmask of individual CCU slices. Multiple slices can be combined using OR operation.
Returns
None
Description
Generates active edge(low to high) trigger for multiple CCU units at the same time.

Before executing this API, all the required CCU timers should configure external start. The edge of the start signal should be selected as active edge. The input signal for the CCU slice should be selected as SCU input. The above mentioned configurations can be made using the CCU LLD API XMC_CCU4_SLICE_StartConfig(). CCU timer slice should be started using XMC_CCU4_SLICE_StartTimer() before triggering the timer using this API.
Related APIs:
XMC_CCU4_SLICE_StartConfig(), XMC_CCU4_SLICE_SetInput(), XMC_SCU_SetCcuTriggerLow()

void XMC_SCU_SetCcuTriggerLow ( const uint32_t trigger )
Parameters
trigger CCU slices to be triggered synchronously via software. The value is a bitmask of CCU slice bits in the register CCUCON.
Range: Use type XMC_SCU_CCU_TRIGGER_t for bitmask of individual CCU slices. Multiple slices can be combined using OR operation.
Returns
None
Description
Generates passive edge(high to low) trigger for multiple CCU units at the same time.

Before executing this API, all the required CCU timers should configure external start. The edge of the start signal should be selected as passive edge. The input signal for the CCU slice should be selected as SCU input. The above mentioned configurations can be made using the CCU LLD API XMC_CCU4_SLICE_StartConfig(). CCU timer slice should be started using XMC_CCU4_SLICE_StartTimer() before triggering the timer using this API.
Related APIs:
XMC_CCU4_SLICE_StartConfig(), XMC_CCU4_SLICE_SetInput(), XMC_SCU_SetCcuTriggerHigh()

void XMC_SCU_SetInterruptControl | ( | uint8_t | irq_number,
 |  | XMC_SCU_IRQCTRL_t | source
 | ) |  |

This function selects service request source for a NVIC interrupt node. The XMC1400 series has up to 54 peripheral service requests. The Cortex M0 however has 32 interrupts available for peripherals. This function allows you to select which 32 peripheral requests of the 54 the CPU should react on.

Parameters
irq_number | Interrupt number, 0 to 31
source | Peripheral service request. See XMC_SCU_IRQCTRL_t
Note
Only available for XMC1400 series
void XMC_SCU_SetRawTempLimits | ( | const uint32_t | lower_temp,
 |  | const uint32_t | upper_temp
 | ) |  |
Parameters
lower_temp Lower threshold value for the die temperature.
Range: 0 to 65535(16 bit unsigned value).
upper_temp Upper threshold value for the die temperature.
Range: 0 to 65535(16 bit unsigned value).
Returns
None
Description
Configures upper and lower thresholds of die temperature as raw digital values into temperature sensor.

The API configures ANATSEIH and ANATSEIL registers for upper and lower die temperature threshold limits respectively.
It is recommended to use following steps:
  • Call XMC_SCU_StopTempMeasurement to stop temperature measurement if it was started previously.
  • Call XMC_SCU_SetRawTempLimits with desired lower and upper temperature threshold limit values.
  • Finally call XMC_SCU_StartTempMeasurement to start temperature measurement.
Related APIs:
XMC_SCU_StopTempMeasurement(), XMC_SCU_StartTempMeasurement()

XMC_SCU_STATUS_t XMC_SCU_SetTempHighLimit ( uint32_t limit )
Parameters
limit Kelvin degree temperature higher compare limit in range [233,388]
Returns
XMC_SCU_STATUS_t status of limit installation
Description
Set higher temperature compare limit. A high temperature interrupt (SCU_IRQ1) is triggered if Tchip > limit and the event and interrupt are enabled. Alternatively XMC_SCU_HighTemperature() can be used to check the status.
Related APIs:
XMC_SCU_HighTemperature()

XMC_SCU_STATUS_t XMC_SCU_SetTempLowLimit ( uint32_t limit )
Parameters
limit Kelvin degree temperature lower compare limit in range [233,388]
Returns
XMC_SCU_STATUS_t status of limit installation
Description
Set lower temperature compare limit. A low temperature interrupt (SCU_IRQ1) is triggered if Tchip < limit and the event and interrupt are enabled. Alternatively XMC_SCU_LowTemperature() can be used to check the status.
Related APIs:
XMC_SCU_LowTemperature()

void XMC_SCU_StartTempMeasurement ( void )
Returns
XMC_SCU_STATUS_t Status of starting the temperature measurement.
Range: Use type XMC_SCU_STATUS_t to identify the result.
XMC_SCU_STATUS_OK- Temperature measurement started successfully.
Always returns the above status.
Description
Starts die temperature measurement using internal temperature sensor.

The API, enables die temperature measurement and waits for about 10000 cycles until temperature measurement result is available on SCU_ANALOG->ANATSEMON bit fields.
It is recommended to use following steps:
  • Call XMC_SCU_StopTempMeasurement to stop temperature measurement if it was started previously.
  • Call XMC_SCU_SetRawTempLimits with desired lower and upper temperature threshold limit values if it is needed.
  • Call XMC_SCU_StartTempMeasurement to start temperature measurement.
  • Read die temperature value using XMC_SCU_GetTemperature API.
Related APIs:
XMC_SCU_StopTempMeasurement(), XMC_SCU_SetRawTempLimits(), XMC_SCU_GetTemperature()

void XMC_SCU_StopTempMeasurement ( void )
Returns
None
Description
Stops the die temperature measurement.

Die temperature measurement is stopped by disabling the sensor using TSE_EN bit of ANATSECTRL register.
Related APIs:
XMC_SCU_StartTempMeasurement(), XMC_SCU_SetRawTempLimits(), XMC_SCU_GetTemperature()

void XMC_SCU_SupplyMonitorInit ( const XMC_SCU_SUPPLYMONITOR_t * obj )
Parameters
obj Pointer to data structure consisting voltage monitoring block configuration.
Range: Use type XMC_SCU_SUPPLYMONITOR_t for detailed description of structure members.
Returns
None
Description
Initializes power supply monitoring unit.

Supply voltage monitoring block consist of 2 detectors namely External voltage detector (VDEL) and External brownout detector (BDE) in the EVR that are used to monitor the VDDP. VDEL detector compares the supply voltage against a pre-warning threshold voltage ext_supply_threshold. The threshold level is programmable via register ANAVDEL.VDEL_SELECT. An interrupt if enabled via enable_prewarning_int, will be triggered if a level below this threshold is detected and the flag, VDDPI, in SRRAW register bit is set. Similarly interrupts can be enabled for the events of VCLIP and prewarning, using the structure members, enable_vclip_int and enable_prewarning_int. The handlers for these interrupts have to be explicitly defined using the API XMC_SCU_INTERRUPT_SetEventHandler().
Related APIs:
XMC_SCU_INTERRUPT_SetEventHandler()

void XMC_SCU_UnlockProtectedBits ( void )
Returns
None
Description
Unlocks access to protected bit fields of the SCU.

The bit protection scheme prevents changing selected register bits by unauthorized code. Bit protection scheme can be temporarily(for 32 MCLK cycles) disabled by writing 000000C0H to PASSWD register. By writing this value, the API is setting the MODE bit field to bit protection disabled state. The API waits for the protection to be disabled after changing the MODE.
User can change the values of the protected bit fields within 32 MCLK cycles. After 32 MCLK cycles the lock will be enabled automatically. List of Protected Register Bit Fields are mentioned below.
Register | Bit fields
SCU_CLKCR | FDIV, IDIV, PCLKSEL, RTCLKSEL
SCU_CGATSET0 | All bits
SCU_CGATCLR0 | All bits
SCU_ANAOFFSET | ADJL_OFFSET
VADC0_ACCPROT0 | All bits
VADC0_ACCPROT1 | All bits
Related APIs:
XMC_SCU_LockProtectedBits()

Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_SCU_CLOCK_CONFIG_t Struct Reference

Data Fields
XMC_SCU_CLOCK_CONFIG_t Struct Reference
XMC Peripheral Library » SCU

#include <xmc1_scu.h>

Data Fields

XMC_SCU_CLOCK_DCLKSRC_t dclk_src
uint8_t | fdiv
uint8_t | idiv
XMC_SCU_CLOCK_OSCHP_MODE_t oschp_mode
XMC_SCU_CLOCK_OSCLP_MODE_t osclp_mode
XMC_SCU_CLOCK_PCLKSRC_t pclk_src
XMC_SCU_CLOCK_RTCCLKSRC_t rtc_src

Detailed Description

Defines a data structure for initializing the data of the clock functional block. Clock functional block configures clock dividers, peripheral and RTC clock source by configuring corresponding bits in CLKCR clock control register. Use type XMC_SCU_CLOCK_CONFIG_t for accessing these structure parameters.

Field Documentation

XMC_SCU_CLOCK_DCLKSRC_t dclk_src

DCLK clock source selection.

Note
Only available in XMC1400 series
uint8_t fdiv

Fractional clock divider (FDIV). Range: 0 to 255.

Note
XMC1400 series extends the range to 1023
uint8_t idiv

Integer clock divider (IDIV). Range: 0 to 255.

XMC_SCU_CLOCK_OSCHP_MODE_t oschp_mode

OSCHP mode.

Note
Only available in XMC1400 series
XMC_SCU_CLOCK_OSCLP_MODE_t osclp_mode

OSCLP mode.

Note
Only available in XMC1400 series
XMC_SCU_CLOCK_PCLKSRC_t pclk_src

Source of PCLK Clock

XMC_SCU_CLOCK_RTCCLKSRC_t rtc_src

Source of RTC Clock

The documentation for this struct was generated from the following file:
  • xmc1_scu.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_SCU_SUPPLYMONITOR_t Struct Reference

Data Fields
XMC_SCU_SUPPLYMONITOR_t Struct Reference
XMC Peripheral Library » SCU

#include <xmc1_scu.h>

Data Fields

bool | enable_at_init
bool | enable_prewarning_int
bool | enable_vclip_int
bool | enable_vdrop_int
uint32_t | ext_supply_monitor_speed
uint32_t | ext_supply_threshold

Detailed Description

Defines a data structure for initializing the data of the supply voltage monitoring block. Supply voltage monitoring block consists of 2 detectors namely External voltage detector (VDEL) and External brownout detector (BDE) in the EVR that are used to monitor the VDDP. VDEL detector compares the supply voltage against a pre-warning threshold voltage. Use type XMC_SCU_SUPPLYMONITOR_t for accessing these structure parameters.

Field Documentation

bool enable_at_init

Whether the monitor has to be enabled (VDEL unit Enable) after initialization.
Range:

  • true to enable after initialization.
  • false to enable after initialization.
bool enable_prewarning_int

Configure pre-warning interrupt generation.
Range:

  • true to enable the interrupt.
  • false to disable the interrupt.
bool enable_vclip_int

Configure VCLIP interrupt.
Range:

  • true to enable the interrupt.
  • false to disable the interrupt.
bool enable_vdrop_int

Configure VDROP interrupt generation.
Range:

  • true to enable the interrupt.
  • false to disable the interrupt.
uint32_t ext_supply_monitor_speed

Speed of the voltage monitor(VDEL Timing Setting).
Range:

  • 00B sets monitor speed typ 1us - slowest response time
  • 01B sets monitor speed typ 500n
  • 10B sets monitor speed typ 250n
  • 11B sets monitor speed with no delay - fastest response time.
uint32_t ext_supply_threshold

External supply range (VDEL Range Select).
Range:

  • 00B sets threshold value to 2.25V
  • 01B sets threshold value to 3.0V
  • 10B sets threshold value to 4.4V
The documentation for this struct was generated from the following file:
  • xmc1_scu.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: SPI

Data Structures | Macros | Enumerations | Functions
SPI
XMC Peripheral Library

Data Structures

struct XMC_SPI_CH_CONFIG_t

Macros

#define | XMC_SPI0_CH0 XMC_USIC0_CH0
#define | XMC_SPI0_CH1 XMC_USIC0_CH1
#define | XMC_SPI1_CH0 XMC_USIC1_CH0
#define | XMC_SPI1_CH1 XMC_USIC1_CH1
#define | XMC_SPI2_CH0 XMC_USIC2_CH0
#define | XMC_SPI2_CH1 XMC_USIC2_CH1

Enumerations

Functions

void | XMC_SPI_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, const uint32_t flag)
void | XMC_SPI_CH_ConfigExternalInputSignalToBRG (XMC_USIC_CH_t *const channel, const uint16_t pdiv, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_SPI_CH_ConfigureShiftClockOutput (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t passive_level, const XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t clock_output)
void | XMC_SPI_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableEOF (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_SPI_CH_DisableFEM (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INPUT_t input)
void | XMC_SPI_CH_DisableInterwordDelay (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableMasterClock (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableSlaveSelect (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableSlaveSelectCodedMode (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableSOF (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableEOF (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_SPI_CH_EnableFEM (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INPUT_t input)
void | XMC_SPI_CH_EnableInterwordDelay (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableMasterClock (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableSlaveSelect (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_SLAVE_SELECT_t slave)
void | XMC_SPI_CH_EnableSlaveSelectCodedMode (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableSOF (XMC_USIC_CH_t *const channel)
uint16_t | XMC_SPI_CH_GetReceivedData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_SPI_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_Init (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_CONFIG_t *const config)
void | XMC_SPI_CH_Receive (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_MODE_t mode)
void | XMC_SPI_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_SPI_CH_STATUS_t | XMC_SPI_CH_SetBaudrate (XMC_USIC_CH_t *const channel, const uint32_t rate)
void | XMC_SPI_CH_SetBitOrderLsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_SetBitOrderMsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_SPI_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INPUT_t input, const uint8_t source)
void | XMC_SPI_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_SPI_CH_SetInterwordDelay (XMC_USIC_CH_t *const channel, uint32_t tinterword_delay_ns)
void | XMC_SPI_CH_SetInterwordDelaySCLK (XMC_USIC_CH_t *const channel, uint32_t sclk_period)
void | XMC_SPI_CH_SetSlaveSelectDelay (XMC_USIC_CH_t *const channel, uint32_t sclk_period)
void | XMC_SPI_CH_SetSlaveSelectPolarity (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t selo_inversion)
void | XMC_SPI_CH_SetTransmitMode (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_MODE_t mode)
void | XMC_SPI_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_SPI_CH_Start (XMC_USIC_CH_t *const channel)
XMC_SPI_CH_STATUS_t | XMC_SPI_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_Transmit (XMC_USIC_CH_t *const channel, const uint16_t data, const XMC_SPI_CH_MODE_t mode)
void | XMC_SPI_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)

Detailed Description

The SPI driver uses Universal Serial Interface Channel(USIC) module. The USIC module supports multiple data lines for SPI communication.

  1. Full duplex communication with 2 separate lines for transmission and reception.
  2. Half duplex communication with 1 common line shared for transmission and reception.
  3. Dual mode communication with 2 common lines shared for transmission and reception.
  4. Quad mode communication with 4 common lines shared for transmission and reception.

SPI driver provides structures, enumerations and APIs for configuring the USIC channel for SPI communication and also for data transaction.
SPI driver features:

  1. Configuration structure XMC_SPI_CH_CONFIG_t and SPI initialization function XMC_SPI_CH_Init()
  2. Allows configuration of protocol word and frame length using XMC_SPI_CH_SetWordLength(), XMC_SPI_CH_SetFrameLength()
  3. Allows manipulation of data frame at runtime using XMC_SPI_CH_EnableSOF(), XMC_SPI_CH_EnableEOF(), XMC_SPI_CH_EnableSlaveSelect(), XMC_SPI_CH_DisableSlaveSelect()
  4. Provides APIs for transmitting data and receiving data using XMC_SPI_CH_Transmit(), XMC_SPI_CH_Receive(), XMC_SPI_CH_GetReceivedData()
  5. Allows configuration of shift clock using XMC_SPI_CH_ConfigureShiftClockOutput()
  6. Provides enumeration of SPI protocol events using XMC_SPI_CH_STATUS_FLAG_t

Macro Definition Documentation

#define XMC_SPI0_CH0 XMC_USIC0_CH0

SPI0 channel 0 base address

#define XMC_SPI0_CH1 XMC_USIC0_CH1

SPI0 channel 1 base address

#define XMC_SPI1_CH0 XMC_USIC1_CH0

SPI1 channel 0 base address

#define XMC_SPI1_CH1 XMC_USIC1_CH1

SPI1 channel 1 base address

#define XMC_SPI2_CH0 XMC_USIC2_CH0

SPI2 channel 0 base address

#define XMC_SPI2_CH1 XMC_USIC2_CH1

SPI2 channel 1 base address

Enumeration Type Documentation

enum XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t

SPI Baudrate Generator shift clock output

Enumerator
XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK | Baudrate Generator shift clock output: SCLK
XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 | Clock obtained as input from master: DX1
enum XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t

SPI Baudrate Generator shift clock passive level

Enumerator
XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED | Passive clock level 0, delay disabled Passive clock level 1, delay disabled
XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED | Passive clock level 0, delay enabled
XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED | Passive clock level 1, delay enabled
enum XMC_SPI_CH_BUS_MODE_t

Defines the SPI bus mode

Enumerator
XMC_SPI_CH_BUS_MODE_MASTER | SPI Master
XMC_SPI_CH_BUS_MODE_SLAVE | SPI Slave
enum XMC_SPI_CH_DATA_POLARITY_t

Defines the Polarity of the data inputs.

Enumerator
XMC_SPI_CH_DATA_POLARITY_DIRECT | The polarity of the data line is not inverted
XMC_SPI_CH_DATA_POLARITY_INVERT | The polarity of the data line is inverted
enum XMC_SPI_CH_EVENT_t

Defines SPI specific events

Enumerator
XMC_SPI_CH_EVENT_RECEIVE_START | Receive start event
XMC_SPI_CH_EVENT_DATA_LOST | Data lost event
XMC_SPI_CH_EVENT_TRANSMIT_SHIFT | Transmit shift event
XMC_SPI_CH_EVENT_TRANSMIT_BUFFER | Transmit buffer event
XMC_SPI_CH_EVENT_STANDARD_RECEIVE | Receive event
XMC_SPI_CH_EVENT_ALTERNATIVE_RECEIVE | Alternate receive event
XMC_SPI_CH_EVENT_BAUD_RATE_GENERATOR | Baudrate generator event
XMC_SPI_CH_EVENT_PARITY_ERROR | Parity error event
XMC_SPI_CH_EVENT_MSLS_CHANGE | Master slave select(MSLS) output transition event
XMC_SPI_CH_EVENT_DX2TIEN_ACTIVATED | Slave select input signal transition event
enum XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_t

Defines input frequency sources for slave select signal delay configuration.

Enumerator
XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FPDIV | Output of PDIV divider: FPDIV
XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FPPP | Peripheral clock: FPPP
XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FSCLK | Shift clock: FSCLK
XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FMCLK | Master clock: FMCLK
enum XMC_SPI_CH_INPUT_t

Define data and clock input stages

Enumerator
XMC_SPI_CH_INPUT_DIN0 | Data input stage 0
XMC_SPI_CH_INPUT_SLAVE_SCLKIN | Clock input stage
XMC_SPI_CH_INPUT_SLAVE_SELIN | Slave select input stage
XMC_SPI_CH_INPUT_DIN1 | Data input stage 1
XMC_SPI_CH_INPUT_DIN2 | Data input stage 2
XMC_SPI_CH_INPUT_DIN3 | Data input stage 3
enum XMC_SPI_CH_INTERRUPT_NODE_POINTER_t

SPI channel interrupt node pointers

Enumerator
XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT | Node pointer for transmit shift interrupt
XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER | Node pointer for transmit buffer interrupt
XMC_SPI_CH_INTERRUPT_NODE_POINTER_RECEIVE | Node pointer for receive interrupt
XMC_SPI_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE | Node pointer for alternate receive interrupt
XMC_SPI_CH_INTERRUPT_NODE_POINTER_PROTOCOL | Node pointer for protocol related interrupts
enum XMC_SPI_CH_MODE_t

Define SPI data transfer mode

Enumerator
XMC_SPI_CH_MODE_STANDARD | SPI standard full duplex mode
XMC_SPI_CH_MODE_STANDARD_HALFDUPLEX | SPI standard half duplex mode
XMC_SPI_CH_MODE_DUAL | SPI half duplex mode with dual data lines
XMC_SPI_CH_MODE_QUAD | SPI half duplex mode with quad data lines
enum XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t

Defines the Polarity of the slave select signals SELO[7:0] in relation to the master slave select signal MSLS.

Enumerator
XMC_SPI_CH_SLAVE_SEL_SAME_AS_MSLS | The SELO outputs have the same polarity as the MSLS signal (active high)
XMC_SPI_CH_SLAVE_SEL_INV_TO_MSLS | The SELO outputs have the inverted polarity to the MSLS signal (active low)
enum XMC_SPI_CH_SLAVE_SELECT_t

Defines Slave Select lines

Enumerator
XMC_SPI_CH_SLAVE_SELECT_0 | Slave Select line 0
XMC_SPI_CH_SLAVE_SELECT_1 | Slave Select line 1
XMC_SPI_CH_SLAVE_SELECT_2 | Slave Select line 2
XMC_SPI_CH_SLAVE_SELECT_3 | Slave Select line 3
XMC_SPI_CH_SLAVE_SELECT_4 | Slave Select line 4
XMC_SPI_CH_SLAVE_SELECT_5 | Slave Select line 5
XMC_SPI_CH_SLAVE_SELECT_6 | Slave Select line 6
XMC_SPI_CH_SLAVE_SELECT_7 | Slave Select line 7
enum XMC_SPI_CH_STATUS_FLAG_t

Defines SPI event status

Enumerator
XMC_SPI_CH_STATUS_FLAG_MSLS | Status of Master slave select(MSLS) signal
XMC_SPI_CH_STATUS_FLAG_DX2S | Status of slave select input(DX2) signal
XMC_SPI_CH_STATUS_FLAG_MSLS_EVENT_DETECTED | Status for master slave select output signal transition
XMC_SPI_CH_STATUS_FLAG_DX2T_EVENT_DETECTED | Status for slave select input signal transition
XMC_SPI_CH_STATUS_FLAG_PARITY_ERROR_EVENT_DETECTED | Indicates status of the parity error
XMC_SPI_CH_STATUS_FLAG_RECEIVER_START_INDICATION | Status for receive start event
XMC_SPI_CH_STATUS_FLAG_DATA_LOST_INDICATION | Status for data lost event
XMC_SPI_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION | Status for transmit shift event
XMC_SPI_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION | Status for transmit buffer event
XMC_SPI_CH_STATUS_FLAG_RECEIVE_INDICATION | Status for receive event
XMC_SPI_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION | Status for alternative receive event
XMC_SPI_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION | Status for baud rate generation error event
enum XMC_SPI_CH_STATUS_t

Defines return status of SPI driver APIs

Enumerator
XMC_SPI_CH_STATUS_OK | Status of the Module: OK
XMC_SPI_CH_STATUS_ERROR | Status of the Module: ERROR
XMC_SPI_CH_STATUS_BUSY | The Module is busy

Function Documentation

void XMC_SPI_CH_ClearStatusFlag | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | flag
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
flag | Protocol event status to be cleared for detection of next occurence. Refer @ XMC_SPI_CH_STATUS_FLAG_t for valid values. OR combinations of these enum item can be used as input.
Returns
None
Description:
Clears the events specified, by setting PSCR register.

During communication the events occurred have to be cleared to detect their next occurence.
e.g: During transmission Transmit buffer event occurs to indicating data word transfer has started. This event has to be cleared after transmission of each data word. Otherwise next event cannot be recognized.
Related APIs:
XMC_SPI_CH_GetStatusFlag()
void XMC_SPI_CH_ConfigExternalInputSignalToBRG | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | pdiv,
 |  | const XMC_USIC_CH_INPUT_COMBINATION_MODE_t | combination_mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Parameters
pdiv Desired divider for the external frequency input. Range: minimum value = 1, maximum value = 1024
combination_mode USIC channel input combination mode
Returns
None
Description
Enables the external frequency input for the Baudrate Generator and configures the divider, oversampling and the combination mode of the USIC channel.

Related APIs:
XMC_USIC_CH_SetBRGInputClockSource(), XMC_USIC_CH_SetInputTriggerCombinationMode()

void XMC_SPI_CH_ConfigureShiftClockOutput | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t | passive_level,
 |  | const XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t | clock_output
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
passive_level polarity and delay of the selected shift clock.
Refer XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t for valid inputs.
clock_output shift clock source.
Refer XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t for valid inputs.
Returns
None
Description:
Configures the shift clock source with the selected polarity and delay by setting BRG.SCLKOSEL and BRG.SCLKCFG.

In Master mode operation, shift clock is generated by the internal baud rate generator. This SCLK is made available for external slave devices by SCLKOUT signal.
In Slave mode, the signal is received from the external master. So the DX1(input) stage has to be connected to input.
The shift clock output(SCLKOUT) signal polarity can be set relative to SCLK, with the delay of half the shift clock period. These settings are applicable only in master mode.
void XMC_SPI_CH_DisableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Returns
None
Description
Disable data transmission.

Use this function in combination with XMC_SPI_CH_EnableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Related APIs:
XMC_SPI_CH_EnableDataTransmission()

void XMC_SPI_CH_DisableDelayCompensation ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Returns
None
Description
Disables delay compensation..

Related APIs:
XMC_SPI_CH_EnableDelayCompensation()

void XMC_SPI_CH_DisableEOF ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description
Configure the handling of end of frame through hardware, by clearing TCSR.EOF bit.

Typically this can be disabled, where the transmission control is done by the hardware.
Related APIs:
XMC_SPI_CH_EnableEOF()
void XMC_SPI_CH_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
event | Protocol events which have to be disabled. Refer @ XMC_SPI_CH_EVENT_t for valid values. OR combinations of these enum item can be used as input.
Returns
None
Description:
Disables the SPI protocol specific events, by configuring PCR register.

After disabling the events, XMC_SPI_CH_EnableEvent() has to be invoked to re-enable the events.
Related APIs:
XMC_SPI_CH_EnableEvent()
void XMC_SPI_CH_DisableFEM ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Configure to disable the MSLS(Slave select signal) if the current data frame is considered as finished, by setting PCR.FEM bit.

When the last bit of a data word has been sent out and the transmit buffer TBUF does not contain new data, is considered as frame is ended and MSLS(Slave select signal) is disabled.
Related APIs:
XMC_SPI_CH_EnableFEM()
void XMC_SPI_CH_DisableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_INPUT_t | input
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
input SPI channel input stage.
Refer XMC_SPI_CH_INPUT_t for valid inputs.
Returns
None
Description
Disables the polarity inversion of input data signal, by clearing DXyCR.DPOL(where y = input).

Resets the input data polarity. Invoke XMC_SPI_CH_EnableInputInversion() to apply inversion.
Related APIs:
XMC_SPI_CH_EnableInputInversion()
void XMC_SPI_CH_DisableInterwordDelay ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Disables the delay after after each word, by clearing PCR.TIWEN bit.

So the last data bit of a data word is directly followed by the first data bit of the next data word. If needed can be enabled by invoking XMC_SPI_CH_EnableInterwordDelay().
Related APIs:
XMC_SPI_CH_EnableInterwordDelay()
void XMC_SPI_CH_DisableMasterClock ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Disables the generation of Master clock by clearing PCR.MCLK bit.

This clock can be enabled by invoking XMC_SPI_CH_EnableMasterClock() as needed in the program.
Related APIs:
XMC_SPI_CH_EnableMasterClock()
void XMC_SPI_CH_DisableSlaveSelect ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant ponter to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Disable all the slave signals by clearing PCR.SELO bits.

XMC_SPI_CH_EnableSlaveSelect() has to be invoked to start the communication with the desired slave again.
Related APIs:
XMC_SPI_CH_EnableSlaveSelect()
void XMC_SPI_CH_DisableSlaveSelectCodedMode ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description
Each SELOx line (with x = 0-7) can be directly connected to an external slave device.
void XMC_SPI_CH_DisableSOF ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description
Set the control of the handling start of frame through hardware, by clearing TCSR.SOF bit.

Typically this can be disabled, where the transmission control is done by the hardware.
Related APIs:
XMC_SPI_CH_EnableSOF()
void XMC_SPI_CH_EnableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Returns
None
Description
Enable data transmission.

Use this function in combination with XMC_SPI_CH_DisableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Note
If you need more control over the start of transmission use XMC_USIC_CH_SetStartTransmisionMode()
Related APIs:
XMC_SPI_CH_DisableDataTransmission()

void XMC_SPI_CH_EnableDelayCompensation ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Returns
None
Description
Enables delay compensation.

Delay compensation can be applied to the receive path.
Related APIs:
XMC_SPI_CH_DisableDelayCompensation()

void XMC_SPI_CH_EnableEOF ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description
Configure the handling of end of frame through software, by setting TCSR.EOF bit.

This can be used if the software handles the TBUF data without FIFO. If EOF is set, a valid content of the TBUF is considered as last word of a frame. After transfer of the last word, MSLS signal becomes inactive. For software handling of EOF bit, it is recommended to configure TCSR.WLEMD as 0.
Note: The API should be called before putting the last data word of the frame to TBUF.
Related APIs:
XMC_SPI_CH_DisableEOF()
void XMC_SPI_CH_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
event | Protocol events which have to be enabled. Refer @ XMC_SPI_CH_EVENT_t for valid values. OR combinations of these enum items can be used as input.
Returns
None
Description:
Enables the SPI protocol specific events, by configuring PCR register.

Events can be enabled as needed using XMC_SPI_CH_EnableEvent(). XMC_SPI_CH_DisableEvent() can be used to disable the events.
Related APIs:
XMC_SPI_CH_DisableEvent()
void XMC_SPI_CH_EnableFEM ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:

Configure to keep MSLS(Slave select signal) active even after finishing the current data frame, by setting PCR.FEM bit.

This is typically used during the transmission of multi-data word frames, where there is possibility of delay in delivering the data. Frame end mode is enabled in XMC_SPI_CH_Init() during initialization. To disable XMC_SPI_CH_DisableFEM() can be invoked as needed in the program.

Related APIs:
XMC_SPI_CH_DisableFEM()
void XMC_SPI_CH_EnableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_INPUT_t | input
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
input SPI channel input stage.
Refer XMC_SPI_CH_INPUT_t for valid inputs.
Returns
None
Description
Enables the polarity inversion of input data signal, by setting DXyCR.DPOL(where y = input).

This is not set in XMC_SPI_CH_Init(). Invoke XMC_SPI_CH_EnableInputInversion() as needed later in the program. To disable the inversion XMC_SPI_CH_DisableInputInversion() can be invoked.
Related APIs:
XMC_SPI_CH_DisableInputInversion()
void XMC_SPI_CH_EnableInterwordDelay ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Enables the delay after each word, by setting PCR.TIWEN bit.

The inter word delay starts at the end of last SCLK cycle of data word. During this time no clock pulses are generated and MSLS signal stays active. If inter word delay is not enabled, last data bit of a data word is directly followed by the first data bit of the next data word. This is not enabled in XMC_SPI_CH_Init(). To enable XMC_SPI_CH_EnableInterwordDelay() has to be invoked as needed in the program. And can be disabled by invoking XMC_SPI_CH_DisableInterwordDelay().
Related APIs:
XMC_SPI_CH_DisableInterwordDelay()
void XMC_SPI_CH_EnableMasterClock ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Enables the generation of Master clock by setting PCR.MCLK bit.

This clock can be used as a clock reference for external devices. This is not enabled during initialization in XMC_SPI_CH_Init(). Invoke XMC_SPI_CH_EnableMasterClock() to enable as needed in the program, or if it is disabled by XMC_SPI_CH_DisableMasterClock().
Related APIs:
XMC_SPI_CH_DisableMasterClock()
void XMC_SPI_CH_EnableSlaveSelect | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_SLAVE_SELECT_t | slave
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
slave Slave select signal.
Refer XMC_SPI_CH_SLAVE_SELECT_t for valid values.
Returns
None
Description:
Enable the selected slave signal by setting PCR.SELO bits.

Each slave is connected with one slave select signal. This is not configured in XMC_SPI_CH_Init(). Invoke XMC_SPI_CH_EnableSlaveSelect() with required slave to to start the communication. After finishing the communication XMC_SPI_CH_DisableSlaveSelect() can be invoked to disable the slaves.
Related APIs:
XMC_SPI_CH_DisableSlaveSelect()
void XMC_SPI_CH_EnableSlaveSelectCodedMode ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description
The SELOx lines (with x = 1-7) can be used as addresses for an external address decoder to increase the number of external slave devices.
void XMC_SPI_CH_EnableSOF ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description
Configure the handling of start of frame through software, by setting TCSR.SOF bit.

This can be used if the software handles the TBUF data without FIFO. If SOF is set, a valid content of the TBUF is considered as first word of a new frame by finishing the currently running frame. For software handling of SOF bit, it is recommended to configure TCSR.WLEMD as 0. This is not configured during initialization. XMC_SPI_CH_EnableSOF() can be called as needed in the program and can be disabled by XMC_SPI_CH_DisableSOF().
Related APIs:
XMC_SPI_CH_DisableSOF()
uint16_t XMC_SPI_CH_GetReceivedData ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
uint16_t Data read from the receive buffer.
Description:
Reads data from the receive buffer based on the FIFO selection.

Invocation of XMC_SPI_CH_Receive() receives the data and place it into receive buffer. After receiving the data XMC_SPI_CH_GetReceivedData() can be used to read the data from the buffer.
Related APIs:
XMC_SPI_CH_Receive()
uint32_t XMC_SPI_CH_GetStatusFlag ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
uint32_t Status of SPI protocol events.
Description:
Returns the status of the events, by reading PSR register.

This indicates the status of the all the events, for SPI communication.
Related APIs:
XMC_SPI_CH_ClearStatusFlag()
void XMC_SPI_CH_Init | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_CONFIG_t *const | config
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
config pointer to constant SPI channel configuration data structure.
Refer data structure XMC_SPI_CH_CONFIG_t for detail.
Returns
None
Description:
Initializes the selected SPI channel with the config structure.

Enable SPI channel by calling XMC_USIC_CH_Enable() and then configures
  • Baudrate,
  • Passive data level as active high,
  • Shift control signal as active high,
  • Frame length as 64U,
  • Word length as 8U,
  • Enable Hardware port control mode,
  • Enable transmission of data TDV(Transmit data valid) bit is set to 1,
  • Enable invalidation of data in TBUF once loaded into shift register,
  • Parity mode settings
And if master mode is selected,
  • Enables MSLS signal generation,
  • configures slave selection as normal mode,
  • Set polarity for the Slave signal,
  • Enable Frame end mode(MSLS signal is kept active after transmission of a frame)
void XMC_SPI_CH_Receive | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_MODE_t | mode
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
mode Communication mode of the SPI, based on this mode TCI(Transmit control information)is updated.
Refer XMC_SPI_CH_MODE_t for valid values.
Returns
None
Description:
Transmits a dummy data(FFFFH) to provide clock for slave and receives the data from the slave.

XMC_SPI_CH_Receive() receives the data and places it into buffer based on the FIFO selection. After reception of data XMC_SPI_CH_GetReceivedData() can be invoked to read the data from the buffers.
Related APIs:
XMC_SPI_CH_GetReceivedDaa()
void XMC_SPI_CH_SelectInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Parameters
interrupt_node Interrupt node pointer to be configured.
Range: XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT, XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER etc.
service_request Service request number.
Range: 0 to 5.
Returns
None
Description
Sets the interrupt node for USIC channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so.
Note: NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_SPI_CH_EnableEvent()

XMC_SPI_CH_STATUS_t XMC_SPI_CH_SetBaudrate | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | rate
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
rate | Bus speed in bits per second
Returns
XMC_SPI_CH_STATUS_t Status of the SPI driver after the request for setting baudrate is processed.
XMC_SPI_CH_STATUS_OK- If the baudrate is successfully changed.
XMC_SPI_CH_STATUS_ERROR- If the new baudrate value is out of range.
Description:
Sets the bus speed in bits per second
Related APIs:
XMC_SPI_CH_Init(), XMC_SPI_CH_Stop()
void XMC_SPI_CH_SetBitOrderLsbFirst ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Set the order of data transfer from LSB to MSB, by clearing SCTR.SDIR bit.

This is typically based on the slave settings. Invoke XMC_SPI_CH_SetBitOrderLsbFirst() to set direction as needed in the program.
Related APIs:
XMC_SPI_CH_SetBitOrderMsbFirst()
void XMC_SPI_CH_SetBitOrderMsbFirst ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Set the order of data transfer from MSB to LSB, by setting SCTR.SDIR bit.

This is typically based on the slave settings. This is not set during XMC_SPI_CH_Init(). Invoke XMC_SPI_CH_SetBitOrderMsbFirst() to set direction as needed in the program.
Related APIs:
XMC_SPI_CH_SetBitOrderLsbFirst()
void XMC_SPI_CH_SetFrameLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | frame_length
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
frame_length Number of bits in a frame.
Range: 1 to 64. If the value 64 is configured, then the frame does not automatically end. User should explicitly end the frame.
Returns
None
Description
Define the data frame length.

Set the number of bits to be serially transmitted in a frame. The frame length should be multiples of word length. If the value is set to 64, the frame does not automatically end. Use XMC_SPI_CH_DisableSlaveSelect() to end the frame after all the data is transmitted.
Related APIs:
XMC_USIC_CH_SetWordLength(), XMC_USIC_CH_EnableFrameLengthControl(), XMC_SPI_CH_DisableSlaveSelect()
void XMC_SPI_CH_SetInputSource | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_INPUT_t | input,
 |  | const uint8_t | source
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
input SPI channel input stage.
Refer XMC_SPI_CH_INPUT_t for valid values
source | Input source select for the input stage. Range : [0 to 7]
Returns
None
Description
Selects the data source for SPI input stage, by configuring DXCR.DSEL bits.

Selects the input data signal source among DXnA, DXnB.. DXnG for the input stage. The API can be used for all the input stages like DX0CR, DX1CR etc. This is not done during initialization. This has to be configured before starting the SPI communication.
void XMC_SPI_CH_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | service_request
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
service_request | Service request number. Range: [0 to 5]
Returns
None
Description
Sets the interrupt node for SPI channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so. This is not configured in XMC_SPI_CH_Init() during initialization.
Note::
  1. NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_USIC_CH_EnableEvent()
void XMC_SPI_CH_SetInterwordDelay | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | tinterword_delay_ns
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
tinterword_delay_ns | delay in terms of nano seconds.
Returns
None
Description:
Configures the inter word delay by setting PCR.PCTQ1, PCR.DCTQ1 bit fields.

The inter word delay is dependent on the peripheral clock. The maximum possible value is calculated by using the below formula
Maximum inter word delay = ((1 + PCTQ1_max)(1 + DCTQ1_max)) / peripheral clock
where PCTQ1_max = 3 and DCTQ1_max = 31
After configuring the inter word delay, this has to be enabled by invoking XMC_SPI_CH_EnableInterwordDelay().
Related APIs:
XMC_SPI_CH_EnableInterwordDelay(),XMC_SPI_CH_SetInterwordDelaySCLK()
void XMC_SPI_CH_SetInterwordDelaySCLK | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | sclk_period
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
sclk_period | in terms of clk cycles.
Returns
None
Description:
Configures the inter word delay by setting PCR.DCTQ1 bit fields.

This delay is dependent on the peripheral clock. The maximum possible value supported by this API is 32 clock cycles. After configuring the inter word delay, this has to be enabled by invoking XMC_SPI_CH_EnableInterwordDelay().
Related APIs:
XMC_SPI_CH_EnableInterwordDelay(),XMC_SPI_CH_EnableInterwordDelay()
void XMC_SPI_CH_SetSlaveSelectDelay | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | sclk_period
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
sclk_period | delay in terms of sclk clock cycles.
Returns
None
Description:
Configures the leading/trailing delay by setting BRG.DCTQ bit field.

This delay is dependent on the peripheral clock. The maximum possible value supported by this API is 30 clock cycles.
void XMC_SPI_CH_SetSlaveSelectPolarity | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t | selo_inversion
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
selo_inversion Polarity of the slave select signal relative to the MSLS signal.
Refer XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t for valid values
Returns
None
Description
Set the polarity of the slave select signal, by configuring PCR.SELINV bit.

Normally MSLS signal is active low level signal. SO based on the slave inversion has to be applied. This is configured in XMC_SPI_CH_Init() during initialization. Invoke XMC_SPI_CH_SetSlaveSelectPolarity() with desired settings as needed later in the program.
void XMC_SPI_CH_SetTransmitMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_SPI_CH_MODE_t | mode
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
mode Communication mode of the SPI, based on this mode TCI(Transmit control information)is updated.
Refer XMC_SPI_CH_MODE_t for valid values.
Returns
None
Description:
In Dual and Quad modes, hardware port control(CCR.HPCEN) mode is enabled.

By enabling this the direction of the data pin is updated by hardware itself. Before transmitting the data set the mode to ensure the proper communication.
Related APIs:
XMC_SPI_CH_Transmit()
void XMC_SPI_CH_SetWordLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | word_length
 | ) |  |
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
word_length Number of bits to be configured for a data word.
Range: 1 to 16.
Returns
None
Description
Defines the data word length.

Sets the number of bits to represent a data word. Frame length should be a multiple of word length.
Related APIs:
XMC_SPI_CH_SetFrameLength()
void XMC_SPI_CH_Start ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
None
Description:
Set the selected USIC channel to operate in SPI mode, by setting CCR.MODE bits.

It should be executed after XMC_SPI_CH_Init() during initialization. By invoking XMC_SPI_CH_Stop(), the MODE is set to IDLE state. Call XMC_SPI_CH_Start() to set the SPI mode again, as needed later in the program.
Related APIs:
XMC_SPI_CH_Init(), XMC_SPI_CH_Stop()
XMC_SPI_CH_STATUS_t XMC_SPI_CH_Stop ( XMC_USIC_CH_t *const channel )
Parameters
channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
Returns
XMC_SPI_CH_STATUS_t Status of the SPI driver after the request for stopping is processed.
XMC_SPI_CH_STATUS_OK- If the USIC channel is successfully put to IDLE mode.
XMC_SPI_CH_STATUS_BUSY- If the USIC channel is busy transmitting data.
Description:
Set the selected SPI channel to IDLE mode, by clearing CCR.MODE bits.

After calling XMC_SPI_CH_Stop, channel is IDLE mode. So no communication is supported. XMC_SPI_CH_Start() has to be invoked to start the communication again.
Related APIs:
XMC_SPI_CH_Start()
void XMC_SPI_CH_Transmit | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data,
 |  | const XMC_SPI_CH_MODE_t | mode
 | ) |  |
Parameters
channel | A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address.
data | Data to be transmitted
mode Communication mode of the SPI, based on this mode TCI(Transmit control information)is updated.
Refer XMC_SPI_CH_MODE_t for valid values.
Returns
None
Description:
Puts the data into FIFO, if FIFO mode is enabled or else into standard buffer, by setting the proper mode.

In Dual and Quad modes, hardware port control(CCR.HPCEN) mode is enabled. By enabling this the direction of the data pin is updated by hardware itself. TCI(Transmit Control Information) allows dynamic control of both the data shift mode and pin direction during data transfers by writing to SCTR.DSM and SCTR.HPCDIR bit fields. To support this auto update, TCSR.HPCMD(Hardware Port control) will be enabled during the initialization using XMC_SPI_CH_Init() for all modes.
Related APIs:
XMC_SPI_CH_Receive()
void XMC_SPI_CH_TriggerServiceRequest | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | service_request_line
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_SPI0_CH0, XMC_SPI0_CH1,XMC_SPI1_CH0,XMC_SPI1_CH1,XMC_SPI2_CH0,XMC_SPI2_CH1
Note
Availability of SPI1 and SPI2 depends on device selection
Parameters
service_request_line service request number of the event to be triggered.
Range: 0 to 5.
Returns
None
Description
Trigger a SPI interrupt service request.

When the SPI service request is triggered, the NVIC interrupt associated with it will be generated if enabled.
Related APIs:
XMC_SPI_CH_SelectInterruptNodePointer()

Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_SPI_CH_CONFIG_t Struct Reference

Data Fields
XMC_SPI_CH_CONFIG_t Struct Reference
XMC Peripheral Library » SPI

#include <xmc_spi.h>

Data Fields

uint32_t baudrate
XMC_SPI_CH_BUS_MODE_t bus_mode
XMC_USIC_CH_PARITY_MODE_t parity_mode
XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t selo_inversion

Detailed Description

Structure for initializing SPI channel.

Field Documentation

uint32_t baudrate

Module baud rate for communication

XMC_SPI_CH_BUS_MODE_t bus_mode

Bus mode: Master/Slave

XMC_USIC_CH_PARITY_MODE_t parity_mode

Enable parity check for transmit and received data

XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t selo_inversion

Enable inversion of Slave select signal relative to the internal MSLS signal

The documentation for this struct was generated from the following file:
  • xmc_spi.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: UART

Data Structures | Macros | Enumerations | Functions
UART
XMC Peripheral Library

Data Structures

struct XMC_UART_CH_CONFIG_t

Macros

#define | XMC_UART0_CH0 XMC_USIC0_CH0
#define | XMC_UART0_CH1 XMC_USIC0_CH1
#define | XMC_UART1_CH0 XMC_USIC1_CH0
#define | XMC_UART1_CH1 XMC_USIC1_CH1
#define | XMC_UART2_CH0 XMC_USIC2_CH0
#define | XMC_UART2_CH1 XMC_USIC2_CH1

Enumerations

Functions

void | XMC_UART_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, const uint32_t flag)
void | XMC_UART_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_UART_CH_DisableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_DisableInputSync (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_UART_CH_EnableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_EnableInputSync (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
uint16_t | XMC_UART_CH_GetReceivedData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_UART_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_Init (XMC_USIC_CH_t *const channel, const XMC_UART_CH_CONFIG_t *const config)
void | XMC_UART_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_UART_CH_STATUS_t | XMC_UART_CH_SetBaudrate (XMC_USIC_CH_t *const channel, uint32_t rate, uint32_t oversampling)
void | XMC_UART_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_UART_CH_SetInputSamplingFreq (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input, const XMC_UART_CH_INPUT_SAMPLING_FREQ_t sampling_freq)
void | XMC_UART_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input, const uint8_t source)
void | XMC_UART_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_UART_CH_SetPulseLength (XMC_USIC_CH_t *const channel, const uint8_t pulse_length)
void | XMC_UART_CH_SetSamplePoint (XMC_USIC_CH_t *const channel, const uint32_t sample_point)
void | XMC_UART_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_UART_CH_Start (XMC_USIC_CH_t *const channel)
XMC_UART_CH_STATUS_t | XMC_UART_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_Transmit (XMC_USIC_CH_t *const channel, const uint16_t data)
void | XMC_UART_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)

Detailed Description

The UART driver uses Universal Serial Interface Channel(USIC) module to implement UART protocol. It provides APIs to configure USIC channel for UART communication. The driver enables the user in getting the status of UART protocol events, configuring interrupt service requests, protocol related parameter configuration etc.

UART driver features:

  1. Configuration structure XMC_UART_CH_CONFIG_t and initialization function XMC_UART_CH_Init()
  2. Enumeration of events with their bit masks XMC_UART_CH_EVENT_t, XMC_UART_CH_STATUS_FLAG_t
  3. Allows the selection of input source for the DX0 input stage using the API XMC_UART_CH_SetInputSource()
  4. Allows configuration of baudrate using XMC_UART_CH_SetBaudrate() and configuration of data length using XMC_UART_CH_SetWordLength() and XMC_UART_CH_SetFrameLength()
  5. Provides the status of UART protocol events, XMC_UART_CH_GetStatusFlag()
  6. Allows transmission of data using XMC_UART_CH_Transmit() and gets received data using XMC_UART_CH_GetReceivedData()

Macro Definition Documentation

#define XMC_UART0_CH0 XMC_USIC0_CH0

USIC0 channel 0 base address

#define XMC_UART0_CH1 XMC_USIC0_CH1

USIC0 channel 1 base address

#define XMC_UART1_CH0 XMC_USIC1_CH0

USIC1 channel 0 base address

#define XMC_UART1_CH1 XMC_USIC1_CH1

USIC1 channel 1 base address

#define XMC_UART2_CH0 XMC_USIC2_CH0

USIC2 channel 0 base address

#define XMC_UART2_CH1 XMC_USIC2_CH1

USIC2 channel 1 base address

Enumeration Type Documentation

enum XMC_UART_CH_EVENT_t

UART configuration events. The enums can be used for configuring events using the CCR register.

Enumerator
XMC_UART_CH_EVENT_RECEIVE_START | Receive start event
XMC_UART_CH_EVENT_DATA_LOST | Data lost event
XMC_UART_CH_EVENT_TRANSMIT_SHIFT | Transmit shift event
XMC_UART_CH_EVENT_TRANSMIT_BUFFER | Transmit buffer event
XMC_UART_CH_EVENT_STANDARD_RECEIVE | Receive event
XMC_UART_CH_EVENT_ALTERNATIVE_RECEIVE | Alternate receive event
XMC_UART_CH_EVENT_BAUD_RATE_GENERATOR | Baudrate generator event
XMC_UART_CH_EVENT_SYNCHRONIZATION_BREAK | Event synchronization break
XMC_UART_CH_EVENT_COLLISION | Event collision
XMC_UART_CH_EVENT_RECEIVER_NOISE | Event receiver noise
XMC_UART_CH_EVENT_FORMAT_ERROR | Event format error
XMC_UART_CH_EVENT_FRAME_FINISHED | Event frame finished
enum XMC_UART_CH_INPUT_SAMPLING_FREQ_t

UART Input sampling frequency options

Enumerator
XMC_UART_CH_INPUT_SAMPLING_FREQ_FPERIPH | Sampling frequency input fperiph
XMC_UART_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER | Sampling frequency input fractional divider
enum XMC_UART_CH_INPUT_t

UART input stages

Enumerator
XMC_UART_CH_INPUT_RXD | UART input stage DX0
XMC_UART_CH_INPUT_RXD1 | UART input stage DX3
XMC_UART_CH_INPUT_RXD2 | UART input stage DX5
enum XMC_UART_CH_INTERRUPT_NODE_POINTER_t

UART channel interrupt node pointers

Enumerator
XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT | Node pointer for transmit shift interrupt
XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER | Node pointer for transmit buffer interrupt
XMC_UART_CH_INTERRUPT_NODE_POINTER_RECEIVE | Node pointer for receive interrupt
XMC_UART_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE | Node pointer for alternate receive interrupt
XMC_UART_CH_INTERRUPT_NODE_POINTER_PROTOCOL | Node pointer for protocol related interrupts
enum XMC_UART_CH_STATUS_FLAG_t

UART portocol status. The enum values can be used for getting the status of UART channel.

Enumerator
XMC_UART_CH_STATUS_FLAG_TRANSMISSION_IDLE | UART Protocol Status transmit IDLE
XMC_UART_CH_STATUS_FLAG_RECEPTION_IDLE | UART Protocol Status receive IDLE
XMC_UART_CH_STATUS_FLAG_SYNCHRONIZATION_BREAK_DETECTED | UART Protocol Status synchronization break detected
XMC_UART_CH_STATUS_FLAG_COLLISION_DETECTED | UART Protocol Status collision detected
XMC_UART_CH_STATUS_FLAG_RECEIVER_NOISE_DETECTED | UART Protocol Status receiver noise detected
XMC_UART_CH_STATUS_FLAG_FORMAT_ERROR_IN_STOP_BIT_0 | UART Protocol Status format error in stop bit 0
XMC_UART_CH_STATUS_FLAG_FORMAT_ERROR_IN_STOP_BIT_1 | UART Protocol Status format error in stop bit 1
XMC_UART_CH_STATUS_FLAG_RECEIVE_FRAME_FINISHED | UART Protocol Status receive frame finished
XMC_UART_CH_STATUS_FLAG_TRANSMITTER_FRAME_FINISHED | UART Protocol Status transmit frame finished
XMC_UART_CH_STATUS_FLAG_TRANSFER_STATUS_BUSY | UART Protocol Status transfer status busy
XMC_UART_CH_STATUS_FLAG_RECEIVER_START_INDICATION | UART Protocol Status receive start indication flag
XMC_UART_CH_STATUS_FLAG_DATA_LOST_INDICATION | UART Protocol Status data lost indication flag
XMC_UART_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION | UART Protocol Status transmit shift indication flag
XMC_UART_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION | UART Protocol Status transmit buffer indication flag
XMC_UART_CH_STATUS_FLAG_RECEIVE_INDICATION | UART Protocol Status receive indication flag
XMC_UART_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION | UART Protocol Status alternative receive indication flag
XMC_UART_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION | UART Protocol Status baudrate generator indication flag
enum XMC_UART_CH_STATUS_t

UART driver status

Enumerator
XMC_UART_CH_STATUS_OK | UART driver status : OK
XMC_UART_CH_STATUS_ERROR | UART driver status : ERROR
XMC_UART_CH_STATUS_BUSY | UART driver status : BUSY

Function Documentation

void XMC_UART_CH_ClearStatusFlag | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | flag
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
flag UART events to be cleared.
Range: Use XMC_UART_CH_STATUS_FLAG_t enumerations for event bitmasks. XMC_UART_CH_STATUS_FLAG_TRANSMISSION_IDLE, XMC_UART_CH_STATUS_FLAG_RECEPTION_IDLE, XMC_UART_CH_STATUS_FLAG_SYNCHRONIZATION_BREAK_DETECTED etc.
Returns
None
Description
Clears the status of UART channel events.

Multiple events can be combined using the bitwise OR operation and configured in one function call. XMC_UART_CH_STATUS_FLAG_t enumerates multiple event bitmasks. These enumerations can be used as input to the API. Events are cleared by setting the bitmask to the PSCR register.
Related APIs:
XMC_UART_CH_DisableEvent(), XMC_UART_CH_GetStatusFlag()

void XMC_UART_CH_DisableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Returns
None
Description
Disable data transmission.

Use this function in combination with XMC_UART_CH_EnableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Related APIs:
XMC_UART_CH_EnableDataTransmission()

void XMC_UART_CH_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
event Bitmask of events to disable. Use the type XMC_UART_CH_EVENT_t for naming events.
Range: XMC_UART_CH_EVENT_RECEIVE_START, XMC_UART_CH_EVENT_DATA_LOST, XMC_UART_CH_EVENT_TRANSMIT_SHIFT, XMC_UART_CH_EVENT_TRANSMIT_BUFFER, etc.
Returns
None
Description
Disables the interrupt events by clearing the bits in CCR register.

Multiple events can be combined using the bitwise OR operation and configured in one function call. XMC_UART_CH_EVENT_FLAG_t enumerates multiple event bitmasks. These enumerations can be used as input to the API.
Related APIs:
XMC_UART_CH_ClearStatusFlag(), XMC_UART_CH_EnableEvent()

void XMC_UART_CH_DisableInputDigitalFilter | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
Returns
None
Description
Disables the digital filter for UART input stage.

Related APIs:
XMC_UART_CH_EnableInputDigitalFilter()

void XMC_UART_CH_DisableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
Returns
None
Description
Disables input inversion for UART input data signal.

Resets the input data polarity for the UART input data signal.
Related APIs:
XMC_UART_CH_EnableInputInversion()

void XMC_UART_CH_DisableInputSync | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
Returns
None
Description
Disables synchronous input for the UART input stage.

Related APIs:
XMC_UART_CH_EnableInputSync(), XMC_UART_CH_EnableInputDigitalFilter()

void XMC_UART_CH_EnableDataTransmission ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Returns
None
Description
Enable data transmission.

Use this function in combination with XMC_UART_CH_DisableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. FIFO is filled using XMC_USIC_CH_TXFIFO_PutData().
Note
If you need more control over the start of transmission use XMC_USIC_CH_SetStartTransmisionMode()
Related APIs:
XMC_UART_CH_DisableDataTransmission()

void XMC_UART_CH_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
event Event bitmasks to enable. Use the type XMC_UART_CH_EVENT_t for naming events.
Range: XMC_UART_CH_EVENT_RECEIVE_START, XMC_UART_CH_EVENT_DATA_LOST, XMC_UART_CH_EVENT_TRANSMIT_SHIFT, XMC_UART_CH_EVENT_TRANSMIT_BUFFER, etc.
Returns
None
Description
Enables interrupt events for UART communication.

Multiple events can be combined using the bitwise OR operation and configured in one function call. XMC_UART_CH_EVENT_t enumerates multiple event bitmasks. These enumerations can be used as input to the API. Events are configured by setting bits in the CCR register.
Related APIs:
XMC_UART_CH_DisableEvent(), XMC_UART_CH_SetInterruptNodePointer(), XMC_UART_CH_GetStatusFlag()

void XMC_UART_CH_EnableInputDigitalFilter | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
Returns
None
Description
Enables the digital filter for UART input stage.

Related APIs:
XMC_UART_CH_DisableInputDigitalFilter()

void XMC_UART_CH_EnableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
Returns
None
Description
Enables input inversion for UART input data signal.

Polarity of the input source can be changed to provide inverted data input.
Related APIs:
XMC_UART_CH_DisableInputInversion()

void XMC_UART_CH_EnableInputSync | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
Returns
None
Description
Enables synchronous input for the UART input stage.

Related APIs:
XMC_UART_CH_DisableInputSync(), XMC_UART_CH_EnableInputDigitalFilter()

uint16_t XMC_UART_CH_GetReceivedData ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Returns
uint16_t Received data over UART communication channel.
Description
Provides one word of data received over UART communication channel.

Based on the channel configuration, data is either read from the receive FIFO or RBUF register. Before returning the value, there is no check for data validity. User should check the appropriate data receive flags(standard receive/alternative receive/FIFO standard receive/FIFO alternative receive) before executing the API. Reading from an empty receive FIFO can generate a receive error event.
Related APIs:
XMC_UART_CH_GetStatusFlag(), XMC_UART_CH_Transmit()

uint32_t XMC_UART_CH_GetStatusFlag ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Returns
Status of UART channel events.
Range: Use XMC_UART_CH_STATUS_FLAG_t enumerations for event bitmasks. XMC_UART_CH_STATUS_FLAG_TRANSMISSION_IDLE, XMC_UART_CH_STATUS_FLAG_RECEPTION_IDLE, XMC_UART_CH_STATUS_FLAG_SYNCHRONIZATION_BREAK_DETECTED etc.
Description
Provides the status of UART channel events.

Status provided by the API represents the status of multiple events at their bit positions. The bitmasks can be obtained using the enumeration XMC_UART_CH_STATUS_FLAG_t. Event status is obtained by reading the register PSR_ASCMode.
Related APIs:
XMC_UART_CH_EnableEvent(), XMC_UART_CH_ClearStatusFlag()

void XMC_UART_CH_Init | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_CONFIG_t *const | config
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0, XMC_UART1_CH1,XMC_UART2_CH0, XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
config Constant pointer to UART configuration structure of type XMC_UART_CH_CONFIG_t.
Returns
XMC_UART_CH_STATUS_t Status of initializing the USIC channel for UART protocol.
Range: XMC_UART_CH_STATUS_OK if initialization is successful.
XMC_UART_CH_STATUS_ERROR if configuration of baudrate failed.
Description
Initializes the USIC channel for UART protocol.

During the initialization, USIC channel is enabled, baudrate is configured with the defined oversampling value in the intialization structure. If the oversampling value is set to 0 in the structure, the default oversampling of 16 is considered. Sampling point for each symbol is configured at the half of sampling period. Symbol value is decided by the majority decision among 3 samples. Word length is configured with the number of data bits. If the value of frame_length is 0, then USIC channel frame length is set to the same value as word length. If frame_length is greater than 0, it is set as the USIC channel frame length. Parity mode is set to the value configured for parity_mode. The USIC channel should be set to UART mode by calling the XMC_UART_CH_Start() API after the initialization.
Related APIs:
XMC_UART_CH_Start(), XMC_UART_CH_Stop(), XMC_UART_CH_Transmit()

void XMC_UART_CH_SelectInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
interrupt_node Interrupt node pointer to be configured.
Range: XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT, XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER etc.
service_request Service request number.
Range: 0 to 5.
Returns
None
Description
Sets the interrupt node for USIC channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so.
Note: NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_UART_CH_EnableEvent()

XMC_UART_CH_STATUS_t XMC_UART_CH_SetBaudrate | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | rate,
 |  | uint32_t | oversampling
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1 ,XMC_UART1_CH0, XMC_UART1_CH1, XMC_UART2_CH0, XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
rate Desired baudrate.
Range: minimum value = 100, maximum value depends on the peripheral clock frequency
and oversampling. Maximum baudrate can be derived using the formula: (fperiph * 1023)/(1024 * oversampling)
oversampling Required oversampling. The value indicates the number of time quanta for one symbol of data.
This can be related to the number of samples for each logic state of the data signal.
Range: 4 to 32. Value should be chosen based on the protocol used.
Returns
XMC_UART_CH_STATUS_t Status indicating the baudrate configuration.
Range: XMC_USIC_CH_STATUS_OK if baudrate is successfully configured, XMC_USIC_CH_STATUS_ERROR if desired baudrate or oversampling is invalid.
Description:
Sets the bus speed in bits per second.

Derives the values of STEP and PDIV to arrive at the optimum realistic speed possible. oversampling is the number of samples to be taken for each symbol of UART protocol. Default oversampling of 16 is considered if the input oversampling is less than 4. It is recommended to keep a minimum oversampling of 4 for UART.
Related APIs:
XMC_UART_CH_Init(), XMC_UART_CH_Stop()
void XMC_UART_CH_SetFrameLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | frame_length
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
frame_length Number of data bits in each UART frame.
Range: minimum= 1, maximum= 64.
Returns
None
Description
Sets the number of data bits for UART communication.

The frame length is configured by setting the input value to SCTR register. The value of frame_length will be decremented by 1, before setting it to the register. Frame length should not be set to 64 for UART communication.
Related APIs:
XMC_UART_CH_SetWordLength()

void XMC_UART_CH_SetInputSamplingFreq | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input,
 |  | const XMC_UART_CH_INPUT_SAMPLING_FREQ_t | sampling_freq
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
sampling_freq Input sampling frequency.
Range: XMC_UART_CH_INPUT_SAMPLING_FREQ_FPERIPH, XMC_UART_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER.
Returns
None
Description
Sets the sampling frequency for the UART input stage.

Related APIs:
XMC_UART_CH_EnableInputSync(), XMC_UART_CH_EnableInputDigitalFilter()

void XMC_UART_CH_SetInputSource | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_UART_CH_INPUT_t | input,
 |  | const uint8_t | source
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
input UART channel input stage of type XMC_UART_CH_INPUT_t.
Range: XMC_UART_CH_INPUT_RXD (for DX0), XMC_UART_CH_INPUT_RXD1 (for DX3), XMC_UART_CH_INPUT_RXD2 (for DX5).
source Input source select for the input stage. The table provided below maps the decimal value with the input source.
0 | DXnA
1 | DXnB
2 | DXnC
3 | DXnD
4 | DXnE
5 | DXnF
6 | DXnG
7 | Always 1
Returns
None
Description
Sets input soource for the UART communication.

It is used for configuring the input stage for data reception. Selects the input data signal source among DXnA, DXnB.. DXnG for the input stage. The API can be used for the input stages DX0, DX3 and DX5.
Related APIs:
XMC_UART_CH_EnableInputInversion()

void XMC_UART_CH_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | service_request
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
service_request Service request number for generating protocol interrupts.
Range: 0 to 5.
Returns
None
Description
Sets the interrupt node for UART channel protocol events.

For all the protocol events enlisted in the enumeration XMC_UART_CH_EVENT_t, one common interrupt gets generated. The service request connects the interrupt node to the UART protocol events. Note: NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_UART_CH_EnableEvent()

void XMC_UART_CH_SetPulseLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | pulse_length
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
pulse_length Length of the zero pulse in number of time quanta.
Range: 0 to 7.
Returns
None
Description
Sets the length of zero pulse in number of time quanta. Value 0 indicates one time quanta.

Maximum possible is 8 time quanta with the value configured as 7.
The value is set to PCR_ASCMode register.
Related APIs:
XMC_UART_CH_EnableInputInversion(), XMC_UART_CH_SetSamplePoint()

void XMC_UART_CH_SetSamplePoint | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | sample_point
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
sample_point Sample point among the number of samples.
Range: minimum= 0, maximum= oversampling (DCTQ).
Returns
None
Description
Sets the sample point among the multiple samples for each UART symbol.

The sample point is the one sample among number of samples set as oversampling. The value should be less than the oversampling value. XMC_UART_CH_Init() sets the sample point to the sample at the centre. For example if the oversampling is 16, then the sample point is set to 9.
Related APIs:
XMC_UART_CH_EnableInputInversion(), XMC_UART_CH_SetSamplePoint()

void XMC_UART_CH_SetWordLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | word_length
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
word_length Data word length.
Range: minimum= 1, maximum= 16.
Returns
None
Description
Sets the data word length in number of bits.

Word length can range from 1 to 16. It indicates the number of data bits in a data word. The value of word_length will be decremented by 1 before setting the value to SCTR register. If the UART data bits is more than 16, then the frame length should be set to the actual number of bits and word length should be configured with the number of bits expected in each transaction. For example, if number of data bits for UART communication is 20 bits, then the frame length should be set as 20. Word length can be set based on the transmit and receive handling. If data is stored as 8bit array, then the word length can be set to 8. In this case, a full message of UART data should be transmitted/ received as 3 data words.
Related APIs:
XMC_UART_CH_SetFrameLength()

void XMC_UART_CH_Start ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Returns
None
Description
Sets the USIC channel operation mode to UART mode.

CCR register bitfield Mode is set to 2(UART mode). This API should be called after configuring the USIC channel. Transmission and reception can happen only when the UART mode is set. This is an inline function.
Related APIs:
XMC_UART_CH_Stop(), XMC_UART_CH_Transmit()

XMC_UART_CH_STATUS_t XMC_UART_CH_Stop ( XMC_USIC_CH_t *const channel )
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Returns
XMC_UART_CH_STATUS_t Status to indicate if the communication channel is stopped successfully.
XMC_UART_CH_STATUS_OK if the communication channel is stopped. XMC_UART_CH_STATUS_BUSY if the communication channel is busy.
Description
Stops the UART communication.

CCR register bitfield Mode is reset. This disables the communication. Before starting the communication again, the channel has to be reconfigured.
Related APIs:
XMC_UART_CH_Init()

void XMC_UART_CH_Transmit | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data
 | ) |  |
Parameters
channel Constant pointer to USIC channel handle of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
data Data to be transmitted.
Range: 16 bit unsigned data within the range 0 to 65535. Actual size of data transmitted depends on the configured number of bits for the UART protocol in the register SCTR.
Returns
None
Description
Transmits data over serial communication channel using UART protocol.

Based on the channel configuration, data is either put to the transmit FIFO or to TBUF register. Before putting data to TBUF, the API waits for TBUF to finish shifting its contents to shift register. So user can continuously execute the API without checking for TBUF busy status. Based on the number of data bits configured, the lower significant bits will be extracted for transmission.

Note: When FIFO is not configured, the API waits for the TBUF to be available. This makes the execution a blocking call.

Related APIs:
XMC_UART_CH_GetReceivedData()

void XMC_UART_CH_TriggerServiceRequest | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | service_request_line
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_UART0_CH0, XMC_UART0_CH1,XMC_UART1_CH0,XMC_UART1_CH1,XMC_UART2_CH0,XMC_UART2_CH1
Note
Availability of UART1 and UART2 depends on device selection
Parameters
service_request_line service request number of the event to be triggered.
Range: 0 to 5.
Returns
None
Description
Trigger a UART interrupt service request.

When the UART service request is triggered, the NVIC interrupt associated with it will be generated if enabled.
Related APIs:
XMC_UART_CH_SelectInterruptNodePointer()

Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_UART_CH_CONFIG_t Struct Reference

Data Fields
XMC_UART_CH_CONFIG_t Struct Reference
XMC Peripheral Library » UART

#include <xmc_uart.h>

Data Fields

uint32_t | baudrate
uint8_t | data_bits
uint8_t | frame_length
uint8_t | oversampling
XMC_USIC_CH_PARITY_MODE_t parity_mode
uint8_t | stop_bits

Detailed Description

UART initialization structure

Field Documentation

uint32_t baudrate

Desired baudrate. Range: minimum= 100, maximum= (fPERIPH * 1023)/(1024 * oversampling)

uint8_t data_bits

Number of bits for the data field. Value configured as USIC channel word length.
Range: minimum= 1, maximum= 16

uint8_t frame_length

Indicates nmber of bits in a frame. Configured as USIC channel frame length.
Range: minimum= 1, maximum= 63

uint8_t oversampling

Number of samples for a symbol(DCTQ).Range: minimum= 1, maximum= 32

XMC_USIC_CH_PARITY_MODE_t parity_mode

Parity mode. Range: XMC_USIC_CH_PARITY_MODE_NONE, XMC_USIC_CH_PARITY_MODE_EVEN,
XMC_USIC_CH_PARITY_MODE_ODD

uint8_t stop_bits

Number of stop bits. Range: minimum= 1, maximum= 2

The documentation for this struct was generated from the following file:
  • xmc_uart.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: USIC

Data Structures | Macros | Typedefs | Enumerations | Functions
USIC
XMC Peripheral Library

Data Structures

struct XMC_USIC_CH_t

Macros

#define | USIC_CH_DXCR_CM_Msk USIC_CH_DX0CR_CM_Msk
#define | USIC_CH_DXCR_CM_Pos USIC_CH_DX0CR_CM_Pos
#define | USIC_CH_DXCR_DFEN_Msk USIC_CH_DX0CR_DFEN_Msk
#define | USIC_CH_DXCR_DPOL_Msk USIC_CH_DX0CR_DPOL_Msk
#define | USIC_CH_DXCR_DSEL_Msk USIC_CH_DX0CR_DSEL_Msk
#define | USIC_CH_DXCR_DSEL_Pos USIC_CH_DX0CR_DSEL_Pos
#define | USIC_CH_DXCR_DSEN_Msk USIC_CH_DX0CR_DSEN_Msk
#define | USIC_CH_DXCR_INSW_Msk USIC_CH_DX0CR_INSW_Msk
#define | USIC_CH_DXCR_INSW_pos USIC_CH_DX0CR_INSW_Pos
#define | USIC_CH_DXCR_SFSEL_Msk USIC_CH_DX0CR_SFSEL_Msk
#define | USIC_CH_DXCR_SFSEL_Pos USIC_CH_DX0CR_SFSEL_Pos
#define | XMC_USIC0 ((XMC_USIC_t *)USIC0_BASE)
#define | XMC_USIC0_CH0 ((XMC_USIC_CH_t *)USIC0_CH0_BASE)
#define | XMC_USIC0_CH1 ((XMC_USIC_CH_t *)USIC0_CH1_BASE)
#define | XMC_USIC1 ((XMC_USIC_t *)USIC1_BASE)
#define | XMC_USIC1_CH0 ((XMC_USIC_CH_t *)USIC1_CH0_BASE)
#define | XMC_USIC1_CH1 ((XMC_USIC_CH_t *)USIC1_CH1_BASE)
#define | XMC_USIC2 ((XMC_USIC_t *)USIC2_BASE)
#define | XMC_USIC2_CH0 ((XMC_USIC_CH_t *)USIC2_CH0_BASE)
#define | XMC_USIC2_CH1 ((XMC_USIC_CH_t *)USIC2_CH1_BASE)

Typedefs

typedef USIC_GLOBAL_TypeDef XMC_USIC_t

Enumerations

Functions

void | XMC_USIC_CH_ConfigExternalInputSignalToBRG (XMC_USIC_CH_t *const channel, const uint16_t pdiv, const uint32_t oversampling, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_USIC_CH_ConfigureShiftClockOutput (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t passive_level, const XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_t clock_output)
void | XMC_USIC_CH_ConnectInputDataShiftToDataInput (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_ConnectInputDataShiftToPPP (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_Disable (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_DisableFrameLengthControl (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_DisableInputSync (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_DisableTBUFDataValidTrigger (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableTimeMeasurement (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_Enable (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_EnableFrameLengthControl (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_EnableInputSync (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_EnableTBUFDataValidTrigger (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableTimeMeasurement (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_GetCaptureTimerValue (const XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_GetReceiveBufferStatus (XMC_USIC_CH_t *const channel)
XMC_USIC_CH_TBUF_STATUS_t | XMC_USIC_CH_GetTransmitBufferStatus (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_RXFIFO_ClearEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_RXFIFO_Configure (XMC_USIC_CH_t *const channel, const uint32_t data_pointer, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
void | XMC_USIC_CH_RXFIFO_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_RXFIFO_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_RXFIFO_Flush (XMC_USIC_CH_t *const channel)
uint16_t | XMC_USIC_CH_RXFIFO_GetData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_RXFIFO_GetEvent (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_RXFIFO_GetLevel (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_RXFIFO_IsEmpty (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_RXFIFO_IsFull (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_RXFIFO_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
void | XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
XMC_USIC_CH_STATUS_t | XMC_USIC_CH_SetBaudrate (XMC_USIC_CH_t *const channel, uint32_t rate, uint32_t oversampling)
void | XMC_USIC_CH_SetBRGInputClockSource (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_CLOCK_SOURCE_t clock_source)
void | XMC_USIC_CH_SetDataOutputMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_DATA_OUTPUT_MODE_t data_output_mode)
void | XMC_USIC_CH_SetFractionalDivider (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t mode, const uint16_t step)
void | XMC_USIC_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_USIC_CH_SetInputSamplingFreq (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input, const XMC_USIC_CH_INPUT_SAMPLING_FREQ_t sampling_freq)
void | XMC_USIC_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input, const uint8_t source)
void | XMC_USIC_CH_SetInputTriggerCombinationMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_USIC_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
void | XMC_USIC_CH_SetMclkOutputPassiveLevel (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_t passive_level)
void | XMC_USIC_CH_SetMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_OPERATING_MODE_t mode)
void | XMC_USIC_CH_SetPassiveDataLevel (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_PASSIVE_DATA_LEVEL_t passive_level)
void | XMC_USIC_CH_SetShiftDirection (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_SHIFT_DIRECTION_t shift_direction)
void | XMC_USIC_CH_SetStartTransmisionMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_START_TRANSMISION_MODE_t start_transmision_mode)
void | XMC_USIC_CH_SetTransmitBufferStatus (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_TBUF_STATUS_SET_t transmit_buffer_status)
void | XMC_USIC_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_USIC_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)
void | XMC_USIC_CH_TXFIFO_ClearEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_TXFIFO_Configure (XMC_USIC_CH_t *const channel, const uint32_t data_pointer, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
void | XMC_USIC_CH_TXFIFO_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_TXFIFO_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_TXFIFO_Flush (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_TXFIFO_GetEvent (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_TXFIFO_GetLevel (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_TXFIFO_IsEmpty (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_TXFIFO_IsFull (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_TXFIFO_PutData (XMC_USIC_CH_t *const channel, const uint16_t data)
void | XMC_USIC_CH_TXFIFO_PutDataFLEMode (XMC_USIC_CH_t *const channel, const uint16_t data, const uint32_t frame_length)
void | XMC_USIC_CH_TXFIFO_PutDataHPCMode (XMC_USIC_CH_t *const channel, const uint16_t data, const uint32_t frame_length)
void | XMC_USIC_CH_TXFIFO_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
void | XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
void | XMC_USIC_CH_WriteToTBUF (XMC_USIC_CH_t *const channel, const uint16_t data)
void | XMC_USIC_CH_WriteToTBUFTCI (XMC_USIC_CH_t *const channel, const uint16_t data, const uint32_t transmit_control_information)
void | XMC_USIC_Disable (XMC_USIC_t *const usic)
void | XMC_USIC_Enable (XMC_USIC_t *const usic)

Detailed Description

The Universal Serial Interface Channel(USIC) module is a flexible interface module covering several serial communication protocols. A USIC module contains two independent communication channels named USICx_CH0 and USICx_CH1, with x being the number of the USIC module. The user can program, during run-time, which protocol will be handled by each communication channel and which pins are used. The driver provides APIs, configuration structures and enumerations to configure common features of multiple serial communication protocols.

USIC driver features:

  1. Allows configuration of FIFO for transmit and receive functions.
  2. Provides a structure type XMC_USIC_CH_t to represent the USIC channel registers in a programmer friendly format.
  3. Allows configuration of automatic update for frame length, word length, slave select or slave address.
  4. Allows transmission of data to FIFO using XMC_USIC_CH_TXFIFO_PutData() and XMC_USIC_CH_TXFIFO_PutDataFLEMode()
  5. Allows reading of received data in FIFO using XMC_USIC_CH_RXFIFO_GetData()
  6. Allows configuration of baudrate using XMC_USIC_CH_SetBaudrate()
  7. Provides API to trigger interrupts using XMC_USIC_CH_TriggerServiceRequest()

Macro Definition Documentation

#define USIC_CH_DXCR_CM_Msk USIC_CH_DX0CR_CM_Msk

Common mask for CM bitfield mask in DXnCR register

#define USIC_CH_DXCR_CM_Pos USIC_CH_DX0CR_CM_Pos

Common mask for CM bitfield position in DXnCR register

#define USIC_CH_DXCR_DFEN_Msk USIC_CH_DX0CR_DFEN_Msk

Common mask for DFEN bitfield mask in DXnCR register

#define USIC_CH_DXCR_DPOL_Msk USIC_CH_DX0CR_DPOL_Msk

Common mask for DPOL bitfield mask in DXnCR register

#define USIC_CH_DXCR_DSEL_Msk USIC_CH_DX0CR_DSEL_Msk

Common mask for DSEL bitfield mask in DXnCR register

#define USIC_CH_DXCR_DSEL_Pos USIC_CH_DX0CR_DSEL_Pos

Common mask for DSEL bitfield position in DXnCR register

#define USIC_CH_DXCR_DSEN_Msk USIC_CH_DX0CR_DSEN_Msk

Common mask for DSEN bitfield mask in DXnCR register

#define USIC_CH_DXCR_INSW_Msk USIC_CH_DX0CR_INSW_Msk

Common mask for INSW bitfield mask in DXnCR register

#define USIC_CH_DXCR_INSW_pos USIC_CH_DX0CR_INSW_Pos

Common mask for INSW bitfield position in DXnCR register

#define USIC_CH_DXCR_SFSEL_Msk USIC_CH_DX0CR_SFSEL_Msk

Common mask for SFSEL bitfield mask in DXnCR register

#define USIC_CH_DXCR_SFSEL_Pos USIC_CH_DX0CR_SFSEL_Pos

Common mask for SFSEL bitfield position in DXnCR register

#define XMC_USIC0 ((XMC_USIC_t *)USIC0_BASE)

USIC0 module base address

#define XMC_USIC0_CH0 ((XMC_USIC_CH_t *)USIC0_CH0_BASE)

USIC0 channel 0 base address

#define XMC_USIC0_CH1 ((XMC_USIC_CH_t *)USIC0_CH1_BASE)

USIC0 channel 1 base address

#define XMC_USIC1 ((XMC_USIC_t *)USIC1_BASE)

USIC1 module base address

#define XMC_USIC1_CH0 ((XMC_USIC_CH_t *)USIC1_CH0_BASE)

USIC1 channel 0 base address

#define XMC_USIC1_CH1 ((XMC_USIC_CH_t *)USIC1_CH1_BASE)

USIC1 channel 1 base address

#define XMC_USIC2 ((XMC_USIC_t *)USIC2_BASE)

USIC2 module base address

#define XMC_USIC2_CH0 ((XMC_USIC_CH_t *)USIC2_CH0_BASE)

USIC2 channel 0 base address

#define XMC_USIC2_CH1 ((XMC_USIC_CH_t *)USIC2_CH1_BASE)

USIC2 channel 1 base address

Typedef Documentation

typedef USIC_GLOBAL_TypeDef XMC_USIC_t

USIC module structure

Enumeration Type Documentation

enum XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t

USIC channel baudrate generator divider mode

Enumerator
XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_DISABLED | Baudrate generator clock divider: Disabled
XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_NORMAL | Baudrate generator clock divider: Normal mode
XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_FRACTIONAL | Baudrate generator clock divider: Fractional mode
enum XMC_USIC_CH_BRG_CLOCK_SOURCE_t

USIC channel baudrate generator clock source

Enumerator
XMC_USIC_CH_BRG_CLOCK_SOURCE_DIVIDER | Baudrate generator clock source : Source divider. (Internal clock source)
XMC_USIC_CH_BRG_CLOCK_SOURCE_DX1T | Baudrate generator clock source : DX1T. (External clock source)
enum XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_t

USIC channel baudrate generator master clock passive level

Enumerator
XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_0 | Baudrate generator master clock passive level(idle mode signal level) 0
XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_1 | Baudrate generator master clock passive level((idle mode signal level)) 1
enum XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_t

USIC channel baudrate generator shift clock output

Enumerator
XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK | Baudrate generator shift clock output: SCL.(Internally generated shift clock)
XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 | Baudrate generator shift clock output: DX1. (External input shift clock)
enum XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t

USIC channel baudrate generator shift clock passive level

Enumerator
XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED | Shift clock passive level 0, delay disabled
XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED | Shift clock passive level 1, delay disabled
XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED | Shift clock passive level 0, delay enabled
XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_ENABLED | Shift clock passive level 1, delay enabled
enum XMC_USIC_CH_DATA_OUTPUT_MODE_t

USIC channel data output mode

Enumerator
XMC_USIC_CH_DATA_OUTPUT_MODE_NORMAL | Data output normal mode
XMC_USIC_CH_DATA_OUTPUT_MODE_INVERTED | Data output inverted mode
enum XMC_USIC_CH_EVENT_t

USIC channel events

Enumerator
XMC_USIC_CH_EVENT_RECEIVE_START | Receive start event
XMC_USIC_CH_EVENT_DATA_LOST | Data lost event
XMC_USIC_CH_EVENT_TRANSMIT_SHIFT | Transmit shift event
XMC_USIC_CH_EVENT_TRANSMIT_BUFFER | Transmit buffer event
XMC_USIC_CH_EVENT_STANDARD_RECEIVE | Receive event
XMC_USIC_CH_EVENT_ALTERNATIVE_RECEIVE | Alternate receive event
XMC_USIC_CH_EVENT_BAUD_RATE_GENERATOR | Baudrate generator event
enum XMC_USIC_CH_FIFO_SIZE_t

USIC channel receive FIFO size

Enumerator
XMC_USIC_CH_FIFO_DISABLED | FIFO Disabled
XMC_USIC_CH_FIFO_SIZE_2WORDS | FIFO size: 2 words
XMC_USIC_CH_FIFO_SIZE_4WORDS | FIFO size: 4 words
XMC_USIC_CH_FIFO_SIZE_8WORDS | FIFO size: 8 words
XMC_USIC_CH_FIFO_SIZE_16WORDS | FIFO size: 16 words
XMC_USIC_CH_FIFO_SIZE_32WORDS | FIFO size: 32 words
XMC_USIC_CH_FIFO_SIZE_64WORDS | FIFO size: 64 words
enum XMC_USIC_CH_INPUT_COMBINATION_MODE_t

USIC channel input combination mode

Enumerator
XMC_USIC_CH_INPUT_COMBINATION_MODE_TRIGGER_DISABLED | The trigger activation is disabled.
XMC_USIC_CH_INPUT_COMBINATION_MODE_RISING_EDGE | A rising edge activates DXnT
XMC_USIC_CH_INPUT_COMBINATION_MODE_FALLING_EDGE | A falling edge activates DXnT
XMC_USIC_CH_INPUT_COMBINATION_MODE_BOTH_EDGES | Both edges activate DXnT
enum XMC_USIC_CH_INPUT_SAMPLING_FREQ_t

USIC channel input source sampling frequency

Enumerator
XMC_USIC_CH_INPUT_SAMPLING_FREQ_FPERIPH | Use fperiph frequency for input source sampling
XMC_USIC_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER | Common mask for SFSEL bitfield position in DXnCR register Use fFD(fractional divider) frequency for input source sampling
enum XMC_USIC_CH_INPUT_t

USIC channel inputs

Enumerator
XMC_USIC_CH_INPUT_DX0 | DX0 input
XMC_USIC_CH_INPUT_DX1 | DX1 input
XMC_USIC_CH_INPUT_DX2 | DX2 input
XMC_USIC_CH_INPUT_DX3 | DX3 input
XMC_USIC_CH_INPUT_DX4 | DX4 input
XMC_USIC_CH_INPUT_DX5 | DX5 input
enum XMC_USIC_CH_INTERRUPT_NODE_POINTER_t

USIC channel interrupt node pointers

Enumerator
XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT | Node pointer for transmit shift interrupt
XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER | Node pointer for transmit buffer interrupt
XMC_USIC_CH_INTERRUPT_NODE_POINTER_RECEIVE | Node pointer for receive interrupt
XMC_USIC_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE | Node pointer for alternate receive interrupt
XMC_USIC_CH_INTERRUPT_NODE_POINTER_PROTOCOL | Node pointer for protocol related interrupts
enum XMC_USIC_CH_KERNEL_MODE_t

USIC channel kernel mode

Enumerator
XMC_USIC_CH_KERNEL_MODE_RUN_0 | Run mode 0 (transmission and reception possible)
XMC_USIC_CH_KERNEL_MODE_RUN_1 | Run mode 1 (transmission and reception possible)
XMC_USIC_CH_KERNEL_MODE_STOP_0 | Stop mode 0 (no transmission, but reception possible)
XMC_USIC_CH_KERNEL_MODE_STOP_1 | Stop mode 1 (both transmission and reception not possible)
enum XMC_USIC_CH_OPERATING_MODE_t

USIC channel operating mode

Enumerator
XMC_USIC_CH_OPERATING_MODE_IDLE | USIC channel idle
XMC_USIC_CH_OPERATING_MODE_SPI | SPI mode
XMC_USIC_CH_OPERATING_MODE_UART | UART mode
XMC_USIC_CH_OPERATING_MODE_I2S | I2S mode
XMC_USIC_CH_OPERATING_MODE_I2C | I2C mode
enum XMC_USIC_CH_PARITY_MODE_t

USIC channel parity mode

Enumerator
XMC_USIC_CH_PARITY_MODE_NONE | Disable parity mode
XMC_USIC_CH_PARITY_MODE_EVEN | Enable even parity mode
XMC_USIC_CH_PARITY_MODE_ODD | Enable odd parity mode
enum XMC_USIC_CH_PASSIVE_DATA_LEVEL_t

USIC channel output signal passive data level

Enumerator
XMC_USIC_CH_PASSIVE_DATA_LEVEL0 | Passive level(idle mode signal level) 0
XMC_USIC_CH_PASSIVE_DATA_LEVEL1 | Passive level(idle mode signal level) 1
enum XMC_USIC_CH_RBUF_STATUS_t

USIC channel receive buffer status

Enumerator
XMC_USIC_CH_RBUF_STATUS_DATA_VALID0 | RBUF0 data has not yet been read out
XMC_USIC_CH_RBUF_STATUS_DATA_VALID1 | RBUF1 data has not yet been read out
enum XMC_USIC_CH_RXFIFO_EVENT_CONF_t

USIC channel receive FIFO event configuration

Enumerator
XMC_USIC_CH_RXFIFO_EVENT_CONF_STANDARD | Enable FIFO standard receive interrupt
XMC_USIC_CH_RXFIFO_EVENT_CONF_ERROR | Enable receive FIFO error interrupt
XMC_USIC_CH_RXFIFO_EVENT_CONF_ALTERNATE | Enable FIFO alternative receive interrupt
enum XMC_USIC_CH_RXFIFO_EVENT_t

USIC channel receive FIFO status

Enumerator
XMC_USIC_CH_RXFIFO_EVENT_STANDARD | Receive FIFO status: Standard event
XMC_USIC_CH_RXFIFO_EVENT_ERROR | Receive FIFO status: Error event
XMC_USIC_CH_RXFIFO_EVENT_ALTERNATE | Receive FIFO status: Alternative event
enum XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_t

USIC channel receive FIFO interrupt node pointers

Enumerator
XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_STANDARD | Node pointer for FIFO standard receive interrupt
XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE | Node pointer for FIFO alternative receive interrupt
enum XMC_USIC_CH_SHIFT_DIRECTION_t

USIC channel shift direction. Defines the shift direction of the data words for transmission and reception

Enumerator
XMC_USIC_CH_SHIFT_DIRECTION_LSB_FIRST | Shift LSB first. The first data bit of a data word is located at bit position 0.
XMC_USIC_CH_SHIFT_DIRECTION_MSB_FIRST | Shift MSB first. The first data bit of a data word is located at the bit position given by the configured word length.
enum XMC_USIC_CH_START_TRANSMISION_MODE_t

USIC channel data transmission start modes. Data shifted out of the transmit pin depends on the value configured for the TDEN bitfield of the TCSR register. Following enum values are used for configuring the TCSR->TDEN bitfield.

Enumerator
XMC_USIC_CH_START_TRANSMISION_DISABLED | Passive data level is sent out on transmission.
XMC_USIC_CH_START_TRANSMISION_ON_TDV | Transmission of the data word in TBUF can be started if TDV = 1
XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_0 | Transmission of the data word in TBUF can be started if TDV = 1 while DX2S_0
XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_1 | Transmission of the data word in TBUF can be started if TDV = 1 while DX2S_1
enum XMC_USIC_CH_STATUS_t

USIC channel driver status

Enumerator
XMC_USIC_CH_STATUS_OK | USIC driver status : OK
XMC_USIC_CH_STATUS_ERROR | USIC driver status : ERROR
XMC_USIC_CH_STATUS_BUSY | USIC driver status : BUSY
enum XMC_USIC_CH_TBUF_STATUS_SET_t

USIC channel data transmit buffer status modification

Enumerator
XMC_USIC_CH_TBUF_STATUS_SET_BUSY | Set Transfer buffer status to busy
XMC_USIC_CH_TBUF_STATUS_SET_IDLE | Set Transfer buffer status to idle
enum XMC_USIC_CH_TBUF_STATUS_t

USIC channel data transmit buffer status

Enumerator
XMC_USIC_CH_TBUF_STATUS_IDLE | Transfer buffer is currently idle
XMC_USIC_CH_TBUF_STATUS_BUSY | Transfer buffer is currently busy
enum XMC_USIC_CH_TXFIFO_EVENT_CONF_t

USIC channel transmit FIFO event configuration

Enumerator
XMC_USIC_CH_TXFIFO_EVENT_CONF_STANDARD | Enable FIFO standard transmit interrupt
XMC_USIC_CH_TXFIFO_EVENT_CONF_ERROR | Enable transmit FIFO error interrupt
enum XMC_USIC_CH_TXFIFO_EVENT_t

USIC channel transmit FIFO status

Enumerator
XMC_USIC_CH_TXFIFO_EVENT_STANDARD | Transmit FIFO status: Standard event
XMC_USIC_CH_TXFIFO_EVENT_ERROR | Transmit FIFO status: Error event
enum XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_t

USIC channel transmit FIFO interrupt node pointers

Enumerator
XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_STANDARD | Node pointer for FIFO standard transmit interrupt
XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE | Node pointer for transmit FIFO error interrupt

Function Documentation

void XMC_USIC_CH_ConfigExternalInputSignalToBRG | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | pdiv,
 |  | const uint32_t | oversampling,
 |  | const XMC_USIC_CH_INPUT_COMBINATION_MODE_t | combination_mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
pdiv Desired divider for the external frequency input. Range: minimum value = 1, maximum value = 1024
oversampling Required oversampling. The value indicates the number of time quanta for one symbol of data.
This can be related to the number of samples for each logic state of the data signal.
Range: 1 to 32. Value should be chosen based on the protocol used.
combination_mode Selects which edge of the synchronized(and optionally filtered) signal DXnS actives the trigger output DXnT of the input stage.
Returns
None
Description
Enables the external frequency input for the Baudrate Generator and configures the divider, oversampling and the combination mode of the USIC channel.

Related APIs:
XMC_USIC_CH_SetBRGInputClockSource(), XMC_USIC_CH_SetInputTriggerCombinationMode()

void XMC_USIC_CH_ConfigureShiftClockOutput | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t | passive_level,
 |  | const XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_t | clock_output
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
passive_level Passive level for the clock output.
Range: XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED, XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED, XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED, XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_ENABLED,
clock_output Shift clock source selection.
Range: Use XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK, XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1
Returns
None
Description
Sets the idle mode shift clock output level and selects the shift clock source.

Shift clock idle mode output level can be set to logic high or low. Shift clock output can be configured to have a delay of half shift clock period. Both the configurations are available as enumeration values defined with type XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t. This value should be configured based on the slave device requirement. Shift clock source can be selected between internal clock(master) and external input(slave).
void XMC_USIC_CH_ConnectInputDataShiftToDataInput | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
The input of the data shift unit is connected to the selected data input line.

This setting is used if the signals are directly derived from an input pin without treatment by the protocol preprocessor.
Related APIs:
XMC_USIC_CH_ConnectInputDataShiftToPPP()

< Common mask for INSW bitfield mask in DXnCR register

void XMC_USIC_CH_ConnectInputDataShiftToPPP | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
The input of the data shift unit is controlled by the protocol pre-processor.

Related APIs:
XMC_USIC_CH_ConnectInputDataShiftToDataInput()

< Common mask for INSW bitfield mask in DXnCR register

void XMC_USIC_CH_Disable ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Disables the USIC channel.

USIC channel is disabled by setting the module enable bit(MDEN) to 0 in the register KSCFG.
Related APIs:
XMC_USIC_CH_Enable(), XMC_USIC_Disable()

void XMC_USIC_CH_DisableDelayCompensation ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Disables delay compensation..

Related APIs:
XMC_USIC_CH_EnableDelayCompensation()

void XMC_USIC_CH_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Bit mask of the channel events to be disabled. Use XMC_USIC_CH_EVENT_t for the bit masks.
Range: XMC_USIC_CH_EVENT_RECEIVE_START, XMC_USIC_CH_EVENT_DATA_LOST etc. Multiple events can be combined using OR operation.
Returns
None
Description
Disable the channel interrupt events.

Multiple events can be combined using the bitwise OR operation and configured in one function call. XMC_USIC_CH_EVENT_t enumerates multiple protocol event bitmasks. These enumerations can be used as input to the API.
Related APIs:
XMC_USIC_CH_EnableEvent(), XMC_USIC_CH_SetInterruptNodePointer()

void XMC_USIC_CH_DisableFrameLengthControl ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Disables automatic update of frame length.

When automatic update of frame length is disabled, frame length has to configured explicitly. Frame length remains fixed until it is changed again.
Related APIs:
XMC_USIC_CH_DisableFrameLengthControl(), XMC_USIC_CH_SetFrameLength()

void XMC_USIC_CH_DisableInputDigitalFilter | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
Disables the input digital filter for USIC channel input data signal.

Input data signal from the selected multiplexer will not be digitally filtered.
Related APIs:
XMC_USIC_CH_EnableInputDigitalFilter()

< Common mask for DFEN bitfield mask in DXnCR register

void XMC_USIC_CH_DisableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
Disables input inversion for USIC channel.

Resets the input data polarity for the USIC channel input data signal.
Related APIs:
XMC_USIC_CH_EnableInputInversion()

< Common mask for DPOL bitfield mask in DXnCR register

void XMC_USIC_CH_DisableInputSync | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
Disables input synchronization for the USIC channel input data signal.

Input data signal from the selected multiplexer will not be synchronized.
Related APIs:
XMC_USIC_CH_EnableInputSync(), XMC_USIC_CH_DisableInputDigitalFilter()

< Common mask for DSEN bitfield mask in DXnCR register

void XMC_USIC_CH_DisableTBUFDataValidTrigger ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Disables the trigger of TDV depending on DX2T signal.

Bit TCSR.TE is permanently set.
Related APIs:
XMC_USIC_CH_EnableTBUFDataValidTrigger()

void XMC_USIC_CH_DisableTimeMeasurement ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Disables time measurement using the capture mode timer.

Time measurement is disabled by clearing the timer enable flag in BRG register.
Related APIs:
XMC_USIC_CH_EnableTimeMeasurement()

void XMC_USIC_CH_Enable ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Enables the USIC channel.

USIC channel is enabled by setting the module enable bit in KSCFG register bitfield MODEN. On enabling, the channel is set to idle mode.
Related APIs:
XMC_USIC_CH_Disable(), XMC_USIC_Enable()

void XMC_USIC_CH_EnableDelayCompensation ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Enables delay compensation.

Delay compensation can be applied to the receive path.
Related APIs:
XMC_USIC_CH_DisableDelayCompensation()

void XMC_USIC_CH_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Bit mask of the channel events to be enabled. Use XMC_USIC_CH_EVENT_t for the bit masks.
Range: XMC_USIC_CH_EVENT_RECEIVE_START, XMC_USIC_CH_EVENT_DATA_LOST etc. Multiple events can be combined using OR operation.
Returns
None
Description
Enable the channel interrupt events.

Common channel events related to serial communication can be configured using this API. Multiple events can be combined using the bitwise OR operation and configured in one function call. XMC_USIC_CH_EVENT_t enumerates multiple protocol event bitmasks. These enumerations can be used as input to the API.
Related APIs:
XMC_USIC_CH_DisableEvent(), XMC_USIC_CH_SetInterruptNodePointer()

void XMC_USIC_CH_EnableFrameLengthControl ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Enables automatic update of frame length.

When the automatic update of frame length is enabled, frame length is configured based on the index of the TBUF[]/IN[] register array. When the data is written to TBUF[x], frame length is configured with the mask value of x at the last 5 bit positions. Same logic is applicable if data is written to IN[x] register.
Related APIs:
XMC_USIC_CH_DisableFrameLengthControl(), XMC_USIC_CH_TXFIFO_PutDataFLEMode()

void XMC_USIC_CH_EnableInputDigitalFilter | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
Enables the input digital filter for USIC channel input data signal.

Input data signal from the selected multiplexer will be digitally filtered.
Related APIs:
XMC_USIC_CH_DisableInputDigitalFilter()

< Common mask for DFEN bitfield mask in DXnCR register

void XMC_USIC_CH_EnableInputInversion | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
Enables input inversion for USIC channel input data signal.

Polarity of the input source can be changed to provide inverted data input.
Related APIs:
XMC_USIC_CH_DisableInputInversion()

< Common mask for DPOL bitfield mask in DXnCR register

void XMC_USIC_CH_EnableInputSync | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
Returns
None
Description
Enables input synchronization for the USIC channel input data signal.

Input data signal from the selected multiplexer will be synchronized with fPERIPH. A noisy signal can be synchronized and filtered by enabling the digital filter.
Related APIs:
XMC_USIC_CH_DisableInputSync(), XMC_USIC_CH_EnableInputDigitalFilter()

< Common mask for DSEN bitfield mask in DXnCR register

void XMC_USIC_CH_EnableTBUFDataValidTrigger ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Bit TCSR.TE is set if DX2T becomes active while TDV = 1.

Enables the transfer trigger unit to set bit TCSR.TE if the trigger signal DX2T becomes active for event driven transfer starts.
Related APIs:
XMC_USIC_CH_DisableTBUFDataValidTrigger()

void XMC_USIC_CH_EnableTimeMeasurement ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Enables time measurement using the capture mode timer.

Time measurement is enabled by setting the timer enable flag in BRG register.
Related APIs:
XMC_USIC_CH_DisableTimeMeasurement()

uint32_t XMC_USIC_CH_GetCaptureTimerValue ( const XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Captured counter value
Description
The value of the counter is captured if one of the trigger signals DX0T or DX1T are activated by the corresponding input stage.
uint32_t XMC_USIC_CH_GetReceiveBufferStatus ( XMC_USIC_CH_t *const channel )

API to get receive buffer status.

Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status of data validity check for RBUF0 and RBUF1.
Returned value should be masked with RDV0 and RDV1 bits to know the status.
Range: XMC_USIC_CH_RBUF_STATUS_DATA_VALID0, XMC_USIC_CH_RBUF_STATUS_DATA_VALID1.
Description
Checks if RBUF0 and RBUF1 have valid unread data.

It checks the bits RDV0 and RDV1 of the RBUFSR register. Returns the value of RBUFSR masked with bitmasks of RDV0 and RDV1. It can be used to decide whether 2bytes has to be read from RBUF or 1 byte. If both bitmasks XMC_USIC_CH_RBUF_STATUS_DATA_VALID0 and XMC_USIC_CH_RBUF_STATUS_DATA_VALID1 are set, then 2 bytes can be read from RBUF. If only either of them is set, then only one byte can be read from RBUF.
Related APIs:
XMC_USIC_CH_GetTransmitBufferStatus()

XMC_USIC_CH_TBUF_STATUS_t XMC_USIC_CH_GetTransmitBufferStatus ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Stataus XMC_USIC_CH_TBUF_STATUS_IDLE if transmit buffer is free, XMC_USIC_CH_TBUF_STATUS_BUSY if transmit buffer is busy.
Description
Gets transmit buffer status.

Status indicates whether the transmit buffer is free, or busy transmitting data. The status depends on the value of TDV flag in TCSR register. This status can be used while transmitting data. Transmit data when the transmit buffer status is XMC_USIC_CH_TBUF_STATUS_IDLE.
Related APIs:
XMC_USIC_CH_SetDataOutputMode()

void XMC_USIC_CH_RXFIFO_ClearEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Receive FIFO events to be cleared.
Range: XMC_USIC_CH_RXFIFO_EVENT_STANDARD, XMC_USIC_CH_RXFIFO_EVENT_ERROR, XMC_USIC_CH_RXFIFO_EVENT_ALTERNATE.
Returns
None
Description
Clears the receive FIFO event flags in the status register.

USIC channel peripheral does not clear the event flags after they are read. This API clears the events provided in the mask value. XMC_USIC_CH_RXFIFO_EVENT enumeration can be used as input. Multiple events can be cleared by providing a mask value obtained by bitwise OR operation of multiple event enumerations.
Related APIs:
XMC_USIC_CH_RXFIFO_GetEvent()

void XMC_USIC_CH_RXFIFO_Configure | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | data_pointer,
 |  | const XMC_USIC_CH_FIFO_SIZE_t | size,
 |  | const uint32_t | limit
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data_pointer Start position inside the FIFO buffer.
Range: 0 to 63.
size Required size of the receive FIFO.
Range: XMC_USIC_CH_FIFO_DISABLED, XMC_USIC_CH_FIFO_SIZE_2WORDS.. XMC_USIC_CH_FIFO_SIZE_64WORDS
limit Threshold of receive FIFO filling level to be considered for generating events.
Range: 0 to size -1.
Returns
None
Description
Configures the receive FIFO.

Receive FIFO is the subset of a common FIFO sized 64 words. This FIFO is shared between 2 channels of the USIC module. Each channel can share the FIFO for transmission and reception. data_pointer represents the start index in the common FIFO, from where received data can be put. size represents the size of receive FIFO as a multiple of 2. Since the FIFO is shared between 2 USIC channels, FIFO size should be carefully selected. A FIFO standard receive buffer event or alternative receive buffer event is generated when the FIFO filling level exceeds the limit value.
Related APIs:
XMC_USIC_CH_RXFIFO_EnableEvent(), XMC_USIC_CH_RXFIFO_SetInterruptNodePointer()

void XMC_USIC_CH_RXFIFO_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Events to be disabled.
Range: XMC_USIC_CH_RXFIFO_EVENT_CONF_STANDARD, XMC_USIC_CH_RXFIFO_EVENT_CONF_ERROR, XMC_USIC_CH_RXFIFO_EVENT_CONF_ALTERNATE.
Returns
None
Description
Disables the selected interrupt events related to receive FIFO.

By disabling the interrupt events, generation of interrupt is stopped. User can poll the event flags from the status register using the API XMC_USIC_CH_RXFIFO_GetEvent(). Event bitmasks can be constructed using the enumeration XMC_USIC_CH_RXFIFO_EVENT_CONF. For providing multiple events, combine the events using bitwise OR operation.
Related APIs:
XMC_USIC_CH_RXFIFO_GetEvent(), XMC_USIC_CH_RXFIFO_EnableEvent()

void XMC_USIC_CH_RXFIFO_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Events to be enabled. Multiple events can be bitwise OR combined. XMC_USIC_CH_RXFIFO_EVENT_CONF_t
Returns
None
Description
Enables the interrupt events related to transmit FIFO.

Event bitmasks can be constructed using the enumeration XMC_USIC_CH_RXFIFO_EVENT_CONF_t. Multiple events can be enabled by providing multiple events in a single call. For providing multiple events, combine the events using bitwise OR operation.

Note: API only enables the events. For interrupt generation, interrupt node must be configured and NVIC node must be enabled.

Related APIs:
XMC_USIC_CH_RXFIFO_SetInterruptNodePointer()

void XMC_USIC_CH_RXFIFO_Flush ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Clears the contents of receive FIFO.

Receive FIFO contents will be cleared and the filling level will be reset to 0.
Related APIs:
XMC_USIC_CH_RXFIFO_GetLevel()

uint16_t XMC_USIC_CH_RXFIFO_GetData ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Value read from the receive FIFO.
Range: 16bit data. Length of data depends on the word length configuration.
Description
Gets data from the receive FIFO.

Receive FIFO should be read only if data is availble in the FIFO. This can be checked using the API XMC_USIC_CH_RXFIFO_IsEmpty(). Receive FIFO error flag will be set if an attempt is made to read from an empty receive FIFO. To read all the received data, user should keep reading data until receive FIFO is empty.
Related APIs:
XMC_USIC_CH_RXFIFO_ClearEvent()

uint32_t XMC_USIC_CH_RXFIFO_GetEvent ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status of standard receive buffer, alternative receive buffer and receive buffer error events.
Range: XMC_USIC_CH_RXFIFO_EVENT_STANDARD, XMC_USIC_CH_RXFIFO_EVENT_ERROR, XMC_USIC_CH_RXFIFO_EVENT_ALTERNATE.
Description
Gets the receive FIFO events' status.

Gives the status of receive FIFO standard receive buffer event, alternative receive buffer event and receive buffer error event. The status bits are located at their bitpositions in the TRBSR register in the returned value. User can make use of the XMC_USIC_CH_RXFIFO_EVENT enumeration for checking the status of return value. The status can be found by using the bitwise AND operation on the returned value with the enumerated value.

Note: Event status flags should be cleared by the user explicitly.

Related APIs:
XMC_USIC_CH_RXFIFO_ClearEvent()

uint32_t XMC_USIC_CH_RXFIFO_GetLevel ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
uint32_t Receive FIFO filling level.
Range: minimum= 0(FIFO empty), maximum= receive FIFO size.
Description
Gets the receive FIFO filling level.

For every word received, the filling level is incremented. The API gives the value of this filling level. The filling level is decremented when the data is read out of the receive FIFO.
Related APIs:
XMC_USIC_CH_RXFIFO_Flush(), XMC_USIC_CH_RXFIFO_PutData()

bool XMC_USIC_CH_RXFIFO_IsEmpty ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status true if receive FIFO is empty, false if receive FIFO has some data.
Description
Checks if receive FIFO is empty.

When the receive FIFO is empty, received data will be put in receive FIFO. When the last received word in the FIFO is read, FIFO empty flag is set. Any attempt to read from an empty receive FIFO will set the receive FIFO error flag.
Related APIs:
XMC_USIC_CH_RXFIFO_Flush(), XMC_USIC_CH_RXFIFO_PutData()

bool XMC_USIC_CH_RXFIFO_IsFull ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status true if receive FIFO is full false if receive FIFO is not full.
Description
Checks if receive FIFO is full.

When the receive FIFO filling level reaches the configured size, FIFO full flag is set. Any data received when the receive FIFO is full, is lost.
Related APIs:
XMC_USIC_CH_RXFIFO_IsEmpty(), XMC_USIC_CH_RXFIFO_Flush()

void XMC_USIC_CH_RXFIFO_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
interrupt_node Node pointer representing the receive FIFO events.
Range: XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_STANDARD, XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE
service_request The service request to be used for interrupt generation.
Range: 0 to 5.
Returns
None
Description
Sets an interrupt node for the receive FIFO events.

A node pointer represents one or more interrupt events. Service request represents the interrupt node to be used among the 6 interrupt nodes available for USIC module. API configures the service request to be used for interrupt generation for the events selected. A receive FIFO event can generate an interrupt only if the interrupt node is configured for the event and the interrupt generation is enabled for the event. For example, transmit FIFO standard transmit buffer interrupt is generated if the interrupt node for the same is set and interrupt is enabled.

Note: NVIC node should be explicitly enabled for the interrupt generation.

Related APIs:
XMC_USIC_CH_RXFIFO_EnableEvent()

void XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_FIFO_SIZE_t | size,
 |  | const uint32_t | limit
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
size Required size of the receive FIFO.
Range: XMC_USIC_CH_FIFO_DISABLED, XMC_USIC_CH_FIFO_SIZE_2WORDS.. XMC_USIC_CH_FIFO_SIZE_64WORDS
limit Threshold for receive FIFO filling level to be considered for generating events.
Range: 0 to size -1.
Returns
None
Description
Sets the size and trigger limit for the receive FIFO.

The API is not to be called for initializing the receive FIFO. The API shall be used for the runtime change of receive FIFO trigger limit. FIFO start position will not be affected on execution.
Related APIs:
XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit()\ n

XMC_USIC_CH_STATUS_t XMC_USIC_CH_SetBaudrate | ( | XMC_USIC_CH_t *const | channel,
 |  | uint32_t | rate,
 |  | uint32_t | oversampling
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
rate Desired baudrate. Range: minimum value = 100, maximum value depends on the peripheral clock frequency
and oversampling. Maximum baudrate can be derived using the formula: (fperiph * 1023)/(1024 * oversampling)
oversampling Required oversampling. The value indicates the number of time quanta for one symbol of data.
This can be related to the number of samples for each logic state of the data signal.
Range: 1 to 32. Value should be chosen based on the protocol used.
Returns
Status indicating the baudrate configuration.
Range: XMC_USIC_CH_STATUS_OK if baudrate is successfully configured, XMC_USIC_CH_STATUS_ERROR if desired baudrate or oversampling is invalid.
Description
Configures the baudrate of the USIC channel.

Baudrate is configured by considering the peripheral frequency and the desired baudrate. Optimum values of FDR->STEP and BRG->PDIV are calulated and used for generating the desired baudrate.
Related APIs:
XMC_USIC_CH_SetStartTransmisionMode(), XMC_USIC_CH_SetInputSource()

void XMC_USIC_CH_SetBRGInputClockSource | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_BRG_CLOCK_SOURCE_t | clock_source
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
clock_source clock source for the BRG.
Returns
None
Description
Sets the clock source for the BRG.

Related APIs:
XMC_USIC_CH_SetInputTriggerCombinationMode(), XMC_USIC_CH_SetExternalClockBRGDivider()

void XMC_USIC_CH_SetDataOutputMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_DATA_OUTPUT_MODE_t | data_output_mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data_output_mode Data output mode.
Range: XMC_USIC_CH_DATA_OUTPUT_MODE_NORMAL, XMC_USIC_CH_DATA_OUTPUT_MODE_INVERTED
Returns
None
Description
Configures the mode for data output.

USIC channel can be configured to shift inverted data or direct data based on the input to the API.
Related APIs:
XMC_USIC_CH_SetStartTransmisionMode()

void XMC_USIC_CH_SetFractionalDivider | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t | mode,
 |  | const uint16_t | step
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
mode divider mode XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t
step divider
XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_NORMAL resulting divider = 1023 - step
XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_FRACTIONAL resulting divider = 1023 / step
Returns
None
Description
The fractional divider generates its output frequency fFD by either dividing the input frequency fPERIPH by an integer factor n or by multiplication of n/1024.
void XMC_USIC_CH_SetFrameLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | frame_length
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
frame_length Number of bits in a frame.
Range: minimum= 1, maximum= 0x3f. The maximum value for fixed frame size is 0x3f.
e.g: For a frame length of 16, frame_length should be provided as 16.
Returns
None
Description
Define the data frame length.

Set the number of bits to be serially transmitted in a frame. The frame length should be multiples of word length. If the value is set to 0x40, the frame length has to be controlled explicitly.
Related APIs:
XMC_USIC_CH_SetWordLength(), XMC_USIC_CH_EnableFrameLengthControl()

void XMC_USIC_CH_SetInputSamplingFreq | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input,
 |  | const XMC_USIC_CH_INPUT_SAMPLING_FREQ_t | sampling_freq
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support..
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
sampling_freq Sampling frequency value of type XMC_USIC_CH_INPUT_SAMPLING_FREQ_t.
Returns
None
Description
Sets sampling frequency for USIC channel input data signal.

Related APIs:
XMC_USIC_CH_SetInputSource(), XMC_USIC_CH_EnableInputSync(), XMC_USIC_CH_EnableInputDigitalFilter()

< Common mask for SFSEL bitfield mask in DXnCR register

void XMC_USIC_CH_SetInputSource | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input,
 |  | const uint8_t | source
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
source Input source select for the input stage. The table below maps the enum value with the input channel.
0 | DXnA
1 | DXnB
2 | DXnC
3 | DXnD
4 | DXnE
5 | DXnF
6 | DXnG
7 | Always 1
Returns
None
Description
Selects the data source for USIC input stage.

Selects the input data signal source among DXnA, DXnB.. DXnG for the input stage. The API can be used for all the input stages like DX0CR, DX1CR etc.
Related APIs:
XMC_USIC_CH_EnableInputInversion(), XMC_USIC_CH_EnableInputDigitalFilter(), XMC_USIC_CH_EnableInputSync(), XMC_USIC_CH_SetInputSamplingFreq()

< Common mask for DSEL bitfield mask in DXnCR register

< Common mask for DSEL bitfield position in DXnCR register

void XMC_USIC_CH_SetInputTriggerCombinationMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INPUT_t | input,
 |  | const XMC_USIC_CH_INPUT_COMBINATION_MODE_t | combination_mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support..
input USIC channel input stage of type XMC_USIC_CH_INPUT_t.
Range: XMC_USIC_CH_INPUT_DX0 to XMC_USIC_CH_INPUT_DX5
combination_mode Combination mode value of type XMC_USIC_CH_INPUT_COMBINATION_MODE_t.
Returns
None
Description
Selects which edge of the synchronized signal DXnS activates the trigger output DXnT of the input stage.

Related APIs:
XMC_USIC_CH_SetInputSource(), XMC_USIC_CH_EnableInputSync(), XMC_USIC_CH_EnableInputDigitalFilter()

< Common mask for CM bitfield mask in DXnCR register

< Common mask for CM bitfield position in DXnCR register

void XMC_USIC_CH_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
interrupt_node Interrupt node pointer to be configured.
Range: XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT, XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER etc.
service_request Service request number.
Range: 0 to 5.
Returns
None
Description
Sets the interrupt node for USIC channel events.

For an event to generate interrupt, node pointer should be configured with service request(SR0, SR1..SR5). The NVIC node gets linked to the interrupt event by doing so.
Note: NVIC node should be separately enabled to generate the interrupt.
Related APIs:
XMC_USIC_CH_EnableEvent()

void XMC_USIC_CH_SetMclkOutputPassiveLevel | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_t | passive_level
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
passive_level Passive level for the master clock output.
Range: XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_0, XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_1.
Returns
None
Description
Sets the idle mode pin level for the master clock output.
void XMC_USIC_CH_SetMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_OPERATING_MODE_t | mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
mode USIC channel operation mode.
Range: XMC_USIC_CH_OPERATING_MODE_IDLE, XMC_USIC_CH_OPERATING_MODE_SPI, XMC_USIC_CH_OPERATING_MODE_UART, XMC_USIC_CH_OPERATING_MODE_I2S, XMC_USIC_CH_OPERATING_MODE_I2C.
Returns
None
Description
Sets the USIC channel operation mode.

A USIC channel can support multiple serial communication protocols like UART, SPI, I2C and I2S. The API sets the input operation mode to the USIC channel.
Related APIs:
XMC_USIC_Enable(), XMC_USIC_CH_Enable()

void XMC_USIC_CH_SetPassiveDataLevel | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_PASSIVE_DATA_LEVEL_t | passive_level
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
passive_level Value of passive level for the channel.
Range: XMC_USIC_CH_PASSIVE_DATA_LEVEL0, XMC_USIC_CH_PASSIVE_DATA_LEVEL1
Returns
None
Description
Set the passive data level of the output signal.

When the USIC channel transmit stage is idle, the output signal level stays at the configured passive level.
Related APIs:
XMC_USIC_CH_GetTransmitBufferStatus(), XMC_USIC_CH_SetStartTransmisionMode()

void XMC_USIC_CH_SetShiftDirection | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_SHIFT_DIRECTION_t | shift_direction
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
word_length Number of bits to be configured for a data word.
Range: minimum= 1, maximum= 16.
e.g: For word length of 8, word_length should be provided as 8.
Returns
None
Description
Sets the data word length in number of bits.

Sets the number of bits to represent a data word. Frame length should be a multiple of word length.
Related APIs:
XMC_USIC_CH_SetFrameLength()

void XMC_USIC_CH_SetStartTransmisionMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_START_TRANSMISION_MODE_t | start_transmision_mode
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
start_transmision_mode Transmission mode to be enabled.
Range: XMC_USIC_CH_START_TRANSMISION_DISABLED, XMC_USIC_CH_START_TRANSMISION_ON_TDV, XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_0, XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_1
Returns
None
Description
Configures data transmission.

The configuration affects the data shifted on the DOUT0 pin.
Related APIs:
XMC_USIC_CH_GetTransmitBufferStatus(), XMC_USIC_CH_SetDataOutputMode()

void XMC_USIC_CH_SetTransmitBufferStatus | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_TBUF_STATUS_SET_t | transmit_buffer_status
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
transmit_buffer_status clearing or setting the TDV flag.
Returns
None
Description
Modify TCSR.TDV and TCSR.TE to control the start of a data word transmission by software.
Related APIs:
XMC_USIC_CH_GetTransmitBufferStatus()

void XMC_USIC_CH_SetWordLength | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint8_t | word_length
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
word_length Number of bits to be configured for a data word.
Range: minimum= 1, maximum= 16.
e.g: For word length of 8, word_length should be provided as 8.
Returns
None
Description
Sets the data word length in number of bits.

Sets the number of bits to represent a data word. Frame length should be a multiple of word length.
Related APIs:
XMC_USIC_CH_SetFrameLength()

void XMC_USIC_CH_TriggerServiceRequest | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | service_request_line
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
service_request_line service request number of the event to be triggered.
Range: 0 to 5.
Returns
None
Description
Trigger a USIC interrupt service request.

When the USIC service request is triggered, the NVIC interrupt associated with it will be generated if enabled.
Related APIs:
XMC_USIC_CH_SetInterruptNodePointer()

void XMC_USIC_CH_TXFIFO_ClearEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Transmit FIFO events to be cleared.
Range: XMC_USIC_CH_TXFIFO_EVENT_STANDARD, XMC_USIC_CH_TXFIFO_EVENT_ERROR.
Returns
None
Description
Clears the transmit FIFO event flags in the status register.

USIC channel peripheral does not clear the event flags after they are read. This API clears the events provided in the mask value. XMC_USIC_CH_TXFIFO_EVENT enumeration can be used as input. Multiple events can be cleared by providing a mask value obtained by bitwise OR operation of multiple event enumerations.
Related APIs:
XMC_USIC_CH_TXFIFO_GetEvent()

void XMC_USIC_CH_TXFIFO_Configure | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | data_pointer,
 |  | const XMC_USIC_CH_FIFO_SIZE_t | size,
 |  | const uint32_t | limit
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data_pointer Start position inside the FIFO buffer.
Range: 0 to 63.
size Required size of the transmit FIFO.
Range: XMC_USIC_CH_FIFO_DISABLED, XMC_USIC_CH_FIFO_SIZE_2WORDS.. XMC_USIC_CH_FIFO_SIZE_64WORDS
limit Threshold of transmit FIFO filling level to be considered for generating events.
Range: 0 to size -1.
Returns
None
Description
Initializes the transmit FIFO.

Transmit FIFO is a subset of a common FIFO sized 64 words. This FIFO is shared between 2 channels of the USIC module. Each channel can share the FIFO for transmission and reception. data_pointer represents the start index in the common FIFO, from where transmit data can be put, for the selected USIC channel. size represents the size of transmit FIFO as a multiple of
  1. Since the FIFO is shared between 2 USIC channels, FIFO size should be carefully selected. A FIFO standard transmit buffer event is generated when the FIFO filling level falls below the limit value.
Related APIs:
XMC_USIC_CH_TXFIFO_EnableEvent(), XMC_USIC_CH_TXFIFO_SetInterruptNodePointer()

void XMC_USIC_CH_TXFIFO_DisableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Events to be disabled. XMC_USIC_CH_TXFIFO_EVENT_CONF_t
Returns
None
Description
Disables the interrupt events related to transmit FIFO.

By disabling the interrupt events, generation of interrupt is stopped. User can poll the event flags from the status register using the API XMC_USIC_CH_TXFIFO_GetEvent(). Event bitmasks can be constructed using the enumeration XMC_USIC_CH_TXFIFO_EVENT_CONF_t. For providing multiple events, combine the events using bitwise OR operation.
Related APIs:
XMC_USIC_CH_TXFIFO_GetEvent(), XMC_USIC_CH_TXFIFO_EnableEvent()

void XMC_USIC_CH_TXFIFO_EnableEvent | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint32_t | event
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
event Events to be enabled. Multiple events can be bitwise OR combined. XMC_USIC_CH_TXFIFO_EVENT_CONF_t
Returns
None
Description
Enables the interrupt events related to transmit FIFO.

Event bitmasks can be constructed using the enumeration XMC_USIC_CH_TXFIFO_EVENT_CONF_t. Multiple events can be enabled by providing multiple events in a single call. For providing multiple events, combine the events using bitwise OR operation. Events are configured in the TBCTR register.

Note: API only enables the events. For interrupt generation, interrupt node must be configured and NVIC node must be enabled.

Related APIs:
XMC_USIC_CH_TXFIFO_SetInterruptNodePointer()

void XMC_USIC_CH_TXFIFO_Flush ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
None
Description
Clears the contents of transmit FIFO.

Transmit FIFO contents will be cleared and the filling level will be reset to 0.
Related APIs:
XMC_USIC_CH_TXFIFO_GetLevel()

uint32_t XMC_USIC_CH_TXFIFO_GetEvent ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status of standard transmit and transmit buffer error events. XMC_USIC_CH_TXFIFO_EVENT_t
Description
Gets the transmit FIFO event status.

Gives the status of transmit FIFO standard transmit buffer event and transmit buffer error event. The status bits are located at their bit positions in the TRBSR register in the returned value. User can make use of the XMC_USIC_CH_TXFIFO_EVENT_t enumeration for checking the status of return value. The status can be found by using the bitwise AND operation on the returned value with the enumerated value.

Note: Event status flags should be cleared by the user explicitly.

Related APIs:
XMC_USIC_CH_TXFIFO_ClearEvent()

uint32_t XMC_USIC_CH_TXFIFO_GetLevel ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Transmit FIFO filling level.
Range: minimum= 0(FIFO empty), maximum= transmit FIFO size.
Description
Gets the transmit FIFO filling level.

For every word written to the FIFO, filling level is updated. The API gives the value of this filling level.
Related APIs:
XMC_USIC_CH_TXFIFO_Flush(), XMC_USIC_CH_TXFIFO_PutData()

bool XMC_USIC_CH_TXFIFO_IsEmpty ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status true if transmit FIFO is empty false if transmit FIFO has some data.
Description
Checks if transmit FIFO is empty.

When the transmit FIFO is empty, data can be written to FIFO. When the last written word to the transmit FIFO is transmitted out of the FIFO, FIFO empty flag is set.
Related APIs:
XMC_USIC_CH_TXFIFO_Flush(), XMC_USIC_CH_TXFIFO_PutData()

bool XMC_USIC_CH_TXFIFO_IsFull ( XMC_USIC_CH_t *const channel )
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
Returns
Status true if transmit FIFO is full false if transmit FIFO is not full.
Description
Checks if transmit FIFO is full.

When the transmit FIFO filling level reaches the configured size, FIFO full flag is set. User should not write to the FIFO when the transmit FIFO is full.
Related APIs:
XMC_USIC_CH_TXFIFO_IsEmpty(), XMC_USIC_CH_TXFIFO_Flush()

void XMC_USIC_CH_TXFIFO_PutData | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data Data to be transmitted.
Range: 16bit unsigned data. minimum= 0, maximum= 65535
Returns
None
Description
Writes data into the transmit FIFO.

The data provided is placed in the transmit FIFO. The transmit FIFO should be configured before calling this API.
Related APIs:
XMC_USIC_CH_TXFIFO_EnableEvent()

void XMC_USIC_CH_TXFIFO_PutDataFLEMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data,
 |  | const uint32_t | frame_length
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data Data to be transmitted.
frame_length Frame length to be configured while transmitting the data.
Range: minimum= 0, maximum= 31. e.g: For a frame length of 16, set frame_length as 15.
Returns
None
Description
Writes data to the transmit FIFO in frame length control mode.

When frame length control is enabled for dynamic update of frame length, this API can be used. frame_length represents the frame length to be updated by the peripheral. frame_length is used as index for the IN[] register array.
Related APIs:
XMC_USIC_CH_EnableFrameLengthControl()

void XMC_USIC_CH_TXFIFO_PutDataHPCMode | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data,
 |  | const uint32_t | frame_length
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data Data to be transmitted.
frame_length Frame length to be configured while transmitting the data.
Range: minimum= 0, maximum= 31. e.g: For a frame length of 16, set frame_length as 15.
Returns
None
Description
Writes data to the transmit FIFO in hardware port control mode.

When hardware port control is enabled for dynamic update of frame length, this API can be used. frame_length represents the frame length to be updated by the peripheral. frame_length is used as index for the IN[] register array.
Related APIs:
XMC_USIC_CH_EnableFrameLengthControl()

void XMC_USIC_CH_TXFIFO_SetInterruptNodePointer | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_t | interrupt_node,
 |  | const uint32_t | service_request
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
interrupt_node Node pointer representing the transmit FIFO events.
Range: XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_STANDARD, XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE
service_request The service request to be used for interrupt generation.
Range: 0 to 5.
Returns
None
Description
Sets an interrupt node for the transmit FIFO events.

A node pointer represents one or more interrupt events. Service request represents the interrupt node to be used among the 6 interrupt nodes available for USIC module. API configures the service request to be used for interrupt generation for the events selected. A transmit FIFO event can generate an interrupt only if the interrupt node is configured for the event and the interrupt generation is enabled for the event. For example, transmit FIFO standard transmit buffer interrupt is generated if the interrupt node for the same is set and interrupt is enabled.

Note: NVIC node should be explicitly enabled for the interrupt generation.

Related APIs:
XMC_USIC_CH_TXFIFO_EnableEvent()

void XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit | ( | XMC_USIC_CH_t *const | channel,
 |  | const XMC_USIC_CH_FIFO_SIZE_t | size,
 |  | const uint32_t | limit
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
size Required size of the transmit FIFO.
Range: XMC_USIC_CH_FIFO_DISABLED, XMC_USIC_CH_FIFO_SIZE_2WORDS.. XMC_USIC_CH_FIFO_SIZE_64WORDS
limit Threshold for transmit FIFO filling level to be considered for generating events.
Range: 0 to size -1.
Returns
None
Description
Sets the size and trigger limit for the transmit FIFO.

The API is not to be called for initializing the transmit FIFO. The API shall be used for the runtime change of transmit FIFO trigger limit. FIFO start position will not be affected on execution.
Related APIs:
XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit()

void XMC_USIC_CH_WriteToTBUF | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data Data to be transmitted.
Range: 16bit unsigned data. minimum= 0, maximum= 65535
Returns
None
Description
Writes data into the transmit buffer.

The data provided is placed in TBUF[0U].
Related APIs:
XMC_USIC_CH_WriteToTBUFTCI()

void XMC_USIC_CH_WriteToTBUFTCI | ( | XMC_USIC_CH_t *const | channel,
 |  | const uint16_t | data,
 |  | const uint32_t | transmit_control_information
 | ) |  |
Parameters
channel Pointer to USIC channel handler of type XMC_USIC_CH_t
Range: XMC_USIC0_CH0, XMC_USIC0_CH1 to XMC_USIC2_CH1 based on device support.
data Data to be transmitted.
transmit_control_information transmit control information to be configured while transmitting the data.
Range: minimum= 0, maximum= 31.
Returns
None
Description
Writes data to the transmit buffer in a control mode.

When the respective control mode is enabled , this API can be used.
Related APIs:
XMC_USIC_CH_WriteToTBUF()

void XMC_USIC_Disable ( XMC_USIC_t *const usic )
Parameters
usic Pointer to USIC module handler of type XMC_USIC_t.
Range: XMC_USIC0 to XMC_USIC2 based on device support.
Returns
None
Description
Disables the USIC module.

Disables the clock for the USIC module by following the clock disabling sequence for the selected device.
Related APIs:
XMC_USIC_CH_Disable(), XMC_USIC_Enable()

void XMC_USIC_Enable ( XMC_USIC_t *const usic )
Parameters
usic Pointer to USIC module handler of type XMC_USIC_t.
Range: XMC_USIC0 to XMC_USIC2 based on device support.
Returns
None
Description
Enables the USIC module.

Enables the clock for the USIC module by following the clock enabling sequence for the selected device.
Related APIs:
XMC_USIC_CH_Enable(), XMC_USIC_Disable()

bool XMC_USIC_IsChannelValid ( const XMC_USIC_CH_t *const channel )

< USIC0 channel 0 base address

< USIC0 channel 1 base address

< USIC1 channel 0 base address

< USIC1 channel 1 base address

< USIC2 channel 0 base address

< USIC2 channel 1 base address

bool XMC_USIC_IsModuleValid ( const XMC_USIC_t *const module )

< USIC0 module base address

< USIC1 module base address

< USIC2 module base address

Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_USIC_CH_t Struct Reference

Data Fields
XMC_USIC_CH_t Struct Reference
XMC Peripheral Library » USIC

#include <xmc_usic.h>

Data Fields

__IO uint32_t | BRG
__IO uint32_t | BYP
__IO uint32_t | BYPCR
__I uint32_t | CCFG
__IO uint32_t | CCR
__IO uint32_t | CMTR
__IO uint32_t | DXCR [6]
__IO uint32_t | FDR
__O uint32_t | FMR
__O uint32_t | IN [32]
__IO uint32_t | INPR
__IO uint32_t | KSCFG
__I uint32_t | OUTDR
__I uint32_t | OUTR
__O uint32_t | PSCR
__IO uint32_t | RBCTR
__I uint32_t | RBUF
__I uint32_t | RBUF0
__I uint32_t | RBUF01SR
__I uint32_t | RBUF1
__I uint32_t | RBUFD
__I uint32_t | RBUFSR
__IO uint32_t | SCTR
__IO uint32_t | TBCTR
__IO uint32_t | TBUF [32]
__I uint32_t | TRBPTR
__O uint32_t | TRBSCR
__IO uint32_t | TRBSR
__IO uint32_t | PCR
__IO uint32_t | PCR_ASCMode
__IO uint32_t | PCR_IICMode
__IO uint32_t | PCR_IISMode
__IO uint32_t | PCR_SSCMode
__IO uint32_t | PSR
__IO uint32_t | PSR_ASCMode
__IO uint32_t | PSR_IICMode
__IO uint32_t | PSR_IISMode
__IO uint32_t | PSR_SSCMode

Detailed Description

USIC channel structure.
The members of the structure are same as in the device header file, except for some registers. DX0CR, DX1CR, DX2CR, DX3CR, DX4CR and DX5CR are replaced with the array DXCR[6]. TBUF0 to TBUF31 are replaced with TBUF[32]. IN0 to IN31 are replaced with IN[32].

Field Documentation

__IO uint32_t BRG

Baud rate generator register

__IO uint32_t BYP

FIFO bypass register

__IO uint32_t BYPCR

FIFO bypass control register

__I uint32_t CCFG

Channel configuration register

__IO uint32_t CCR

Channel control register

__IO uint32_t CMTR

Capture mode timer register

__IO uint32_t DXCR[6]

Input control registers DX0 to DX5.

__IO uint32_t FDR

Fractional divider configuration register

__O uint32_t FMR

Flag modification register

__O uint32_t IN[32]

Transmit FIFO input register

__IO uint32_t INPR

Interrupt node pointer register

__IO uint32_t KSCFG

Kernel state configuration register

__I uint32_t OUTDR

Receive FIFO debug output register

__I uint32_t OUTR

Receive FIFO output register

__IO uint32_t PCR

Protocol configuration register

__IO uint32_t PCR_ASCMode

UART protocol configuration register

__IO uint32_t PCR_IICMode

I2C protocol configuration register

__IO uint32_t PCR_IISMode

I2S protocol configuration register

__IO uint32_t PCR_SSCMode

SPI protocol configuration register

__O uint32_t PSCR

Protocol status clear register

__IO uint32_t PSR

Protocol status register

__IO uint32_t PSR_ASCMode

UART protocol status register

__IO uint32_t PSR_IICMode

I2C protocol status register

__IO uint32_t PSR_IISMode

I2S protocol status register

__IO uint32_t PSR_SSCMode

SPI protocol status register

__IO uint32_t RBCTR

Receive FIFO control register

__I uint32_t RBUF

Receive buffer register

__I uint32_t RBUF0

Receive buffer 0

__I uint32_t RBUF01SR

Receive buffer status register

__I uint32_t RBUF1

Receive buffer 1

__I uint32_t RBUFD

Debug mode receive buffer register

__I uint32_t RBUFSR

Receive buffer status register

__IO uint32_t SCTR

Shift control register

__IO uint32_t TBCTR

Transmit FIFO control register

__IO uint32_t TBUF[32]

Tranmsit buffer registers

__I uint32_t TRBPTR

Transmit/recive buffer pointer register

__O uint32_t TRBSCR

Transmit/receive buffer status clear register

__IO uint32_t TRBSR

Transmit/receive buffer status register

The documentation for this struct was generated from the following file:
  • xmc_usic.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: VADC

Data Structures | Macros | Typedefs | Enumerations | Functions
VADC
XMC Peripheral Library

Data Structures

struct | XMC_VADC_CHANNEL_CONFIG_t
struct | XMC_VADC_DETAILED_RESULT_t
struct | XMC_VADC_GLOBAL_CLASS_t
struct | XMC_VADC_GLOBAL_CLOCK_t
struct | XMC_VADC_GLOBAL_CONFIG_t
struct | XMC_VADC_GLOBAL_SHS_CONFIG_t
struct | XMC_VADC_GROUP_CLASS_t
struct | XMC_VADC_GROUP_CONFIG_t
struct | XMC_VADC_GROUP_EMUXCFG_t
struct | XMC_VADC_QUEUE_CONFIG_t
struct | XMC_VADC_QUEUE_ENTRY_t
struct | XMC_VADC_RESULT_CONFIG_t
struct | XMC_VADC_SCAN_CONFIG_t

Macros

#define XMC_VADC_NUM_CHANNELS_PER_GROUP (8U)

Typedefs

typedef XMC_VADC_SCAN_CONFIG_t | XMC_VADC_BACKGROUND_CONFIG_t
typedef SHS_Type | XMC_VADC_GLOBAL_SHS_t
typedef VADC_GLOBAL_TypeDef | XMC_VADC_GLOBAL_t
typedef VADC_G_TypeDef | XMC_VADC_GROUP_t
typedef uint16_t | XMC_VADC_RESULT_SIZE_t

Enumerations

Functions

void | XMC_VADC_GLOBAL_BackgndAddMultipleChannels (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_mask)
void | XMC_VADC_GLOBAL_BackgndRemoveMultipleChannels (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_mask)
void | XMC_VADC_GLOBAL_BackgroundAbortSequence (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundAddChannelToSequence (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_num)
void | XMC_VADC_GLOBAL_BackgroundClearReqSrcEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundDisableContinuousMode (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundDisableEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundEnableContinuousMode (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundEnableEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger (XMC_VADC_GLOBAL_t *const global_ptr)
uint32_t | XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending (XMC_VADC_GLOBAL_t *const global_ptr)
bool | XMC_VADC_GLOBAL_BackgroundGetReqSrcEventStatus (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_BACKGROUND_CONFIG_t *config)
bool | XMC_VADC_GLOBAL_BackgroundIsChannelPending (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_num)
void | XMC_VADC_GLOBAL_BackgroundRemoveChannelFromSequence (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_num)
void | XMC_VADC_GLOBAL_BackgroundSelectGating (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t input_num)
void | XMC_VADC_GLOBAL_BackgroundSelectTrigger (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t input_num)
void | XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
void | XMC_VADC_GLOBAL_BackgroundSetGatingMode (XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_GATEMODE_t mode_sel)
void | XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode (XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_SR_t sr)
void | XMC_VADC_GLOBAL_BackgroundTriggerConversion (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundTriggerReqSrcEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BindGroupToEMux (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t emuxif, const uint32_t group)
void | XMC_VADC_GLOBAL_ClearEvent (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t event_type)
void | XMC_VADC_GLOBAL_ClockInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CLOCK_t *config)
void | XMC_VADC_GLOBAL_DisableModule (void)
void | XMC_VADC_GLOBAL_DisableModuleClock (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_DisablePostCalibration (XMC_VADC_GLOBAL_t *const global_ptr, uint32_t group_number)
void | XMC_VADC_GLOBAL_DisableSleepMode (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_DisableStartupCalibration (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_EnableModule (void)
void | XMC_VADC_GLOBAL_EnableModuleClock (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_EnablePostCalibration (XMC_VADC_GLOBAL_t *const global_ptr, uint32_t group_number)
void | XMC_VADC_GLOBAL_EnableSleepMode (XMC_VADC_GLOBAL_t *const global_ptr)
XMC_VADC_FAST_COMPARE_t | XMC_VADC_GLOBAL_GetCompareResult (XMC_VADC_GLOBAL_t *const global_ptr)
uint32_t | XMC_VADC_GLOBAL_GetDetailedResult (XMC_VADC_GLOBAL_t *const global_ptr)
XMC_VADC_RESULT_SIZE_t | XMC_VADC_GLOBAL_GetResult (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_Init (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CONFIG_t *config)
void | XMC_VADC_GLOBAL_InputClassInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CLASS_t config, const XMC_VADC_GROUP_CONV_t conv_type, const uint32_t set_num)
void | XMC_VADC_GLOBAL_ResultInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_RESULT_CONFIG_t *config)
void | XMC_VADC_GLOBAL_SetBoundaries (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t boundary0, const uint32_t boundary1)
void | XMC_VADC_GLOBAL_SetCompareValue (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_RESULT_SIZE_t compare_val)
void | XMC_VADC_GLOBAL_SetIndividualBoundary (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_CHANNEL_BOUNDARY_t selection, const uint16_t boundary_value)
void | XMC_VADC_GLOBAL_SetResultEventInterruptNode (XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_SR_t sr)
void | XMC_VADC_GLOBAL_SHS_DisableSigmaDeltaLoop (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, XMC_VADC_SHS_LOOP_CH_t loop_select)
void | XMC_VADC_GLOBAL_SHS_EnableSigmaDeltaLoop (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, XMC_VADC_SHS_LOOP_CH_t loop_select)
void | XMC_VADC_GLOBAL_SHS_Init (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, const XMC_VADC_GLOBAL_SHS_CONFIG_t *config)
bool | XMC_VADC_GLOBAL_SHS_IsConverterReady (XMC_VADC_GLOBAL_SHS_t *const shs_ptr)
void | XMC_VADC_GLOBAL_SHS_SetAnalogReference (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, const XMC_VADC_GLOBAL_SHS_AREF_t aref)
void | XMC_VADC_GLOBAL_SHS_SetClockDivider (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, uint8_t divs_value)
void | XMC_VADC_GLOBAL_SHS_SetGainFactor (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, uint8_t gain_value, XMC_VADC_GROUP_INDEX_t group_num, uint8_t ch_num)
void | XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, XMC_VADC_GROUP_INDEX_t group_num, XMC_VADC_SHS_LOOP_CH_t loop_select, uint8_t ch_num)
void | XMC_VADC_GLOBAL_StartupCalibration (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_TriggerEvent (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t event_type)
void | XMC_VADC_GROUP_AddResultToFifo (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_BackgroundDisableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_BackgroundEnableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ChannelClearEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
uint32_t | XMC_VADC_GROUP_ChannelGetAssertedEvents (XMC_VADC_GROUP_t *const group_ptr)
XMC_VADC_CHANNEL_CONV_t | XMC_VADC_GROUP_ChannelGetInputClass (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
XMC_VADC_RESULT_ALIGN_t | XMC_VADC_GROUP_ChannelGetResultAlignment (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
uint8_t | XMC_VADC_GROUP_ChannelGetResultRegister (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ChannelInit (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_CONFIG_t *config)
bool | XMC_VADC_GROUP_ChannelIsResultOutOfBounds (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ChannelSetBoundarySelection (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, XMC_VADC_BOUNDARY_SELECT_t boundary_sel, XMC_VADC_CHANNEL_BOUNDARY_t selection)
void | XMC_VADC_GROUP_ChannelSetEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_ChannelSetIclass (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_CONV_t conversion_class)
void | XMC_VADC_GROUP_ChannelSetInputReference (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_REF_t ref)
void | XMC_VADC_GROUP_ChannelSetResultRegister (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const uint32_t result_reg_num)
void | XMC_VADC_GROUP_ChannelTriggerEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ChannelTriggerEventGenCriteria (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_EVGEN_t criteria)
void | XMC_VADC_GROUP_CheckSlaveReadiness (XMC_VADC_GROUP_t *const group_ptr, uint32_t slave_group)
void | XMC_VADC_GROUP_ClearResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_DisableChannelSyncRequest (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_DisableResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_EnableChannelSyncRequest (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_EnableResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_ExternalMuxControlInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_EMUXCFG_t emux_cfg)
uint32_t | XMC_VADC_GROUP_GetAlias (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_GetAssertedResultEvents (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_GetDetailedResult (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
XMC_VADC_FAST_COMPARE_t | XMC_VADC_GROUP_GetFastCompareResult (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
XMC_VADC_GROUP_CLASS_t | XMC_VADC_GROUP_GetInputClass (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_CHANNEL_CONV_t conv_class)
XMC_VADC_RESULT_SIZE_t | XMC_VADC_GROUP_GetResult (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
uint32_t | XMC_VADC_GROUP_GetResultFifoHead (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
uint32_t | XMC_VADC_GROUP_GetResultFifoTail (XMC_VADC_GROUP_t *const group_ptr, uint32_t res_reg)
uint32_t | XMC_VADC_GROUP_GetSyncReadySignal (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_IgnoreSlaveReadiness (XMC_VADC_GROUP_t *const group_ptr, uint32_t slave_group)
void | XMC_VADC_GROUP_Init (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_CONFIG_t *config)
void | XMC_VADC_GROUP_InputClassInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_CLASS_t config, const XMC_VADC_GROUP_CONV_t conv_type, const uint32_t set_num)
XMC_VADC_GROUP_STATE_t | XMC_VADC_GROUP_IsConverterBusy (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_IsResultRegisterFifoHead (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
bool | XMC_VADC_GROUP_IsResultRegisterInFifo (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_QueueAbortSequence (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueClearReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueDisableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueDisableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueEnableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueEnableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueFlushEntries (XMC_VADC_GROUP_t *const group_ptr)
int32_t | XMC_VADC_GROUP_QueueGetInterruptedChannel (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_QueueGetLength (XMC_VADC_GROUP_t *const group_ptr)
int32_t | XMC_VADC_GROUP_QueueGetNextChannel (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_QueueGetReqSrcEventStatus (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_QUEUE_CONFIG_t *config)
void | XMC_VADC_GROUP_QueueInsertChannel (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_QUEUE_ENTRY_t entry)
bool | XMC_VADC_GROUP_QueueIsArbitrationSlotEnabled (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueRemoveChannel (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueSelectGating (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GATE_INPUT_SELECT_t input_num)
void | XMC_VADC_GROUP_QueueSelectTrigger (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_INPUT_SELECT_t input_num)
void | XMC_VADC_GROUP_QueueSelectTriggerEdge (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
void | XMC_VADC_GROUP_QueueSetGatingMode (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_GATEMODE_t mode_sel)
void | XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_QueueTriggerConversion (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueTriggerReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ResultInit (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg_num, const XMC_VADC_RESULT_CONFIG_t *config)
void | XMC_VADC_GROUP_ScanAddChannelToSequence (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ScanAddMultipleChannels (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_mask)
void | XMC_VADC_GROUP_ScanClearReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableContinuousMode (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableContinuousMode (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_ScanGetNumChannelsPending (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_ScanGetReqSrcEventStatus (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SCAN_CONFIG_t *config)
bool | XMC_VADC_GROUP_ScanIsArbitrationSlotEnabled (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_ScanIsChannelPending (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ScanRemoveChannel (XMC_VADC_GROUP_t *const group_ptr, const uint32_t channel_num)
void | XMC_VADC_GROUP_ScanSelectGating (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_GATE_INPUT_SELECT_t gating_input)
void | XMC_VADC_GROUP_ScanSelectTrigger (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_TRIGGER_INPUT_SELECT_t trigger_input)
void | XMC_VADC_GROUP_ScanSelectTriggerEdge (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
void | XMC_VADC_GROUP_ScanSequenceAbort (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanSetGatingMode (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_GATEMODE_t mode_sel)
void | XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_ScanTriggerConversion (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanTriggerReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_SetBoundaries (XMC_VADC_GROUP_t *const group_ptr, const uint32_t boundary0, const uint32_t boundary1)
void | XMC_VADC_GROUP_SetBoundaryEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const uint8_t boundary_flag_num, const XMC_VADC_BOUNDARY_NODE_t node)
void | XMC_VADC_GROUP_SetChannelAlias (XMC_VADC_GROUP_t *const group_ptr, const uint32_t src_ch_num, const uint32_t alias_ch_num)
void | XMC_VADC_GROUP_SetIndividualBoundary (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_CHANNEL_BOUNDARY_t selection, const uint16_t boundary_value)
void | XMC_VADC_GROUP_SetPowerMode (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_POWERMODE_t power_mode)
void | XMC_VADC_GROUP_SetResultFastCompareValue (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg, const XMC_VADC_RESULT_SIZE_t compare_val)
void | XMC_VADC_GROUP_SetResultInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_SetResultSubtractionValue (XMC_VADC_GROUP_t *const group_ptr, const uint16_t subtraction_val)
void | XMC_VADC_GROUP_SetSyncMaster (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_SetSyncReadySignal (XMC_VADC_GROUP_t *const group_ptr, uint32_t mask)
void | XMC_VADC_GROUP_SetSyncSlave (XMC_VADC_GROUP_t *const group_ptr, uint32_t master_grp, uint32_t slave_group)
void | XMC_VADC_GROUP_SetSyncSlaveReadySignal (XMC_VADC_GROUP_t *const group_ptr, uint32_t eval_waiting_group, uint32_t eval_origin_group)
void | XMC_VADC_GROUP_TriggerResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_TriggerServiceRequest (XMC_VADC_GROUP_t *const group_ptr, const uint32_t sr_num, const XMC_VADC_GROUP_IRQ_t type)

Detailed Description

The XMC microcontroller provides a series of analog input channels connected to a cluster of Analog/Digital Converters using the Successive Approximation Register (SAR) principle to convert analog input values (voltages) to discrete digital values. The XMC1x is based on Sample & Hold converters, where a cluster contains 2 Sample&Hold units which share a common converter.

Each converter of the ADC cluster can operate independent of the others, controlled by a dedicated set of registers and triggered by a dedicated group request source. The results of each channel can be stored in a dedicated channel-specific result register or in a group-specific result register.

The Versatile Analog to Digital Converter module (VADC) of the XMC comprises a set of converter blocks that can be operated either independently or via a common request source that emulates a background converter. Each converter block is equipped with a dedicated input multiplexer and dedicated request sources, which together build separate groups.

The VADC LLD is split into GLOBAL and GROUP related APIs.
GLOBAL:

  • Global APIs act on the entire ADC module. Configures global configuration registers
  • Allows configuration of the background request source of the VADC.
  • The clock related configurations for the VADC module are configured in the Global APIs/
  • The Global API names are prefixed by the XMC_VADC_GLOBAL_ and they accept XMC_VADC_GLOBAL_t as one of its arguments.
  • Configures the background request source of the VADC. The APIs which act on the background related registers are prefixed by XMC_VADC_GLOBAL_Background
  • Configures the sample and hold unit of the VADC. The APIs which act on the SHS related registers are prefixed by XMC_VADC_GLOBAL_SHS_

GROUP:

  • Group APIs act on a VADC group. Configures the group configuration registers
  • Configures the queue request source of the VADC. The APIs which act on the queue related registers are prefixed by XMC_VADC_GROUP_Queue
  • Configures the scan request source of the VADC. The APIs which act on the scan related registers are prefixed by XMC_VADC_GROUP_Scan
  • Configuration of the channels of each group are done by the API which have a prefix as XMC_VADC_GROUP_Channel.
  • The Group API names are prefixed by the XMC_VADC_GROUP_ and they accept XMC_VADC_GROUP_t as one of its arguments.

Macro Definition Documentation

#define XMC_VADC_NUM_CHANNELS_PER_GROUP (8U)

Defines the number of ADC channels per group

Typedef Documentation

typedef XMC_VADC_SCAN_CONFIG_t XMC_VADC_BACKGROUND_CONFIG_t

Type defined the scan configuration structure for background Request Source

typedef SHS_Type XMC_VADC_GLOBAL_SHS_t

Type defined the sample and hold register structure

typedef VADC_GLOBAL_TypeDef XMC_VADC_GLOBAL_t

Type defined the device header file vadc global register structure type to VADC type

typedef VADC_G_TypeDef XMC_VADC_GROUP_t

Type defined the device header file vadc group register structure type to VADC Group type

typedef uint16_t XMC_VADC_RESULT_SIZE_t

Type defined the converted result size to unsigned 16 bit integer

Enumeration Type Documentation

enum XMC_VADC_BOUNDARY_NODE_t

Provides possible routing values for the boundary flag.

Enumerator
XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_0 | Route the Group boundary flag to Common boundary flag 0
XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_1 | Route the Group boundary flag to Common boundary flag 1
XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_2 | Route the Group boundary flag to Common boundary flag 2
XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_3 | Route the Group boundary flag to Common boundary flag 3
XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_0 | Route the Group boundary flag to Common Service Request line 0
XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_1 | Route the Group boundary flag to Common Service Request line 1
XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_2 | Route the Group boundary flag to Common Service Request line 2
XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_3 | Route the Group boundary flag to Common Service Request line 3
enum XMC_VADC_BOUNDARY_SELECT_t

Defines the boundary select for Channel. Use XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t for this enumeration.

Enumerator
XMC_VADC_BOUNDARY_SELECT_LOWER_BOUND | Select the lower boundary
XMC_VADC_BOUNDARY_SELECT_UPPER_BOUND | Selects the upper boundary
enum XMC_VADC_CHANNEL_ALIAS_t

Defines channel alias. All enum items are available for channels 0 and 1. Other Channels can accept only XMC_VADC_CHANNEL_ALIAS_DISABLED.

enum XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t

Defines the criteria for boundary flag assertion. Use XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t for this enumeration.

Enumerator
XMC_VADC_CHANNEL_BOUNDARY_CONDITION_ABOVE_BAND | Set Boundary condition criteria to assert above the band
XMC_VADC_CHANNEL_BOUNDARY_CONDITION_BELOW_BAND | Set Boundary condition criteria to assert below the band
enum XMC_VADC_CHANNEL_BOUNDARY_t

Defines the references to boundary values used for limit checking feature. Each of these can be assigned as either an upper bound or a lower bound. Use XMC_VADC_CHANNEL_BOUNDARY_t for this enumeration.

Enumerator
XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND0 | Group specific Boundary-0 value
XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND1 | Group specific Boundary-1 value
XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND0 | Module wide Boundary-0 value
XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND1 | Module wide Boundary-1 value
enum XMC_VADC_CHANNEL_BWDCH_t

Defines the voltage which the capacitor is charged to. Used in Broken wire detection feature. Use XMC_VADC_CHANNEL_BWDCH_t for this enumeration.

Enumerator
XMC_VADC_CHANNEL_BWDCH_VAGND | Capacitor pre-charged to ground
XMC_VADC_CHANNEL_BWDCH_VAREF | Capacitor pre-charged to reference voltage
enum XMC_VADC_CHANNEL_CONV_t

Defines the conversion classes that can be selected for each channel. The enumeration members holds the group or global classes. The conversion classes decides the properties of conversion, like resolution, sampling time etc Use XMC_VADC_CHANNEL_CONV_t for this enumeration.

Enumerator
XMC_VADC_CHANNEL_CONV_GROUP_CLASS0 | Conversion property set-0 specific to the group
XMC_VADC_CHANNEL_CONV_GROUP_CLASS1 | Conversion property set-1 specific to the group
XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS0 | Conversion property set-0, Module wide
XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS1 | Conversion property set-1, Module wide
enum XMC_VADC_CHANNEL_EVGEN_t

Defines the criteria for event generation by the channel. Use XMC_VADC_CHANNEL_EVGEN_t for this enumeration.

Enumerator
XMC_VADC_CHANNEL_EVGEN_NEVER | No event generated
XMC_VADC_CHANNEL_EVGEN_INBOUND | Event generated when the result is within the normal range
XMC_VADC_CHANNEL_EVGEN_COMPHIGH | Event generated when the result of fast compare operation is high
XMC_VADC_CHANNEL_EVGEN_OUTBOUND | Event generated when the result is outside the normal range
XMC_VADC_CHANNEL_EVGEN_COMPLOW | Event generated when the result result of fast compare operation is low
XMC_VADC_CHANNEL_EVGEN_ALWAYS | Event generated always after conversion - unconditionally
enum XMC_VADC_CHANNEL_REF_t

Defines the reference voltage selection for conversion. Use XMC_VADC_CHANNEL_REF_t for this enumeration.

Enumerator
XMC_VADC_CHANNEL_REF_INTREF | Internal VARef
XMC_VADC_CHANNEL_REF_ALT_CH0 | External voltage available on Channel-0 of the perticular group
enum XMC_VADC_CONVMODE_t

Defines the conversion mode. It defines the resolution of conversion. Use XMC_VADC_CONVMODE_t for this enumeration.

Enumerator
XMC_VADC_CONVMODE_12BIT | Results of conversion are 12bits wide
XMC_VADC_CONVMODE_10BIT | Results of conversion are 10bits wide
XMC_VADC_CONVMODE_8BIT | Results of conversion are 8bits wide
XMC_VADC_CONVMODE_FASTCOMPARE | Input signal compared with a preset range
enum XMC_VADC_DMM_t

Defines the conversion result handling mode. Use XMC_VADC_DMM_t for this enumeration.

Enumerator
XMC_VADC_DMM_REDUCTION_MODE | Standard Data reduction mode
XMC_VADC_DMM_FILTERING_MODE | Provide option to select Finite Impulse Response Filter (FIR) or Infinite Impulse Response Filter (IIR)
XMC_VADC_DMM_DIFFERENCE_MODE | Difference mode is selected
enum XMC_VADC_FAST_COMPARE_t

Defines the output of a fast compare mode. Use XMC_VADC_FAST_COMPARE_t for this enumeration.

Enumerator
XMC_VADC_FAST_COMPARE_LOW | Input lower than than programmed reference
XMC_VADC_FAST_COMPARE_HIGH | Input higher than than programmed reference
XMC_VADC_FAST_COMPARE_UNKNOWN | Unknown, Conversion probably still ongoing
enum XMC_VADC_GATE_INPUT_SELECT_t

Defines the external gating input selection possibilities, to gate the conversion requests. Refer the VADC interconnects section of the reference manual for details of peripherals which can be used. Also refer xmc_vadc_map.h file for detailed definitions of the peripherals which can take the control of these enumeration items. Use XMC_VADC_GATE_INPUT_SELECT_t for this enumeration.

Enumerator
XMC_VADC_REQ_GT_A | Gating select signal A
XMC_VADC_REQ_GT_B | Gating select signal B
XMC_VADC_REQ_GT_C | Gating select signal C
XMC_VADC_REQ_GT_D | Gating select signal D
XMC_VADC_REQ_GT_E | Gating select signal E
XMC_VADC_REQ_GT_F | Gating select signal F
XMC_VADC_REQ_GT_G | Gating select signal G
XMC_VADC_REQ_GT_H | Gating select signal H
XMC_VADC_REQ_GT_I | Gating select signal I
XMC_VADC_REQ_GT_J | Gating select signal J
XMC_VADC_REQ_GT_K | Gating select signal K
XMC_VADC_REQ_GT_L | Gating select signal L
XMC_VADC_REQ_GT_M | Gating select signal M
XMC_VADC_REQ_GT_N | Gating select signal N
XMC_VADC_REQ_GT_O | Gating select signal O
XMC_VADC_REQ_GT_P | Gating select signal P
enum XMC_VADC_GATEMODE_t

Defines the condition for gating the conversion requests. It can be used to set the ENGT field of ASMR/BSMR/QMR register respectively for auto_scan/background_scan/queue request sources. Use XMC_VADC_GATEMODE_t for this enumeration.

Enumerator
XMC_VADC_GATEMODE_BLOCK | External triggers are permanently blocked
XMC_VADC_GATEMODE_IGNORE | External triggers are unconditionally passed
XMC_VADC_GATEMODE_ACTIVEHIGH | External trigger is passed only if the gate signal is high
XMC_VADC_GATEMODE_ACTIVELOW | External trigger is passed only if the gate signal is low
enum XMC_VADC_GLOBAL_EVENT_t

Defines the event which can lead to a global service request assertion. Use XMC_VADC_GLOBAL_EVENT_t for this enumeration.

Enumerator
XMC_VADC_GLOBAL_EVENT_BKGNDSOURCE | Background scan request source event
XMC_VADC_GLOBAL_EVENT_RESULT | Global result event
enum XMC_VADC_GLOBAL_SHS_AREF_t

Selection of the reference voltage that is required for conversions (VREF).

Enumerator
XMC_VADC_GLOBAL_SHS_AREF_EXTERNAL_VDD_UPPER_RANGE | External reference, upper supply range, e.g. VDD >= 3.0V
XMC_VADC_GLOBAL_SHS_AREF_INTERNAL_VDD_UPPER_RANGE | Internal reference, upper supply range, e.g. VDD >= 3.0V
XMC_VADC_GLOBAL_SHS_AREF_INTERNAL_VDD_LOWER_RANGE | Internal reference, lower supply range, e.g. VDD < 3.0V
enum XMC_VADC_GLOBAL_SHS_CALIBRATION_ORDER_t

Provides the order in which the SHS should do the calibration

Enumerator
XMC_VADC_GLOBAL_SHS_CALIBRATION_ORDER_POST_CONV | Calibration occur after conversion takes place
XMC_VADC_GLOBAL_SHS_CALIBRATION_ORDER_PRE_CONV | Calibration occur before conversion takes place
enum XMC_VADC_GROUP_ARBMODE_t

Defines the request source arbiter behavior. Use XMC_VADC_GROUP_ARBMODE_t for this enumeration.

Enumerator
XMC_VADC_GROUP_ARBMODE_ALWAYS | Arbiter runs all the time
XMC_VADC_GROUP_ARBMODE_ONDEMAND | Arbiter runs only if a conversion request is asserted by any of the request sources
enum XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t

Defines the various modes for the boundary flag. Use XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t for this enumeration.

Enumerator
XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_DISABLED | Disable boundary flag
XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED | Always enable boundary
XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED_ACTIVE_LOW | Enable boundary flag when gate level is 0
XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED_ACTIVE_HIGH | Enable boundary flag when gate level is 1
enum XMC_VADC_GROUP_CONV_t

Defines the reference to sample time and conversion mode settings. Use XMC_VADC_GROUP_CONV_t for this enumeration.

Enumerator
XMC_VADC_GROUP_CONV_STD | Settings pertaining to channels directly attached to VADC module
XMC_VADC_GROUP_CONV_EMUX | Settings pertaining to channels connected to VADC via EMUX
enum XMC_VADC_GROUP_EMUXCODE_t

Defines the EMUX channel selection encoding scheme. Use XMC_VADC_GROUP_EMUXCODE_t for this enumeration.

Enumerator
XMC_VADC_GROUP_EMUXCODE_BINARY | A linearly incrementing code serves are MUX-SEL
XMC_VADC_GROUP_EMUXCODE_GRAY | The MUX-SEL is gray encoded
enum XMC_VADC_GROUP_EMUXMODE_t

Defines the EMUX mode of operation. Use XMC_VADC_GROUP_EMUXMODE_t for this enumeration.

Enumerator
XMC_VADC_GROUP_EMUXMODE_SWCTRL | Perform EMUX in Software control mode
XMC_VADC_GROUP_EMUXMODE_STEADYMODE | Perform EMUX in Steady mode (Use EMUX set value)
XMC_VADC_GROUP_EMUXMODE_SINGLEMODE | Perform EMUX in Single step mode
XMC_VADC_GROUP_EMUXMODE_SEQUENCEMODE | Perform EMUX in Sequence mode
enum XMC_VADC_GROUP_INDEX_t

Defines the group indices. Use XMC_VADC_GROUP_INDEX_t for this enumeration.

enum XMC_VADC_GROUP_IRQ_t

Defines the service request set used. Use XMC_VADC_GROUP_IRQ_t for this enumeration.

Enumerator
XMC_VADC_GROUP_IRQ_KERNEL | Refers to Group specific service request
XMC_VADC_GROUP_IRQ_SHARED | Refers to Module wide service request
enum XMC_VADC_GROUP_POWERMODE_t

Defines the power modes of a VADC Group. Use XMC_VADC_GROUP_POWERMODE_t for this enumeration.

Enumerator
XMC_VADC_GROUP_POWERMODE_OFF | Group is powered down
XMC_VADC_GROUP_POWERMODE_RESERVED1 | Reserved
XMC_VADC_GROUP_POWERMODE_RESERVED2 | Reserved
XMC_VADC_GROUP_POWERMODE_NORMAL | Group is powered up
enum XMC_VADC_GROUP_RS_PRIORITY_t

Defines the request source arbitration priority. Use XMC_VADC_GROUP_RS_PRIORITY_t for this enumeration.

Enumerator
XMC_VADC_GROUP_RS_PRIORITY_0 | Lowest priority for the request source
XMC_VADC_GROUP_RS_PRIORITY_1 | Second lowest priority for the request source
XMC_VADC_GROUP_RS_PRIORITY_2 | Second highest priority for the request source
XMC_VADC_GROUP_RS_PRIORITY_3 | Highest priority for the request source
enum XMC_VADC_GROUP_STATE_t

Defines the status of a VADC group (also known as kernel). Use XMC_VADC_GROUP_STATE_t for this enumeration.

Enumerator
XMC_VADC_GROUP_STATE_IDLE | Idle and can convert if requested
XMC_VADC_GROUP_STATE_BUSY | Busy with an ongoing conversion
enum XMC_VADC_RESULT_ALIGN_t

Defines the alignment of the converted result. Use XMC_VADC_RESULT_ALIGN_t for this enumeration.

Enumerator
XMC_VADC_RESULT_ALIGN_LEFT | Always align result to left
XMC_VADC_RESULT_ALIGN_RIGHT | Always align result to right
enum XMC_VADC_RESULT_SUBTRATION_t
Enumerator
XMC_VADC_RESULT_SUBTRATION_12BIT_LEFT_ALIGN | Always align result to left
XMC_VADC_RESULT_SUBTRATION_12BIT_RIGHT_ALIGN | Always align result to right
XMC_VADC_RESULT_SUBTRATION_10BIT_LEFT_ALIGN | Always align result to left
XMC_VADC_RESULT_SUBTRATION_10BIT_RIGHT_ALIGN | Always align result to right
XMC_VADC_RESULT_SUBTRATION_8BIT_LEFT_ALIGN | Always align result to left
XMC_VADC_RESULT_SUBTRATION_8BIT_RIGHT_ALIGN | Always align result to right
enum XMC_VADC_SCAN_LOAD_t

Defines the behavior of load event for the scan request source. Use XMC_VADC_SCAN_LOAD_t for this enumeration.

Enumerator
XMC_VADC_SCAN_LOAD_OVERWRITE | The old set of channels is discarded in favor of the new set awaiting conversion
XMC_VADC_SCAN_LOAD_COMBINE | The new set of channels are combined with the pending channels from previous set
enum XMC_VADC_SCAN_TYPE_t

Defines the type of scan request source to be used. It can choose between auto scan and background scan request source methods. Use XMC_VADC_SCAN_TYPE_t for this enumeration.

Enumerator
XMC_VADC_SCAN_TYPE_GROUPSCAN | Auto scan mode of operation selected. Also called as Group scan
XMC_VADC_SCAN_TYPE_BACKGROUND | Background scan mode of operation selected. Also called as Global scan
enum XMC_VADC_SHS_LOOP_CH_t

Defines the Delta sigma loop.

Enumerator
XMC_VADC_SHS_LOOP_CH_0 | Select Delta-sigma loop 0
XMC_VADC_SHS_LOOP_CH_1 | Select Delta-sigma loop 1
enum XMC_VADC_SR_t

Defines the various service requests lines. Each group can raise up to 4 service requests independently. While all groups together have the possibility of raising 4 module wide service requests. Use XMC_VADC_SR_t for this enumeration.

Enumerator
XMC_VADC_SR_GROUP_SR0 | Group specific Service Request-0
XMC_VADC_SR_GROUP_SR1 | Group specific Service Request-1
XMC_VADC_SR_GROUP_SR2 | Group specific Service Request-2
XMC_VADC_SR_GROUP_SR3 | Group specific Service Request-3
XMC_VADC_SR_SHARED_SR0 | Module Wide Common Service Request-0
XMC_VADC_SR_SHARED_SR1 | Module Wide Common Service Request-1
XMC_VADC_SR_SHARED_SR2 | Module Wide Common Service Request-2
XMC_VADC_SR_SHARED_SR3 | Module Wide Common Service Request-3
enum XMC_VADC_STARTMODE_t

Defines the mode of operation of a channel, when an ongoing conversion gets interrupted in between. Use XMC_VADC_STARTMODE_t for this enumeration.

Enumerator
XMC_VADC_STARTMODE_WFS | An ongoing conversion completes without interruption
XMC_VADC_STARTMODE_CIR | An ongoing conversion can be interrupted and resumed later
XMC_VADC_STARTMODE_CNR | An ongoing conversion can be interrupted and never resumed
enum XMC_VADC_STATUS_t

Defines the return status after execution of VADC specific API's. Use XMC_VADC_STATUS_t for this enumeration.

Enumerator
XMC_VADC_STATUS_SUCCESS | Returned when the API has been able to fulfill the callers request
XMC_VADC_STATUS_ERROR | Returned when the API cannot fulfill the request
enum XMC_VADC_SYNCTR_EVAL_t

Defines the ready signal selection

Enumerator
XMC_VADC_SYNCTR_EVAL_1

Mask to set the EVAL1 bits of SYNCTR

enum XMC_VADC_TRIGGER_EDGE_t

Defines the edge sensitivity of the trigger signal which can assert a conversion. Use XMC_VADC_TRIGGER_EDGE_t for this enumeration.

Enumerator
XMC_VADC_TRIGGER_EDGE_NONE | No external trigger. Conversion request can be asserted by software
XMC_VADC_TRIGGER_EDGE_FALLING | The falling edge of the external trigger can assert conversion request
XMC_VADC_TRIGGER_EDGE_RISING | The rising edge of the external trigger can assert conversion request
XMC_VADC_TRIGGER_EDGE_ANY | Both the edges can assert conversion request
enum XMC_VADC_TRIGGER_INPUT_SELECT_t

Defines the external trigger input selection possibilities, to assert a conversion. Refer the VADC interconnects section of the reference manual for details of peripherals which can be used. Also refer xmc_vadc_map.h file for detailed definitions of the peripherals which can take the control of these enumeration items. Use XMC_VADC_TRIGGER_INPUT_SELECT_t for this enumeration.

Enumerator
XMC_VADC_REQ_TR_A | Trigger select signal A
XMC_VADC_REQ_TR_B | Trigger select signal B
XMC_VADC_REQ_TR_C | Trigger select signal C
XMC_VADC_REQ_TR_D | Trigger select signal D
XMC_VADC_REQ_TR_E | Trigger select signal E
XMC_VADC_REQ_TR_F | Trigger select signal F
XMC_VADC_REQ_TR_G | Trigger select signal G
XMC_VADC_REQ_TR_H | Trigger select signal H
XMC_VADC_REQ_TR_I | Trigger select signal I
XMC_VADC_REQ_TR_J | Trigger select signal J
XMC_VADC_REQ_TR_K | Trigger select signal K
XMC_VADC_REQ_TR_L | Trigger select signal L
XMC_VADC_REQ_TR_M | Trigger select signal M
XMC_VADC_REQ_TR_N | Trigger select signal N
XMC_VADC_REQ_TR_O | Trigger select signal O
XMC_VADC_REQ_TR_P | Trigger select signal P

Function Documentation

void XMC_VADC_GLOBAL_BackgndAddMultipleChannels | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | grp_num,
 |  | const uint32_t | ch_mask
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
grp_num | ID of the VADC group whose unprioritized channels have been assigned to background scan
ch_mask Mask word indicating channels which form part of scan conversion sequence Bit location 0/1/2/3/4/5/6/7 represents channels-0/1/2/3/4/5/6/7 respectively. To Add the channel to the scan sequence enable the respective bit. Passing a 0x0 will clear all the previously selected channels
Range: [0x0 to 0xFF]
Returns
None
Description:
Adds multiple channels to the scan sequence.

Call this API to insert a multiple channels into the scan request source. This will be added to a scan sequence. The added channels will be a part of the conversion sequence when the next load event occurs. A call to this API would configure the register bit fields of BRSSEL.
Related APIs:
XMC_VADC_GLOBAL_BackgroundAddChannelToSequence()
void XMC_VADC_GLOBAL_BackgndRemoveMultipleChannels | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | grp_num,
 |  | const uint32_t | ch_mask
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
grp_num | ID of the VADC group whose unprioritized channels have been assigned to background scan
ch_mask Mask word indicating channels which form part of scan conversion sequence Bit location 0/1/2/3/4/5/6/7 represents channels-0/1/2/3/4/5/6/7 respectively. To Add the channel to the scan sequence enable the respective bit. Passing a 0x0 will clear all the previously selected channels
Range: [0x0 to 0xFF]
Returns
None
Description:
Removes multiple channels to the scan sequence.

Call this API to insert a multiple channels into the scan request source. This will be added to a scan sequence. The added channels will be a part of the conversion sequence when the next load event occurs. A call to this API would configure the register bit fields of BRSSEL.
Related APIs:
XMC_VADC_GLOBAL_BackgroundAddChannelToSequence()
void XMC_VADC_GLOBAL_BackgroundAbortSequence ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Aborts an ongoing background scan conversion(sequence).

An ongoing sequence can be aborted at any time. The scan unit picks the pending channels one by one from a pending register and requests for their conversion. This API essentially clears the channel pending register thus creating an illusion that there are no more channels left in the sequence. A call to this API would configure the registers BRSMR, BRSCTRL, GxARBPR(if group is available) to abort the current scan sequence.
Related APIs:
None.
void XMC_VADC_GLOBAL_BackgroundAddChannelToSequence | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | grp_num,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
grp_num | ID of the VADC group whose unprioritized channels have been assigned to background scan Request source
ch_num The unprioritized channel meant to be added to the scan sequence
Range: [0x0 to 0x7]
Returns
None
Description:
Adds a channel to the background scan sequence.

Call this API to insert a new single channel into the background scan request source. This will be added to the scan sequence. The added channel will be part of the conversion sequence when the next load event occurs. A call to this API would configure the register bit fields of BRSSEL.
Related APIs:
XMC_VADC_GLOBAL_BackgroundAddMultipleChannels()
void XMC_VADC_GLOBAL_BackgroundClearReqSrcEvent ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Acknowledges the background scan conversion complete request source event.

This API will clear the request source event that occurred. This will clear a interrupt if it was raised. A call to this API would configure the register bit field GLOBEFLAG.SEVGLB
Related APIs:
XMC_VADC_GLOBAL_BackgroundTriggerReqSrcEvent()
void XMC_VADC_GLOBAL_BackgroundDisableContinuousMode ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Disables continuous conversion mode.

Typically for a Background request source to generate conversion request, either a hardware trigger or a software request is a pre-requisite. Using autoscan feature it is possible to start the conversion once and allow the sequence to repeat without any further triggers. Once all channels belonging to a Background request source have been converted, a request source completion event is generated. Generation of this event can restart the Background sequence. By invoking this API the Autoscan mode of operations is disabled. A call to this API would configure the register bit field BRSMR.SCAN.
Related APIs:
XMC_VADC_GLOBAL_BackgroundEnableContinuousMode()
void XMC_VADC_GLOBAL_BackgroundDisableEvent ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Disables the background scan request source event .
By using this API the request source event will be deactivated for the background scan request source. Other configurations w.r.t service node pointer are not done in this API. A call to this API would configure the register bit field BRSMR.ENSI.
Related APIs:
XMC_VADC_GROUP_BackgroundEnableEvent(),
XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode()
void XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Disables the trigger for background scan request source.
By using this API the trigger will be deactivated for the background scan request source. This will just deactivate the H/W trigger for the background scan request source. If any configuration was done to select the trigger input in BRSCTRL will be not be effected. A call to this API would configure the register bit field BRSMR.ENTR.
Related APIs:
XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger()
void XMC_VADC_GLOBAL_BackgroundEnableContinuousMode ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Enables continuous conversion mode.

Typically for a Background request source to generate conversion request, either a hardware trigger or a software request is needed. Using autoscan (continuous conversion)feature it is possible to start the conversion once and allow the sequence to repeat without any further triggers. Once all channels belonging to a Background request source have been converted, a request source completion event is generated. Generation of this event can restart the Background configure sequence. Every request source event will cause a load event to occur. A call to this API would access the register bit field BRSMR.SCAN.
Related APIs:
XMC_VADC_GROUP_BackgroundDisableContinuousMode()
void XMC_VADC_GLOBAL_BackgroundEnableEvent ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Enables the background scan request source event .
By using this API the request source event will be activated for the background scan request source. Other configurations w.r.t service node pointer are not done in this API. A call to this API would configure the register bit field BRSMR.ENSI.
Related APIs:
XMC_VADC_GLOBAL_BackgroundEnableEvent(),
XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode()
void XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Enables the trigger for background scan request source.

By using this API the trigger will be activated for the scan request source. The trigger signal and trigger edge will be selected from the BRSCTRL register. The Selection of a input will be done by XMC_VADC_GLOBAL_BackgroundSelectTrigger(). A call to this API would configure the register bit field BRSMR.ENTR.
Related APIs:
XMC_VADC_GLOBAL_BackgroundSelectTrigger()
XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger()
uint32_t XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns

uint32_t Returns the total channels pending for conversion.
Range: [0x0 to (0x8*number of groups)]
Description:
Returns the number of pending channels.

This API will read the pending channels register and will return the number of channels that are awaiting conversion. When a load event occurs the scan sequence is pushed to a pending conversion register. From the pending register the channels are taken up by the converter. When the API is called it would return the total number of channels pending (BRSPND[grp_num]).
Related APIs:
XMC_VADC_GLOBAL_BackgroundIsChannelPending()
bool XMC_VADC_GLOBAL_BackgroundGetReqSrcEventStatus ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
bool returns true if the service request event is raised. returns false if the service request event was not raised.
Description:
Determines if the request source event is asserted.
This API will get the status of the background scan request source event. Will return a true if the event has occurred for background scan. A call to this API would configure the register bit field GLOBEFLAG.SEVGLB.
Related APIs:
None.
void XMC_VADC_GLOBAL_BackgroundInit | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_BACKGROUND_CONFIG_t * | config
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
config | Pointer to initialization data structure
Description:
Initializes the Background scan functional block.

The BACKGROUND SCAN request source functional block converts channels of all VADC groups that have not been assigned as a priority channel (priority channels can be converted only by queue and scan). Background Scan request source converts the unprioritized channels. Unprioritized channels however can also be used with queue and scan. But a channel which is prioritized can not be used with background request source.
Related APIs:
XMC_VADC_GROUP_BackgroundEnableArbitrationSlot()
XMC_VADC_GROUP_BackgroundDisableArbitrationSlot()
XMC_VADC_GLOBAL_BackgroundSelectTrigger()
XMC_VADC_GLOBAL_BackgroundSelectGating()
bool XMC_VADC_GLOBAL_BackgroundIsChannelPending | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | grp_num,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
grp_num | ID of the VADC group whose unprioritized channels have been assigned to background scan RS
ch_num The channel being audited for completion of conversion
Range: [0x0 to 0x7]
Returns
bool returns true if the channel is pending conversion else returns false
Description:
Determine if the channel is pending.

This API will check if the Channel in question is awaiting conversion in the current arbitration round. When a load event occurs the scan sequence is pushed to a pending conversion register. From the pending register the channels are taken up by the converter. This API would return true if the channel is found in the pending register (BRSPND[grp_num]).
Related APIs:
XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending()
void XMC_VADC_GLOBAL_BackgroundRemoveChannelFromSequence | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | grp_num,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
grp_num | ID of the VADC group whose unprioritized channels have been assigned to background scan Request source
ch_num The unprioritized channel meant to be added to the scan sequence
Range: [0x0 to 0x7]
Returns
None
Description:
Removes a channel to the background scan sequence.

Call this API to insert a new single channel into the background scan request source. This will be added to the scan sequence. The added channel will be part of the conversion sequence when the next load event occurs. A call to this API would configure the register bit fields of BRSSEL.
Related APIs:
XMC_VADC_GLOBAL_BackgroundAddChannelToSequence()
void XMC_VADC_GLOBAL_BackgroundSelectGating | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | input_num
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
input_num | Module input signal meant to be selected as gating input Accepts enum XMC_VADC_GATE_INPUT_SELECT_t
Returns
None
Description:
Select Gating signal for Background request source.

Passage of the trigger input to the request source can be controlled via a gating signal. Any one of the 16 input lines can be chosen as a gating signal. Trigger signal can be given to the Background request source only when the gating signal's active level is detected. Additionally the GxBRSMR.ENGT has to be configured for the gating signal's active level. A call to this API would configure the register bit field BRSCTRL.GTSEL.
Related APIs:
XMC_VADC_GLOBAL_BackgroundSelectTrigger()
void XMC_VADC_GLOBAL_BackgroundSelectTrigger | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | input_num
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
input_num | Choice of the input earmarked as a trigger line Accepts enum XMC_VADC_TRIGGER_INPUT_SELECT_t
Returns
None
Description:
Select Trigger signal for Background request source.

A Background request source will raise conversion request only if there were either a request from application or occurrence of a hardware trigger. This API selects one of the 16 input lines as a trigger line. This is needed when a hardware trigger is needed for the conversion of the Background request source. Refer to the reference manual to determine the signal that needs to be connected. A call to this API would configure the register bit field BRSCTRL.XTSEL.
Related APIs:
XMC_VADC_GLOBAL_BackgroundSelectGating()
XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger()
void XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_TRIGGER_EDGE_t | trigger_edge
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
trigger_edge | Select the trigger edge
Returns
None
Description:
Select Trigger edge for Background request source.

A Background request source will raise conversion request only if there were either a request from application or occurrence of a hardware trigger. This API selects one of the 4 possible values for the trigger edge. This is needed when a hardware trigger is needed for the conversion of the Background request source. A call to this API would configure the register bit field BRSCTRL.XTMODE.
Related APIs:
XMC_VADC_GLOBAL_BackgroundSelectGating()
XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger()
void XMC_VADC_GLOBAL_BackgroundSetGatingMode | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | XMC_VADC_GATEMODE_t | mode_sel
 | ) |  |
Parameters
global_ptr | Pointer to the VADC module
mode_sel | Select how the gating is applied to the background scan request source
Returns
None

Details of function
Selects the gating mode of background request source.

Passage of the trigger input to the request source can be controlled via a gating signal. This API determines how the gating signal behaves, either active low or active high. If gating signal needs to ignored XMC_VADC_GATEMODE_IGNORE should be used as the mode_sel. A call to this API would configure the register bit field BRSMR.ENGT.

Related APIs:
XMC_VADC_GLOBAL_BackgroundSelectGating();
void XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | XMC_VADC_SR_t | sr
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module
sr | The service request to which the global request source event is connected. Refer XMC_VADC_SR_t enum
Returns
None
Description:
Binds the background request source event to one of the 4 shared service requests.

This API binds the background request source event to one of the 4 module wide shared service requests. Sets GLOBEVNP register with the corresponding sr line.
Related APIs:
XMC_VADC_GLOBAL_SetResultEventInterruptNode()
void XMC_VADC_GLOBAL_BackgroundTriggerConversion ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Generates conversion request (Software initiated conversion).

A conversion request can be raised either upon detection of a hardware trigger, or by software. This API forces the scan unit to generate a conversion request to the analog converter. It is assumed that the background scan has already been filled up with entries. A call to this API would set the register bit field BRSMR.LDEV.
Related APIs:
None.
void XMC_VADC_GLOBAL_BackgroundTriggerReqSrcEvent ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Pointer to the VADC module
Returns
None
Description:
Manually asserts the conversion complete request source event.

This API will set the request source event for background scan. This will trigger a interrupt if the service node pointer for the scan has been configured. A call to this API would configure the register bit field GLOBEFLAG.SEVGLB.
Related APIs:
None.
void XMC_VADC_GLOBAL_BindGroupToEMux | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | emuxif,
 |  | const uint32_t | group
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module
emuxif The EMUX interface
Range[0x0 - 0x1]
group | The VADC group which must be bound to the desired emux
Returns
None
Description:
Binds a VADC group to an EMUX interface specified in emuxif.

Selects which group's scan request source will control the EMUX interface (set of control select lines for the EMUX). By passing group it would configure that group's scan request source to control the EMUX select lines of the set emuxif.
Related APIs:
None
void XMC_VADC_GLOBAL_ClearEvent | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | event_type
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module
event_type | Event that must be acknowledged Use the enum XMC_VADC_GLOBAL_EVENT_t to create a mask to be used with this argument
Returns
None
Description:
Acknowledges an event that has been asserted manually or automatically.

This API acknowledges the requested event by clearing GLOBEFLAG sticky flag.
Related APIs:
None
void XMC_VADC_GLOBAL_ClockInit | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_GLOBAL_CLOCK_t * | config
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module.
config | Pointer to the data structure containing clock configuration data
Returns
None
Description:
Configures the VADC clock.

Sets up the clock configuration of the VADC module using the config structure pointed by config. The clock to the analog converter and to the request source arbiter is configured by setting the GLOBCFG register.
Related APIs:
None
void XMC_VADC_GLOBAL_DisableModule ( void )
Parameters
None
Returns
None
Description:
Disables the VADC module.

This API would gate the clock to the VADC module (if applicable). Also this API would put the VADC module into the reset state(if applicable) by asserting the appropriate registers. This API would invoke XMC_SCU_CLOCK_GatePeripheralClock() and XMC_SCU_RESET_AssertPeripheralReset() if needed.
Related APIs:
XMC_VADC_GLOBAL_EnableModule().
void XMC_VADC_GLOBAL_DisableModuleClock ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
None
Description:
Disables the VADC module clock.

After this API call, no conversion will occur. Call XMC_VADC_GLOBAL_EnableModuleClock() to enable the VADC module later in the program.
Related APIs:
XMC_VADC_GLOBAL_Init()
void XMC_VADC_GLOBAL_DisablePostCalibration | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | uint32_t | group_number
 | ) |  |
Parameters
global_ptr Constant pointer to the VADC module
group_number group number whose post calibration feature is to be disabled.
Range[0x0 to 0x3] Accepts the enum XMC_VADC_GROUP_INDEX_t
Returns
None
Description:
Disables the post calibration for a particular group specified as group_number.

It configures the DPCAL0 bit of GLOBCFG register to disable the post calibration feature. Call XMC_VADC_GLOBAL_Enable() and XMC_VADC_GLOBAL_ClockInit() before calling this API in sequence. Calling the API XMC_VADC_GLOBAL_EnablePostCalibration() can enable back the calibration feature at runtime.
Related APIs:
XMC_VADC_GLOBAL_Enable()
XMC_VADC_GLOBAL_ClockInit()
XMC_VADC_GLOBAL_DisablePostCalibration()
None
void XMC_VADC_GLOBAL_DisableSleepMode ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
None
Description:
Ignores the sleep mode request for the VADC.

With the sleep feature enabled, the module will respond to sleep requests by going into a low power mode. It resets the EDIS bit of CLC register for enabling the sleep mode.
Related APIs:
XMC_VADC_GLOBAL_EnableSleepMode().
void XMC_VADC_GLOBAL_DisableStartupCalibration ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
None
Description:
Disables the startup calibration feature of the VADC module.

It configures the SUCAL bit of GLOBCFG register to disable the startup calibration feature. Calling the API XMC_VADC_GLOBAL_EnsableStartupCalibration() can enable the calibration feature at runtime.
Related APIs:
None
void XMC_VADC_GLOBAL_EnableModule ( void )
Parameters
None
Returns
None
Description:
Enables the VADC module.

This API would ungate the clock to the VADC module (if applicable). Also this API would bring the VADC module out of reset state(if applicable), by asserting the appropriate registers. This API would invoke XMC_SCU_CLOCK_UngatePeripheralClock() and XMC_SCU_RESET_DeassertPeripheralReset() if needed. Directly accessed register is COMPARATOR.ORCCTRL (Refer to the errata for XMC1100).
Related APIs:
XMC_VADC_GLOBAL_DisableModule().
void XMC_VADC_GLOBAL_EnableModuleClock ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
None
Description:
Enables the VADC module clock.

Call this API before any further configuration of VADC. It sets the DISR bit of CLC register to enable.
Related APIs:
XMC_VADC_GLOBAL_Init()
void XMC_VADC_GLOBAL_EnablePostCalibration | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | uint32_t | group_number
 | ) |  |
Parameters
global_ptr Constant pointer to the VADC module
group_number group number whose post calibration feature is to be enabled.
Range[0x0 to 0x3] Accepts the enum XMC_VADC_GROUP_INDEX_t
Returns
None
Description:
Enables the post calibration for a particular group specified as group_number.

It configures the DPCAL0 bit of GLOBCFG register to enable the post calibration feature. Calling the API XMC_VADC_GLOBAL_DisablePostCalibration() can disable the calibration feature at runtime.
Related APIs:
XMC_VADC_GLOBAL_DisablePostCalibration()
None
void XMC_VADC_GLOBAL_EnableSleepMode ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
None
Description:
Enables VADC module to sleep if a sleep request comes.

It resets the EDIS bit of CLC register for enabling the sleep mode.
Related APIs:
XMC_VADC_GLOBAL_DisableSleepMode().
XMC_VADC_FAST_COMPARE_t XMC_VADC_GLOBAL_GetCompareResult ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module
Returns
compare high or low. Refer XMC_VADC_FAST_COMPARE_t enum
None
Description:
Determines the result of fast compare operation.

This API returns the result of fast compare operation provided the valid flag in the global result register GLOBRES is set.
Related APIs:
None
uint32_t XMC_VADC_GLOBAL_GetDetailedResult ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
uint32_t Complete global result register value GLOBRES
Description:
Retrieves the complete result from the global result register associated with the global_ptr.

This API audits the result register GLOBRES for the validity of the data. If the validity is assured, data is first read the global result register, cached locally next and subsequently returned to the caller.
Related APIs:
XMC_VADC_GLOBAL_GetResult()
XMC_VADC_RESULT_SIZE_t XMC_VADC_GLOBAL_GetResult ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
XMC_VADC_RESULT_SIZE_t 16 bit result register value.
Range[0x0 - 0X0FFF]
Description:
Retrieves the conversion result from the global result register associated with the global_ptr.

This is a lightweight version of XMC_VADC_GLOBAL_GetDetailedResult(). The behavior is exactly the same, just that it is only the 16 bit numeric result returned back to the application instead of the complete GLOBRES register value.
Related APIs:
XMC_VADC_GLOBAL_GetDetailedResult()
void XMC_VADC_GLOBAL_Init | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_GLOBAL_CONFIG_t * | config
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module.
config | Pointer to initialization data structure
Returns
None
Description:
Initializes the VADC global module with the associated configuration structure pointed by config.

It enables the global access to registers by configuring reset and clock un-gating for selected devices. It initializes global class, boundary , result resources by setting GLOBICLASS,GLOBBOUND,GLOBRCR registers. It also configures the global analog and digital clock dividers by setting GLOBCFG register. Refer related API's to change the configurations later in the program.
Related APIs:
XMC_VADC_GLOBAL_ClockInit()
void XMC_VADC_GLOBAL_InputClassInit | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_GLOBAL_CLASS_t | config,
 |  | const XMC_VADC_GROUP_CONV_t | conv_type,
 |  | const uint32_t | set_num
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module.
config | Conversion class parameter structure
conv_type | configure the input call for either standard conversion or EMUX related conversion.
set_num Conversion class set
Range: [0x0, 0x1]
Description:
Configures the ADC conversion settings like sample time and resolution.

Sets up the conversion settings for vadc global resource associated with config structure. It configures the conversion class properties like sampling time and resolution for selected conv_type channels. It initializes the GLOBALICLASS register specified by set_num with the required settings.
Related APIs:
None
void XMC_VADC_GLOBAL_ResultInit | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_RESULT_CONFIG_t * | config
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC global module
config | Pointer to result configuration data structure
Returns
None
Description:
Initializes global result register.

Initializes Global Result Register with specified settings configured in the config structure.

This API results in configuration of GLOBRCR register. This helps in configuring the Data reduction mode, global result event , wait for read mode on the GLOBRES register.
Related APIs:
None
void XMC_VADC_GLOBAL_SetBoundaries | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | boundary0,
 |  | const uint32_t | boundary1
 | ) |  |
Parameters
global_ptr Constant pointer to the VADC module.
boundary0 Boundary-0 Value
Range[0 - 4095]
boundary1 Boundary-1 Value
Range[0 - 4095]
Returns
None
Description:
Programs the boundaries with boundary0 and boundary1 for result comparison.

These two boundaries can serve as absolute boundaries. They define a range against which the result of a conversion can be compared. In the fast compare mode, the two boundaries provide hysteresis capability to a compare value. In any case, these boundary values entered here form a boundary pallete. There are dedicated upper and lower boundary registers GLOBBOUND0 and GLOBBOUND1 who will derive their values from this palette.
Related APIs:
None
void XMC_VADC_GLOBAL_SetCompareValue | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_RESULT_SIZE_t | compare_val
 | ) |  |
Parameters
global_ptr Constant pointer to the VADC module
compare_val Compare value which the result of a conversion will be compared against.
Range[0x0 - 0X0FFF]
Returns
None
Description:
Set compare value in the global result register for fast compare mode.

The result of a conversion will directly be compared to the compare value entered as part of compare_val. The prerequisite is that the channel associated with this global register must select an ICLASS which has the conversion mode configured as fast compare mode. Call XMC_VADC_GLOBAL_GetCompareResult() after this API to
Related APIs:
None
void XMC_VADC_GLOBAL_SetIndividualBoundary | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const XMC_VADC_CHANNEL_BOUNDARY_t | selection,
 |  | const uint16_t | boundary_value
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module.
selection | The boundary value selected for boundary_value.
boundary_value Boundary Value
Range[0 - 4095]
Returns
None
Description:
Programs either the boundary 0 or boundary 1 for result comparison.

This defines a range against which the result of a conversion can be compared. In the fast compare mode, the two boundaries provide hysteresis capability to a compare value.
Related APIs:
None
void XMC_VADC_GLOBAL_SetResultEventInterruptNode | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | XMC_VADC_SR_t | sr
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module
sr | The service request to which the global result event is connected. Refer XMC_VADC_SR_t enum
Returns
None
Description:
Binds the global result event to one of the 4 shared service requests.

This API binds the global result event to one of the 4 module wide shared service requests .Sets GLOBEVNP register with the corresponding sr line.
Related APIs:
XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode()
void XMC_VADC_GLOBAL_SHS_DisableSigmaDeltaLoop | ( | XMC_VADC_GLOBAL_SHS_t *const | shs_ptr,
 |  | XMC_VADC_SHS_LOOP_CH_t | loop_select
 | ) |  |
Parameters
shs_ptr | Constant pointer to the VADC Sample and hold module
loop_select | The delta sigma loop number for which the configurations applies
Returns
None
Description:
Disable the selected delta sigma loop.

Configures the SHS_LOOP.LPENx bit field.
Related APIs:
XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop()
. XMC_VADC_GLOBAL_SHS_EnableGainAndOffsetCalibrations()
.
void XMC_VADC_GLOBAL_SHS_EnableSigmaDeltaLoop | ( | XMC_VADC_GLOBAL_SHS_t *const | shs_ptr,
 |  | XMC_VADC_SHS_LOOP_CH_t | loop_select
 | ) |  |
Parameters
shs_ptr | Constant pointer to the VADC Sample and hold module
loop_select | The delta sigma loop number for which the configurations applies
Returns
None
Description:
Enable the selected Delta-Sigma loop.

Configures the SHS_LOOP.LPENx bit field.
Related APIs:
XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop()
. XMC_VADC_GLOBAL_SHS_EnableGainAndOffsetCalibrations()
.
void XMC_VADC_GLOBAL_SHS_Init | ( | XMC_VADC_GLOBAL_SHS_t *const | shs_ptr,
 |  | const XMC_VADC_GLOBAL_SHS_CONFIG_t * | config
 | ) |  |
Parameters
shs_ptr | Constant pointer to the VADC Sample and hold module
config | Struct consisting of various SHS related configurations.
Returns
None
Description:
Configure the basic SHS parameters.

API would initialize the clock divider configuration, the analog reference selection and the calibration order for the Sample and Hold unit.
Related APIs:
None.
bool XMC_VADC_GLOBAL_SHS_IsConverterReady ( XMC_VADC_GLOBAL_SHS_t *const shs_ptr )
Parameters
shs_ptr Constant pointer to the VADC Sample and hold module
Returns
bool returns true if the analog converter is operable returns false if the analog converter is powered down
Description:
Returns the converter status.

Returns the ANRDY bit field of the SHSCFG register.
Related APIs:
None.
void XMC_VADC_GLOBAL_SHS_SetAnalogReference | ( | XMC_VADC_GLOBAL_SHS_t *const | shs_ptr,
 |  | const XMC_VADC_GLOBAL_SHS_AREF_t | aref
 | ) |  |
Parameters
shs_ptr | Constant pointer to the VADC Sample and hold module
aref | Analog reference used for conversions. Refer XMC_VADC_GLOBAL_SHS_AREF_t enum
Returns
None
Description:
Selection of the reference voltage that is required for conversions (VREF).
Related APIs:
None.
void XMC_VADC_GLOBAL_SHS_SetClockDivider | ( | XMC_VADC_GLOBAL_SHS_t *const | shs_ptr,
 |  | uint8_t | divs_value
 | ) |  |
Parameters
shs_ptr Constant pointer to the VADC Sample and hold module
divs_value The clock divider value that is possible
Range:[0x0 to 0xF]
Returns
None
Description:
Configure Sample and hold clock divider value.

API would initialize the clock divider configuration. This determines the frequency of conversion of the Sample and hold converter.
Related APIs:
None.
void XMC_VADC_GLOBAL_SHS_SetGainFactor | ( | XMC_VADC_GLOBAL_SHS_t *const | shs_ptr,
 |  | uint8_t | gain_value,
 |  | XMC_VADC_GROUP_INDEX_t | group_num,
 |  | uint8_t | ch_num
 | ) |  |
Parameters
shs_ptr | Constant pointer to the VADC Sample and hold module
gain_value | gain value possible Range:[0x0 to 0x3]
group_num | The Group number for which the configurations applies
ch_num | The channel number for which the gain has to be configured
Returns
None
Description:
Configure the gain value for SHS.

API would set the gain factor for a selected channel.
Related APIs:
None.
void XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop | ( | XMC_VADC_GLOBAL_SHS_t *const | shs_ptr,
 |  | XMC_VADC_GROUP_INDEX_t | group_num,
 |  | XMC_VADC_SHS_LOOP_CH_t | loop_select,
 |  | uint8_t | ch_num
 | ) |  |
Parameters
shs_ptr | Constant pointer to the VADC Sample and hold module
group_num | The Group number for which the configurations applies
loop_select | The delta sigma loop number for which the configurations applies
ch_num | Channel number for which the configurations applies
Returns
None
Description:
Configures the delta sigma loop of the SHS.

There are 2 Delta-Sigma loops that can be configured. This API would configure the loop (loop_select) with the appropriate group_num and channel_num. Configures the SHS_LOOP bit fields.
Related APIs:
XMC_VADC_GLOBAL_SHS_EnableSigmaDeltaLoop()
.
void XMC_VADC_GLOBAL_StartupCalibration ( XMC_VADC_GLOBAL_t *const global_ptr )
Parameters
global_ptr Constant pointer to the VADC module.
Returns
None
Description:
Enables the startup calibration feature of the VADC module.

It configures the SUCAL bit of GLOBCFG register to enable the startup calibration feature. After turning it on, it loops until all active groups finish calibration. Call XMC_VADC_GLOBAL_Enable() and XMC_VADC_GLOBAL_ClockInit() before calling this API in sequence. Calling the API XMC_VADC_GLOBAL_DisableStartupCalibration() can disable the calibration feature at runtime.
Related APIs:
XMC_VADC_GLOBAL_Enable()
XMC_VADC_GLOBAL_ClockInit()
None
void XMC_VADC_GLOBAL_TriggerEvent | ( | XMC_VADC_GLOBAL_t *const | global_ptr,
 |  | const uint32_t | event_type
 | ) |  |
Parameters
global_ptr | Constant pointer to the VADC module
event_type | Desired event that must be manually asserted Use the enum XMC_VADC_GLOBAL_EVENT_t to create a mask to be used with this argument
Returns
None
Description:
Manually asserts an event that can lead to an interrupt.

This API manually asserts the requested event (Background request source event or a global result event) by setting the GLOBEVFLAG register with the specified event_type.
Related APIs:
None
void XMC_VADC_GROUP_AddResultToFifo | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Register which is required to be a part of results FIFO
Range: [0x0 to 0xF]
Returns
None
Description:
Adds result register to Result FIFO.

Sometimes, the rate of consumption of results by application software may not match the rate at which the results are produced. A Result FIFO thus helps a slow consumer to read out results without loss of data. When a result register is added to fifo, it is in fact chained to its higher numbered neighbor. For example, if Result Register-5 is to be added to FIFO, it gets chained to Result Register-6. Results are written to Register-6 while the same can be read out of Register-5 leisurely by software. A call to this API would configure the register bit field GxRCR.FEN.
Note:
The FIFO is always read by the software with the lowest numbered result register. The hardware will write the results from the highest numbered result register.
Related APIs:
None.
void XMC_VADC_GROUP_BackgroundDisableArbitrationSlot ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group which may receive a conversion request from background request source
Returns
None
Description:
Disables arbitration slot of the Background request source.

If the Background request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the Background channel can only be converted when the arbiter comes to the Background slot.A call to this API will lead to all conversions request by Background to be blocked. A call to this API would configure the register bit field GxARBPR.ASEN2
Related APIs:
XMC_VADC_GROUP_BackgroundEnableArbitrationSlot()
void XMC_VADC_GROUP_BackgroundEnableArbitrationSlot ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group which may receive a conversion request from background request source
Returns
None
Description:
Enables arbitration slot of the Background request source.

If the Background request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the Background channel can only be converted when the arbiter comes to the Background slot. Thus this must be enabled if any conversion need to take place. A call to this API would configure the register bit field GxARBPR.ASEN2.
Related APIs:
XMC_VADC_GROUP_BackgroundDisableArbitrationSlot()
void XMC_VADC_GROUP_ChannelClearEvent | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num Channel whose channel event is to be acknowledged
Range: [0x0 to 0x7]
Returns
None
Description:
Acknowledges a Channel event.

When a channel event is raised after the conversion of that channel, it has to be cleared. This API would clear the Channel event of a particular channel if it has occurred. A call to this API would configure the register bit fields of GxCEFCLR.
Related APIs:
XMC_VADC_GROUP_ChannelTriggerEvent().
uint32_t XMC_VADC_GROUP_ChannelGetAssertedEvents ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
uint32_t returns the asserted channel events
Description:
Returns the Channel event flag register.

The return is merely the channel events which are asserted. A call to this API would read the register bit fields of GxCEFLAG.
Related APIs:
XMC_VADC_GROUP_ChannelClearEvent().
XMC_VADC_CHANNEL_CONV_t XMC_VADC_GROUP_ChannelGetInputClass | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num Channel whose result alignment is to be returned
Range: [0x0 to 0x7]
Returns
XMC_VADC_CHANNEL_CONV_t Returns the configured input class for the ch_num
Description:
Returns the channel's input class for conversion for the required channel.

The sampling time and resolution can be taken from any of the 4 possible Input class registers. This API would return the input class register that is taken up by ch_num for conversion. A call to this API would read the register bit field GxCHCTR.RESPOS.
Related APIs:
XMC_VADC_GROUP_ChannelSetIclass().
XMC_VADC_RESULT_ALIGN_t XMC_VADC_GROUP_ChannelGetResultAlignment | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num Channel whose result alignment is to be returned
Range: [0x0 to 0x7]
Returns
XMC_VADC_RESULT_ALIGN_LEFT if the result are aligned to the left XMC_VADC_RESULT_ALIGN_RIGHT if the result are aligned to the right
Description:
Returns the channel result alignment.

The results are aligned either to the left or to the right. A left aligned 10bit resolution has its LSB at bit2 where as a left aligned 8bit resolution starts at bit4. A call to this API would return the currently configured alignment value. A call to this API would read the register bit field GxCHCTR.RESPOS.
Related APIs:
None.
uint8_t XMC_VADC_GROUP_ChannelGetResultRegister | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num Channel whose associated result register is to be found
Range: [0x0 to 0x7]
Returns
uint8_t returns the Group result register to which it is linked to.
Range: [0x0 to 0xF]
Description:
Returns the result register associated with this channel.

There are upto 16 result registers which a channel can choose from to store the results of conversion. This returns only the group related result registers. A call to this API would access the register bit field GxCHCTR.RESREG.
Related APIs:
None.
void XMC_VADC_GROUP_ChannelInit | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | const XMC_VADC_CHANNEL_CONFIG_t * | config
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num The channel being initialized
Range: [0x0 to 0x7]
config | Pointer to initialization data
Returns
None
Description:
Initializes the ADC channel for conversion.

This API will do the channel related initializations. This includes configuration of the CHCTR settings and boundary flag settings. This must be called in the application in order to enable the conversion of a channel. After a request source has been initialized this API has to be called for each channel that has to be converted. A call to this API would configure the registers GxCHCTR GxBFL GxALIAS GxCHASS GxBFLC(depending on device) in order to configure the channel.
Related APIs:
None.
bool XMC_VADC_GROUP_ChannelIsResultOutOfBounds | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num Channel whose input was converted
Range: [0x0 to 0x7]
Returns
bool Returns true if there was violation w.r.t the specified boundaries.
Description:
Determines if the result of the channel confines with the specified boundaries.

An application may not necessarily always need to know the exact value of the converted result, but merely an indication if the generated result is within stipulated boundaries. Generation of Channel event can be subject to channel event generation criteria (Generate always, Never generate, Generate if result is out of bounds, Generate if result is within bounds). When interrupts are not enabled, this API can be used to determine the nature of the result. A call to this API would access the registers GxCHCTR and GxCEFLAG in order to determine if a violation has occured.
Related APIs:
None
void XMC_VADC_GROUP_ChannelSetBoundarySelection | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | XMC_VADC_BOUNDARY_SELECT_t | boundary_sel,
 |  | XMC_VADC_CHANNEL_BOUNDARY_t | selection
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num Channel whose channel event is being configured
Range: [0x0 to 0x7]
boundary_sel | Select the upper/lower boundary configuration .
selection | The boundary value selected for boundary_sel.
Returns
None
Description:
Configure the boundary selection for the given channel

The channel event can be generated under the following conditions - Always, Never, Result Out of bounds and Result inside the boundaries. The boundary values to which results are compared can be selected from several sources. A call to this API would configure the register bit field GxCHCTR.BNDSELL or GxCHCTR.BNDSELU .
Related APIs:
None.
void XMC_VADC_GROUP_ChannelSetEventInterruptNode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | const XMC_VADC_SR_t | sr
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num Channel whose channel event is to be connected to a service request line
Range: [0x0 to 0x7]
sr | The service request line to which the channel event is to be connected
Returns
None
Description:
Binds a channel event to a requested Service Request line.

The channel event is connected to a service request line. For an event to result in an interrupt, this service request line must be enabled in VADC and the NVIC node which this service request line is connected to must have interrupt generation enabled. A call to this API would configure the register bit fields of GxCEVNP0.
Related APIs:
XMC_VADC_GROUP_ChannelTriggerEvent()
XMC_VADC_GROUP_ChannelClearEvent()
void XMC_VADC_GROUP_ChannelSetIclass | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | const XMC_VADC_CHANNEL_CONV_t | conversion_class
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num Channel whose conversion class is to be configured
Range: [0x0 to 0x7]
conversion_class | conversion property to be associated with this channel
Returns
None
Description:
Selects the conversion class registers.

It configures the channel to have a particular conversion class properties like sampling time and resolution. A call to this API would configure the register bit field GxCHCTR.ICLSEL.
Related APIs:
XMC_VADC_GROUP_ChannelGetInputClass().
void XMC_VADC_GROUP_ChannelSetInputReference | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | const XMC_VADC_CHANNEL_REF_t | ref
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num Channel whose input is to be converted
Range: [0x0 to 0x7]
ref | Reference voltage
Returns
None
Description:
Selects the reference voltage for conversion.

An internal voltage reference (VARef) or an external voltage reference fed to Ch-0 can serve as a voltage reference for conversions. A call to this API would configure the register bit field GxCHCTR.REFSEL.
Related APIs:
None.
void XMC_VADC_GROUP_ChannelSetResultRegister | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | const uint32_t | result_reg_num
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num Channel whose i/p is to be converted
Range: [0x0 to 0x7]
result_reg_num | Result Register associated with this channel
Returns
None
Description:
Selects the target result register.

There are upto 16 result registers which a channel can choose from to store the results of conversion. This selects only the group related result registers. A call to this API would configure the register bit field GxCHCTR.RESREG.
Related APIs:
None.
void XMC_VADC_GROUP_ChannelTriggerEvent | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num Channel whose channel event is to be asserted
Range: [0x0 to 0x7]
Returns
None
Description:
Manually asserts a Channel event.

It is merely the channel event which is asserted. For this asserted event to lead to an interrupt, it must have been bound to an SR and that SR must have been enabled. It can potentially lead to an interrupt if the SR line is connected to an NVIC node. A call to this API would configure the register bit fields of GxCEFLAG.
Related APIs:
XMC_VADC_GROUP_ChannelClearEvent().
void XMC_VADC_GROUP_ChannelTriggerEventGenCriteria | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num,
 |  | const XMC_VADC_CHANNEL_EVGEN_t | criteria
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
ch_num Channel whose channel event is being configured
Range: [0x0 to 0x7]
criteria | The condition under which the channel may assert its channel event
Returns
None
Description:
Defines the conditions under which a channel may assert its channel event.

The channel event can be generated under the following conditions - Always, Never, Result Out of bounds and Result inside the boundaries. A call to this API would configure the register bit field GxCHCTR.CHEVMODE.
Related APIs:
XMC_VADC_GROUP_ChannelTriggerEvent()
XMC_VADC_GROUP_ChannelClearEvent()
XMC_VADC_GROUP_ChannelSetEventInterruptNode()
void XMC_VADC_GROUP_CheckSlaveReadiness | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | uint32_t | slave_group
 | ) |  |
Parameters
group_ptr Pointer to the master VADC Group
slave_group The slave VADC Group number
Range: [0x0 to 0x3]
Returns
None
Description:
Configures the ready signal for master group.

This API would read the slave_group number and determine which EVAL configuration to apply for the given master slave set. Checks the readiness of slaves in synchronized conversions. Conversion of identically numbered channels across groups can be synchronized. For example, when the trigger to convert CH-1 of Group-2 is received, it is possible to simultaneously request conversion of CH-1 of Group-0 and Group-3. Group-2 in this example is therefore the master group while Groups-0 and 3 are the slave groups. Before the master can request its slaves for synchronized conversion, it has the option of checking the readiness of the slaves.
Related APIs:
XMC_VADC_GROUP_IgnoreSlaveReadiness()
XMC_VADC_GROUP_SetSyncMaster()
void XMC_VADC_GROUP_ClearResultEvent | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register for which the result event is being acknowledged
Range: [0x0 to 0xF]
Returns
None
Description:
Acknowledges a Result event.

When a Result event is raised after the conversion of that associated channel has produced a result and it has to be cleared. This API would clear the Channel event of a particular channel if it has occurred. A call to this API would access the register bit fields of GxREFCLR.
Related APIs:
XMC_VADC_GROUP_ChannelTriggerEvent().
void XMC_VADC_GROUP_DisableChannelSyncRequest | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr | Pointer to the master VADC Group
ch_num | Channel whose conversion triggers conversion in slave groups
Returns
None
Description:
Disable the synchronization request for the particular channel specified as ch_num. To enable the synchronization call the API XMC_VADC_GROUP_EnableChannelSyncRequest().
Related APIs:
None
void XMC_VADC_GROUP_DisableResultEvent | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register for which event generation is to be disabled
Range: [0x0 to 0xF]
Returns
None
Description:
Disable result event generation.

This would just disable the event. It would not alter anything w.r.t the SR line if it was configured. A call to this API would configure the register bit field GxRCR.SRGEN.
Related APIs:
XMC_VADC_GROUP_EnableResultEvent().
void XMC_VADC_GROUP_EnableChannelSyncRequest | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr | Constant pointer to the master VADC Group
ch_num | Channel whose conversion triggers conversion in slave groups
Returns
None
Description:
Sets up a channel for synchronized conversion.

Conversion of identically numbered channels across groups can be synchronized. For example, when the trigger to convert CH-1 of Group-2 is received, it is possible to simultaneously request conversion of CH-1 of Group-0 and Group-3. Group-2 in this example is therefore the master group while Groups-0 and 3 are the slave groups.
Before the master can request its slaves for synchronized conversion, it has the option of checking the readiness of the slaves.
Related APIs:
None
void XMC_VADC_GROUP_EnableResultEvent | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register for which event generation is to be enabled
Range: [0x0 to 0xF]
Returns
None
Description:
Enables result event generation.

Once the results of conversion are available, the result event (which is being enabled in this function) if connected to a service request line(Group or Shared service request) can lead to an interrupt. It is therefore not only necessary to enable the event, but also to connect it to a service request line. The service request generation capability must also be enabled and so should the corresponding NVIC node. A call to this API would configure the register bit field GxRCR.SRGEN.
Related APIs:
XMC_VADC_GROUP_SetResultInterruptNode().
void XMC_VADC_GROUP_ExternalMuxControlInit | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_GROUP_EMUXCFG_t | emux_cfg
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
emux_cfg | EMUX configuration structure
Returns
None
Description:
Configures group EMUX parameters associated with the emux_cfg configuration structure.

An external emux interface allows additional channels to be connected to a VADC group. The conversion properties of such channels can be different from the standard channels which are directly connected to the VADC group. This API configures conversion properties of channels connected via EMUX interface.
Related APIs:
None
uint32_t XMC_VADC_GROUP_GetAlias ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
uint32_t The complete GxALIAS register
Description:
Returns the ALIAS values.
The ALIAS value that is configured for Channel-0 and channel-1 are returned.
Related APIs:
None.
uint32_t XMC_VADC_GROUP_GetAssertedResultEvents ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
uint32_t returns the asserted result events
Description:
Returns the Result event flag register.

The return is merely the result events which are asserted. A call to this API would read the register bit fields of GxREFLAG.
Related APIs:
XMC_VADC_GROUP_TriggerResultEvent().
uint32_t XMC_VADC_GROUP_GetDetailedResult | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register from which the result of conversion is to be read out
Range: [0x0 to 0xF]
Returns
uint32_t returns the complete result register GxRESy.
Description:
Returns the result register completely (result of conversion as well as other info).

The Result register will have information regarding the channel that is requesting the conversion, if the result is valid, if the fast compare bit, Data Reduction Counter, and the request source information. All these information will be returned back. And if the user is polling for the result he can use the result if the valid bit is set. A call to this API would return the complete register GxRES.
Related APIs:
XMC_VADC_GROUP_GetResult().
XMC_VADC_FAST_COMPARE_t XMC_VADC_GROUP_GetFastCompareResult | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register for which the compare value is being set
Range: [0x0 to 0xF]
Returns
XMC_VADC_FAST_COMPARE_t If the input is greater or lower than the compare value returns the appropriate enum. if the valid flag was not set then it would return XMC_VADC_FAST_COMPARE_UNKNOWN.
Description:
Determines the input is greater/lower than the compare value.

This API determines if the input is greater/lower than the preset compare value. A call to this API would access the register bit field GxRES.FCM.
Related APIs:
XMC_VADC_GROUP_SetResultFastCompareValue().
XMC_VADC_GROUP_CLASS_t XMC_VADC_GROUP_GetInputClass | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_CHANNEL_CONV_t | conv_class
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
conv_class | conversion property to be extracted
Returns
XMC_VADC_GROUP_CLASS_t The complete GxICLASSy register
Description:
Returns the input class configuration values.
This returns the sampling time configuration and resolution configured in the appropriate group input class conv_class. A call to this API would return the register GxICLASSy.
Related APIs:
None.
XMC_VADC_RESULT_SIZE_t XMC_VADC_GROUP_GetResult | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register from which the result of conversion is to be read out
Range: [0x0 to 0xF]
Returns
XMC_VADC_RESULT_SIZE_t Result register values.
Range:0x0 to 0xFFF
Description:
Returns the result of the conversion.

This API will only return the result of the conversion and will strip out the other information that is present in the result register. A call to this API would access the register bit field GxRES.RESULT.
Related APIs:
XMC_VADC_GROUP_GetDetailedResult().
uint32_t XMC_VADC_GROUP_GetResultFifoHead | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register which forms a part of fifo
Range: [0x0 to 0xF]
Returns
uint32_t returns the Result register number which is the head of the FIFO,res_reg is apart of this FIFO.
Description:
Returns the the FIFO head (register to which the results are written by H/W).

The analog converter writes to the head of the FIFO. It is the head of the FIFO which is bound to the channel. Applications read the result from the tail of the FIFO. This API would just return the head of the FIFO from where the results are being added to the FIFO. A call to this API would access the register bit field GxRCR.FEN.
Related APIs:
XMC_VADC_GROUP_GetResultFifoHead()
uint32_t XMC_VADC_GROUP_GetResultFifoTail | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register which forms a part of FIFO
Range: [0x0 to 0xF]
Returns
uint32_t returns the Result register number which is the tail of the FIFO,res_reg is apart of this FIFO.
Description:
Returns the the FIFO tail (register from where to read the results).

The analog converter writes to the head of the FIFO. It is the head of the FIFO which is bound to the channel. Applications read the result from the tail of the FIFO. This API would return the result register from where a user can call the API XMC_VADC_GROUP_GetResult() to read the result stored in the FIFO. A call to this API would access the register bit field GxRCR.FEN.
Related APIs:
XMC_VADC_GROUP_GetResultFifoHead()
uint32_t XMC_VADC_GROUP_GetSyncReadySignal ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant Pointer to the VADC Group
Returns
uint32_t EVAL bits for the group
Description:
Get the Eval bits of the group.

For Synchronized conversion the master's ready signal configuration must be copied onto the slaves. A call to this API would return the Sync EVAL Bits (GxSYNCTR.EVALy) which can be used to set in the slaves.
Related APIs:
XMC_VADC_GROUP_CheckSlaveReadiness()
XMC_VADC_GROUP_IgnoreSlaveReadiness()
void XMC_VADC_GROUP_IgnoreSlaveReadiness | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | uint32_t | slave_group
 | ) |  |
Parameters
group_ptr | Constant Pointer to the master VADC Group
slave_group | The slave VADC Group number
Returns
None
Description:
Clears the ready signal for master group.

Ignores the readiness of slaves in synchronized conversions.This API would read the slave_group number and determine which EVAL configuration to apply for the given master slave set. Then clears the configuration if present. This API is called when the master should issue the conversion request without waiting for the slave to assert a ready signal. The ready signal is asserted by the slave group(s) when the conversion is completed in these channels.
Related APIs:
XMC_VADC_GROUP_CheckSlaveReadiness()
XMC_VADC_GROUP_SetSyncMaster()
void XMC_VADC_GROUP_Init | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_GROUP_CONFIG_t * | config
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group.
config | Pointer to the initialization data structure
Returns
None
Description:
Initializes the VADC group module with the associated configuration structure pointed by config.

It initializes the group specified as part of the group_ptr. It initializes group conversion class, arbiter configuration , boundary configuration by setting GxICLASS,GxARBCFG,GxBOUND, registers. It also configures the EMUX control register if applicable. Refer related API's to change the configurations later in the program.
Related APIs:
XMC_VADC_GROUP_InputClassInit()
XMC_VADC_GROUP_SetPowerMode()
XMC_VADC_GROUP_SetBoundaries()
XMC_VADC_GROUP_ExternalMuxControlInit()
void XMC_VADC_GROUP_InputClassInit | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_GROUP_CLASS_t | config,
 |  | const XMC_VADC_GROUP_CONV_t | conv_type,
 |  | const uint32_t | set_num
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group.
config | group related conversion class parameter structure
conv_type | Use direct channels or EMUX channels. Refer XMC_VADC_GROUP_CONV_t enum
set_num Conversion class set
Range[0x0, 0x1]
Returns
None
Description:
Sets up the conversion settings for vadc group resource associated with config structure. It configures the conversion class properties like sampling time and resolution for selected conv_type channels. It initializes the G_ICLASS register specified by set_num with the required settings.
Related APIs:
XMC_VADC_GROUP_Init()
XMC_VADC_GROUP_STATE_t XMC_VADC_GROUP_IsConverterBusy ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group.
Returns
retuns IDLE if converter is free else returns busy. Refer XMC_VADC_GROUP_STATE_t enum
Description:
Checks the live status of the analog to digital converter. The converter can either idle doing nothing or busy sampling + converting.
Related APIs:
None
bool XMC_VADC_GROUP_IsResultRegisterFifoHead | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register in question
Range: [0x0 to 0xF]
Returns
bool returns true if the res_reg is the FIFO head.
Description:
Determines if the requested register is the head of a FIFO.

The analog converter writes to the head of the FIFO. It is the head of the FIFO which is bound to the channel. Applications read the result from the tail of the FIFO. A call to this API would access the register bit field GxRCR.FEN.
Related APIs:
XMC_VADC_GROUP_GetResultFifoHead()
bool XMC_VADC_GROUP_IsResultRegisterInFifo | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register number

Range: [0x0 to 0xF]
Returns
bool returns true if the res_reg is the FIFO member, else false.
Description:
Determines whether the specified register is a FIFO member or not.

The analog converter writes to the head of the FIFO. It is the head of the FIFO which is bound to the channel. Applications read the result from the tail of the FIFO. A call to this API would access the register bit field GxRCR.FEN.
void XMC_VADC_GROUP_QueueAbortSequence ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Aborts an ongoing conversion by flushing the queue.

This API will flush the queue buffer. Ongoing conversion of the Queue request source will not be effected by this API. This would clear all the contents that are present in the queue buffer. A call to this API would configure the registers GxQCTRL0, GxQMR0, GxARBPR in order to abort the queue sequence.
Related APIs:
XMC_VADC_GROUP_QueueRemoveChannel()
XMC_VADC_GROUP_QueueFlushEntries()
void XMC_VADC_GROUP_QueueClearReqSrcEvent ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Acknowledges the conversion complete request source event.

This API will clear the request source event that occurred. This will clear a interrupt if it was raised. A call to this API would configure the register bit field GxSEFCLR.SEV0.
Related APIs:
XMC_VADC_GROUP_QueueTriggerReqSrcEvent()
void XMC_VADC_GROUP_QueueDisableArbitrationSlot ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Disables arbitration slot of the queue request source.

If the QUEUE request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the queue channel can only be converted when the arbiter comes to the queue slot.A call to this API will lead to all conversions request by queue to be blocked. A call to this API would configure the register bit field GxARBPR.ASEN0.
Related APIs:
XMC_VADC_GROUP_QueueEnableArbitrationSlot()
void XMC_VADC_GROUP_QueueDisableExternalTrigger ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Disables the trigger for queue request source.
By using this API the trigger will be deactivated for the queue request source. This will just deactivate the H/W trigger for the queue request source. If any configuration was done to select the trigger input in GxQCTRL0 will be not be effected. A call to this API would configure the register bit field GxQMR0.ENTR
Related APIs:
XMC_VADC_GROUP_QueueEnableExternalTrigger()
void XMC_VADC_GROUP_QueueEnableArbitrationSlot ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Enables arbitration slot of the queue request source.

If the QUEUE request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the queue channel can only be converted when the arbiter comes to the queue slot. Thus this must be enabled if any conversion need to take place. A call to this API would configure the register bit field GxARBPR.ASEN0.
Related APIs:
XMC_VADC_GROUP_QueueDisableArbitrationSlot()
void XMC_VADC_GROUP_QueueEnableExternalTrigger ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Enables the trigger for queue request source.

By using this API the trigger will be activated for the queue request source. The trigger signal and trigger edge will be selected from the QCTRL register. The Selection of a input will be done by XMC_VADC_GROUP_QueueSelectTrigger(). A call to this API would configure the register bit field GxQMR0.ENTR
Related APIs:
XMC_VADC_GROUP_QueueSelectTrigger()
XMC_VADC_GROUP_QueueDisableExternalTrigger()
void XMC_VADC_GROUP_QueueFlushEntries ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Flushing the queue Entry.

This API will flush one entry in the queue buffer. Ongoing conversion of the Queue request source will not be effected by this API. This would clear all the contents that are present in the queue buffer. A call to this API would configure the registers GxQMR0. This is a Blocking API, i.e will only exit when all the entries are removed from the queue.
Related APIs:
XMC_VADC_GROUP_QueueRemoveChannel()
XMC_VADC_GROUP_QueueAbortSequence(0
int32_t XMC_VADC_GROUP_QueueGetInterruptedChannel ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
int32_t Returns -1 if there is no channel that have been interrupted. Else would return the channel that is interrupted.
Range: [0x0 to 0x8]
Description:
Identifies the channel whose conversion was suspended.

When using cancel inject repeat mode the canceled conversion will be placed in the backup register. This API will return the valid queue channel number from the backup register. This happens when ever there is a high priority conversion interrupts the conversion of queue request source. This forces the channel to goto the backup register. A call to this API would access the register GxQBUR0 to determine the interrupted channel.
Related APIs:
None.
uint32_t XMC_VADC_GROUP_QueueGetLength ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
uint32_t returns the total number of channels.
Range: [0x0 to 0x8]
Description:
Returns the number of channels present in the queue.

This API will return the queue buffer size. This buffer will be consisting of valid queue entries which will be converted when a trigger event occurs. All the entries that are loaded onto the GxQINR0 will be added to the queue buffer. Hence if an application needs to get the number of valid queue entries this API would provide the interface. A call to this API would access the registers GxQBUR0, GxQSR0 in order to determine the queue length.
Related APIs:
XMC_VADC_GROUP_QueueInsertChannel()
int32_t XMC_VADC_GROUP_QueueGetNextChannel ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
int32_t Returns -1 if there are no channels for conversion Else would return the next valid channel for conversion.
Range: [0x0 to 0x8]
Description:
Returns the next entry in the queue request source for conversion.

Identifies the channel in the queue lined up for conversion next. API will return a valid queue entry from the queue buffer. First checks for the valid channel entry in the backup register and returns if present. If the valid entry has not been found in the backup register then the queue buffer is searched for a valid entry. A call to this API would access the registers GxQ0R0, GxQBUR0 to determine the next channel.
Related APIs:
XMC_VADC_GROUP_QueueRemoveChannel()
XMC_VADC_GROUP_QueueInsertChannel()
bool XMC_VADC_GROUP_QueueGetReqSrcEventStatus ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
bool returns true if the service request event is raised. returns false if the service request event was not raised.
Description:
Determines if the request source event is asserted.
This API will get the status of the queue request source event. Will return a true if the event has occurred for queue. A call to this API would acces the register bit field GxSEFLAG.SEV0.
Related APIs:
None.
void XMC_VADC_GROUP_QueueInit | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_QUEUE_CONFIG_t * | config
 | ) |  |
Parameters
group_ptr | Pointer to the VADC group
config | Pointer to initialization data structure
Returns
None
Description:
Initializes VADC QUEUE functional block.

The QUEUE request source functional block converts channels stored in a queue. The first channel entered into the queue is converted first. A channel once converted, can be placed back into the queue if desired(refill). A call to this API will first disable the arbitration slot for queue (XMC_VADC_GROUP_QueueEnableArbitrationSlot()) and then it would configure all the related registers with the required configuration values. The arbitration slot is re-enabled at the end of init by invoking XMC_VADC_GROUP_QueueDisableArbitrationSlot(). A call to this API would configure the registers GxARBPR, GxQCTRL0, GxQMR0 to configure the queue request source.
Related APIs:
XMC_VADC_GROUP_QueueEnableArbitrationSlot()
XMC_VADC_GROUP_QueueDisableArbitrationSlot()
XMC_VADC_GROUP_QueueSelectTrigger()
XMC_VADC_GROUP_QueueSelectGating()
void XMC_VADC_GROUP_QueueInsertChannel | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_QUEUE_ENTRY_t | entry
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
entry | Details of the node being added
Returns
None
Description:
Inserts a queue entry to the tail of the queue buffer.

This API will insert a new channel into the queue buffer. The Queue will start conversion of the channels from the head of the buffer. This Insert will place the entry after the last valid entry. If no valid entries are present then this API will place the Queue entry at the head of the buffer. Then the successive call to the insert will place the new entry after the last entry. A call to this API would configure the register GxQINR0 for a single queue entry.
Related APIs:
XMC_VADC_GROUP_QueueRemoveChannel()
bool XMC_VADC_GROUP_QueueIsArbitrationSlotEnabled ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
bool returns true if the arbitration is enabled else returns false.
Description:
Returns the arbitration status of the queue request source.

If the queue request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the queue channel can only be converted when the arbiter comes to the queue slot. A call to this API would return the status of the arbitration slot of queue. A call to this API would read the register bit field GxARBPR.ASEN1.
Related APIs:
XMC_VADC_GROUP_QueueEnableArbitrationSlot(),
XMC_VADC_GROUP_QueueDisableArbitrationSlot()
void XMC_VADC_GROUP_QueueRemoveChannel ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Clears the next valid channel in the queue buffer.

A queue entry lined up for conversion can be removed and replaced by its successor. The call to this API will first check if a valid queue entry is present in the queue backup register if present would clear its valid flag. If no valid queue entries are present in the backup then the first channel present in the queue buffer would be cleared. A call to this API would configure the registers GxQCTRL0, GxQMR0, GxARBPR in order to clear a channel from the queue.
Related APIs:
XMC_VADC_GROUP_QueueInsertChannel()
void XMC_VADC_GROUP_QueueSelectGating | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_GATE_INPUT_SELECT_t | input_num
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
input_num | Choice of the input earmarked as the gating line
Returns
None
Description:
Select Gating signal for queue request source.

Passage of the trigger input to the request source can be controlled via a gating signal. Any one of the 16 input lines can be chosen as a gating signal. Trigger signal can be given to the queue request source only when the gating signal's active level is detected. Additionally the GxQMR0.ENGT has to be configured for the gating signal's active level. A call to this API would configure the register bit field GxQCTRL0.GTSEL.
Related APIs:
XMC_VADC_GROUP_QueueSelectTrigger()
void XMC_VADC_GROUP_QueueSelectTrigger | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_TRIGGER_INPUT_SELECT_t | input_num
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
input_num | Choice of the input earmarked as a trigger line
Returns
None
Description:
Select Trigger signal for queue request source.

A queue request source will raise conversion request only if there were either a request from application or occurrence of a hardware trigger. This API selects one of the 16 input lines as a trigger line. This is needed when a hardware trigger is needed for the conversion of the queue request source. Refer to the reference manual to determine the signal that needs to be connected. A call to this API would configure the register bit field GxQCTRL0.XTSEL.
Related APIs:
XMC_VADC_GROUP_QueueSelectGating()
XMC_VADC_GROUP_QueueEnableExternalTrigger()
void XMC_VADC_GROUP_QueueSelectTriggerEdge | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_TRIGGER_EDGE_t | trigger_edge
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
trigger_edge | Choice of the trigger edge
Returns
None
Description:
Select Trigger signal edge for queue request source.

A queue request source will raise conversion request only if there were either a request from application or occurrence of a hardware trigger. This API selects one of the 4 trigger edges. This is needed when a hardware trigger is needed for the conversion of the queue request source. Refer to the reference manual to determine the signal that needs to be connected. A call to this API would configure the register bit field GxQCTRL0.XTMODE.
Related APIs:
XMC_VADC_GROUP_QueueSelectGating()
XMC_VADC_GROUP_QueueEnableExternalTrigger()
void XMC_VADC_GROUP_QueueSetGatingMode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | XMC_VADC_GATEMODE_t | mode_sel
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
mode_sel | Select how the gating is applied to the queue request source
Returns
None

Details of function
Selects the gating mode of queue request source.

Passage of the trigger input to the request source can be controlled via a gating signal. This API determines how the gating signal behaves, either active low or active high. If gating signal needs to ignored XMC_VADC_GATEMODE_IGNORE should be used as the mode_sel. A call to this API would configure the register bit field GxQMR0.ENGT.

Related APIs:
XMC_VADC_GROUP_QueueSelectGating();
void XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_SR_t | sr
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
sr | The service request line (Common SR lines, Group specific SR lines)
Returns
None
Description:
Connects the event to the SR line of VADC.

This API will connect a Service Request line(SR) to a queue request source event. Hence to get a interrupt on this Service request line one has to enable the required NVIC node. A call to this API would configure the register bit field GxSEVNP.SEVNP0.
Related APIs:
None.
void XMC_VADC_GROUP_QueueTriggerConversion ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Generates conversion request (Software initiated conversion).
A conversion request can be raised either upon detection of a hardware trigger, or by software. This API forces the queue unit to generate a conversion request to the analog converter. It is assumed that the queue has already been filled up with entries. A call to this API would configure the register bit field GxQMR0.TREV.
Note:
The conversion of queue entry will start immediately after the entry has been loaded into GxQINR0. This happens only if the queue entry has been loaded into the register without the need for the H/W trigger.
If a H/W Trigger is selected while loading the entry, the conversion will occur in one of the 2 ways:
  • The H/W generates a trigger needed for the queue request source.
  • The Conversion is triggered manually by calling this API.
Related APIs:
XMC_VADC_GROUP_QueueInsertChannel()
void XMC_VADC_GROUP_QueueTriggerReqSrcEvent ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Manually asserts the conversion complete request source event.

This API will set the request source event for queue. This will trigger a interrupt if the service node pointer for the scan has been configured. A call to this API would configure the register bit field GxSEFLAG.SEV0.
Related APIs:
XMC_VADC_GROUP_QueueClearReqSrcEvent()
void XMC_VADC_GROUP_ResultInit | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg_num,
 |  | const XMC_VADC_RESULT_CONFIG_t * | config
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
res_reg_num Result register which is intended to be initialized
Range: [0x0 to 0xF]
config | Pointer to initialization data
Returns
None
Description:
Initializes a Group Result Register.
Various options needed for the working of the result result will be configured with this API. This would determine the result handling of the group registers. This API must be called after the channel Init (XMC_VADC_GROUP_ChannelInit())to initialize the result register that is selected for the channel. This API would also determine if the result register that is being configured has to a part of a FIFO buffer. In this API one can also configure the various result handling options line FIR/IIR filters and it order. Also configures the Data reduction to accumulate 2/3/4 results need to be done. This API will also configure the result event generation. A call to this API would configure the register GxRCR with the config .
Related APIs:
XMC_VADC_GROUP_AddResultToFifo()
XMC_VADC_GROUP_EnableResultEvent()
XMC_VADC_GROUP_DisableResultEvent()
void XMC_VADC_GROUP_ScanAddChannelToSequence | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num The channel meant to be added to scan sequence
Range: [0x0 to 0x7]
Returns
None
Description:
Adds a channel to the scan sequence.

Call this API to insert a new single channel into the scan request source. This will be added to the scan sequence. The added channel will be part of the conversion sequence when the next load event occurs. A call to this API would configure the register bit fields of GxASSEL.
Related APIs:
XMC_VADC_GROUP_ScanAddMultipleChannels()
void XMC_VADC_GROUP_ScanAddMultipleChannels | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_mask
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_mask Mask word indicating channels which form part of scan conversion sequence Bit location 0/1/2/3/4/5/6/7 represents channels-0/1/2/3/4/5/6/7 respectively. To Add the channel to the scan sequence enable the respective bit. Passing a 0x0 will clear all the selected channels
Range: [0x0 to 0xFF]
Returns
None
Description:
Adds multiple channels to the scan sequence.

Call this API to insert a multiple channels into the scan request source. This will be added to a scan sequence. The added channels will be a part of the conversion sequence when the next load event occurs. A call to this API would configure the register bit fields of GxASSEL.
Related APIs:
XMC_VADC_GROUP_ScanAddChannelToSequence()
void XMC_VADC_GROUP_ScanClearReqSrcEvent ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Acknowledges the scan conversion complete request source event.

This API will clear the request source event that occurred. This will clear a interrupt if it was raised. A call to this API would configure the register bit field GxSEFLAG.SEV1.
Related APIs:
XMC_VADC_GROUP_ScanTriggerReqSrcEvent()
void XMC_VADC_GROUP_ScanDisableArbitrationSlot ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Disables arbitration slot of the scan request source.

If the scan request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the scan channel can only be converted when the arbiter comes to the scan slot.A call to this API will lead to all conversions request by scan to be blocked. A call to this API would configure the register bit field GxARBPR.ASEN1.
Related APIs:
XMC_VADC_GROUP_ScanEnableArbitrationSlot()
void XMC_VADC_GROUP_ScanDisableContinuousMode ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Disables continuous conversion mode.

Typically for a scan request source to generate conversion request, either a hardware trigger or a software request is a pre-requisite. Using autoscan feature it is possible to start the conversion once and allow the sequence to repeat without any further triggers. Once all channels belonging to a scan request source have been converted, a request source completion event is generated. Generation of this event can restart the scan sequence. By invoking this feature the Autoscan mode of operations is disabled. A call to this API would configure the register bit field GxASMR.SCAN.
Related APIs:
XMC_VADC_GROUP_ScanEnableContinuousMode()
void XMC_VADC_GROUP_ScanDisableEvent ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Disables the scan request source event .
By using this API the request source event will be deactivated for the scan request source. Other configurations w.r.t service node pointer are not done in this API. A call to this API would configure the register bit field GxASMR.ENSI.
Related APIs:
XMC_VADC_GROUP_ScanEnableEvent(),
XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode()
void XMC_VADC_GROUP_ScanDisableExternalTrigger ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Disables the trigger for scan request source.
By using this API the trigger will be deactivated for the scan request source. This will just deactivate the H/W trigger for the scan request source. If any configuration were done to select the trigger input in GxASCTRL, it will be not be effected by this API. A call to this API would configure the register bit field GxASMR.ENTR.
Related APIs:
XMC_VADC_GROUP_ScanEnableExternalTrigger()
void XMC_VADC_GROUP_ScanEnableArbitrationSlot ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Enables arbitration slot of the scan request source.

If the scan request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the scan channel can only be converted when the arbiter comes to the scan slot. Thus this must be enabled if any conversion need to take place. A call to this API would configure the register bit field GxARBPR.ASEN1.
Related APIs:
XMC_VADC_GROUP_ScanDisableArbitrationSlot()
void XMC_VADC_GROUP_ScanEnableContinuousMode ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Enables continuous conversion mode.

Typically for a scan request source to generate conversion request, either a hardware trigger or a software request is a pre-requisite. Using autoscan feature it is possible to start the conversion once and allow the sequence to repeat without any further triggers. Once all channels belonging to a scan request source have been converted, a request source completion event is generated. Generation of this event can restart the scan sequence. Every request source event will cause a load event to occur. A call to this API would configure the register bit field GxASMR.SCAN.
Related APIs:
XMC_VADC_GROUP_ScanDisableContinuousMode()
void XMC_VADC_GROUP_ScanEnableEvent ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Enables the scan request source event .
By using this API the request source event will be activated for the scan request source. Other configurations w.r.t service node pointer are not done in this API. A call to this API would configure the register bit field GxASMR.ENSI.
Related APIs:
XMC_VADC_GROUP_ScanDisableEvent(),
XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode()
void XMC_VADC_GROUP_ScanEnableExternalTrigger ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Enables the trigger for scan request source.

By using this API, the trigger signal will be activated for the scan request source. The trigger signal and trigger edge will be selected from the ASCTRL register. The Selection of a input will be done by XMC_VADC_GROUP_ScanSelectTrigger(). A call to this API would configure the register bit field GxASMR.ENTR.
Related APIs:
XMC_VADC_GROUP_ScanSelectTrigger()
XMC_VADC_GROUP_ScanDisableExternalTrigger()
uint32_t XMC_VADC_GROUP_ScanGetNumChannelsPending ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns

uint32_t Returns the total channels pending for conversion.
Range: [0x0 to 0x8]
Description:
Returns the total number of pending channels.

This API will read the pending channels register and will return the number of channels that are awaiting conversion. When a load event occurs the scan sequence is pushed to a pending conversion register. From the pending register the channels are taken up by the converter. When the API is called it would return the total number of channels pending (GxASPND).
Related APIs:
XMC_VADC_GROUP_ScanIsChannelPending()
bool XMC_VADC_GROUP_ScanGetReqSrcEventStatus ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
bool returns true if the service request event is raised. returns false if the service request event was not raised.
Description:
Determines if the request source event is asserted.
This API will get the status of the scan request source event. Will return a true if the event has occurred for scan. A call to this API would access the register bit field GxSEFLAG.SEV1.
Related APIs:
None.
void XMC_VADC_GROUP_ScanInit | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_SCAN_CONFIG_t * | config
 | ) |  |
Parameters
group_ptr | Pointer to the VADC group
config | Pointer to Scan configuration
Returns
None
Description:
Initializes the VADC SCAN functional block.

The GROUP SCAN request source functional block converts channels sequentially starting with the highest numbered channel to the lowest. Channels must register themselves as being part of the the scan sequence. A call to this API will first disable the arbitration slot for queue (XMC_VADC_GROUP_ScanEnableArbitrationSlot()) and then it would configure all the related registers with the required configuration values. The arbitration slot is re-enabled at the end of init by invoking XMC_VADC_GROUP_ScanDisableArbitrationSlot(). A call to this API would configure the registers GxARBPR, GxASCTRL, GxASMR needed scan request source.
Related APIs:
XMC_VADC_GROUP_ScanEnableArbitrationSlot()
XMC_VADC_GROUP_ScanDisableArbitrationSlot()
XMC_VADC_GROUP_ScanSelectTrigger()
XMC_VADC_GROUP_ScanSelectGating()
bool XMC_VADC_GROUP_ScanIsArbitrationSlotEnabled ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
bool returns true if the arbitration is enabled else returns false.
Description:
Returns the arbitration status of the scan request source.

If the scan request source must have its conversion request considered by the arbiter, it must participate in the arbitration rounds. Even if a load event occurs the scan channel can only be converted when the arbiter comes to the scan slot. A call to this API would return the status of the arbitration slot of scan. A call to this API would read the register bit field GxARBPR.ASEN1.
Related APIs:
XMC_VADC_GROUP_ScanEnableArbitrationSlot(),
XMC_VADC_GROUP_ScanDisableArbitrationSlot()
bool XMC_VADC_GROUP_ScanIsChannelPending | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
ch_num The channel being audited for completion of conversion
Range: [0x0 to 0x7]
Returns
bool returns true if the channel is pending conversion else returns false
Description:
Determine if the channel is pending for conversion.

This API will check if the Channel in question is awaiting conversion in the current arbitration round. When a load event occurs the scan sequence is pushed to a pending conversion register. From the pending register the channels are taken up by the converter. This API would return true if the channel is found in the pending register (GxASPND).
Related APIs:
XMC_VADC_GROUP_ScanGetNumChannelsPending()
void XMC_VADC_GROUP_ScanRemoveChannel | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | channel_num
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
channel_num | channel number to be removed from the scan sequence.
Returns
None
Description:
Removes a channel from the scan sequence.
By using this API the it is possible to remove a single channel from the conversion sequence. The remaining channels will continue however they are. A call to this API would configure the register GxASSEL.
Related APIs:
None.
void XMC_VADC_GROUP_ScanSelectGating | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | XMC_VADC_GATE_INPUT_SELECT_t | gating_input
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
gating_input | Module input signal meant to be selected as gating input
Returns
None
Description:
Select Gating signal for scan request source.

Passage of the trigger input to the request source can be controlled via a gating signal. Any one of the 16 input lines can be chosen as a gating signal. Trigger signal can be given to the scan request source only when the gating signal's active level is detected. Additionally the GxASMR.ENGT has to be configured for the gating signal's active level. A call to this API would configure the register bit field GxASCTRL.GTSEL.
Related APIs:
XMC_VADC_GROUP_ScanSelectTrigger()
void XMC_VADC_GROUP_ScanSelectTrigger | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | XMC_VADC_TRIGGER_INPUT_SELECT_t | trigger_input
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
trigger_input | Choice of the input earmarked as a trigger line
Returns
None
Description:
Select Trigger signal for scan request source.

A scan request source will raise conversion request only if there were either a request from application or occurrence of a hardware trigger. This API selects one of the 16 input lines as a trigger line. This is needed when a hardware trigger is needed for the conversion of the scan request source. Refer to the reference manual to determine the signal that needs to be connected. A call to this API would configure the register bit field GxASCTRL.XTSEL.
Related APIs:
XMC_VADC_GROUP_ScanSelectGating()
XMC_VADC_GROUP_ScanEnableExternalTrigger()
void XMC_VADC_GROUP_ScanSelectTriggerEdge | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_TRIGGER_EDGE_t | trigger_edge
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
trigger_edge | Trigger edge selection
Returns
None
Description:
Selects the trigger edge for scan request source.

A scan request source will raise conversion request only if there were either a request from application or occurrence of a hardware trigger. This API selects one of the 4 possible trigger edges. This is needed when a hardware trigger is needed for the conversion of the scan request source. A call to this API would configure the register bit field GxASCTRL.XTMODE.
Related APIs:
XMC_VADC_GROUP_ScanSelectTrigger()
void XMC_VADC_GROUP_ScanSequenceAbort ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Aborts an ongoing scan sequence conversion.

An ongoing sequence can be aborted at any time. The scan unit picks the pending channels one by one from a pending register and requests for their conversion. This API essentially clears the channel pending register thus creating an illusion that there are no more channels left in the sequence. A call to this API would configure the registers GxASMR, GxASCTRL, GxARBPR to achieve the sequence abort.
Related APIs:
None.
void XMC_VADC_GROUP_ScanSetGatingMode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | XMC_VADC_GATEMODE_t | mode_sel
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
mode_sel | Select how the gating is applied to the scan request source
Returns
None
Description:
Selects the gating mode of scan request source.

Passage of the trigger input to the request source can be controlled via a gating signal. This API determines how the gating signal behaves, either active low or active high. If gating signal needs to ignored XMC_VADC_GATEMODE_IGNORE should be used as the mode_sel.
Related APIs:
XMC_VADC_GROUP_ScanSelectGating();
void XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_SR_t | sr
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
sr | Service Request Id
Returns
None
Description:
Connects the scan request source event to the SR line of VADC.

This API will connect a Service Request line(SR) to a scan request source event. Hence to get a interrupt on this Service request line one has to enable the required NVIC node. A call to this API would configure the register bit field GxSEVNP.SEV1NP .
Related APIs:
None.
void XMC_VADC_GROUP_ScanTriggerConversion ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Generates conversion request (Software initiated conversion).

A conversion request can be raised either upon detection of a hardware trigger, or by software. This API forces the scan unit to generate a conversion request to the analog converter. It is assumed that the scan has already been filled up with entries. A call to this API would configure the register bit field GxASMR.LDEV.
Related APIs:
None.
void XMC_VADC_GROUP_ScanTriggerReqSrcEvent ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group
Returns
None
Description:
Manually asserts the conversion complete request source event.

This API will set the request source event for scan. This will trigger a interrupt if the service node pointer for the scan has been configured. A call to this API would configure the register bit field GxSEFLAG.SEV1.
Related APIs:
None.
void XMC_VADC_GROUP_SetBoundaries | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | boundary0,
 |  | const uint32_t | boundary1
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group whose global boundary registers are to be programmed
boundary0 Boundary-0 Value
Range: [0x0 - 0x0FFF]
boundary1 Boundary-1 Value
Range: [0x0 - 0x0FFF]
Returns
None
Description:
Programs the boundaries with boundary0 and boundary1 for result comparison.

These two boundaries can serve as absolute boundaries. They defines a range against which the result of a conversion can be compared. In the fast compare mode, the two boundaries provide hysteresis capability to a compare value. In any case, these boundary values entered here form a boundary pallete. There are dedicated upper and lower boundary registers G_BOUND0 and G_BOUND1 who will derive their values from this palette.
Related APIs:
None
void XMC_VADC_GROUP_SetBoundaryEventInterruptNode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint8_t | boundary_flag_num,
 |  | const XMC_VADC_BOUNDARY_NODE_t | node
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
boundary_flag_num | The Boundary flag for which the interrupt node needs to be configured. Range: [0x0 to 0x3]
node | Service Request node Id
Returns
None
Description:
Connects the boundary event to the SR line of VADC or to a common boundary flag.

This API will connect a Service Request line(SR) to a boundary event. Hence to get a interrupt on this Service request line one has to enable the required NVIC node. A call to this API would configure the register bit field GxBFLNP.BFLxNP.
Related APIs:
None.
void XMC_VADC_GROUP_SetChannelAlias | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | src_ch_num,
 |  | const uint32_t | alias_ch_num
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
src_ch_num Channel which will be converted by alias_ch_num, when called by the request source.
Range:[0x0 to 0x7]
alias_ch_num This is the alias channel (Ch-0 or Ch-1)
Range:[0x0, 0x1]
Returns
None
Description:
Sets the Alias channel(alias_ch_num) to convert from the source channel(src_ch_num).

When a alias configuration takes place the request source(queue/scan/background) will not call channel src_ch_num. The Request sources will call the channel alias_ch_num , this would invoke the conversion of the pin associated with src_ch_num. The configuration of the alias channel (alias_ch_num) will be used for the conversion.
When an alias channel (Ch-0 or Ch-1) receives a trigger, it converts the aliased channel (src_ch_num). The properties of Ch-0 or Ch-1 (as indicated in alias_ch_num ) apply when src_ch_num is converted. A call to this API would configure the register GxALIAS.
Note:
Alias Channel (alias_ch_num) and the source channel (src_ch_num) cannot be the same. If they are, that alias feature is not used for the conversion. In order to Reset the alias feature that was previously selected this method can be used.
Related APIs:
None.
void XMC_VADC_GROUP_SetIndividualBoundary | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_CHANNEL_BOUNDARY_t | selection,
 |  | const uint16_t | boundary_value
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
selection | The boundary value selected for boundary_value.
boundary_value | Select the boundary value.
Returns
None
Description:
Programs the boundary with boundary_value for result comparison.

This defines a range against which the result of a conversion can be compared. In the fast compare mode, the two boundaries provide hysteresis capability to a compare value.
Related APIs:
None.
void XMC_VADC_GROUP_SetPowerMode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const XMC_VADC_GROUP_POWERMODE_t | power_mode
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC Group.
power_mode | Desired power mode
Returns
None
Description:
Configures the power mode of a VADC group.

For a VADC group to actually convert an analog signal, its analog converter must be turned on.
Related APIs:
None
void XMC_VADC_GROUP_SetResultFastCompareValue | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg,
 |  | const XMC_VADC_RESULT_SIZE_t | compare_val
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register for which the compare value is being set
Range: [0x0 to 0xF]
compare_val The compare value itself
Range: [0x0 to 0xFFF]
Returns
None
Description:
Configures the compare value (relevant to the Fast Compare Mode).

A channel input can be converted and its value stored in its result register. Alternatively, the channel input can be converted and compared against a compare value. This is the fast compare mode typically utilized by applications that are not interested in absolute converted value of an analog input, but rather a binary decision on how the input fares against a preset compare value. The channel should have had already chosen the correct ICLASS with the fast compare mode enabled. compare_val would be the compare value on which FCM bit in the result register will be set. The FCM bit will be set if the analog voltage is greater than the compare value. A call to this API would configure the register bit field GxRES.RESULT.
Related APIs:
XMC_VADC_GROUP_GetFastCompareResult().
void XMC_VADC_GROUP_SetResultInterruptNode | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg,
 |  | const XMC_VADC_SR_t | sr
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
res_reg Result Register for which the result event is being asserted
Range: [0x0 to 0xF]
sr | The SR line to which the result event must be connected
Returns
None
Description:
Binds a result event to a requested Service Request line.

The result event is connected to a service request line. For an event to result in an interrupt, this service request line must be enabled in VADC and the NVIC node which this service request line is connected to must have interrupt generation enabled. A call to this API would access the registers GxREVNP0 GxREVNP1.
Related APIs:
XMC_VADC_GROUP_TriggerResultEvent()
XMC_VADC_GROUP_ClearResultEvent()
void XMC_VADC_GROUP_SetResultSubtractionValue | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint16_t | subtraction_val
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
subtraction_val 12 bit subtraction value
Range: [0x0 to 0xFFF]
Returns
None
Description:
Configures the subtraction value (relevant to the Difference Mode).

A channel input can be converted and its value stored in its result register. Alternatively, the channel input can be converted and subtracted with the value stored in GxRES[0]. This Difference Mode typically utilized by applications that are not interested in absolute converted value of an analog input, but rather a difference of converted values. Subtraction value will always be present in the GxRES[0] and thus this API would configure that register.
Related APIs:
None.
void XMC_VADC_GROUP_SetSyncMaster ( XMC_VADC_GROUP_t *const group_ptr )
Parameters
group_ptr Constant pointer to the VADC group.
Returns
None
Description:
Configures a VADC Group as a master group.

Conversion of identically numbered channels across groups can be synchronized. For example, when the trigger to convert CH-1 of Group-2 is received, it is possible to simultaneously request conversion of CH-1 of Group-0 and Group-3. Group-2 in this example is therefore the master group while Groups-0 and 3 are the slave groups.
Related APIs:
None
void XMC_VADC_GROUP_SetSyncReadySignal | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | uint32_t | mask
 | ) |  |
Parameters
group_ptr | Constant Pointer to the VADC Group
eval_mask | mask to configure the eval bits Use XMC_VADC_SYNCTR_EVAL_t to create the mask.
Returns
None
Description:
Set the Eval bits of the group.

For Synchronized conversion the master's ready signal configuration must be copied onto the slaves. A call to this API would configure the Sync EVAL Bits (GxSYNCTR.EVALy).
Related APIs:
XMC_VADC_GROUP_CheckSlaveReadiness()
XMC_VADC_GROUP_IgnoreSlaveReadiness()
void XMC_VADC_GROUP_SetSyncSlave | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | uint32_t | master_grp,
 |  | uint32_t | slave_group
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC Group which must be set as a slave
master_grp The master group number
Range: [0x0 - 0x3]
slave_group The slave group number
Range: [0x0 - 0x3]
Returns
None
Description:
Configures a VADC Group as a slave group.

Conversion of identically numbered channels across groups can be synchronized. For example, when the trigger to convert CH-1 of Group-2 is received, it is possible to simultaneously request conversion of CH-1 of Group-0 and Group-3. Group-2 in this example is therefore the master group while Groups-0 and 3 are the slave groups. It uses the SYNCCTR register for the configuration settings.
Related APIs:
XMC_VADC_GROUP_SetSyncMaster()
XMC_VADC_GROUP_CheckSlaveReadiness()
XMC_VADC_GROUP_EnableChannelSyncRequest()
void XMC_VADC_GROUP_SetSyncSlaveReadySignal | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | uint32_t | eval_waiting_group,
 |  | uint32_t | eval_origin_group
 | ) |  |
Parameters
group_ptr | Constant Pointer to the VADC Group waiting for ready signal
eval_waiting_group | The VADC Group which expects a ready signal to start it's conversion.
eval_origin_group | The VADC Group from which the eval_waiting_group will expect a ready signal
Returns
None
Description:
Sets the ready signal in the eval_waiting_group .

For Synchronized conversion all the slaves participating need to configure the ready signal. A slave group will also need to configure the ready signals coming from the other slave groups. A call to this API would configure the Sync.slave's EVAL Bits (GxSYNCTR.EVALy).
Related APIs:
XMC_VADC_GROUP_CheckSlaveReadiness()
XMC_VADC_GROUP_IgnoreSlaveReadiness()
void XMC_VADC_GROUP_TriggerResultEvent | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | res_reg
 | ) |  |
Parameters
group_ptr Constant pointer to the VADC group
res_reg Result Register for which the result event is being asserted
Range: [0x0 to 0xF]
Returns
None
Description:
Manually asserts the result event.

The result event must necessarily be connected to a SR line. The SR in turn must have been enabled along with the corresponding NVIC node. Only then will the assertion of RES event lead to an interrupt. A call to this API would access the register bit fieldS OF GxREFLAG.
Related APIs:
XMC_VADC_GROUP_ClearResultEvent().
void XMC_VADC_GROUP_TriggerServiceRequest | ( | XMC_VADC_GROUP_t *const | group_ptr,
 |  | const uint32_t | sr_num,
 |  | const XMC_VADC_GROUP_IRQ_t | type
 | ) |  |
Parameters
group_ptr | Constant pointer to the VADC group
sr_num | The service request number (0 through 3)
type | IRQ type (Kernel specific interrupt vs Module wide shared interrupt )
Returns
None
Description:
Activates a Service Request line(manually trigger).

VADC provides few SR lines for each group and a few more which is shared across all the groups. These SR lines can be connected to an NVIC node which in-turn would generate an interrupt. This API would manually trigger the given SR line. Could be used for evaluation and testing purposes.
Related APIs:
None
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_VADC_CHANNEL_CONFIG_t Struct Reference

Data Fields
XMC_VADC_CHANNEL_CONFIG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Data Fields

int8_t | alias_channel
bool | channel_priority
uint32_t | alternate_reference: 1
uint32_t | boundary_flag_mode_ch0: 4
uint32_t | boundary_flag_mode_ch1: 4
uint32_t | boundary_flag_mode_ch2: 4
uint32_t | boundary_flag_mode_ch3: 4
uint32_t | broken_wire_detect: 1
uint32_t | broken_wire_detect_channel: 2
uint32_t | event_gen_criteria: 2
uint32_t | flag_output_condition_ch0: 1
uint32_t | flag_output_condition_ch1: 1
uint32_t | flag_output_condition_ch2: 1
uint32_t | flag_output_condition_ch3: 1
uint32_t | input_class: 2
uint32_t | invert_boundary_flag_ch0: 1
uint32_t | invert_boundary_flag_ch1: 1
uint32_t | invert_boundary_flag_ch2: 1
uint32_t | invert_boundary_flag_ch3: 1
uint32_t | lower_boundary_select: 2
uint32_t | result_alignment: 1
uint32_t | result_reg_number: 4
uint32_t | sync_conversion: 1
uint32_t | upper_boundary_select: 2
uint32_t | use_global_result: 1

Detailed Description

Structure initializing the VADC channel. Use type XMC_VADC_CHANNEL_CONFIG_t for this enumeration.

Field Documentation

int8_t alias_channel

Specifies the channel which has to be aliased with CH0/CH1 (which ever is applicable). Force the value to (int8_t)-1 to bypass alias feature. Uses XMC_VADC_CHANNEL_ALIAS_t for configuration.

uint32_t alternate_reference

Input reference voltage selection either VARef or CH-0. Uses XMC_VADC_CHANNEL_REF_t

uint32_t boundary_flag_mode_ch0

Specify the basic operation of boundary flag 0 Uses XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t

uint32_t boundary_flag_mode_ch1

Specify the basic operation of boundary flag 1 Uses XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t

uint32_t boundary_flag_mode_ch2

Specify the basic operation of boundary flag 2 Uses XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t

uint32_t boundary_flag_mode_ch3

Specify the basic operation of boundary flag 3 Uses XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t

uint32_t broken_wire_detect

Configures extra phase before the capacitor is sampled.

uint32_t broken_wire_detect_channel

Source to be used to charge the capacitor for BWD feature. Uses XMC_VADC_CHANNEL_BWDCH_t.

bool channel_priority

Only non priority channels can be converted by Background Request Source

uint32_t event_gen_criteria

When should an event be generated? Uses XMC_VADC_CHANNEL_EVGEN_t

uint32_t flag_output_condition_ch0

Condition for which the boundary flag should change. Uses XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t

uint32_t flag_output_condition_ch1

Condition for which the boundary flag should change. Uses XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t

uint32_t flag_output_condition_ch2

Condition for which the boundary flag should change. Uses XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t

uint32_t flag_output_condition_ch3

Condition for which the boundary flag should change. Uses XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t

uint32_t input_class

Input conversion class selection. Uses XMC_VADC_CHANNEL_CONV_t

uint32_t invert_boundary_flag_ch0

Inverts boundary flag output.

uint32_t invert_boundary_flag_ch1

Inverts boundary flag output.

uint32_t invert_boundary_flag_ch2

Inverts boundary flag output.

uint32_t invert_boundary_flag_ch3

Inverts boundary flag output.

uint32_t lower_boundary_select

Which boundary register serves as lower bound? Accepts enum XMC_VADC_CHANNEL_BOUNDARY_t

uint32_t result_alignment

Alignment of the results read in the result register. Uses XMC_VADC_RESULT_ALIGN_t

uint32_t result_reg_number

Group result register number

uint32_t sync_conversion

Enables synchronous conversion for the configured channel

uint32_t upper_boundary_select

Which boundary register serves as upper bound? Accepts enum XMC_VADC_CHANNEL_BOUNDARY_t

uint32_t use_global_result

Use global result register for background request source channels

The documentation for this struct was generated from the following file:
  • xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_VADC_DETAILED_RESULT_t Struct Reference

XMC_VADC_DETAILED_RESULT_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

Detailed result structure

Field Documentation

uint32_t channel_number

Converted channel number

uint32_t converted_request_source

Converted request source

uint32_t data_reduction_counter

Results reduction counter value

uint32_t emux_channel_number

Converted external multiplexer channel number. Only applicable for GxRES[0] result register

uint32_t fast_compare_result

Fast compare result if conversion mode is fast compare mode.

uint32_t result

Result of the Analog to digital conversion

uint32_t vaild_result

Valid flag is set when a new result is available

The documentation for this struct was generated from the following file:
  • xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_VADC_GLOBAL_CLASS_t Struct Reference

XMC_VADC_GLOBAL_CLASS_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

Structure to initialize the global input class configuration. Configured parameters are sample time and conversion Mode.

Field Documentation

uint32_t conversion_mode_emux

Conversion mode for channels connected via EMUX to VADC. Uses XMC_VADC_CONVMODE_t

uint32_t conversion_mode_standard

Conversion mode for channels directly connected to VADC. Uses XMC_VADC_CONVMODE_t

uint32_t sample_time_std_conv

Sample time for channels directly connected to VADC
Range: [0x0 to 0x1F]

uint32_t sampling_phase_emux_channel

Sample time for channels connected via EMUX
Range: [0x0 to 0x1F]

The documentation for this struct was generated from the following file:
  • xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_VADC_GLOBAL_CLOCK_t Struct Reference

XMC_VADC_GLOBAL_CLOCK_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

Structure to initialize converter and arbiter clock configuration

Field Documentation

uint32_t analog_clock_divider

Clock for the converter.
Range: [0x0 to 0x1F]

uint32_t arbiter_clock_divider

Request source arbiter clock divider.
Range: [0x0 to 0x3]

uint32_t msb_conversion_clock

Additional clock cycle for analog converter

The documentation for this struct was generated from the following file:
  • xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_VADC_GLOBAL_CONFIG_t Struct Reference

Data Fields
XMC_VADC_GLOBAL_CONFIG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Data Fields

XMC_VADC_GLOBAL_CLASS_t class0
XMC_VADC_GLOBAL_CLASS_t class1
XMC_VADC_GLOBAL_CLOCK_t clock_config
uint32_t | boundary0: 12
uint32_t | boundary1: 12
uint32_t | data_reduction_control: 4
uint32_t | disable_sleep_mode_control: 1
uint32_t | event_gen_enable: 1
uint32_t | module_disable: 1
uint32_t | wait_for_read_mode: 1

Detailed Description

Structure to initialize the VADC Global functions

Field Documentation

uint32_t boundary0

Boundary value for results comparison

uint32_t boundary1

Boundary value for results comparison

XMC_VADC_GLOBAL_CLASS_t class0

ADC input conversion configurations for GLOBICLASS[0]

XMC_VADC_GLOBAL_CLASS_t class1

ADC input conversion configurations for GLOBICLASS[1]

XMC_VADC_GLOBAL_CLOCK_t clock_config

ADC clock configurations

uint32_t data_reduction_control

Data reduction stages

uint32_t disable_sleep_mode_control

Set it to true in order to disable the Sleep mode

uint32_t event_gen_enable

Generates an event on availability of new result.

uint32_t module_disable

Disables the module clock.

uint32_t wait_for_read_mode

Results of the next conversion will not be overwritten in the result register until the previous value is read

The documentation for this struct was generated from the following file:
  • xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_VADC_GLOBAL_SHS_CONFIG_t Struct Reference

XMC_VADC_GLOBAL_SHS_CONFIG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

Sample and hold Initialization structure

Field Documentation

uint32_t analog_reference_select

It is possible to different reference voltage for the SHS modules

The documentation for this struct was generated from the following file:
  • xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_VADC_GROUP_CLASS_t Struct Reference

XMC_VADC_GROUP_CLASS_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

Structure to initialize the group input class configuration. Configured parameters are sample time and conversion Mode.

Field Documentation

uint32_t conversion_mode_emux

Conversion mode for channels connected via EMUX to VADC. Uses XMC_VADC_CONVMODE_t

uint32_t conversion_mode_standard

Conversion mode for channels directly connected to VADC. Uses XMC_VADC_CONVMODE_t

uint32_t sample_time_std_conv

Sample time for channels directly connected to VADC
Range: [0x0 to 0x1F]

uint32_t sampling_phase_emux_channel

Sample time for channels connected via EMUX
Range: [0x0 to 0x1F]

The documentation for this struct was generated from the following file:
  • xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_VADC_GROUP_CONFIG_t Struct Reference

Data Fields
XMC_VADC_GROUP_CONFIG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Data Fields

XMC_VADC_GROUP_CLASS_t class0
XMC_VADC_GROUP_CLASS_t class1
XMC_VADC_GROUP_EMUXCFG_t emux_config
uint32_t | arbiter_mode: 1
uint32_t | arbitration_round_length: 2
uint32_t | boundary0: 12
uint32_t | boundary1: 12

Detailed Description

Group Configuration Data Structures

Field Documentation

uint32_t arbiter_mode

Arbiter mode - Select either Continuous mode or Demand based. Uses XMC_VADC_GROUP_ARBMODE_t

uint32_t arbitration_round_length

Number of arbiter slots to be considered

uint32_t boundary0

Boundary value for results comparison

uint32_t boundary1

Boundary value for results comparison

XMC_VADC_GROUP_CLASS_t class0

ADC input conversion configurations for GxICLASS[0]

XMC_VADC_GROUP_CLASS_t class1

ADC input conversion configurations for GxICLASS[1]

XMC_VADC_GROUP_EMUXCFG_t emux_config

External multiplexer related configurations

The documentation for this struct was generated from the following file:
  • xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_VADC_GROUP_EMUXCFG_t Struct Reference

XMC_VADC_GROUP_EMUXCFG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

EMUX related configuration structure.

Field Documentation

uint32_t connected_channel

The Channel to which the EMUX is connected.

uint32_t emux_coding

Select Binary or Gray coding. Uses XMC_VADC_GROUP_EMUXCODE_t

uint32_t emux_mode

Selects the external multiplexer modes: Steady, Single Mode, step etc Uses XMC_VADC_GROUP_EMUXMODE_t

uint32_t starting_external_channel

External channel number to which the VADC will generate a control signal (needed to select the analog input in the analog multiplexer)

uint32_t stce_usage

Use STCE for each conversion of an external channel

The documentation for this struct was generated from the following file:
  • xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_VADC_QUEUE_CONFIG_t Struct Reference

Data Fields
XMC_VADC_QUEUE_CONFIG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Data Fields

uint32_t | conv_start_mode: 2
uint32_t | req_src_priority: 2
uint32_t | external_trigger: 1
uint32_t | gate_signal: 4
uint32_t | src_specific_result_reg: 4
uint32_t | timer_mode: 1
uint32_t | trigger_edge: 2
uint32_t | trigger_signal: 4

Detailed Description

Structure initializing a VADC queue request source. Use type XMC_VADC_QUEUE_CONFIG_t.

Field Documentation

uint32_t conv_start_mode

One converter is shared between the queue and scan request sources of the same group. This field determines how queue request source would request for conversion. Uses XMC_VADC_STARTMODE_t

uint32_t external_trigger

Are external triggers supported?

uint32_t gate_signal

Select one of the 16 possibilities for gating. Uses XMC_VADC_GATE_INPUT_SELECT_t

uint32_t req_src_priority

Request source priority for the arbiter.Uses XMC_VADC_GROUP_RS_PRIORITY_t

uint32_t src_specific_result_reg

Uses any one Group related result register as the destination for all conversions results. To use the individual result register from each channel configuration, configure this field with 0x0

uint32_t timer_mode

Timer mode for equi-distant sampling shall be activated or not?

uint32_t trigger_edge

Edge selection for trigger signal. Uses XMC_VADC_TRIGGER_EDGE_t

uint32_t trigger_signal

Select one of the 16 possibilities for trigger. Uses XMC_VADC_TRIGGER_INPUT_SELECT_t

The documentation for this struct was generated from the following file:
  • xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_VADC_QUEUE_ENTRY_t Struct Reference

XMC_VADC_QUEUE_ENTRY_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

Structure to initialize a queue entry. Use type XMC_VADC_QUEUE_ENTRY_t.

Field Documentation

uint32_t channel_num

Channel number associated with this queue entry.
Range:[0x0 to 0x7]

uint32_t external_trigger

Conversion requests are raised on an external trigger.

uint32_t generate_interrupt

Generates a queue request source event

uint32_t refill_needed

Conversion completed channel gets inserted back into the queue

The documentation for this struct was generated from the following file:
  • xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_VADC_RESULT_CONFIG_t Struct Reference

XMC_VADC_RESULT_CONFIG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Detailed Description

Structure to initialize VADC Group result register.

Field Documentation

uint32_t data_reduction_control

Configures the data reduction stages

uint32_t event_gen_enable

Generates an event on availability of new result.

uint32_t part_of_fifo

Make the result register a part of Result FIFO?

uint32_t post_processing_mode

Result data processing mode. Uses XMC_VADC_DMM_t For normal operation select XMC_VADC_DMM_t::XMC_VADC_DMM_REDUCTION_MODE and data_reduction_control as 0

uint32_t wait_for_read_mode

Allow the conversion only after previous results are read

The documentation for this struct was generated from the following file:
  • xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_VADC_SCAN_CONFIG_t Struct Reference

Data Fields
XMC_VADC_SCAN_CONFIG_t Struct Reference
XMC Peripheral Library » VADC

#include <xmc_vadc.h>

Data Fields

uint32_t | conv_start_mode: 2
uint32_t | req_src_priority: 2
uint32_t | enable_auto_scan: 1
uint32_t | external_trigger: 1
uint32_t | gate_signal: 4
uint32_t | load_mode: 1
uint32_t | req_src_interrupt: 1
uint32_t | src_specific_result_reg: 4
uint32_t | timer_mode: 1
uint32_t | trigger_edge: 2
uint32_t | trigger_signal: 4

Detailed Description

Structure initializing the VADC scan request source. Use type XMC_VADC_SCAN_CONFIG_t for this structure.

Field Documentation

uint32_t conv_start_mode

One converter is shared between the queue and scan request sources of the same group. This field determines how scan request source would request for conversion. Uses XMC_VADC_STARTMODE_t

uint32_t enable_auto_scan

Enables the continuous conversion mode. Conversion completion of the last channel in a scan sequence will cause a load event.

uint32_t external_trigger

Conversions be initiated by external hardware trigger

uint32_t gate_signal

Select one of the 16 possibilities for gating. Uses XMC_VADC_GATE_INPUT_SELECT_t

uint32_t load_mode

Selects load event mode. Uses XMC_VADC_SCAN_LOAD_t

uint32_t req_src_interrupt

Request source event can be generated after a conversion sequence

uint32_t req_src_priority

Request source priority for the arbiter. If the Conversion start mode has been selected as Cancel inject repeat/Never mode then this field would determine the priority of scan request source. Uses XMC_VADC_GROUP_RS_PRIORITY_t

uint32_t src_specific_result_reg

Use any one Group related result register as the destination for all conversions results. To use the individual result register from each channel configuration, configure this field with 0x0

uint32_t timer_mode

Decides whether timer mode for equi-distant sampling shall be activated or not.

uint32_t trigger_edge

Edge selection for trigger signal. Uses XMC_VADC_TRIGGER_EDGE_t

uint32_t trigger_signal

Select one of the 16 possibilities for trigger. Uses XMC_VADC_TRIGGER_INPUT_SELECT_t enumeration

The documentation for this struct was generated from the following file:
  • xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: WDT

Data Structures | Enumerations | Functions
WDT
XMC Peripheral Library

Data Structures

struct XMC_WDT_CONFIG_t

Enumerations

Functions

void | XMC_WDT_ClearAlarm (void)
void | XMC_WDT_Disable (void)
void | XMC_WDT_Enable (void)
uint32_t | XMC_WDT_GetCounter (void)
void | XMC_WDT_Init (const XMC_WDT_CONFIG_t *const config)
void | XMC_WDT_Service (void)
void | XMC_WDT_SetDebugMode (const XMC_WDT_DEBUG_MODE_t debug_mode)
void | XMC_WDT_SetMode (XMC_WDT_MODE_t mode)
void | XMC_WDT_SetServicePulseWidth (uint8_t service_pulse_width)
void | XMC_WDT_SetWindowBounds (uint32_t lower_bound, uint32_t upper_bound)
void | XMC_WDT_Start (void)
void | XMC_WDT_Stop (void)

Detailed Description

The watchdog unit (WDT) improves the system integrity, by triggering the system reset request to bring the system back from the unresponsive state to normal operation.

This LLD provides the Configuration structure XMC_WDT_CONFIG_t and initialization function XMC_WDT_Init().
It can be used to:

  1. Start or Stop the watchdog timer. (XMC_WDT_Start() and XMC_WDT_Stop())
  2. Service the watchdog timer. (XMC_WDT_Service())
  3. Configure the service window upper bound and lower bound timing values. (XMC_WDT_SetWindowBounds())
  4. Enable the generation of the pre-warning event for the first overflow of the timer. (XMC_WDT_SetMode())
  5. Clear the pre-warning alarm event. It is mandatory to clear the flag during pre-warning alarm ISR, to stop generating reset request for the second overflow of the timer. (XMC_WDT_ClearAlarm())
  6. Suspend the watchdog timer during Debug HALT mode. (XMC_WDT_SetDebugMode())
  7. Configure service indication pulse width.(XMC_WDT_SetServicePulseWidth())

Enumeration Type Documentation

enum XMC_WDT_DEBUG_MODE_t

Defines debug behaviour of watchdog when the CPU enters HALT mode. Use type XMC_WDT_DEBUG_MODE_t for this enum.

Enumerator
XMC_WDT_DEBUG_MODE_STOP | Watchdog counter is paused during debug halt.
XMC_WDT_DEBUG_MODE_RUN | Watchdog counter is not paused during debug halt.
enum XMC_WDT_MODE_t

Defines working modes for watchdog. Use type XMC_WDT_MODE_t for this enum.

Enumerator
XMC_WDT_MODE_TIMEOUT | Generates reset request as soon as the timer overflow occurs.
XMC_WDT_MODE_PREWARNING | Generates an alarm event for the first overflow. And reset request after subsequent overflow, if not serviced after first overflow.

Function Documentation

void XMC_WDT_ClearAlarm ( void )
Parameters
None
Returns
None
Description:
Clears pre-warning alarm by setting ALMC bit in WDTCLR register.
In pre-warning mode, first overflow of the timer upper window bound fires the pre-warning alarm. XMC_WDT_ClearAlarm() must be invoked to clear the alarm alarm. After clearing of the alarm, watchdog timer must be serviced within valid time window. Otherwise watchdog timer triggers the reset request up on crossing the upper bound value in a subsequent cycle.
Related APIs:
XMC_WDT_Service(), XMC_WDT_SetMode()
void XMC_WDT_Disable ( void )
Parameters
None
Returns
None
Description:
Disables the clock to the watchdog timer.
Note:
  1. After invoking XMC_WDT_Disable(), all register values are displayed with 0F in debugger. Once enabled by calling XMC_WDT_Enable(), previous configured register values are displayed. No need to invoke XMC_WDT_Init() again.
Related APIs:
XMC_WDT_Enable()
void XMC_WDT_Enable ( void )
Parameters
None
Returns
None
Description:
Enables watchdog clock.
This API is invoked by XMC_WDT_Init() and therefore no need to call it explicitly during watchdog initialization sequence. Invoke this API to enable watchdog once again if the watchdog is disabled by invoking XMC_WDT_Disable().
Note:
  1. Not required to configure the watchdog again after invoking XMC_WDT_Disable(). Since the registers retains with the configured values.
Related APIs:
XMC_WDT_Init(), XMC_WDT_Disable()
uint32_t XMC_WDT_GetCounter ( void )
Parameters
None
Returns
uint32_t Current count value of watchdog timer register (TIM). Range: [0H to FFFFFFFFH]
Description:
Reads current count of timer register (TIM).
Invoke this API before servicing or feeding the watchdog to check whether count is between lower and upper window bounds.
Related APIs:
XMC_WDT_Service()
void XMC_WDT_Init ( const XMC_WDT_CONFIG_t *const config )
Parameters
config pointer to a constant watchdog configuration data structure. Refer data structure XMC_WDT_CONFIG_t for detail.
Returns
None
Description:
Initializes and configures watchdog with configuration data pointed by config.
It invokes XMC_WDT_Enable() to enable clock and release reset. Then configures the lower and upper window bounds, working mode (timeout/pre-warning), debug behaviour and service request indication pulse width.
Note:
  1. With out invoking this XMC_WDT_Init() or XMC_WDT_Enable(), invocation of other APIs like XMC_WDT_SetWindowBounds(), XMC_WDT_SetMode(), XMC_WDT_SetServicePulseWidth(), XMC_WDT_SetDebugMode(), XMC_WDT_Start(), XMC_WDT_GetCounter(), XMC_WDT_Service(), XMC_WDT_ClearAlarm() has no affect.
void XMC_WDT_Service ( void )
Parameters
None
Returns
None
Description:
Services or feeds the watchdog by writing the Magic word in SRV register.
Service watchdog when count value of watchdog timer is between lower and upper window bounds. Successful servicing will reset watchdog timer (TIM register) to 0H and generate service indication pulse.
Note:
  1. invoking this API when count value of watchdog timer is less than window lower bound results wrong servicing and immediately triggers reset request.
Related APIs:
XMC_WDT_GetCounter(), XMC_WDT_SetWindowBounds(), XMC_WDT_SetServicePulseWidth()
void XMC_WDT_SetDebugMode ( const XMC_WDT_DEBUG_MODE_t debug_mode )
Parameters
debug_mode running state of watchdog during debug halt mode. Refer XMC_WDT_DEBUG_MODE_t for valid values.
Returns
None
Description:
Sets debug behaviour of watchdog by modifying DSP bit of CTR register.
Depending upon DSP bit, the watchdog timer stops when CPU is in HALT mode. The debug behaviour is initially set as XMC_WDT_DEBUG_MODE_STOP during initialization in XMC_WDT_Init(). Invoke this API to change the debug behaviour as needed later in the program.
void XMC_WDT_SetMode ( XMC_WDT_MODE_t mode )
Parameters
mode is one of the working modes of the watchdog timer, i.e timeout or pre-warning. Refer XMC_WDT_MODE_t for valid values.
Returns
None
Description:
Sets watchdog working mode (timeout or pre-warning) by updating PRE bit of CTR register.
The working mode is set during initialization in XMC_WDT_Init(). Invoke this API to alter the mode as needed later in the program.
void XMC_WDT_SetServicePulseWidth ( uint8_t service_pulse_width )
Parameters
service_pulse_width specifies Service indication pulse width in terms of fwdt. Range: [0H – FFH].
Returns
None
Description:
Sets service indication pulse width by updating SPW bit field of CTR register.
The service indication pulse (with width service_pulse_width + 1 in fwdt cycles) is generated on successful servicing or feeding of watchdog. The pulse width is initially set during initialization in XMC_WDT_Init(). Invoke this API to alter the width as needed later in the program.
void XMC_WDT_SetWindowBounds | ( | uint32_t | lower_bound,
 |  | uint32_t | upper_bound
 | ) |  |
Parameters
lower_bound | specifies watchdog window lower bound in terms of watchdog clock (fWDT) cycles. Range: [0H to FFFFFFFFH].
upper_bound | specifies watchdog window upper bound in terms of watchdog clock (fWDT) cycles. Range: [0H to FFFFFFFFH].
Returns
None
Description:
Sets watchdog window lower and upper bounds by updating WLB and WUB registers.
Window lower and upper bounds are set during initialization in XMC_WDT_Init(). Invoke this API to alter the values as needed later in the program. This upper bound and lower bound can be calculated by using the below formula
upper_bound or lower_bound = desired_boundary_time(sec) * fwdt(hz)
Note:
  1. Always ensure that upper_bound is greater than the lower_bound value. If not, whenever timer crosses the upper_bound value it triggers the reset(wdt_rst_req) of the controller.
void XMC_WDT_Start ( void )
Parameters
None
Returns
None
Description:
Start the watchdog timer by setting ENB bit of CTR register.
Invoke this API to start the watchdog after initialization, or to resume the watchdog when paused by invoking XMC_WDT_Stop().
Related APIs:
XMC_WDT_Init(), XMC_WDT_Stop()
void XMC_WDT_Stop ( void )
Parameters
None
Returns
None
Description:
Pauses watchdog timer by resetting ENB bit of CTR register.
Invoke this API to pause the watchdog as needed in the program e.g. debugging through software control.
Related APIs:
XMC_WDT_Init(), XMC_WDT_Stop()
Generated on Mon Aug 7 2017 10:43:06 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: XMC_WDT_CONFIG_t Struct Reference

Data Fields
XMC_WDT_CONFIG_t Struct Reference
XMC Peripheral Library » WDT

#include <xmc_wdt.h>

Data Fields

uint32_t | window_lower_bound
uint32_t | window_upper_bound
uint32_t | prewarn_mode: 1
uint32_t | run_in_debug_mode: 1
uint32_t | service_pulse_width: 8

Detailed Description

Structure for initializing watchdog timer. Use type XMC_WDT_CONFIG_t for this structure.

Field Documentation

uint32_t prewarn_mode

Pre-warning mode (PRE). This accepts boolean values as input.

uint32_t run_in_debug_mode

Watchdog timer behaviour during debug (DSP). This accepts boolean values as input.

uint32_t service_pulse_width

Service Indication Pulse Width (SPW). Generated Pulse width is of (SPW+1), in fwdt cycles.
Range: [0H to FFH]

uint32_t window_lower_bound

Lower bound for servicing window (WLB). Setting the lower bound to 0H disables the window mechanism.
Range: [0H to FFFFFFFFH]

uint32_t window_upper_bound

Upper bound for service window (WUB). Reset request is generated up on overflow of timer. ALways upper bound value has to be more than lower bound value. If it is set lower than WLB, triggers a system reset after timer crossed upper bound value.
Range: [0H to FFFFFFFFH]

The documentation for this struct was generated from the following file:
  • xmc_wdt.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: File List

  • File List
  • Globals
File List
Here is a list of all documented files with brief descriptions:
xmc1_flash.h
xmc1_gpio.h
xmc1_rtc.h
xmc1_scu.h
xmc_bccu.h
xmc_can.h
xmc_ccu4.h
xmc_ccu8.h
xmc_eru.h
xmc_flash.h
xmc_gpio.h
xmc_i2c.h
xmc_i2s.h
xmc_ledts.h
xmc_math.h
xmc_pau.h
xmc_posif.h
xmc_prng.h
xmc_rtc.h
xmc_scu.h
xmc_spi.h
xmc_uart.h
xmc_usic.h
xmc_vadc.h
xmc_wdt.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc1_flash.h File Reference

  • File List
  • Globals
  • inc
Macros | Enumerations | Functions
xmc1_flash.h File Reference
#include "xmc_common.h"
#include <XMC1000_RomFunctionTable.h>
Include dependency graph for xmc1_flash.h:

Macros

#define | XMC_FLASH_BASE (0x10001000U)
#define | XMC_FLASH_BLOCKS_PER_PAGE (16U)
#define | XMC_FLASH_BYTES_PER_BLOCK (16U)
#define | XMC_FLASH_BYTES_PER_PAGE (256U)
#define | XMC_FLASH_BYTES_PER_SECTOR (4096U)
#define | XMC_FLASH_PAGES_PER_SECTOR (16U)
#define | XMC_FLASH_WORDS_PER_BLOCK (4U)
#define | XMC_FLASH_WORDS_PER_PAGE (64U)
#define | XMC_FLASH_WORDS_PER_SECTOR (1024U)

Enumerations

Functions

void | XMC_FLASH_EnterSleepMode (void)
void | XMC_FLASH_ErasePage (uint32_t *address)
void | XMC_FLASH_ErasePages (uint32_t *address, uint32_t num_pages)
void | XMC_FLASH_ExitSleepMode (void)
uint32_t | XMC_FLASH_GetSectorAddress (uint32_t sector)
void | XMC_FLASH_ProgramVerifyPage (uint32_t *address, const uint32_t *data)
void | XMC_FLASH_ReadBlocks (uint32_t *address, uint32_t *data, uint32_t num_blocks)
uint32_t | XMC_FLASH_ReadWord (const uint32_t *const address)
void | XMC_FLASH_SetHardReadLevel (XMC_FLASH_HARDREAD_LEVEL_t level)
void | XMC_FLASH_SetSectorProtection (uint32_t num_sectors)
void | XMC_FLASH_VerifyBlocks (uint32_t *address, const uint32_t *data, uint32_t num_blocks)
void | XMC_FLASH_WriteBlocks (uint32_t *address, const uint32_t *data, uint32_t num_blocks, bool verify)

Detailed Description

Date
2015-06-20
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc1_gpio.h File Reference

  • File List
  • Globals
  • inc
Data Structures | Enumerations | Functions
xmc1_gpio.h File Reference
#include "xmc_common.h"
#include "xmc1_gpio_map.h"
Include dependency graph for xmc1_gpio.h:

Data Structures

struct | XMC_GPIO_CONFIG_t
struct | XMC_GPIO_PORT_t

Enumerations

Functions

void XMC_GPIO_SetInputHysteresis (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_INPUT_HYSTERESIS_t hysteresis)

Detailed Description

Date
2015-06-20
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc1_rtc.h File Reference

  • File List
  • Globals
  • inc
Enumerations | Functions
xmc1_rtc.h File Reference

Enumerations

Functions

void XMC_RTC_SetDebugMode (const XMC_RTC_DEBUG_MODE_t debug_mode)

Detailed Description

Date
2015-05-20
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc1_scu.h File Reference

  • File List
  • Globals
  • inc
Data Structures | Macros | Typedefs | Enumerations | Functions
xmc1_scu.h File Reference
#include "xmc_common.h"
Include dependency graph for xmc1_scu.h:

Data Structures

struct | XMC_SCU_CLOCK_CONFIG_t
struct | XMC_SCU_SUPPLYMONITOR_t

Macros

#define | XMC_SCU_BMI_CANCLK_DCO1 (0U << 11)
#define | XMC_SCU_BMI_CANCLK_OSCHP (1U << 11)
#define | XMC_SCU_BMI_DAPDIS_CHANNEL_0 (0U << 9)
#define | XMC_SCU_BMI_DAPDIS_CHANNEL_1 (1U << 9)
#define | XMC_SCU_BMI_DAPTYP_SPD (1U << 8)
#define | XMC_SCU_BMI_DAPTYP_SWD (0U << 8)
#define | XMC_SCU_BMI_HWCFG_ASC_BSL (0x00C0U)
#define | XMC_SCU_BMI_HWCFG_ASC_BSLTO (0x00D0U)
#define | XMC_SCU_BMI_HWCFG_CAN_BSL (0x0080U)
#define | XMC_SCU_BMI_HWCFG_CAN_BSLTO (0x0090U)
#define | XMC_SCU_BMI_HWCFG_SBSL (0x00FAU)
#define | XMC_SCU_BMI_HWCFG_SBSL_CANOPEN (0x00A0U)
#define | XMC_SCU_BMI_HWCFG_SSC_BSL (0x00C8U)
#define | XMC_SCU_BMI_HWCFG_SSC_BSLTO (0x00D8U)
#define | XMC_SCU_BMI_HWCFG_UMD (0x00C3U)
#define | XMC_SCU_BMI_HWCFG_UMHAR (0x00C7U)
#define | XMC_SCU_BMI_HWCFG_UPM (0x00C1U)
#define | XMC_SCU_INTERRUPT_EVENT_ACMP0 SCU_INTERRUPT_SRMSK_ACMP0I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ACMP1 SCU_INTERRUPT_SRMSK_ACMP1I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ACMP2 SCU_INTERRUPT_SRMSK_ACMP2I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ACMP3 (((int64_t)SCU_INTERRUPT_SRMSK1_ACMP3I_Msk) << 32U)
#define | XMC_SCU_INTERRUPT_EVENT_DCO1_OUT_SYNC (((int64_t)SCU_INTERRUPT_SRMSK1_DCO1OFSI_Msk) << 32U)
#define | XMC_SCU_INTERRUPT_EVENT_FLASH_COMPLETED SCU_INTERRUPT_SRCLR_FLCMPLTI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_FLASH_ERROR SCU_INTERRUPT_SRMSK_FLECC2I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_LOCI SCU_INTERRUPT_SRMSK_LOCI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_LOSS_EXT_CLOCK (((int64_t)SCU_INTERRUPT_SRMSK1_LOECI_Msk) << 32U)
#define | XMC_SCU_INTERRUPT_EVENT_ORC0 SCU_INTERRUPT_SRMSK_ORC0I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC1 SCU_INTERRUPT_SRMSK_ORC1I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC2 SCU_INTERRUPT_SRMSK_ORC2I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC3 SCU_INTERRUPT_SRMSK_ORC3I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC4 SCU_INTERRUPT_SRMSK_ORC4I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC5 SCU_INTERRUPT_SRMSK_ORC5I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC6 SCU_INTERRUPT_SRMSK_ORC6I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_ORC7 SCU_INTERRUPT_SRMSK_ORC7I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_PEMCAN (((int64_t)SCU_INTERRUPT_SRMSK1_PEMCI_Msk) << 32U)
#define | XMC_SCU_INTERRUPT_EVENT_PESRAM SCU_INTERRUPT_SRMSK_PESRAMI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_PEUSIC0 SCU_INTERRUPT_SRMSK_PEU0I_Msk
#define | XMC_SCU_INTERRUPT_EVENT_PEUSIC1 (((int64_t)SCU_INTERRUPT_SRMSK1_PEU1I_Msk) << 32U)
#define | XMC_SCU_INTERRUPT_EVENT_RTC_ALARM SCU_INTERRUPT_SRCLR_AI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTC_PERIODIC SCU_INTERRUPT_SRCLR_PI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCATIM0_UPDATED SCU_INTERRUPT_SRMSK_RTC_ATIM0_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCATIM1_UPDATED SCU_INTERRUPT_SRMSK_RTC_ATIM1_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCCTR_UPDATED SCU_INTERRUPT_SRMSK_RTC_CTR_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCTIM0_UPDATED SCU_INTERRUPT_SRMSK_RTC_TIM0_Msk
#define | XMC_SCU_INTERRUPT_EVENT_RTCTIM1_UPDATED SCU_INTERRUPT_SRMSK_RTC_TIM1_Msk
#define | XMC_SCU_INTERRUPT_EVENT_STDBYCLKFAIL SCU_INTERRUPT_SRMSK_SBYCLKFI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_TSE_DONE SCU_INTERRUPT_SRMSK_TSE_DONE_Msk
#define | XMC_SCU_INTERRUPT_EVENT_TSE_HIGH SCU_INTERRUPT_SRMSK_TSE_HIGH_Msk
#define | XMC_SCU_INTERRUPT_EVENT_TSE_LOW SCU_INTERRUPT_SRMSK_TSE_LOW_Msk
#define | XMC_SCU_INTERRUPT_EVENT_VCLIP SCU_INTERRUPT_SRMSK_VCLIPI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_VDDPI SCU_INTERRUPT_SRMSK_VDDPI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_VDROP SCU_INTERRUPT_SRMSK_VDROPI_Msk
#define | XMC_SCU_INTERRUPT_EVENT_WDT_WARN SCU_INTERRUPT_SRMSK_PRWARN_Msk

Typedefs

typedef uint32_t XMC_SCU_INTERRUPT_EVENT_t

Enumerations

Functions

uint32_t | XMC_SCU_CalcTemperature (void)
void | XMC_SCU_CLOCK_CalibrateOscillatorOnTemperature (int32_t temperature)
void | XMC_SCU_CLOCK_ClearDCO1OscillatorWatchdogStatus (void)
void | XMC_SCU_CLOCK_DisableDCO1ExtRefCalibration (void)
void | XMC_SCU_CLOCK_DisableDCO1OscillatorWatchdog (void)
void | XMC_SCU_CLOCK_EnableDCO1ExtRefCalibration (XMC_SCU_CLOCK_SYNC_CLKSRC_t sync_clk, uint32_t prescaler, uint32_t syn_preload)
void | XMC_SCU_CLOCK_EnableDCO1OscillatorWatchdog (void)
uint32_t | XMC_SCU_CLOCK_GetFastPeripheralClockFrequency (void)
bool | XMC_SCU_CLOCK_IsDCO1ExtRefCalibrationReady (void)
void | XMC_SCU_CLOCK_ScaleMCLKFrequency (uint32_t idiv, uint32_t fdiv)
void | XMC_SCU_CLOCK_SetFastPeripheralClockSource (const XMC_SCU_CLOCK_PCLKSRC_t source)
void | XMC_SCU_CLOCK_SetMCLKFrequency (uint32_t freq_khz)
void | XMC_SCU_DisablePrefetchUnit (void)
void | XMC_SCU_EnablePrefetchUnit (void)
uint32_t | XMC_SCU_GetTemperature (void)
bool | XMC_SCU_HighTemperature (void)
bool | XMC_SCU_IsTempMeasurementDone (void)
void | XMC_SCU_LockProtectedBits (void)
bool | XMC_SCU_LowTemperature (void)
void | XMC_SCU_POWER_DisableMonitor (void)
void | XMC_SCU_POWER_EnableMonitor (XMC_SCU_POWER_MONITOR_RANGE_t range, XMC_SCU_POWER_MONITOR_DELAY_t delay)
void | XMC_SCU_RESET_AssertMasterReset (void)
void | XMC_SCU_RESET_EnableResetRequest (uint32_t request)
uint32_t | XMC_SCU_SetBMI (uint32_t flags, uint8_t timeout)
void | XMC_SCU_SetInterruptControl (uint8_t irq_number, XMC_SCU_IRQCTRL_t source)
void | XMC_SCU_SetRawTempLimits (const uint32_t lower_temp, const uint32_t upper_temp)
XMC_SCU_STATUS_t | XMC_SCU_SetTempHighLimit (uint32_t limit)
XMC_SCU_STATUS_t | XMC_SCU_SetTempLowLimit (uint32_t limit)
void | XMC_SCU_StartTempMeasurement (void)
void | XMC_SCU_StopTempMeasurement (void)
void | XMC_SCU_SupplyMonitorInit (const XMC_SCU_SUPPLYMONITOR_t *obj)
void | XMC_SCU_UnlockProtectedBits (void)

Detailed Description

Date
2017-08-03
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_bccu.h File Reference

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  • inc
Data Structures | Typedefs | Enumerations | Functions
xmc_bccu.h File Reference
#include <xmc_common.h>
Include dependency graph for xmc_bccu.h:

Data Structures

struct | XMC_BCCU_CH_CONFIG_t
struct | XMC_BCCU_CH_CONFIG_t
struct | XMC_BCCU_DIM_CONFIG_t
struct | XMC_BCCU_DIM_CONFIG_t
struct | XMC_BCCU_GLOBAL_CONFIG_t
struct | XMC_BCCU_TRIG_CONFIG_t

Typedefs

typedef BCCU_CH_Type | XMC_BCCU_CH_t
typedef BCCU_DE_Type | XMC_BCCU_DIM_t
typedef BCCU_Type | XMC_BCCU_t

Enumerations

Functions

void | XMC_BCCU_AbortDimming (XMC_BCCU_t *const bccu, uint32_t dim_no)
void | XMC_BCCU_AbortLinearWalk (XMC_BCCU_t *const bccu, uint32_t chan_no)
void | XMC_BCCU_CH_ConfigTrigger (XMC_BCCU_CH_t *const channel, XMC_BCCU_CH_TRIG_EDGE_t edge, uint32_t force_trig_en)
void | XMC_BCCU_CH_DisableDimmingBypass (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_DisableFlickerWatchdog (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_DisableGating (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_DisablePacker (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_EnableDimmingBypass (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_EnableFlickerWatchdog (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_EnableGating (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_EnablePacker (XMC_BCCU_CH_t *const channel, uint32_t thresh, uint32_t off_comp, uint32_t on_comp)
void | XMC_BCCU_CH_Init (XMC_BCCU_CH_t *const channel, const XMC_BCCU_CH_CONFIG_t *const config)
uint32_t | XMC_BCCU_CH_ReadIntensity (XMC_BCCU_CH_t *const channel)
uint32_t | XMC_BCCU_CH_ReadPackerOffCompare (XMC_BCCU_CH_t *const channel)
uint32_t | XMC_BCCU_CH_ReadPackerOnCompare (XMC_BCCU_CH_t *const channel)
uint32_t | XMC_BCCU_CH_ReadPackerThreshold (XMC_BCCU_CH_t *const channel)
void | XMC_BCCU_CH_SelectDimEngine (XMC_BCCU_CH_t *const channel, XMC_BCCU_CH_DIMMING_SOURCE_t sel)
void | XMC_BCCU_CH_SetLinearWalkPrescaler (XMC_BCCU_CH_t *const channel, uint32_t clk_div)
void | XMC_BCCU_CH_SetPackerOffCompare (XMC_BCCU_CH_t *const channel, uint32_t level)
void | XMC_BCCU_CH_SetPackerOffCounter (XMC_BCCU_CH_t *const channel, uint32_t cnt_val)
void | XMC_BCCU_CH_SetPackerOnCompare (XMC_BCCU_CH_t *const channel, uint32_t level)
void | XMC_BCCU_CH_SetPackerOnCounter (XMC_BCCU_CH_t *const channel, uint32_t cnt_val)
void | XMC_BCCU_CH_SetPackerThreshold (XMC_BCCU_CH_t *const channel, uint32_t val)
void | XMC_BCCU_CH_SetTargetIntensity (XMC_BCCU_CH_t *const channel, uint32_t ch_int)
void | XMC_BCCU_ClearEventFlag (XMC_BCCU_t *const bccu, uint32_t flag_type)
void | XMC_BCCU_ConcurrentAbortDimming (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentAbortLinearWalk (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentConfigTrigger (XMC_BCCU_t *const bccu, XMC_BCCU_TRIG_CONFIG_t *trig)
void | XMC_BCCU_ConcurrentDisableChannels (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentDisableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentDisableTrap (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentEnableChannels (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentEnableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentEnableTrap (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentSetOutputPassiveLevel (XMC_BCCU_t *const bccu, uint32_t chan_mask, XMC_BCCU_CH_ACTIVE_LEVEL_t level)
void | XMC_BCCU_ConcurrentStartDimming (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConcurrentStartLinearWalk (XMC_BCCU_t *const bccu, uint32_t mask)
void | XMC_BCCU_ConfigGlobalTrigger (XMC_BCCU_t *const bccu, XMC_BCCU_TRIGMODE_t mode, XMC_BCCU_TRIGDELAY_t delay)
void | XMC_BCCU_ConfigSuspendMode (XMC_BCCU_t *const bccu, XMC_BCCU_SUSPEND_MODE_t mode)
void | XMC_BCCU_DIM_ConfigDimCurve (XMC_BCCU_DIM_t *const dim_engine, uint32_t dither_en, XMC_BCCU_DIM_CURVE_t sel)
XMC_BCCU_DIM_CURVE_t | XMC_BCCU_DIM_GetDimCurve (XMC_BCCU_DIM_t *const dim_engine)
void | XMC_BCCU_DIM_Init (XMC_BCCU_DIM_t *const dim_engine, const XMC_BCCU_DIM_CONFIG_t *const config)
uint32_t | XMC_BCCU_DIM_ReadDimDivider (XMC_BCCU_DIM_t *const dim_engine)
uint32_t | XMC_BCCU_DIM_ReadDimmingLevel (XMC_BCCU_DIM_t *const dim_engine)
void | XMC_BCCU_DIM_SetDimDivider (XMC_BCCU_DIM_t *const dim_engine, uint32_t div)
void | XMC_BCCU_DIM_SetTargetDimmingLevel (XMC_BCCU_DIM_t *const dim_engine, uint32_t level)
void | XMC_BCCU_DisableChannel (XMC_BCCU_t *const bccu, uint32_t chan_no)
void | XMC_BCCU_DisableChannelTrigger (XMC_BCCU_t *const bccu, uint32_t chan_no)
void | XMC_BCCU_DisableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t dim_no)
void | XMC_BCCU_DisableInterrupt (XMC_BCCU_t *const bccu, uint32_t event)
void | XMC_BCCU_DisableTrap (XMC_BCCU_t *const bccu, uint32_t chan_no)
void | XMC_BCCU_EnableChannel (XMC_BCCU_t *const bccu, uint32_t chan_no)
void | XMC_BCCU_EnableChannelTrigger (XMC_BCCU_t *const bccu, uint32_t chan_no, XMC_BCCU_CH_TRIGOUT_t trig_line)
void | XMC_BCCU_EnableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t dim_no)
void | XMC_BCCU_EnableInterrupt (XMC_BCCU_t *const bccu, uint32_t event)
void | XMC_BCCU_EnableTrap (XMC_BCCU_t *const bccu, uint32_t chan_no)
uint32_t | XMC_BCCU_GetChannelOutputLvlAtLastTrigger (XMC_BCCU_t *const bccu, uint32_t chan_no)
void | XMC_BCCU_GlobalInit (XMC_BCCU_t *const bccu, const XMC_BCCU_GLOBAL_CONFIG_t *const config)
uint32_t | XMC_BCCU_IsDimmingFinished (XMC_BCCU_t *const bccu, uint32_t dim_no)
uint32_t | XMC_BCCU_IsDitherEnable (XMC_BCCU_DIM_t *const dim_engine)
uint32_t | XMC_BCCU_IsLinearWalkComplete (XMC_BCCU_t *const bccu, uint32_t chan_no)
uint32_t | XMC_BCCU_ReadBitClock (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadDimClock (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadEventFlag (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadFastClock (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadFlickerWDThreshold (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadGlobalTrigger (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadLastTrigChanNr (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadSuspendMode (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadTrapEdge (XMC_BCCU_t *const bccu)
uint32_t | XMC_BCCU_ReadTrapInput (XMC_BCCU_t *const bccu)
void | XMC_BCCU_SelectBitClock (XMC_BCCU_t *const bccu, XMC_BCCU_BCLK_MODE_t div)
void | XMC_BCCU_SelectTrapInput (XMC_BCCU_t *const bccu, XMC_BCCU_CH_TRAP_IN_t input)
void | XMC_BCCU_SetDimClockPrescaler (XMC_BCCU_t *const bccu, uint32_t div)
void | XMC_BCCU_SetEventFlag (XMC_BCCU_t *const bccu, uint32_t flag_type)
void | XMC_BCCU_SetFastClockPrescaler (XMC_BCCU_t *const bccu, uint32_t div)
void | XMC_BCCU_SetFlickerWDThreshold (XMC_BCCU_t *const bccu, uint32_t threshold_no)
void | XMC_BCCU_SetGlobalDimmingLevel (XMC_BCCU_t *const bccu, uint32_t level)
void | XMC_BCCU_SetOutputPassiveLevel (XMC_BCCU_t *const bccu, uint32_t chan_no, XMC_BCCU_CH_ACTIVE_LEVEL_t level)
void | XMC_BCCU_SetTrapEdge (XMC_BCCU_t *const bccu, XMC_BCCU_CH_TRAP_EDGE_t edge)
void | XMC_BCCU_StartDimming (XMC_BCCU_t *const bccu, uint32_t dim_no)
void | XMC_BCCU_StartLinearWalk (XMC_BCCU_t *const bccu, uint32_t chan_no)

Detailed Description

Date
2015-06-20
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_can.h File Reference

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  • inc
Data Structures | Macros | Typedefs | Enumerations | Functions
xmc_can.h File Reference
#include "xmc_common.h"
#include "xmc_scu.h"
#include "xmc_can_map.h"
#include <string.h>
Include dependency graph for xmc_can.h:

Data Structures

struct | XMC_CAN_FIFO_CONFIG_t
struct | XMC_CAN_GATEWAY_CONFIG_t
struct | XMC_CAN_MO_t
struct | XMC_CAN_NODE_FRAME_COUNTER_t
struct | XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t

Macros

#define | CAN_MO_MOIPR_Msk (0x7U)
#define | CAN_NODE_NIPR_Msk (0x7UL)
#define | XMC_CAN_MO_MOAR_STDID_Msk ((0x000007FFUL) << XMC_CAN_MO_MOAR_STDID_Pos)
#define | XMC_CAN_MO_MOAR_STDID_Pos (18U)

Typedefs

typedef CAN_NODE_TypeDef | XMC_CAN_NODE_t
typedef CAN_GLOBAL_TypeDef | XMC_CAN_t

Enumerations

Functions

void | XMC_CAN_AllocateMOtoNodeList (XMC_CAN_t *const obj, const uint8_t node_num, const uint8_t mo_num)
void | XMC_CAN_Disable (XMC_CAN_t *const obj)
void | XMC_CAN_Enable (XMC_CAN_t *const obj)
void | XMC_CAN_EventTrigger (XMC_CAN_t *const obj, const XMC_CAN_NODE_INTERRUPT_TRIGGER_t service_requestr)
void | XMC_CAN_FIFO_DisableForeingRemoteRequest (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_DisableRemoteMonitoring (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_DisableSingleDataTransfer (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_EnableForeignRemoteRequest (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_EnableRemoteMonitoring (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_EnableSingleDataTransfer (const XMC_CAN_MO_t *const can_mo)
uint8_t | XMC_CAN_FIFO_GetCurrentMO (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_FIFO_SetSELMO (const XMC_CAN_MO_t *const can_mo, const uint8_t select_pointer)
void | XMC_CAN_GATEWAY_InitDesObject (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_GATEWAY_InitSourceObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_GATEWAY_CONFIG_t can_gateway)
void | XMC_CAN_Init (XMC_CAN_t *const obj, uint32_t can_frequency)
bool | XMC_CAN_IsPanelControlReady (XMC_CAN_t *const obj)
void | XMC_CAN_MO_AcceptOnlyMatchingIDE (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_AcceptStandardAndExtendedID (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_Config (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_DataLengthCode (const XMC_CAN_MO_t *const can_mo, const uint8_t data_length_code)
void | XMC_CAN_MO_DisableEvent (const XMC_CAN_MO_t *const can_mo, const uint32_t event)
void | XMC_CAN_MO_DisableSingleTransmitTrial (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_EnableEvent (const XMC_CAN_MO_t *const can_mo, const uint32_t event)
void | XMC_CAN_MO_EnableSingleTransmitTrial (const XMC_CAN_MO_t *const can_mo)
uint32_t | XMC_CAN_MO_GetAcceptanceMask (const XMC_CAN_MO_t *const can_mo)
uint8_t | XMC_CAN_MO_GetDataLengthCode (const XMC_CAN_MO_t *const can_mo)
uint32_t | XMC_CAN_MO_GetIdentifier (const XMC_CAN_MO_t *const can_mo)
uint32_t | XMC_CAN_MO_GetStatus (const XMC_CAN_MO_t *const can_mo)
XMC_CAN_STATUS_t | XMC_CAN_MO_Receive (XMC_CAN_MO_t *can_mo)
XMC_CAN_STATUS_t | XMC_CAN_MO_ReceiveData (XMC_CAN_MO_t *can_mo)
void | XMC_CAN_MO_ResetStatus (const XMC_CAN_MO_t *const can_mo, const uint32_t mask)
void | XMC_CAN_MO_SetAcceptanceMask (XMC_CAN_MO_t *const can_mo, const uint32_t can_id_mask)
void | XMC_CAN_MO_SetDataLengthCode (XMC_CAN_MO_t *const can_mo, const uint8_t data_length_code)
void | XMC_CAN_MO_SetEventNodePointer (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_MO_POINTER_EVENT_t can_mo_ptr_int, const uint32_t service_request)
void | XMC_CAN_MO_SetExtendedID (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_SetIdentifier (XMC_CAN_MO_t *const can_mo, const uint32_t can_identifier)
void | XMC_CAN_MO_SetStandardID (XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_MO_SetStatus (const XMC_CAN_MO_t *const can_mo, const uint32_t mask)
XMC_CAN_STATUS_t | XMC_CAN_MO_Transmit (const XMC_CAN_MO_t *const can_mo)
XMC_CAN_STATUS_t | XMC_CAN_MO_UpdateData (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_NODE_ClearStatus (XMC_CAN_NODE_t *const can_node, XMC_CAN_NODE_STATUS_t can_node_status)
void | XMC_CAN_NODE_Disable (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_DisableConfigurationChange (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_DisableEvent (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_EVENT_t event)
void | XMC_CAN_NODE_DisableLoopBack (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_Enable (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_EnableConfigurationChange (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_EnableEvent (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_EVENT_t event)
void | XMC_CAN_NODE_EnableLoopBack (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_EnableSuspend (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_FrameCounterConfigure (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_FRAME_COUNTER_t *const can_node_init)
uint16_t | XMC_CAN_NODE_GetCANFrameCounter (XMC_CAN_NODE_t *const can_node)
uint8_t | XMC_CAN_NODE_GetErrorWarningLevel (XMC_CAN_NODE_t *const can_node)
XMC_CAN_NODE_LAST_ERROR_DIR_t | XMC_CAN_NODE_GetLastErrTransferDir (XMC_CAN_NODE_t *const node)
XMC_CAN_NODE_LAST_ERROR_INC_t | XMC_CAN_NODE_GetLastErrTransferInc (XMC_CAN_NODE_t *const node)
uint8_t | XMC_CAN_NODE_GetReceiveErrorCounter (XMC_CAN_NODE_t *const can_node)
uint32_t | XMC_CAN_NODE_GetStatus (XMC_CAN_NODE_t *const can_node)
uint8_t | XMC_CAN_NODE_GetTransmitErrorCounter (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_NominalBitTimeConfigure (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_NOMINAL_BIT_TIME_CONFIG_t *const can_bit_time)
void | XMC_CAN_NODE_ReSetAnalyzerMode (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_ResetInitBit (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_SetAnalyzerMode (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_SetErrorWarningLevel (XMC_CAN_NODE_t *const can_node, uint8_t error_warning_level)
void | XMC_CAN_NODE_SetEventNodePointer (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_POINTER_EVENT_t ptr_event, const uint32_t service_request)
void | XMC_CAN_NODE_SetInitBit (XMC_CAN_NODE_t *const can_node)
void | XMC_CAN_NODE_SetReceiveErrorCounter (XMC_CAN_NODE_t *const can_node, uint8_t can_rec)
void | XMC_CAN_NODE_SetReceiveInput (XMC_CAN_NODE_t *const can_node, const XMC_CAN_NODE_RECEIVE_INPUT_t input)
void | XMC_CAN_NODE_SetTransmitErrorCounter (XMC_CAN_NODE_t *const can_node, uint8_t can_tec)
void | XMC_CAN_PanelControl (XMC_CAN_t *const obj, const XMC_CAN_PANCMD_t pancmd, const uint8_t arg1, const uint8_t arg2)
void | XMC_CAN_RXFIFO_ConfigMOBaseObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_FIFO_CONFIG_t can_fifo)
void | XMC_CAN_RXFIFO_ConfigMOSlaveObject (const XMC_CAN_MO_t *const can_mo)
void | XMC_CAN_TXFIFO_ConfigMOBaseObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_FIFO_CONFIG_t can_fifo)
void | XMC_CAN_TXFIFO_ConfigMOSlaveObject (const XMC_CAN_MO_t *const can_mo, const XMC_CAN_FIFO_CONFIG_t can_fifo)
XMC_CAN_STATUS_t | XMC_CAN_TXFIFO_Transmit (const XMC_CAN_MO_t *const can_mo)

Detailed Description

Date
2016-06-07
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_ccu4.h File Reference

  • File List
  • Globals
  • inc
Data Structures | Typedefs | Enumerations | Functions
xmc_ccu4.h File Reference
#include "xmc_common.h"
#include "xmc1_ccu4_map.h"
Include dependency graph for xmc_ccu4.h:

Data Structures

struct | XMC_CCU4_SLICE_CAPTURE_CONFIG_t
struct | XMC_CCU4_SLICE_COMPARE_CONFIG_t
struct | XMC_CCU4_SLICE_EVENT_CONFIG_t

Typedefs

typedef CCU4_GLOBAL_TypeDef | XMC_CCU4_MODULE_t
typedef uint8_t | XMC_CCU4_SLICE_INPUT_t
typedef CCU4_CC4_TypeDef | XMC_CCU4_SLICE_t

Enumerations

Functions

void | XMC_CCU4_DisableClock (XMC_CCU4_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU4_DisableModule (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_EnableClock (XMC_CCU4_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU4_EnableModule (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_EnableMultipleClocks (XMC_CCU4_MODULE_t *const module, const uint8_t clock_mask)
void | XMC_CCU4_EnableShadowTransfer (XMC_CCU4_MODULE_t *const module, const uint32_t shadow_transfer_msk)
void | XMC_CCU4_Init (XMC_CCU4_MODULE_t *const module, const XMC_CCU4_SLICE_MCMS_ACTION_t mcs_action)
bool | XMC_CCU4_IsPrescalerRunning (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_SetModuleClock (XMC_CCU4_MODULE_t *const module, const XMC_CCU4_CLOCK_t clock)
void | XMC_CCU4_SetMultiChannelShadowTransferMode (XMC_CCU4_MODULE_t *const module, const uint32_t slice_mode_msk)
void | XMC_CCU4_SLICE_Capture0Config (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_Capture1Config (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_CaptureInit (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_CAPTURE_CONFIG_t *const capture_init)
void | XMC_CCU4_SLICE_ClearEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_ClearTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_CompareInit (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_COMPARE_CONFIG_t *const compare_init)
void | XMC_CCU4_SLICE_ConfigureEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_EVENT_CONFIG_t *const config)
void | XMC_CCU4_SLICE_ConfigureStatusBitOverrideEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_CONFIG_t *const ev1_config, const XMC_CCU4_SLICE_EVENT_CONFIG_t *const ev2_config)
void | XMC_CCU4_SLICE_CountConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_DirectionConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_DisableAutomaticShadowTransferRequest (XMC_CCU4_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU4_SLICE_DisableCascadedShadowTransfer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableDithering (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_DisableFloatingPrescaler (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableMultiChannelMode (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_DisableMultipleEvents (XMC_CCU4_SLICE_t *const slice, const uint16_t mask)
void | XMC_CCU4_SLICE_DisableTrap (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableAutomaticShadowTransferRequest (XMC_CCU4_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU4_SLICE_EnableCascadedShadowTransfer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableDithering (XMC_CCU4_SLICE_t *const slice, const bool period_dither, const bool duty_dither, const uint8_t spread)
void | XMC_CCU4_SLICE_EnableEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_EnableFloatingPrescaler (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableMultiChannelMode (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_EnableMultipleEvents (XMC_CCU4_SLICE_t *const slice, const uint16_t intr_mask)
void | XMC_CCU4_SLICE_EnableTrap (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_GateConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
uint32_t | XMC_CCU4_SLICE_GetCapturedValueFromFifo (const XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_CAP_REG_SET_t set)
uint32_t | XMC_CCU4_SLICE_GetCaptureRegisterValue (const XMC_CCU4_SLICE_t *const slice, const uint8_t reg_num)
XMC_CCU4_SLICE_TIMER_COUNT_DIR_t | XMC_CCU4_SLICE_GetCountingDir (const XMC_CCU4_SLICE_t *const slice)
bool | XMC_CCU4_SLICE_GetEvent (const XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
XMC_CCU4_STATUS_t | XMC_CCU4_SLICE_GetLastCapturedTimerValue (const XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_CAP_REG_SET_t set, uint32_t *val_ptr)
XMC_CCU4_SLICE_MODE_t | XMC_CCU4_SLICE_GetSliceMode (const XMC_CCU4_SLICE_t *const slice)
uint16_t | XMC_CCU4_SLICE_GetTimerCompareMatch (const XMC_CCU4_SLICE_t *const slice)
XMC_CCU4_SLICE_TIMER_COUNT_MODE_t | XMC_CCU4_SLICE_GetTimerCountingMode (const XMC_CCU4_SLICE_t *const slice)
uint16_t | XMC_CCU4_SLICE_GetTimerPeriodMatch (const XMC_CCU4_SLICE_t *const slice)
XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t | XMC_CCU4_SLICE_GetTimerRepeatMode (const XMC_CCU4_SLICE_t *const slice)
uint16_t | XMC_CCU4_SLICE_GetTimerValue (const XMC_CCU4_SLICE_t *const slice)
bool | XMC_CCU4_SLICE_IsExtendedCapReadEnabled (const XMC_CCU4_SLICE_t *const slice)
bool | XMC_CCU4_SLICE_IsTimerRunning (const XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_LoadConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event)
void | XMC_CCU4_SLICE_ModulationConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_MODULATION_MODE_t mod_mode, const bool synch_with_pwm)
void | XMC_CCU4_SLICE_SetDitherCompareValue (XMC_CCU4_SLICE_t *const slice, const uint8_t comp_val)
void | XMC_CCU4_SLICE_SetEvent (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event)
void | XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue (XMC_CCU4_SLICE_t *const slice, const uint8_t cmp_val)
void | XMC_CCU4_SLICE_SetInput (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_INPUT_t input)
void | XMC_CCU4_SLICE_SetInterruptNode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_IRQ_ID_t event, const XMC_CCU4_SLICE_SR_ID_t sr)
void | XMC_CCU4_SLICE_SetPassiveLevel (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t level)
void | XMC_CCU4_SLICE_SetPrescaler (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_PRESCALER_t div_val)
void | XMC_CCU4_SLICE_SetShadowTransferMode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t shadow_transfer_mode)
void | XMC_CCU4_SLICE_SetTimerCompareMatch (XMC_CCU4_SLICE_t *const slice, const uint16_t compare_val)
void | XMC_CCU4_SLICE_SetTimerCountingMode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_TIMER_COUNT_MODE_t mode)
void | XMC_CCU4_SLICE_SetTimerPeriodMatch (XMC_CCU4_SLICE_t *const slice, const uint16_t period_val)
void | XMC_CCU4_SLICE_SetTimerRepeatMode (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t mode)
void | XMC_CCU4_SLICE_SetTimerValue (XMC_CCU4_SLICE_t *const slice, const uint16_t timer_val)
void | XMC_CCU4_SLICE_StartConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_START_MODE_t start_mode)
void | XMC_CCU4_SLICE_StartTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_StatusBitOverrideConfig (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_StopClearTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_StopConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_EVENT_t event, const XMC_CCU4_SLICE_END_MODE_t end_mode)
void | XMC_CCU4_SLICE_StopTimer (XMC_CCU4_SLICE_t *const slice)
void | XMC_CCU4_SLICE_TrapConfig (XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_TRAP_EXIT_MODE_t exit_mode, bool synch_with_pwm)
void | XMC_CCU4_SLICE_WriteCoherentlyWithPWMCycle (XMC_CCU4_SLICE_t *const slice, const uint32_t coherent_write)
void | XMC_CCU4_SLICE_WriteImmediateAfterShadowTransfer (XMC_CCU4_SLICE_t *const slice, const uint32_t immediate_write)
void | XMC_CCU4_StartPrescaler (XMC_CCU4_MODULE_t *const module)
void | XMC_CCU4_StopPrescaler (XMC_CCU4_MODULE_t *const module)

Detailed Description

Date
2017-04-27
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_ccu8.h File Reference

  • File List
  • Globals
  • inc
Data Structures | Typedefs | Enumerations | Functions
xmc_ccu8.h File Reference
#include "xmc_common.h"
#include "xmc1_ccu8_map.h"
Include dependency graph for xmc_ccu8.h:

Data Structures

struct | XMC_CCU8_SLICE_CAPTURE_CONFIG_t
struct | XMC_CCU8_SLICE_COMPARE_CONFIG_t
struct | XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t
struct | XMC_CCU8_SLICE_EVENT_CONFIG_t

Typedefs

typedef CCU8_GLOBAL_TypeDef | XMC_CCU8_MODULE_t
typedef uint8_t | XMC_CCU8_SLICE_INPUT_t
typedef CCU8_CC8_TypeDef | XMC_CCU8_SLICE_t

Enumerations

Functions

void | XMC_CCU8_DisableClock (XMC_CCU8_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU8_DisableModule (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_EnableClock (XMC_CCU8_MODULE_t *const module, const uint8_t slice_number)
void | XMC_CCU8_EnableModule (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_EnableMultipleClocks (XMC_CCU8_MODULE_t *const module, const uint8_t clock_mask)
void | XMC_CCU8_EnableShadowTransfer (XMC_CCU8_MODULE_t *const module, const uint32_t shadow_transfer_msk)
void | XMC_CCU8_Init (XMC_CCU8_MODULE_t *const module, const XMC_CCU8_SLICE_MCMS_ACTION_t mcs_action)
bool | XMC_CCU8_IsPrescalerRunning (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_SetModuleClock (XMC_CCU8_MODULE_t *const module, const XMC_CCU8_CLOCK_t clock)
void | XMC_CCU8_SetMultiChannelShadowTransferMode (XMC_CCU8_MODULE_t *const module, const uint32_t slice_mode_msk)
void | XMC_CCU8_SLICE_Capture0Config (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_Capture1Config (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_CaptureInit (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_CAPTURE_CONFIG_t *const capture_init)
void | XMC_CCU8_SLICE_ClearEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_ClearTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_CompareInit (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CONFIG_t *const compare_init)
void | XMC_CCU8_SLICE_ConfigureDeadTime (XMC_CCU8_SLICE_t *const slice, const uint8_t mask)
void | XMC_CCU8_SLICE_ConfigureEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_EVENT_CONFIG_t *config)
void | XMC_CCU8_SLICE_ConfigureStatusBitOutput (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_STATUS_t channel)
void | XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_CONFIG_t *const ev1_config, const XMC_CCU8_SLICE_EVENT_CONFIG_t *const ev2_config)
void | XMC_CCU8_SLICE_CountConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_DeadTimeInit (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t *const config)
void | XMC_CCU8_SLICE_DirectionConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest (XMC_CCU8_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU8_SLICE_DisableCascadedShadowTransfer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_DisableDithering (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_DisableEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_DisableFloatingPrescaler (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_DisableMultiChannelMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
void | XMC_CCU8_SLICE_DisableMultipleEvents (XMC_CCU8_SLICE_t *const slice, const uint16_t mask)
void | XMC_CCU8_SLICE_DisableTrap (XMC_CCU8_SLICE_t *const slice, const uint32_t out_mask)
void | XMC_CCU8_SLICE_EnableAsymmetricCompareMode (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest (XMC_CCU8_SLICE_t *const slice, const uint32_t automatic_shadow_transfer)
void | XMC_CCU8_SLICE_EnableCascadedShadowTransfer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableDithering (XMC_CCU8_SLICE_t *const slice, const bool period_dither, const bool duty_dither, const uint8_t spread)
void | XMC_CCU8_SLICE_EnableEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_EnableFloatingPrescaler (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableMultiChannelMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
void | XMC_CCU8_SLICE_EnableMultipleEvents (XMC_CCU8_SLICE_t *const slice, const uint16_t mask)
void | XMC_CCU8_SLICE_EnableSymmetricCompareMode (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_EnableTrap (XMC_CCU8_SLICE_t *const slice, const uint32_t out_mask)
void | XMC_CCU8_SLICE_GateConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
uint32_t | XMC_CCU8_SLICE_GetCapturedValueFromFifo (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_CAP_REG_SET_t set)
uint32_t | XMC_CCU8_SLICE_GetCaptureRegisterValue (const XMC_CCU8_SLICE_t *const slice, const uint8_t reg_num)
XMC_CCU8_SLICE_TIMER_COUNT_DIR_t | XMC_CCU8_SLICE_GetCountingDir (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_GetEvent (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
XMC_CCU8_STATUS_t | XMC_CCU8_SLICE_GetLastCapturedTimerValue (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_CAP_REG_SET_t set, uint32_t *val_ptr)
XMC_CCU8_SLICE_MODE_t | XMC_CCU8_SLICE_GetSliceMode (const XMC_CCU8_SLICE_t *const slice)
uint16_t | XMC_CCU8_SLICE_GetTimerCompareMatch (const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel)
XMC_CCU8_SLICE_TIMER_COUNT_MODE_t | XMC_CCU8_SLICE_GetTimerCountingMode (const XMC_CCU8_SLICE_t *const slice)
uint16_t | XMC_CCU8_SLICE_GetTimerPeriodMatch (const XMC_CCU8_SLICE_t *const slice)
XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t | XMC_CCU8_SLICE_GetTimerRepeatMode (const XMC_CCU8_SLICE_t *const slice)
uint16_t | XMC_CCU8_SLICE_GetTimerValue (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsDeadTimeCntr1Running (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsDeadTimeCntr2Running (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsExtendedCapReadEnabled (const XMC_CCU8_SLICE_t *const slice)
bool | XMC_CCU8_SLICE_IsTimerRunning (const XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_LoadConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event)
void | XMC_CCU8_SLICE_LoadSelector (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
void | XMC_CCU8_SLICE_ModulationConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_MODULATION_MODE_t mod_mode, const XMC_CCU8_SLICE_MODULATION_CHANNEL_t channel, const bool synch_with_pwm)
void | XMC_CCU8_SLICE_SetDeadTimePrescaler (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_DTC_DIV_t div_val)
void | XMC_CCU8_SLICE_SetDeadTimeValue (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel, const uint8_t rise_value, const uint8_t fall_value)
void | XMC_CCU8_SLICE_SetDitherCompareValue (XMC_CCU8_SLICE_t *const slice, const uint8_t comp_val)
void | XMC_CCU8_SLICE_SetEvent (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
void | XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue (XMC_CCU8_SLICE_t *const slice, const uint8_t cmp_val)
void | XMC_CCU8_SLICE_SetInput (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_INPUT_t input)
void | XMC_CCU8_SLICE_SetInterruptNode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event, const XMC_CCU8_SLICE_SR_ID_t sr)
void | XMC_CCU8_SLICE_SetOutPath (XMC_CCU8_SLICE_t *const slice, const uint32_t out_path_msk)
void | XMC_CCU8_SLICE_SetPassiveLevel (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_OUTPUT_t out, const XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t level)
void | XMC_CCU8_SLICE_SetPrescaler (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_PRESCALER_t div_val)
void | XMC_CCU8_SLICE_SetShadowTransferMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t shadow_transfer_mode)
void | XMC_CCU8_SLICE_SetTimerCompareMatch (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel, const uint16_t compare_val)
void | XMC_CCU8_SLICE_SetTimerCompareMatchChannel1 (XMC_CCU8_SLICE_t *const slice, const uint16_t compare_val)
void | XMC_CCU8_SLICE_SetTimerCompareMatchChannel2 (XMC_CCU8_SLICE_t *const slice, const uint16_t compare_val)
void | XMC_CCU8_SLICE_SetTimerCountingMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TIMER_COUNT_MODE_t mode)
void | XMC_CCU8_SLICE_SetTimerPeriodMatch (XMC_CCU8_SLICE_t *const slice, const uint16_t period_val)
void | XMC_CCU8_SLICE_SetTimerRepeatMode (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t mode)
void | XMC_CCU8_SLICE_SetTimerValue (XMC_CCU8_SLICE_t *const slice, const uint16_t timer_val)
void | XMC_CCU8_SLICE_StartConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_START_MODE_t start_mode)
void | XMC_CCU8_SLICE_StartTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_StatusBitOverrideConfig (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_StopClearTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_StopConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event, const XMC_CCU8_SLICE_END_MODE_t end_mode)
void | XMC_CCU8_SLICE_StopTimer (XMC_CCU8_SLICE_t *const slice)
void | XMC_CCU8_SLICE_TrapConfig (XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TRAP_EXIT_MODE_t exit_mode, bool synch_with_pwm)
void | XMC_CCU8_SLICE_WriteCoherentlyWithPWMCycle (XMC_CCU8_SLICE_t *const slice, const uint32_t coherent_write)
void | XMC_CCU8_SLICE_WriteImmediateAfterShadowTransfer (XMC_CCU8_SLICE_t *const slice, const uint32_t immediate_write)
void | XMC_CCU8_StartPrescaler (XMC_CCU8_MODULE_t *const module)
void | XMC_CCU8_StopPrescaler (XMC_CCU8_MODULE_t *const module)

Detailed Description

Date
2017-04-27
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_eru.h File Reference

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xmc_eru.h File Reference
#include "xmc_common.h"
#include "xmc1_eru_map.h"
Include dependency graph for xmc_eru.h:

Data Structures

struct | XMC_ERU_ETL_CONFIG_t
union | XMC_ERU_OGU_CONFIG_t
struct | XMC_ERU_t

Enumerations

Functions

void | XMC_ERU_Disable (XMC_ERU_t *const eru)
void | XMC_ERU_Enable (XMC_ERU_t *const eru)
void | XMC_ERU_ETL_ClearStatusFlag (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_DisableOutputTrigger (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_EnableOutputTrigger (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t trigger)
XMC_ERU_ETL_EDGE_DETECTION_t | XMC_ERU_ETL_GetEdgeDetection (XMC_ERU_t *const eru, const uint8_t channel)
uint32_t | XMC_ERU_ETL_GetStatusFlag (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_Init (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_CONFIG_t *const config)
void | XMC_ERU_ETL_SetEdgeDetection (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_EDGE_DETECTION_t edge_detection)
void | XMC_ERU_ETL_SetInput (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_INPUT_A_t input_a, const XMC_ERU_ETL_INPUT_B_t input_b)
void | XMC_ERU_ETL_SetSource (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_SOURCE_t source)
void | XMC_ERU_ETL_SetStatusFlag (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_ETL_SetStatusFlagMode (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_STATUS_FLAG_MODE_t mode)
void | XMC_ERU_OGU_DisablePatternDetection (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_OGU_DisablePeripheralTrigger (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_OGU_EnablePatternDetection (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t input)
void | XMC_ERU_OGU_EnablePeripheralTrigger (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_PERIPHERAL_TRIGGER_t peripheral_trigger)
uint32_t | XMC_ERU_OGU_GetPatternDetectionStatus (XMC_ERU_t *const eru, const uint8_t channel)
void | XMC_ERU_OGU_Init (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_CONFIG_t *const config)
void | XMC_ERU_OGU_SetServiceRequestMode (XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_OGU_SERVICE_REQUEST_t mode)

Detailed Description

Date
2016-03-10
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_flash.h File Reference

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Functions
xmc_flash.h File Reference
#include "xmc_common.h"
#include "xmc1_flash.h"
Include dependency graph for xmc_flash.h:

Functions

void | XMC_FLASH_ClearStatus (void)
void | XMC_FLASH_DisableEvent (const uint32_t event_msk)
void | XMC_FLASH_EnableEvent (const uint32_t event_msk)
void | XMC_FLASH_EraseSector (uint32_t *address)
uint32_t | XMC_FLASH_GetStatus (void)
bool | XMC_FLASH_IsBusy (void)
void | XMC_FLASH_ProgramPage (uint32_t *address, const uint32_t *data)

Detailed Description

Date
2015-06-20
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_gpio.h File Reference

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Enumerations | Functions
xmc_gpio.h File Reference
#include "xmc_common.h"
#include "xmc1_gpio.h"
Include dependency graph for xmc_gpio.h:

Enumerations

Functions

void | XMC_GPIO_DisableDigitalInput (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_DisablePowerSaveMode (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_EnableDigitalInput (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_EnablePowerSaveMode (XMC_GPIO_PORT_t *const port, const uint8_t pin)
uint32_t | XMC_GPIO_GetInput (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_Init (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_CONFIG_t *const config)
void | XMC_GPIO_SetHardwareControl (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_HWCTRL_t hwctrl)
void | XMC_GPIO_SetMode (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_MODE_t mode)
void | XMC_GPIO_SetOutputHigh (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_SetOutputLevel (XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_OUTPUT_LEVEL_t level)
void | XMC_GPIO_SetOutputLow (XMC_GPIO_PORT_t *const port, const uint8_t pin)
void | XMC_GPIO_ToggleOutput (XMC_GPIO_PORT_t *const port, const uint8_t pin)

Detailed Description

Date
2015-06-20
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_i2c.h File Reference

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xmc_i2c.h File Reference
#include "xmc_usic.h"
Include dependency graph for xmc_i2c.h:

Data Structures

struct XMC_I2C_CH_CONFIG_t

Macros

#define | XMC_I2C0_CH0 XMC_USIC0_CH0
#define | XMC_I2C0_CH1 XMC_USIC0_CH1
#define | XMC_I2C1_CH0 XMC_USIC1_CH0
#define | XMC_I2C1_CH1 XMC_USIC1_CH1
#define | XMC_I2C2_CH0 XMC_USIC2_CH0
#define | XMC_I2C2_CH1 XMC_USIC2_CH1
#define | XMC_I2C_10BIT_ADDR_GROUP (0x7800U)

Enumerations

Functions

void | XMC_I2C_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, uint32_t flag)
void | XMC_I2C_CH_ConfigExternalInputSignalToBRG (XMC_USIC_CH_t *const channel, const uint16_t pdiv, const uint32_t oversampling, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_I2C_CH_DisableAcknowledgeAddress0 (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_DisableEvent (XMC_USIC_CH_t *const channel, uint32_t event)
void | XMC_I2C_CH_EnableAcknowledgeAddress0 (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_EnableEvent (XMC_USIC_CH_t *const channel, uint32_t event)
uint8_t | XMC_I2C_CH_GetReceivedData (const XMC_USIC_CH_t *const channel)
uint8_t | XMC_I2C_CH_GetReceiverStatusFlag (XMC_USIC_CH_t *const channel)
uint16_t | XMC_I2C_CH_GetSlaveAddress (const XMC_USIC_CH_t *const channel)
uint32_t | XMC_I2C_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_Init (XMC_USIC_CH_t *const channel, const XMC_I2C_CH_CONFIG_t *const config)
void | XMC_I2C_CH_MasterReceiveAck (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_MasterReceiveNack (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_MasterRepeatedStart (XMC_USIC_CH_t *const channel, const uint16_t addr, const XMC_I2C_CH_CMD_t command)
void | XMC_I2C_CH_MasterStart (XMC_USIC_CH_t *const channel, const uint16_t addr, const XMC_I2C_CH_CMD_t command)
void | XMC_I2C_CH_MasterStop (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_MasterTransmit (XMC_USIC_CH_t *const channel, const uint8_t data)
void | XMC_I2C_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_I2C_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_I2C_CH_STATUS_t | XMC_I2C_CH_SetBaudrate (XMC_USIC_CH_t *const channel, const uint32_t rate)
void | XMC_I2C_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_I2C_CH_INPUT_t input, const uint8_t source)
void | XMC_I2C_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_I2C_CH_SetSlaveAddress (XMC_USIC_CH_t *const channel, const uint16_t address)
void | XMC_I2C_CH_SlaveTransmit (XMC_USIC_CH_t *const channel, const uint8_t data)
void | XMC_I2C_CH_Start (XMC_USIC_CH_t *const channel)
XMC_I2C_CH_STATUS_t | XMC_I2C_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_I2C_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)

Detailed Description

Date
2016-05-20
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_i2s.h File Reference

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Data Structures | Macros | Functions
xmc_i2s.h File Reference
#include "xmc_usic.h"
Include dependency graph for xmc_i2s.h:

Data Structures

struct XMC_I2S_CH_CONFIG_t

Macros

#define | XMC_I2S0_CH0 XMC_USIC0_CH0
#define | XMC_I2S0_CH1 XMC_USIC0_CH1
#define | XMC_I2S1_CH0 XMC_USIC1_CH0
#define | XMC_I2S1_CH1 XMC_USIC1_CH1
#define | XMC_I2S2_CH0 XMC_USIC2_CH0
#define | XMC_I2S2_CH1 XMC_USIC2_CH1

Functions

void | XMC_I2S_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, const uint32_t flag)
void | XMC_I2S_CH_ConfigureShiftClockOutput (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t clock_output)
void | XMC_I2S_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_DisableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_I2S_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INPUT_t input)
void | XMC_I2S_CH_DisableMasterClock (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_EnableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_I2S_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INPUT_t input)
void | XMC_I2S_CH_EnableMasterClock (XMC_USIC_CH_t *const channel)
uint16_t | XMC_I2S_CH_GetReceivedData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_I2S_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_Init (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_CONFIG_t *const config)
void | XMC_I2S_CH_Receive (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_CHANNEL_t channel_number)
void | XMC_I2S_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_I2S_CH_STATUS_t | XMC_I2S_CH_SetBaudrate (XMC_USIC_CH_t *const channel, const uint32_t rate)
void | XMC_I2S_CH_SetBitOrderLsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_SetBitOrderMsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_I2S_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_INPUT_t input, const uint8_t source)
void | XMC_I2S_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_I2S_CH_SetSystemWordLength (XMC_USIC_CH_t *const channel, uint32_t sclk_cycles_system_word_length)
void | XMC_I2S_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_I2S_CH_Start (XMC_USIC_CH_t *const channel)
XMC_I2S_CH_STATUS_t | XMC_I2S_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_I2S_CH_Transmit (XMC_USIC_CH_t *const channel, const uint16_t data, const XMC_I2S_CH_CHANNEL_t channel_number)
void | XMC_I2S_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)
void | XMC_I2S_CH_WordAddressSignalPolarity (XMC_USIC_CH_t *const channel, const XMC_I2S_CH_WA_POLARITY_t wa_inversion)

Detailed Description

Date
2016-06-30
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_ledts.h File Reference

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Data Structures | Macros | Typedefs | Enumerations | Functions
xmc_ledts.h File Reference
#include <xmc_common.h>
#include "xmc_scu.h"
Include dependency graph for xmc_ledts.h:

Data Structures

struct | XMC_LEDTS_GLOBAL_CONFIG_t
struct | XMC_LEDTS_GLOBAL_t
struct | XMC_LEDTS_LED_CONFIG_t
struct | XMC_LEDTS_TS_CONFIG_ADVANCED_t
struct | XMC_LEDTS_TS_CONFIG_BASIC_t

Macros

#define | XMC_LEDTS0 ((XMC_LEDTS_GLOBAL_t *) LEDTS0)
#define | XMC_LEDTS0 ((XMC_LEDTS_GLOBAL_t *) LEDTS0)
#define | XMC_LEDTS1 ((XMC_LEDTS_GLOBAL_t *) LEDTS1)
#define | XMC_LEDTS1 ((XMC_LEDTS_GLOBAL_t *) LEDTS1)
#define | XMC_LEDTS2 ((XMC_LEDTS_GLOBAL_t *) LEDTS2)

Typedefs

typedef XMC_LEDTS_GLOBAL_t XMC_LEDTS_t

Enumerations

Functions

void | XMC_LEDTS_ClearInterruptFlag (XMC_LEDTS_t *const ledts, uint32_t interrupt_mask)
void | XMC_LEDTS_DisableInterrupt (XMC_LEDTS_t *const ledts, uint32_t interrupt_mask)
void | XMC_LEDTS_EnableInterrupt (XMC_LEDTS_t *const ledts, uint32_t interrupt_mask)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitGlobal (XMC_LEDTS_t *const ledts, const XMC_LEDTS_GLOBAL_CONFIG_t *config)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitLED (XMC_LEDTS_t *const ledts, const XMC_LEDTS_LED_CONFIG_t *config)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitTSAdvanced (XMC_LEDTS_t *const ledts, const XMC_LEDTS_TS_CONFIG_ADVANCED_t *config)
XMC_LEDTS_STATUS_t | XMC_LEDTS_InitTSBasic (XMC_LEDTS_t *const ledts, const XMC_LEDTS_TS_CONFIG_BASIC_t *config)
uint32_t | XMC_LEDTS_ReadFNCOL (XMC_LEDTS_t *const ledts)
uint32_t | XMC_LEDTS_ReadInterruptFlag (XMC_LEDTS_t *const ledts)
uint16_t | XMC_LEDTS_ReadTSVAL (XMC_LEDTS_t *const ledts)
void | XMC_LEDTS_SetActivePADNo (XMC_LEDTS_t *const ledts, XMC_LEDTS_NUMBER_TS_INPUT_t pad_num)
void | XMC_LEDTS_SetColumnBrightness (XMC_LEDTS_t *const ledts, XMC_LEDTS_LED_COLUMN_t column, const uint8_t brightness)
void | XMC_LEDTS_SetCommonOscillationWindow (XMC_LEDTS_t *const ledts, const uint8_t common_size)
void | XMC_LEDTS_SetLEDLinePattern (XMC_LEDTS_t *const ledts, XMC_LEDTS_LED_COLUMN_t column, const uint8_t pattern)
void | XMC_LEDTS_SetNumOfLEDColumns (XMC_LEDTS_t *const ledts, uint8_t count)
void | XMC_LEDTS_SetOscillationWindow (XMC_LEDTS_t *const ledts, XMC_LEDTS_NUMBER_TS_INPUT_t touchpad, const uint8_t size)
void | XMC_LEDTS_StartCounter (XMC_LEDTS_t *const ledts, const uint16_t prescaler)
void | XMC_LEDTS_StopCounter (XMC_LEDTS_t *const ledts)

Detailed Description

Date
2015-06-20
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_math.h File Reference

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Macros | Functions
xmc_math.h File Reference
#include <xmc_common.h>
#include <xmc_scu.h>
Include dependency graph for xmc_math.h:

Macros

#define | XMC_MATH_Q0_11(x) ((XMC_MATH_Q0_11_t)(((x) >= 0) ? ((x) * (1 << 11) + 0.5) : ((x) * (1 << 11) - 0.5)))
#define | XMC_MATH_Q0_23(x) ((XMC_MATH_Q0_23_t)(((x) >= 0) ? ((x) * (1 << 23) + 0.5) : ((x) * (1 << 23) - 0.5)))

Functions

void | XMC_MATH_ClearEvent (const XMC_MATH_EVENT_t event)
XMC_MATH_Q0_23_t | XMC_MATH_CORDIC_ArcTan (XMC_MATH_Q8_15_t x, XMC_MATH_Q8_15_t y)
void | XMC_MATH_CORDIC_ArcTanNB (XMC_MATH_Q8_15_t x, XMC_MATH_Q8_15_t y)
XMC_MATH_Q0_23_t | XMC_MATH_CORDIC_Cos (XMC_MATH_Q0_23_t angle_in_radians)
XMC_MATH_Q1_22_t | XMC_MATH_CORDIC_Cosh (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_CORDIC_CoshNB (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_CORDIC_CosNB (XMC_MATH_Q0_23_t angle_in_radians)
XMC_MATH_Q0_23_t | XMC_MATH_CORDIC_GetArcTanResult (void)
XMC_MATH_Q1_22_t | XMC_MATH_CORDIC_GetCoshResult (void)
XMC_MATH_Q0_23_t | XMC_MATH_CORDIC_GetCosResult (void)
XMC_MATH_Q1_22_t | XMC_MATH_CORDIC_GetSinhResult (void)
XMC_MATH_Q0_23_t | XMC_MATH_CORDIC_GetSinResult (void)
XMC_MATH_Q0_11_t | XMC_MATH_CORDIC_GetTanhResult (void)
XMC_MATH_Q0_11_t | XMC_MATH_CORDIC_GetTanResult (void)
bool | XMC_MATH_CORDIC_IsBusy (void)
int16_t | XMC_MATH_CORDIC_Q15_Sqrt (int16_t x)
int32_t | XMC_MATH_CORDIC_Q31_Sqrt (int32_t x)
XMC_MATH_Q0_23_t | XMC_MATH_CORDIC_Sin (XMC_MATH_Q0_23_t angle_in_radians)
XMC_MATH_Q1_22_t | XMC_MATH_CORDIC_Sinh (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_CORDIC_SinhNB (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_CORDIC_SinNB (XMC_MATH_Q0_23_t angle_in_radians)
XMC_MATH_Q0_11_t | XMC_MATH_CORDIC_Tan (XMC_MATH_Q0_23_t angle_in_radians)
XMC_MATH_Q0_11_t | XMC_MATH_CORDIC_Tanh (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_CORDIC_TanhNB (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_CORDIC_TanNB (XMC_MATH_Q0_23_t angle_in_radians)
void | XMC_MATH_Disable (void)
void | XMC_MATH_DisableEvent (const XMC_MATH_EVENT_t event)
int32_t | XMC_MATH_DIV_GetSignedDivResult (void)
int32_t | XMC_MATH_DIV_GetSignedModResult (void)
uint32_t | XMC_MATH_DIV_GetUnsignedDivResult (void)
uint32_t | XMC_MATH_DIV_GetUnsignedModResult (void)
bool | XMC_MATH_DIV_IsBusy (void)
void | XMC_MATH_DIV_SignedDivNB (int32_t dividend, int32_t divisor)
void | XMC_MATH_DIV_SignedModNB (int32_t dividend, int32_t divisor)
void | XMC_MATH_DIV_UnsignedDivNB (uint32_t dividend, uint32_t divisor)
void | XMC_MATH_DIV_UnsignedModNB (uint32_t dividend, uint32_t divisor)
void | XMC_MATH_Enable (void)
void | XMC_MATH_EnableEvent (const XMC_MATH_EVENT_t event)
bool | XMC_MATH_GetEventStatus (const XMC_MATH_EVENT_t event)
void | XMC_MATH_SetEvent (const XMC_MATH_EVENT_t event)

Detailed Description

Date
2015-10-08
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_pau.h File Reference

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xmc_pau.h File Reference
#include "xmc_common.h"
Include dependency graph for xmc_pau.h:

Data Structures

struct XMC_PAU_t

Macros

#define XMC_PAU ((XMC_PAU_t *) PAU_BASE)

Enumerations

Functions

void | XMC_PAU_DisablePeripheralAccess (XMC_PAU_PERIPHERAL_t peripheral)
void | XMC_PAU_EnablePeripheralAccess (XMC_PAU_PERIPHERAL_t peripheral)
uint32_t | XMC_PAU_GetFlashSize (void)
uint32_t | XMC_PAU_GetRAMSize (void)
uint32_t | XMC_PAU_GetROMSize (void)
bool | XMC_PAU_IsPeripheralAccessEnabled (XMC_PAU_PERIPHERAL_t peripheral)
bool | XMC_PAU_IsPeripheralAvailable (XMC_PAU_PERIPHERAL_t peripheral)

Detailed Description

Date
2015-06-20
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_posif.h File Reference

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xmc_posif.h File Reference
#include <xmc_common.h>
#include <xmc_scu.h>
#include "xmc_posif_map.h"
Include dependency graph for xmc_posif.h:

Data Structures

struct | XMC_POSIF_CONFIG_t
struct | XMC_POSIF_HSC_CONFIG_t
struct | XMC_POSIF_MCM_CONFIG_t
struct | XMC_POSIF_QD_CONFIG_t

Typedefs

typedef POSIF_GLOBAL_TypeDef XMC_POSIF_t

Enumerations

Functions

void | XMC_POSIF_ClearEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
void | XMC_POSIF_Disable (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_DisableEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
void | XMC_POSIF_Enable (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_EnableEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
uint8_t | XMC_POSIF_GetEventStatus (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
uint8_t | XMC_POSIF_HSC_GetCurrentPattern (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_HSC_GetExpectedPattern (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_HSC_GetLastSampledPattern (XMC_POSIF_t *const peripheral)
XMC_POSIF_STATUS_t | XMC_POSIF_HSC_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_HSC_CONFIG_t *const config)
void | XMC_POSIF_HSC_SetCurrentPattern (XMC_POSIF_t *const peripheral, const uint8_t pattern)
void | XMC_POSIF_HSC_SetExpectedPattern (XMC_POSIF_t *const peripheral, const uint8_t pattern)
void | XMC_POSIF_HSC_SetHallPatterns (XMC_POSIF_t *const peripheral, const uint8_t pattern_mask)
void | XMC_POSIF_HSC_UpdateHallPattern (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_CONFIG_t *const config)
bool | XMC_POSIF_IsRunning (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_MCM_EnableMultiChannelPatternUpdate (XMC_POSIF_t *const peripheral)
uint16_t | XMC_POSIF_MCM_GetMultiChannelPattern (XMC_POSIF_t *const peripheral)
uint16_t | XMC_POSIF_MCM_GetShadowMultiChannelPattern (XMC_POSIF_t *const peripheral)
XMC_POSIF_STATUS_t | XMC_POSIF_MCM_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_MCM_CONFIG_t *const config)
void | XMC_POSIF_MCM_SetMultiChannelPattern (XMC_POSIF_t *const peripheral, const uint16_t pattern)
void | XMC_POSIF_MCM_UpdateMultiChannelPattern (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_QD_GetCurrentIndexValue (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_QD_GetCurrentState (XMC_POSIF_t *const peripheral)
XMC_POSIF_QD_DIR_t | XMC_POSIF_QD_GetDirection (XMC_POSIF_t *const peripheral)
uint8_t | XMC_POSIF_QD_GetPreviousState (XMC_POSIF_t *const peripheral)
XMC_POSIF_STATUS_t | XMC_POSIF_QD_Init (XMC_POSIF_t *const peripheral, const XMC_POSIF_QD_CONFIG_t *const config)
void | XMC_POSIF_SelectInputSource (XMC_POSIF_t *const peripheral, const XMC_POSIF_INPUT_PORT_t input0, const XMC_POSIF_INPUT_PORT_t input1, const XMC_POSIF_INPUT_PORT_t input2)
void | XMC_POSIF_SetEvent (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event)
void | XMC_POSIF_SetInterruptNode (XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event, const XMC_POSIF_SR_ID_t sr)
void | XMC_POSIF_SetMode (XMC_POSIF_t *const peripheral, const XMC_POSIF_MODE_t mode)
void | XMC_POSIF_Start (XMC_POSIF_t *const peripheral)
void | XMC_POSIF_Stop (XMC_POSIF_t *const peripheral)

Detailed Description

Date
2017-06-24
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_prng.h File Reference

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xmc_prng.h File Reference
#include "xmc_common.h"
Include dependency graph for xmc_prng.h:

Data Structures

struct XMC_PRNG_INIT_t

Macros

#define XMC_PRNG_RDBS_BYTE_READ_MASK (0x00FFU)

Enumerations

Functions

uint16_t | XMC_PRNG_CheckValidStatus (void)
void | XMC_PRNG_EnableKeyLoadingMode (void)
void | XMC_PRNG_EnableStreamingMode (void)
uint16_t | XMC_PRNG_GetPseudoRandomNumber (void)
XMC_PRNG_INIT_STATUS_t | XMC_PRNG_Init (const XMC_PRNG_INIT_t *prng)
void | XMC_PRNG_LoadKeyWords (uint16_t key)
void | XMC_PRNG_SetRandomDataBlockSize (XMC_PRNG_DATA_BLOCK_SIZE_t block_size)

Detailed Description

Date
2015-06-20
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_rtc.h File Reference

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xmc_rtc.h File Reference
#include <xmc_common.h>
#include <time.h>
#include "xmc1_rtc.h"
Include dependency graph for xmc_rtc.h:

Data Structures

struct | XMC_RTC_ALARM_t
struct | XMC_RTC_CONFIG_t
struct | XMC_RTC_TIME_t

Enumerations

Functions

void | XMC_RTC_ClearEvent (const uint32_t event)
void | XMC_RTC_Disable (void)
void | XMC_RTC_DisableEvent (const uint32_t event)
void | XMC_RTC_Enable (void)
void | XMC_RTC_EnableEvent (const uint32_t event)
void | XMC_RTC_GetAlarm (XMC_RTC_ALARM_t *const alarm)
void | XMC_RTC_GetAlarmStdFormat (struct tm *const stdtime)
uint32_t | XMC_RTC_GetEventStatus (void)
uint32_t | XMC_RTC_GetPrescaler (void)
void | XMC_RTC_GetTime (XMC_RTC_TIME_t *const time)
void | XMC_RTC_GetTimeStdFormat (struct tm *const stdtime)
XMC_RTC_STATUS_t | XMC_RTC_Init (const XMC_RTC_CONFIG_t *const config)
bool | XMC_RTC_IsEnabled (void)
bool | XMC_RTC_IsRunning (void)
void | XMC_RTC_SetAlarm (const XMC_RTC_ALARM_t *const alarm)
void | XMC_RTC_SetAlarmStdFormat (const struct tm *const stdtime)
void | XMC_RTC_SetPrescaler (uint16_t prescaler)
void | XMC_RTC_SetTime (const XMC_RTC_TIME_t *const timeval)
void | XMC_RTC_SetTimeStdFormat (const struct tm *const stdtime)
void | XMC_RTC_Start (void)
void | XMC_RTC_Stop (void)

Detailed Description

Date
2016-05-19
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_scu.h File Reference

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xmc_scu.h File Reference
#include <xmc_common.h>
#include <xmc1_scu.h>
Include dependency graph for xmc_scu.h:

Typedefs

typedef void(* XMC_SCU_INTERRUPT_EVENT_HANDLER_t) (void)

Enumerations

Functions

void | XMC_SCU_CLOCK_GatePeripheralClock (const XMC_SCU_PERIPHERAL_CLOCK_t peripheral)
uint32_t | XMC_SCU_CLOCK_GetCpuClockFrequency (void)
uint32_t | XMC_SCU_CLOCK_GetPeripheralClockFrequency (void)
void | XMC_SCU_CLOCK_Init (const XMC_SCU_CLOCK_CONFIG_t *const config)
bool | XMC_SCU_CLOCK_IsPeripheralClockGated (const XMC_SCU_PERIPHERAL_CLOCK_t peripheral)
void | XMC_SCU_CLOCK_UngatePeripheralClock (const XMC_SCU_PERIPHERAL_CLOCK_t peripheral)
uint32_t | XMC_SCU_GetMirrorStatus (void)
void | XMC_SCU_INTERRUPT_ClearEventStatus (const XMC_SCU_INTERRUPT_EVENT_t event)
void | XMC_SCU_INTERRUPT_DisableEvent (const XMC_SCU_INTERRUPT_EVENT_t event)
void | XMC_SCU_INTERRUPT_EnableEvent (const XMC_SCU_INTERRUPT_EVENT_t event)
XMC_SCU_STATUS_t | XMC_SCU_INTERRUPT_SetEventHandler (const XMC_SCU_INTERRUPT_EVENT_t event, const XMC_SCU_INTERRUPT_EVENT_HANDLER_t handler)
void | XMC_SCU_INTERRUPT_TriggerEvent (const XMC_SCU_INTERRUPT_EVENT_t event)
XMC_SCU_INTERRUPT_EVENT_t | XMC_SCU_INTERUPT_GetEventStatus (void)
void | XMC_SCU_IRQHandler (uint32_t sr_num)
void | XMC_SCU_RESET_ClearDeviceResetReason (void)
uint32_t | XMC_SCU_RESET_GetDeviceResetReason (void)
void | XMC_SCU_SetCcuTriggerHigh (const uint32_t trigger)
void | XMC_SCU_SetCcuTriggerLow (const uint32_t trigger)

Detailed Description

Date
2016-03-09
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_spi.h File Reference

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xmc_spi.h File Reference
#include "xmc_usic.h"
Include dependency graph for xmc_spi.h:

Data Structures

struct XMC_SPI_CH_CONFIG_t

Macros

#define | XMC_SPI0_CH0 XMC_USIC0_CH0
#define | XMC_SPI0_CH1 XMC_USIC0_CH1
#define | XMC_SPI1_CH0 XMC_USIC1_CH0
#define | XMC_SPI1_CH1 XMC_USIC1_CH1
#define | XMC_SPI2_CH0 XMC_USIC2_CH0
#define | XMC_SPI2_CH1 XMC_USIC2_CH1

Enumerations

Functions

void | XMC_SPI_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, const uint32_t flag)
void | XMC_SPI_CH_ConfigExternalInputSignalToBRG (XMC_USIC_CH_t *const channel, const uint16_t pdiv, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_SPI_CH_ConfigureShiftClockOutput (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t passive_level, const XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t clock_output)
void | XMC_SPI_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableEOF (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_SPI_CH_DisableFEM (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INPUT_t input)
void | XMC_SPI_CH_DisableInterwordDelay (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableMasterClock (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableSlaveSelect (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableSlaveSelectCodedMode (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_DisableSOF (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableEOF (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_SPI_CH_EnableFEM (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INPUT_t input)
void | XMC_SPI_CH_EnableInterwordDelay (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableMasterClock (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableSlaveSelect (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_SLAVE_SELECT_t slave)
void | XMC_SPI_CH_EnableSlaveSelectCodedMode (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_EnableSOF (XMC_USIC_CH_t *const channel)
uint16_t | XMC_SPI_CH_GetReceivedData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_SPI_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_Init (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_CONFIG_t *const config)
void | XMC_SPI_CH_Receive (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_MODE_t mode)
void | XMC_SPI_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_SPI_CH_STATUS_t | XMC_SPI_CH_SetBaudrate (XMC_USIC_CH_t *const channel, const uint32_t rate)
void | XMC_SPI_CH_SetBitOrderLsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_SetBitOrderMsbFirst (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_SPI_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_INPUT_t input, const uint8_t source)
void | XMC_SPI_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_SPI_CH_SetInterwordDelay (XMC_USIC_CH_t *const channel, uint32_t tinterword_delay_ns)
void | XMC_SPI_CH_SetInterwordDelaySCLK (XMC_USIC_CH_t *const channel, uint32_t sclk_period)
void | XMC_SPI_CH_SetSlaveSelectDelay (XMC_USIC_CH_t *const channel, uint32_t sclk_period)
void | XMC_SPI_CH_SetSlaveSelectPolarity (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t selo_inversion)
void | XMC_SPI_CH_SetTransmitMode (XMC_USIC_CH_t *const channel, const XMC_SPI_CH_MODE_t mode)
void | XMC_SPI_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_SPI_CH_Start (XMC_USIC_CH_t *const channel)
XMC_SPI_CH_STATUS_t | XMC_SPI_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_SPI_CH_Transmit (XMC_USIC_CH_t *const channel, const uint16_t data, const XMC_SPI_CH_MODE_t mode)
void | XMC_SPI_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)

Detailed Description

Date
2016-05-20
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_uart.h File Reference

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xmc_uart.h File Reference
#include "xmc_usic.h"
Include dependency graph for xmc_uart.h:

Data Structures

struct XMC_UART_CH_CONFIG_t

Macros

#define | XMC_UART0_CH0 XMC_USIC0_CH0
#define | XMC_UART0_CH1 XMC_USIC0_CH1
#define | XMC_UART1_CH0 XMC_USIC1_CH0
#define | XMC_UART1_CH1 XMC_USIC1_CH1
#define | XMC_UART2_CH0 XMC_USIC2_CH0
#define | XMC_UART2_CH1 XMC_USIC2_CH1

Enumerations

Functions

void | XMC_UART_CH_ClearStatusFlag (XMC_USIC_CH_t *const channel, const uint32_t flag)
void | XMC_UART_CH_DisableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_UART_CH_DisableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_DisableInputSync (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_EnableDataTransmission (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_UART_CH_EnableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
void | XMC_UART_CH_EnableInputSync (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input)
uint16_t | XMC_UART_CH_GetReceivedData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_UART_CH_GetStatusFlag (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_Init (XMC_USIC_CH_t *const channel, const XMC_UART_CH_CONFIG_t *const config)
void | XMC_UART_CH_SelectInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
XMC_UART_CH_STATUS_t | XMC_UART_CH_SetBaudrate (XMC_USIC_CH_t *const channel, uint32_t rate, uint32_t oversampling)
void | XMC_UART_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_UART_CH_SetInputSamplingFreq (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input, const XMC_UART_CH_INPUT_SAMPLING_FREQ_t sampling_freq)
void | XMC_UART_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_UART_CH_INPUT_t input, const uint8_t source)
void | XMC_UART_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const uint8_t service_request)
void | XMC_UART_CH_SetPulseLength (XMC_USIC_CH_t *const channel, const uint8_t pulse_length)
void | XMC_UART_CH_SetSamplePoint (XMC_USIC_CH_t *const channel, const uint32_t sample_point)
void | XMC_UART_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_UART_CH_Start (XMC_USIC_CH_t *const channel)
XMC_UART_CH_STATUS_t | XMC_UART_CH_Stop (XMC_USIC_CH_t *const channel)
void | XMC_UART_CH_Transmit (XMC_USIC_CH_t *const channel, const uint16_t data)
void | XMC_UART_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)

Detailed Description

Date
2016-05-20
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_usic.h File Reference

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xmc_usic.h File Reference
#include "xmc_common.h"
#include "xmc1_usic_map.h"
Include dependency graph for xmc_usic.h:

Data Structures

struct XMC_USIC_CH_t

Macros

#define | USIC_CH_DXCR_CM_Msk USIC_CH_DX0CR_CM_Msk
#define | USIC_CH_DXCR_CM_Pos USIC_CH_DX0CR_CM_Pos
#define | USIC_CH_DXCR_DFEN_Msk USIC_CH_DX0CR_DFEN_Msk
#define | USIC_CH_DXCR_DPOL_Msk USIC_CH_DX0CR_DPOL_Msk
#define | USIC_CH_DXCR_DSEL_Msk USIC_CH_DX0CR_DSEL_Msk
#define | USIC_CH_DXCR_DSEL_Pos USIC_CH_DX0CR_DSEL_Pos
#define | USIC_CH_DXCR_DSEN_Msk USIC_CH_DX0CR_DSEN_Msk
#define | USIC_CH_DXCR_INSW_Msk USIC_CH_DX0CR_INSW_Msk
#define | USIC_CH_DXCR_INSW_pos USIC_CH_DX0CR_INSW_Pos
#define | USIC_CH_DXCR_SFSEL_Msk USIC_CH_DX0CR_SFSEL_Msk
#define | USIC_CH_DXCR_SFSEL_Pos USIC_CH_DX0CR_SFSEL_Pos
#define | XMC_USIC0 ((XMC_USIC_t *)USIC0_BASE)
#define | XMC_USIC0_CH0 ((XMC_USIC_CH_t *)USIC0_CH0_BASE)
#define | XMC_USIC0_CH1 ((XMC_USIC_CH_t *)USIC0_CH1_BASE)
#define | XMC_USIC1 ((XMC_USIC_t *)USIC1_BASE)
#define | XMC_USIC1_CH0 ((XMC_USIC_CH_t *)USIC1_CH0_BASE)
#define | XMC_USIC1_CH1 ((XMC_USIC_CH_t *)USIC1_CH1_BASE)
#define | XMC_USIC2 ((XMC_USIC_t *)USIC2_BASE)
#define | XMC_USIC2_CH0 ((XMC_USIC_CH_t *)USIC2_CH0_BASE)
#define | XMC_USIC2_CH1 ((XMC_USIC_CH_t *)USIC2_CH1_BASE)

Typedefs

typedef USIC_GLOBAL_TypeDef XMC_USIC_t

Enumerations

Functions

void | XMC_USIC_CH_ConfigExternalInputSignalToBRG (XMC_USIC_CH_t *const channel, const uint16_t pdiv, const uint32_t oversampling, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_USIC_CH_ConfigureShiftClockOutput (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t passive_level, const XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_t clock_output)
void | XMC_USIC_CH_ConnectInputDataShiftToDataInput (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_ConnectInputDataShiftToPPP (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_Disable (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_DisableFrameLengthControl (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_DisableInputInversion (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_DisableInputSync (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_DisableTBUFDataValidTrigger (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_DisableTimeMeasurement (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_Enable (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableDelayCompensation (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_EnableFrameLengthControl (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableInputDigitalFilter (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_EnableInputInversion (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_EnableInputSync (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input)
void | XMC_USIC_CH_EnableTBUFDataValidTrigger (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_EnableTimeMeasurement (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_GetCaptureTimerValue (const XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_GetReceiveBufferStatus (XMC_USIC_CH_t *const channel)
XMC_USIC_CH_TBUF_STATUS_t | XMC_USIC_CH_GetTransmitBufferStatus (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_RXFIFO_ClearEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_RXFIFO_Configure (XMC_USIC_CH_t *const channel, const uint32_t data_pointer, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
void | XMC_USIC_CH_RXFIFO_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_RXFIFO_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_RXFIFO_Flush (XMC_USIC_CH_t *const channel)
uint16_t | XMC_USIC_CH_RXFIFO_GetData (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_RXFIFO_GetEvent (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_RXFIFO_GetLevel (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_RXFIFO_IsEmpty (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_RXFIFO_IsFull (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_RXFIFO_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
void | XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
XMC_USIC_CH_STATUS_t | XMC_USIC_CH_SetBaudrate (XMC_USIC_CH_t *const channel, uint32_t rate, uint32_t oversampling)
void | XMC_USIC_CH_SetBRGInputClockSource (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_CLOCK_SOURCE_t clock_source)
void | XMC_USIC_CH_SetDataOutputMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_DATA_OUTPUT_MODE_t data_output_mode)
void | XMC_USIC_CH_SetFractionalDivider (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t mode, const uint16_t step)
void | XMC_USIC_CH_SetFrameLength (XMC_USIC_CH_t *const channel, const uint8_t frame_length)
void | XMC_USIC_CH_SetInputSamplingFreq (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input, const XMC_USIC_CH_INPUT_SAMPLING_FREQ_t sampling_freq)
void | XMC_USIC_CH_SetInputSource (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input, const uint8_t source)
void | XMC_USIC_CH_SetInputTriggerCombinationMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INPUT_t input, const XMC_USIC_CH_INPUT_COMBINATION_MODE_t combination_mode)
void | XMC_USIC_CH_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
void | XMC_USIC_CH_SetMclkOutputPassiveLevel (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_t passive_level)
void | XMC_USIC_CH_SetMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_OPERATING_MODE_t mode)
void | XMC_USIC_CH_SetPassiveDataLevel (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_PASSIVE_DATA_LEVEL_t passive_level)
void | XMC_USIC_CH_SetShiftDirection (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_SHIFT_DIRECTION_t shift_direction)
void | XMC_USIC_CH_SetStartTransmisionMode (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_START_TRANSMISION_MODE_t start_transmision_mode)
void | XMC_USIC_CH_SetTransmitBufferStatus (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_TBUF_STATUS_SET_t transmit_buffer_status)
void | XMC_USIC_CH_SetWordLength (XMC_USIC_CH_t *const channel, const uint8_t word_length)
void | XMC_USIC_CH_TriggerServiceRequest (XMC_USIC_CH_t *const channel, const uint32_t service_request_line)
void | XMC_USIC_CH_TXFIFO_ClearEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_TXFIFO_Configure (XMC_USIC_CH_t *const channel, const uint32_t data_pointer, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
void | XMC_USIC_CH_TXFIFO_DisableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_TXFIFO_EnableEvent (XMC_USIC_CH_t *const channel, const uint32_t event)
void | XMC_USIC_CH_TXFIFO_Flush (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_TXFIFO_GetEvent (XMC_USIC_CH_t *const channel)
uint32_t | XMC_USIC_CH_TXFIFO_GetLevel (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_TXFIFO_IsEmpty (XMC_USIC_CH_t *const channel)
bool | XMC_USIC_CH_TXFIFO_IsFull (XMC_USIC_CH_t *const channel)
void | XMC_USIC_CH_TXFIFO_PutData (XMC_USIC_CH_t *const channel, const uint16_t data)
void | XMC_USIC_CH_TXFIFO_PutDataFLEMode (XMC_USIC_CH_t *const channel, const uint16_t data, const uint32_t frame_length)
void | XMC_USIC_CH_TXFIFO_PutDataHPCMode (XMC_USIC_CH_t *const channel, const uint16_t data, const uint32_t frame_length)
void | XMC_USIC_CH_TXFIFO_SetInterruptNodePointer (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_t interrupt_node, const uint32_t service_request)
void | XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit (XMC_USIC_CH_t *const channel, const XMC_USIC_CH_FIFO_SIZE_t size, const uint32_t limit)
void | XMC_USIC_CH_WriteToTBUF (XMC_USIC_CH_t *const channel, const uint16_t data)
void | XMC_USIC_CH_WriteToTBUFTCI (XMC_USIC_CH_t *const channel, const uint16_t data, const uint32_t transmit_control_information)
void | XMC_USIC_Disable (XMC_USIC_t *const usic)
void | XMC_USIC_Enable (XMC_USIC_t *const usic)

Detailed Description

Date
2017-02-10
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_vadc.h File Reference

  • File List
  • Globals
  • inc
Data Structures | Macros | Typedefs | Enumerations | Functions
xmc_vadc.h File Reference
#include <xmc_common.h>
#include <xmc_scu.h>
#include <xmc_vadc_map.h>
Include dependency graph for xmc_vadc.h:

Data Structures

struct | XMC_VADC_CHANNEL_CONFIG_t
struct | XMC_VADC_DETAILED_RESULT_t
struct | XMC_VADC_GLOBAL_CLASS_t
struct | XMC_VADC_GLOBAL_CLOCK_t
struct | XMC_VADC_GLOBAL_CONFIG_t
struct | XMC_VADC_GLOBAL_SHS_CONFIG_t
struct | XMC_VADC_GROUP_CLASS_t
struct | XMC_VADC_GROUP_CONFIG_t
struct | XMC_VADC_GROUP_EMUXCFG_t
struct | XMC_VADC_QUEUE_CONFIG_t
struct | XMC_VADC_QUEUE_ENTRY_t
struct | XMC_VADC_RESULT_CONFIG_t
struct | XMC_VADC_SCAN_CONFIG_t

Macros

#define XMC_VADC_NUM_CHANNELS_PER_GROUP (8U)

Typedefs

typedef XMC_VADC_SCAN_CONFIG_t | XMC_VADC_BACKGROUND_CONFIG_t
typedef SHS_Type | XMC_VADC_GLOBAL_SHS_t
typedef VADC_GLOBAL_TypeDef | XMC_VADC_GLOBAL_t
typedef VADC_G_TypeDef | XMC_VADC_GROUP_t
typedef uint16_t | XMC_VADC_RESULT_SIZE_t

Enumerations

Functions

void | XMC_VADC_GLOBAL_BackgndAddMultipleChannels (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_mask)
void | XMC_VADC_GLOBAL_BackgndRemoveMultipleChannels (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_mask)
void | XMC_VADC_GLOBAL_BackgroundAbortSequence (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundAddChannelToSequence (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_num)
void | XMC_VADC_GLOBAL_BackgroundClearReqSrcEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundDisableContinuousMode (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundDisableEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundEnableContinuousMode (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundEnableEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger (XMC_VADC_GLOBAL_t *const global_ptr)
uint32_t | XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending (XMC_VADC_GLOBAL_t *const global_ptr)
bool | XMC_VADC_GLOBAL_BackgroundGetReqSrcEventStatus (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_BACKGROUND_CONFIG_t *config)
bool | XMC_VADC_GLOBAL_BackgroundIsChannelPending (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_num)
void | XMC_VADC_GLOBAL_BackgroundRemoveChannelFromSequence (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t grp_num, const uint32_t ch_num)
void | XMC_VADC_GLOBAL_BackgroundSelectGating (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t input_num)
void | XMC_VADC_GLOBAL_BackgroundSelectTrigger (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t input_num)
void | XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
void | XMC_VADC_GLOBAL_BackgroundSetGatingMode (XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_GATEMODE_t mode_sel)
void | XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode (XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_SR_t sr)
void | XMC_VADC_GLOBAL_BackgroundTriggerConversion (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BackgroundTriggerReqSrcEvent (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_BindGroupToEMux (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t emuxif, const uint32_t group)
void | XMC_VADC_GLOBAL_ClearEvent (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t event_type)
void | XMC_VADC_GLOBAL_ClockInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CLOCK_t *config)
void | XMC_VADC_GLOBAL_DisableModule (void)
void | XMC_VADC_GLOBAL_DisableModuleClock (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_DisablePostCalibration (XMC_VADC_GLOBAL_t *const global_ptr, uint32_t group_number)
void | XMC_VADC_GLOBAL_DisableSleepMode (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_DisableStartupCalibration (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_EnableModule (void)
void | XMC_VADC_GLOBAL_EnableModuleClock (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_EnablePostCalibration (XMC_VADC_GLOBAL_t *const global_ptr, uint32_t group_number)
void | XMC_VADC_GLOBAL_EnableSleepMode (XMC_VADC_GLOBAL_t *const global_ptr)
XMC_VADC_FAST_COMPARE_t | XMC_VADC_GLOBAL_GetCompareResult (XMC_VADC_GLOBAL_t *const global_ptr)
uint32_t | XMC_VADC_GLOBAL_GetDetailedResult (XMC_VADC_GLOBAL_t *const global_ptr)
XMC_VADC_RESULT_SIZE_t | XMC_VADC_GLOBAL_GetResult (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_Init (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CONFIG_t *config)
void | XMC_VADC_GLOBAL_InputClassInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CLASS_t config, const XMC_VADC_GROUP_CONV_t conv_type, const uint32_t set_num)
void | XMC_VADC_GLOBAL_ResultInit (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_RESULT_CONFIG_t *config)
void | XMC_VADC_GLOBAL_SetBoundaries (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t boundary0, const uint32_t boundary1)
void | XMC_VADC_GLOBAL_SetCompareValue (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_RESULT_SIZE_t compare_val)
void | XMC_VADC_GLOBAL_SetIndividualBoundary (XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_CHANNEL_BOUNDARY_t selection, const uint16_t boundary_value)
void | XMC_VADC_GLOBAL_SetResultEventInterruptNode (XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_SR_t sr)
void | XMC_VADC_GLOBAL_SHS_DisableSigmaDeltaLoop (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, XMC_VADC_SHS_LOOP_CH_t loop_select)
void | XMC_VADC_GLOBAL_SHS_EnableSigmaDeltaLoop (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, XMC_VADC_SHS_LOOP_CH_t loop_select)
void | XMC_VADC_GLOBAL_SHS_Init (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, const XMC_VADC_GLOBAL_SHS_CONFIG_t *config)
bool | XMC_VADC_GLOBAL_SHS_IsConverterReady (XMC_VADC_GLOBAL_SHS_t *const shs_ptr)
void | XMC_VADC_GLOBAL_SHS_SetAnalogReference (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, const XMC_VADC_GLOBAL_SHS_AREF_t aref)
void | XMC_VADC_GLOBAL_SHS_SetClockDivider (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, uint8_t divs_value)
void | XMC_VADC_GLOBAL_SHS_SetGainFactor (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, uint8_t gain_value, XMC_VADC_GROUP_INDEX_t group_num, uint8_t ch_num)
void | XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop (XMC_VADC_GLOBAL_SHS_t *const shs_ptr, XMC_VADC_GROUP_INDEX_t group_num, XMC_VADC_SHS_LOOP_CH_t loop_select, uint8_t ch_num)
void | XMC_VADC_GLOBAL_StartupCalibration (XMC_VADC_GLOBAL_t *const global_ptr)
void | XMC_VADC_GLOBAL_TriggerEvent (XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t event_type)
void | XMC_VADC_GROUP_AddResultToFifo (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_BackgroundDisableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_BackgroundEnableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ChannelClearEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
uint32_t | XMC_VADC_GROUP_ChannelGetAssertedEvents (XMC_VADC_GROUP_t *const group_ptr)
XMC_VADC_CHANNEL_CONV_t | XMC_VADC_GROUP_ChannelGetInputClass (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
XMC_VADC_RESULT_ALIGN_t | XMC_VADC_GROUP_ChannelGetResultAlignment (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
uint8_t | XMC_VADC_GROUP_ChannelGetResultRegister (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ChannelInit (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_CONFIG_t *config)
bool | XMC_VADC_GROUP_ChannelIsResultOutOfBounds (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ChannelSetBoundarySelection (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, XMC_VADC_BOUNDARY_SELECT_t boundary_sel, XMC_VADC_CHANNEL_BOUNDARY_t selection)
void | XMC_VADC_GROUP_ChannelSetEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_ChannelSetIclass (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_CONV_t conversion_class)
void | XMC_VADC_GROUP_ChannelSetInputReference (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_REF_t ref)
void | XMC_VADC_GROUP_ChannelSetResultRegister (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const uint32_t result_reg_num)
void | XMC_VADC_GROUP_ChannelTriggerEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ChannelTriggerEventGenCriteria (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num, const XMC_VADC_CHANNEL_EVGEN_t criteria)
void | XMC_VADC_GROUP_CheckSlaveReadiness (XMC_VADC_GROUP_t *const group_ptr, uint32_t slave_group)
void | XMC_VADC_GROUP_ClearResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_DisableChannelSyncRequest (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_DisableResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_EnableChannelSyncRequest (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_EnableResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_ExternalMuxControlInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_EMUXCFG_t emux_cfg)
uint32_t | XMC_VADC_GROUP_GetAlias (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_GetAssertedResultEvents (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_GetDetailedResult (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
XMC_VADC_FAST_COMPARE_t | XMC_VADC_GROUP_GetFastCompareResult (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
XMC_VADC_GROUP_CLASS_t | XMC_VADC_GROUP_GetInputClass (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_CHANNEL_CONV_t conv_class)
XMC_VADC_RESULT_SIZE_t | XMC_VADC_GROUP_GetResult (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
uint32_t | XMC_VADC_GROUP_GetResultFifoHead (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
uint32_t | XMC_VADC_GROUP_GetResultFifoTail (XMC_VADC_GROUP_t *const group_ptr, uint32_t res_reg)
uint32_t | XMC_VADC_GROUP_GetSyncReadySignal (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_IgnoreSlaveReadiness (XMC_VADC_GROUP_t *const group_ptr, uint32_t slave_group)
void | XMC_VADC_GROUP_Init (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_CONFIG_t *config)
void | XMC_VADC_GROUP_InputClassInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_CLASS_t config, const XMC_VADC_GROUP_CONV_t conv_type, const uint32_t set_num)
XMC_VADC_GROUP_STATE_t | XMC_VADC_GROUP_IsConverterBusy (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_IsResultRegisterFifoHead (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
bool | XMC_VADC_GROUP_IsResultRegisterInFifo (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_QueueAbortSequence (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueClearReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueDisableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueDisableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueEnableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueEnableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueFlushEntries (XMC_VADC_GROUP_t *const group_ptr)
int32_t | XMC_VADC_GROUP_QueueGetInterruptedChannel (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_QueueGetLength (XMC_VADC_GROUP_t *const group_ptr)
int32_t | XMC_VADC_GROUP_QueueGetNextChannel (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_QueueGetReqSrcEventStatus (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_QUEUE_CONFIG_t *config)
void | XMC_VADC_GROUP_QueueInsertChannel (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_QUEUE_ENTRY_t entry)
bool | XMC_VADC_GROUP_QueueIsArbitrationSlotEnabled (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueRemoveChannel (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueSelectGating (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GATE_INPUT_SELECT_t input_num)
void | XMC_VADC_GROUP_QueueSelectTrigger (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_INPUT_SELECT_t input_num)
void | XMC_VADC_GROUP_QueueSelectTriggerEdge (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
void | XMC_VADC_GROUP_QueueSetGatingMode (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_GATEMODE_t mode_sel)
void | XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_QueueTriggerConversion (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_QueueTriggerReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ResultInit (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg_num, const XMC_VADC_RESULT_CONFIG_t *config)
void | XMC_VADC_GROUP_ScanAddChannelToSequence (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ScanAddMultipleChannels (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_mask)
void | XMC_VADC_GROUP_ScanClearReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableContinuousMode (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanDisableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableArbitrationSlot (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableContinuousMode (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanEnableExternalTrigger (XMC_VADC_GROUP_t *const group_ptr)
uint32_t | XMC_VADC_GROUP_ScanGetNumChannelsPending (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_ScanGetReqSrcEventStatus (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanInit (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SCAN_CONFIG_t *config)
bool | XMC_VADC_GROUP_ScanIsArbitrationSlotEnabled (XMC_VADC_GROUP_t *const group_ptr)
bool | XMC_VADC_GROUP_ScanIsChannelPending (XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
void | XMC_VADC_GROUP_ScanRemoveChannel (XMC_VADC_GROUP_t *const group_ptr, const uint32_t channel_num)
void | XMC_VADC_GROUP_ScanSelectGating (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_GATE_INPUT_SELECT_t gating_input)
void | XMC_VADC_GROUP_ScanSelectTrigger (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_TRIGGER_INPUT_SELECT_t trigger_input)
void | XMC_VADC_GROUP_ScanSelectTriggerEdge (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
void | XMC_VADC_GROUP_ScanSequenceAbort (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanSetGatingMode (XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_GATEMODE_t mode_sel)
void | XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_ScanTriggerConversion (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_ScanTriggerReqSrcEvent (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_SetBoundaries (XMC_VADC_GROUP_t *const group_ptr, const uint32_t boundary0, const uint32_t boundary1)
void | XMC_VADC_GROUP_SetBoundaryEventInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const uint8_t boundary_flag_num, const XMC_VADC_BOUNDARY_NODE_t node)
void | XMC_VADC_GROUP_SetChannelAlias (XMC_VADC_GROUP_t *const group_ptr, const uint32_t src_ch_num, const uint32_t alias_ch_num)
void | XMC_VADC_GROUP_SetIndividualBoundary (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_CHANNEL_BOUNDARY_t selection, const uint16_t boundary_value)
void | XMC_VADC_GROUP_SetPowerMode (XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_POWERMODE_t power_mode)
void | XMC_VADC_GROUP_SetResultFastCompareValue (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg, const XMC_VADC_RESULT_SIZE_t compare_val)
void | XMC_VADC_GROUP_SetResultInterruptNode (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg, const XMC_VADC_SR_t sr)
void | XMC_VADC_GROUP_SetResultSubtractionValue (XMC_VADC_GROUP_t *const group_ptr, const uint16_t subtraction_val)
void | XMC_VADC_GROUP_SetSyncMaster (XMC_VADC_GROUP_t *const group_ptr)
void | XMC_VADC_GROUP_SetSyncReadySignal (XMC_VADC_GROUP_t *const group_ptr, uint32_t mask)
void | XMC_VADC_GROUP_SetSyncSlave (XMC_VADC_GROUP_t *const group_ptr, uint32_t master_grp, uint32_t slave_group)
void | XMC_VADC_GROUP_SetSyncSlaveReadySignal (XMC_VADC_GROUP_t *const group_ptr, uint32_t eval_waiting_group, uint32_t eval_origin_group)
void | XMC_VADC_GROUP_TriggerResultEvent (XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
void | XMC_VADC_GROUP_TriggerServiceRequest (XMC_VADC_GROUP_t *const group_ptr, const uint32_t sr_num, const XMC_VADC_GROUP_IRQ_t type)

Detailed Description

Date
2017-06-24
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: xmc_wdt.h File Reference

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Data Structures | Enumerations | Functions
xmc_wdt.h File Reference
#include "xmc_common.h"
#include "xmc_scu.h"
Include dependency graph for xmc_wdt.h:

Data Structures

struct XMC_WDT_CONFIG_t

Enumerations

Functions

void | XMC_WDT_ClearAlarm (void)
void | XMC_WDT_Disable (void)
void | XMC_WDT_Enable (void)
uint32_t | XMC_WDT_GetCounter (void)
void | XMC_WDT_Init (const XMC_WDT_CONFIG_t *const config)
void | XMC_WDT_Service (void)
void | XMC_WDT_SetDebugMode (const XMC_WDT_DEBUG_MODE_t debug_mode)
void | XMC_WDT_SetMode (XMC_WDT_MODE_t mode)
void | XMC_WDT_SetServicePulseWidth (uint8_t service_pulse_width)
void | XMC_WDT_SetWindowBounds (uint32_t lower_bound, uint32_t upper_bound)
void | XMC_WDT_Start (void)
void | XMC_WDT_Stop (void)

Detailed Description

Date
2015-08-06
Generated on Mon Aug 7 2017 10:43:05 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: Globals

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Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- c -

  • CAN_MO_MOIPR_Msk : xmc_can.h
  • CAN_NODE_NIPR_Msk : xmc_can.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • c
  • u
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- u -

  • USIC_CH_DXCR_CM_Msk : xmc_usic.h
  • USIC_CH_DXCR_CM_Pos : xmc_usic.h
  • USIC_CH_DXCR_DFEN_Msk : xmc_usic.h
  • USIC_CH_DXCR_DPOL_Msk : xmc_usic.h
  • USIC_CH_DXCR_DSEL_Msk : xmc_usic.h
  • USIC_CH_DXCR_DSEL_Pos : xmc_usic.h
  • USIC_CH_DXCR_DSEN_Msk : xmc_usic.h
  • USIC_CH_DXCR_INSW_Msk : xmc_usic.h
  • USIC_CH_DXCR_INSW_pos : xmc_usic.h
  • USIC_CH_DXCR_SFSEL_Msk : xmc_usic.h
  • USIC_CH_DXCR_SFSEL_Pos : xmc_usic.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • c
  • u
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- x -

  • XMC_BCCU_AbortDimming() : xmc_bccu.h
  • XMC_BCCU_AbortLinearWalk() : xmc_bccu.h
  • XMC_BCCU_BCLK_MODE_FAST : xmc_bccu.h
  • XMC_BCCU_BCLK_MODE_NORMAL : xmc_bccu.h
  • XMC_BCCU_BCLK_MODE_t : xmc_bccu.h
  • XMC_BCCU_CH_ACTIVE_LEVEL_HIGH : xmc_bccu.h
  • XMC_BCCU_CH_ACTIVE_LEVEL_LOW : xmc_bccu.h
  • XMC_BCCU_CH_ACTIVE_LEVEL_t : xmc_bccu.h
  • XMC_BCCU_CH_ConfigTrigger() : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_DISABLE : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_ENABLE : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_t : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_SOURCE_DE0 : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_SOURCE_DE1 : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_SOURCE_DE2 : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_SOURCE_GLOBAL : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_SOURCE_t : xmc_bccu.h
  • XMC_BCCU_CH_DisableDimmingBypass() : xmc_bccu.h
  • XMC_BCCU_CH_DisableFlickerWatchdog() : xmc_bccu.h
  • XMC_BCCU_CH_DisableGating() : xmc_bccu.h
  • XMC_BCCU_CH_DisablePacker() : xmc_bccu.h
  • XMC_BCCU_CH_EnableDimmingBypass() : xmc_bccu.h
  • XMC_BCCU_CH_EnableFlickerWatchdog() : xmc_bccu.h
  • XMC_BCCU_CH_EnableGating() : xmc_bccu.h
  • XMC_BCCU_CH_EnablePacker() : xmc_bccu.h
  • XMC_BCCU_CH_FLICKER_WD_DS : xmc_bccu.h
  • XMC_BCCU_CH_FLICKER_WD_EN : xmc_bccu.h
  • XMC_BCCU_CH_FLICKER_WD_t : xmc_bccu.h
  • XMC_BCCU_CH_GATING_FUNC_DISABLE : xmc_bccu.h
  • XMC_BCCU_CH_GATING_FUNC_ENABLE : xmc_bccu.h
  • XMC_BCCU_CH_GATING_FUNC_t : xmc_bccu.h
  • XMC_BCCU_CH_Init() : xmc_bccu.h
  • XMC_BCCU_CH_ReadIntensity() : xmc_bccu.h
  • XMC_BCCU_CH_ReadPackerOffCompare() : xmc_bccu.h
  • XMC_BCCU_CH_ReadPackerOnCompare() : xmc_bccu.h
  • XMC_BCCU_CH_ReadPackerThreshold() : xmc_bccu.h
  • XMC_BCCU_CH_SelectDimEngine() : xmc_bccu.h
  • XMC_BCCU_CH_SetLinearWalkPrescaler() : xmc_bccu.h
  • XMC_BCCU_CH_SetPackerOffCompare() : xmc_bccu.h
  • XMC_BCCU_CH_SetPackerOffCounter() : xmc_bccu.h
  • XMC_BCCU_CH_SetPackerOnCompare() : xmc_bccu.h
  • XMC_BCCU_CH_SetPackerOnCounter() : xmc_bccu.h
  • XMC_BCCU_CH_SetPackerThreshold() : xmc_bccu.h
  • XMC_BCCU_CH_SetTargetIntensity() : xmc_bccu.h
  • XMC_BCCU_CH_t : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_EDGE_FALLING : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_EDGE_RISING : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_EDGE_t : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_IN_t : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INA : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INB : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INC : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_IND : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INE : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INF : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_ING : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INH : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INI : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INJ : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INK : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INL : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INM : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INN : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INO : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INP : xmc_bccu.h
  • XMC_BCCU_CH_TRIG_EDGE_ACT_TO_PASS : xmc_bccu.h
  • XMC_BCCU_CH_TRIG_EDGE_PASS_TO_ACT : xmc_bccu.h
  • XMC_BCCU_CH_TRIG_EDGE_t : xmc_bccu.h
  • XMC_BCCU_CH_TRIGOUT0 : xmc_bccu.h
  • XMC_BCCU_CH_TRIGOUT1 : xmc_bccu.h
  • XMC_BCCU_CH_TRIGOUT_t : xmc_bccu.h
  • XMC_BCCU_ClearEventFlag() : xmc_bccu.h
  • XMC_BCCU_ConcurrentAbortDimming() : xmc_bccu.h
  • XMC_BCCU_ConcurrentAbortLinearWalk() : xmc_bccu.h
  • XMC_BCCU_ConcurrentConfigTrigger() : xmc_bccu.h
  • XMC_BCCU_ConcurrentDisableChannels() : xmc_bccu.h
  • XMC_BCCU_ConcurrentDisableDimmingEngine() : xmc_bccu.h
  • XMC_BCCU_ConcurrentDisableTrap() : xmc_bccu.h
  • XMC_BCCU_ConcurrentEnableChannels() : xmc_bccu.h
  • XMC_BCCU_ConcurrentEnableDimmingEngine() : xmc_bccu.h
  • XMC_BCCU_ConcurrentEnableTrap() : xmc_bccu.h
  • XMC_BCCU_ConcurrentSetOutputPassiveLevel() : xmc_bccu.h
  • XMC_BCCU_ConcurrentStartDimming() : xmc_bccu.h
  • XMC_BCCU_ConcurrentStartLinearWalk() : xmc_bccu.h
  • XMC_BCCU_ConfigGlobalTrigger() : xmc_bccu.h
  • XMC_BCCU_ConfigSuspendMode() : xmc_bccu.h
  • XMC_BCCU_DIM_ConfigDimCurve() : xmc_bccu.h
  • XMC_BCCU_DIM_CURVE_COARSE : xmc_bccu.h
  • XMC_BCCU_DIM_CURVE_FINE : xmc_bccu.h
  • XMC_BCCU_DIM_CURVE_t : xmc_bccu.h
  • XMC_BCCU_DIM_GetDimCurve() : xmc_bccu.h
  • XMC_BCCU_DIM_Init() : xmc_bccu.h
  • XMC_BCCU_DIM_ReadDimDivider() : xmc_bccu.h
  • XMC_BCCU_DIM_ReadDimmingLevel() : xmc_bccu.h
  • XMC_BCCU_DIM_SetDimDivider() : xmc_bccu.h
  • XMC_BCCU_DIM_SetTargetDimmingLevel() : xmc_bccu.h
  • XMC_BCCU_DIM_t : xmc_bccu.h
  • XMC_BCCU_DisableChannel() : xmc_bccu.h
  • XMC_BCCU_DisableChannelTrigger() : xmc_bccu.h
  • XMC_BCCU_DisableDimmingEngine() : xmc_bccu.h
  • XMC_BCCU_DisableInterrupt() : xmc_bccu.h
  • XMC_BCCU_DisableTrap() : xmc_bccu.h
  • XMC_BCCU_EnableChannel() : xmc_bccu.h
  • XMC_BCCU_EnableChannelTrigger() : xmc_bccu.h
  • XMC_BCCU_EnableDimmingEngine() : xmc_bccu.h
  • XMC_BCCU_EnableInterrupt() : xmc_bccu.h
  • XMC_BCCU_EnableTrap() : xmc_bccu.h
  • XMC_BCCU_EVENT_FIFOEMPTY : xmc_bccu.h
  • XMC_BCCU_EVENT_FIFOFULL : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_FIFOEMPTY : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_FIFOFULL : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_t : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_TRAP : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_TRAP_STATE : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_TRIGGER0 : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_TRIGGER1 : xmc_bccu.h
  • XMC_BCCU_EVENT_t : xmc_bccu.h
  • XMC_BCCU_EVENT_TRAP : xmc_bccu.h
  • XMC_BCCU_EVENT_TRIGGER0 : xmc_bccu.h
  • XMC_BCCU_EVENT_TRIGGER1 : xmc_bccu.h
  • XMC_BCCU_GetChannelOutputLvlAtLastTrigger() : xmc_bccu.h
  • XMC_BCCU_GlobalInit() : xmc_bccu.h
  • XMC_BCCU_IsDimmingFinished() : xmc_bccu.h
  • XMC_BCCU_IsDitherEnable() : xmc_bccu.h
  • XMC_BCCU_IsLinearWalkComplete() : xmc_bccu.h
  • XMC_BCCU_ReadBitClock() : xmc_bccu.h
  • XMC_BCCU_ReadDimClock() : xmc_bccu.h
  • XMC_BCCU_ReadEventFlag() : xmc_bccu.h
  • XMC_BCCU_ReadFastClock() : xmc_bccu.h
  • XMC_BCCU_ReadFlickerWDThreshold() : xmc_bccu.h
  • XMC_BCCU_ReadGlobalTrigger() : xmc_bccu.h
  • XMC_BCCU_ReadLastTrigChanNr() : xmc_bccu.h
  • XMC_BCCU_ReadSuspendMode() : xmc_bccu.h
  • XMC_BCCU_ReadTrapEdge() : xmc_bccu.h
  • XMC_BCCU_ReadTrapInput() : xmc_bccu.h
  • XMC_BCCU_SelectBitClock() : xmc_bccu.h
  • XMC_BCCU_SelectTrapInput() : xmc_bccu.h
  • XMC_BCCU_SetDimClockPrescaler() : xmc_bccu.h
  • XMC_BCCU_SetEventFlag() : xmc_bccu.h
  • XMC_BCCU_SetFastClockPrescaler() : xmc_bccu.h
  • XMC_BCCU_SetFlickerWDThreshold() : xmc_bccu.h
  • XMC_BCCU_SetGlobalDimmingLevel() : xmc_bccu.h
  • XMC_BCCU_SetOutputPassiveLevel() : xmc_bccu.h
  • XMC_BCCU_SetTrapEdge() : xmc_bccu.h
  • XMC_BCCU_StartDimming() : xmc_bccu.h
  • XMC_BCCU_StartLinearWalk() : xmc_bccu.h
  • XMC_BCCU_STATUS_ERROR : xmc_bccu.h
  • XMC_BCCU_STATUS_SUCCESS : xmc_bccu.h
  • XMC_BCCU_STATUS_t : xmc_bccu.h
  • XMC_BCCU_SUSPEND_MODE_FREEZE : xmc_bccu.h
  • XMC_BCCU_SUSPEND_MODE_IGNORE : xmc_bccu.h
  • XMC_BCCU_SUSPEND_MODE_SAFE_FREEZE : xmc_bccu.h
  • XMC_BCCU_SUSPEND_MODE_t : xmc_bccu.h
  • XMC_BCCU_t : xmc_bccu.h
  • XMC_BCCU_TRAP_LEVEL_HIGH : xmc_bccu.h
  • XMC_BCCU_TRAP_LEVEL_LOW : xmc_bccu.h
  • XMC_BCCU_TRAP_LEVEL_t : xmc_bccu.h
  • XMC_BCCU_TRAP_STATUS_ACTIVE : xmc_bccu.h
  • XMC_BCCU_TRAP_STATUS_DEACTIVE : xmc_bccu.h
  • XMC_BCCU_TRAP_STATUS_t : xmc_bccu.h
  • XMC_BCCU_TRAPEDGE_FALLING : xmc_bccu.h
  • XMC_BCCU_TRAPEDGE_RISING : xmc_bccu.h
  • XMC_BCCU_TRAPEDGE_t : xmc_bccu.h
  • XMC_BCCU_TRIGDELAY_HALF_BIT : xmc_bccu.h
  • XMC_BCCU_TRIGDELAY_NO_DELAY : xmc_bccu.h
  • XMC_BCCU_TRIGDELAY_QUARTER_BIT : xmc_bccu.h
  • XMC_BCCU_TRIGDELAY_t : xmc_bccu.h
  • XMC_BCCU_TRIGMODE0 : xmc_bccu.h
  • XMC_BCCU_TRIGMODE1 : xmc_bccu.h
  • XMC_BCCU_TRIGMODE_t : xmc_bccu.h
  • XMC_CAN_AllocateMOtoNodeList() : xmc_can.h
  • XMC_CAN_ARBITRATION_MODE_IDE_DIR_BASED_PRIO_2 : xmc_can.h
  • XMC_CAN_ARBITRATION_MODE_ORDER_BASED_PRIO_1 : xmc_can.h
  • XMC_CAN_ARBITRATION_MODE_ORDER_BASED_PRIO_3 : xmc_can.h
  • XMC_CAN_ARBITRATION_MODE_t : xmc_can.h
  • XMC_CAN_CANCLKSRC_t : xmc_can.h
  • XMC_CAN_Disable() : xmc_can.h
  • XMC_CAN_DM_FRACTIONAL : xmc_can.h
  • XMC_CAN_DM_NORMAL : xmc_can.h
  • XMC_CAN_DM_OFF : xmc_can.h
  • XMC_CAN_DM_t : xmc_can.h
  • XMC_CAN_Enable() : xmc_can.h
  • XMC_CAN_EventTrigger() : xmc_can.h
  • XMC_CAN_FIFO_DisableForeingRemoteRequest() : xmc_can.h
  • XMC_CAN_FIFO_DisableRemoteMonitoring() : xmc_can.h
  • XMC_CAN_FIFO_DisableSingleDataTransfer() : xmc_can.h
  • XMC_CAN_FIFO_EnableForeignRemoteRequest() : xmc_can.h
  • XMC_CAN_FIFO_EnableRemoteMonitoring() : xmc_can.h
  • XMC_CAN_FIFO_EnableSingleDataTransfer() : xmc_can.h
  • XMC_CAN_FIFO_GetCurrentMO() : xmc_can.h
  • XMC_CAN_FIFO_SetSELMO() : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE_BIT_TIMING : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE_t : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE_TIME_STAMP : xmc_can.h
  • XMC_CAN_FRAME_TYPE_EXTENDED_29BITS : xmc_can.h
  • XMC_CAN_FRAME_TYPE_STANDARD_11BITS : xmc_can.h
  • XMC_CAN_FRAME_TYPE_t : xmc_can.h
  • XMC_CAN_GATEWAY_InitDesObject() : xmc_can.h
  • XMC_CAN_GATEWAY_InitSourceObject() : xmc_can.h
  • XMC_CAN_Init() : xmc_can.h
  • XMC_CAN_IsPanelControlReady() : xmc_can.h
  • XMC_CAN_LOOKBACKMODE_DISABLED : xmc_can.h
  • XMC_CAN_LOOKBACKMODE_ENABLED : xmc_can.h
  • XMC_CAN_LOOKBACKMODE_t : xmc_can.h
  • XMC_CAN_MO_AcceptOnlyMatchingIDE() : xmc_can.h
  • XMC_CAN_MO_AcceptStandardAndExtendedID() : xmc_can.h
  • XMC_CAN_MO_Config() : xmc_can.h
  • XMC_CAN_MO_DataLengthCode() : xmc_can.h
  • XMC_CAN_MO_DisableEvent() : xmc_can.h
  • XMC_CAN_MO_DisableSingleTransmitTrial() : xmc_can.h
  • XMC_CAN_MO_EnableEvent() : xmc_can.h
  • XMC_CAN_MO_EnableSingleTransmitTrial() : xmc_can.h
  • XMC_CAN_MO_EVENT_OVERFLOW : xmc_can.h
  • XMC_CAN_MO_EVENT_RECEIVE : xmc_can.h
  • XMC_CAN_MO_EVENT_t : xmc_can.h
  • XMC_CAN_MO_EVENT_TRANSMIT : xmc_can.h
  • XMC_CAN_MO_GetAcceptanceMask() : xmc_can.h
  • XMC_CAN_MO_GetDataLengthCode() : xmc_can.h
  • XMC_CAN_MO_GetIdentifier() : xmc_can.h
  • XMC_CAN_MO_GetStatus() : xmc_can.h
  • XMC_CAN_MO_MOAR_STDID_Msk : xmc_can.h
  • XMC_CAN_MO_MOAR_STDID_Pos : xmc_can.h
  • XMC_CAN_MO_POINTER_EVENT_RECEIVE : xmc_can.h
  • XMC_CAN_MO_POINTER_EVENT_t : xmc_can.h
  • XMC_CAN_MO_POINTER_EVENT_TRANSMIT : xmc_can.h
  • XMC_CAN_MO_Receive() : xmc_can.h
  • XMC_CAN_MO_ReceiveData() : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_MESSAGE_DIRECTION : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_MESSAGE_LOST : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_MESSAGE_VALID : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_NEW_DATA : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_ENABLE : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_PENDING : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_TX_SELECTED : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_UPDATING : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_t : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_ENABLE0 : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_ENABLE1 : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_PENDING : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_REQUEST : xmc_can.h
  • XMC_CAN_MO_ResetStatus() : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_MESSAGE_DIRECTION : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_MESSAGE_LOST : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_MESSAGE_VALID : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_NEW_DATA : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_ENABLE : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_PENDING : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_TX_SELECTED : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_UPDATING : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_t : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_ENABLE0 : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_ENABLE1 : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_PENDING : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_REQUEST : xmc_can.h
  • XMC_CAN_MO_SetAcceptanceMask() : xmc_can.h
  • XMC_CAN_MO_SetDataLengthCode() : xmc_can.h
  • XMC_CAN_MO_SetEventNodePointer() : xmc_can.h
  • XMC_CAN_MO_SetExtendedID() : xmc_can.h
  • XMC_CAN_MO_SetIdentifier() : xmc_can.h
  • XMC_CAN_MO_SetStandardID() : xmc_can.h
  • XMC_CAN_MO_SetStatus() : xmc_can.h
  • XMC_CAN_MO_STATUS_LIST : xmc_can.h
  • XMC_CAN_MO_STATUS_MESSAGE_DIRECTION : xmc_can.h
  • XMC_CAN_MO_STATUS_MESSAGE_LOST : xmc_can.h
  • XMC_CAN_MO_STATUS_MESSAGE_VALID : xmc_can.h
  • XMC_CAN_MO_STATUS_NEW_DATA : xmc_can.h
  • XMC_CAN_MO_STATUS_POINTER_TO_NEXT_MO : xmc_can.h
  • XMC_CAN_MO_STATUS_POINTER_TO_PREVIOUS_MO : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_ENABLE : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_PENDING : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_TX_SELECTED : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_UPDATING : xmc_can.h
  • XMC_CAN_MO_STATUS_t : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_ENABLE0 : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_ENABLE1 : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_PENDING : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_REQUEST : xmc_can.h
  • XMC_CAN_MO_Transmit() : xmc_can.h
  • XMC_CAN_MO_TYPE_RECMSGOBJ : xmc_can.h
  • XMC_CAN_MO_TYPE_t : xmc_can.h
  • XMC_CAN_MO_TYPE_TRANSMSGOBJ : xmc_can.h
  • XMC_CAN_MO_UpdateData() : xmc_can.h
  • XMC_CAN_NODE_ClearStatus() : xmc_can.h
  • XMC_CAN_NODE_CONTROL_ALERT_INT_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_CAN_ANALYZER_NODEDE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_CAN_DISABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_CONF_CHANGE_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_LEC_INT_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_NODE_INIT : xmc_can.h
  • XMC_CAN_NODE_CONTROL_SUSPENDED_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_t : xmc_can.h
  • XMC_CAN_NODE_CONTROL_TX_INT_ENABLE : xmc_can.h
  • XMC_CAN_NODE_Disable() : xmc_can.h
  • XMC_CAN_NODE_DisableConfigurationChange() : xmc_can.h
  • XMC_CAN_NODE_DisableEvent() : xmc_can.h
  • XMC_CAN_NODE_DisableLoopBack() : xmc_can.h
  • XMC_CAN_NODE_Enable() : xmc_can.h
  • XMC_CAN_NODE_EnableConfigurationChange() : xmc_can.h
  • XMC_CAN_NODE_EnableEvent() : xmc_can.h
  • XMC_CAN_NODE_EnableLoopBack() : xmc_can.h
  • XMC_CAN_NODE_EnableSuspend() : xmc_can.h
  • XMC_CAN_NODE_EVENT_ALERT : xmc_can.h
  • XMC_CAN_NODE_EVENT_CFCIE : xmc_can.h
  • XMC_CAN_NODE_EVENT_LEC : xmc_can.h
  • XMC_CAN_NODE_EVENT_t : xmc_can.h
  • XMC_CAN_NODE_EVENT_TX_INT : xmc_can.h
  • XMC_CAN_NODE_FrameCounterConfigure() : xmc_can.h
  • XMC_CAN_NODE_GetCANFrameCounter() : xmc_can.h
  • XMC_CAN_NODE_GetErrorWarningLevel() : xmc_can.h
  • XMC_CAN_NODE_GetLastErrTransferDir() : xmc_can.h
  • XMC_CAN_NODE_GetLastErrTransferInc() : xmc_can.h
  • XMC_CAN_NODE_GetReceiveErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_GetStatus() : xmc_can.h
  • XMC_CAN_NODE_GetTransmitErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_INTERRUPT_TRIGGER_t : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_DIR_t : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_DIR_WHILE_NODE_RECEPCION : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_DIR_WHILE_NODE_TRANSMISSION : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_INC_1 : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_INC_8 : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_INC_t : xmc_can.h
  • XMC_CAN_NODE_NominalBitTimeConfigure() : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_ALERT : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_FRAME_COUNTER : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_LEC : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_t : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_TRANSFER_OK : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCA : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCB : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCC : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCD : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCE : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCF : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCG : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCH : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_t : xmc_can.h
  • XMC_CAN_NODE_ReSetAnalyzerMode() : xmc_can.h
  • XMC_CAN_NODE_ResetInitBit() : xmc_can.h
  • XMC_CAN_NODE_SetAnalyzerMode() : xmc_can.h
  • XMC_CAN_NODE_SetErrorWarningLevel() : xmc_can.h
  • XMC_CAN_NODE_SetEventNodePointer() : xmc_can.h
  • XMC_CAN_NODE_SetInitBit() : xmc_can.h
  • XMC_CAN_NODE_SetReceiveErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_SetReceiveInput() : xmc_can.h
  • XMC_CAN_NODE_SetTransmitErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_STATUS_ALERT_WARNING : xmc_can.h
  • XMC_CAN_NODE_STATUS_BUS_OFF : xmc_can.h
  • XMC_CAN_NODE_STATUS_ERROR_WARNING_STATUS : xmc_can.h
  • XMC_CAN_NODE_STATUS_LAST_ERROR_CODE : xmc_can.h
  • XMC_CAN_NODE_STATUS_LIST_LENGTH_ERROR : xmc_can.h
  • XMC_CAN_NODE_STATUS_LIST_OBJECT_ERROR : xmc_can.h
  • XMC_CAN_NODE_STATUS_RX_OK : xmc_can.h
  • XMC_CAN_NODE_STATUS_SUSPENDED_ACK : xmc_can.h
  • XMC_CAN_NODE_STATUS_t : xmc_can.h
  • XMC_CAN_NODE_STATUS_TX_OK : xmc_can.h
  • XMC_CAN_NODE_t : xmc_can.h
  • XMC_CAN_PANCMD_DYNAMIC_ALLOCATE : xmc_can.h
  • XMC_CAN_PANCMD_DYNAMIC_INSERT_BEFORE : xmc_can.h
  • XMC_CAN_PANCMD_DYNAMIC_INSERT_BEHIND : xmc_can.h
  • XMC_CAN_PANCMD_INIT_LIST : xmc_can.h
  • XMC_CAN_PANCMD_STATIC_ALLOCATE : xmc_can.h
  • XMC_CAN_PANCMD_STATIC_INSERT_BEFORE : xmc_can.h
  • XMC_CAN_PANCMD_STATIC_INSERT_BEHIND : xmc_can.h
  • XMC_CAN_PANCMD_t : xmc_can.h
  • XMC_CAN_PanelControl() : xmc_can.h
  • XMC_CAN_RXFIFO_ConfigMOBaseObject() : xmc_can.h
  • XMC_CAN_RXFIFO_ConfigMOSlaveObject() : xmc_can.h
  • XMC_CAN_STATUS_BUSY : xmc_can.h
  • XMC_CAN_STATUS_ERROR : xmc_can.h
  • XMC_CAN_STATUS_MO_DISABLED : xmc_can.h
  • XMC_CAN_STATUS_MO_NOT_ACCEPTABLE : xmc_can.h
  • XMC_CAN_STATUS_SUCCESS : xmc_can.h
  • XMC_CAN_STATUS_t : xmc_can.h
  • XMC_CAN_t : xmc_can.h
  • XMC_CAN_TXFIFO_ConfigMOBaseObject() : xmc_can.h
  • XMC_CAN_TXFIFO_ConfigMOSlaveObject() : xmc_can.h
  • XMC_CAN_TXFIFO_Transmit() : xmc_can.h
  • XMC_CCU4_CLOCK_EXTERNAL_A : xmc_ccu4.h
  • XMC_CCU4_CLOCK_EXTERNAL_B : xmc_ccu4.h
  • XMC_CCU4_CLOCK_EXTERNAL_C : xmc_ccu4.h
  • XMC_CCU4_CLOCK_SCU : xmc_ccu4.h
  • XMC_CCU4_CLOCK_t : xmc_ccu4.h
  • XMC_CCU4_DisableClock() : xmc_ccu4.h
  • XMC_CCU4_DisableModule() : xmc_ccu4.h
  • XMC_CCU4_EnableClock() : xmc_ccu4.h
  • XMC_CCU4_EnableModule() : xmc_ccu4.h
  • XMC_CCU4_EnableMultipleClocks() : xmc_ccu4.h
  • XMC_CCU4_EnableShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_Init() : xmc_ccu4.h
  • XMC_CCU4_IsPrescalerRunning() : xmc_ccu4.h
  • XMC_CCU4_MODULE_t : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE0 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE1 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE2 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE3 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE0 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE1 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE2 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE3 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_t : xmc_ccu4.h
  • XMC_CCU4_SetModuleClock() : xmc_ccu4.h
  • XMC_CCU4_SetMultiChannelShadowTransferMode() : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_COMPARE_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_DITHER_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_FLOATING_PRESCALER_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PASSIVE_LEVEL : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PERIOD_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_CAP_REG_SET_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_CAP_REG_SET_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_CAP_REG_SET_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_Capture0Config() : xmc_ccu4.h
  • XMC_CCU4_SLICE_Capture1Config() : xmc_ccu4.h
  • XMC_CCU4_SLICE_CaptureInit() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ClearEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ClearTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_CompareInit() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ConfigureEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ConfigureStatusBitOverrideEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_CountConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DirectionConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableAutomaticShadowTransferRequest() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableCascadedShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableDithering() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableFloatingPrescaler() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableMultiChannelMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableMultipleEvents() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableTrap() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableAutomaticShadowTransferRequest() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableCascadedShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableDithering() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableFloatingPrescaler() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableMultiChannelMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableMultipleEvents() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableTrap() : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_TIMER_CLEAR : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_TIMER_STOP : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_TIMER_STOP_CLEAR : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_NONE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_3_CYCLES : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_5_CYCLES : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_7_CYCLES : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_DISABLED : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_NONE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_CAPTURE_EVENT0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_CAPTURE_EVENT1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_COUNT : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_DIRECTION : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_GATING : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_LOAD : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_MODULATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_OVERRIDE : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_START : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_STOP : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_TRAP : xmc_ccu4.h
  • XMC_CCU4_SLICE_GateConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetCapturedValueFromFifo() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetCaptureRegisterValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetCountingDir() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetLastCapturedTimerValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetSliceMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerCompareMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerCountingMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerPeriodMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerRepeatMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_INPUT_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_COMPARE_MATCH_DOWN : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_COMPARE_MATCH_UP : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_EVENT0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_EVENT1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_EVENT2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_PERIOD_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_TRAP : xmc_ccu4.h
  • XMC_CCU4_SLICE_IsExtendedCapReadEnabled() : xmc_ccu4.h
  • XMC_CCU4_SLICE_IsTimerRunning() : xmc_ccu4.h
  • XMC_CCU4_SLICE_LoadConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODE_CAPTURE : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODE_COMPARE : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODULATION_MODE_CLEAR_OUT : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODULATION_MODE_CLEAR_ST_OUT : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODULATION_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_ModulationConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_PERIOD_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_1024 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_128 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_16 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_16384 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_2048 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_256 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_32 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_32768 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_4 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_4096 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_512 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_64 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_8 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_8192 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_MODE_FLOAT : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_MODE_NORMAL : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetDitherCompareValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetInput() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetInterruptNode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetPassiveLevel() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetPrescaler() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetShadowTransferMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerCompareMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerCountingMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerPeriodMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerRepeatMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_IN_PERIOD_MATCH_AND_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_PERIOD_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_3 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_START_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_START_MODE_TIMER_START : xmc_ccu4.h
  • XMC_CCU4_SLICE_START_MODE_TIMER_START_CLEAR : xmc_ccu4.h
  • XMC_CCU4_SLICE_StartConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StartTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StatusBitOverrideConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StopClearTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StopConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StopTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_ALWAYS : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_CAP_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_CAP_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_NEVER : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_DIR_DOWN : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_DIR_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_DIR_UP : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_MODE_CA : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_MODE_EA : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_REPEAT_MODE_REPEAT : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_REPEAT_MODE_SINGLE : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TRAP_EXIT_MODE_AUTOMATIC : xmc_ccu4.h
  • XMC_CCU4_SLICE_TRAP_EXIT_MODE_SW : xmc_ccu4.h
  • XMC_CCU4_SLICE_TRAP_EXIT_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TrapConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_COMPARE_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_DITHER_VALUE_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_FLOATING_PRESCALER_VALUE_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_PASSIVE_LEVEL_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_PERIOD_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_WriteCoherentlyWithPWMCycle() : xmc_ccu4.h
  • XMC_CCU4_SLICE_WriteImmediateAfterShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_StartPrescaler() : xmc_ccu4.h
  • XMC_CCU4_STATUS_ERROR : xmc_ccu4.h
  • XMC_CCU4_STATUS_IDLE : xmc_ccu4.h
  • XMC_CCU4_STATUS_OK : xmc_ccu4.h
  • XMC_CCU4_STATUS_RUNNING : xmc_ccu4.h
  • XMC_CCU4_STATUS_t : xmc_ccu4.h
  • XMC_CCU4_StopPrescaler() : xmc_ccu4.h
  • XMC_CCU8_CLOCK_EXTERNAL_A : xmc_ccu8.h
  • XMC_CCU8_CLOCK_EXTERNAL_B : xmc_ccu8.h
  • XMC_CCU8_CLOCK_EXTERNAL_C : xmc_ccu8.h
  • XMC_CCU8_CLOCK_SCU : xmc_ccu8.h
  • XMC_CCU8_CLOCK_t : xmc_ccu8.h
  • XMC_CCU8_DisableClock() : xmc_ccu8.h
  • XMC_CCU8_DisableModule() : xmc_ccu8.h
  • XMC_CCU8_EnableClock() : xmc_ccu8.h
  • XMC_CCU8_EnableModule() : xmc_ccu8.h
  • XMC_CCU8_EnableMultipleClocks() : xmc_ccu8.h
  • XMC_CCU8_EnableShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_Init() : xmc_ccu8.h
  • XMC_CCU8_IsPrescalerRunning() : xmc_ccu8.h
  • XMC_CCU8_MODULE_t : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE0 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE1 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE2 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE3 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE0 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE1 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE2 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE3 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_t : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT0_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT0_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT1_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT1_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT2_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT2_ST2 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT3_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT3_ST2 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_t : xmc_ccu8.h
  • XMC_CCU8_SetModuleClock() : xmc_ccu8.h
  • XMC_CCU8_SetMultiChannelShadowTransferMode() : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_CAP_REG_SET_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_CAP_REG_SET_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_CAP_REG_SET_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_Capture0Config() : xmc_ccu8.h
  • XMC_CCU8_SLICE_Capture1Config() : xmc_ccu8.h
  • XMC_CCU8_SLICE_CaptureInit() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ClearEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ClearTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_COMPARE_CHANNEL_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_COMPARE_CHANNEL_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_COMPARE_CHANNEL_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_CompareInit() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureDeadTime() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureStatusBitOutput() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_CountConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DeadTimeInit() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DirectionConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableCascadedShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableDithering() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableFloatingPrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableMultiChannelMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableMultipleEvents() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableTrap() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_4 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_8 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableAsymmetricCompareMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableCascadedShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableDithering() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableFloatingPrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableMultiChannelMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableMultipleEvents() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableSymmetricCompareMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableTrap() : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_TIMER_CLEAR : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_TIMER_STOP : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_TIMER_STOP_CLEAR : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_NONE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_3_CYCLES : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_5_CYCLES : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_7_CYCLES : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_DISABLED : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_NONE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_COUNT : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_DIRECTION : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_GATING : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_LOAD : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_MODULATION : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_OVERRIDE : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_START : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_STOP : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_TRAP : xmc_ccu8.h
  • XMC_CCU8_SLICE_GateConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetCapturedValueFromFifo() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetCaptureRegisterValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetCountingDir() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetLastCapturedTimerValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetSliceMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerCompareMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerCountingMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerPeriodMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerRepeatMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_INPUT_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_EVENT0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_EVENT1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_EVENT2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_PERIOD_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_TRAP : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsDeadTimeCntr1Running() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsDeadTimeCntr2Running() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsExtendedCapReadEnabled() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsTimerRunning() : xmc_ccu8.h
  • XMC_CCU8_SLICE_LoadConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_LoadSelector() : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODE_CAPTURE : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODE_COMPARE : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_1_AND_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_NONE : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_OUT : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_ST_OUT : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_ModulationConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_PERIOD_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_1024 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_128 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_16 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_16384 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_2048 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_256 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_32 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_32768 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_4 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_4096 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_512 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_64 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_8 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_8192 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_MODE_FLOAT : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_MODE_NORMAL : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetDeadTimePrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetDeadTimeValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetDitherCompareValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetInput() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetInterruptNode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetOutPath() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetPassiveLevel() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetPrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetShadowTransferMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCompareMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCompareMatchChannel1() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCompareMatchChannel2() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCountingMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerPeriodMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerRepeatMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_IN_PERIOD_MATCH_AND_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_PERIOD_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_START_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_START_MODE_TIMER_START : xmc_ccu8.h
  • XMC_CCU8_SLICE_START_MODE_TIMER_START_CLEAR : xmc_ccu8.h
  • XMC_CCU8_SLICE_StartConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StartTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_1_AND_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_1_OR_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_StatusBitOverrideConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StopClearTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StopConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StopTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_ALWAYS : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_NEVER : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_DIR_DOWN : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_DIR_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_DIR_UP : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_MODE_CA : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_MODE_EA : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_REPEAT_MODE_REPEAT : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_REPEAT_MODE_SINGLE : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TRAP_EXIT_MODE_AUTOMATIC : xmc_ccu8.h
  • XMC_CCU8_SLICE_TRAP_EXIT_MODE_SW : xmc_ccu8.h
  • XMC_CCU8_SLICE_TRAP_EXIT_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TrapConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_WriteCoherentlyWithPWMCycle() : xmc_ccu8.h
  • XMC_CCU8_SLICE_WriteImmediateAfterShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_t : xmc_ccu8.h
  • XMC_CCU8_StartPrescaler() : xmc_ccu8.h
  • XMC_CCU8_STATUS_ERROR : xmc_ccu8.h
  • XMC_CCU8_STATUS_IDLE : xmc_ccu8.h
  • XMC_CCU8_STATUS_OK : xmc_ccu8.h
  • XMC_CCU8_STATUS_RUNNING : xmc_ccu8.h
  • XMC_CCU8_STATUS_t : xmc_ccu8.h
  • XMC_CCU8_StopPrescaler() : xmc_ccu8.h
  • XMC_ERU_Disable() : xmc_eru.h
  • XMC_ERU_Enable() : xmc_eru.h
  • XMC_ERU_ETL_ClearStatusFlag() : xmc_eru.h
  • XMC_ERU_ETL_DisableOutputTrigger() : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_BOTH : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_DISABLED : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_FALLING : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_RISING : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_t : xmc_eru.h
  • XMC_ERU_ETL_EnableOutputTrigger() : xmc_eru.h
  • XMC_ERU_ETL_GetEdgeDetection() : xmc_eru.h
  • XMC_ERU_ETL_GetStatusFlag() : xmc_eru.h
  • XMC_ERU_ETL_Init() : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A0 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A1 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A2 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A3 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A_t : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B0 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B1 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B2 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B3 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B_t : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL0 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL1 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL2 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL3 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_DISABLED : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_ENABLED : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_t : xmc_eru.h
  • XMC_ERU_ETL_SetEdgeDetection() : xmc_eru.h
  • XMC_ERU_ETL_SetInput() : xmc_eru.h
  • XMC_ERU_ETL_SetSource() : xmc_eru.h
  • XMC_ERU_ETL_SetStatusFlag() : xmc_eru.h
  • XMC_ERU_ETL_SetStatusFlagMode() : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_AND_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_AND_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_OR_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_OR_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_AND_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_AND_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_OR_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_OR_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_t : xmc_eru.h
  • XMC_ERU_ETL_STATUS_FLAG_MODE_HWCTRL : xmc_eru.h
  • XMC_ERU_ETL_STATUS_FLAG_MODE_SWCTRL : xmc_eru.h
  • XMC_ERU_ETL_STATUS_FLAG_MODE_t : xmc_eru.h
  • XMC_ERU_OGU_DisablePatternDetection() : xmc_eru.h
  • XMC_ERU_OGU_DisablePeripheralTrigger() : xmc_eru.h
  • XMC_ERU_OGU_EnablePatternDetection() : xmc_eru.h
  • XMC_ERU_OGU_EnablePeripheralTrigger() : xmc_eru.h
  • XMC_ERU_OGU_GetPatternDetectionStatus() : xmc_eru.h
  • XMC_ERU_OGU_Init() : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_DISABLED : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_ENABLED : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT0 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT1 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT2 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT3 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_t : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER1 : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER2 : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER3 : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER_t : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_DISABLED : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MATCH : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MISMATCH : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_t : xmc_eru.h
  • XMC_ERU_OGU_SetServiceRequestMode() : xmc_eru.h
  • XMC_FLASH_BASE : xmc1_flash.h
  • XMC_FLASH_BLOCKS_PER_PAGE : xmc1_flash.h
  • XMC_FLASH_BYTES_PER_BLOCK : xmc1_flash.h
  • XMC_FLASH_BYTES_PER_PAGE : xmc1_flash.h
  • XMC_FLASH_BYTES_PER_SECTOR : xmc1_flash.h
  • XMC_FLASH_ClearStatus() : xmc_flash.h
  • XMC_FLASH_DisableEvent() : xmc_flash.h
  • XMC_FLASH_EnableEvent() : xmc_flash.h
  • XMC_FLASH_EnterSleepMode() : xmc1_flash.h
  • XMC_FLASH_ErasePage() : xmc1_flash.h
  • XMC_FLASH_ErasePages() : xmc1_flash.h
  • XMC_FLASH_EraseSector() : xmc_flash.h
  • XMC_FLASH_EVENT_READY : xmc1_flash.h
  • XMC_FLASH_EVENT_t : xmc1_flash.h
  • XMC_FLASH_ExitSleepMode() : xmc1_flash.h
  • XMC_FLASH_GetSectorAddress() : xmc1_flash.h
  • XMC_FLASH_GetStatus() : xmc_flash.h
  • XMC_FLASH_HARDREAD_LEVEL_ERASED : xmc1_flash.h
  • XMC_FLASH_HARDREAD_LEVEL_NORMAL : xmc1_flash.h
  • XMC_FLASH_HARDREAD_LEVEL_t : xmc1_flash.h
  • XMC_FLASH_HARDREAD_LEVEL_WRITTEN : xmc1_flash.h
  • XMC_FLASH_IsBusy() : xmc_flash.h
  • XMC_FLASH_PAGES_PER_SECTOR : xmc1_flash.h
  • XMC_FLASH_ProgramPage() : xmc_flash.h
  • XMC_FLASH_ProgramVerifyPage() : xmc1_flash.h
  • XMC_FLASH_ReadBlocks() : xmc1_flash.h
  • XMC_FLASH_ReadWord() : xmc1_flash.h
  • XMC_FLASH_SetHardReadLevel() : xmc1_flash.h
  • XMC_FLASH_SetSectorProtection() : xmc1_flash.h
  • XMC_FLASH_STATUS_BUSY : xmc1_flash.h
  • XMC_FLASH_STATUS_ECC1_READ_ERROR : xmc1_flash.h
  • XMC_FLASH_STATUS_ECC2_READ_ERROR : xmc1_flash.h
  • XMC_FLASH_STATUS_OK : xmc1_flash.h
  • XMC_FLASH_STATUS_SLEEP_MODE : xmc1_flash.h
  • XMC_FLASH_STATUS_t : xmc1_flash.h
  • XMC_FLASH_STATUS_VERIFY_ERROR : xmc1_flash.h
  • XMC_FLASH_STATUS_WRITE_PROTOCOL_ERROR : xmc1_flash.h
  • XMC_FLASH_VerifyBlocks() : xmc1_flash.h
  • XMC_FLASH_WORDS_PER_BLOCK : xmc1_flash.h
  • XMC_FLASH_WORDS_PER_PAGE : xmc1_flash.h
  • XMC_FLASH_WORDS_PER_SECTOR : xmc1_flash.h
  • XMC_FLASH_WriteBlocks() : xmc1_flash.h
  • XMC_GPIO_DisableDigitalInput() : xmc_gpio.h
  • XMC_GPIO_DisablePowerSaveMode() : xmc_gpio.h
  • XMC_GPIO_EnableDigitalInput() : xmc_gpio.h
  • XMC_GPIO_EnablePowerSaveMode() : xmc_gpio.h
  • XMC_GPIO_GetInput() : xmc_gpio.h
  • XMC_GPIO_HWCTRL_DISABLED : xmc_gpio.h
  • XMC_GPIO_HWCTRL_PERIPHERAL1 : xmc_gpio.h
  • XMC_GPIO_HWCTRL_PERIPHERAL2 : xmc_gpio.h
  • XMC_GPIO_HWCTRL_t : xmc_gpio.h
  • XMC_GPIO_Init() : xmc_gpio.h
  • XMC_GPIO_INPUT_HYSTERESIS_LARGE : xmc1_gpio.h
  • XMC_GPIO_INPUT_HYSTERESIS_STANDARD : xmc1_gpio.h
  • XMC_GPIO_INPUT_HYSTERESIS_t : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_PULL_DOWN : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_PULL_UP : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_SAMPLING : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_TRISTATE : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_PULL_DOWN : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_PULL_UP : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_SAMPLING : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_TRISTATE : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT1 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT2 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT3 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT4 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT5 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT6 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT7 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT3 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT5 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT6 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT7 : xmc1_gpio.h
  • XMC_GPIO_MODE_t : xmc1_gpio.h
  • XMC_GPIO_OUTPUT_LEVEL_HIGH : xmc_gpio.h
  • XMC_GPIO_OUTPUT_LEVEL_LOW : xmc_gpio.h
  • XMC_GPIO_OUTPUT_LEVEL_t : xmc_gpio.h
  • XMC_GPIO_SetHardwareControl() : xmc_gpio.h
  • XMC_GPIO_SetInputHysteresis() : xmc1_gpio.h
  • XMC_GPIO_SetMode() : xmc_gpio.h
  • XMC_GPIO_SetOutputHigh() : xmc_gpio.h
  • XMC_GPIO_SetOutputLevel() : xmc_gpio.h
  • XMC_GPIO_SetOutputLow() : xmc_gpio.h
  • XMC_GPIO_ToggleOutput() : xmc_gpio.h
  • XMC_I2C0_CH0 : xmc_i2c.h
  • XMC_I2C0_CH1 : xmc_i2c.h
  • XMC_I2C1_CH0 : xmc_i2c.h
  • XMC_I2C1_CH1 : xmc_i2c.h
  • XMC_I2C2_CH0 : xmc_i2c.h
  • XMC_I2C2_CH1 : xmc_i2c.h
  • XMC_I2C_10BIT_ADDR_GROUP : xmc_i2c.h
  • XMC_I2C_CH_ClearStatusFlag() : xmc_i2c.h
  • XMC_I2C_CH_CMD_READ : xmc_i2c.h
  • XMC_I2C_CH_CMD_t : xmc_i2c.h
  • XMC_I2C_CH_CMD_WRITE : xmc_i2c.h
  • XMC_I2C_CH_ConfigExternalInputSignalToBRG() : xmc_i2c.h
  • XMC_I2C_CH_DisableAcknowledgeAddress0() : xmc_i2c.h
  • XMC_I2C_CH_DisableDataTransmission() : xmc_i2c.h
  • XMC_I2C_CH_DisableEvent() : xmc_i2c.h
  • XMC_I2C_CH_EnableAcknowledgeAddress0() : xmc_i2c.h
  • XMC_I2C_CH_EnableDataTransmission() : xmc_i2c.h
  • XMC_I2C_CH_EnableEvent() : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ACK : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ARBITRATION_LOST : xmc_i2c.h
  • XMC_I2C_CH_EVENT_BAUD_RATE_GENERATOR : xmc_i2c.h
  • XMC_I2C_CH_EVENT_DATA_LOST : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ERROR : xmc_i2c.h
  • XMC_I2C_CH_EVENT_NACK : xmc_i2c.h
  • XMC_I2C_CH_EVENT_RECEIVE_START : xmc_i2c.h
  • XMC_I2C_CH_EVENT_REPEATED_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_EVENT_SLAVE_READ_REQUEST : xmc_i2c.h
  • XMC_I2C_CH_EVENT_STANDARD_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_EVENT_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_EVENT_STOP_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_EVENT_t : xmc_i2c.h
  • XMC_I2C_CH_EVENT_TRANSMIT_BUFFER : xmc_i2c.h
  • XMC_I2C_CH_EVENT_TRANSMIT_SHIFT : xmc_i2c.h
  • XMC_I2C_CH_GetReceivedData() : xmc_i2c.h
  • XMC_I2C_CH_GetReceiverStatusFlag() : xmc_i2c.h
  • XMC_I2C_CH_GetSlaveAddress() : xmc_i2c.h
  • XMC_I2C_CH_GetStatusFlag() : xmc_i2c.h
  • XMC_I2C_CH_Init() : xmc_i2c.h
  • XMC_I2C_CH_INPUT_SCL : xmc_i2c.h
  • XMC_I2C_CH_INPUT_SDA : xmc_i2c.h
  • XMC_I2C_CH_INPUT_t : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_t : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_i2c.h
  • XMC_I2C_CH_MasterReceiveAck() : xmc_i2c.h
  • XMC_I2C_CH_MasterReceiveNack() : xmc_i2c.h
  • XMC_I2C_CH_MasterRepeatedStart() : xmc_i2c.h
  • XMC_I2C_CH_MasterStart() : xmc_i2c.h
  • XMC_I2C_CH_MasterStop() : xmc_i2c.h
  • XMC_I2C_CH_MasterTransmit() : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_ACK : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_ADR : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_ERR : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_FIN : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_MODE : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_t : xmc_i2c.h
  • XMC_I2C_CH_SelectInterruptNodePointer() : xmc_i2c.h
  • XMC_I2C_CH_SetBaudrate() : xmc_i2c.h
  • XMC_I2C_CH_SetInputSource() : xmc_i2c.h
  • XMC_I2C_CH_SetInterruptNodePointer() : xmc_i2c.h
  • XMC_I2C_CH_SetSlaveAddress() : xmc_i2c.h
  • XMC_I2C_CH_SlaveTransmit() : xmc_i2c.h
  • XMC_I2C_CH_Start() : xmc_i2c.h
  • XMC_I2C_CH_STATUS_BUSY : xmc_i2c.h
  • XMC_I2C_CH_STATUS_ERROR : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ACK_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ARBITRATION_LOST : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ERROR : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_NACK_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_REPEATED_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_SLAVE_READ_REQUESTED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_SLAVE_SELECT : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_STOP_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_t : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_WRONG_TDF_CODE_FOUND : xmc_i2c.h
  • XMC_I2C_CH_STATUS_OK : xmc_i2c.h
  • XMC_I2C_CH_STATUS_t : xmc_i2c.h
  • XMC_I2C_CH_Stop() : xmc_i2c.h
  • XMC_I2C_CH_TriggerServiceRequest() : xmc_i2c.h
  • XMC_I2S0_CH0 : xmc_i2s.h
  • XMC_I2S0_CH1 : xmc_i2s.h
  • XMC_I2S1_CH0 : xmc_i2s.h
  • XMC_I2S1_CH1 : xmc_i2s.h
  • XMC_I2S2_CH0 : xmc_i2s.h
  • XMC_I2S2_CH1 : xmc_i2s.h
  • XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 : xmc_i2s.h
  • XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK : xmc_i2s.h
  • XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t : xmc_i2s.h
  • XMC_I2S_CH_BUS_MODE_MASTER : xmc_i2s.h
  • XMC_I2S_CH_BUS_MODE_SLAVE : xmc_i2s.h
  • XMC_I2S_CH_BUS_MODE_t : xmc_i2s.h
  • XMC_I2S_CH_CHANNEL_1_LEFT : xmc_i2s.h
  • XMC_I2S_CH_CHANNEL_2_RIGHT : xmc_i2s.h
  • XMC_I2S_CH_CHANNEL_t : xmc_i2s.h
  • XMC_I2S_CH_ClearStatusFlag() : xmc_i2s.h
  • XMC_I2S_CH_ConfigureShiftClockOutput() : xmc_i2s.h
  • XMC_I2S_CH_DisableDataTransmission() : xmc_i2s.h
  • XMC_I2S_CH_DisableDelayCompensation() : xmc_i2s.h
  • XMC_I2S_CH_DisableEvent() : xmc_i2s.h
  • XMC_I2S_CH_DisableInputInversion() : xmc_i2s.h
  • XMC_I2S_CH_DisableMasterClock() : xmc_i2s.h
  • XMC_I2S_CH_EnableDataTransmission() : xmc_i2s.h
  • XMC_I2S_CH_EnableDelayCompensation() : xmc_i2s.h
  • XMC_I2S_CH_EnableEvent() : xmc_i2s.h
  • XMC_I2S_CH_EnableInputInversion() : xmc_i2s.h
  • XMC_I2S_CH_EnableMasterClock() : xmc_i2s.h
  • XMC_I2S_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_EVENT_BAUD_RATE_GENERATOR : xmc_i2s.h
  • XMC_I2S_CH_EVENT_DATA_LOST : xmc_i2s.h
  • XMC_I2S_CH_EVENT_DX2TIEN_ACTIVATED : xmc_i2s.h
  • XMC_I2S_CH_EVENT_RECEIVE_START : xmc_i2s.h
  • XMC_I2S_CH_EVENT_STANDARD_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_EVENT_t : xmc_i2s.h
  • XMC_I2S_CH_EVENT_TRANSMIT_BUFFER : xmc_i2s.h
  • XMC_I2S_CH_EVENT_TRANSMIT_SHIFT : xmc_i2s.h
  • XMC_I2S_CH_EVENT_WA_FALLING_EDGE : xmc_i2s.h
  • XMC_I2S_CH_EVENT_WA_GENERATION_END : xmc_i2s.h
  • XMC_I2S_CH_EVENT_WA_RISING_EDGE : xmc_i2s.h
  • XMC_I2S_CH_GetReceivedData() : xmc_i2s.h
  • XMC_I2S_CH_GetStatusFlag() : xmc_i2s.h
  • XMC_I2S_CH_Init() : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN0 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN1 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN2 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN3 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_SLAVE_SCLKIN : xmc_i2s.h
  • XMC_I2S_CH_INPUT_SLAVE_WA : xmc_i2s.h
  • XMC_I2S_CH_INPUT_t : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_t : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_i2s.h
  • XMC_I2S_CH_Receive() : xmc_i2s.h
  • XMC_I2S_CH_SelectInterruptNodePointer() : xmc_i2s.h
  • XMC_I2S_CH_SetBaudrate() : xmc_i2s.h
  • XMC_I2S_CH_SetBitOrderLsbFirst() : xmc_i2s.h
  • XMC_I2S_CH_SetBitOrderMsbFirst() : xmc_i2s.h
  • XMC_I2S_CH_SetFrameLength() : xmc_i2s.h
  • XMC_I2S_CH_SetInputSource() : xmc_i2s.h
  • XMC_I2S_CH_SetInterruptNodePointer() : xmc_i2s.h
  • XMC_I2S_CH_SetSystemWordLength() : xmc_i2s.h
  • XMC_I2S_CH_SetWordLength() : xmc_i2s.h
  • XMC_I2S_CH_Start() : xmc_i2s.h
  • XMC_I2S_CH_STATUS_BUSY : xmc_i2s.h
  • XMC_I2S_CH_STATUS_ERROR : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_DX2S : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_DX2T_EVENT_DETECTED : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_t : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WA_FALLING_EDGE_EVENT : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WA_GENERATION_END : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WA_RISING_EDGE_EVENT : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WORD_ADDRESS : xmc_i2s.h
  • XMC_I2S_CH_STATUS_OK : xmc_i2s.h
  • XMC_I2S_CH_STATUS_t : xmc_i2s.h
  • XMC_I2S_CH_Stop() : xmc_i2s.h
  • XMC_I2S_CH_Transmit() : xmc_i2s.h
  • XMC_I2S_CH_TriggerServiceRequest() : xmc_i2s.h
  • XMC_I2S_CH_WA_POLARITY_DIRECT : xmc_i2s.h
  • XMC_I2S_CH_WA_POLARITY_INVERTED : xmc_i2s.h
  • XMC_I2S_CH_WA_POLARITY_t : xmc_i2s.h
  • XMC_I2S_CH_WordAddressSignalPolarity() : xmc_i2s.h
  • XMC_LEDTS0 : xmc_ledts.h
  • XMC_LEDTS1 : xmc_ledts.h
  • XMC_LEDTS2 : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_10_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_11_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_12_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_13_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_14_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_15_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_16_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_1_TIME : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_2_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_3_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_4_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_5_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_6_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_7_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_8_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_9_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_t : xmc_ledts.h
  • XMC_LEDTS_ACTIVE_LEVEL_LED_COL_HIGH : xmc_ledts.h
  • XMC_LEDTS_ACTIVE_LEVEL_LED_COL_LOW : xmc_ledts.h
  • XMC_LEDTS_ACTIVE_LEVEL_LED_COL_t : xmc_ledts.h
  • XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_ACTIVE : xmc_ledts.h
  • XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_INACTIVE : xmc_ledts.h
  • XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_t : xmc_ledts.h
  • XMC_LEDTS_ClearInterruptFlag() : xmc_ledts.h
  • XMC_LEDTS_CLOCK_TYPE_MASTER : xmc_ledts.h
  • XMC_LEDTS_CLOCK_TYPE_SLAVE : xmc_ledts.h
  • XMC_LEDTS_CLOCK_TYPE_t : xmc_ledts.h
  • XMC_LEDTS_COMMON_COMPARE_DISABLE : xmc_ledts.h
  • XMC_LEDTS_COMMON_COMPARE_ENABLE : xmc_ledts.h
  • XMC_LEDTS_COMMON_COMPARE_t : xmc_ledts.h
  • XMC_LEDTS_DisableInterrupt() : xmc_ledts.h
  • XMC_LEDTS_EnableInterrupt() : xmc_ledts.h
  • XMC_LEDTS_EXT_PULLUP_COLA_DISABLE : xmc_ledts.h
  • XMC_LEDTS_EXT_PULLUP_COLA_ENABLE : xmc_ledts.h
  • XMC_LEDTS_EXT_PULLUP_COLA_t : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_16_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_1_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_4_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_8_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_t : xmc_ledts.h
  • XMC_LEDTS_FLAG_STATUS_NO : xmc_ledts.h
  • XMC_LEDTS_FLAG_STATUS_t : xmc_ledts.h
  • XMC_LEDTS_FLAG_STATUS_YES : xmc_ledts.h
  • XMC_LEDTS_InitGlobal() : xmc_ledts.h
  • XMC_LEDTS_InitLED() : xmc_ledts.h
  • XMC_LEDTS_InitTSAdvanced() : xmc_ledts.h
  • XMC_LEDTS_InitTSBasic() : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TIMEFRAME : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TIMEPERIOD : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TIMESLICE : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TSCOUNTER_OVERFLOW : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_t : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_TIMEFRAME : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_TIMEPERIOD : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_TIMESLICE : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_0 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_1 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_2 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_3 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_4 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_5 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_6 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_A : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_t : xmc_ledts.h
  • XMC_LEDTS_LED_FUNC_DISABLE : xmc_ledts.h
  • XMC_LEDTS_LED_FUNC_ENABLE : xmc_ledts.h
  • XMC_LEDTS_LED_FUNC_t : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_1 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_2 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_3 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_4 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_5 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_6 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_7 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_8 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_t : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_1 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_2 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_3 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_4 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_5 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_6 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_7 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_8 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_t : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_0 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_1 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_2 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_3 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_4 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_5 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_6 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_7 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_SW_CONTROL_t : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_t : xmc_ledts.h
  • XMC_LEDTS_ReadFNCOL() : xmc_ledts.h
  • XMC_LEDTS_ReadInterruptFlag() : xmc_ledts.h
  • XMC_LEDTS_ReadTSVAL() : xmc_ledts.h
  • XMC_LEDTS_SetActivePADNo() : xmc_ledts.h
  • XMC_LEDTS_SetColumnBrightness() : xmc_ledts.h
  • XMC_LEDTS_SetCommonOscillationWindow() : xmc_ledts.h
  • XMC_LEDTS_SetLEDLinePattern() : xmc_ledts.h
  • XMC_LEDTS_SetNumOfLEDColumns() : xmc_ledts.h
  • XMC_LEDTS_SetOscillationWindow() : xmc_ledts.h
  • XMC_LEDTS_StartCounter() : xmc_ledts.h
  • XMC_LEDTS_STATUS_ERROR : xmc_ledts.h
  • XMC_LEDTS_STATUS_IDLE : xmc_ledts.h
  • XMC_LEDTS_STATUS_RUNNING : xmc_ledts.h
  • XMC_LEDTS_STATUS_SUCCESS : xmc_ledts.h
  • XMC_LEDTS_STATUS_t : xmc_ledts.h
  • XMC_LEDTS_StopCounter() : xmc_ledts.h
  • XMC_LEDTS_SUSPEND_DISABLE : xmc_ledts.h
  • XMC_LEDTS_SUSPEND_ENABLE : xmc_ledts.h
  • XMC_LEDTS_SUSPEND_t : xmc_ledts.h
  • XMC_LEDTS_SW_CONTROL_DISABLE : xmc_ledts.h
  • XMC_LEDTS_SW_CONTROL_ENABLE : xmc_ledts.h
  • XMC_LEDTS_t : xmc_ledts.h
  • XMC_LEDTS_TF_INTERRUPT_FLAG_ACTIVE : xmc_ledts.h
  • XMC_LEDTS_TF_INTERRUPT_FLAG_INACTIVE : xmc_ledts.h
  • XMC_LEDTS_TF_INTERRUPT_FLAG_t : xmc_ledts.h
  • XMC_LEDTS_TF_VALIDATION_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TF_VALIDATION_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TF_VALIDATION_t : xmc_ledts.h
  • XMC_LEDTS_TP_SYNC_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TP_SYNC_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TP_SYNC_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_AUTO_RESET_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_AUTO_RESET_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_AUTO_RESET_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_1_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_2_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_3_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_4_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_5_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_6_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_7_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_8_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_NO : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_YES : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_SATURATION_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_SATURATION_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_SATURATION_t : xmc_ledts.h
  • XMC_LEDTS_TS_FUNC_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TS_FUNC_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_FUNC_t : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_0 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_1 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_2 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_3 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_4 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_5 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_6 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_7 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_t : xmc_ledts.h
  • XMC_LEDTS_TS_INTERRUPT_FLAG_t : xmc_ledts.h
  • XMC_MATH_ClearEvent() : xmc_math.h
  • XMC_MATH_CORDIC_ArcTan() : xmc_math.h
  • XMC_MATH_CORDIC_ArcTanNB() : xmc_math.h
  • XMC_MATH_CORDIC_CORDXRC_DISABLED : xmc_math.h
  • XMC_MATH_CORDIC_CORDXRC_QUOT_IS_SOURCE : xmc_math.h
  • XMC_MATH_CORDIC_CORDXRC_RMD_IS_SOURCE : xmc_math.h
  • XMC_MATH_CORDIC_CORDXRC_t : xmc_math.h
  • XMC_MATH_CORDIC_CORDYRC_DISABLED : xmc_math.h
  • XMC_MATH_CORDIC_CORDYRC_QUOT_IS_SOURCE : xmc_math.h
  • XMC_MATH_CORDIC_CORDYRC_RMD_IS_SOURCE : xmc_math.h
  • XMC_MATH_CORDIC_CORDYRC_t : xmc_math.h
  • XMC_MATH_CORDIC_CORDZRC_DISABLED : xmc_math.h
  • XMC_MATH_CORDIC_CORDZRC_QUOT_IS_SOURCE : xmc_math.h
  • XMC_MATH_CORDIC_CORDZRC_RMD_IS_SOURCE : xmc_math.h
  • XMC_MATH_CORDIC_CORDZRC_t : xmc_math.h
  • XMC_MATH_CORDIC_Cos() : xmc_math.h
  • XMC_MATH_CORDIC_Cosh() : xmc_math.h
  • XMC_MATH_CORDIC_CoshNB() : xmc_math.h
  • XMC_MATH_CORDIC_CosNB() : xmc_math.h
  • XMC_MATH_CORDIC_GetArcTanResult() : xmc_math.h
  • XMC_MATH_CORDIC_GetCoshResult() : xmc_math.h
  • XMC_MATH_CORDIC_GetCosResult() : xmc_math.h
  • XMC_MATH_CORDIC_GetSinhResult() : xmc_math.h
  • XMC_MATH_CORDIC_GetSinResult() : xmc_math.h
  • XMC_MATH_CORDIC_GetTanhResult() : xmc_math.h
  • XMC_MATH_CORDIC_GetTanResult() : xmc_math.h
  • XMC_MATH_CORDIC_IsBusy() : xmc_math.h
  • XMC_MATH_CORDIC_MAGNITUDE_DIVBY1 : xmc_math.h
  • XMC_MATH_CORDIC_MAGNITUDE_DIVBY2 : xmc_math.h
  • XMC_MATH_CORDIC_MAGNITUDE_DIVBY4 : xmc_math.h
  • XMC_MATH_CORDIC_MAGNITUDE_t : xmc_math.h
  • XMC_MATH_CORDIC_OPERATING_MODE_CIRCULAR : xmc_math.h
  • XMC_MATH_CORDIC_OPERATING_MODE_HYPERBOLIC : xmc_math.h
  • XMC_MATH_CORDIC_OPERATING_MODE_LINEAR : xmc_math.h
  • XMC_MATH_CORDIC_OPERATING_MODE_t : xmc_math.h
  • XMC_MATH_CORDIC_Q15_Sqrt() : xmc_math.h
  • XMC_MATH_CORDIC_Q31_Sqrt() : xmc_math.h
  • XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION : xmc_math.h
  • XMC_MATH_CORDIC_ROTVEC_MODE_t : xmc_math.h
  • XMC_MATH_CORDIC_ROTVEC_MODE_VECTORING : xmc_math.h
  • XMC_MATH_CORDIC_Sin() : xmc_math.h
  • XMC_MATH_CORDIC_Sinh() : xmc_math.h
  • XMC_MATH_CORDIC_SinhNB() : xmc_math.h
  • XMC_MATH_CORDIC_SinNB() : xmc_math.h
  • XMC_MATH_CORDIC_Tan() : xmc_math.h
  • XMC_MATH_CORDIC_Tanh() : xmc_math.h
  • XMC_MATH_CORDIC_TanhNB() : xmc_math.h
  • XMC_MATH_CORDIC_TanNB() : xmc_math.h
  • XMC_MATH_Disable() : xmc_math.h
  • XMC_MATH_DisableEvent() : xmc_math.h
  • XMC_MATH_DIV_DVDRC_CORRX_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVDRC_CORRY_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVDRC_CORRZ_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVDRC_DISABLED : xmc_math.h
  • XMC_MATH_DIV_DVDRC_QUOT_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVDRC_RMD_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVDRC_t : xmc_math.h
  • XMC_MATH_DIV_DVSRC_CORRX_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVSRC_CORRY_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVSRC_CORRZ_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVSRC_DISABLED : xmc_math.h
  • XMC_MATH_DIV_DVSRC_QUOT_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVSRC_RMD_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVSRC_t : xmc_math.h
  • XMC_MATH_DIV_GetSignedDivResult() : xmc_math.h
  • XMC_MATH_DIV_GetSignedModResult() : xmc_math.h
  • XMC_MATH_DIV_GetUnsignedDivResult() : xmc_math.h
  • XMC_MATH_DIV_GetUnsignedModResult() : xmc_math.h
  • XMC_MATH_DIV_IsBusy() : xmc_math.h
  • XMC_MATH_DIV_SignedDivNB() : xmc_math.h
  • XMC_MATH_DIV_SignedModNB() : xmc_math.h
  • XMC_MATH_DIV_UnsignedDivNB() : xmc_math.h
  • XMC_MATH_DIV_UnsignedModNB() : xmc_math.h
  • XMC_MATH_Enable() : xmc_math.h
  • XMC_MATH_EnableEvent() : xmc_math.h
  • XMC_MATH_EVENT_CORDIC_END_OF_CALC : xmc_math.h
  • XMC_MATH_EVENT_CORDIC_ERROR : xmc_math.h
  • XMC_MATH_EVENT_DIV_END_OF_CALC : xmc_math.h
  • XMC_MATH_EVENT_DIV_ERROR : xmc_math.h
  • XMC_MATH_EVENT_t : xmc_math.h
  • XMC_MATH_GetEventStatus() : xmc_math.h
  • XMC_MATH_Q0_11 : xmc_math.h
  • XMC_MATH_Q0_11_t : xmc_math.h
  • XMC_MATH_Q0_23 : xmc_math.h
  • XMC_MATH_Q0_23_t : xmc_math.h
  • XMC_MATH_Q1_22_t : xmc_math.h
  • XMC_MATH_Q8_15_t : xmc_math.h
  • XMC_MATH_SetEvent() : xmc_math.h
  • XMC_PAU : xmc_pau.h
  • XMC_PAU_DisablePeripheralAccess() : xmc_pau.h
  • XMC_PAU_EnablePeripheralAccess() : xmc_pau.h
  • XMC_PAU_GetFlashSize() : xmc_pau.h
  • XMC_PAU_GetRAMSize() : xmc_pau.h
  • XMC_PAU_GetROMSize() : xmc_pau.h
  • XMC_PAU_IsPeripheralAccessEnabled() : xmc_pau.h
  • XMC_PAU_IsPeripheralAvailable() : xmc_pau.h
  • XMC_PAU_PERIPHERAL_BCCU0 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_CCU40_CC40_AND_GLOBAL : xmc_pau.h
  • XMC_PAU_PERIPHERAL_CCU41_CC40_AND_GLOBAL : xmc_pau.h
  • XMC_PAU_PERIPHERAL_CCU80_CC80_AND_GLOBAL : xmc_pau.h
  • XMC_PAU_PERIPHERAL_CCU81_CC80_AND_GLOBAL : xmc_pau.h
  • XMC_PAU_PERIPHERAL_FLASH : xmc_pau.h
  • XMC_PAU_PERIPHERAL_LEDTS0 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_LEDTS1 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_LEDTS2 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_MATH_CORDIC : xmc_pau.h
  • XMC_PAU_PERIPHERAL_MATH_GLOBAL_AND_DIV : xmc_pau.h
  • XMC_PAU_PERIPHERAL_MCAN_OBJECTS : xmc_pau.h
  • XMC_PAU_PERIPHERAL_POSIF0 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_POSIF1 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_PRNG : xmc_pau.h
  • XMC_PAU_PERIPHERAL_RAM_BLOCK1 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_RAM_BLOCK2 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_RAM_BLOCK3 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_t : xmc_pau.h
  • XMC_PAU_PERIPHERAL_USIC0_CH0 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_USIC0_CH1 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_USIC1_CH0 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_USIC1_CH1 : xmc_pau.h
  • XMC_PAU_STATUS_BUSY : xmc_pau.h
  • XMC_PAU_STATUS_ERROR : xmc_pau.h
  • XMC_PAU_STATUS_OK : xmc_pau.h
  • XMC_PAU_STATUS_t : xmc_pau.h
  • XMC_POSIF_ClearEvent() : xmc_posif.h
  • XMC_POSIF_Disable() : xmc_posif.h
  • XMC_POSIF_DisableEvent() : xmc_posif.h
  • XMC_POSIF_Enable() : xmc_posif.h
  • XMC_POSIF_EnableEvent() : xmc_posif.h
  • XMC_POSIF_FILTER_16_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_1_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_2_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_32_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_4_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_64_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_8_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_DISABLED : xmc_posif.h
  • XMC_POSIF_FILTER_t : xmc_posif.h
  • XMC_POSIF_GetEventStatus() : xmc_posif.h
  • XMC_POSIF_HSC_GetCurrentPattern() : xmc_posif.h
  • XMC_POSIF_HSC_GetExpectedPattern() : xmc_posif.h
  • XMC_POSIF_HSC_GetLastSampledPattern() : xmc_posif.h
  • XMC_POSIF_HSC_Init() : xmc_posif.h
  • XMC_POSIF_HSC_SetCurrentPattern() : xmc_posif.h
  • XMC_POSIF_HSC_SetExpectedPattern() : xmc_posif.h
  • XMC_POSIF_HSC_SetHallPatterns() : xmc_posif.h
  • XMC_POSIF_HSC_TRIGGER_EDGE_FALLING : xmc_posif.h
  • XMC_POSIF_HSC_TRIGGER_EDGE_RISING : xmc_posif.h
  • XMC_POSIF_HSC_TRIGGER_EDGE_t : xmc_posif.h
  • XMC_POSIF_HSC_UpdateHallPattern() : xmc_posif.h
  • XMC_POSIF_Init() : xmc_posif.h
  • XMC_POSIF_INPUT_ACTIVE_LEVEL_HIGH : xmc_posif.h
  • XMC_POSIF_INPUT_ACTIVE_LEVEL_LOW : xmc_posif.h
  • XMC_POSIF_INPUT_ACTIVE_LEVEL_t : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_A : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_B : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_C : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_D : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_E : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_F : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_G : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_H : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_t : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_CHE : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_CNT : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_DIR : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_ERR : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_HALL_INPUT : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_INDX : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_MCP_SHADOW_TRANSFER : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_PCLK : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_t : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_WHE : xmc_posif.h
  • XMC_POSIF_IsRunning() : xmc_posif.h
  • XMC_POSIF_MCM_EnableMultiChannelPatternUpdate() : xmc_posif.h
  • XMC_POSIF_MCM_GetMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MCM_GetShadowMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MCM_Init() : xmc_posif.h
  • XMC_POSIF_MCM_SetMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MCM_UpdateMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MODE_HALL_SENSOR : xmc_posif.h
  • XMC_POSIF_MODE_MCM : xmc_posif.h
  • XMC_POSIF_MODE_MCM_QD : xmc_posif.h
  • XMC_POSIF_MODE_QD : xmc_posif.h
  • XMC_POSIF_MODE_t : xmc_posif.h
  • XMC_POSIF_QD_DIR_CLOCKWISE : xmc_posif.h
  • XMC_POSIF_QD_DIR_COUNTERCLOCKWISE : xmc_posif.h
  • XMC_POSIF_QD_DIR_t : xmc_posif.h
  • XMC_POSIF_QD_GetCurrentIndexValue() : xmc_posif.h
  • XMC_POSIF_QD_GetCurrentState() : xmc_posif.h
  • XMC_POSIF_QD_GetDirection() : xmc_posif.h
  • XMC_POSIF_QD_GetPreviousState() : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_ALWAYS : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_NEVER : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_ONCE : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_t : xmc_posif.h
  • XMC_POSIF_QD_Init() : xmc_posif.h
  • XMC_POSIF_QD_MODE_DIRECTION_COUNT : xmc_posif.h
  • XMC_POSIF_QD_MODE_QUADRATURE : xmc_posif.h
  • XMC_POSIF_QD_MODE_t : xmc_posif.h
  • XMC_POSIF_SelectInputSource() : xmc_posif.h
  • XMC_POSIF_SetEvent() : xmc_posif.h
  • XMC_POSIF_SetInterruptNode() : xmc_posif.h
  • XMC_POSIF_SetMode() : xmc_posif.h
  • XMC_POSIF_SR_ID_0 : xmc_posif.h
  • XMC_POSIF_SR_ID_1 : xmc_posif.h
  • XMC_POSIF_SR_ID_t : xmc_posif.h
  • XMC_POSIF_Start() : xmc_posif.h
  • XMC_POSIF_STATUS_ERROR : xmc_posif.h
  • XMC_POSIF_STATUS_OK : xmc_posif.h
  • XMC_POSIF_STATUS_t : xmc_posif.h
  • XMC_POSIF_Stop() : xmc_posif.h
  • XMC_POSIF_t : xmc_posif.h
  • XMC_PRNG_CheckValidStatus() : xmc_prng.h
  • XMC_PRNG_DATA_BLOCK_SIZE_t : xmc_prng.h
  • XMC_PRNG_EnableKeyLoadingMode() : xmc_prng.h
  • XMC_PRNG_EnableStreamingMode() : xmc_prng.h
  • XMC_PRNG_GetPseudoRandomNumber() : xmc_prng.h
  • XMC_PRNG_Init() : xmc_prng.h
  • XMC_PRNG_INIT_STATUS_t : xmc_prng.h
  • XMC_PRNG_INITIALIZED : xmc_prng.h
  • XMC_PRNG_KEY_LOAD_OP_MODE_t : xmc_prng.h
  • XMC_PRNG_KLD_MODE : xmc_prng.h
  • XMC_PRNG_LoadKeyWords() : xmc_prng.h
  • XMC_PRNG_NOT_INITIALIZED : xmc_prng.h
  • XMC_PRNG_RDBS_BYTE : xmc_prng.h
  • XMC_PRNG_RDBS_BYTE_READ_MASK : xmc_prng.h
  • XMC_PRNG_RDBS_RESET : xmc_prng.h
  • XMC_PRNG_RDBS_WORD : xmc_prng.h
  • XMC_PRNG_SetRandomDataBlockSize() : xmc_prng.h
  • XMC_PRNG_STRM_MODE : xmc_prng.h
  • XMC_RTC_ClearEvent() : xmc_rtc.h
  • XMC_RTC_DEBUG_MODE_t : xmc1_rtc.h
  • XMC_RTC_Disable() : xmc_rtc.h
  • XMC_RTC_DisableEvent() : xmc_rtc.h
  • XMC_RTC_Enable() : xmc_rtc.h
  • XMC_RTC_EnableEvent() : xmc_rtc.h
  • XMC_RTC_EVENT_ALARM : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_DAYS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_HOURS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_MINUTES : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_MONTHS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_SECONDS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_YEARS : xmc_rtc.h
  • XMC_RTC_EVENT_t : xmc_rtc.h
  • XMC_RTC_GetAlarm() : xmc_rtc.h
  • XMC_RTC_GetAlarmStdFormat() : xmc_rtc.h
  • XMC_RTC_GetEventStatus() : xmc_rtc.h
  • XMC_RTC_GetPrescaler() : xmc_rtc.h
  • XMC_RTC_GetTime() : xmc_rtc.h
  • XMC_RTC_GetTimeStdFormat() : xmc_rtc.h
  • XMC_RTC_Init() : xmc_rtc.h
  • XMC_RTC_IsEnabled() : xmc_rtc.h
  • XMC_RTC_IsRunning() : xmc_rtc.h
  • XMC_RTC_MONTH_t : xmc_rtc.h
  • XMC_RTC_RUN_IN_DEBUG_MODE : xmc1_rtc.h
  • XMC_RTC_SetAlarm() : xmc_rtc.h
  • XMC_RTC_SetAlarmStdFormat() : xmc_rtc.h
  • XMC_RTC_SetDebugMode() : xmc1_rtc.h
  • XMC_RTC_SetPrescaler() : xmc_rtc.h
  • XMC_RTC_SetTime() : xmc_rtc.h
  • XMC_RTC_SetTimeStdFormat() : xmc_rtc.h
  • XMC_RTC_Start() : xmc_rtc.h
  • XMC_RTC_STATUS_BUSY : xmc_rtc.h
  • XMC_RTC_STATUS_ERROR : xmc_rtc.h
  • XMC_RTC_STATUS_OK : xmc_rtc.h
  • XMC_RTC_STATUS_t : xmc_rtc.h
  • XMC_RTC_Stop() : xmc_rtc.h
  • XMC_RTC_STOP_IN_DEBUG_MODE : xmc1_rtc.h
  • XMC_RTC_WEEKDAY_t : xmc_rtc.h
  • XMC_SCU_BMI_CANCLK_DCO1 : xmc1_scu.h
  • XMC_SCU_BMI_CANCLK_OSCHP : xmc1_scu.h
  • XMC_SCU_BMI_DAPDIS_CHANNEL_0 : xmc1_scu.h
  • XMC_SCU_BMI_DAPDIS_CHANNEL_1 : xmc1_scu.h
  • XMC_SCU_BMI_DAPTYP_SPD : xmc1_scu.h
  • XMC_SCU_BMI_DAPTYP_SWD : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_ASC_BSL : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_ASC_BSLTO : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_CAN_BSL : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_CAN_BSLTO : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_SBSL : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_SBSL_CANOPEN : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_SSC_BSL : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_SSC_BSLTO : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_UMD : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_UMHAR : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_UPM : xmc1_scu.h
  • XMC_SCU_CalcTemperature() : xmc1_scu.h
  • XMC_SCU_CCU_TRIGGER_CCU40 : xmc1_scu.h
  • XMC_SCU_CCU_TRIGGER_CCU41 : xmc1_scu.h
  • XMC_SCU_CCU_TRIGGER_CCU80 : xmc1_scu.h
  • XMC_SCU_CCU_TRIGGER_CCU81 : xmc1_scu.h
  • XMC_SCU_CCU_TRIGGER_t : xmc1_scu.h
  • XMC_SCU_CLOCK_CalibrateOscillatorOnTemperature() : xmc1_scu.h
  • XMC_SCU_CLOCK_ClearDCO1OscillatorWatchdogStatus() : xmc1_scu.h
  • XMC_SCU_CLOCK_DCLKSRC_DCO1 : xmc1_scu.h
  • XMC_SCU_CLOCK_DCLKSRC_EXT_XTAL : xmc1_scu.h
  • XMC_SCU_CLOCK_DCLKSRC_t : xmc1_scu.h
  • XMC_SCU_CLOCK_DisableDCO1ExtRefCalibration() : xmc1_scu.h
  • XMC_SCU_CLOCK_DisableDCO1OscillatorWatchdog() : xmc1_scu.h
  • XMC_SCU_CLOCK_EnableDCO1ExtRefCalibration() : xmc1_scu.h
  • XMC_SCU_CLOCK_EnableDCO1OscillatorWatchdog() : xmc1_scu.h
  • XMC_SCU_CLOCK_GatePeripheralClock() : xmc_scu.h
  • XMC_SCU_CLOCK_GetCpuClockFrequency() : xmc_scu.h
  • XMC_SCU_CLOCK_GetFastPeripheralClockFrequency() : xmc1_scu.h
  • XMC_SCU_CLOCK_GetPeripheralClockFrequency() : xmc_scu.h
  • XMC_SCU_CLOCK_Init() : xmc_scu.h
  • XMC_SCU_CLOCK_IsDCO1ExtRefCalibrationReady() : xmc1_scu.h
  • XMC_SCU_CLOCK_IsPeripheralClockGated() : xmc_scu.h
  • XMC_SCU_CLOCK_OSCHP_MODE_DIRECT : xmc1_scu.h
  • XMC_SCU_CLOCK_OSCHP_MODE_DISABLED : xmc1_scu.h
  • XMC_SCU_CLOCK_OSCHP_MODE_OSC : xmc1_scu.h
  • XMC_SCU_CLOCK_OSCHP_MODE_t : xmc1_scu.h
  • XMC_SCU_CLOCK_OSCLP_MODE_DISABLED : xmc1_scu.h
  • XMC_SCU_CLOCK_OSCLP_MODE_OSC : xmc1_scu.h
  • XMC_SCU_CLOCK_OSCLP_MODE_t : xmc1_scu.h
  • XMC_SCU_CLOCK_PCLKSRC_DOUBLE_MCLK : xmc1_scu.h
  • XMC_SCU_CLOCK_PCLKSRC_MCLK : xmc1_scu.h
  • XMC_SCU_CLOCK_PCLKSRC_t : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_ACMP0_OUT : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_ACMP1_OUT : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_ACMP2_OUT : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_DCO2 : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_ERU_IOUT0 : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_OSCLP : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_t : xmc1_scu.h
  • XMC_SCU_CLOCK_ScaleMCLKFrequency() : xmc1_scu.h
  • XMC_SCU_CLOCK_SetFastPeripheralClockSource() : xmc1_scu.h
  • XMC_SCU_CLOCK_SetMCLKFrequency() : xmc1_scu.h
  • XMC_SCU_CLOCK_SYNC_CLKSRC_t : xmc1_scu.h
  • XMC_SCU_CLOCK_UngatePeripheralClock() : xmc_scu.h
  • XMC_SCU_DisablePrefetchUnit() : xmc1_scu.h
  • XMC_SCU_EnablePrefetchUnit() : xmc1_scu.h
  • XMC_SCU_GetMirrorStatus() : xmc_scu.h
  • XMC_SCU_GetTemperature() : xmc1_scu.h
  • XMC_SCU_HighTemperature() : xmc1_scu.h
  • XMC_SCU_INTERRUPT_ClearEventStatus() : xmc_scu.h
  • XMC_SCU_INTERRUPT_DisableEvent() : xmc_scu.h
  • XMC_SCU_INTERRUPT_EnableEvent() : xmc_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ACMP0 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ACMP1 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ACMP2 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ACMP3 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_DCO1_OUT_SYNC : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_FLASH_COMPLETED : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_FLASH_ERROR : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_HANDLER_t : xmc_scu.h
  • XMC_SCU_INTERRUPT_EVENT_LOCI : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_LOSS_EXT_CLOCK : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC0 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC1 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC2 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC3 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC4 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC5 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC6 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC7 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_PEMCAN : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_PESRAM : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_PEUSIC0 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_PEUSIC1 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTC_ALARM : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTC_PERIODIC : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCATIM0_UPDATED : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCATIM1_UPDATED : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCCTR_UPDATED : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCTIM0_UPDATED : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCTIM1_UPDATED : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_STDBYCLKFAIL : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_t : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_TSE_DONE : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_TSE_HIGH : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_TSE_LOW : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_VCLIP : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_VDDPI : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_VDROP : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_WDT_WARN : xmc1_scu.h
  • XMC_SCU_INTERRUPT_SetEventHandler() : xmc_scu.h
  • XMC_SCU_INTERRUPT_TriggerEvent() : xmc_scu.h
  • XMC_SCU_INTERUPT_GetEventStatus() : xmc_scu.h
  • XMC_SCU_IRQCTRL_BCCU0_SR0_IRQ31 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_BCCU0_SR0_OR_CCU40_SR3_IRQ31 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR0_IRQ0 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR0_IRQ17 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR0_IRQ3 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR1_IRQ1 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR1_IRQ18 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR1_IRQ4 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR2_IRQ19 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR2_IRQ2 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR2_IRQ5 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR3_IRQ6 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR3_IRQ7 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR4_IRQ20 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR0_IRQ0 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR0_IRQ21 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR0_IRQ8 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR0_OR_CCU41_SR0_IRQ21 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR0_OR_CCU41_SR0_IRQ22 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR1_IRQ22 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR1_IRQ29 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR1_IRQ7 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR2_IRQ16 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR2_IRQ23 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR2_IRQ30 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR2_OR_CCU41_SR2_IRQ23 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR3_IRQ24 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR3_IRQ27 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR3_IRQ31 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR3_OR_CCU41_SR3_IRQ24 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU41_SR0_IRQ21 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU41_SR1_IRQ22 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU41_SR2_IRQ23 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU41_SR3_IRQ24 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR0_IRQ1 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR0_IRQ25 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR0_IRQ8 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR0_OR_CCU81_SR0_IRQ25 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR1_IRQ13 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR1_IRQ2 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR1_IRQ26 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR1_OR_CCU81_SR1_IRQ26 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU81_SR0_IRQ25 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU81_SR1_IRQ26 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR0_IRQ28 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR0_IRQ3 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR0_IRQ9 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR0_OR_ERU1_SR0_IRQ3 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR1_IRQ10 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR1_IRQ29 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR1_IRQ4 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR1_OR_ERU1_SR1_IRQ4 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR2_IRQ11 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR2_IRQ30 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR2_IRQ5 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR2_OR_ERU1_SR2_IRQ5 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR3_IRQ12 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR3_IRQ31 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR3_IRQ6 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR3_OR_ERU1_SR3_IRQ6 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU1_SR0_IRQ3 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU1_SR1_IRQ4 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU1_SR2_IRQ5 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU1_SR3_IRQ6 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_LEDTS0_SR0_IRQ29 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_LEDTS0_SR0_OR_CCU40_SR1_IRQ29 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_LEDTS0_SR0_OR_CCU40_SR1_IRQ30 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_LEDTS1_SR0_IRQ30 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_LEDTS2_SR0_IRQ8 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_LEDTS2_SR0_OR_CCU40_SR0_IRQ8 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_MATH_SR0_IRQ7 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_MATH_SR0_OR_CAN0_SR3_IRQ7 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF0_SR0_IRQ14 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF0_SR0_IRQ27 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF0_SR0_OR_POSIF1_SR0_IRQ27 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF0_SR1_IRQ15 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF0_SR1_IRQ28 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF0_SR1_OR_POSIF1_SR1_IRQ28 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF1_SR0_IRQ27 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF1_SR1_IRQ28 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_SCU_SR0_IRQ0 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_SCU_SR0_OR_CAN0_SR0_IRQ0 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_SCU_SR1_IRQ1 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_SCU_SR1_OR_CAN0_SR1_IRQ1 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_SCU_SR2_IRQ2 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_SCU_SR2_OR_CAN0_SR2_IRQ2 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_t : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR0_IRQ15 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR0_IRQ21 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR0_IRQ9 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR0_OR_USIC1_SR0_IRQ9 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR1_IRQ10 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR1_IRQ16 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR1_IRQ22 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR1_OR_USIC1_SR1_IRQ10 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR2_IRQ11 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR2_IRQ17 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR2_IRQ23 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR2_OR_USIC1_SR2_IRQ11 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR3_IRQ12 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR3_IRQ18 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR3_IRQ24 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR3_OR_USIC1_SR3_IRQ12 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR4_IRQ13 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR4_IRQ19 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR4_IRQ25 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR4_OR_USIC1_SR4_IRQ13 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR5_IRQ14 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR5_IRQ20 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR5_IRQ26 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR5_OR_USIC1_SR5_IRQ14 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC1_SR0_IRQ9 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC1_SR1_IRQ10 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC1_SR2_IRQ11 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC1_SR3_IRQ12 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC1_SR4_IRQ13 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC1_SR5_IRQ14 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_C0SR0_IRQ15 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_C0SR0_OR_USIC0_SR0_IRQ15 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_C0SR1_IRQ16 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_C0SR1_OR_USIC0_SR1_IRQ16 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G0SR0_IRQ17 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G0SR0_OR_USIC0_SR2_IRQ17 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G0SR1_IRQ18 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G0SR1_OR_USIC0_SR3_IRQ18 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G1SR0_IRQ19 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G1SR0_OR_USIC0_SR4_IRQ19 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G1SR1_IRQ20 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G1SR1_OR_USIC0_SR5_IRQ20 : xmc1_scu.h
  • XMC_SCU_IRQHandler() : xmc_scu.h
  • XMC_SCU_IsTempMeasurementDone() : xmc1_scu.h
  • XMC_SCU_LockProtectedBits() : xmc1_scu.h
  • XMC_SCU_LowTemperature() : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_BCCU0 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_CCU40 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_CCU41 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_CCU80 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_CCU81 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_LEDTS0 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_LEDTS1 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_LEDTS2 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_MATH : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_MCAN : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_POSIF0 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_POSIF1 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_RTC : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_t : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_USIC0 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_USIC1 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_WDT : xmc1_scu.h
  • XMC_SCU_POWER_DisableMonitor() : xmc1_scu.h
  • XMC_SCU_POWER_EnableMonitor() : xmc1_scu.h
  • XMC_SCU_POWER_MONITOR_DELAY_t : xmc1_scu.h
  • XMC_SCU_POWER_MONITOR_RANGE_t : xmc1_scu.h
  • XMC_SCU_RESET_AssertMasterReset() : xmc1_scu.h
  • XMC_SCU_RESET_ClearDeviceResetReason() : xmc_scu.h
  • XMC_SCU_RESET_EnableResetRequest() : xmc1_scu.h
  • XMC_SCU_RESET_GetDeviceResetReason() : xmc_scu.h
  • XMC_SCU_RESET_REASON_CLOCK_LOSS : xmc1_scu.h
  • XMC_SCU_RESET_REASON_FLASH : xmc1_scu.h
  • XMC_SCU_RESET_REASON_LOCKUP : xmc1_scu.h
  • XMC_SCU_RESET_REASON_MASTER : xmc1_scu.h
  • XMC_SCU_RESET_REASON_PARITY_ERROR : xmc1_scu.h
  • XMC_SCU_RESET_REASON_PORST : xmc1_scu.h
  • XMC_SCU_RESET_REASON_SW : xmc1_scu.h
  • XMC_SCU_RESET_REASON_t : xmc1_scu.h
  • XMC_SCU_RESET_REASON_WATCHDOG : xmc1_scu.h
  • XMC_SCU_RESET_REQUEST_CLOCK_LOSS : xmc1_scu.h
  • XMC_SCU_RESET_REQUEST_FLASH_ECC_ERROR : xmc1_scu.h
  • XMC_SCU_RESET_REQUEST_SRAM_PARITY_ERROR : xmc1_scu.h
  • XMC_SCU_RESET_REQUEST_USIC_SRAM_PARITY_ERROR : xmc1_scu.h
  • XMC_SCU_SetBMI() : xmc1_scu.h
  • XMC_SCU_SetCcuTriggerHigh() : xmc_scu.h
  • XMC_SCU_SetCcuTriggerLow() : xmc_scu.h
  • XMC_SCU_SetInterruptControl() : xmc1_scu.h
  • XMC_SCU_SetRawTempLimits() : xmc1_scu.h
  • XMC_SCU_SetTempHighLimit() : xmc1_scu.h
  • XMC_SCU_SetTempLowLimit() : xmc1_scu.h
  • XMC_SCU_StartTempMeasurement() : xmc1_scu.h
  • XMC_SCU_STATUS_BUSY : xmc_scu.h
  • XMC_SCU_STATUS_ERROR : xmc_scu.h
  • XMC_SCU_STATUS_OK : xmc_scu.h
  • XMC_SCU_STATUS_t : xmc_scu.h
  • XMC_SCU_StopTempMeasurement() : xmc1_scu.h
  • XMC_SCU_SupplyMonitorInit() : xmc1_scu.h
  • XMC_SCU_SYSTEM_RESET_REQUEST_t : xmc1_scu.h
  • XMC_SCU_UnlockProtectedBits() : xmc1_scu.h
  • XMC_SPI0_CH0 : xmc_spi.h
  • XMC_SPI0_CH1 : xmc_spi.h
  • XMC_SPI1_CH0 : xmc_spi.h
  • XMC_SPI1_CH1 : xmc_spi.h
  • XMC_SPI2_CH0 : xmc_spi.h
  • XMC_SPI2_CH1 : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t : xmc_spi.h
  • XMC_SPI_CH_BUS_MODE_MASTER : xmc_spi.h
  • XMC_SPI_CH_BUS_MODE_SLAVE : xmc_spi.h
  • XMC_SPI_CH_BUS_MODE_t : xmc_spi.h
  • XMC_SPI_CH_ClearStatusFlag() : xmc_spi.h
  • XMC_SPI_CH_ConfigExternalInputSignalToBRG() : xmc_spi.h
  • XMC_SPI_CH_ConfigureShiftClockOutput() : xmc_spi.h
  • XMC_SPI_CH_DATA_POLARITY_DIRECT : xmc_spi.h
  • XMC_SPI_CH_DATA_POLARITY_INVERT : xmc_spi.h
  • XMC_SPI_CH_DATA_POLARITY_t : xmc_spi.h
  • XMC_SPI_CH_DisableDataTransmission() : xmc_spi.h
  • XMC_SPI_CH_DisableDelayCompensation() : xmc_spi.h
  • XMC_SPI_CH_DisableEOF() : xmc_spi.h
  • XMC_SPI_CH_DisableEvent() : xmc_spi.h
  • XMC_SPI_CH_DisableFEM() : xmc_spi.h
  • XMC_SPI_CH_DisableInputInversion() : xmc_spi.h
  • XMC_SPI_CH_DisableInterwordDelay() : xmc_spi.h
  • XMC_SPI_CH_DisableMasterClock() : xmc_spi.h
  • XMC_SPI_CH_DisableSlaveSelect() : xmc_spi.h
  • XMC_SPI_CH_DisableSlaveSelectCodedMode() : xmc_spi.h
  • XMC_SPI_CH_DisableSOF() : xmc_spi.h
  • XMC_SPI_CH_EnableDataTransmission() : xmc_spi.h
  • XMC_SPI_CH_EnableDelayCompensation() : xmc_spi.h
  • XMC_SPI_CH_EnableEOF() : xmc_spi.h
  • XMC_SPI_CH_EnableEvent() : xmc_spi.h
  • XMC_SPI_CH_EnableFEM() : xmc_spi.h
  • XMC_SPI_CH_EnableInputInversion() : xmc_spi.h
  • XMC_SPI_CH_EnableInterwordDelay() : xmc_spi.h
  • XMC_SPI_CH_EnableMasterClock() : xmc_spi.h
  • XMC_SPI_CH_EnableSlaveSelect() : xmc_spi.h
  • XMC_SPI_CH_EnableSlaveSelectCodedMode() : xmc_spi.h
  • XMC_SPI_CH_EnableSOF() : xmc_spi.h
  • XMC_SPI_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_EVENT_BAUD_RATE_GENERATOR : xmc_spi.h
  • XMC_SPI_CH_EVENT_DATA_LOST : xmc_spi.h
  • XMC_SPI_CH_EVENT_DX2TIEN_ACTIVATED : xmc_spi.h
  • XMC_SPI_CH_EVENT_MSLS_CHANGE : xmc_spi.h
  • XMC_SPI_CH_EVENT_PARITY_ERROR : xmc_spi.h
  • XMC_SPI_CH_EVENT_RECEIVE_START : xmc_spi.h
  • XMC_SPI_CH_EVENT_STANDARD_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_EVENT_t : xmc_spi.h
  • XMC_SPI_CH_EVENT_TRANSMIT_BUFFER : xmc_spi.h
  • XMC_SPI_CH_EVENT_TRANSMIT_SHIFT : xmc_spi.h
  • XMC_SPI_CH_GetReceivedData() : xmc_spi.h
  • XMC_SPI_CH_GetStatusFlag() : xmc_spi.h
  • XMC_SPI_CH_Init() : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN0 : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN1 : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN2 : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN3 : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FMCLK : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FPDIV : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FPPP : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FSCLK : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_t : xmc_spi.h
  • XMC_SPI_CH_INPUT_SLAVE_SCLKIN : xmc_spi.h
  • XMC_SPI_CH_INPUT_SLAVE_SELIN : xmc_spi.h
  • XMC_SPI_CH_INPUT_t : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_t : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_spi.h
  • XMC_SPI_CH_MODE_DUAL : xmc_spi.h
  • XMC_SPI_CH_MODE_QUAD : xmc_spi.h
  • XMC_SPI_CH_MODE_STANDARD : xmc_spi.h
  • XMC_SPI_CH_MODE_STANDARD_HALFDUPLEX : xmc_spi.h
  • XMC_SPI_CH_MODE_t : xmc_spi.h
  • XMC_SPI_CH_Receive() : xmc_spi.h
  • XMC_SPI_CH_SelectInterruptNodePointer() : xmc_spi.h
  • XMC_SPI_CH_SetBaudrate() : xmc_spi.h
  • XMC_SPI_CH_SetBitOrderLsbFirst() : xmc_spi.h
  • XMC_SPI_CH_SetBitOrderMsbFirst() : xmc_spi.h
  • XMC_SPI_CH_SetFrameLength() : xmc_spi.h
  • XMC_SPI_CH_SetInputSource() : xmc_spi.h
  • XMC_SPI_CH_SetInterruptNodePointer() : xmc_spi.h
  • XMC_SPI_CH_SetInterwordDelay() : xmc_spi.h
  • XMC_SPI_CH_SetInterwordDelaySCLK() : xmc_spi.h
  • XMC_SPI_CH_SetSlaveSelectDelay() : xmc_spi.h
  • XMC_SPI_CH_SetSlaveSelectPolarity() : xmc_spi.h
  • XMC_SPI_CH_SetTransmitMode() : xmc_spi.h
  • XMC_SPI_CH_SetWordLength() : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SEL_INV_TO_MSLS : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SEL_SAME_AS_MSLS : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_0 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_1 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_2 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_3 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_4 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_5 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_6 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_7 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_t : xmc_spi.h
  • XMC_SPI_CH_Start() : xmc_spi.h
  • XMC_SPI_CH_STATUS_BUSY : xmc_spi.h
  • XMC_SPI_CH_STATUS_ERROR : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_DX2S : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_DX2T_EVENT_DETECTED : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_MSLS : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_MSLS_EVENT_DETECTED : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_PARITY_ERROR_EVENT_DETECTED : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_t : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_OK : xmc_spi.h
  • XMC_SPI_CH_STATUS_t : xmc_spi.h
  • XMC_SPI_CH_Stop() : xmc_spi.h
  • XMC_SPI_CH_Transmit() : xmc_spi.h
  • XMC_SPI_CH_TriggerServiceRequest() : xmc_spi.h
  • XMC_UART0_CH0 : xmc_uart.h
  • XMC_UART0_CH1 : xmc_uart.h
  • XMC_UART1_CH0 : xmc_uart.h
  • XMC_UART1_CH1 : xmc_uart.h
  • XMC_UART2_CH0 : xmc_uart.h
  • XMC_UART2_CH1 : xmc_uart.h
  • XMC_UART_CH_ClearStatusFlag() : xmc_uart.h
  • XMC_UART_CH_DisableDataTransmission() : xmc_uart.h
  • XMC_UART_CH_DisableEvent() : xmc_uart.h
  • XMC_UART_CH_DisableInputDigitalFilter() : xmc_uart.h
  • XMC_UART_CH_DisableInputInversion() : xmc_uart.h
  • XMC_UART_CH_DisableInputSync() : xmc_uart.h
  • XMC_UART_CH_EnableDataTransmission() : xmc_uart.h
  • XMC_UART_CH_EnableEvent() : xmc_uart.h
  • XMC_UART_CH_EnableInputDigitalFilter() : xmc_uart.h
  • XMC_UART_CH_EnableInputInversion() : xmc_uart.h
  • XMC_UART_CH_EnableInputSync() : xmc_uart.h
  • XMC_UART_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_uart.h
  • XMC_UART_CH_EVENT_BAUD_RATE_GENERATOR : xmc_uart.h
  • XMC_UART_CH_EVENT_COLLISION : xmc_uart.h
  • XMC_UART_CH_EVENT_DATA_LOST : xmc_uart.h
  • XMC_UART_CH_EVENT_FORMAT_ERROR : xmc_uart.h
  • XMC_UART_CH_EVENT_FRAME_FINISHED : xmc_uart.h
  • XMC_UART_CH_EVENT_RECEIVE_START : xmc_uart.h
  • XMC_UART_CH_EVENT_RECEIVER_NOISE : xmc_uart.h
  • XMC_UART_CH_EVENT_STANDARD_RECEIVE : xmc_uart.h
  • XMC_UART_CH_EVENT_SYNCHRONIZATION_BREAK : xmc_uart.h
  • XMC_UART_CH_EVENT_t : xmc_uart.h
  • XMC_UART_CH_EVENT_TRANSMIT_BUFFER : xmc_uart.h
  • XMC_UART_CH_EVENT_TRANSMIT_SHIFT : xmc_uart.h
  • XMC_UART_CH_GetReceivedData() : xmc_uart.h
  • XMC_UART_CH_GetStatusFlag() : xmc_uart.h
  • XMC_UART_CH_Init() : xmc_uart.h
  • XMC_UART_CH_INPUT_RXD : xmc_uart.h
  • XMC_UART_CH_INPUT_RXD1 : xmc_uart.h
  • XMC_UART_CH_INPUT_RXD2 : xmc_uart.h
  • XMC_UART_CH_INPUT_SAMPLING_FREQ_FPERIPH : xmc_uart.h
  • XMC_UART_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER : xmc_uart.h
  • XMC_UART_CH_INPUT_SAMPLING_FREQ_t : xmc_uart.h
  • XMC_UART_CH_INPUT_t : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_t : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_uart.h
  • XMC_UART_CH_SelectInterruptNodePointer() : xmc_uart.h
  • XMC_UART_CH_SetBaudrate() : xmc_uart.h
  • XMC_UART_CH_SetFrameLength() : xmc_uart.h
  • XMC_UART_CH_SetInputSamplingFreq() : xmc_uart.h
  • XMC_UART_CH_SetInputSource() : xmc_uart.h
  • XMC_UART_CH_SetInterruptNodePointer() : xmc_uart.h
  • XMC_UART_CH_SetPulseLength() : xmc_uart.h
  • XMC_UART_CH_SetSamplePoint() : xmc_uart.h
  • XMC_UART_CH_SetWordLength() : xmc_uart.h
  • XMC_UART_CH_Start() : xmc_uart.h
  • XMC_UART_CH_STATUS_BUSY : xmc_uart.h
  • XMC_UART_CH_STATUS_ERROR : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_COLLISION_DETECTED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_FORMAT_ERROR_IN_STOP_BIT_0 : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_FORMAT_ERROR_IN_STOP_BIT_1 : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVE_FRAME_FINISHED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVER_NOISE_DETECTED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEPTION_IDLE : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_SYNCHRONIZATION_BREAK_DETECTED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_t : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSFER_STATUS_BUSY : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMISSION_IDLE : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMITTER_FRAME_FINISHED : xmc_uart.h
  • XMC_UART_CH_STATUS_OK : xmc_uart.h
  • XMC_UART_CH_STATUS_t : xmc_uart.h
  • XMC_UART_CH_Stop() : xmc_uart.h
  • XMC_UART_CH_Transmit() : xmc_uart.h
  • XMC_UART_CH_TriggerServiceRequest() : xmc_uart.h
  • XMC_USIC0 : xmc_usic.h
  • XMC_USIC0_CH0 : xmc_usic.h
  • XMC_USIC0_CH1 : xmc_usic.h
  • XMC_USIC1 : xmc_usic.h
  • XMC_USIC1_CH0 : xmc_usic.h
  • XMC_USIC1_CH1 : xmc_usic.h
  • XMC_USIC2 : xmc_usic.h
  • XMC_USIC2_CH0 : xmc_usic.h
  • XMC_USIC2_CH1 : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_DISABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_FRACTIONAL : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_NORMAL : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_SOURCE_DIVIDER : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_SOURCE_DX1T : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_SOURCE_t : xmc_usic.h
  • XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_0 : xmc_usic.h
  • XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_1 : xmc_usic.h
  • XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_t : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_t : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_ENABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t : xmc_usic.h
  • XMC_USIC_CH_ConfigExternalInputSignalToBRG() : xmc_usic.h
  • XMC_USIC_CH_ConfigureShiftClockOutput() : xmc_usic.h
  • XMC_USIC_CH_ConnectInputDataShiftToDataInput() : xmc_usic.h
  • XMC_USIC_CH_ConnectInputDataShiftToPPP() : xmc_usic.h
  • XMC_USIC_CH_DATA_OUTPUT_MODE_INVERTED : xmc_usic.h
  • XMC_USIC_CH_DATA_OUTPUT_MODE_NORMAL : xmc_usic.h
  • XMC_USIC_CH_DATA_OUTPUT_MODE_t : xmc_usic.h
  • XMC_USIC_CH_Disable() : xmc_usic.h
  • XMC_USIC_CH_DisableDelayCompensation() : xmc_usic.h
  • XMC_USIC_CH_DisableEvent() : xmc_usic.h
  • XMC_USIC_CH_DisableFrameLengthControl() : xmc_usic.h
  • XMC_USIC_CH_DisableInputDigitalFilter() : xmc_usic.h
  • XMC_USIC_CH_DisableInputInversion() : xmc_usic.h
  • XMC_USIC_CH_DisableInputSync() : xmc_usic.h
  • XMC_USIC_CH_DisableTBUFDataValidTrigger() : xmc_usic.h
  • XMC_USIC_CH_DisableTimeMeasurement() : xmc_usic.h
  • XMC_USIC_CH_Enable() : xmc_usic.h
  • XMC_USIC_CH_EnableDelayCompensation() : xmc_usic.h
  • XMC_USIC_CH_EnableEvent() : xmc_usic.h
  • XMC_USIC_CH_EnableFrameLengthControl() : xmc_usic.h
  • XMC_USIC_CH_EnableInputDigitalFilter() : xmc_usic.h
  • XMC_USIC_CH_EnableInputInversion() : xmc_usic.h
  • XMC_USIC_CH_EnableInputSync() : xmc_usic.h
  • XMC_USIC_CH_EnableTBUFDataValidTrigger() : xmc_usic.h
  • XMC_USIC_CH_EnableTimeMeasurement() : xmc_usic.h
  • XMC_USIC_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_EVENT_BAUD_RATE_GENERATOR : xmc_usic.h
  • XMC_USIC_CH_EVENT_DATA_LOST : xmc_usic.h
  • XMC_USIC_CH_EVENT_RECEIVE_START : xmc_usic.h
  • XMC_USIC_CH_EVENT_STANDARD_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_EVENT_t : xmc_usic.h
  • XMC_USIC_CH_EVENT_TRANSMIT_BUFFER : xmc_usic.h
  • XMC_USIC_CH_EVENT_TRANSMIT_SHIFT : xmc_usic.h
  • XMC_USIC_CH_FIFO_DISABLED : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_16WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_2WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_32WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_4WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_64WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_8WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_t : xmc_usic.h
  • XMC_USIC_CH_GetCaptureTimerValue() : xmc_usic.h
  • XMC_USIC_CH_GetReceiveBufferStatus() : xmc_usic.h
  • XMC_USIC_CH_GetTransmitBufferStatus() : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_BOTH_EDGES : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_FALLING_EDGE : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_RISING_EDGE : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_t : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_TRIGGER_DISABLED : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX0 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX1 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX2 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX3 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX4 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX5 : xmc_usic.h
  • XMC_USIC_CH_INPUT_SAMPLING_FREQ_FPERIPH : xmc_usic.h
  • XMC_USIC_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER : xmc_usic.h
  • XMC_USIC_CH_INPUT_SAMPLING_FREQ_t : xmc_usic.h
  • XMC_USIC_CH_INPUT_t : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_t : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_RUN_0 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_RUN_1 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_STOP_0 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_STOP_1 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_t : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_I2C : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_I2S : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_IDLE : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_SPI : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_t : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_UART : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_EVEN : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_NONE : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_ODD : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_t : xmc_usic.h
  • XMC_USIC_CH_PASSIVE_DATA_LEVEL0 : xmc_usic.h
  • XMC_USIC_CH_PASSIVE_DATA_LEVEL1 : xmc_usic.h
  • XMC_USIC_CH_PASSIVE_DATA_LEVEL_t : xmc_usic.h
  • XMC_USIC_CH_RBUF_STATUS_DATA_VALID0 : xmc_usic.h
  • XMC_USIC_CH_RBUF_STATUS_DATA_VALID1 : xmc_usic.h
  • XMC_USIC_CH_RBUF_STATUS_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_ClearEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_Configure() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_DisableEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EnableEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_ERROR : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_STANDARD : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_ERROR : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_STANDARD : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_Flush() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_GetData() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_GetEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_GetLevel() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_STANDARD : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_IsEmpty() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_IsFull() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_SetInterruptNodePointer() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit() : xmc_usic.h
  • XMC_USIC_CH_SetBaudrate() : xmc_usic.h
  • XMC_USIC_CH_SetBRGInputClockSource() : xmc_usic.h
  • XMC_USIC_CH_SetDataOutputMode() : xmc_usic.h
  • XMC_USIC_CH_SetFractionalDivider() : xmc_usic.h
  • XMC_USIC_CH_SetFrameLength() : xmc_usic.h
  • XMC_USIC_CH_SetInputSamplingFreq() : xmc_usic.h
  • XMC_USIC_CH_SetInputSource() : xmc_usic.h
  • XMC_USIC_CH_SetInputTriggerCombinationMode() : xmc_usic.h
  • XMC_USIC_CH_SetInterruptNodePointer() : xmc_usic.h
  • XMC_USIC_CH_SetMclkOutputPassiveLevel() : xmc_usic.h
  • XMC_USIC_CH_SetMode() : xmc_usic.h
  • XMC_USIC_CH_SetPassiveDataLevel() : xmc_usic.h
  • XMC_USIC_CH_SetShiftDirection() : xmc_usic.h
  • XMC_USIC_CH_SetStartTransmisionMode() : xmc_usic.h
  • XMC_USIC_CH_SetTransmitBufferStatus() : xmc_usic.h
  • XMC_USIC_CH_SetWordLength() : xmc_usic.h
  • XMC_USIC_CH_SHIFT_DIRECTION_LSB_FIRST : xmc_usic.h
  • XMC_USIC_CH_SHIFT_DIRECTION_MSB_FIRST : xmc_usic.h
  • XMC_USIC_CH_SHIFT_DIRECTION_t : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_DISABLED : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_MODE_t : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_ON_TDV : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_0 : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_1 : xmc_usic.h
  • XMC_USIC_CH_STATUS_BUSY : xmc_usic.h
  • XMC_USIC_CH_STATUS_ERROR : xmc_usic.h
  • XMC_USIC_CH_STATUS_OK : xmc_usic.h
  • XMC_USIC_CH_STATUS_t : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_BUSY : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_IDLE : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_SET_BUSY : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_SET_IDLE : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_SET_t : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_t : xmc_usic.h
  • XMC_USIC_CH_TriggerServiceRequest() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_ClearEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_Configure() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_DisableEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EnableEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_CONF_ERROR : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_CONF_STANDARD : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_CONF_t : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_ERROR : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_STANDARD : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_t : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_Flush() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_GetEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_GetLevel() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_STANDARD : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_t : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_IsEmpty() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_IsFull() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_PutData() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_PutDataFLEMode() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_PutDataHPCMode() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_SetInterruptNodePointer() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit() : xmc_usic.h
  • XMC_USIC_CH_WriteToTBUF() : xmc_usic.h
  • XMC_USIC_CH_WriteToTBUFTCI() : xmc_usic.h
  • XMC_USIC_Disable() : xmc_usic.h
  • XMC_USIC_Enable() : xmc_usic.h
  • XMC_USIC_IsChannelValid() : xmc_usic.h
  • XMC_USIC_IsModuleValid() : xmc_usic.h
  • XMC_USIC_t : xmc_usic.h
  • XMC_VADC_BACKGROUND_CONFIG_t : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_0 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_1 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_2 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_3 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_0 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_1 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_2 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_3 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_t : xmc_vadc.h
  • XMC_VADC_BOUNDARY_SELECT_LOWER_BOUND : xmc_vadc.h
  • XMC_VADC_BOUNDARY_SELECT_t : xmc_vadc.h
  • XMC_VADC_BOUNDARY_SELECT_UPPER_BOUND : xmc_vadc.h
  • XMC_VADC_CHANNEL_ALIAS_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_CONDITION_ABOVE_BAND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_CONDITION_BELOW_BAND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BWDCH_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BWDCH_VAGND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BWDCH_VAREF : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GROUP_CLASS0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GROUP_CLASS1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_ALWAYS : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_COMPHIGH : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_COMPLOW : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_INBOUND : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_NEVER : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_OUTBOUND : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_REF_ALT_CH0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_REF_INTREF : xmc_vadc.h
  • XMC_VADC_CHANNEL_REF_t : xmc_vadc.h
  • XMC_VADC_CONVMODE_10BIT : xmc_vadc.h
  • XMC_VADC_CONVMODE_12BIT : xmc_vadc.h
  • XMC_VADC_CONVMODE_8BIT : xmc_vadc.h
  • XMC_VADC_CONVMODE_FASTCOMPARE : xmc_vadc.h
  • XMC_VADC_CONVMODE_t : xmc_vadc.h
  • XMC_VADC_DMM_DIFFERENCE_MODE : xmc_vadc.h
  • XMC_VADC_DMM_FILTERING_MODE : xmc_vadc.h
  • XMC_VADC_DMM_REDUCTION_MODE : xmc_vadc.h
  • XMC_VADC_DMM_t : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_HIGH : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_LOW : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_t : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_UNKNOWN : xmc_vadc.h
  • XMC_VADC_GATE_INPUT_SELECT_t : xmc_vadc.h
  • XMC_VADC_GATEMODE_ACTIVEHIGH : xmc_vadc.h
  • XMC_VADC_GATEMODE_ACTIVELOW : xmc_vadc.h
  • XMC_VADC_GATEMODE_BLOCK : xmc_vadc.h
  • XMC_VADC_GATEMODE_IGNORE : xmc_vadc.h
  • XMC_VADC_GATEMODE_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgndAddMultipleChannels() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgndRemoveMultipleChannels() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundAbortSequence() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundAddChannelToSequence() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundClearReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundDisableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundDisableEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundEnableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundEnableEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundGetReqSrcEventStatus() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundIsChannelPending() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundRemoveChannelFromSequence() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSelectGating() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSelectTrigger() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSetGatingMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundTriggerConversion() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundTriggerReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BindGroupToEMux() : xmc_vadc.h
  • XMC_VADC_GLOBAL_ClearEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_ClockInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableModule() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableModuleClock() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisablePostCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableSleepMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableStartupCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnableModule() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnableModuleClock() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnablePostCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnableSleepMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EVENT_BKGNDSOURCE : xmc_vadc.h
  • XMC_VADC_GLOBAL_EVENT_RESULT : xmc_vadc.h
  • XMC_VADC_GLOBAL_EVENT_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_GetCompareResult() : xmc_vadc.h
  • XMC_VADC_GLOBAL_GetDetailedResult() : xmc_vadc.h
  • XMC_VADC_GLOBAL_GetResult() : xmc_vadc.h
  • XMC_VADC_GLOBAL_Init() : xmc_vadc.h
  • XMC_VADC_GLOBAL_InputClassInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_ResultInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetBoundaries() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetCompareValue() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetIndividualBoundary() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetResultEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_AREF_EXTERNAL_VDD_UPPER_RANGE : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_AREF_INTERNAL_VDD_LOWER_RANGE : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_AREF_INTERNAL_VDD_UPPER_RANGE : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_AREF_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_CALIBRATION_ORDER_POST_CONV : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_CALIBRATION_ORDER_PRE_CONV : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_CALIBRATION_ORDER_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_DisableSigmaDeltaLoop() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_EnableSigmaDeltaLoop() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_Init() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_IsConverterReady() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_SetAnalogReference() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_SetClockDivider() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_SetGainFactor() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_StartupCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_TriggerEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_AddResultToFifo() : xmc_vadc.h
  • XMC_VADC_GROUP_ARBMODE_ALWAYS : xmc_vadc.h
  • XMC_VADC_GROUP_ARBMODE_ONDEMAND : xmc_vadc.h
  • XMC_VADC_GROUP_ARBMODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_BackgroundDisableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_BackgroundEnableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_DISABLED : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED_ACTIVE_HIGH : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED_ACTIVE_LOW : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelClearEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetAssertedEvents() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetInputClass() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetResultAlignment() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetResultRegister() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelInit() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelIsResultOutOfBounds() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetBoundarySelection() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetIclass() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetInputReference() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetResultRegister() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelTriggerEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelTriggerEventGenCriteria() : xmc_vadc.h
  • XMC_VADC_GROUP_CheckSlaveReadiness() : xmc_vadc.h
  • XMC_VADC_GROUP_ClearResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_CONV_EMUX : xmc_vadc.h
  • XMC_VADC_GROUP_CONV_STD : xmc_vadc.h
  • XMC_VADC_GROUP_CONV_t : xmc_vadc.h
  • XMC_VADC_GROUP_DisableChannelSyncRequest() : xmc_vadc.h
  • XMC_VADC_GROUP_DisableResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXCODE_BINARY : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXCODE_GRAY : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXCODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_SEQUENCEMODE : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_SINGLEMODE : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_STEADYMODE : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_SWCTRL : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_EnableChannelSyncRequest() : xmc_vadc.h
  • XMC_VADC_GROUP_EnableResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ExternalMuxControlInit() : xmc_vadc.h
  • XMC_VADC_GROUP_GetAlias() : xmc_vadc.h
  • XMC_VADC_GROUP_GetAssertedResultEvents() : xmc_vadc.h
  • XMC_VADC_GROUP_GetDetailedResult() : xmc_vadc.h
  • XMC_VADC_GROUP_GetFastCompareResult() : xmc_vadc.h
  • XMC_VADC_GROUP_GetInputClass() : xmc_vadc.h
  • XMC_VADC_GROUP_GetResult() : xmc_vadc.h
  • XMC_VADC_GROUP_GetResultFifoHead() : xmc_vadc.h
  • XMC_VADC_GROUP_GetResultFifoTail() : xmc_vadc.h
  • XMC_VADC_GROUP_GetSyncReadySignal() : xmc_vadc.h
  • XMC_VADC_GROUP_IgnoreSlaveReadiness() : xmc_vadc.h
  • XMC_VADC_GROUP_INDEX_t : xmc_vadc.h
  • XMC_VADC_GROUP_Init() : xmc_vadc.h
  • XMC_VADC_GROUP_InputClassInit() : xmc_vadc.h
  • XMC_VADC_GROUP_IRQ_KERNEL : xmc_vadc.h
  • XMC_VADC_GROUP_IRQ_SHARED : xmc_vadc.h
  • XMC_VADC_GROUP_IRQ_t : xmc_vadc.h
  • XMC_VADC_GROUP_IsConverterBusy() : xmc_vadc.h
  • XMC_VADC_GROUP_IsResultRegisterFifoHead() : xmc_vadc.h
  • XMC_VADC_GROUP_IsResultRegisterInFifo() : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_NORMAL : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_OFF : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_RESERVED1 : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_RESERVED2 : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_QueueAbortSequence() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueClearReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueDisableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueDisableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueEnableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueEnableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueFlushEntries() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetInterruptedChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetLength() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetNextChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetReqSrcEventStatus() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueInit() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueInsertChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueIsArbitrationSlotEnabled() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueRemoveChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSelectGating() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSelectTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSelectTriggerEdge() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSetGatingMode() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueTriggerConversion() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueTriggerReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ResultInit() : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_0 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_1 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_2 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_3 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_t : xmc_vadc.h
  • XMC_VADC_GROUP_ScanAddChannelToSequence() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanAddMultipleChannels() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanClearReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanGetNumChannelsPending() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanGetReqSrcEventStatus() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanInit() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanIsArbitrationSlotEnabled() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanIsChannelPending() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanRemoveChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSelectGating() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSelectTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSelectTriggerEdge() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSequenceAbort() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSetGatingMode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanTriggerConversion() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanTriggerReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_SetBoundaries() : xmc_vadc.h
  • XMC_VADC_GROUP_SetBoundaryEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_SetChannelAlias() : xmc_vadc.h
  • XMC_VADC_GROUP_SetIndividualBoundary() : xmc_vadc.h
  • XMC_VADC_GROUP_SetPowerMode() : xmc_vadc.h
  • XMC_VADC_GROUP_SetResultFastCompareValue() : xmc_vadc.h
  • XMC_VADC_GROUP_SetResultInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_SetResultSubtractionValue() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncMaster() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncReadySignal() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncSlave() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncSlaveReadySignal() : xmc_vadc.h
  • XMC_VADC_GROUP_STATE_BUSY : xmc_vadc.h
  • XMC_VADC_GROUP_STATE_IDLE : xmc_vadc.h
  • XMC_VADC_GROUP_STATE_t : xmc_vadc.h
  • XMC_VADC_GROUP_t : xmc_vadc.h
  • XMC_VADC_GROUP_TriggerResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_TriggerServiceRequest() : xmc_vadc.h
  • XMC_VADC_NUM_CHANNELS_PER_GROUP : xmc_vadc.h
  • XMC_VADC_REQ_GT_A : xmc_vadc.h
  • XMC_VADC_REQ_GT_B : xmc_vadc.h
  • XMC_VADC_REQ_GT_C : xmc_vadc.h
  • XMC_VADC_REQ_GT_D : xmc_vadc.h
  • XMC_VADC_REQ_GT_E : xmc_vadc.h
  • XMC_VADC_REQ_GT_F : xmc_vadc.h
  • XMC_VADC_REQ_GT_G : xmc_vadc.h
  • XMC_VADC_REQ_GT_H : xmc_vadc.h
  • XMC_VADC_REQ_GT_I : xmc_vadc.h
  • XMC_VADC_REQ_GT_J : xmc_vadc.h
  • XMC_VADC_REQ_GT_K : xmc_vadc.h
  • XMC_VADC_REQ_GT_L : xmc_vadc.h
  • XMC_VADC_REQ_GT_M : xmc_vadc.h
  • XMC_VADC_REQ_GT_N : xmc_vadc.h
  • XMC_VADC_REQ_GT_O : xmc_vadc.h
  • XMC_VADC_REQ_GT_P : xmc_vadc.h
  • XMC_VADC_REQ_TR_A : xmc_vadc.h
  • XMC_VADC_REQ_TR_B : xmc_vadc.h
  • XMC_VADC_REQ_TR_C : xmc_vadc.h
  • XMC_VADC_REQ_TR_D : xmc_vadc.h
  • XMC_VADC_REQ_TR_E : xmc_vadc.h
  • XMC_VADC_REQ_TR_F : xmc_vadc.h
  • XMC_VADC_REQ_TR_G : xmc_vadc.h
  • XMC_VADC_REQ_TR_H : xmc_vadc.h
  • XMC_VADC_REQ_TR_I : xmc_vadc.h
  • XMC_VADC_REQ_TR_J : xmc_vadc.h
  • XMC_VADC_REQ_TR_K : xmc_vadc.h
  • XMC_VADC_REQ_TR_L : xmc_vadc.h
  • XMC_VADC_REQ_TR_M : xmc_vadc.h
  • XMC_VADC_REQ_TR_N : xmc_vadc.h
  • XMC_VADC_REQ_TR_O : xmc_vadc.h
  • XMC_VADC_REQ_TR_P : xmc_vadc.h
  • XMC_VADC_RESULT_ALIGN_LEFT : xmc_vadc.h
  • XMC_VADC_RESULT_ALIGN_RIGHT : xmc_vadc.h
  • XMC_VADC_RESULT_ALIGN_t : xmc_vadc.h
  • XMC_VADC_RESULT_SIZE_t : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_10BIT_LEFT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_10BIT_RIGHT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_12BIT_LEFT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_12BIT_RIGHT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_8BIT_LEFT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_8BIT_RIGHT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_t : xmc_vadc.h
  • XMC_VADC_SCAN_LOAD_COMBINE : xmc_vadc.h
  • XMC_VADC_SCAN_LOAD_OVERWRITE : xmc_vadc.h
  • XMC_VADC_SCAN_LOAD_t : xmc_vadc.h
  • XMC_VADC_SCAN_TYPE_BACKGROUND : xmc_vadc.h
  • XMC_VADC_SCAN_TYPE_GROUPSCAN : xmc_vadc.h
  • XMC_VADC_SCAN_TYPE_t : xmc_vadc.h
  • XMC_VADC_SHS_LOOP_CH_0 : xmc_vadc.h
  • XMC_VADC_SHS_LOOP_CH_1 : xmc_vadc.h
  • XMC_VADC_SHS_LOOP_CH_t : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR0 : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR1 : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR2 : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR3 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR0 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR1 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR2 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR3 : xmc_vadc.h
  • XMC_VADC_SR_t : xmc_vadc.h
  • XMC_VADC_STARTMODE_CIR : xmc_vadc.h
  • XMC_VADC_STARTMODE_CNR : xmc_vadc.h
  • XMC_VADC_STARTMODE_t : xmc_vadc.h
  • XMC_VADC_STARTMODE_WFS : xmc_vadc.h
  • XMC_VADC_STATUS_ERROR : xmc_vadc.h
  • XMC_VADC_STATUS_SUCCESS : xmc_vadc.h
  • XMC_VADC_STATUS_t : xmc_vadc.h
  • XMC_VADC_SYNCTR_EVAL_1 : xmc_vadc.h
  • XMC_VADC_SYNCTR_EVAL_t : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_ANY : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_FALLING : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_NONE : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_RISING : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_t : xmc_vadc.h
  • XMC_VADC_TRIGGER_INPUT_SELECT_t : xmc_vadc.h
  • XMC_WDT_ClearAlarm() : xmc_wdt.h
  • XMC_WDT_DEBUG_MODE_RUN : xmc_wdt.h
  • XMC_WDT_DEBUG_MODE_STOP : xmc_wdt.h
  • XMC_WDT_DEBUG_MODE_t : xmc_wdt.h
  • XMC_WDT_Disable() : xmc_wdt.h
  • XMC_WDT_Enable() : xmc_wdt.h
  • XMC_WDT_GetCounter() : xmc_wdt.h
  • XMC_WDT_Init() : xmc_wdt.h
  • XMC_WDT_MODE_PREWARNING : xmc_wdt.h
  • XMC_WDT_MODE_t : xmc_wdt.h
  • XMC_WDT_MODE_TIMEOUT : xmc_wdt.h
  • XMC_WDT_Service() : xmc_wdt.h
  • XMC_WDT_SetDebugMode() : xmc_wdt.h
  • XMC_WDT_SetMode() : xmc_wdt.h
  • XMC_WDT_SetServicePulseWidth() : xmc_wdt.h
  • XMC_WDT_SetWindowBounds() : xmc_wdt.h
  • XMC_WDT_Start() : xmc_wdt.h
  • XMC_WDT_Stop() : xmc_wdt.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • x

- x -

  • XMC_BCCU_AbortDimming() : xmc_bccu.h
  • XMC_BCCU_AbortLinearWalk() : xmc_bccu.h
  • XMC_BCCU_CH_ConfigTrigger() : xmc_bccu.h
  • XMC_BCCU_CH_DisableDimmingBypass() : xmc_bccu.h
  • XMC_BCCU_CH_DisableFlickerWatchdog() : xmc_bccu.h
  • XMC_BCCU_CH_DisableGating() : xmc_bccu.h
  • XMC_BCCU_CH_DisablePacker() : xmc_bccu.h
  • XMC_BCCU_CH_EnableDimmingBypass() : xmc_bccu.h
  • XMC_BCCU_CH_EnableFlickerWatchdog() : xmc_bccu.h
  • XMC_BCCU_CH_EnableGating() : xmc_bccu.h
  • XMC_BCCU_CH_EnablePacker() : xmc_bccu.h
  • XMC_BCCU_CH_Init() : xmc_bccu.h
  • XMC_BCCU_CH_ReadIntensity() : xmc_bccu.h
  • XMC_BCCU_CH_ReadPackerOffCompare() : xmc_bccu.h
  • XMC_BCCU_CH_ReadPackerOnCompare() : xmc_bccu.h
  • XMC_BCCU_CH_ReadPackerThreshold() : xmc_bccu.h
  • XMC_BCCU_CH_SelectDimEngine() : xmc_bccu.h
  • XMC_BCCU_CH_SetLinearWalkPrescaler() : xmc_bccu.h
  • XMC_BCCU_CH_SetPackerOffCompare() : xmc_bccu.h
  • XMC_BCCU_CH_SetPackerOffCounter() : xmc_bccu.h
  • XMC_BCCU_CH_SetPackerOnCompare() : xmc_bccu.h
  • XMC_BCCU_CH_SetPackerOnCounter() : xmc_bccu.h
  • XMC_BCCU_CH_SetPackerThreshold() : xmc_bccu.h
  • XMC_BCCU_CH_SetTargetIntensity() : xmc_bccu.h
  • XMC_BCCU_ClearEventFlag() : xmc_bccu.h
  • XMC_BCCU_ConcurrentAbortDimming() : xmc_bccu.h
  • XMC_BCCU_ConcurrentAbortLinearWalk() : xmc_bccu.h
  • XMC_BCCU_ConcurrentConfigTrigger() : xmc_bccu.h
  • XMC_BCCU_ConcurrentDisableChannels() : xmc_bccu.h
  • XMC_BCCU_ConcurrentDisableDimmingEngine() : xmc_bccu.h
  • XMC_BCCU_ConcurrentDisableTrap() : xmc_bccu.h
  • XMC_BCCU_ConcurrentEnableChannels() : xmc_bccu.h
  • XMC_BCCU_ConcurrentEnableDimmingEngine() : xmc_bccu.h
  • XMC_BCCU_ConcurrentEnableTrap() : xmc_bccu.h
  • XMC_BCCU_ConcurrentSetOutputPassiveLevel() : xmc_bccu.h
  • XMC_BCCU_ConcurrentStartDimming() : xmc_bccu.h
  • XMC_BCCU_ConcurrentStartLinearWalk() : xmc_bccu.h
  • XMC_BCCU_ConfigGlobalTrigger() : xmc_bccu.h
  • XMC_BCCU_ConfigSuspendMode() : xmc_bccu.h
  • XMC_BCCU_DIM_ConfigDimCurve() : xmc_bccu.h
  • XMC_BCCU_DIM_GetDimCurve() : xmc_bccu.h
  • XMC_BCCU_DIM_Init() : xmc_bccu.h
  • XMC_BCCU_DIM_ReadDimDivider() : xmc_bccu.h
  • XMC_BCCU_DIM_ReadDimmingLevel() : xmc_bccu.h
  • XMC_BCCU_DIM_SetDimDivider() : xmc_bccu.h
  • XMC_BCCU_DIM_SetTargetDimmingLevel() : xmc_bccu.h
  • XMC_BCCU_DisableChannel() : xmc_bccu.h
  • XMC_BCCU_DisableChannelTrigger() : xmc_bccu.h
  • XMC_BCCU_DisableDimmingEngine() : xmc_bccu.h
  • XMC_BCCU_DisableInterrupt() : xmc_bccu.h
  • XMC_BCCU_DisableTrap() : xmc_bccu.h
  • XMC_BCCU_EnableChannel() : xmc_bccu.h
  • XMC_BCCU_EnableChannelTrigger() : xmc_bccu.h
  • XMC_BCCU_EnableDimmingEngine() : xmc_bccu.h
  • XMC_BCCU_EnableInterrupt() : xmc_bccu.h
  • XMC_BCCU_EnableTrap() : xmc_bccu.h
  • XMC_BCCU_GetChannelOutputLvlAtLastTrigger() : xmc_bccu.h
  • XMC_BCCU_GlobalInit() : xmc_bccu.h
  • XMC_BCCU_IsDimmingFinished() : xmc_bccu.h
  • XMC_BCCU_IsDitherEnable() : xmc_bccu.h
  • XMC_BCCU_IsLinearWalkComplete() : xmc_bccu.h
  • XMC_BCCU_ReadBitClock() : xmc_bccu.h
  • XMC_BCCU_ReadDimClock() : xmc_bccu.h
  • XMC_BCCU_ReadEventFlag() : xmc_bccu.h
  • XMC_BCCU_ReadFastClock() : xmc_bccu.h
  • XMC_BCCU_ReadFlickerWDThreshold() : xmc_bccu.h
  • XMC_BCCU_ReadGlobalTrigger() : xmc_bccu.h
  • XMC_BCCU_ReadLastTrigChanNr() : xmc_bccu.h
  • XMC_BCCU_ReadSuspendMode() : xmc_bccu.h
  • XMC_BCCU_ReadTrapEdge() : xmc_bccu.h
  • XMC_BCCU_ReadTrapInput() : xmc_bccu.h
  • XMC_BCCU_SelectBitClock() : xmc_bccu.h
  • XMC_BCCU_SelectTrapInput() : xmc_bccu.h
  • XMC_BCCU_SetDimClockPrescaler() : xmc_bccu.h
  • XMC_BCCU_SetEventFlag() : xmc_bccu.h
  • XMC_BCCU_SetFastClockPrescaler() : xmc_bccu.h
  • XMC_BCCU_SetFlickerWDThreshold() : xmc_bccu.h
  • XMC_BCCU_SetGlobalDimmingLevel() : xmc_bccu.h
  • XMC_BCCU_SetOutputPassiveLevel() : xmc_bccu.h
  • XMC_BCCU_SetTrapEdge() : xmc_bccu.h
  • XMC_BCCU_StartDimming() : xmc_bccu.h
  • XMC_BCCU_StartLinearWalk() : xmc_bccu.h
  • XMC_CAN_AllocateMOtoNodeList() : xmc_can.h
  • XMC_CAN_Disable() : xmc_can.h
  • XMC_CAN_Enable() : xmc_can.h
  • XMC_CAN_EventTrigger() : xmc_can.h
  • XMC_CAN_FIFO_DisableForeingRemoteRequest() : xmc_can.h
  • XMC_CAN_FIFO_DisableRemoteMonitoring() : xmc_can.h
  • XMC_CAN_FIFO_DisableSingleDataTransfer() : xmc_can.h
  • XMC_CAN_FIFO_EnableForeignRemoteRequest() : xmc_can.h
  • XMC_CAN_FIFO_EnableRemoteMonitoring() : xmc_can.h
  • XMC_CAN_FIFO_EnableSingleDataTransfer() : xmc_can.h
  • XMC_CAN_FIFO_GetCurrentMO() : xmc_can.h
  • XMC_CAN_FIFO_SetSELMO() : xmc_can.h
  • XMC_CAN_GATEWAY_InitDesObject() : xmc_can.h
  • XMC_CAN_GATEWAY_InitSourceObject() : xmc_can.h
  • XMC_CAN_Init() : xmc_can.h
  • XMC_CAN_IsPanelControlReady() : xmc_can.h
  • XMC_CAN_MO_AcceptOnlyMatchingIDE() : xmc_can.h
  • XMC_CAN_MO_AcceptStandardAndExtendedID() : xmc_can.h
  • XMC_CAN_MO_Config() : xmc_can.h
  • XMC_CAN_MO_DataLengthCode() : xmc_can.h
  • XMC_CAN_MO_DisableEvent() : xmc_can.h
  • XMC_CAN_MO_DisableSingleTransmitTrial() : xmc_can.h
  • XMC_CAN_MO_EnableEvent() : xmc_can.h
  • XMC_CAN_MO_EnableSingleTransmitTrial() : xmc_can.h
  • XMC_CAN_MO_GetAcceptanceMask() : xmc_can.h
  • XMC_CAN_MO_GetDataLengthCode() : xmc_can.h
  • XMC_CAN_MO_GetIdentifier() : xmc_can.h
  • XMC_CAN_MO_GetStatus() : xmc_can.h
  • XMC_CAN_MO_Receive() : xmc_can.h
  • XMC_CAN_MO_ReceiveData() : xmc_can.h
  • XMC_CAN_MO_ResetStatus() : xmc_can.h
  • XMC_CAN_MO_SetAcceptanceMask() : xmc_can.h
  • XMC_CAN_MO_SetDataLengthCode() : xmc_can.h
  • XMC_CAN_MO_SetEventNodePointer() : xmc_can.h
  • XMC_CAN_MO_SetExtendedID() : xmc_can.h
  • XMC_CAN_MO_SetIdentifier() : xmc_can.h
  • XMC_CAN_MO_SetStandardID() : xmc_can.h
  • XMC_CAN_MO_SetStatus() : xmc_can.h
  • XMC_CAN_MO_Transmit() : xmc_can.h
  • XMC_CAN_MO_UpdateData() : xmc_can.h
  • XMC_CAN_NODE_ClearStatus() : xmc_can.h
  • XMC_CAN_NODE_Disable() : xmc_can.h
  • XMC_CAN_NODE_DisableConfigurationChange() : xmc_can.h
  • XMC_CAN_NODE_DisableEvent() : xmc_can.h
  • XMC_CAN_NODE_DisableLoopBack() : xmc_can.h
  • XMC_CAN_NODE_Enable() : xmc_can.h
  • XMC_CAN_NODE_EnableConfigurationChange() : xmc_can.h
  • XMC_CAN_NODE_EnableEvent() : xmc_can.h
  • XMC_CAN_NODE_EnableLoopBack() : xmc_can.h
  • XMC_CAN_NODE_EnableSuspend() : xmc_can.h
  • XMC_CAN_NODE_FrameCounterConfigure() : xmc_can.h
  • XMC_CAN_NODE_GetCANFrameCounter() : xmc_can.h
  • XMC_CAN_NODE_GetErrorWarningLevel() : xmc_can.h
  • XMC_CAN_NODE_GetLastErrTransferDir() : xmc_can.h
  • XMC_CAN_NODE_GetLastErrTransferInc() : xmc_can.h
  • XMC_CAN_NODE_GetReceiveErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_GetStatus() : xmc_can.h
  • XMC_CAN_NODE_GetTransmitErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_NominalBitTimeConfigure() : xmc_can.h
  • XMC_CAN_NODE_ReSetAnalyzerMode() : xmc_can.h
  • XMC_CAN_NODE_ResetInitBit() : xmc_can.h
  • XMC_CAN_NODE_SetAnalyzerMode() : xmc_can.h
  • XMC_CAN_NODE_SetErrorWarningLevel() : xmc_can.h
  • XMC_CAN_NODE_SetEventNodePointer() : xmc_can.h
  • XMC_CAN_NODE_SetInitBit() : xmc_can.h
  • XMC_CAN_NODE_SetReceiveErrorCounter() : xmc_can.h
  • XMC_CAN_NODE_SetReceiveInput() : xmc_can.h
  • XMC_CAN_NODE_SetTransmitErrorCounter() : xmc_can.h
  • XMC_CAN_PanelControl() : xmc_can.h
  • XMC_CAN_RXFIFO_ConfigMOBaseObject() : xmc_can.h
  • XMC_CAN_RXFIFO_ConfigMOSlaveObject() : xmc_can.h
  • XMC_CAN_TXFIFO_ConfigMOBaseObject() : xmc_can.h
  • XMC_CAN_TXFIFO_ConfigMOSlaveObject() : xmc_can.h
  • XMC_CAN_TXFIFO_Transmit() : xmc_can.h
  • XMC_CCU4_DisableClock() : xmc_ccu4.h
  • XMC_CCU4_DisableModule() : xmc_ccu4.h
  • XMC_CCU4_EnableClock() : xmc_ccu4.h
  • XMC_CCU4_EnableModule() : xmc_ccu4.h
  • XMC_CCU4_EnableMultipleClocks() : xmc_ccu4.h
  • XMC_CCU4_EnableShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_Init() : xmc_ccu4.h
  • XMC_CCU4_IsPrescalerRunning() : xmc_ccu4.h
  • XMC_CCU4_SetModuleClock() : xmc_ccu4.h
  • XMC_CCU4_SetMultiChannelShadowTransferMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_Capture0Config() : xmc_ccu4.h
  • XMC_CCU4_SLICE_Capture1Config() : xmc_ccu4.h
  • XMC_CCU4_SLICE_CaptureInit() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ClearEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ClearTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_CompareInit() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ConfigureEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ConfigureStatusBitOverrideEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_CountConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DirectionConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableAutomaticShadowTransferRequest() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableCascadedShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableDithering() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableFloatingPrescaler() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableMultiChannelMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableMultipleEvents() : xmc_ccu4.h
  • XMC_CCU4_SLICE_DisableTrap() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableAutomaticShadowTransferRequest() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableCascadedShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableDithering() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableFloatingPrescaler() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableMultiChannelMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableMultipleEvents() : xmc_ccu4.h
  • XMC_CCU4_SLICE_EnableTrap() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GateConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetCapturedValueFromFifo() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetCaptureRegisterValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetCountingDir() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetLastCapturedTimerValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetSliceMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerCompareMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerCountingMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerPeriodMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerRepeatMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_GetTimerValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_IsExtendedCapReadEnabled() : xmc_ccu4.h
  • XMC_CCU4_SLICE_IsTimerRunning() : xmc_ccu4.h
  • XMC_CCU4_SLICE_LoadConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_ModulationConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetDitherCompareValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetEvent() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetFloatingPrescalerCompareValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetInput() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetInterruptNode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetPassiveLevel() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetPrescaler() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetShadowTransferMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerCompareMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerCountingMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerPeriodMatch() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerRepeatMode() : xmc_ccu4.h
  • XMC_CCU4_SLICE_SetTimerValue() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StartConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StartTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StatusBitOverrideConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StopClearTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StopConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_StopTimer() : xmc_ccu4.h
  • XMC_CCU4_SLICE_TrapConfig() : xmc_ccu4.h
  • XMC_CCU4_SLICE_WriteCoherentlyWithPWMCycle() : xmc_ccu4.h
  • XMC_CCU4_SLICE_WriteImmediateAfterShadowTransfer() : xmc_ccu4.h
  • XMC_CCU4_StartPrescaler() : xmc_ccu4.h
  • XMC_CCU4_StopPrescaler() : xmc_ccu4.h
  • XMC_CCU8_DisableClock() : xmc_ccu8.h
  • XMC_CCU8_DisableModule() : xmc_ccu8.h
  • XMC_CCU8_EnableClock() : xmc_ccu8.h
  • XMC_CCU8_EnableModule() : xmc_ccu8.h
  • XMC_CCU8_EnableMultipleClocks() : xmc_ccu8.h
  • XMC_CCU8_EnableShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_Init() : xmc_ccu8.h
  • XMC_CCU8_IsPrescalerRunning() : xmc_ccu8.h
  • XMC_CCU8_SetModuleClock() : xmc_ccu8.h
  • XMC_CCU8_SetMultiChannelShadowTransferMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_Capture0Config() : xmc_ccu8.h
  • XMC_CCU8_SLICE_Capture1Config() : xmc_ccu8.h
  • XMC_CCU8_SLICE_CaptureInit() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ClearEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ClearTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_CompareInit() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureDeadTime() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureStatusBitOutput() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_CountConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DeadTimeInit() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DirectionConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableCascadedShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableDithering() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableFloatingPrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableMultiChannelMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableMultipleEvents() : xmc_ccu8.h
  • XMC_CCU8_SLICE_DisableTrap() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableAsymmetricCompareMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableCascadedShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableDithering() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableFloatingPrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableMultiChannelMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableMultipleEvents() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableSymmetricCompareMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_EnableTrap() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GateConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetCapturedValueFromFifo() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetCaptureRegisterValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetCountingDir() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetLastCapturedTimerValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetSliceMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerCompareMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerCountingMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerPeriodMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerRepeatMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_GetTimerValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsDeadTimeCntr1Running() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsDeadTimeCntr2Running() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsExtendedCapReadEnabled() : xmc_ccu8.h
  • XMC_CCU8_SLICE_IsTimerRunning() : xmc_ccu8.h
  • XMC_CCU8_SLICE_LoadConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_LoadSelector() : xmc_ccu8.h
  • XMC_CCU8_SLICE_ModulationConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetDeadTimePrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetDeadTimeValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetDitherCompareValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetEvent() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetInput() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetInterruptNode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetOutPath() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetPassiveLevel() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetPrescaler() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetShadowTransferMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCompareMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCompareMatchChannel1() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCompareMatchChannel2() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerCountingMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerPeriodMatch() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerRepeatMode() : xmc_ccu8.h
  • XMC_CCU8_SLICE_SetTimerValue() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StartConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StartTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StatusBitOverrideConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StopClearTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StopConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_StopTimer() : xmc_ccu8.h
  • XMC_CCU8_SLICE_TrapConfig() : xmc_ccu8.h
  • XMC_CCU8_SLICE_WriteCoherentlyWithPWMCycle() : xmc_ccu8.h
  • XMC_CCU8_SLICE_WriteImmediateAfterShadowTransfer() : xmc_ccu8.h
  • XMC_CCU8_StartPrescaler() : xmc_ccu8.h
  • XMC_CCU8_StopPrescaler() : xmc_ccu8.h
  • XMC_ERU_Disable() : xmc_eru.h
  • XMC_ERU_Enable() : xmc_eru.h
  • XMC_ERU_ETL_ClearStatusFlag() : xmc_eru.h
  • XMC_ERU_ETL_DisableOutputTrigger() : xmc_eru.h
  • XMC_ERU_ETL_EnableOutputTrigger() : xmc_eru.h
  • XMC_ERU_ETL_GetEdgeDetection() : xmc_eru.h
  • XMC_ERU_ETL_GetStatusFlag() : xmc_eru.h
  • XMC_ERU_ETL_Init() : xmc_eru.h
  • XMC_ERU_ETL_SetEdgeDetection() : xmc_eru.h
  • XMC_ERU_ETL_SetInput() : xmc_eru.h
  • XMC_ERU_ETL_SetSource() : xmc_eru.h
  • XMC_ERU_ETL_SetStatusFlag() : xmc_eru.h
  • XMC_ERU_ETL_SetStatusFlagMode() : xmc_eru.h
  • XMC_ERU_OGU_DisablePatternDetection() : xmc_eru.h
  • XMC_ERU_OGU_DisablePeripheralTrigger() : xmc_eru.h
  • XMC_ERU_OGU_EnablePatternDetection() : xmc_eru.h
  • XMC_ERU_OGU_EnablePeripheralTrigger() : xmc_eru.h
  • XMC_ERU_OGU_GetPatternDetectionStatus() : xmc_eru.h
  • XMC_ERU_OGU_Init() : xmc_eru.h
  • XMC_ERU_OGU_SetServiceRequestMode() : xmc_eru.h
  • XMC_FLASH_ClearStatus() : xmc_flash.h
  • XMC_FLASH_DisableEvent() : xmc_flash.h
  • XMC_FLASH_EnableEvent() : xmc_flash.h
  • XMC_FLASH_EnterSleepMode() : xmc1_flash.h
  • XMC_FLASH_ErasePage() : xmc1_flash.h
  • XMC_FLASH_ErasePages() : xmc1_flash.h
  • XMC_FLASH_EraseSector() : xmc_flash.h
  • XMC_FLASH_ExitSleepMode() : xmc1_flash.h
  • XMC_FLASH_GetSectorAddress() : xmc1_flash.h
  • XMC_FLASH_GetStatus() : xmc_flash.h
  • XMC_FLASH_IsBusy() : xmc_flash.h
  • XMC_FLASH_ProgramPage() : xmc_flash.h
  • XMC_FLASH_ProgramVerifyPage() : xmc1_flash.h
  • XMC_FLASH_ReadBlocks() : xmc1_flash.h
  • XMC_FLASH_ReadWord() : xmc1_flash.h
  • XMC_FLASH_SetHardReadLevel() : xmc1_flash.h
  • XMC_FLASH_SetSectorProtection() : xmc1_flash.h
  • XMC_FLASH_VerifyBlocks() : xmc1_flash.h
  • XMC_FLASH_WriteBlocks() : xmc1_flash.h
  • XMC_GPIO_DisableDigitalInput() : xmc_gpio.h
  • XMC_GPIO_DisablePowerSaveMode() : xmc_gpio.h
  • XMC_GPIO_EnableDigitalInput() : xmc_gpio.h
  • XMC_GPIO_EnablePowerSaveMode() : xmc_gpio.h
  • XMC_GPIO_GetInput() : xmc_gpio.h
  • XMC_GPIO_Init() : xmc_gpio.h
  • XMC_GPIO_SetHardwareControl() : xmc_gpio.h
  • XMC_GPIO_SetInputHysteresis() : xmc1_gpio.h
  • XMC_GPIO_SetMode() : xmc_gpio.h
  • XMC_GPIO_SetOutputHigh() : xmc_gpio.h
  • XMC_GPIO_SetOutputLevel() : xmc_gpio.h
  • XMC_GPIO_SetOutputLow() : xmc_gpio.h
  • XMC_GPIO_ToggleOutput() : xmc_gpio.h
  • XMC_I2C_CH_ClearStatusFlag() : xmc_i2c.h
  • XMC_I2C_CH_ConfigExternalInputSignalToBRG() : xmc_i2c.h
  • XMC_I2C_CH_DisableAcknowledgeAddress0() : xmc_i2c.h
  • XMC_I2C_CH_DisableDataTransmission() : xmc_i2c.h
  • XMC_I2C_CH_DisableEvent() : xmc_i2c.h
  • XMC_I2C_CH_EnableAcknowledgeAddress0() : xmc_i2c.h
  • XMC_I2C_CH_EnableDataTransmission() : xmc_i2c.h
  • XMC_I2C_CH_EnableEvent() : xmc_i2c.h
  • XMC_I2C_CH_GetReceivedData() : xmc_i2c.h
  • XMC_I2C_CH_GetReceiverStatusFlag() : xmc_i2c.h
  • XMC_I2C_CH_GetSlaveAddress() : xmc_i2c.h
  • XMC_I2C_CH_GetStatusFlag() : xmc_i2c.h
  • XMC_I2C_CH_Init() : xmc_i2c.h
  • XMC_I2C_CH_MasterReceiveAck() : xmc_i2c.h
  • XMC_I2C_CH_MasterReceiveNack() : xmc_i2c.h
  • XMC_I2C_CH_MasterRepeatedStart() : xmc_i2c.h
  • XMC_I2C_CH_MasterStart() : xmc_i2c.h
  • XMC_I2C_CH_MasterStop() : xmc_i2c.h
  • XMC_I2C_CH_MasterTransmit() : xmc_i2c.h
  • XMC_I2C_CH_SelectInterruptNodePointer() : xmc_i2c.h
  • XMC_I2C_CH_SetBaudrate() : xmc_i2c.h
  • XMC_I2C_CH_SetInputSource() : xmc_i2c.h
  • XMC_I2C_CH_SetInterruptNodePointer() : xmc_i2c.h
  • XMC_I2C_CH_SetSlaveAddress() : xmc_i2c.h
  • XMC_I2C_CH_SlaveTransmit() : xmc_i2c.h
  • XMC_I2C_CH_Start() : xmc_i2c.h
  • XMC_I2C_CH_Stop() : xmc_i2c.h
  • XMC_I2C_CH_TriggerServiceRequest() : xmc_i2c.h
  • XMC_I2S_CH_ClearStatusFlag() : xmc_i2s.h
  • XMC_I2S_CH_ConfigureShiftClockOutput() : xmc_i2s.h
  • XMC_I2S_CH_DisableDataTransmission() : xmc_i2s.h
  • XMC_I2S_CH_DisableDelayCompensation() : xmc_i2s.h
  • XMC_I2S_CH_DisableEvent() : xmc_i2s.h
  • XMC_I2S_CH_DisableInputInversion() : xmc_i2s.h
  • XMC_I2S_CH_DisableMasterClock() : xmc_i2s.h
  • XMC_I2S_CH_EnableDataTransmission() : xmc_i2s.h
  • XMC_I2S_CH_EnableDelayCompensation() : xmc_i2s.h
  • XMC_I2S_CH_EnableEvent() : xmc_i2s.h
  • XMC_I2S_CH_EnableInputInversion() : xmc_i2s.h
  • XMC_I2S_CH_EnableMasterClock() : xmc_i2s.h
  • XMC_I2S_CH_GetReceivedData() : xmc_i2s.h
  • XMC_I2S_CH_GetStatusFlag() : xmc_i2s.h
  • XMC_I2S_CH_Init() : xmc_i2s.h
  • XMC_I2S_CH_Receive() : xmc_i2s.h
  • XMC_I2S_CH_SelectInterruptNodePointer() : xmc_i2s.h
  • XMC_I2S_CH_SetBaudrate() : xmc_i2s.h
  • XMC_I2S_CH_SetBitOrderLsbFirst() : xmc_i2s.h
  • XMC_I2S_CH_SetBitOrderMsbFirst() : xmc_i2s.h
  • XMC_I2S_CH_SetFrameLength() : xmc_i2s.h
  • XMC_I2S_CH_SetInputSource() : xmc_i2s.h
  • XMC_I2S_CH_SetInterruptNodePointer() : xmc_i2s.h
  • XMC_I2S_CH_SetSystemWordLength() : xmc_i2s.h
  • XMC_I2S_CH_SetWordLength() : xmc_i2s.h
  • XMC_I2S_CH_Start() : xmc_i2s.h
  • XMC_I2S_CH_Stop() : xmc_i2s.h
  • XMC_I2S_CH_Transmit() : xmc_i2s.h
  • XMC_I2S_CH_TriggerServiceRequest() : xmc_i2s.h
  • XMC_I2S_CH_WordAddressSignalPolarity() : xmc_i2s.h
  • XMC_LEDTS_ClearInterruptFlag() : xmc_ledts.h
  • XMC_LEDTS_DisableInterrupt() : xmc_ledts.h
  • XMC_LEDTS_EnableInterrupt() : xmc_ledts.h
  • XMC_LEDTS_InitGlobal() : xmc_ledts.h
  • XMC_LEDTS_InitLED() : xmc_ledts.h
  • XMC_LEDTS_InitTSAdvanced() : xmc_ledts.h
  • XMC_LEDTS_InitTSBasic() : xmc_ledts.h
  • XMC_LEDTS_ReadFNCOL() : xmc_ledts.h
  • XMC_LEDTS_ReadInterruptFlag() : xmc_ledts.h
  • XMC_LEDTS_ReadTSVAL() : xmc_ledts.h
  • XMC_LEDTS_SetActivePADNo() : xmc_ledts.h
  • XMC_LEDTS_SetColumnBrightness() : xmc_ledts.h
  • XMC_LEDTS_SetCommonOscillationWindow() : xmc_ledts.h
  • XMC_LEDTS_SetLEDLinePattern() : xmc_ledts.h
  • XMC_LEDTS_SetNumOfLEDColumns() : xmc_ledts.h
  • XMC_LEDTS_SetOscillationWindow() : xmc_ledts.h
  • XMC_LEDTS_StartCounter() : xmc_ledts.h
  • XMC_LEDTS_StopCounter() : xmc_ledts.h
  • XMC_MATH_ClearEvent() : xmc_math.h
  • XMC_MATH_CORDIC_ArcTan() : xmc_math.h
  • XMC_MATH_CORDIC_ArcTanNB() : xmc_math.h
  • XMC_MATH_CORDIC_Cos() : xmc_math.h
  • XMC_MATH_CORDIC_Cosh() : xmc_math.h
  • XMC_MATH_CORDIC_CoshNB() : xmc_math.h
  • XMC_MATH_CORDIC_CosNB() : xmc_math.h
  • XMC_MATH_CORDIC_GetArcTanResult() : xmc_math.h
  • XMC_MATH_CORDIC_GetCoshResult() : xmc_math.h
  • XMC_MATH_CORDIC_GetCosResult() : xmc_math.h
  • XMC_MATH_CORDIC_GetSinhResult() : xmc_math.h
  • XMC_MATH_CORDIC_GetSinResult() : xmc_math.h
  • XMC_MATH_CORDIC_GetTanhResult() : xmc_math.h
  • XMC_MATH_CORDIC_GetTanResult() : xmc_math.h
  • XMC_MATH_CORDIC_IsBusy() : xmc_math.h
  • XMC_MATH_CORDIC_Q15_Sqrt() : xmc_math.h
  • XMC_MATH_CORDIC_Q31_Sqrt() : xmc_math.h
  • XMC_MATH_CORDIC_Sin() : xmc_math.h
  • XMC_MATH_CORDIC_Sinh() : xmc_math.h
  • XMC_MATH_CORDIC_SinhNB() : xmc_math.h
  • XMC_MATH_CORDIC_SinNB() : xmc_math.h
  • XMC_MATH_CORDIC_Tan() : xmc_math.h
  • XMC_MATH_CORDIC_Tanh() : xmc_math.h
  • XMC_MATH_CORDIC_TanhNB() : xmc_math.h
  • XMC_MATH_CORDIC_TanNB() : xmc_math.h
  • XMC_MATH_Disable() : xmc_math.h
  • XMC_MATH_DisableEvent() : xmc_math.h
  • XMC_MATH_DIV_GetSignedDivResult() : xmc_math.h
  • XMC_MATH_DIV_GetSignedModResult() : xmc_math.h
  • XMC_MATH_DIV_GetUnsignedDivResult() : xmc_math.h
  • XMC_MATH_DIV_GetUnsignedModResult() : xmc_math.h
  • XMC_MATH_DIV_IsBusy() : xmc_math.h
  • XMC_MATH_DIV_SignedDivNB() : xmc_math.h
  • XMC_MATH_DIV_SignedModNB() : xmc_math.h
  • XMC_MATH_DIV_UnsignedDivNB() : xmc_math.h
  • XMC_MATH_DIV_UnsignedModNB() : xmc_math.h
  • XMC_MATH_Enable() : xmc_math.h
  • XMC_MATH_EnableEvent() : xmc_math.h
  • XMC_MATH_GetEventStatus() : xmc_math.h
  • XMC_MATH_SetEvent() : xmc_math.h
  • XMC_PAU_DisablePeripheralAccess() : xmc_pau.h
  • XMC_PAU_EnablePeripheralAccess() : xmc_pau.h
  • XMC_PAU_GetFlashSize() : xmc_pau.h
  • XMC_PAU_GetRAMSize() : xmc_pau.h
  • XMC_PAU_GetROMSize() : xmc_pau.h
  • XMC_PAU_IsPeripheralAccessEnabled() : xmc_pau.h
  • XMC_PAU_IsPeripheralAvailable() : xmc_pau.h
  • XMC_POSIF_ClearEvent() : xmc_posif.h
  • XMC_POSIF_Disable() : xmc_posif.h
  • XMC_POSIF_DisableEvent() : xmc_posif.h
  • XMC_POSIF_Enable() : xmc_posif.h
  • XMC_POSIF_EnableEvent() : xmc_posif.h
  • XMC_POSIF_GetEventStatus() : xmc_posif.h
  • XMC_POSIF_HSC_GetCurrentPattern() : xmc_posif.h
  • XMC_POSIF_HSC_GetExpectedPattern() : xmc_posif.h
  • XMC_POSIF_HSC_GetLastSampledPattern() : xmc_posif.h
  • XMC_POSIF_HSC_Init() : xmc_posif.h
  • XMC_POSIF_HSC_SetCurrentPattern() : xmc_posif.h
  • XMC_POSIF_HSC_SetExpectedPattern() : xmc_posif.h
  • XMC_POSIF_HSC_SetHallPatterns() : xmc_posif.h
  • XMC_POSIF_HSC_UpdateHallPattern() : xmc_posif.h
  • XMC_POSIF_Init() : xmc_posif.h
  • XMC_POSIF_IsRunning() : xmc_posif.h
  • XMC_POSIF_MCM_EnableMultiChannelPatternUpdate() : xmc_posif.h
  • XMC_POSIF_MCM_GetMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MCM_GetShadowMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MCM_Init() : xmc_posif.h
  • XMC_POSIF_MCM_SetMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_MCM_UpdateMultiChannelPattern() : xmc_posif.h
  • XMC_POSIF_QD_GetCurrentIndexValue() : xmc_posif.h
  • XMC_POSIF_QD_GetCurrentState() : xmc_posif.h
  • XMC_POSIF_QD_GetDirection() : xmc_posif.h
  • XMC_POSIF_QD_GetPreviousState() : xmc_posif.h
  • XMC_POSIF_QD_Init() : xmc_posif.h
  • XMC_POSIF_SelectInputSource() : xmc_posif.h
  • XMC_POSIF_SetEvent() : xmc_posif.h
  • XMC_POSIF_SetInterruptNode() : xmc_posif.h
  • XMC_POSIF_SetMode() : xmc_posif.h
  • XMC_POSIF_Start() : xmc_posif.h
  • XMC_POSIF_Stop() : xmc_posif.h
  • XMC_PRNG_CheckValidStatus() : xmc_prng.h
  • XMC_PRNG_EnableKeyLoadingMode() : xmc_prng.h
  • XMC_PRNG_EnableStreamingMode() : xmc_prng.h
  • XMC_PRNG_GetPseudoRandomNumber() : xmc_prng.h
  • XMC_PRNG_Init() : xmc_prng.h
  • XMC_PRNG_LoadKeyWords() : xmc_prng.h
  • XMC_PRNG_SetRandomDataBlockSize() : xmc_prng.h
  • XMC_RTC_ClearEvent() : xmc_rtc.h
  • XMC_RTC_Disable() : xmc_rtc.h
  • XMC_RTC_DisableEvent() : xmc_rtc.h
  • XMC_RTC_Enable() : xmc_rtc.h
  • XMC_RTC_EnableEvent() : xmc_rtc.h
  • XMC_RTC_GetAlarm() : xmc_rtc.h
  • XMC_RTC_GetAlarmStdFormat() : xmc_rtc.h
  • XMC_RTC_GetEventStatus() : xmc_rtc.h
  • XMC_RTC_GetPrescaler() : xmc_rtc.h
  • XMC_RTC_GetTime() : xmc_rtc.h
  • XMC_RTC_GetTimeStdFormat() : xmc_rtc.h
  • XMC_RTC_Init() : xmc_rtc.h
  • XMC_RTC_IsEnabled() : xmc_rtc.h
  • XMC_RTC_IsRunning() : xmc_rtc.h
  • XMC_RTC_SetAlarm() : xmc_rtc.h
  • XMC_RTC_SetAlarmStdFormat() : xmc_rtc.h
  • XMC_RTC_SetDebugMode() : xmc1_rtc.h
  • XMC_RTC_SetPrescaler() : xmc_rtc.h
  • XMC_RTC_SetTime() : xmc_rtc.h
  • XMC_RTC_SetTimeStdFormat() : xmc_rtc.h
  • XMC_RTC_Start() : xmc_rtc.h
  • XMC_RTC_Stop() : xmc_rtc.h
  • XMC_SCU_CalcTemperature() : xmc1_scu.h
  • XMC_SCU_CLOCK_CalibrateOscillatorOnTemperature() : xmc1_scu.h
  • XMC_SCU_CLOCK_ClearDCO1OscillatorWatchdogStatus() : xmc1_scu.h
  • XMC_SCU_CLOCK_DisableDCO1ExtRefCalibration() : xmc1_scu.h
  • XMC_SCU_CLOCK_DisableDCO1OscillatorWatchdog() : xmc1_scu.h
  • XMC_SCU_CLOCK_EnableDCO1ExtRefCalibration() : xmc1_scu.h
  • XMC_SCU_CLOCK_EnableDCO1OscillatorWatchdog() : xmc1_scu.h
  • XMC_SCU_CLOCK_GatePeripheralClock() : xmc_scu.h
  • XMC_SCU_CLOCK_GetCpuClockFrequency() : xmc_scu.h
  • XMC_SCU_CLOCK_GetFastPeripheralClockFrequency() : xmc1_scu.h
  • XMC_SCU_CLOCK_GetPeripheralClockFrequency() : xmc_scu.h
  • XMC_SCU_CLOCK_Init() : xmc_scu.h
  • XMC_SCU_CLOCK_IsDCO1ExtRefCalibrationReady() : xmc1_scu.h
  • XMC_SCU_CLOCK_IsPeripheralClockGated() : xmc_scu.h
  • XMC_SCU_CLOCK_ScaleMCLKFrequency() : xmc1_scu.h
  • XMC_SCU_CLOCK_SetFastPeripheralClockSource() : xmc1_scu.h
  • XMC_SCU_CLOCK_SetMCLKFrequency() : xmc1_scu.h
  • XMC_SCU_CLOCK_UngatePeripheralClock() : xmc_scu.h
  • XMC_SCU_DisablePrefetchUnit() : xmc1_scu.h
  • XMC_SCU_EnablePrefetchUnit() : xmc1_scu.h
  • XMC_SCU_GetMirrorStatus() : xmc_scu.h
  • XMC_SCU_GetTemperature() : xmc1_scu.h
  • XMC_SCU_HighTemperature() : xmc1_scu.h
  • XMC_SCU_INTERRUPT_ClearEventStatus() : xmc_scu.h
  • XMC_SCU_INTERRUPT_DisableEvent() : xmc_scu.h
  • XMC_SCU_INTERRUPT_EnableEvent() : xmc_scu.h
  • XMC_SCU_INTERRUPT_SetEventHandler() : xmc_scu.h
  • XMC_SCU_INTERRUPT_TriggerEvent() : xmc_scu.h
  • XMC_SCU_INTERUPT_GetEventStatus() : xmc_scu.h
  • XMC_SCU_IRQHandler() : xmc_scu.h
  • XMC_SCU_IsTempMeasurementDone() : xmc1_scu.h
  • XMC_SCU_LockProtectedBits() : xmc1_scu.h
  • XMC_SCU_LowTemperature() : xmc1_scu.h
  • XMC_SCU_POWER_DisableMonitor() : xmc1_scu.h
  • XMC_SCU_POWER_EnableMonitor() : xmc1_scu.h
  • XMC_SCU_RESET_AssertMasterReset() : xmc1_scu.h
  • XMC_SCU_RESET_ClearDeviceResetReason() : xmc_scu.h
  • XMC_SCU_RESET_EnableResetRequest() : xmc1_scu.h
  • XMC_SCU_RESET_GetDeviceResetReason() : xmc_scu.h
  • XMC_SCU_SetBMI() : xmc1_scu.h
  • XMC_SCU_SetCcuTriggerHigh() : xmc_scu.h
  • XMC_SCU_SetCcuTriggerLow() : xmc_scu.h
  • XMC_SCU_SetInterruptControl() : xmc1_scu.h
  • XMC_SCU_SetRawTempLimits() : xmc1_scu.h
  • XMC_SCU_SetTempHighLimit() : xmc1_scu.h
  • XMC_SCU_SetTempLowLimit() : xmc1_scu.h
  • XMC_SCU_StartTempMeasurement() : xmc1_scu.h
  • XMC_SCU_StopTempMeasurement() : xmc1_scu.h
  • XMC_SCU_SupplyMonitorInit() : xmc1_scu.h
  • XMC_SCU_UnlockProtectedBits() : xmc1_scu.h
  • XMC_SPI_CH_ClearStatusFlag() : xmc_spi.h
  • XMC_SPI_CH_ConfigExternalInputSignalToBRG() : xmc_spi.h
  • XMC_SPI_CH_ConfigureShiftClockOutput() : xmc_spi.h
  • XMC_SPI_CH_DisableDataTransmission() : xmc_spi.h
  • XMC_SPI_CH_DisableDelayCompensation() : xmc_spi.h
  • XMC_SPI_CH_DisableEOF() : xmc_spi.h
  • XMC_SPI_CH_DisableEvent() : xmc_spi.h
  • XMC_SPI_CH_DisableFEM() : xmc_spi.h
  • XMC_SPI_CH_DisableInputInversion() : xmc_spi.h
  • XMC_SPI_CH_DisableInterwordDelay() : xmc_spi.h
  • XMC_SPI_CH_DisableMasterClock() : xmc_spi.h
  • XMC_SPI_CH_DisableSlaveSelect() : xmc_spi.h
  • XMC_SPI_CH_DisableSlaveSelectCodedMode() : xmc_spi.h
  • XMC_SPI_CH_DisableSOF() : xmc_spi.h
  • XMC_SPI_CH_EnableDataTransmission() : xmc_spi.h
  • XMC_SPI_CH_EnableDelayCompensation() : xmc_spi.h
  • XMC_SPI_CH_EnableEOF() : xmc_spi.h
  • XMC_SPI_CH_EnableEvent() : xmc_spi.h
  • XMC_SPI_CH_EnableFEM() : xmc_spi.h
  • XMC_SPI_CH_EnableInputInversion() : xmc_spi.h
  • XMC_SPI_CH_EnableInterwordDelay() : xmc_spi.h
  • XMC_SPI_CH_EnableMasterClock() : xmc_spi.h
  • XMC_SPI_CH_EnableSlaveSelect() : xmc_spi.h
  • XMC_SPI_CH_EnableSlaveSelectCodedMode() : xmc_spi.h
  • XMC_SPI_CH_EnableSOF() : xmc_spi.h
  • XMC_SPI_CH_GetReceivedData() : xmc_spi.h
  • XMC_SPI_CH_GetStatusFlag() : xmc_spi.h
  • XMC_SPI_CH_Init() : xmc_spi.h
  • XMC_SPI_CH_Receive() : xmc_spi.h
  • XMC_SPI_CH_SelectInterruptNodePointer() : xmc_spi.h
  • XMC_SPI_CH_SetBaudrate() : xmc_spi.h
  • XMC_SPI_CH_SetBitOrderLsbFirst() : xmc_spi.h
  • XMC_SPI_CH_SetBitOrderMsbFirst() : xmc_spi.h
  • XMC_SPI_CH_SetFrameLength() : xmc_spi.h
  • XMC_SPI_CH_SetInputSource() : xmc_spi.h
  • XMC_SPI_CH_SetInterruptNodePointer() : xmc_spi.h
  • XMC_SPI_CH_SetInterwordDelay() : xmc_spi.h
  • XMC_SPI_CH_SetInterwordDelaySCLK() : xmc_spi.h
  • XMC_SPI_CH_SetSlaveSelectDelay() : xmc_spi.h
  • XMC_SPI_CH_SetSlaveSelectPolarity() : xmc_spi.h
  • XMC_SPI_CH_SetTransmitMode() : xmc_spi.h
  • XMC_SPI_CH_SetWordLength() : xmc_spi.h
  • XMC_SPI_CH_Start() : xmc_spi.h
  • XMC_SPI_CH_Stop() : xmc_spi.h
  • XMC_SPI_CH_Transmit() : xmc_spi.h
  • XMC_SPI_CH_TriggerServiceRequest() : xmc_spi.h
  • XMC_UART_CH_ClearStatusFlag() : xmc_uart.h
  • XMC_UART_CH_DisableDataTransmission() : xmc_uart.h
  • XMC_UART_CH_DisableEvent() : xmc_uart.h
  • XMC_UART_CH_DisableInputDigitalFilter() : xmc_uart.h
  • XMC_UART_CH_DisableInputInversion() : xmc_uart.h
  • XMC_UART_CH_DisableInputSync() : xmc_uart.h
  • XMC_UART_CH_EnableDataTransmission() : xmc_uart.h
  • XMC_UART_CH_EnableEvent() : xmc_uart.h
  • XMC_UART_CH_EnableInputDigitalFilter() : xmc_uart.h
  • XMC_UART_CH_EnableInputInversion() : xmc_uart.h
  • XMC_UART_CH_EnableInputSync() : xmc_uart.h
  • XMC_UART_CH_GetReceivedData() : xmc_uart.h
  • XMC_UART_CH_GetStatusFlag() : xmc_uart.h
  • XMC_UART_CH_Init() : xmc_uart.h
  • XMC_UART_CH_SelectInterruptNodePointer() : xmc_uart.h
  • XMC_UART_CH_SetBaudrate() : xmc_uart.h
  • XMC_UART_CH_SetFrameLength() : xmc_uart.h
  • XMC_UART_CH_SetInputSamplingFreq() : xmc_uart.h
  • XMC_UART_CH_SetInputSource() : xmc_uart.h
  • XMC_UART_CH_SetInterruptNodePointer() : xmc_uart.h
  • XMC_UART_CH_SetPulseLength() : xmc_uart.h
  • XMC_UART_CH_SetSamplePoint() : xmc_uart.h
  • XMC_UART_CH_SetWordLength() : xmc_uart.h
  • XMC_UART_CH_Start() : xmc_uart.h
  • XMC_UART_CH_Stop() : xmc_uart.h
  • XMC_UART_CH_Transmit() : xmc_uart.h
  • XMC_UART_CH_TriggerServiceRequest() : xmc_uart.h
  • XMC_USIC_CH_ConfigExternalInputSignalToBRG() : xmc_usic.h
  • XMC_USIC_CH_ConfigureShiftClockOutput() : xmc_usic.h
  • XMC_USIC_CH_ConnectInputDataShiftToDataInput() : xmc_usic.h
  • XMC_USIC_CH_ConnectInputDataShiftToPPP() : xmc_usic.h
  • XMC_USIC_CH_Disable() : xmc_usic.h
  • XMC_USIC_CH_DisableDelayCompensation() : xmc_usic.h
  • XMC_USIC_CH_DisableEvent() : xmc_usic.h
  • XMC_USIC_CH_DisableFrameLengthControl() : xmc_usic.h
  • XMC_USIC_CH_DisableInputDigitalFilter() : xmc_usic.h
  • XMC_USIC_CH_DisableInputInversion() : xmc_usic.h
  • XMC_USIC_CH_DisableInputSync() : xmc_usic.h
  • XMC_USIC_CH_DisableTBUFDataValidTrigger() : xmc_usic.h
  • XMC_USIC_CH_DisableTimeMeasurement() : xmc_usic.h
  • XMC_USIC_CH_Enable() : xmc_usic.h
  • XMC_USIC_CH_EnableDelayCompensation() : xmc_usic.h
  • XMC_USIC_CH_EnableEvent() : xmc_usic.h
  • XMC_USIC_CH_EnableFrameLengthControl() : xmc_usic.h
  • XMC_USIC_CH_EnableInputDigitalFilter() : xmc_usic.h
  • XMC_USIC_CH_EnableInputInversion() : xmc_usic.h
  • XMC_USIC_CH_EnableInputSync() : xmc_usic.h
  • XMC_USIC_CH_EnableTBUFDataValidTrigger() : xmc_usic.h
  • XMC_USIC_CH_EnableTimeMeasurement() : xmc_usic.h
  • XMC_USIC_CH_GetCaptureTimerValue() : xmc_usic.h
  • XMC_USIC_CH_GetReceiveBufferStatus() : xmc_usic.h
  • XMC_USIC_CH_GetTransmitBufferStatus() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_ClearEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_Configure() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_DisableEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EnableEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_Flush() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_GetData() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_GetEvent() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_GetLevel() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_IsEmpty() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_IsFull() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_SetInterruptNodePointer() : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit() : xmc_usic.h
  • XMC_USIC_CH_SetBaudrate() : xmc_usic.h
  • XMC_USIC_CH_SetBRGInputClockSource() : xmc_usic.h
  • XMC_USIC_CH_SetDataOutputMode() : xmc_usic.h
  • XMC_USIC_CH_SetFractionalDivider() : xmc_usic.h
  • XMC_USIC_CH_SetFrameLength() : xmc_usic.h
  • XMC_USIC_CH_SetInputSamplingFreq() : xmc_usic.h
  • XMC_USIC_CH_SetInputSource() : xmc_usic.h
  • XMC_USIC_CH_SetInputTriggerCombinationMode() : xmc_usic.h
  • XMC_USIC_CH_SetInterruptNodePointer() : xmc_usic.h
  • XMC_USIC_CH_SetMclkOutputPassiveLevel() : xmc_usic.h
  • XMC_USIC_CH_SetMode() : xmc_usic.h
  • XMC_USIC_CH_SetPassiveDataLevel() : xmc_usic.h
  • XMC_USIC_CH_SetShiftDirection() : xmc_usic.h
  • XMC_USIC_CH_SetStartTransmisionMode() : xmc_usic.h
  • XMC_USIC_CH_SetTransmitBufferStatus() : xmc_usic.h
  • XMC_USIC_CH_SetWordLength() : xmc_usic.h
  • XMC_USIC_CH_TriggerServiceRequest() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_ClearEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_Configure() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_DisableEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EnableEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_Flush() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_GetEvent() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_GetLevel() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_IsEmpty() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_IsFull() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_PutData() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_PutDataFLEMode() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_PutDataHPCMode() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_SetInterruptNodePointer() : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit() : xmc_usic.h
  • XMC_USIC_CH_WriteToTBUF() : xmc_usic.h
  • XMC_USIC_CH_WriteToTBUFTCI() : xmc_usic.h
  • XMC_USIC_Disable() : xmc_usic.h
  • XMC_USIC_Enable() : xmc_usic.h
  • XMC_USIC_IsChannelValid() : xmc_usic.h
  • XMC_USIC_IsModuleValid() : xmc_usic.h
  • XMC_VADC_GLOBAL_BackgndAddMultipleChannels() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgndRemoveMultipleChannels() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundAbortSequence() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundAddChannelToSequence() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundClearReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundDisableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundDisableEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundEnableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundEnableEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundGetReqSrcEventStatus() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundIsChannelPending() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundRemoveChannelFromSequence() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSelectGating() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSelectTrigger() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSetGatingMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundTriggerConversion() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BackgroundTriggerReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_BindGroupToEMux() : xmc_vadc.h
  • XMC_VADC_GLOBAL_ClearEvent() : xmc_vadc.h
  • XMC_VADC_GLOBAL_ClockInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableModule() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableModuleClock() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisablePostCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableSleepMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_DisableStartupCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnableModule() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnableModuleClock() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnablePostCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_EnableSleepMode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_GetCompareResult() : xmc_vadc.h
  • XMC_VADC_GLOBAL_GetDetailedResult() : xmc_vadc.h
  • XMC_VADC_GLOBAL_GetResult() : xmc_vadc.h
  • XMC_VADC_GLOBAL_Init() : xmc_vadc.h
  • XMC_VADC_GLOBAL_InputClassInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_ResultInit() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetBoundaries() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetCompareValue() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetIndividualBoundary() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SetResultEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_DisableSigmaDeltaLoop() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_EnableSigmaDeltaLoop() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_Init() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_IsConverterReady() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_SetAnalogReference() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_SetClockDivider() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_SetGainFactor() : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop() : xmc_vadc.h
  • XMC_VADC_GLOBAL_StartupCalibration() : xmc_vadc.h
  • XMC_VADC_GLOBAL_TriggerEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_AddResultToFifo() : xmc_vadc.h
  • XMC_VADC_GROUP_BackgroundDisableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_BackgroundEnableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelClearEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetAssertedEvents() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetInputClass() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetResultAlignment() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelGetResultRegister() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelInit() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelIsResultOutOfBounds() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetBoundarySelection() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetIclass() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetInputReference() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelSetResultRegister() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelTriggerEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ChannelTriggerEventGenCriteria() : xmc_vadc.h
  • XMC_VADC_GROUP_CheckSlaveReadiness() : xmc_vadc.h
  • XMC_VADC_GROUP_ClearResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_DisableChannelSyncRequest() : xmc_vadc.h
  • XMC_VADC_GROUP_DisableResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_EnableChannelSyncRequest() : xmc_vadc.h
  • XMC_VADC_GROUP_EnableResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ExternalMuxControlInit() : xmc_vadc.h
  • XMC_VADC_GROUP_GetAlias() : xmc_vadc.h
  • XMC_VADC_GROUP_GetAssertedResultEvents() : xmc_vadc.h
  • XMC_VADC_GROUP_GetDetailedResult() : xmc_vadc.h
  • XMC_VADC_GROUP_GetFastCompareResult() : xmc_vadc.h
  • XMC_VADC_GROUP_GetInputClass() : xmc_vadc.h
  • XMC_VADC_GROUP_GetResult() : xmc_vadc.h
  • XMC_VADC_GROUP_GetResultFifoHead() : xmc_vadc.h
  • XMC_VADC_GROUP_GetResultFifoTail() : xmc_vadc.h
  • XMC_VADC_GROUP_GetSyncReadySignal() : xmc_vadc.h
  • XMC_VADC_GROUP_IgnoreSlaveReadiness() : xmc_vadc.h
  • XMC_VADC_GROUP_Init() : xmc_vadc.h
  • XMC_VADC_GROUP_InputClassInit() : xmc_vadc.h
  • XMC_VADC_GROUP_IsConverterBusy() : xmc_vadc.h
  • XMC_VADC_GROUP_IsResultRegisterFifoHead() : xmc_vadc.h
  • XMC_VADC_GROUP_IsResultRegisterInFifo() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueAbortSequence() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueClearReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueDisableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueDisableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueEnableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueEnableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueFlushEntries() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetInterruptedChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetLength() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetNextChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueGetReqSrcEventStatus() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueInit() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueInsertChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueIsArbitrationSlotEnabled() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueRemoveChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSelectGating() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSelectTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSelectTriggerEdge() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSetGatingMode() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueTriggerConversion() : xmc_vadc.h
  • XMC_VADC_GROUP_QueueTriggerReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ResultInit() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanAddChannelToSequence() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanAddMultipleChannels() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanClearReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanDisableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableArbitrationSlot() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableContinuousMode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanEnableExternalTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanGetNumChannelsPending() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanGetReqSrcEventStatus() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanInit() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanIsArbitrationSlotEnabled() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanIsChannelPending() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanRemoveChannel() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSelectGating() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSelectTrigger() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSelectTriggerEdge() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSequenceAbort() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSetGatingMode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanTriggerConversion() : xmc_vadc.h
  • XMC_VADC_GROUP_ScanTriggerReqSrcEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_SetBoundaries() : xmc_vadc.h
  • XMC_VADC_GROUP_SetBoundaryEventInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_SetChannelAlias() : xmc_vadc.h
  • XMC_VADC_GROUP_SetIndividualBoundary() : xmc_vadc.h
  • XMC_VADC_GROUP_SetPowerMode() : xmc_vadc.h
  • XMC_VADC_GROUP_SetResultFastCompareValue() : xmc_vadc.h
  • XMC_VADC_GROUP_SetResultInterruptNode() : xmc_vadc.h
  • XMC_VADC_GROUP_SetResultSubtractionValue() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncMaster() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncReadySignal() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncSlave() : xmc_vadc.h
  • XMC_VADC_GROUP_SetSyncSlaveReadySignal() : xmc_vadc.h
  • XMC_VADC_GROUP_TriggerResultEvent() : xmc_vadc.h
  • XMC_VADC_GROUP_TriggerServiceRequest() : xmc_vadc.h
  • XMC_WDT_ClearAlarm() : xmc_wdt.h
  • XMC_WDT_Disable() : xmc_wdt.h
  • XMC_WDT_Enable() : xmc_wdt.h
  • XMC_WDT_GetCounter() : xmc_wdt.h
  • XMC_WDT_Init() : xmc_wdt.h
  • XMC_WDT_Service() : xmc_wdt.h
  • XMC_WDT_SetDebugMode() : xmc_wdt.h
  • XMC_WDT_SetMode() : xmc_wdt.h
  • XMC_WDT_SetServicePulseWidth() : xmc_wdt.h
  • XMC_WDT_SetWindowBounds() : xmc_wdt.h
  • XMC_WDT_Start() : xmc_wdt.h
  • XMC_WDT_Stop() : xmc_wdt.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • XMC_BCCU_CH_t : xmc_bccu.h
  • XMC_BCCU_DIM_t : xmc_bccu.h
  • XMC_BCCU_t : xmc_bccu.h
  • XMC_CAN_NODE_t : xmc_can.h
  • XMC_CAN_t : xmc_can.h
  • XMC_CCU4_MODULE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_INPUT_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_t : xmc_ccu4.h
  • XMC_CCU8_MODULE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_INPUT_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_t : xmc_ccu8.h
  • XMC_LEDTS_t : xmc_ledts.h
  • XMC_MATH_Q0_11_t : xmc_math.h
  • XMC_MATH_Q0_23_t : xmc_math.h
  • XMC_MATH_Q1_22_t : xmc_math.h
  • XMC_MATH_Q8_15_t : xmc_math.h
  • XMC_POSIF_t : xmc_posif.h
  • XMC_SCU_INTERRUPT_EVENT_HANDLER_t : xmc_scu.h
  • XMC_SCU_INTERRUPT_EVENT_t : xmc1_scu.h
  • XMC_USIC_t : xmc_usic.h
  • XMC_VADC_BACKGROUND_CONFIG_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_t : xmc_vadc.h
  • XMC_VADC_GROUP_t : xmc_vadc.h
  • XMC_VADC_RESULT_SIZE_t : xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • x

- x -

  • XMC_BCCU_BCLK_MODE_t : xmc_bccu.h
  • XMC_BCCU_CH_ACTIVE_LEVEL_t : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_t : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_SOURCE_t : xmc_bccu.h
  • XMC_BCCU_CH_FLICKER_WD_t : xmc_bccu.h
  • XMC_BCCU_CH_GATING_FUNC_t : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_EDGE_t : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_IN_t : xmc_bccu.h
  • XMC_BCCU_CH_TRIG_EDGE_t : xmc_bccu.h
  • XMC_BCCU_CH_TRIGOUT_t : xmc_bccu.h
  • XMC_BCCU_DIM_CURVE_t : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_t : xmc_bccu.h
  • XMC_BCCU_EVENT_t : xmc_bccu.h
  • XMC_BCCU_STATUS_t : xmc_bccu.h
  • XMC_BCCU_SUSPEND_MODE_t : xmc_bccu.h
  • XMC_BCCU_TRAP_LEVEL_t : xmc_bccu.h
  • XMC_BCCU_TRAP_STATUS_t : xmc_bccu.h
  • XMC_BCCU_TRAPEDGE_t : xmc_bccu.h
  • XMC_BCCU_TRIGDELAY_t : xmc_bccu.h
  • XMC_BCCU_TRIGMODE_t : xmc_bccu.h
  • XMC_CAN_ARBITRATION_MODE_t : xmc_can.h
  • XMC_CAN_CANCLKSRC_t : xmc_can.h
  • XMC_CAN_DM_t : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE_t : xmc_can.h
  • XMC_CAN_FRAME_TYPE_t : xmc_can.h
  • XMC_CAN_LOOKBACKMODE_t : xmc_can.h
  • XMC_CAN_MO_EVENT_t : xmc_can.h
  • XMC_CAN_MO_POINTER_EVENT_t : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_t : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_t : xmc_can.h
  • XMC_CAN_MO_STATUS_t : xmc_can.h
  • XMC_CAN_MO_TYPE_t : xmc_can.h
  • XMC_CAN_NODE_CONTROL_t : xmc_can.h
  • XMC_CAN_NODE_EVENT_t : xmc_can.h
  • XMC_CAN_NODE_INTERRUPT_TRIGGER_t : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_DIR_t : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_INC_t : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_t : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_t : xmc_can.h
  • XMC_CAN_NODE_STATUS_t : xmc_can.h
  • XMC_CAN_PANCMD_t : xmc_can.h
  • XMC_CAN_STATUS_t : xmc_can.h
  • XMC_CCU4_CLOCK_t : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_t : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_CAP_REG_SET_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODULATION_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_START_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_DIR_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_TRAP_EXIT_MODE_t : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_t : xmc_ccu4.h
  • XMC_CCU4_STATUS_t : xmc_ccu4.h
  • XMC_CCU8_CLOCK_t : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_t : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_t : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_CAP_REG_SET_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_COMPARE_CHANNEL_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_START_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_DIR_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SLICE_TRAP_EXIT_MODE_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_t : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_t : xmc_ccu8.h
  • XMC_CCU8_STATUS_t : xmc_ccu8.h
  • XMC_ERU_ETL_EDGE_DETECTION_t : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A_t : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B_t : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_t : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_t : xmc_eru.h
  • XMC_ERU_ETL_STATUS_FLAG_MODE_t : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_t : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER_t : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_t : xmc_eru.h
  • XMC_FLASH_EVENT_t : xmc1_flash.h
  • XMC_FLASH_HARDREAD_LEVEL_t : xmc1_flash.h
  • XMC_FLASH_STATUS_t : xmc1_flash.h
  • XMC_GPIO_HWCTRL_t : xmc_gpio.h
  • XMC_GPIO_INPUT_HYSTERESIS_t : xmc1_gpio.h
  • XMC_GPIO_MODE_t : xmc1_gpio.h
  • XMC_GPIO_OUTPUT_LEVEL_t : xmc_gpio.h
  • XMC_I2C_CH_CMD_t : xmc_i2c.h
  • XMC_I2C_CH_EVENT_t : xmc_i2c.h
  • XMC_I2C_CH_INPUT_t : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_t : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_t : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_t : xmc_i2c.h
  • XMC_I2C_CH_STATUS_t : xmc_i2c.h
  • XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_t : xmc_i2s.h
  • XMC_I2S_CH_BUS_MODE_t : xmc_i2s.h
  • XMC_I2S_CH_CHANNEL_t : xmc_i2s.h
  • XMC_I2S_CH_EVENT_t : xmc_i2s.h
  • XMC_I2S_CH_INPUT_t : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_t : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_t : xmc_i2s.h
  • XMC_I2S_CH_STATUS_t : xmc_i2s.h
  • XMC_I2S_CH_WA_POLARITY_t : xmc_i2s.h
  • XMC_LEDTS_ACCUMULATION_COUNT_t : xmc_ledts.h
  • XMC_LEDTS_ACTIVE_LEVEL_LED_COL_t : xmc_ledts.h
  • XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_t : xmc_ledts.h
  • XMC_LEDTS_CLOCK_TYPE_t : xmc_ledts.h
  • XMC_LEDTS_COMMON_COMPARE_t : xmc_ledts.h
  • XMC_LEDTS_EXT_PULLUP_COLA_t : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_t : xmc_ledts.h
  • XMC_LEDTS_FLAG_STATUS_t : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_t : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_t : xmc_ledts.h
  • XMC_LEDTS_LED_FUNC_t : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_t : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_t : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_SW_CONTROL_t : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_t : xmc_ledts.h
  • XMC_LEDTS_STATUS_t : xmc_ledts.h
  • XMC_LEDTS_SUSPEND_t : xmc_ledts.h
  • XMC_LEDTS_TF_INTERRUPT_FLAG_t : xmc_ledts.h
  • XMC_LEDTS_TF_VALIDATION_t : xmc_ledts.h
  • XMC_LEDTS_TP_SYNC_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_AUTO_RESET_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_t : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_SATURATION_t : xmc_ledts.h
  • XMC_LEDTS_TS_FUNC_t : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_t : xmc_ledts.h
  • XMC_LEDTS_TS_INTERRUPT_FLAG_t : xmc_ledts.h
  • XMC_MATH_CORDIC_CORDXRC_t : xmc_math.h
  • XMC_MATH_CORDIC_CORDYRC_t : xmc_math.h
  • XMC_MATH_CORDIC_CORDZRC_t : xmc_math.h
  • XMC_MATH_CORDIC_MAGNITUDE_t : xmc_math.h
  • XMC_MATH_CORDIC_OPERATING_MODE_t : xmc_math.h
  • XMC_MATH_CORDIC_ROTVEC_MODE_t : xmc_math.h
  • XMC_MATH_DIV_DVDRC_t : xmc_math.h
  • XMC_MATH_DIV_DVSRC_t : xmc_math.h
  • XMC_MATH_EVENT_t : xmc_math.h
  • XMC_PAU_PERIPHERAL_t : xmc_pau.h
  • XMC_PAU_STATUS_t : xmc_pau.h
  • XMC_POSIF_FILTER_t : xmc_posif.h
  • XMC_POSIF_HSC_TRIGGER_EDGE_t : xmc_posif.h
  • XMC_POSIF_INPUT_ACTIVE_LEVEL_t : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_t : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_t : xmc_posif.h
  • XMC_POSIF_MODE_t : xmc_posif.h
  • XMC_POSIF_QD_DIR_t : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_t : xmc_posif.h
  • XMC_POSIF_QD_MODE_t : xmc_posif.h
  • XMC_POSIF_SR_ID_t : xmc_posif.h
  • XMC_POSIF_STATUS_t : xmc_posif.h
  • XMC_PRNG_DATA_BLOCK_SIZE_t : xmc_prng.h
  • XMC_PRNG_INIT_STATUS_t : xmc_prng.h
  • XMC_PRNG_KEY_LOAD_OP_MODE_t : xmc_prng.h
  • XMC_RTC_DEBUG_MODE_t : xmc1_rtc.h
  • XMC_RTC_EVENT_t : xmc_rtc.h
  • XMC_RTC_MONTH_t : xmc_rtc.h
  • XMC_RTC_STATUS_t : xmc_rtc.h
  • XMC_RTC_WEEKDAY_t : xmc_rtc.h
  • XMC_SCU_CCU_TRIGGER_t : xmc1_scu.h
  • XMC_SCU_CLOCK_DCLKSRC_t : xmc1_scu.h
  • XMC_SCU_CLOCK_OSCHP_MODE_t : xmc1_scu.h
  • XMC_SCU_CLOCK_OSCLP_MODE_t : xmc1_scu.h
  • XMC_SCU_CLOCK_PCLKSRC_t : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_t : xmc1_scu.h
  • XMC_SCU_CLOCK_SYNC_CLKSRC_t : xmc1_scu.h
  • XMC_SCU_IRQCTRL_t : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_t : xmc1_scu.h
  • XMC_SCU_POWER_MONITOR_DELAY_t : xmc1_scu.h
  • XMC_SCU_POWER_MONITOR_RANGE_t : xmc1_scu.h
  • XMC_SCU_RESET_REASON_t : xmc1_scu.h
  • XMC_SCU_STATUS_t : xmc_scu.h
  • XMC_SCU_SYSTEM_RESET_REQUEST_t : xmc1_scu.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_t : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t : xmc_spi.h
  • XMC_SPI_CH_BUS_MODE_t : xmc_spi.h
  • XMC_SPI_CH_DATA_POLARITY_t : xmc_spi.h
  • XMC_SPI_CH_EVENT_t : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_t : xmc_spi.h
  • XMC_SPI_CH_INPUT_t : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_t : xmc_spi.h
  • XMC_SPI_CH_MODE_t : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SEL_MSLS_INV_t : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_t : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_t : xmc_spi.h
  • XMC_SPI_CH_STATUS_t : xmc_spi.h
  • XMC_UART_CH_EVENT_t : xmc_uart.h
  • XMC_UART_CH_INPUT_SAMPLING_FREQ_t : xmc_uart.h
  • XMC_UART_CH_INPUT_t : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_t : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_t : xmc_uart.h
  • XMC_UART_CH_STATUS_t : xmc_uart.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_t : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_SOURCE_t : xmc_usic.h
  • XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_t : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_t : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_t : xmc_usic.h
  • XMC_USIC_CH_DATA_OUTPUT_MODE_t : xmc_usic.h
  • XMC_USIC_CH_EVENT_t : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_t : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_t : xmc_usic.h
  • XMC_USIC_CH_INPUT_SAMPLING_FREQ_t : xmc_usic.h
  • XMC_USIC_CH_INPUT_t : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_t : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_t : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_t : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_t : xmc_usic.h
  • XMC_USIC_CH_PASSIVE_DATA_LEVEL_t : xmc_usic.h
  • XMC_USIC_CH_RBUF_STATUS_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_t : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_t : xmc_usic.h
  • XMC_USIC_CH_SHIFT_DIRECTION_t : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_MODE_t : xmc_usic.h
  • XMC_USIC_CH_STATUS_t : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_SET_t : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_t : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_CONF_t : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_t : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_t : xmc_usic.h
  • XMC_VADC_BOUNDARY_NODE_t : xmc_vadc.h
  • XMC_VADC_BOUNDARY_SELECT_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_ALIAS_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_CONDITION_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_BWDCH_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_t : xmc_vadc.h
  • XMC_VADC_CHANNEL_REF_t : xmc_vadc.h
  • XMC_VADC_CONVMODE_t : xmc_vadc.h
  • XMC_VADC_DMM_t : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_t : xmc_vadc.h
  • XMC_VADC_GATE_INPUT_SELECT_t : xmc_vadc.h
  • XMC_VADC_GATEMODE_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_EVENT_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_AREF_t : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_CALIBRATION_ORDER_t : xmc_vadc.h
  • XMC_VADC_GROUP_ARBMODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_CONV_t : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXCODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_INDEX_t : xmc_vadc.h
  • XMC_VADC_GROUP_IRQ_t : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_t : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_t : xmc_vadc.h
  • XMC_VADC_GROUP_STATE_t : xmc_vadc.h
  • XMC_VADC_RESULT_ALIGN_t : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_t : xmc_vadc.h
  • XMC_VADC_SCAN_LOAD_t : xmc_vadc.h
  • XMC_VADC_SCAN_TYPE_t : xmc_vadc.h
  • XMC_VADC_SHS_LOOP_CH_t : xmc_vadc.h
  • XMC_VADC_SR_t : xmc_vadc.h
  • XMC_VADC_STARTMODE_t : xmc_vadc.h
  • XMC_VADC_STATUS_t : xmc_vadc.h
  • XMC_VADC_SYNCTR_EVAL_t : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_t : xmc_vadc.h
  • XMC_VADC_TRIGGER_INPUT_SELECT_t : xmc_vadc.h
  • XMC_WDT_DEBUG_MODE_t : xmc_wdt.h
  • XMC_WDT_MODE_t : xmc_wdt.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • x

- x -

  • XMC_BCCU_BCLK_MODE_FAST : xmc_bccu.h
  • XMC_BCCU_BCLK_MODE_NORMAL : xmc_bccu.h
  • XMC_BCCU_CH_ACTIVE_LEVEL_HIGH : xmc_bccu.h
  • XMC_BCCU_CH_ACTIVE_LEVEL_LOW : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_DISABLE : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_ENABLE : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_SOURCE_DE0 : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_SOURCE_DE1 : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_SOURCE_DE2 : xmc_bccu.h
  • XMC_BCCU_CH_DIMMING_SOURCE_GLOBAL : xmc_bccu.h
  • XMC_BCCU_CH_FLICKER_WD_DS : xmc_bccu.h
  • XMC_BCCU_CH_FLICKER_WD_EN : xmc_bccu.h
  • XMC_BCCU_CH_GATING_FUNC_DISABLE : xmc_bccu.h
  • XMC_BCCU_CH_GATING_FUNC_ENABLE : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_EDGE_FALLING : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_EDGE_RISING : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INA : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INB : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INC : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_IND : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INE : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INF : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_ING : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INH : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INI : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INJ : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INK : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INL : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INM : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INN : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INO : xmc_bccu.h
  • XMC_BCCU_CH_TRAP_INP : xmc_bccu.h
  • XMC_BCCU_CH_TRIG_EDGE_ACT_TO_PASS : xmc_bccu.h
  • XMC_BCCU_CH_TRIG_EDGE_PASS_TO_ACT : xmc_bccu.h
  • XMC_BCCU_CH_TRIGOUT0 : xmc_bccu.h
  • XMC_BCCU_CH_TRIGOUT1 : xmc_bccu.h
  • XMC_BCCU_DIM_CURVE_COARSE : xmc_bccu.h
  • XMC_BCCU_DIM_CURVE_FINE : xmc_bccu.h
  • XMC_BCCU_EVENT_FIFOEMPTY : xmc_bccu.h
  • XMC_BCCU_EVENT_FIFOFULL : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_FIFOEMPTY : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_FIFOFULL : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_TRAP : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_TRAP_STATE : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_TRIGGER0 : xmc_bccu.h
  • XMC_BCCU_EVENT_STATUS_TRIGGER1 : xmc_bccu.h
  • XMC_BCCU_EVENT_TRAP : xmc_bccu.h
  • XMC_BCCU_EVENT_TRIGGER0 : xmc_bccu.h
  • XMC_BCCU_EVENT_TRIGGER1 : xmc_bccu.h
  • XMC_BCCU_STATUS_ERROR : xmc_bccu.h
  • XMC_BCCU_STATUS_SUCCESS : xmc_bccu.h
  • XMC_BCCU_SUSPEND_MODE_FREEZE : xmc_bccu.h
  • XMC_BCCU_SUSPEND_MODE_IGNORE : xmc_bccu.h
  • XMC_BCCU_SUSPEND_MODE_SAFE_FREEZE : xmc_bccu.h
  • XMC_BCCU_TRAP_LEVEL_HIGH : xmc_bccu.h
  • XMC_BCCU_TRAP_LEVEL_LOW : xmc_bccu.h
  • XMC_BCCU_TRAP_STATUS_ACTIVE : xmc_bccu.h
  • XMC_BCCU_TRAP_STATUS_DEACTIVE : xmc_bccu.h
  • XMC_BCCU_TRAPEDGE_FALLING : xmc_bccu.h
  • XMC_BCCU_TRAPEDGE_RISING : xmc_bccu.h
  • XMC_BCCU_TRIGDELAY_HALF_BIT : xmc_bccu.h
  • XMC_BCCU_TRIGDELAY_NO_DELAY : xmc_bccu.h
  • XMC_BCCU_TRIGDELAY_QUARTER_BIT : xmc_bccu.h
  • XMC_BCCU_TRIGMODE0 : xmc_bccu.h
  • XMC_BCCU_TRIGMODE1 : xmc_bccu.h
  • XMC_CAN_ARBITRATION_MODE_IDE_DIR_BASED_PRIO_2 : xmc_can.h
  • XMC_CAN_ARBITRATION_MODE_ORDER_BASED_PRIO_1 : xmc_can.h
  • XMC_CAN_ARBITRATION_MODE_ORDER_BASED_PRIO_3 : xmc_can.h
  • XMC_CAN_DM_FRACTIONAL : xmc_can.h
  • XMC_CAN_DM_NORMAL : xmc_can.h
  • XMC_CAN_DM_OFF : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE_BIT_TIMING : xmc_can.h
  • XMC_CAN_FRAME_COUNT_MODE_TIME_STAMP : xmc_can.h
  • XMC_CAN_FRAME_TYPE_EXTENDED_29BITS : xmc_can.h
  • XMC_CAN_FRAME_TYPE_STANDARD_11BITS : xmc_can.h
  • XMC_CAN_LOOKBACKMODE_DISABLED : xmc_can.h
  • XMC_CAN_LOOKBACKMODE_ENABLED : xmc_can.h
  • XMC_CAN_MO_EVENT_OVERFLOW : xmc_can.h
  • XMC_CAN_MO_EVENT_RECEIVE : xmc_can.h
  • XMC_CAN_MO_EVENT_TRANSMIT : xmc_can.h
  • XMC_CAN_MO_POINTER_EVENT_RECEIVE : xmc_can.h
  • XMC_CAN_MO_POINTER_EVENT_TRANSMIT : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_MESSAGE_DIRECTION : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_MESSAGE_LOST : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_MESSAGE_VALID : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_NEW_DATA : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_ENABLE : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_PENDING : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_TX_SELECTED : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_RX_UPDATING : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_ENABLE0 : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_ENABLE1 : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_PENDING : xmc_can.h
  • XMC_CAN_MO_RESET_STATUS_TX_REQUEST : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_MESSAGE_DIRECTION : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_MESSAGE_LOST : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_MESSAGE_VALID : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_NEW_DATA : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_ENABLE : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_PENDING : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_TX_SELECTED : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_RX_UPDATING : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_ENABLE0 : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_ENABLE1 : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_PENDING : xmc_can.h
  • XMC_CAN_MO_SET_STATUS_TX_REQUEST : xmc_can.h
  • XMC_CAN_MO_STATUS_LIST : xmc_can.h
  • XMC_CAN_MO_STATUS_MESSAGE_DIRECTION : xmc_can.h
  • XMC_CAN_MO_STATUS_MESSAGE_LOST : xmc_can.h
  • XMC_CAN_MO_STATUS_MESSAGE_VALID : xmc_can.h
  • XMC_CAN_MO_STATUS_NEW_DATA : xmc_can.h
  • XMC_CAN_MO_STATUS_POINTER_TO_NEXT_MO : xmc_can.h
  • XMC_CAN_MO_STATUS_POINTER_TO_PREVIOUS_MO : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_ENABLE : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_PENDING : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_TX_SELECTED : xmc_can.h
  • XMC_CAN_MO_STATUS_RX_UPDATING : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_ENABLE0 : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_ENABLE1 : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_PENDING : xmc_can.h
  • XMC_CAN_MO_STATUS_TX_REQUEST : xmc_can.h
  • XMC_CAN_MO_TYPE_RECMSGOBJ : xmc_can.h
  • XMC_CAN_MO_TYPE_TRANSMSGOBJ : xmc_can.h
  • XMC_CAN_NODE_CONTROL_ALERT_INT_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_CAN_ANALYZER_NODEDE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_CAN_DISABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_CONF_CHANGE_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_LEC_INT_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_NODE_INIT : xmc_can.h
  • XMC_CAN_NODE_CONTROL_SUSPENDED_ENABLE : xmc_can.h
  • XMC_CAN_NODE_CONTROL_TX_INT_ENABLE : xmc_can.h
  • XMC_CAN_NODE_EVENT_ALERT : xmc_can.h
  • XMC_CAN_NODE_EVENT_CFCIE : xmc_can.h
  • XMC_CAN_NODE_EVENT_LEC : xmc_can.h
  • XMC_CAN_NODE_EVENT_TX_INT : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_DIR_WHILE_NODE_RECEPCION : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_DIR_WHILE_NODE_TRANSMISSION : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_INC_1 : xmc_can.h
  • XMC_CAN_NODE_LAST_ERROR_INC_8 : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_ALERT : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_FRAME_COUNTER : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_LEC : xmc_can.h
  • XMC_CAN_NODE_POINTER_EVENT_TRANSFER_OK : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCA : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCB : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCC : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCD : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCE : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCF : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCG : xmc_can.h
  • XMC_CAN_NODE_RECEIVE_INPUT_RXDCH : xmc_can.h
  • XMC_CAN_NODE_STATUS_ALERT_WARNING : xmc_can.h
  • XMC_CAN_NODE_STATUS_BUS_OFF : xmc_can.h
  • XMC_CAN_NODE_STATUS_ERROR_WARNING_STATUS : xmc_can.h
  • XMC_CAN_NODE_STATUS_LAST_ERROR_CODE : xmc_can.h
  • XMC_CAN_NODE_STATUS_LIST_LENGTH_ERROR : xmc_can.h
  • XMC_CAN_NODE_STATUS_LIST_OBJECT_ERROR : xmc_can.h
  • XMC_CAN_NODE_STATUS_RX_OK : xmc_can.h
  • XMC_CAN_NODE_STATUS_SUSPENDED_ACK : xmc_can.h
  • XMC_CAN_NODE_STATUS_TX_OK : xmc_can.h
  • XMC_CAN_PANCMD_DYNAMIC_ALLOCATE : xmc_can.h
  • XMC_CAN_PANCMD_DYNAMIC_INSERT_BEFORE : xmc_can.h
  • XMC_CAN_PANCMD_DYNAMIC_INSERT_BEHIND : xmc_can.h
  • XMC_CAN_PANCMD_INIT_LIST : xmc_can.h
  • XMC_CAN_PANCMD_STATIC_ALLOCATE : xmc_can.h
  • XMC_CAN_PANCMD_STATIC_INSERT_BEFORE : xmc_can.h
  • XMC_CAN_PANCMD_STATIC_INSERT_BEHIND : xmc_can.h
  • XMC_CAN_STATUS_BUSY : xmc_can.h
  • XMC_CAN_STATUS_ERROR : xmc_can.h
  • XMC_CAN_STATUS_MO_DISABLED : xmc_can.h
  • XMC_CAN_STATUS_MO_NOT_ACCEPTABLE : xmc_can.h
  • XMC_CAN_STATUS_SUCCESS : xmc_can.h
  • XMC_CCU4_CLOCK_EXTERNAL_A : xmc_ccu4.h
  • XMC_CCU4_CLOCK_EXTERNAL_B : xmc_ccu4.h
  • XMC_CCU4_CLOCK_EXTERNAL_C : xmc_ccu4.h
  • XMC_CCU4_CLOCK_SCU : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE0 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE1 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE2 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE3 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE0 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE1 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE2 : xmc_ccu4.h
  • XMC_CCU4_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE3 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_DITHER_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_PRESCALER_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SHADOW_TRANSFER_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_COMPARE_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_DITHER_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_FLOATING_PRESCALER_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PASSIVE_LEVEL : xmc_ccu4.h
  • XMC_CCU4_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PERIOD_SHADOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_CAP_REG_SET_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_CAP_REG_SET_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_TIMER_CLEAR : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_TIMER_STOP : xmc_ccu4.h
  • XMC_CCU4_SLICE_END_MODE_TIMER_STOP_CLEAR : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_NONE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_3_CYCLES : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_5_CYCLES : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_7_CYCLES : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_FILTER_DISABLED : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_EVENT_NONE : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_CAPTURE_EVENT0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_CAPTURE_EVENT1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_COUNT : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_DIRECTION : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_GATING : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_LOAD : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_MODULATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_OVERRIDE : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_START : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_STOP : xmc_ccu4.h
  • XMC_CCU4_SLICE_FUNCTION_TRAP : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_COMPARE_MATCH_DOWN : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_COMPARE_MATCH_UP : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_EVENT0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_EVENT1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_EVENT2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_PERIOD_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_IRQ_ID_TRAP : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MASK_SLICE_3 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP : xmc_ccu4.h
  • XMC_CCU4_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODE_CAPTURE : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODE_COMPARE : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODULATION_MODE_CLEAR_OUT : xmc_ccu4.h
  • XMC_CCU4_SLICE_MODULATION_MODE_CLEAR_ST_OUT : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_MULTI_IRQ_ID_PERIOD_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_1024 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_128 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_16 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_16384 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_2048 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_256 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_32 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_32768 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_4 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_4096 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_512 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_64 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_8 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_8192 : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_MODE_FLOAT : xmc_ccu4.h
  • XMC_CCU4_SLICE_PRESCALER_MODE_NORMAL : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_IN_PERIOD_MATCH_AND_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_ONE_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_PERIOD_MATCH : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_0 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_1 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_2 : xmc_ccu4.h
  • XMC_CCU4_SLICE_SR_ID_3 : xmc_ccu4.h
  • XMC_CCU4_SLICE_START_MODE_TIMER_START : xmc_ccu4.h
  • XMC_CCU4_SLICE_START_MODE_TIMER_START_CLEAR : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_ALWAYS : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_CAP_HIGH : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_CAP_LOW : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_CLEAR_MODE_NEVER : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_DIR_DOWN : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_DIR_UP : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_MODE_CA : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_COUNT_MODE_EA : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_REPEAT_MODE_REPEAT : xmc_ccu4.h
  • XMC_CCU4_SLICE_TIMER_REPEAT_MODE_SINGLE : xmc_ccu4.h
  • XMC_CCU4_SLICE_TRAP_EXIT_MODE_AUTOMATIC : xmc_ccu4.h
  • XMC_CCU4_SLICE_TRAP_EXIT_MODE_SW : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_COMPARE_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_DITHER_VALUE_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_FLOATING_PRESCALER_VALUE_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_PASSIVE_LEVEL_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_SLICE_WRITE_INTO_PERIOD_CONFIGURATION : xmc_ccu4.h
  • XMC_CCU4_STATUS_ERROR : xmc_ccu4.h
  • XMC_CCU4_STATUS_IDLE : xmc_ccu4.h
  • XMC_CCU4_STATUS_OK : xmc_ccu4.h
  • XMC_CCU4_STATUS_RUNNING : xmc_ccu4.h
  • XMC_CCU8_CLOCK_EXTERNAL_A : xmc_ccu8.h
  • XMC_CCU8_CLOCK_EXTERNAL_B : xmc_ccu8.h
  • XMC_CCU8_CLOCK_EXTERNAL_C : xmc_ccu8.h
  • XMC_CCU8_CLOCK_SCU : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE0 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE1 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE2 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE3 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE0 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE1 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE2 : xmc_ccu8.h
  • XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE3 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT0_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT0_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT1_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT1_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT2_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT2_ST2 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT3_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_OUT_PATH_OUT3_ST2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SHADOW_TRANSFER_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_CAP_REG_SET_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_CAP_REG_SET_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_COMPARE_CHANNEL_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_COMPARE_CHANNEL_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_4 : xmc_ccu8.h
  • XMC_CCU8_SLICE_DTC_DIV_8 : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_TIMER_CLEAR : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_TIMER_STOP : xmc_ccu8.h
  • XMC_CCU8_SLICE_END_MODE_TIMER_STOP_CLEAR : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_NONE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_3_CYCLES : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_5_CYCLES : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_7_CYCLES : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_FILTER_DISABLED : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_EVENT_NONE : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_COUNT : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_DIRECTION : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_GATING : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_LOAD : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_MODULATION : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_OVERRIDE : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_START : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_STOP : xmc_ccu8.h
  • XMC_CCU8_SLICE_FUNCTION_TRAP : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_EVENT0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_EVENT1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_EVENT2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_PERIOD_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_IRQ_ID_TRAP : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MASK_SLICE_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP : xmc_ccu8.h
  • XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODE_CAPTURE : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODE_COMPARE : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_1_AND_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_CHANNEL_NONE : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_OUT : xmc_ccu8.h
  • XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_ST_OUT : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_MULTI_IRQ_ID_PERIOD_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_1024 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_128 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_16 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_16384 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_2048 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_256 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_32 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_32768 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_4 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_4096 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_512 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_64 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_8 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_8192 : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_MODE_FLOAT : xmc_ccu8.h
  • XMC_CCU8_SLICE_PRESCALER_MODE_NORMAL : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_IN_PERIOD_MATCH_AND_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_ONE_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_PERIOD_MATCH : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_0 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_SR_ID_3 : xmc_ccu8.h
  • XMC_CCU8_SLICE_START_MODE_TIMER_START : xmc_ccu8.h
  • XMC_CCU8_SLICE_START_MODE_TIMER_START_CLEAR : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_1 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_1_AND_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_1_OR_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_STATUS_CHANNEL_2 : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_ALWAYS : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_HIGH : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_LOW : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_CLEAR_MODE_NEVER : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_DIR_DOWN : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_DIR_UP : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_MODE_CA : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_COUNT_MODE_EA : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_REPEAT_MODE_REPEAT : xmc_ccu8.h
  • XMC_CCU8_SLICE_TIMER_REPEAT_MODE_SINGLE : xmc_ccu8.h
  • XMC_CCU8_SLICE_TRAP_EXIT_MODE_AUTOMATIC : xmc_ccu8.h
  • XMC_CCU8_SLICE_TRAP_EXIT_MODE_SW : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT0_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT1_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT2_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_INV_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_INV_ST2 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_ST1 : xmc_ccu8.h
  • XMC_CCU8_SOURCE_OUT3_ST2 : xmc_ccu8.h
  • XMC_CCU8_STATUS_ERROR : xmc_ccu8.h
  • XMC_CCU8_STATUS_IDLE : xmc_ccu8.h
  • XMC_CCU8_STATUS_OK : xmc_ccu8.h
  • XMC_CCU8_STATUS_RUNNING : xmc_ccu8.h
  • XMC_ERU_ETL_EDGE_DETECTION_BOTH : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_DISABLED : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_FALLING : xmc_eru.h
  • XMC_ERU_ETL_EDGE_DETECTION_RISING : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A0 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A1 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A2 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_A3 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B0 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B1 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B2 : xmc_eru.h
  • XMC_ERU_ETL_INPUT_B3 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL0 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL1 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL2 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL3 : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_DISABLED : xmc_eru.h
  • XMC_ERU_ETL_OUTPUT_TRIGGER_ENABLED : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_AND_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_AND_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_OR_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_A_OR_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_AND_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_AND_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_OR_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_A_OR_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_SOURCE_NOT_B : xmc_eru.h
  • XMC_ERU_ETL_STATUS_FLAG_MODE_HWCTRL : xmc_eru.h
  • XMC_ERU_ETL_STATUS_FLAG_MODE_SWCTRL : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_DISABLED : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_ENABLED : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT0 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT1 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT2 : xmc_eru.h
  • XMC_ERU_OGU_PATTERN_DETECTION_INPUT3 : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER1 : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER2 : xmc_eru.h
  • XMC_ERU_OGU_PERIPHERAL_TRIGGER3 : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_DISABLED : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MATCH : xmc_eru.h
  • XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MISMATCH : xmc_eru.h
  • XMC_FLASH_EVENT_READY : xmc1_flash.h
  • XMC_FLASH_HARDREAD_LEVEL_ERASED : xmc1_flash.h
  • XMC_FLASH_HARDREAD_LEVEL_NORMAL : xmc1_flash.h
  • XMC_FLASH_HARDREAD_LEVEL_WRITTEN : xmc1_flash.h
  • XMC_FLASH_STATUS_BUSY : xmc1_flash.h
  • XMC_FLASH_STATUS_ECC1_READ_ERROR : xmc1_flash.h
  • XMC_FLASH_STATUS_ECC2_READ_ERROR : xmc1_flash.h
  • XMC_FLASH_STATUS_OK : xmc1_flash.h
  • XMC_FLASH_STATUS_SLEEP_MODE : xmc1_flash.h
  • XMC_FLASH_STATUS_VERIFY_ERROR : xmc1_flash.h
  • XMC_FLASH_STATUS_WRITE_PROTOCOL_ERROR : xmc1_flash.h
  • XMC_GPIO_HWCTRL_DISABLED : xmc_gpio.h
  • XMC_GPIO_HWCTRL_PERIPHERAL1 : xmc_gpio.h
  • XMC_GPIO_HWCTRL_PERIPHERAL2 : xmc_gpio.h
  • XMC_GPIO_INPUT_HYSTERESIS_LARGE : xmc1_gpio.h
  • XMC_GPIO_INPUT_HYSTERESIS_STANDARD : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_PULL_DOWN : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_PULL_UP : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_SAMPLING : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_INVERTED_TRISTATE : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_PULL_DOWN : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_PULL_UP : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_SAMPLING : xmc1_gpio.h
  • XMC_GPIO_MODE_INPUT_TRISTATE : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT1 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT2 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT3 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT4 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT5 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT6 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT7 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT3 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT5 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT6 : xmc1_gpio.h
  • XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT7 : xmc1_gpio.h
  • XMC_GPIO_OUTPUT_LEVEL_HIGH : xmc_gpio.h
  • XMC_GPIO_OUTPUT_LEVEL_LOW : xmc_gpio.h
  • XMC_I2C_CH_CMD_READ : xmc_i2c.h
  • XMC_I2C_CH_CMD_WRITE : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ACK : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ARBITRATION_LOST : xmc_i2c.h
  • XMC_I2C_CH_EVENT_BAUD_RATE_GENERATOR : xmc_i2c.h
  • XMC_I2C_CH_EVENT_DATA_LOST : xmc_i2c.h
  • XMC_I2C_CH_EVENT_ERROR : xmc_i2c.h
  • XMC_I2C_CH_EVENT_NACK : xmc_i2c.h
  • XMC_I2C_CH_EVENT_RECEIVE_START : xmc_i2c.h
  • XMC_I2C_CH_EVENT_REPEATED_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_EVENT_SLAVE_READ_REQUEST : xmc_i2c.h
  • XMC_I2C_CH_EVENT_STANDARD_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_EVENT_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_EVENT_STOP_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_EVENT_TRANSMIT_BUFFER : xmc_i2c.h
  • XMC_I2C_CH_EVENT_TRANSMIT_SHIFT : xmc_i2c.h
  • XMC_I2C_CH_INPUT_SCL : xmc_i2c.h
  • XMC_I2C_CH_INPUT_SDA : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_i2c.h
  • XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_ACK : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_ADR : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_ERR : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_FIN : xmc_i2c.h
  • XMC_I2C_CH_RECEIVER_STATUS_FLAG_MODE : xmc_i2c.h
  • XMC_I2C_CH_STATUS_BUSY : xmc_i2c.h
  • XMC_I2C_CH_STATUS_ERROR : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ACK_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ARBITRATION_LOST : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_ERROR : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_NACK_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_REPEATED_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_SLAVE_READ_REQUESTED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_SLAVE_SELECT : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_START_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_STOP_CONDITION_RECEIVED : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_i2c.h
  • XMC_I2C_CH_STATUS_FLAG_WRONG_TDF_CODE_FOUND : xmc_i2c.h
  • XMC_I2C_CH_STATUS_OK : xmc_i2c.h
  • XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 : xmc_i2s.h
  • XMC_I2S_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK : xmc_i2s.h
  • XMC_I2S_CH_BUS_MODE_MASTER : xmc_i2s.h
  • XMC_I2S_CH_BUS_MODE_SLAVE : xmc_i2s.h
  • XMC_I2S_CH_CHANNEL_1_LEFT : xmc_i2s.h
  • XMC_I2S_CH_CHANNEL_2_RIGHT : xmc_i2s.h
  • XMC_I2S_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_EVENT_BAUD_RATE_GENERATOR : xmc_i2s.h
  • XMC_I2S_CH_EVENT_DATA_LOST : xmc_i2s.h
  • XMC_I2S_CH_EVENT_DX2TIEN_ACTIVATED : xmc_i2s.h
  • XMC_I2S_CH_EVENT_RECEIVE_START : xmc_i2s.h
  • XMC_I2S_CH_EVENT_STANDARD_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_EVENT_TRANSMIT_BUFFER : xmc_i2s.h
  • XMC_I2S_CH_EVENT_TRANSMIT_SHIFT : xmc_i2s.h
  • XMC_I2S_CH_EVENT_WA_FALLING_EDGE : xmc_i2s.h
  • XMC_I2S_CH_EVENT_WA_GENERATION_END : xmc_i2s.h
  • XMC_I2S_CH_EVENT_WA_RISING_EDGE : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN0 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN1 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN2 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_DIN3 : xmc_i2s.h
  • XMC_I2S_CH_INPUT_SLAVE_SCLKIN : xmc_i2s.h
  • XMC_I2S_CH_INPUT_SLAVE_WA : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_i2s.h
  • XMC_I2S_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_i2s.h
  • XMC_I2S_CH_STATUS_BUSY : xmc_i2s.h
  • XMC_I2S_CH_STATUS_ERROR : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_DX2S : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_DX2T_EVENT_DETECTED : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WA_FALLING_EDGE_EVENT : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WA_GENERATION_END : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WA_RISING_EDGE_EVENT : xmc_i2s.h
  • XMC_I2S_CH_STATUS_FLAG_WORD_ADDRESS : xmc_i2s.h
  • XMC_I2S_CH_STATUS_OK : xmc_i2s.h
  • XMC_I2S_CH_WA_POLARITY_DIRECT : xmc_i2s.h
  • XMC_I2S_CH_WA_POLARITY_INVERTED : xmc_i2s.h
  • XMC_LEDTS_ACCUMULATION_COUNT_10_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_11_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_12_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_13_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_14_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_15_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_16_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_1_TIME : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_2_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_3_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_4_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_5_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_6_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_7_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_8_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACCUMULATION_COUNT_9_TIMES : xmc_ledts.h
  • XMC_LEDTS_ACTIVE_LEVEL_LED_COL_HIGH : xmc_ledts.h
  • XMC_LEDTS_ACTIVE_LEVEL_LED_COL_LOW : xmc_ledts.h
  • XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_ACTIVE : xmc_ledts.h
  • XMC_LEDTS_AUTOSCAN_INTERRUPT_FLAG_INACTIVE : xmc_ledts.h
  • XMC_LEDTS_CLOCK_TYPE_MASTER : xmc_ledts.h
  • XMC_LEDTS_CLOCK_TYPE_SLAVE : xmc_ledts.h
  • XMC_LEDTS_COMMON_COMPARE_DISABLE : xmc_ledts.h
  • XMC_LEDTS_COMMON_COMPARE_ENABLE : xmc_ledts.h
  • XMC_LEDTS_EXT_PULLUP_COLA_DISABLE : xmc_ledts.h
  • XMC_LEDTS_EXT_PULLUP_COLA_ENABLE : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_16_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_1_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_4_CLK : xmc_ledts.h
  • XMC_LEDTS_EXTEND_TS_OUTPUT_BY_8_CLK : xmc_ledts.h
  • XMC_LEDTS_FLAG_STATUS_NO : xmc_ledts.h
  • XMC_LEDTS_FLAG_STATUS_YES : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TIMEFRAME : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TIMEPERIOD : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TIMESLICE : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_FLAG_TSCOUNTER_OVERFLOW : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_TIMEFRAME : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_TIMEPERIOD : xmc_ledts.h
  • XMC_LEDTS_INTERRUPT_TIMESLICE : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_0 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_1 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_2 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_3 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_4 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_5 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_6 : xmc_ledts.h
  • XMC_LEDTS_LED_COLUMN_A : xmc_ledts.h
  • XMC_LEDTS_LED_FUNC_DISABLE : xmc_ledts.h
  • XMC_LEDTS_LED_FUNC_ENABLE : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_1 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_2 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_3 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_4 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_5 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_6 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_7 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_LED_COLUMNS_8 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_1 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_2 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_3 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_4 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_5 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_6 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_7 : xmc_ledts.h
  • XMC_LEDTS_NUMBER_TS_INPUT_8 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_0 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_1 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_2 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_3 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_4 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_5 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_6 : xmc_ledts.h
  • XMC_LEDTS_PAD_TURN_7 : xmc_ledts.h
  • XMC_LEDTS_STATUS_ERROR : xmc_ledts.h
  • XMC_LEDTS_STATUS_IDLE : xmc_ledts.h
  • XMC_LEDTS_STATUS_RUNNING : xmc_ledts.h
  • XMC_LEDTS_STATUS_SUCCESS : xmc_ledts.h
  • XMC_LEDTS_SUSPEND_DISABLE : xmc_ledts.h
  • XMC_LEDTS_SUSPEND_ENABLE : xmc_ledts.h
  • XMC_LEDTS_SW_CONTROL_DISABLE : xmc_ledts.h
  • XMC_LEDTS_SW_CONTROL_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TF_INTERRUPT_FLAG_ACTIVE : xmc_ledts.h
  • XMC_LEDTS_TF_INTERRUPT_FLAG_INACTIVE : xmc_ledts.h
  • XMC_LEDTS_TF_VALIDATION_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TF_VALIDATION_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TP_SYNC_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TP_SYNC_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_AUTO_RESET_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_AUTO_RESET_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_1_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_2_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_3_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_4_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_5_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_6_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_7_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_MASK_8_LSB : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_NO : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_OVERLOW_FLAG_YES : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_SATURATION_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TS_COUNTER_SATURATION_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_FUNC_DISABLE : xmc_ledts.h
  • XMC_LEDTS_TS_FUNC_ENABLE : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_0 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_1 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_2 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_3 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_4 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_5 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_6 : xmc_ledts.h
  • XMC_LEDTS_TS_INPUT_7 : xmc_ledts.h
  • XMC_MATH_CORDIC_CORDXRC_DISABLED : xmc_math.h
  • XMC_MATH_CORDIC_CORDXRC_QUOT_IS_SOURCE : xmc_math.h
  • XMC_MATH_CORDIC_CORDXRC_RMD_IS_SOURCE : xmc_math.h
  • XMC_MATH_CORDIC_CORDYRC_DISABLED : xmc_math.h
  • XMC_MATH_CORDIC_CORDYRC_QUOT_IS_SOURCE : xmc_math.h
  • XMC_MATH_CORDIC_CORDYRC_RMD_IS_SOURCE : xmc_math.h
  • XMC_MATH_CORDIC_CORDZRC_DISABLED : xmc_math.h
  • XMC_MATH_CORDIC_CORDZRC_QUOT_IS_SOURCE : xmc_math.h
  • XMC_MATH_CORDIC_CORDZRC_RMD_IS_SOURCE : xmc_math.h
  • XMC_MATH_CORDIC_MAGNITUDE_DIVBY1 : xmc_math.h
  • XMC_MATH_CORDIC_MAGNITUDE_DIVBY2 : xmc_math.h
  • XMC_MATH_CORDIC_MAGNITUDE_DIVBY4 : xmc_math.h
  • XMC_MATH_CORDIC_OPERATING_MODE_CIRCULAR : xmc_math.h
  • XMC_MATH_CORDIC_OPERATING_MODE_HYPERBOLIC : xmc_math.h
  • XMC_MATH_CORDIC_OPERATING_MODE_LINEAR : xmc_math.h
  • XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION : xmc_math.h
  • XMC_MATH_CORDIC_ROTVEC_MODE_VECTORING : xmc_math.h
  • XMC_MATH_DIV_DVDRC_CORRX_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVDRC_CORRY_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVDRC_CORRZ_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVDRC_DISABLED : xmc_math.h
  • XMC_MATH_DIV_DVDRC_QUOT_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVDRC_RMD_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVSRC_CORRX_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVSRC_CORRY_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVSRC_CORRZ_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVSRC_DISABLED : xmc_math.h
  • XMC_MATH_DIV_DVSRC_QUOT_IS_SOURCE : xmc_math.h
  • XMC_MATH_DIV_DVSRC_RMD_IS_SOURCE : xmc_math.h
  • XMC_MATH_EVENT_CORDIC_END_OF_CALC : xmc_math.h
  • XMC_MATH_EVENT_CORDIC_ERROR : xmc_math.h
  • XMC_MATH_EVENT_DIV_END_OF_CALC : xmc_math.h
  • XMC_MATH_EVENT_DIV_ERROR : xmc_math.h
  • XMC_PAU_PERIPHERAL_BCCU0 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_CCU40_CC40_AND_GLOBAL : xmc_pau.h
  • XMC_PAU_PERIPHERAL_CCU41_CC40_AND_GLOBAL : xmc_pau.h
  • XMC_PAU_PERIPHERAL_CCU80_CC80_AND_GLOBAL : xmc_pau.h
  • XMC_PAU_PERIPHERAL_CCU81_CC80_AND_GLOBAL : xmc_pau.h
  • XMC_PAU_PERIPHERAL_FLASH : xmc_pau.h
  • XMC_PAU_PERIPHERAL_LEDTS0 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_LEDTS1 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_LEDTS2 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_MATH_CORDIC : xmc_pau.h
  • XMC_PAU_PERIPHERAL_MATH_GLOBAL_AND_DIV : xmc_pau.h
  • XMC_PAU_PERIPHERAL_MCAN_OBJECTS : xmc_pau.h
  • XMC_PAU_PERIPHERAL_POSIF0 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_POSIF1 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_PRNG : xmc_pau.h
  • XMC_PAU_PERIPHERAL_RAM_BLOCK1 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_RAM_BLOCK2 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_RAM_BLOCK3 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_USIC0_CH0 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_USIC0_CH1 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_USIC1_CH0 : xmc_pau.h
  • XMC_PAU_PERIPHERAL_USIC1_CH1 : xmc_pau.h
  • XMC_PAU_STATUS_BUSY : xmc_pau.h
  • XMC_PAU_STATUS_ERROR : xmc_pau.h
  • XMC_PAU_STATUS_OK : xmc_pau.h
  • XMC_POSIF_FILTER_16_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_1_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_2_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_32_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_4_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_64_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_8_CLOCK_CYCLE : xmc_posif.h
  • XMC_POSIF_FILTER_DISABLED : xmc_posif.h
  • XMC_POSIF_HSC_TRIGGER_EDGE_FALLING : xmc_posif.h
  • XMC_POSIF_HSC_TRIGGER_EDGE_RISING : xmc_posif.h
  • XMC_POSIF_INPUT_ACTIVE_LEVEL_HIGH : xmc_posif.h
  • XMC_POSIF_INPUT_ACTIVE_LEVEL_LOW : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_A : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_B : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_C : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_D : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_E : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_F : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_G : xmc_posif.h
  • XMC_POSIF_INPUT_PORT_H : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_CHE : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_CNT : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_DIR : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_ERR : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_HALL_INPUT : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_INDX : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_MCP_SHADOW_TRANSFER : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_PCLK : xmc_posif.h
  • XMC_POSIF_IRQ_EVENT_WHE : xmc_posif.h
  • XMC_POSIF_MODE_HALL_SENSOR : xmc_posif.h
  • XMC_POSIF_MODE_MCM : xmc_posif.h
  • XMC_POSIF_MODE_MCM_QD : xmc_posif.h
  • XMC_POSIF_MODE_QD : xmc_posif.h
  • XMC_POSIF_QD_DIR_CLOCKWISE : xmc_posif.h
  • XMC_POSIF_QD_DIR_COUNTERCLOCKWISE : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_ALWAYS : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_NEVER : xmc_posif.h
  • XMC_POSIF_QD_INDEX_GENERATION_ONCE : xmc_posif.h
  • XMC_POSIF_QD_MODE_DIRECTION_COUNT : xmc_posif.h
  • XMC_POSIF_QD_MODE_QUADRATURE : xmc_posif.h
  • XMC_POSIF_SR_ID_0 : xmc_posif.h
  • XMC_POSIF_SR_ID_1 : xmc_posif.h
  • XMC_POSIF_STATUS_ERROR : xmc_posif.h
  • XMC_POSIF_STATUS_OK : xmc_posif.h
  • XMC_PRNG_INITIALIZED : xmc_prng.h
  • XMC_PRNG_KLD_MODE : xmc_prng.h
  • XMC_PRNG_NOT_INITIALIZED : xmc_prng.h
  • XMC_PRNG_RDBS_BYTE : xmc_prng.h
  • XMC_PRNG_RDBS_RESET : xmc_prng.h
  • XMC_PRNG_RDBS_WORD : xmc_prng.h
  • XMC_PRNG_STRM_MODE : xmc_prng.h
  • XMC_RTC_EVENT_ALARM : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_DAYS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_HOURS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_MINUTES : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_MONTHS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_SECONDS : xmc_rtc.h
  • XMC_RTC_EVENT_PERIODIC_YEARS : xmc_rtc.h
  • XMC_RTC_RUN_IN_DEBUG_MODE : xmc1_rtc.h
  • XMC_RTC_STATUS_BUSY : xmc_rtc.h
  • XMC_RTC_STATUS_ERROR : xmc_rtc.h
  • XMC_RTC_STATUS_OK : xmc_rtc.h
  • XMC_RTC_STOP_IN_DEBUG_MODE : xmc1_rtc.h
  • XMC_SCU_CCU_TRIGGER_CCU40 : xmc1_scu.h
  • XMC_SCU_CCU_TRIGGER_CCU41 : xmc1_scu.h
  • XMC_SCU_CCU_TRIGGER_CCU80 : xmc1_scu.h
  • XMC_SCU_CCU_TRIGGER_CCU81 : xmc1_scu.h
  • XMC_SCU_CLOCK_DCLKSRC_DCO1 : xmc1_scu.h
  • XMC_SCU_CLOCK_DCLKSRC_EXT_XTAL : xmc1_scu.h
  • XMC_SCU_CLOCK_OSCHP_MODE_DIRECT : xmc1_scu.h
  • XMC_SCU_CLOCK_OSCHP_MODE_DISABLED : xmc1_scu.h
  • XMC_SCU_CLOCK_OSCHP_MODE_OSC : xmc1_scu.h
  • XMC_SCU_CLOCK_OSCLP_MODE_DISABLED : xmc1_scu.h
  • XMC_SCU_CLOCK_OSCLP_MODE_OSC : xmc1_scu.h
  • XMC_SCU_CLOCK_PCLKSRC_DOUBLE_MCLK : xmc1_scu.h
  • XMC_SCU_CLOCK_PCLKSRC_MCLK : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_ACMP0_OUT : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_ACMP1_OUT : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_ACMP2_OUT : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_DCO2 : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_ERU_IOUT0 : xmc1_scu.h
  • XMC_SCU_CLOCK_RTCCLKSRC_OSCLP : xmc1_scu.h
  • XMC_SCU_IRQCTRL_BCCU0_SR0_IRQ31 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_BCCU0_SR0_OR_CCU40_SR3_IRQ31 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR0_IRQ0 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR0_IRQ17 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR0_IRQ3 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR1_IRQ1 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR1_IRQ18 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR1_IRQ4 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR2_IRQ19 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR2_IRQ2 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR2_IRQ5 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR3_IRQ6 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR3_IRQ7 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CAN0_SR4_IRQ20 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR0_IRQ0 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR0_IRQ21 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR0_IRQ8 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR0_OR_CCU41_SR0_IRQ21 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR0_OR_CCU41_SR0_IRQ22 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR1_IRQ22 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR1_IRQ29 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR1_IRQ7 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR2_IRQ16 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR2_IRQ23 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR2_IRQ30 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR2_OR_CCU41_SR2_IRQ23 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR3_IRQ24 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR3_IRQ27 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR3_IRQ31 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU40_SR3_OR_CCU41_SR3_IRQ24 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU41_SR0_IRQ21 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU41_SR1_IRQ22 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU41_SR2_IRQ23 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU41_SR3_IRQ24 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR0_IRQ1 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR0_IRQ25 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR0_IRQ8 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR0_OR_CCU81_SR0_IRQ25 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR1_IRQ13 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR1_IRQ2 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR1_IRQ26 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU80_SR1_OR_CCU81_SR1_IRQ26 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU81_SR0_IRQ25 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_CCU81_SR1_IRQ26 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR0_IRQ28 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR0_IRQ3 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR0_IRQ9 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR0_OR_ERU1_SR0_IRQ3 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR1_IRQ10 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR1_IRQ29 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR1_IRQ4 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR1_OR_ERU1_SR1_IRQ4 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR2_IRQ11 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR2_IRQ30 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR2_IRQ5 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR2_OR_ERU1_SR2_IRQ5 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR3_IRQ12 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR3_IRQ31 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR3_IRQ6 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU0_SR3_OR_ERU1_SR3_IRQ6 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU1_SR0_IRQ3 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU1_SR1_IRQ4 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU1_SR2_IRQ5 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_ERU1_SR3_IRQ6 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_LEDTS0_SR0_IRQ29 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_LEDTS0_SR0_OR_CCU40_SR1_IRQ29 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_LEDTS0_SR0_OR_CCU40_SR1_IRQ30 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_LEDTS1_SR0_IRQ30 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_LEDTS2_SR0_IRQ8 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_LEDTS2_SR0_OR_CCU40_SR0_IRQ8 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_MATH_SR0_IRQ7 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_MATH_SR0_OR_CAN0_SR3_IRQ7 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF0_SR0_IRQ14 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF0_SR0_IRQ27 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF0_SR0_OR_POSIF1_SR0_IRQ27 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF0_SR1_IRQ15 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF0_SR1_IRQ28 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF0_SR1_OR_POSIF1_SR1_IRQ28 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF1_SR0_IRQ27 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_POSIF1_SR1_IRQ28 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_SCU_SR0_IRQ0 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_SCU_SR0_OR_CAN0_SR0_IRQ0 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_SCU_SR1_IRQ1 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_SCU_SR1_OR_CAN0_SR1_IRQ1 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_SCU_SR2_IRQ2 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_SCU_SR2_OR_CAN0_SR2_IRQ2 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR0_IRQ15 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR0_IRQ21 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR0_IRQ9 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR0_OR_USIC1_SR0_IRQ9 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR1_IRQ10 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR1_IRQ16 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR1_IRQ22 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR1_OR_USIC1_SR1_IRQ10 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR2_IRQ11 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR2_IRQ17 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR2_IRQ23 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR2_OR_USIC1_SR2_IRQ11 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR3_IRQ12 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR3_IRQ18 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR3_IRQ24 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR3_OR_USIC1_SR3_IRQ12 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR4_IRQ13 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR4_IRQ19 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR4_IRQ25 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR4_OR_USIC1_SR4_IRQ13 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR5_IRQ14 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR5_IRQ20 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR5_IRQ26 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC0_SR5_OR_USIC1_SR5_IRQ14 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC1_SR0_IRQ9 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC1_SR1_IRQ10 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC1_SR2_IRQ11 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC1_SR3_IRQ12 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC1_SR4_IRQ13 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_USIC1_SR5_IRQ14 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_C0SR0_IRQ15 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_C0SR0_OR_USIC0_SR0_IRQ15 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_C0SR1_IRQ16 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_C0SR1_OR_USIC0_SR1_IRQ16 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G0SR0_IRQ17 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G0SR0_OR_USIC0_SR2_IRQ17 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G0SR1_IRQ18 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G0SR1_OR_USIC0_SR3_IRQ18 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G1SR0_IRQ19 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G1SR0_OR_USIC0_SR4_IRQ19 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G1SR1_IRQ20 : xmc1_scu.h
  • XMC_SCU_IRQCTRL_VADC0_G1SR1_OR_USIC0_SR5_IRQ20 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_BCCU0 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_CCU40 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_CCU41 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_CCU80 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_CCU81 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_LEDTS0 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_LEDTS1 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_LEDTS2 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_MATH : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_MCAN : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_POSIF0 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_POSIF1 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_RTC : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_USIC0 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_USIC1 : xmc1_scu.h
  • XMC_SCU_PERIPHERAL_CLOCK_WDT : xmc1_scu.h
  • XMC_SCU_RESET_REASON_CLOCK_LOSS : xmc1_scu.h
  • XMC_SCU_RESET_REASON_FLASH : xmc1_scu.h
  • XMC_SCU_RESET_REASON_LOCKUP : xmc1_scu.h
  • XMC_SCU_RESET_REASON_MASTER : xmc1_scu.h
  • XMC_SCU_RESET_REASON_PARITY_ERROR : xmc1_scu.h
  • XMC_SCU_RESET_REASON_PORST : xmc1_scu.h
  • XMC_SCU_RESET_REASON_SW : xmc1_scu.h
  • XMC_SCU_RESET_REASON_WATCHDOG : xmc1_scu.h
  • XMC_SCU_RESET_REQUEST_CLOCK_LOSS : xmc1_scu.h
  • XMC_SCU_RESET_REQUEST_FLASH_ECC_ERROR : xmc1_scu.h
  • XMC_SCU_RESET_REQUEST_SRAM_PARITY_ERROR : xmc1_scu.h
  • XMC_SCU_RESET_REQUEST_USIC_SRAM_PARITY_ERROR : xmc1_scu.h
  • XMC_SCU_STATUS_BUSY : xmc_scu.h
  • XMC_SCU_STATUS_ERROR : xmc_scu.h
  • XMC_SCU_STATUS_OK : xmc_scu.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED : xmc_spi.h
  • XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED : xmc_spi.h
  • XMC_SPI_CH_BUS_MODE_MASTER : xmc_spi.h
  • XMC_SPI_CH_BUS_MODE_SLAVE : xmc_spi.h
  • XMC_SPI_CH_DATA_POLARITY_DIRECT : xmc_spi.h
  • XMC_SPI_CH_DATA_POLARITY_INVERT : xmc_spi.h
  • XMC_SPI_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_EVENT_BAUD_RATE_GENERATOR : xmc_spi.h
  • XMC_SPI_CH_EVENT_DATA_LOST : xmc_spi.h
  • XMC_SPI_CH_EVENT_DX2TIEN_ACTIVATED : xmc_spi.h
  • XMC_SPI_CH_EVENT_MSLS_CHANGE : xmc_spi.h
  • XMC_SPI_CH_EVENT_PARITY_ERROR : xmc_spi.h
  • XMC_SPI_CH_EVENT_RECEIVE_START : xmc_spi.h
  • XMC_SPI_CH_EVENT_STANDARD_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_EVENT_TRANSMIT_BUFFER : xmc_spi.h
  • XMC_SPI_CH_EVENT_TRANSMIT_SHIFT : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN0 : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN1 : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN2 : xmc_spi.h
  • XMC_SPI_CH_INPUT_DIN3 : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FMCLK : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FPDIV : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FPPP : xmc_spi.h
  • XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FSCLK : xmc_spi.h
  • XMC_SPI_CH_INPUT_SLAVE_SCLKIN : xmc_spi.h
  • XMC_SPI_CH_INPUT_SLAVE_SELIN : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_spi.h
  • XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_spi.h
  • XMC_SPI_CH_MODE_DUAL : xmc_spi.h
  • XMC_SPI_CH_MODE_QUAD : xmc_spi.h
  • XMC_SPI_CH_MODE_STANDARD : xmc_spi.h
  • XMC_SPI_CH_MODE_STANDARD_HALFDUPLEX : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SEL_INV_TO_MSLS : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SEL_SAME_AS_MSLS : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_0 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_1 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_2 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_3 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_4 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_5 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_6 : xmc_spi.h
  • XMC_SPI_CH_SLAVE_SELECT_7 : xmc_spi.h
  • XMC_SPI_CH_STATUS_BUSY : xmc_spi.h
  • XMC_SPI_CH_STATUS_ERROR : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_DX2S : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_DX2T_EVENT_DETECTED : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_MSLS : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_MSLS_EVENT_DETECTED : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_PARITY_ERROR_EVENT_DETECTED : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_spi.h
  • XMC_SPI_CH_STATUS_OK : xmc_spi.h
  • XMC_UART_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_uart.h
  • XMC_UART_CH_EVENT_BAUD_RATE_GENERATOR : xmc_uart.h
  • XMC_UART_CH_EVENT_COLLISION : xmc_uart.h
  • XMC_UART_CH_EVENT_DATA_LOST : xmc_uart.h
  • XMC_UART_CH_EVENT_FORMAT_ERROR : xmc_uart.h
  • XMC_UART_CH_EVENT_FRAME_FINISHED : xmc_uart.h
  • XMC_UART_CH_EVENT_RECEIVE_START : xmc_uart.h
  • XMC_UART_CH_EVENT_RECEIVER_NOISE : xmc_uart.h
  • XMC_UART_CH_EVENT_STANDARD_RECEIVE : xmc_uart.h
  • XMC_UART_CH_EVENT_SYNCHRONIZATION_BREAK : xmc_uart.h
  • XMC_UART_CH_EVENT_TRANSMIT_BUFFER : xmc_uart.h
  • XMC_UART_CH_EVENT_TRANSMIT_SHIFT : xmc_uart.h
  • XMC_UART_CH_INPUT_RXD : xmc_uart.h
  • XMC_UART_CH_INPUT_RXD1 : xmc_uart.h
  • XMC_UART_CH_INPUT_RXD2 : xmc_uart.h
  • XMC_UART_CH_INPUT_SAMPLING_FREQ_FPERIPH : xmc_uart.h
  • XMC_UART_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_uart.h
  • XMC_UART_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_uart.h
  • XMC_UART_CH_STATUS_BUSY : xmc_uart.h
  • XMC_UART_CH_STATUS_ERROR : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_BAUD_RATE_GENERATOR_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_COLLISION_DETECTED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_DATA_LOST_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_FORMAT_ERROR_IN_STOP_BIT_0 : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_FORMAT_ERROR_IN_STOP_BIT_1 : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVE_FRAME_FINISHED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVE_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVER_NOISE_DETECTED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEIVER_START_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_RECEPTION_IDLE : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_SYNCHRONIZATION_BREAK_DETECTED : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSFER_STATUS_BUSY : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMISSION_IDLE : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION : xmc_uart.h
  • XMC_UART_CH_STATUS_FLAG_TRANSMITTER_FRAME_FINISHED : xmc_uart.h
  • XMC_UART_CH_STATUS_OK : xmc_uart.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_DISABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_FRACTIONAL : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_DIVIDER_MODE_NORMAL : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_SOURCE_DIVIDER : xmc_usic.h
  • XMC_USIC_CH_BRG_CLOCK_SOURCE_DX1T : xmc_usic.h
  • XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_0 : xmc_usic.h
  • XMC_USIC_CH_BRG_MASTER_CLOCK_PASSIVE_LEVEL_1 : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_DX1 : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_DISABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_ENABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED : xmc_usic.h
  • XMC_USIC_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_ENABLED : xmc_usic.h
  • XMC_USIC_CH_DATA_OUTPUT_MODE_INVERTED : xmc_usic.h
  • XMC_USIC_CH_DATA_OUTPUT_MODE_NORMAL : xmc_usic.h
  • XMC_USIC_CH_EVENT_ALTERNATIVE_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_EVENT_BAUD_RATE_GENERATOR : xmc_usic.h
  • XMC_USIC_CH_EVENT_DATA_LOST : xmc_usic.h
  • XMC_USIC_CH_EVENT_RECEIVE_START : xmc_usic.h
  • XMC_USIC_CH_EVENT_STANDARD_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_EVENT_TRANSMIT_BUFFER : xmc_usic.h
  • XMC_USIC_CH_EVENT_TRANSMIT_SHIFT : xmc_usic.h
  • XMC_USIC_CH_FIFO_DISABLED : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_16WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_2WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_32WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_4WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_64WORDS : xmc_usic.h
  • XMC_USIC_CH_FIFO_SIZE_8WORDS : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_BOTH_EDGES : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_FALLING_EDGE : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_RISING_EDGE : xmc_usic.h
  • XMC_USIC_CH_INPUT_COMBINATION_MODE_TRIGGER_DISABLED : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX0 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX1 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX2 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX3 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX4 : xmc_usic.h
  • XMC_USIC_CH_INPUT_DX5 : xmc_usic.h
  • XMC_USIC_CH_INPUT_SAMPLING_FREQ_FPERIPH : xmc_usic.h
  • XMC_USIC_CH_INPUT_SAMPLING_FREQ_FRACTIONAL_DIVIDER : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_PROTOCOL : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_RECEIVE : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER : xmc_usic.h
  • XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_RUN_0 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_RUN_1 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_STOP_0 : xmc_usic.h
  • XMC_USIC_CH_KERNEL_MODE_STOP_1 : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_I2C : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_I2S : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_IDLE : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_SPI : xmc_usic.h
  • XMC_USIC_CH_OPERATING_MODE_UART : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_EVEN : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_NONE : xmc_usic.h
  • XMC_USIC_CH_PARITY_MODE_ODD : xmc_usic.h
  • XMC_USIC_CH_PASSIVE_DATA_LEVEL0 : xmc_usic.h
  • XMC_USIC_CH_PASSIVE_DATA_LEVEL1 : xmc_usic.h
  • XMC_USIC_CH_RBUF_STATUS_DATA_VALID0 : xmc_usic.h
  • XMC_USIC_CH_RBUF_STATUS_DATA_VALID1 : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_ERROR : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_CONF_STANDARD : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_ERROR : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_EVENT_STANDARD : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_STANDARD : xmc_usic.h
  • XMC_USIC_CH_SHIFT_DIRECTION_LSB_FIRST : xmc_usic.h
  • XMC_USIC_CH_SHIFT_DIRECTION_MSB_FIRST : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_DISABLED : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_ON_TDV : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_0 : xmc_usic.h
  • XMC_USIC_CH_START_TRANSMISION_ON_TDV_DX2S_1 : xmc_usic.h
  • XMC_USIC_CH_STATUS_BUSY : xmc_usic.h
  • XMC_USIC_CH_STATUS_ERROR : xmc_usic.h
  • XMC_USIC_CH_STATUS_OK : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_BUSY : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_IDLE : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_SET_BUSY : xmc_usic.h
  • XMC_USIC_CH_TBUF_STATUS_SET_IDLE : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_CONF_ERROR : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_CONF_STANDARD : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_ERROR : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_EVENT_STANDARD : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE : xmc_usic.h
  • XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_STANDARD : xmc_usic.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_0 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_1 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_2 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_BOUNDARY_FLAG_3 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_0 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_1 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_2 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_3 : xmc_vadc.h
  • XMC_VADC_BOUNDARY_SELECT_LOWER_BOUND : xmc_vadc.h
  • XMC_VADC_BOUNDARY_SELECT_UPPER_BOUND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_CONDITION_ABOVE_BAND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_CONDITION_BELOW_BAND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_BWDCH_VAGND : xmc_vadc.h
  • XMC_VADC_CHANNEL_BWDCH_VAREF : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GROUP_CLASS0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_CONV_GROUP_CLASS1 : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_ALWAYS : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_COMPHIGH : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_COMPLOW : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_INBOUND : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_NEVER : xmc_vadc.h
  • XMC_VADC_CHANNEL_EVGEN_OUTBOUND : xmc_vadc.h
  • XMC_VADC_CHANNEL_REF_ALT_CH0 : xmc_vadc.h
  • XMC_VADC_CHANNEL_REF_INTREF : xmc_vadc.h
  • XMC_VADC_CONVMODE_10BIT : xmc_vadc.h
  • XMC_VADC_CONVMODE_12BIT : xmc_vadc.h
  • XMC_VADC_CONVMODE_8BIT : xmc_vadc.h
  • XMC_VADC_CONVMODE_FASTCOMPARE : xmc_vadc.h
  • XMC_VADC_DMM_DIFFERENCE_MODE : xmc_vadc.h
  • XMC_VADC_DMM_FILTERING_MODE : xmc_vadc.h
  • XMC_VADC_DMM_REDUCTION_MODE : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_HIGH : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_LOW : xmc_vadc.h
  • XMC_VADC_FAST_COMPARE_UNKNOWN : xmc_vadc.h
  • XMC_VADC_GATEMODE_ACTIVEHIGH : xmc_vadc.h
  • XMC_VADC_GATEMODE_ACTIVELOW : xmc_vadc.h
  • XMC_VADC_GATEMODE_BLOCK : xmc_vadc.h
  • XMC_VADC_GATEMODE_IGNORE : xmc_vadc.h
  • XMC_VADC_GLOBAL_EVENT_BKGNDSOURCE : xmc_vadc.h
  • XMC_VADC_GLOBAL_EVENT_RESULT : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_AREF_EXTERNAL_VDD_UPPER_RANGE : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_AREF_INTERNAL_VDD_LOWER_RANGE : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_AREF_INTERNAL_VDD_UPPER_RANGE : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_CALIBRATION_ORDER_POST_CONV : xmc_vadc.h
  • XMC_VADC_GLOBAL_SHS_CALIBRATION_ORDER_PRE_CONV : xmc_vadc.h
  • XMC_VADC_GROUP_ARBMODE_ALWAYS : xmc_vadc.h
  • XMC_VADC_GROUP_ARBMODE_ONDEMAND : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_DISABLED : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED_ACTIVE_HIGH : xmc_vadc.h
  • XMC_VADC_GROUP_BOUNDARY_FLAG_MODE_ENABLED_ACTIVE_LOW : xmc_vadc.h
  • XMC_VADC_GROUP_CONV_EMUX : xmc_vadc.h
  • XMC_VADC_GROUP_CONV_STD : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXCODE_BINARY : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXCODE_GRAY : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_SEQUENCEMODE : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_SINGLEMODE : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_STEADYMODE : xmc_vadc.h
  • XMC_VADC_GROUP_EMUXMODE_SWCTRL : xmc_vadc.h
  • XMC_VADC_GROUP_IRQ_KERNEL : xmc_vadc.h
  • XMC_VADC_GROUP_IRQ_SHARED : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_NORMAL : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_OFF : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_RESERVED1 : xmc_vadc.h
  • XMC_VADC_GROUP_POWERMODE_RESERVED2 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_0 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_1 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_2 : xmc_vadc.h
  • XMC_VADC_GROUP_RS_PRIORITY_3 : xmc_vadc.h
  • XMC_VADC_GROUP_STATE_BUSY : xmc_vadc.h
  • XMC_VADC_GROUP_STATE_IDLE : xmc_vadc.h
  • XMC_VADC_REQ_GT_A : xmc_vadc.h
  • XMC_VADC_REQ_GT_B : xmc_vadc.h
  • XMC_VADC_REQ_GT_C : xmc_vadc.h
  • XMC_VADC_REQ_GT_D : xmc_vadc.h
  • XMC_VADC_REQ_GT_E : xmc_vadc.h
  • XMC_VADC_REQ_GT_F : xmc_vadc.h
  • XMC_VADC_REQ_GT_G : xmc_vadc.h
  • XMC_VADC_REQ_GT_H : xmc_vadc.h
  • XMC_VADC_REQ_GT_I : xmc_vadc.h
  • XMC_VADC_REQ_GT_J : xmc_vadc.h
  • XMC_VADC_REQ_GT_K : xmc_vadc.h
  • XMC_VADC_REQ_GT_L : xmc_vadc.h
  • XMC_VADC_REQ_GT_M : xmc_vadc.h
  • XMC_VADC_REQ_GT_N : xmc_vadc.h
  • XMC_VADC_REQ_GT_O : xmc_vadc.h
  • XMC_VADC_REQ_GT_P : xmc_vadc.h
  • XMC_VADC_REQ_TR_A : xmc_vadc.h
  • XMC_VADC_REQ_TR_B : xmc_vadc.h
  • XMC_VADC_REQ_TR_C : xmc_vadc.h
  • XMC_VADC_REQ_TR_D : xmc_vadc.h
  • XMC_VADC_REQ_TR_E : xmc_vadc.h
  • XMC_VADC_REQ_TR_F : xmc_vadc.h
  • XMC_VADC_REQ_TR_G : xmc_vadc.h
  • XMC_VADC_REQ_TR_H : xmc_vadc.h
  • XMC_VADC_REQ_TR_I : xmc_vadc.h
  • XMC_VADC_REQ_TR_J : xmc_vadc.h
  • XMC_VADC_REQ_TR_K : xmc_vadc.h
  • XMC_VADC_REQ_TR_L : xmc_vadc.h
  • XMC_VADC_REQ_TR_M : xmc_vadc.h
  • XMC_VADC_REQ_TR_N : xmc_vadc.h
  • XMC_VADC_REQ_TR_O : xmc_vadc.h
  • XMC_VADC_REQ_TR_P : xmc_vadc.h
  • XMC_VADC_RESULT_ALIGN_LEFT : xmc_vadc.h
  • XMC_VADC_RESULT_ALIGN_RIGHT : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_10BIT_LEFT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_10BIT_RIGHT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_12BIT_LEFT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_12BIT_RIGHT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_8BIT_LEFT_ALIGN : xmc_vadc.h
  • XMC_VADC_RESULT_SUBTRATION_8BIT_RIGHT_ALIGN : xmc_vadc.h
  • XMC_VADC_SCAN_LOAD_COMBINE : xmc_vadc.h
  • XMC_VADC_SCAN_LOAD_OVERWRITE : xmc_vadc.h
  • XMC_VADC_SCAN_TYPE_BACKGROUND : xmc_vadc.h
  • XMC_VADC_SCAN_TYPE_GROUPSCAN : xmc_vadc.h
  • XMC_VADC_SHS_LOOP_CH_0 : xmc_vadc.h
  • XMC_VADC_SHS_LOOP_CH_1 : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR0 : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR1 : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR2 : xmc_vadc.h
  • XMC_VADC_SR_GROUP_SR3 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR0 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR1 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR2 : xmc_vadc.h
  • XMC_VADC_SR_SHARED_SR3 : xmc_vadc.h
  • XMC_VADC_STARTMODE_CIR : xmc_vadc.h
  • XMC_VADC_STARTMODE_CNR : xmc_vadc.h
  • XMC_VADC_STARTMODE_WFS : xmc_vadc.h
  • XMC_VADC_STATUS_ERROR : xmc_vadc.h
  • XMC_VADC_STATUS_SUCCESS : xmc_vadc.h
  • XMC_VADC_SYNCTR_EVAL_1 : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_ANY : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_FALLING : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_NONE : xmc_vadc.h
  • XMC_VADC_TRIGGER_EDGE_RISING : xmc_vadc.h
  • XMC_WDT_DEBUG_MODE_RUN : xmc_wdt.h
  • XMC_WDT_DEBUG_MODE_STOP : xmc_wdt.h
  • XMC_WDT_MODE_PREWARNING : xmc_wdt.h
  • XMC_WDT_MODE_TIMEOUT : xmc_wdt.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: Globals

  • File List
  • Globals
  • All
  • Functions
  • Typedefs
  • Enumerations
  • Enumerator
  • Macros
  • c
  • u
  • x

- c -

  • CAN_MO_MOIPR_Msk : xmc_can.h
  • CAN_NODE_NIPR_Msk : xmc_can.h

- u -

  • USIC_CH_DXCR_CM_Msk : xmc_usic.h
  • USIC_CH_DXCR_CM_Pos : xmc_usic.h
  • USIC_CH_DXCR_DFEN_Msk : xmc_usic.h
  • USIC_CH_DXCR_DPOL_Msk : xmc_usic.h
  • USIC_CH_DXCR_DSEL_Msk : xmc_usic.h
  • USIC_CH_DXCR_DSEL_Pos : xmc_usic.h
  • USIC_CH_DXCR_DSEN_Msk : xmc_usic.h
  • USIC_CH_DXCR_INSW_Msk : xmc_usic.h
  • USIC_CH_DXCR_INSW_pos : xmc_usic.h
  • USIC_CH_DXCR_SFSEL_Msk : xmc_usic.h
  • USIC_CH_DXCR_SFSEL_Pos : xmc_usic.h

- x -

  • XMC_CAN_MO_MOAR_STDID_Msk : xmc_can.h
  • XMC_CAN_MO_MOAR_STDID_Pos : xmc_can.h
  • XMC_FLASH_BASE : xmc1_flash.h
  • XMC_FLASH_BLOCKS_PER_PAGE : xmc1_flash.h
  • XMC_FLASH_BYTES_PER_BLOCK : xmc1_flash.h
  • XMC_FLASH_BYTES_PER_PAGE : xmc1_flash.h
  • XMC_FLASH_BYTES_PER_SECTOR : xmc1_flash.h
  • XMC_FLASH_PAGES_PER_SECTOR : xmc1_flash.h
  • XMC_FLASH_WORDS_PER_BLOCK : xmc1_flash.h
  • XMC_FLASH_WORDS_PER_PAGE : xmc1_flash.h
  • XMC_FLASH_WORDS_PER_SECTOR : xmc1_flash.h
  • XMC_I2C0_CH0 : xmc_i2c.h
  • XMC_I2C0_CH1 : xmc_i2c.h
  • XMC_I2C1_CH0 : xmc_i2c.h
  • XMC_I2C1_CH1 : xmc_i2c.h
  • XMC_I2C2_CH0 : xmc_i2c.h
  • XMC_I2C2_CH1 : xmc_i2c.h
  • XMC_I2C_10BIT_ADDR_GROUP : xmc_i2c.h
  • XMC_I2S0_CH0 : xmc_i2s.h
  • XMC_I2S0_CH1 : xmc_i2s.h
  • XMC_I2S1_CH0 : xmc_i2s.h
  • XMC_I2S1_CH1 : xmc_i2s.h
  • XMC_I2S2_CH0 : xmc_i2s.h
  • XMC_I2S2_CH1 : xmc_i2s.h
  • XMC_LEDTS0 : xmc_ledts.h
  • XMC_LEDTS1 : xmc_ledts.h
  • XMC_LEDTS2 : xmc_ledts.h
  • XMC_MATH_Q0_11 : xmc_math.h
  • XMC_MATH_Q0_23 : xmc_math.h
  • XMC_PAU : xmc_pau.h
  • XMC_PRNG_RDBS_BYTE_READ_MASK : xmc_prng.h
  • XMC_SCU_BMI_CANCLK_DCO1 : xmc1_scu.h
  • XMC_SCU_BMI_CANCLK_OSCHP : xmc1_scu.h
  • XMC_SCU_BMI_DAPDIS_CHANNEL_0 : xmc1_scu.h
  • XMC_SCU_BMI_DAPDIS_CHANNEL_1 : xmc1_scu.h
  • XMC_SCU_BMI_DAPTYP_SPD : xmc1_scu.h
  • XMC_SCU_BMI_DAPTYP_SWD : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_ASC_BSL : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_ASC_BSLTO : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_CAN_BSL : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_CAN_BSLTO : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_SBSL : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_SBSL_CANOPEN : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_SSC_BSL : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_SSC_BSLTO : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_UMD : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_UMHAR : xmc1_scu.h
  • XMC_SCU_BMI_HWCFG_UPM : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ACMP0 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ACMP1 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ACMP2 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ACMP3 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_DCO1_OUT_SYNC : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_FLASH_COMPLETED : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_FLASH_ERROR : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_LOCI : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_LOSS_EXT_CLOCK : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC0 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC1 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC2 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC3 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC4 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC5 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC6 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_ORC7 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_PEMCAN : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_PESRAM : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_PEUSIC0 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_PEUSIC1 : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTC_ALARM : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTC_PERIODIC : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCATIM0_UPDATED : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCATIM1_UPDATED : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCCTR_UPDATED : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCTIM0_UPDATED : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_RTCTIM1_UPDATED : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_STDBYCLKFAIL : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_TSE_DONE : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_TSE_HIGH : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_TSE_LOW : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_VCLIP : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_VDDPI : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_VDROP : xmc1_scu.h
  • XMC_SCU_INTERRUPT_EVENT_WDT_WARN : xmc1_scu.h
  • XMC_SPI0_CH0 : xmc_spi.h
  • XMC_SPI0_CH1 : xmc_spi.h
  • XMC_SPI1_CH0 : xmc_spi.h
  • XMC_SPI1_CH1 : xmc_spi.h
  • XMC_SPI2_CH0 : xmc_spi.h
  • XMC_SPI2_CH1 : xmc_spi.h
  • XMC_UART0_CH0 : xmc_uart.h
  • XMC_UART0_CH1 : xmc_uart.h
  • XMC_UART1_CH0 : xmc_uart.h
  • XMC_UART1_CH1 : xmc_uart.h
  • XMC_UART2_CH0 : xmc_uart.h
  • XMC_UART2_CH1 : xmc_uart.h
  • XMC_USIC0 : xmc_usic.h
  • XMC_USIC0_CH0 : xmc_usic.h
  • XMC_USIC0_CH1 : xmc_usic.h
  • XMC_USIC1 : xmc_usic.h
  • XMC_USIC1_CH0 : xmc_usic.h
  • XMC_USIC1_CH1 : xmc_usic.h
  • XMC_USIC2 : xmc_usic.h
  • XMC_USIC2_CH0 : xmc_usic.h
  • XMC_USIC2_CH1 : xmc_usic.h
  • XMC_VADC_NUM_CHANNELS_PER_GROUP : xmc_vadc.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: inc Directory Reference

  • File List
  • Globals
  • inc
inc Directory Reference

Files

file | xmc1_flash.h
file | xmc1_gpio.h
file | xmc1_rtc.h
file | xmc1_scu.h
file | xmc_bccu.h
file | xmc_can.h
file | xmc_ccu4.h
file | xmc_ccu8.h
file | xmc_eru.h
file | xmc_flash.h
file | xmc_gpio.h
file | xmc_i2c.h
file | xmc_i2s.h
file | xmc_ledts.h
file | xmc_math.h
file | xmc_pau.h
file | xmc_posif.h
file | xmc_prng.h
file | xmc_rtc.h
file | xmc_scu.h
file | xmc_spi.h
file | xmc_uart.h
file | xmc_usic.h
file | xmc_vadc.h
file | xmc_wdt.h
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: Graph Legend

Graph Legend

This page explains how to interpret the graphs that are generated by doxygen.

Consider the following example:

1 /*! Invisible class because of truncation */
2 class Invisible { };
3
4 /*! Truncated class, inheritance relation is hidden */
5 class Truncated : public Invisible { };
6
7 /* Class not documented with doxygen comments */
8 class Undocumented { };
9
10 /*! Class that is inherited using public inheritance */
11 class PublicBase : public Truncated { };
12
13 /*! A template class */
14 template<class T> class Templ { };
15
16 /*! Class that is inherited using protected inheritance */
17 class ProtectedBase { };
18
19 /*! Class that is inherited using private inheritance */
20 class PrivateBase { };
21
22 /*! Class that is used by the Inherited class */
23 class Used { };
24
25 /*! Super class that inherits a number of other classes */
26 class Inherited : public PublicBase,
27 protected ProtectedBase,
28 private PrivateBase,
29 public Undocumented,
30 public Templ<int>
31 {
32 private:
33 Used *m_usedClass;
34 };

This will result in the following graph:

The boxes in the above graph have the following meaning:

  • A filled gray box represents the struct or class for which the graph is generated.
  • A box with a black border denotes a documented struct or class.
  • A box with a gray border denotes an undocumented struct or class.
  • A box with a red border denotes a documented struct or class forwhich not all inheritance/containment relations are shown. A graph is truncated if it does not fit within the specified boundaries.

The arrows have the following meaning:

  • A dark blue arrow is used to visualize a public inheritance relation between two classes.
  • A dark green arrow is used for protected inheritance.
  • A dark red arrow is used for private inheritance.
  • A purple dashed arrow is used if a class is contained or used by another class. The arrow is labeled with the variable(s) through which the pointed class or struct is accessible.
  • A yellow dashed arrow denotes a relation between a template instance and the template class it was instantiated from. The arrow is labeled with the template parameters of the instance.
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11


XMC Peripheral Library for XMC1000 Family: Related Pages

Related Pages
Here is a list of all related documentation pages:
Changelog
Generated on Mon Aug 7 2017 10:43:07 for XMC Peripheral Library for XMC1000 Family by doxygen 1.8.11