471 lines
45 KiB
HTML
471 lines
45 KiB
HTML
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
|
<html xmlns="http://www.w3.org/1999/xhtml">
|
|
<head>
|
|
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
|
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
|
|
<title>Driver_SPI.h File Reference</title>
|
|
<title>CMSIS-Driver: Driver_SPI.h File Reference</title>
|
|
<link href="tabs.css" rel="stylesheet" type="text/css"/>
|
|
<link href="cmsis.css" rel="stylesheet" type="text/css" />
|
|
<script type="text/javascript" src="jquery.js"></script>
|
|
<script type="text/javascript" src="dynsections.js"></script>
|
|
<script type="text/javascript" src="printComponentTabs.js"></script>
|
|
<link href="navtree.css" rel="stylesheet" type="text/css"/>
|
|
<script type="text/javascript" src="resize.js"></script>
|
|
<script type="text/javascript" src="navtree.js"></script>
|
|
<script type="text/javascript">
|
|
$(document).ready(initResizable);
|
|
$(window).load(resizeHeight);
|
|
</script>
|
|
<link href="search/search.css" rel="stylesheet" type="text/css"/>
|
|
<script type="text/javascript" src="search/search.js"></script>
|
|
<script type="text/javascript">
|
|
$(document).ready(function() { searchBox.OnSelectItem(0); });
|
|
</script>
|
|
</head>
|
|
<body>
|
|
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
|
<div id="titlearea">
|
|
<table cellspacing="0" cellpadding="0">
|
|
<tbody>
|
|
<tr style="height: 46px;">
|
|
<td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
|
|
<td style="padding-left: 0.5em;">
|
|
<div id="projectname">CMSIS-Driver
|
|
 <span id="projectnumber">Version 2.05</span>
|
|
</div>
|
|
<div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
|
|
</td>
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
</div>
|
|
<!-- end header part -->
|
|
<div id="CMSISnav" class="tabs1">
|
|
<ul class="tablist">
|
|
<script type="text/javascript">
|
|
<!--
|
|
writeComponentTabs.call(this);
|
|
//-->
|
|
</script>
|
|
</ul>
|
|
</div>
|
|
<!-- Generated by Doxygen 1.8.6 -->
|
|
<script type="text/javascript">
|
|
var searchBox = new SearchBox("searchBox", "search",false,'Search');
|
|
</script>
|
|
<div id="navrow1" class="tabs">
|
|
<ul class="tablist">
|
|
<li><a href="index.html"><span>Main Page</span></a></li>
|
|
<li><a href="pages.html"><span>Usage and Description</span></a></li>
|
|
<li><a href="modules.html"><span>Reference</span></a></li>
|
|
<li>
|
|
<div id="MSearchBox" class="MSearchBoxInactive">
|
|
<span class="left">
|
|
<img id="MSearchSelect" src="search/mag_sel.png"
|
|
onmouseover="return searchBox.OnSearchSelectShow()"
|
|
onmouseout="return searchBox.OnSearchSelectHide()"
|
|
alt=""/>
|
|
<input type="text" id="MSearchField" value="Search" accesskey="S"
|
|
onfocus="searchBox.OnSearchFieldFocus(true)"
|
|
onblur="searchBox.OnSearchFieldFocus(false)"
|
|
onkeyup="searchBox.OnSearchFieldChange(event)"/>
|
|
</span><span class="right">
|
|
<a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
|
|
</span>
|
|
</div>
|
|
</li>
|
|
</ul>
|
|
</div>
|
|
</div><!-- top -->
|
|
<div id="side-nav" class="ui-resizable side-nav-resizable">
|
|
<div id="nav-tree">
|
|
<div id="nav-tree-contents">
|
|
<div id="nav-sync" class="sync"></div>
|
|
</div>
|
|
</div>
|
|
<div id="splitbar" style="-moz-user-select:none;"
|
|
class="ui-resizable-handle">
|
|
</div>
|
|
</div>
|
|
<script type="text/javascript">
|
|
$(document).ready(function(){initNavTree('Driver__SPI_8h.html','');});
|
|
</script>
|
|
<div id="doc-content">
|
|
<!-- window showing the filter options -->
|
|
<div id="MSearchSelectWindow"
|
|
onmouseover="return searchBox.OnSearchSelectShow()"
|
|
onmouseout="return searchBox.OnSearchSelectHide()"
|
|
onkeydown="return searchBox.OnSearchSelectKey(event)">
|
|
<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark"> </span>Pages</a></div>
|
|
|
|
<!-- iframe showing the search results (closed by default) -->
|
|
<div id="MSearchResultsWindow">
|
|
<iframe src="javascript:void(0)" frameborder="0"
|
|
name="MSearchResults" id="MSearchResults">
|
|
</iframe>
|
|
</div>
|
|
|
|
<div class="header">
|
|
<div class="summary">
|
|
<a href="#nested-classes">Data Structures</a> |
|
|
<a href="#define-members">Macros</a> |
|
|
<a href="#typedef-members">Typedefs</a> </div>
|
|
<div class="headertitle">
|
|
<div class="title">Driver_SPI.h File Reference</div> </div>
|
|
</div><!--header-->
|
|
<div class="contents">
|
|
<table class="memberdecls">
|
|
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
|
|
Data Structures</h2></td></tr>
|
|
<tr class="memitem:structARM__SPI__STATUS"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__interface__gr.html#structARM__SPI__STATUS">ARM_SPI_STATUS</a></td></tr>
|
|
<tr class="memdesc:structARM__SPI__STATUS"><td class="mdescLeft"> </td><td class="mdescRight">SPI Status. <a href="group__spi__interface__gr.html#structARM__SPI__STATUS">More...</a><br/></td></tr>
|
|
<tr class="separator:structARM__SPI__STATUS"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:structARM__SPI__CAPABILITIES"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__interface__gr.html#structARM__SPI__CAPABILITIES">ARM_SPI_CAPABILITIES</a></td></tr>
|
|
<tr class="memdesc:structARM__SPI__CAPABILITIES"><td class="mdescLeft"> </td><td class="mdescRight">SPI Driver Capabilities. <a href="group__spi__interface__gr.html#structARM__SPI__CAPABILITIES">More...</a><br/></td></tr>
|
|
<tr class="separator:structARM__SPI__CAPABILITIES"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:structARM__DRIVER__SPI"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__interface__gr.html#structARM__DRIVER__SPI">ARM_DRIVER_SPI</a></td></tr>
|
|
<tr class="memdesc:structARM__DRIVER__SPI"><td class="mdescLeft"> </td><td class="mdescRight">Access structure of the SPI Driver. <a href="group__spi__interface__gr.html#structARM__DRIVER__SPI">More...</a><br/></td></tr>
|
|
<tr class="separator:structARM__DRIVER__SPI"><td class="memSeparator" colspan="2"> </td></tr>
|
|
</table><table class="memberdecls">
|
|
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
|
|
Macros</h2></td></tr>
|
|
<tr class="memitem:acf1275c15e53a573d7db89da66839d97"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#acf1275c15e53a573d7db89da66839d97">ARM_SPI_API_VERSION</a>   <a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(2,2) /* API version */</td></tr>
|
|
<tr class="separator:acf1275c15e53a573d7db89da66839d97"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a129dc5d38b4ba2c776c0b90aecf12a63"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#a129dc5d38b4ba2c776c0b90aecf12a63">ARM_SPI_CONTROL_Pos</a>   0</td></tr>
|
|
<tr class="separator:a129dc5d38b4ba2c776c0b90aecf12a63"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a646c834efef12377b372ea546459315b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#a646c834efef12377b372ea546459315b">ARM_SPI_CONTROL_Msk</a>   (0xFFUL << ARM_SPI_CONTROL_Pos)</td></tr>
|
|
<tr class="separator:a646c834efef12377b372ea546459315b"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga974e3d7c178b76b0540d7644b977bff3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__mode__ctrls.html#ga974e3d7c178b76b0540d7644b977bff3">ARM_SPI_MODE_INACTIVE</a>   (0x00UL << ARM_SPI_CONTROL_Pos)</td></tr>
|
|
<tr class="memdesc:ga974e3d7c178b76b0540d7644b977bff3"><td class="mdescLeft"> </td><td class="mdescRight">SPI Inactive. <a href="group__spi__mode__ctrls.html#ga974e3d7c178b76b0540d7644b977bff3">More...</a><br/></td></tr>
|
|
<tr class="separator:ga974e3d7c178b76b0540d7644b977bff3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga3143ef07c1607b9bc57e29df35cf2fa8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__mode__ctrls.html#ga3143ef07c1607b9bc57e29df35cf2fa8">ARM_SPI_MODE_MASTER</a>   (0x01UL << ARM_SPI_CONTROL_Pos)</td></tr>
|
|
<tr class="memdesc:ga3143ef07c1607b9bc57e29df35cf2fa8"><td class="mdescLeft"> </td><td class="mdescRight">SPI Master (Output on MOSI, Input on MISO); arg = Bus Speed in bps. <a href="group__spi__mode__ctrls.html#ga3143ef07c1607b9bc57e29df35cf2fa8">More...</a><br/></td></tr>
|
|
<tr class="separator:ga3143ef07c1607b9bc57e29df35cf2fa8"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga382b394c5e68f7d1206b837843732a3e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__mode__ctrls.html#ga382b394c5e68f7d1206b837843732a3e">ARM_SPI_MODE_SLAVE</a>   (0x02UL << ARM_SPI_CONTROL_Pos)</td></tr>
|
|
<tr class="memdesc:ga382b394c5e68f7d1206b837843732a3e"><td class="mdescLeft"> </td><td class="mdescRight">SPI Slave (Output on MISO, Input on MOSI) <a href="group__spi__mode__ctrls.html#ga382b394c5e68f7d1206b837843732a3e">More...</a><br/></td></tr>
|
|
<tr class="separator:ga382b394c5e68f7d1206b837843732a3e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:gaf34d849c7cde1151a768887f154e19bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__mode__ctrls.html#gaf34d849c7cde1151a768887f154e19bd">ARM_SPI_MODE_MASTER_SIMPLEX</a>   (0x03UL << ARM_SPI_CONTROL_Pos)</td></tr>
|
|
<tr class="memdesc:gaf34d849c7cde1151a768887f154e19bd"><td class="mdescLeft"> </td><td class="mdescRight">SPI Master (Output/Input on MOSI); arg = Bus Speed in bps. <a href="group__spi__mode__ctrls.html#gaf34d849c7cde1151a768887f154e19bd">More...</a><br/></td></tr>
|
|
<tr class="separator:gaf34d849c7cde1151a768887f154e19bd"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga9b113d8b336047e1c22f73ad44851fdf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__mode__ctrls.html#ga9b113d8b336047e1c22f73ad44851fdf">ARM_SPI_MODE_SLAVE_SIMPLEX</a>   (0x04UL << ARM_SPI_CONTROL_Pos)</td></tr>
|
|
<tr class="memdesc:ga9b113d8b336047e1c22f73ad44851fdf"><td class="mdescLeft"> </td><td class="mdescRight">SPI Slave (Output/Input on MISO) <a href="group__spi__mode__ctrls.html#ga9b113d8b336047e1c22f73ad44851fdf">More...</a><br/></td></tr>
|
|
<tr class="separator:ga9b113d8b336047e1c22f73ad44851fdf"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ac47e4ed093d8c054021121f89c64023e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#ac47e4ed093d8c054021121f89c64023e">ARM_SPI_FRAME_FORMAT_Pos</a>   8</td></tr>
|
|
<tr class="separator:ac47e4ed093d8c054021121f89c64023e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af459192fe14b4b725816fa0029149298"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#af459192fe14b4b725816fa0029149298">ARM_SPI_FRAME_FORMAT_Msk</a>   (7UL << ARM_SPI_FRAME_FORMAT_Pos)</td></tr>
|
|
<tr class="separator:af459192fe14b4b725816fa0029149298"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:gab4ac9a609c078d1e8332cf95da34e50e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__frame__format__ctrls.html#gab4ac9a609c078d1e8332cf95da34e50e">ARM_SPI_CPOL0_CPHA0</a>   (0UL << ARM_SPI_FRAME_FORMAT_Pos)</td></tr>
|
|
<tr class="memdesc:gab4ac9a609c078d1e8332cf95da34e50e"><td class="mdescLeft"> </td><td class="mdescRight">Clock Polarity 0, Clock Phase 0 (default) <a href="group__spi__frame__format__ctrls.html#gab4ac9a609c078d1e8332cf95da34e50e">More...</a><br/></td></tr>
|
|
<tr class="separator:gab4ac9a609c078d1e8332cf95da34e50e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga5498eb08c2ba8de2e1c2801428e79d71"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__frame__format__ctrls.html#ga5498eb08c2ba8de2e1c2801428e79d71">ARM_SPI_CPOL0_CPHA1</a>   (1UL << ARM_SPI_FRAME_FORMAT_Pos)</td></tr>
|
|
<tr class="memdesc:ga5498eb08c2ba8de2e1c2801428e79d71"><td class="mdescLeft"> </td><td class="mdescRight">Clock Polarity 0, Clock Phase 1. <a href="group__spi__frame__format__ctrls.html#ga5498eb08c2ba8de2e1c2801428e79d71">More...</a><br/></td></tr>
|
|
<tr class="separator:ga5498eb08c2ba8de2e1c2801428e79d71"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga67193d9b5af1ec312a66d007c33b597f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__frame__format__ctrls.html#ga67193d9b5af1ec312a66d007c33b597f">ARM_SPI_CPOL1_CPHA0</a>   (2UL << ARM_SPI_FRAME_FORMAT_Pos)</td></tr>
|
|
<tr class="memdesc:ga67193d9b5af1ec312a66d007c33b597f"><td class="mdescLeft"> </td><td class="mdescRight">Clock Polarity 1, Clock Phase 0. <a href="group__spi__frame__format__ctrls.html#ga67193d9b5af1ec312a66d007c33b597f">More...</a><br/></td></tr>
|
|
<tr class="separator:ga67193d9b5af1ec312a66d007c33b597f"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga7fab572b2fec303e979e47eb2d13ca74"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__frame__format__ctrls.html#ga7fab572b2fec303e979e47eb2d13ca74">ARM_SPI_CPOL1_CPHA1</a>   (3UL << ARM_SPI_FRAME_FORMAT_Pos)</td></tr>
|
|
<tr class="memdesc:ga7fab572b2fec303e979e47eb2d13ca74"><td class="mdescLeft"> </td><td class="mdescRight">Clock Polarity 1, Clock Phase 1. <a href="group__spi__frame__format__ctrls.html#ga7fab572b2fec303e979e47eb2d13ca74">More...</a><br/></td></tr>
|
|
<tr class="separator:ga7fab572b2fec303e979e47eb2d13ca74"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga225185710ba38848a489013ba4475915"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__frame__format__ctrls.html#ga225185710ba38848a489013ba4475915">ARM_SPI_TI_SSI</a>   (4UL << ARM_SPI_FRAME_FORMAT_Pos)</td></tr>
|
|
<tr class="memdesc:ga225185710ba38848a489013ba4475915"><td class="mdescLeft"> </td><td class="mdescRight">Texas Instruments Frame Format. <a href="group__spi__frame__format__ctrls.html#ga225185710ba38848a489013ba4475915">More...</a><br/></td></tr>
|
|
<tr class="separator:ga225185710ba38848a489013ba4475915"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga44f481d32b9a9ea93673f05af82ccf86"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__frame__format__ctrls.html#ga44f481d32b9a9ea93673f05af82ccf86">ARM_SPI_MICROWIRE</a>   (5UL << ARM_SPI_FRAME_FORMAT_Pos)</td></tr>
|
|
<tr class="memdesc:ga44f481d32b9a9ea93673f05af82ccf86"><td class="mdescLeft"> </td><td class="mdescRight">National Microwire Frame Format. <a href="group__spi__frame__format__ctrls.html#ga44f481d32b9a9ea93673f05af82ccf86">More...</a><br/></td></tr>
|
|
<tr class="separator:ga44f481d32b9a9ea93673f05af82ccf86"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a89e1140c07c9805112b6de4541c3b59a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#a89e1140c07c9805112b6de4541c3b59a">ARM_SPI_DATA_BITS_Pos</a>   12</td></tr>
|
|
<tr class="separator:a89e1140c07c9805112b6de4541c3b59a"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a0b6e14fe55f4d92ddab6ca230da77f46"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#a0b6e14fe55f4d92ddab6ca230da77f46">ARM_SPI_DATA_BITS_Msk</a>   (0x3FUL << ARM_SPI_DATA_BITS_Pos)</td></tr>
|
|
<tr class="separator:a0b6e14fe55f4d92ddab6ca230da77f46"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:gaf6c099a1d67256a32010120c66c55250"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__data__bits__ctrls.html#gaf6c099a1d67256a32010120c66c55250">ARM_SPI_DATA_BITS</a>(n)   (((n) & 0x3F) << ARM_SPI_DATA_BITS_Pos)</td></tr>
|
|
<tr class="memdesc:gaf6c099a1d67256a32010120c66c55250"><td class="mdescLeft"> </td><td class="mdescRight">Number of Data bits. <a href="group__spi__data__bits__ctrls.html#gaf6c099a1d67256a32010120c66c55250">More...</a><br/></td></tr>
|
|
<tr class="separator:gaf6c099a1d67256a32010120c66c55250"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a84a8f90504df32ec77832a0285a47081"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#a84a8f90504df32ec77832a0285a47081">ARM_SPI_BIT_ORDER_Pos</a>   18</td></tr>
|
|
<tr class="separator:a84a8f90504df32ec77832a0285a47081"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a7d407682d2cb5a7fea5e38ae62fa42f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#a7d407682d2cb5a7fea5e38ae62fa42f8">ARM_SPI_BIT_ORDER_Msk</a>   (1UL << ARM_SPI_BIT_ORDER_Pos)</td></tr>
|
|
<tr class="separator:a7d407682d2cb5a7fea5e38ae62fa42f8"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga98228a708cbab6e214c7ac696f77dab6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__bit__order__ctrls.html#ga98228a708cbab6e214c7ac696f77dab6">ARM_SPI_MSB_LSB</a>   (0UL << ARM_SPI_BIT_ORDER_Pos)</td></tr>
|
|
<tr class="memdesc:ga98228a708cbab6e214c7ac696f77dab6"><td class="mdescLeft"> </td><td class="mdescRight">SPI Bit order from MSB to LSB (default) <a href="group__spi__bit__order__ctrls.html#ga98228a708cbab6e214c7ac696f77dab6">More...</a><br/></td></tr>
|
|
<tr class="separator:ga98228a708cbab6e214c7ac696f77dab6"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga41c53c3b396a89ce78018467e561aaaf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__bit__order__ctrls.html#ga41c53c3b396a89ce78018467e561aaaf">ARM_SPI_LSB_MSB</a>   (1UL << ARM_SPI_BIT_ORDER_Pos)</td></tr>
|
|
<tr class="memdesc:ga41c53c3b396a89ce78018467e561aaaf"><td class="mdescLeft"> </td><td class="mdescRight">SPI Bit order from LSB to MSB. <a href="group__spi__bit__order__ctrls.html#ga41c53c3b396a89ce78018467e561aaaf">More...</a><br/></td></tr>
|
|
<tr class="separator:ga41c53c3b396a89ce78018467e561aaaf"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ac467bd067b72370b23546767e63ce693"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#ac467bd067b72370b23546767e63ce693">ARM_SPI_SS_MASTER_MODE_Pos</a>   19</td></tr>
|
|
<tr class="separator:ac467bd067b72370b23546767e63ce693"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aaefa5b36525296a43071968cac43a4af"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#aaefa5b36525296a43071968cac43a4af">ARM_SPI_SS_MASTER_MODE_Msk</a>   (3UL << ARM_SPI_SS_MASTER_MODE_Pos)</td></tr>
|
|
<tr class="separator:aaefa5b36525296a43071968cac43a4af"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:gae19343adc7bd71408b51733171f99dc7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__slave__select__mode__ctrls.html#gae19343adc7bd71408b51733171f99dc7">ARM_SPI_SS_MASTER_UNUSED</a>   (0UL << ARM_SPI_SS_MASTER_MODE_Pos)</td></tr>
|
|
<tr class="memdesc:gae19343adc7bd71408b51733171f99dc7"><td class="mdescLeft"> </td><td class="mdescRight">SPI Slave Select when Master: Not used (default) <a href="group__spi__slave__select__mode__ctrls.html#gae19343adc7bd71408b51733171f99dc7">More...</a><br/></td></tr>
|
|
<tr class="separator:gae19343adc7bd71408b51733171f99dc7"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:gab5e319aa3f9d4d8c9ed92f0fe865f624"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__slave__select__mode__ctrls.html#gab5e319aa3f9d4d8c9ed92f0fe865f624">ARM_SPI_SS_MASTER_SW</a>   (1UL << ARM_SPI_SS_MASTER_MODE_Pos)</td></tr>
|
|
<tr class="memdesc:gab5e319aa3f9d4d8c9ed92f0fe865f624"><td class="mdescLeft"> </td><td class="mdescRight">SPI Slave Select when Master: Software controlled. <a href="group__spi__slave__select__mode__ctrls.html#gab5e319aa3f9d4d8c9ed92f0fe865f624">More...</a><br/></td></tr>
|
|
<tr class="separator:gab5e319aa3f9d4d8c9ed92f0fe865f624"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga07762709a40dc90aca85553f500c8761"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__slave__select__mode__ctrls.html#ga07762709a40dc90aca85553f500c8761">ARM_SPI_SS_MASTER_HW_OUTPUT</a>   (2UL << ARM_SPI_SS_MASTER_MODE_Pos)</td></tr>
|
|
<tr class="memdesc:ga07762709a40dc90aca85553f500c8761"><td class="mdescLeft"> </td><td class="mdescRight">SPI Slave Select when Master: Hardware controlled Output. <a href="group__spi__slave__select__mode__ctrls.html#ga07762709a40dc90aca85553f500c8761">More...</a><br/></td></tr>
|
|
<tr class="separator:ga07762709a40dc90aca85553f500c8761"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga8561bd0cc25ab2bb02b138c1c6a586cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__slave__select__mode__ctrls.html#ga8561bd0cc25ab2bb02b138c1c6a586cd">ARM_SPI_SS_MASTER_HW_INPUT</a>   (3UL << ARM_SPI_SS_MASTER_MODE_Pos)</td></tr>
|
|
<tr class="memdesc:ga8561bd0cc25ab2bb02b138c1c6a586cd"><td class="mdescLeft"> </td><td class="mdescRight">SPI Slave Select when Master: Hardware monitored Input. <a href="group__spi__slave__select__mode__ctrls.html#ga8561bd0cc25ab2bb02b138c1c6a586cd">More...</a><br/></td></tr>
|
|
<tr class="separator:ga8561bd0cc25ab2bb02b138c1c6a586cd"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a4aed772149cc33c6ee70663adef90956"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#a4aed772149cc33c6ee70663adef90956">ARM_SPI_SS_SLAVE_MODE_Pos</a>   21</td></tr>
|
|
<tr class="separator:a4aed772149cc33c6ee70663adef90956"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a2e9a0ac10df1b90b785c5d23079873e0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#a2e9a0ac10df1b90b785c5d23079873e0">ARM_SPI_SS_SLAVE_MODE_Msk</a>   (1UL << ARM_SPI_SS_SLAVE_MODE_Pos)</td></tr>
|
|
<tr class="separator:a2e9a0ac10df1b90b785c5d23079873e0"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga2bd0d1f3ade2dc0cc48cc0593336ad70"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__slave__select__mode__ctrls.html#ga2bd0d1f3ade2dc0cc48cc0593336ad70">ARM_SPI_SS_SLAVE_HW</a>   (0UL << ARM_SPI_SS_SLAVE_MODE_Pos)</td></tr>
|
|
<tr class="memdesc:ga2bd0d1f3ade2dc0cc48cc0593336ad70"><td class="mdescLeft"> </td><td class="mdescRight">SPI Slave Select when Slave: Hardware monitored (default) <a href="group__spi__slave__select__mode__ctrls.html#ga2bd0d1f3ade2dc0cc48cc0593336ad70">More...</a><br/></td></tr>
|
|
<tr class="separator:ga2bd0d1f3ade2dc0cc48cc0593336ad70"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:gad371f6ba0d12a57bdcc3217c351abfb0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__slave__select__mode__ctrls.html#gad371f6ba0d12a57bdcc3217c351abfb0">ARM_SPI_SS_SLAVE_SW</a>   (1UL << ARM_SPI_SS_SLAVE_MODE_Pos)</td></tr>
|
|
<tr class="memdesc:gad371f6ba0d12a57bdcc3217c351abfb0"><td class="mdescLeft"> </td><td class="mdescRight">SPI Slave Select when Slave: Software controlled. <a href="group__spi__slave__select__mode__ctrls.html#gad371f6ba0d12a57bdcc3217c351abfb0">More...</a><br/></td></tr>
|
|
<tr class="separator:gad371f6ba0d12a57bdcc3217c351abfb0"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga5ef3d114979f3fd6010d0df16c2bf5c1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__misc__ctrls.html#ga5ef3d114979f3fd6010d0df16c2bf5c1">ARM_SPI_SET_BUS_SPEED</a>   (0x10UL << ARM_SPI_CONTROL_Pos)</td></tr>
|
|
<tr class="memdesc:ga5ef3d114979f3fd6010d0df16c2bf5c1"><td class="mdescLeft"> </td><td class="mdescRight">Set Bus Speed in bps; arg = value. <a href="group__spi__misc__ctrls.html#ga5ef3d114979f3fd6010d0df16c2bf5c1">More...</a><br/></td></tr>
|
|
<tr class="separator:ga5ef3d114979f3fd6010d0df16c2bf5c1"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:gafc00fe35bb4c89b076d014b43168b2b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__misc__ctrls.html#gafc00fe35bb4c89b076d014b43168b2b3">ARM_SPI_GET_BUS_SPEED</a>   (0x11UL << ARM_SPI_CONTROL_Pos)</td></tr>
|
|
<tr class="memdesc:gafc00fe35bb4c89b076d014b43168b2b3"><td class="mdescLeft"> </td><td class="mdescRight">Get Bus Speed in bps. <a href="group__spi__misc__ctrls.html#gafc00fe35bb4c89b076d014b43168b2b3">More...</a><br/></td></tr>
|
|
<tr class="separator:gafc00fe35bb4c89b076d014b43168b2b3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:gae9861221dee78d52bd1522b7846535ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__misc__ctrls.html#gae9861221dee78d52bd1522b7846535ce">ARM_SPI_SET_DEFAULT_TX_VALUE</a>   (0x12UL << ARM_SPI_CONTROL_Pos)</td></tr>
|
|
<tr class="memdesc:gae9861221dee78d52bd1522b7846535ce"><td class="mdescLeft"> </td><td class="mdescRight">Set default Transmit value; arg = value. <a href="group__spi__misc__ctrls.html#gae9861221dee78d52bd1522b7846535ce">More...</a><br/></td></tr>
|
|
<tr class="separator:gae9861221dee78d52bd1522b7846535ce"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga5776272b82decff92da003568540c92f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__misc__ctrls.html#ga5776272b82decff92da003568540c92f">ARM_SPI_CONTROL_SS</a>   (0x13UL << ARM_SPI_CONTROL_Pos)</td></tr>
|
|
<tr class="memdesc:ga5776272b82decff92da003568540c92f"><td class="mdescLeft"> </td><td class="mdescRight">Control Slave Select; arg: 0=inactive, 1=active. <a href="group__spi__misc__ctrls.html#ga5776272b82decff92da003568540c92f">More...</a><br/></td></tr>
|
|
<tr class="separator:ga5776272b82decff92da003568540c92f"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga44708b80e48984be099cd6eb11780dc3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__misc__ctrls.html#ga44708b80e48984be099cd6eb11780dc3">ARM_SPI_ABORT_TRANSFER</a>   (0x14UL << ARM_SPI_CONTROL_Pos)</td></tr>
|
|
<tr class="memdesc:ga44708b80e48984be099cd6eb11780dc3"><td class="mdescLeft"> </td><td class="mdescRight">Abort current data transfer. <a href="group__spi__misc__ctrls.html#ga44708b80e48984be099cd6eb11780dc3">More...</a><br/></td></tr>
|
|
<tr class="separator:ga44708b80e48984be099cd6eb11780dc3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a335b448e07422e9c25616a693ec581cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#a335b448e07422e9c25616a693ec581cc">ARM_SPI_SS_INACTIVE</a>   0</td></tr>
|
|
<tr class="memdesc:a335b448e07422e9c25616a693ec581cc"><td class="mdescLeft"> </td><td class="mdescRight">SPI Slave Select Signal Inactive. <a href="#a335b448e07422e9c25616a693ec581cc">More...</a><br/></td></tr>
|
|
<tr class="separator:a335b448e07422e9c25616a693ec581cc"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3f465cdbd1238ddd74f78e14457076c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SPI_8h.html#a3f465cdbd1238ddd74f78e14457076c4">ARM_SPI_SS_ACTIVE</a>   1</td></tr>
|
|
<tr class="memdesc:a3f465cdbd1238ddd74f78e14457076c4"><td class="mdescLeft"> </td><td class="mdescRight">SPI Slave Select Signal Active. <a href="#a3f465cdbd1238ddd74f78e14457076c4">More...</a><br/></td></tr>
|
|
<tr class="separator:a3f465cdbd1238ddd74f78e14457076c4"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga273a55c5d19491c565e5f05d03d66f3f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__execution__status.html#ga273a55c5d19491c565e5f05d03d66f3f">ARM_SPI_ERROR_MODE</a>   (<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 1)</td></tr>
|
|
<tr class="memdesc:ga273a55c5d19491c565e5f05d03d66f3f"><td class="mdescLeft"> </td><td class="mdescRight">Specified Mode not supported. <a href="group__spi__execution__status.html#ga273a55c5d19491c565e5f05d03d66f3f">More...</a><br/></td></tr>
|
|
<tr class="separator:ga273a55c5d19491c565e5f05d03d66f3f"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:gac47584fe5691889c056611bc589b25aa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__execution__status.html#gac47584fe5691889c056611bc589b25aa">ARM_SPI_ERROR_FRAME_FORMAT</a>   (<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 2)</td></tr>
|
|
<tr class="memdesc:gac47584fe5691889c056611bc589b25aa"><td class="mdescLeft"> </td><td class="mdescRight">Specified Frame Format not supported. <a href="group__spi__execution__status.html#gac47584fe5691889c056611bc589b25aa">More...</a><br/></td></tr>
|
|
<tr class="separator:gac47584fe5691889c056611bc589b25aa"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga76f895d3380ca474124f83acbebc5651"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__execution__status.html#ga76f895d3380ca474124f83acbebc5651">ARM_SPI_ERROR_DATA_BITS</a>   (<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 3)</td></tr>
|
|
<tr class="memdesc:ga76f895d3380ca474124f83acbebc5651"><td class="mdescLeft"> </td><td class="mdescRight">Specified number of Data bits not supported. <a href="group__spi__execution__status.html#ga76f895d3380ca474124f83acbebc5651">More...</a><br/></td></tr>
|
|
<tr class="separator:ga76f895d3380ca474124f83acbebc5651"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga6b8ac31930ea6ca3a9635f2ac935466d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__execution__status.html#ga6b8ac31930ea6ca3a9635f2ac935466d">ARM_SPI_ERROR_BIT_ORDER</a>   (<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 4)</td></tr>
|
|
<tr class="memdesc:ga6b8ac31930ea6ca3a9635f2ac935466d"><td class="mdescLeft"> </td><td class="mdescRight">Specified Bit order not supported. <a href="group__spi__execution__status.html#ga6b8ac31930ea6ca3a9635f2ac935466d">More...</a><br/></td></tr>
|
|
<tr class="separator:ga6b8ac31930ea6ca3a9635f2ac935466d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:gaae7b1a1feb46faa1830c92b73bd775ad"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__execution__status.html#gaae7b1a1feb46faa1830c92b73bd775ad">ARM_SPI_ERROR_SS_MODE</a>   (<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 5)</td></tr>
|
|
<tr class="memdesc:gaae7b1a1feb46faa1830c92b73bd775ad"><td class="mdescLeft"> </td><td class="mdescRight">Specified Slave Select Mode not supported. <a href="group__spi__execution__status.html#gaae7b1a1feb46faa1830c92b73bd775ad">More...</a><br/></td></tr>
|
|
<tr class="separator:gaae7b1a1feb46faa1830c92b73bd775ad"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:gaabdfc9e17641144cd50d36d15511a1b8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__SPI__events.html#gaabdfc9e17641144cd50d36d15511a1b8">ARM_SPI_EVENT_TRANSFER_COMPLETE</a>   (1UL << 0)</td></tr>
|
|
<tr class="memdesc:gaabdfc9e17641144cd50d36d15511a1b8"><td class="mdescLeft"> </td><td class="mdescRight">Data Transfer completed. <a href="group__SPI__events.html#gaabdfc9e17641144cd50d36d15511a1b8">More...</a><br/></td></tr>
|
|
<tr class="separator:gaabdfc9e17641144cd50d36d15511a1b8"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga8e63d99c80ea56de596a8d0a51fd8244"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__SPI__events.html#ga8e63d99c80ea56de596a8d0a51fd8244">ARM_SPI_EVENT_DATA_LOST</a>   (1UL << 1)</td></tr>
|
|
<tr class="memdesc:ga8e63d99c80ea56de596a8d0a51fd8244"><td class="mdescLeft"> </td><td class="mdescRight">Data lost: Receive overflow / Transmit underflow. <a href="group__SPI__events.html#ga8e63d99c80ea56de596a8d0a51fd8244">More...</a><br/></td></tr>
|
|
<tr class="separator:ga8e63d99c80ea56de596a8d0a51fd8244"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ga7eaa229003689aa18598273490b3e630"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__SPI__events.html#ga7eaa229003689aa18598273490b3e630">ARM_SPI_EVENT_MODE_FAULT</a>   (1UL << 2)</td></tr>
|
|
<tr class="memdesc:ga7eaa229003689aa18598273490b3e630"><td class="mdescLeft"> </td><td class="mdescRight">Master Mode Fault (SS deactivated when Master) <a href="group__SPI__events.html#ga7eaa229003689aa18598273490b3e630">More...</a><br/></td></tr>
|
|
<tr class="separator:ga7eaa229003689aa18598273490b3e630"><td class="memSeparator" colspan="2"> </td></tr>
|
|
</table><table class="memberdecls">
|
|
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
|
|
Typedefs</h2></td></tr>
|
|
<tr class="memitem:gafde9205364241ee81290adc0481c6640"><td class="memItemLeft" align="right" valign="top">typedef void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__interface__gr.html#gafde9205364241ee81290adc0481c6640">ARM_SPI_SignalEvent_t</a> )(uint32_t event)</td></tr>
|
|
<tr class="memdesc:gafde9205364241ee81290adc0481c6640"><td class="mdescLeft"> </td><td class="mdescRight">Pointer to <a class="el" href="group__spi__interface__gr.html#ga505b2d787348d51351d38fee98ccba7e">ARM_SPI_SignalEvent</a> : Signal SPI Event. <a href="group__spi__interface__gr.html#gafde9205364241ee81290adc0481c6640">More...</a><br/></td></tr>
|
|
<tr class="separator:gafde9205364241ee81290adc0481c6640"><td class="memSeparator" colspan="2"> </td></tr>
|
|
</table>
|
|
<h2 class="groupheader">Macro Definition Documentation</h2>
|
|
<a class="anchor" id="acf1275c15e53a573d7db89da66839d97"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_API_VERSION   <a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(2,2) /* API version */</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="a129dc5d38b4ba2c776c0b90aecf12a63"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_CONTROL_Pos   0</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="a646c834efef12377b372ea546459315b"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_CONTROL_Msk   (0xFFUL << ARM_SPI_CONTROL_Pos)</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ac47e4ed093d8c054021121f89c64023e"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_FRAME_FORMAT_Pos   8</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="af459192fe14b4b725816fa0029149298"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_FRAME_FORMAT_Msk   (7UL << ARM_SPI_FRAME_FORMAT_Pos)</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="a89e1140c07c9805112b6de4541c3b59a"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_DATA_BITS_Pos   12</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="a0b6e14fe55f4d92ddab6ca230da77f46"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_DATA_BITS_Msk   (0x3FUL << ARM_SPI_DATA_BITS_Pos)</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="a84a8f90504df32ec77832a0285a47081"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_BIT_ORDER_Pos   18</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="a7d407682d2cb5a7fea5e38ae62fa42f8"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_BIT_ORDER_Msk   (1UL << ARM_SPI_BIT_ORDER_Pos)</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ac467bd067b72370b23546767e63ce693"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_SS_MASTER_MODE_Pos   19</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="aaefa5b36525296a43071968cac43a4af"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_SS_MASTER_MODE_Msk   (3UL << ARM_SPI_SS_MASTER_MODE_Pos)</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="a4aed772149cc33c6ee70663adef90956"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_SS_SLAVE_MODE_Pos   21</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="a2e9a0ac10df1b90b785c5d23079873e0"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_SS_SLAVE_MODE_Msk   (1UL << ARM_SPI_SS_SLAVE_MODE_Pos)</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="a335b448e07422e9c25616a693ec581cc"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_SS_INACTIVE   0</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
<p>SPI Slave Select Signal Inactive. </p>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="a3f465cdbd1238ddd74f78e14457076c4"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">#define ARM_SPI_SS_ACTIVE   1</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
<p>SPI Slave Select Signal Active. </p>
|
|
|
|
</div>
|
|
</div>
|
|
</div><!-- contents -->
|
|
</div><!-- doc-content -->
|
|
<!-- start footer part -->
|
|
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
|
<ul>
|
|
<li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__SPI_8h.html">Driver_SPI.h</a></li>
|
|
<li class="footer">Generated on Wed Feb 8 2017 10:20:43 for CMSIS-Driver by ARM Ltd. All rights reserved.
|
|
<!--
|
|
<a href="http://www.doxygen.org/index.html">
|
|
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6
|
|
-->
|
|
</li>
|
|
</ul>
|
|
</div>
|
|
</body>
|
|
</html>
|