396 lines
22 KiB
HTML
396 lines
22 KiB
HTML
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<title>MCI Controls</title>
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<title>CMSIS-Driver: MCI Controls</title>
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<div id="projectname">CMSIS-Driver
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 <span id="projectnumber">Version 2.05</span>
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</div>
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<div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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<a href="#define-members">Macros</a> </div>
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<div class="title">MCI Controls<div class="ingroups"><a class="el" href="group__mci__control__gr.html">MCI Control Codes</a></div></div> </div>
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</div><!--header-->
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<div class="contents">
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<p>Configure and control the MCI interface.
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<a href="#details">More...</a></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:ga7f982d2e5aec768307d35a83c65fb3ef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga7f982d2e5aec768307d35a83c65fb3ef">ARM_MCI_BUS_SPEED</a>   (0x01)</td></tr>
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<tr class="memdesc:ga7f982d2e5aec768307d35a83c65fb3ef"><td class="mdescLeft"> </td><td class="mdescRight">Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s. <a href="#ga7f982d2e5aec768307d35a83c65fb3ef">More...</a><br/></td></tr>
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<tr class="separator:ga7f982d2e5aec768307d35a83c65fb3ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf7ede525eabc618fbbb9f7a294c8ed96"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#gaf7ede525eabc618fbbb9f7a294c8ed96">ARM_MCI_BUS_SPEED_MODE</a>   (0x02)</td></tr>
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<tr class="memdesc:gaf7ede525eabc618fbbb9f7a294c8ed96"><td class="mdescLeft"> </td><td class="mdescRight">Set Bus Speed Mode as specified with arg. <a href="#gaf7ede525eabc618fbbb9f7a294c8ed96">More...</a><br/></td></tr>
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<tr class="separator:gaf7ede525eabc618fbbb9f7a294c8ed96"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8b7571e37520c07d8ef4f697f3886715"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga8b7571e37520c07d8ef4f697f3886715">ARM_MCI_BUS_CMD_MODE</a>   (0x03)</td></tr>
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<tr class="memdesc:ga8b7571e37520c07d8ef4f697f3886715"><td class="mdescLeft"> </td><td class="mdescRight">Set CMD Line Mode as specified with arg. <a href="#ga8b7571e37520c07d8ef4f697f3886715">More...</a><br/></td></tr>
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<tr class="separator:ga8b7571e37520c07d8ef4f697f3886715"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga876d964d0eeacdb16e93f7558a544587"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga876d964d0eeacdb16e93f7558a544587">ARM_MCI_BUS_DATA_WIDTH</a>   (0x04)</td></tr>
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<tr class="memdesc:ga876d964d0eeacdb16e93f7558a544587"><td class="mdescLeft"> </td><td class="mdescRight">Set Bus Data Width as specified with arg. <a href="#ga876d964d0eeacdb16e93f7558a544587">More...</a><br/></td></tr>
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<tr class="separator:ga876d964d0eeacdb16e93f7558a544587"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga78068f519139f2ae7b09e0608070aaf6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga78068f519139f2ae7b09e0608070aaf6">ARM_MCI_DRIVER_STRENGTH</a>   (0x05)</td></tr>
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<tr class="memdesc:ga78068f519139f2ae7b09e0608070aaf6"><td class="mdescLeft"> </td><td class="mdescRight">Set SD UHS-I Driver Strength as specified with arg. <a href="#ga78068f519139f2ae7b09e0608070aaf6">More...</a><br/></td></tr>
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<tr class="separator:ga78068f519139f2ae7b09e0608070aaf6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga21e403e8c3fa8cc75431a513813f0a16"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga21e403e8c3fa8cc75431a513813f0a16">ARM_MCI_CONTROL_RESET</a>   (0x06)</td></tr>
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<tr class="memdesc:ga21e403e8c3fa8cc75431a513813f0a16"><td class="mdescLeft"> </td><td class="mdescRight">Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active. <a href="#ga21e403e8c3fa8cc75431a513813f0a16">More...</a><br/></td></tr>
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<tr class="separator:ga21e403e8c3fa8cc75431a513813f0a16"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga889473fbfbdcb89aab4d53cc8a13f615"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga889473fbfbdcb89aab4d53cc8a13f615">ARM_MCI_CONTROL_CLOCK_IDLE</a>   (0x07)</td></tr>
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<tr class="memdesc:ga889473fbfbdcb89aab4d53cc8a13f615"><td class="mdescLeft"> </td><td class="mdescRight">Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled. <a href="#ga889473fbfbdcb89aab4d53cc8a13f615">More...</a><br/></td></tr>
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<tr class="separator:ga889473fbfbdcb89aab4d53cc8a13f615"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga98853f60bdc085aeeccd66f7bdf22d3d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga98853f60bdc085aeeccd66f7bdf22d3d">ARM_MCI_UHS_TUNING_OPERATION</a>   (0x08)</td></tr>
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<tr class="memdesc:ga98853f60bdc085aeeccd66f7bdf22d3d"><td class="mdescLeft"> </td><td class="mdescRight">Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute. <a href="#ga98853f60bdc085aeeccd66f7bdf22d3d">More...</a><br/></td></tr>
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<tr class="separator:ga98853f60bdc085aeeccd66f7bdf22d3d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabd3af448e26da5657c1c5a03330476b7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#gabd3af448e26da5657c1c5a03330476b7">ARM_MCI_UHS_TUNING_RESULT</a>   (0x09)</td></tr>
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<tr class="memdesc:gabd3af448e26da5657c1c5a03330476b7"><td class="mdescLeft"> </td><td class="mdescRight">Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error. <a href="#gabd3af448e26da5657c1c5a03330476b7">More...</a><br/></td></tr>
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<tr class="separator:gabd3af448e26da5657c1c5a03330476b7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga09a58821e42595f0c2e55f8cc2d32ceb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga09a58821e42595f0c2e55f8cc2d32ceb">ARM_MCI_DATA_TIMEOUT</a>   (0x0A)</td></tr>
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<tr class="memdesc:ga09a58821e42595f0c2e55f8cc2d32ceb"><td class="mdescLeft"> </td><td class="mdescRight">Set Data timeout; arg = timeout in bus cycles. <a href="#ga09a58821e42595f0c2e55f8cc2d32ceb">More...</a><br/></td></tr>
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<tr class="separator:ga09a58821e42595f0c2e55f8cc2d32ceb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae97b1a819a5d326b1f1009b0d6d48b5a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#gae97b1a819a5d326b1f1009b0d6d48b5a">ARM_MCI_CSS_TIMEOUT</a>   (0x0B)</td></tr>
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<tr class="memdesc:gae97b1a819a5d326b1f1009b0d6d48b5a"><td class="mdescLeft"> </td><td class="mdescRight">Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles. <a href="#gae97b1a819a5d326b1f1009b0d6d48b5a">More...</a><br/></td></tr>
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<tr class="separator:gae97b1a819a5d326b1f1009b0d6d48b5a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga19fd7d3b74ac48ca74a2e138b3ee9963"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga19fd7d3b74ac48ca74a2e138b3ee9963">ARM_MCI_MONITOR_SDIO_INTERRUPT</a>   (0x0C)</td></tr>
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<tr class="memdesc:ga19fd7d3b74ac48ca74a2e138b3ee9963"><td class="mdescLeft"> </td><td class="mdescRight">Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled. <a href="#ga19fd7d3b74ac48ca74a2e138b3ee9963">More...</a><br/></td></tr>
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<tr class="separator:ga19fd7d3b74ac48ca74a2e138b3ee9963"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaa10c5aa7a8108aa59c3734b3eec2e3a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#gaaa10c5aa7a8108aa59c3734b3eec2e3a">ARM_MCI_CONTROL_READ_WAIT</a>   (0x0D)</td></tr>
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<tr class="memdesc:gaaa10c5aa7a8108aa59c3734b3eec2e3a"><td class="mdescLeft"> </td><td class="mdescRight">Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled. <a href="#gaaa10c5aa7a8108aa59c3734b3eec2e3a">More...</a><br/></td></tr>
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<tr class="separator:gaaa10c5aa7a8108aa59c3734b3eec2e3a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga04cf174b0ef13240f26225bf8e45a4a0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga04cf174b0ef13240f26225bf8e45a4a0">ARM_MCI_SUSPEND_TRANSFER</a>   (0x0E)</td></tr>
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<tr class="memdesc:ga04cf174b0ef13240f26225bf8e45a4a0"><td class="mdescLeft"> </td><td class="mdescRight">Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer. <a href="#ga04cf174b0ef13240f26225bf8e45a4a0">More...</a><br/></td></tr>
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<tr class="separator:ga04cf174b0ef13240f26225bf8e45a4a0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac4907319499072fddf61f2f83b0dd966"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#gac4907319499072fddf61f2f83b0dd966">ARM_MCI_RESUME_TRANSFER</a>   (0x0F)</td></tr>
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<tr class="memdesc:gac4907319499072fddf61f2f83b0dd966"><td class="mdescLeft"> </td><td class="mdescRight">Resume Data transfer (SD I/O) <a href="#gac4907319499072fddf61f2f83b0dd966">More...</a><br/></td></tr>
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<tr class="separator:gac4907319499072fddf61f2f83b0dd966"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
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<p>Configure and control the MCI interface. </p>
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<p>The following codes are used as values for the parameter <em>control</em> of the function <a class="el" href="group__mci__interface__gr.html#gaec0506a2aa4ae75cf6bc02528f36fe30">ARM_MCI_Control</a> to setup the MCI interface. </p>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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<a class="anchor" id="ga7f982d2e5aec768307d35a83c65fb3ef"></a>
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<div class="memitem">
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<td class="memname">#define ARM_MCI_BUS_SPEED   (0x01)</td>
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</div><div class="memdoc">
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<p>Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s. </p>
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<a class="anchor" id="gaf7ede525eabc618fbbb9f7a294c8ed96"></a>
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<td class="memname">#define ARM_MCI_BUS_SPEED_MODE   (0x02)</td>
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</div><div class="memdoc">
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<p>Set Bus Speed Mode as specified with arg. </p>
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<a class="anchor" id="ga8b7571e37520c07d8ef4f697f3886715"></a>
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<td class="memname">#define ARM_MCI_BUS_CMD_MODE   (0x03)</td>
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</div><div class="memdoc">
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<p>Set CMD Line Mode as specified with arg. </p>
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<a class="anchor" id="ga876d964d0eeacdb16e93f7558a544587"></a>
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<td class="memname">#define ARM_MCI_BUS_DATA_WIDTH   (0x04)</td>
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<p>Set Bus Data Width as specified with arg. </p>
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<td class="memname">#define ARM_MCI_DRIVER_STRENGTH   (0x05)</td>
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<p>Set SD UHS-I Driver Strength as specified with arg. </p>
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<td class="memname">#define ARM_MCI_CONTROL_RESET   (0x06)</td>
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<p>Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active. </p>
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<td class="memname">#define ARM_MCI_CONTROL_CLOCK_IDLE   (0x07)</td>
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<p>Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled. </p>
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<td class="memname">#define ARM_MCI_UHS_TUNING_OPERATION   (0x08)</td>
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<p>Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute. </p>
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<td class="memname">#define ARM_MCI_UHS_TUNING_RESULT   (0x09)</td>
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</div><div class="memdoc">
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<p>Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error. </p>
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<td class="memname">#define ARM_MCI_DATA_TIMEOUT   (0x0A)</td>
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<p>Set Data timeout; arg = timeout in bus cycles. </p>
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<td class="memname">#define ARM_MCI_CSS_TIMEOUT   (0x0B)</td>
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</div><div class="memdoc">
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<p>Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles. </p>
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<td class="memname">#define ARM_MCI_MONITOR_SDIO_INTERRUPT   (0x0C)</td>
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<p>Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled. </p>
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<td class="memname">#define ARM_MCI_CONTROL_READ_WAIT   (0x0D)</td>
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<p>Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled. </p>
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<td class="memname">#define ARM_MCI_SUSPEND_TRANSFER   (0x0E)</td>
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<p>Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer. </p>
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<td class="memname">#define ARM_MCI_RESUME_TRANSFER   (0x0F)</td>
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<p>Resume Data transfer (SD I/O) </p>
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