237 lines
8.2 KiB
ArmAsm
237 lines
8.2 KiB
ArmAsm
/******************************************************************************
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* @file startup_TLE986x.s
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* @brief CMSIS Cortex-M3 Core Device Startup File for
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* Infineon TLE986x Device Series
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* @version V1.2
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* @date 20. July 2015
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*
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* Copyright (C) 2015 Infineon Technologies AG. All rights reserved.
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*
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*
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* @par
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* Infineon Technologies AG (Infineon) is supplying this software for use with
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* Infineon's microcontrollers. This file can be freely distributed
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* within development tools that are supporting such microcontrollers.
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*
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* @par
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* THIS SOFTWARE IS PROVIDED AS IS. NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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*
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******************************************************************************/
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/********************** Version History ***************************************
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* V1.1, 24. June 2015, Initial version
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* V1.2, 20. July 2015, Fixed stack pointer initializaton
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******************************************************************************/
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/* ===========START : MACRO DEFINITION MACRO DEFINITION ================== */
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.macro Entry Handler
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.long \Handler
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.endm
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.macro Insert_ExceptionHandler Handler_Func
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.weak \Handler_Func
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.thumb_set \Handler_Func, Default_Handler
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.endm
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/* =============END : MACRO DEFINITION MACRO DEFINITION ================== */
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/* ================== START OF VECTOR TABLE DEFINITION ====================== */
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/* Vector Table - This gets programed into VTOR register by onchip BootROM */
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.syntax unified
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.section .reset
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.align 2
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.globl __Vectors
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.type __Vectors, %object
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__Vectors:
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.long __initial_sp /* Top of Stack */
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.long Reset_Handler /* Reset Handler */
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Entry NMI_Handler /* NMI Handler */
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Entry HardFault_Handler /* Hard Fault Handler */
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Entry MemManage_Handler /* MPU Fault Handler */
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Entry BusFault_Handler /* Bus Fault Handler */
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Entry UsageFault_Handler /* Usage Fault Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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Entry SVC_Handler /* SVCall Handler */
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Entry DebugMon_Handler /* Debug Monitor Handler */
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.long 0 /* Reserved */
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Entry PendSV_Handler /* PendSV Handler */
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Entry SysTick_Handler /* SysTick Handler */
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/* Interrupt Handlers for Service Requests (SR) from Tle986x Peripherals */
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Entry GPT1_IRQHandler /* Handler name for GPT1 */
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Entry GPT2_IRQHandler /* Handler name for GPT2 */
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Entry ADC2_IRQHandler /* Handler name for Measurement Unit, Timer3 */
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Entry ADC1_IRQHandler /* Handler name for 10 bit ADC */
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Entry CCU6SR0_IRQHandler /* Handler name for CCU0 */
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Entry CCU6SR1_IRQHandler /* Handler name for CCU1 */
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Entry CCU6SR2_IRQHandler /* Handler name for CCU2 */
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Entry CCU6SR3_IRQHandler /* Handler name for CCU3 */
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Entry SSC1_IRQHandler /* Handler name for SSC1 */
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Entry SSC2_IRQHandler /* Handler name for SSC2 */
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Entry UART1_IRQHandler /* Handler name for UART1 */
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Entry UART2_IRQHandler /* Handler name for UART2 */
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Entry EXINT0_IRQHandler /* Handler name for EXINT0 */
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Entry EXINT1_IRQHandler /* Handler name for EXINT1 */
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Entry BDRV_IRQHandler /* Handler name for BDRV */
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Entry DMA_IRQHandler /* Handler name for DMA */
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.size __Vectors, . - __Vectors
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/* ================== END OF VECTOR TABLE DEFINITION ======================= */
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/* ================== START OF VECTOR ROUTINES ============================= */
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.align 1
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.thumb
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/* Reset Handler */
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.thumb_func
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.globl Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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ldr r0,=__initial_sp
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msr msp, r0
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isb
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#ifndef __SKIP_SYSTEM_INIT
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ldr r0, =SystemInit
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blx r0
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#endif
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/* Initialize data
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*
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* Between symbol address __copy_table_start__ and __copy_table_end__,
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* there are array of triplets, each of which specify:
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* offset 0: LMA of start of a section to copy from
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* offset 4: VMA of start of a section to copy to
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* offset 8: size of the section to copy. Must be multiply of 4
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*
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* All addresses must be aligned to 4 bytes boundary.
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*/
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ldr r4, =__copy_table_start__
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ldr r5, =__copy_table_end__
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.L_loop0:
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cmp r4, r5
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bge .L_loop0_done
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ldr r1, [r4]
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ldr r2, [r4, #4]
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ldr r3, [r4, #8]
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.L_loop0_0:
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subs r3, #4
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ittt ge
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ldrge r0, [r1, r3]
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strge r0, [r2, r3]
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bge .L_loop0_0
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adds r4, #12
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b .L_loop0
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.L_loop0_done:
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/* Zero initialized data
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* Between symbol address __zero_table_start__ and __zero_table_end__,
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* there are array of tuples specifying:
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* offset 0: Start of a BSS section
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* offset 4: Size of this BSS section. Must be multiply of 4
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*
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* Define __SKIP_BSS_CLEAR to disable zeroing uninitialzed data in startup.
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*/
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#ifndef __SKIP_BSS_CLEAR
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ldr r3, =__zero_table_start__
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ldr r4, =__zero_table_end__
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.L_loop2:
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cmp r3, r4
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bge .L_loop2_done
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ldr r1, [r3]
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ldr r2, [r3, #4]
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movs r0, 0
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.L_loop2_0:
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subs r2, #4
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itt ge
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strge r0, [r1, r2]
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bge .L_loop2_0
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adds r3, #8
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b .L_loop2
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.L_loop2_done:
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#endif /* __SKIP_BSS_CLEAR */
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#ifndef __SKIP_LIBC_INIT_ARRAY
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ldr r0, =__libc_init_array
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blx r0
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#endif
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ldr r0, =main
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blx r0
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.align 2
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__copy_table_start__:
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.long __data_load, __data_start, __data_size
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.long __ram_code_load, __ram_code_start, __ram_code_size
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__copy_table_end__:
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__zero_table_start__:
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.long __bss_start, __bss_size
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__zero_table_end__:
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.pool
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.size Reset_Handler,.-Reset_Handler
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/* ======================================================================== */
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/* ========== START OF INTERRUPT HANDLER DEFINITION ======================== */
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/* Default exception Handlers - Users may override this default functionality by
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defining handlers of the same name in their C code */
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.align 1
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.thumb_func
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.weak Default_Handler
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.type Default_Handler, %function
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Default_Handler:
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b .
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.size Default_Handler, . - Default_Handler
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Insert_ExceptionHandler NMI_Handler
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Insert_ExceptionHandler HardFault_Handler
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Insert_ExceptionHandler MemManage_Handler
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Insert_ExceptionHandler BusFault_Handler
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Insert_ExceptionHandler UsageFault_Handler
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Insert_ExceptionHandler SVC_Handler
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Insert_ExceptionHandler DebugMon_Handler
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Insert_ExceptionHandler PendSV_Handler
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Insert_ExceptionHandler SysTick_Handler
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Insert_ExceptionHandler GPT1_IRQHandler
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Insert_ExceptionHandler GPT2_IRQHandler
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Insert_ExceptionHandler ADC2_IRQHandler
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Insert_ExceptionHandler ADC1_IRQHandler
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Insert_ExceptionHandler CCU6SR0_IRQHandler
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Insert_ExceptionHandler CCU6SR1_IRQHandler
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Insert_ExceptionHandler CCU6SR2_IRQHandler
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Insert_ExceptionHandler CCU6SR3_IRQHandler
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Insert_ExceptionHandler SSC1_IRQHandler
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Insert_ExceptionHandler SSC2_IRQHandler
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Insert_ExceptionHandler UART1_IRQHandler
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Insert_ExceptionHandler UART2_IRQHandler
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Insert_ExceptionHandler EXINT0_IRQHandler
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Insert_ExceptionHandler EXINT1_IRQHandler
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Insert_ExceptionHandler BDRV_IRQHandler
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Insert_ExceptionHandler DMA_IRQHandler
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/* ============= END OF INTERRUPT HANDLER DEFINITION ====================== */
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.end
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